Merge branch 'master' into family/ambz2

cores/beken-7231q/base/config/sys_config.h

@@ -0,0 +1,105 @@
+#pragma once
+
+#define CFG_AIRKISS_TEST				0
+#define CFG_AP_MONITOR_COEXIST			0
+#define CFG_AP_SUPPORT_HT_IE			0
+#define CFG_BACKGROUND_PRINT			0
+#define CFG_BK_AWARE					0
+#define CFG_BK_AWARE_OUI				"\xC8\x47\x8C"
+#define CFG_EASY_FLASH					1
+#define CFG_ENABLE_BUTTON				0
+#define CFG_ENABLE_DEMO_TEST			0
+#define CFG_ENABLE_WPA_LOG				0
+#define CFG_GENERAL_DMA					1
+#define CFG_IEEE80211N					1
+#define CFG_IEEE80211W					0
+#define CFG_IPERF_TEST					0
+#define CFG_JTAG_ENABLE					0
+#define CFG_LESS_MEMERY_IN_RWNX			0
+#define CFG_MAC_PHY_BAPASS				1
+#define CFG_MSDU_RESV_HEAD_LEN			96
+#define CFG_MSDU_RESV_TAIL_LEN			16
+#define CFG_REAL_SDIO					0
+#define CFG_RELEASE_FIRMWARE			0
+#define CFG_RF_OTA_TEST					0
+#define CFG_RF_USER_BLE					0
+#define CFG_ROLE_LAUNCH					0
+#define CFG_RUNNING_PLATFORM			SOC_PLATFORM
+#define CFG_RWNX_QOS_MSDU				1
+#define CFG_RX_SENSITIVITY_TEST			1
+#define CFG_SARADC_CALIBRATE			0
+#define CFG_SDIO						0
+#define CFG_SDIO_TRANS					0
+#define CFG_SOC_NAME					SOC_BK7231
+#define CFG_SUPPORT_BKREG				1
+#define CFG_SUPPORT_BLE					0
+#define CFG_SUPPORT_BSSID_CONNECT		0
+#define CFG_SUPPORT_CALIBRATION			1
+#define CFG_SUPPORT_MANUAL_CALI			1
+#define CFG_SUPPORT_OTA_HTTP			1
+#define CFG_SUPPORT_OTA_TFTP			0
+#define CFG_SUPPORT_TPC_PA_MAP			1
+#define CFG_SYS_REDUCE_NORMAL_POWER		0
+#define CFG_TCP_SERVER_TEST				0
+#define CFG_TX_EVM_TEST					1
+#define CFG_UART_DEBUG					0
+#define CFG_UART_DEBUG_COMMAND_LINE		1
+#define CFG_UDISK_MP3					0
+#define CFG_USB							0
+#define CFG_USE_AP_IDLE					0
+#define CFG_USE_AP_PS					0
+#define CFG_USE_APP_DEMO_VIDEO_TRANSFER 0
+#define CFG_USE_AUD_ADC					0
+#define CFG_USE_AUD_DAC					0
+#define CFG_USE_AUDIO					0
+#define CFG_USE_BLE_PS					0
+#define CFG_USE_CAMERA_INTF				0
+#define CFG_USE_DEEP_PS					1
+#define CFG_USE_DHCP					1
+#define CFG_USE_FAKERTC_PS				0
+#define CFG_USE_FTPD_UPGRADE			0
+#define CFG_USE_HSLAVE_SPI				0
+#define CFG_USE_LWIP_NETSTACK			1
+#define CFG_USE_MCU_PS					0
+#define CFG_USE_SDCARD_HOST				0
+#define CFG_USE_SPIDMA					0
+#define CFG_USE_STA_PS					1
+#define CFG_USE_TEMPERATURE_DETECT		0
+#define CFG_USE_TICK_CAL				0
+#define CFG_USE_UART1					0
+#define CFG_USE_USB_CHARGE				0
+#define CFG_USE_USB_HOST				0
+#define CFG_USE_WPA_29					1
+#define CFG_WFA_CERT					0
+#define CFG_WIFI_RAW_TX_CMD				0
+#define CFG_WIFI_SENSOR					0
+#define CFG_WLAN_FAST_CONNECT			0
+#define CFG_WPA_CTRL_IFACE				1
+#define CFG_WPA3						0
+#define CFG_XTAL_FREQUENCE				CFG_XTAL_FREQUENCE_26M
+#define CFG_XTAL_FREQUENCE_26M			26000000
+#define CFG_XTAL_FREQUENCE_40M			40000000
+#define CONFIG_APP_MP3PLAYER			0
+#define FPGA_PLATFORM					0
+#define OSMALLOC_STATISTICAL			0
+#define RF_USE_POLICY					WIFI_DEFAULT_BLE_REQUEST
+#define SOC_BK7221U						3
+#define SOC_BK7231						1
+#define SOC_BK7231N						5
+#define SOC_BK7231U						2
+#define SOC_PLATFORM					1
+#define THD_APPLICATION_PRIORITY		3
+#define THD_CORE_PRIORITY				2
+#define THD_EXTENDED_APP_PRIORITY		5
+#define THD_HOSTAPD_PRIORITY			5
+#define THD_INIT_PRIORITY				4
+#define THD_LWIP_PRIORITY				4
+#define THD_MEDIA_PRIORITY				4
+#define THD_RECONNECT_PRIORITY			4
+#define THD_UBG_PRIORITY				5
+#define THD_UMP3_PRIORITY				4
+#define THD_WPAS_PRIORITY				5
+#define THDD_KEY_SCAN_PRIORITY			7
+#define UART1_USE_FIFO_REC				0
+#define UART2_USE_FIFO_REC				0
+#define WIFI_DEFAULT_BLE_REQUEST		1

cores/beken-7231q/base/fixups/bk7231q.c

@@ -0,0 +1,26 @@
+/* Copyright (c) Kuba Szczodrzyński 2023-06-20. */
+
+int ble_active			   = 0;
+int ble_switch_mac_sleeped = 0;
+
+int wifi_notice_ble_status() {
+	return 0;
+}
+
+int wn_txl_hd_pending_is_allow() {
+	return 1;
+}
+
+int if_ble_sleep() {
+	return 1;
+}
+
+void ble_switch_rf_to_wifi() {}
+
+int rwip_get_current_time() {
+	return 0;
+}
+
+int rwip_get_next_target_time() {
+	return 0;
+}

cores/beken-7231q/base/fixups/bk7231q.h

@@ -0,0 +1,19 @@
+/* Copyright (c) Kuba Szczodrzyński 2023-06-20. */
+
+#pragma once
+
+#define GPIO_SD1_DMA_MODULE		  GPIO_SD_DMA_MODULE
+#define SARADC_ADC_SATURATION_CFG (SARADC_BASE + 3 * 4)
+#define SARADC_ADC_SAT_CTRL_MASK  (0x3)
+#define SARADC_ADC_DAT_AFTER_STA  SARADC_ADC_DATA
+
+#define CMD_GET_SCTRL_RETETION 0xC123F48
+#define CMD_SET_SCTRL_RETETION 0xC123F49
+
+inline void turnon_PA_in_temp_dect() {}
+
+inline void turnoff_PA_in_temp_dect() {}
+
+inline int if_ble_sleep() {
+	return 1;
+}

cores/beken-72xx/arduino/src/wiring.c

@@ -2,10 +2,16 @@
 
 #include "wiring_private.h"
 
+#if LT_BK7231Q
+#undef LT_MICROS_HIGH_RES
+#define LT_MICROS_HIGH_RES 0
+#endif
+
 #define TICKS_PER_US	   (CFG_XTAL_FREQUENCE / 1000 / 1000)
 #define US_PER_OVERFLOW	   (portTICK_PERIOD_MS * 1000)
 #define TICKS_PER_OVERFLOW (TICKS_PER_US * US_PER_OVERFLOW)
 
+#if LT_MICROS_HIGH_RES
 static uint32_t getTicksCount() {
 	// copied from bk_timer_ctrl(), for speeds
 	uint32_t timeout = 0;
@@ -17,6 +23,7 @@ static uint32_t getTicksCount() {
 	}
 	return REG_READ(TIMER0_2_READ_VALUE);
 }
+#endif
 
 void delayMicroseconds(unsigned int us) {
 #if LT_MICROS_HIGH_RES
@@ -50,10 +57,6 @@ unsigned long millis() {
 }
 
 unsigned long micros() {
-#if (CFG_SOC_NAME == SOC_BK7231)
-#error "Not implemented"
-#endif
-
 #if LT_MICROS_HIGH_RES
 	static uint32_t lastMillis		= 0;
 	static uint32_t correctedMillis = 0;

cores/beken-72xx/base/fixups/clock_rtos.c

@@ -12,7 +12,7 @@
 #include "uart_pub.h"
 
 // from lt_config.h
-#ifndef LT_MICROS_HIGH_RES
+#if !defined(LT_MICROS_HIGH_RES) && !LT_BK7231Q
 #define LT_MICROS_HIGH_RES 1
 #endif
 
@@ -30,7 +30,7 @@ static void fclk_hdl(UINT8 param);
 
 void fclk_init(void) {
 #if (CFG_SOC_NAME == SOC_BK7231)
-	fclk_timer_hw_init(BK_PWM_TIMER_ID0);
+	fclk_timer_hw_init(BK_PWM_TIMER_ID3);
 #elif LT_MICROS_HIGH_RES
 	fclk_timer_hw_init(BK_TIMER_ID0);
 #else
@@ -51,7 +51,7 @@ static void fclk_timer_hw_init(BK_HW_TIMER_INDEX timer_id) {
 	fclk_id = timer_id;
 	if (fclk_id >= BK_PWM_TIMER_ID0) { // pwm timer
 		pwm_param_t param;
-		param.channel		  = (fclk_id - PWM0);
+		param.channel		  = (fclk_id - BK_PWM_TIMER_ID0);
 		param.cfg.bits.en	  = PWM_ENABLE;
 		param.cfg.bits.int_en = PWM_INT_EN;
 		param.cfg.bits.mode	  = PWM_TIMER_MODE;

cores/beken-72xx/base/fixups/include.h

@@ -6,3 +6,7 @@
 
 // force including fixups/generic.h, even by BDK/include.h
 #include "generic.h"
+
+#if CFG_SOC_NAME == SOC_BK7231
+#include "bk7231q.h"
+#endif

cores/common/base/lt_types.h

@@ -22,7 +22,8 @@ typedef enum {
 	F_RTL8710B = 0x22E0D6FC, // Realtek AmebaZ (realtek-ambz)
 	F_RTL8720C = 0xE08F7564, // Realtek AmebaZ2
 	F_RTL8720D = 0x3379CFE2, // Realtek AmebaD
-	F_BK7231U  = 0x675A40B0, // Beken 7231U/7231T
+	F_BK7231Q  = 0xAFE81D49, // Beken 7231Q
+	F_BK7231T  = 0x675A40B0, // Beken 7231T
 	F_BK7231N  = 0x7B3EF230, // Beken 7231N
 	F_BK7251   = 0x6A82CC42, // Beken 7251/7252
 	F_BL60X	   = 0xDE1270B7, // Boufallo 602
@@ -46,7 +47,8 @@ typedef enum {
 	RTL8720CF = CPU_MODEL(F_RTL8720C, 0xED), // 0xFB << 2 | 1
 	RTL8720CX = RTL8720CM,
 	// Beken 72XX
-	BK7231T = CPU_MODEL(F_BK7231U, 0x1A), // *SCTRL_CHIP_ID = 0x7231a
+	BK7231Q = CPU_MODEL(F_BK7231Q, 0x31), // *SCTRL_CHIP_ID = 0x7231
+	BK7231T = CPU_MODEL(F_BK7231T, 0x1A), // *SCTRL_CHIP_ID = 0x7231a
 	BK7231N = CPU_MODEL(F_BK7231N, 0x1C), // *SCTRL_CHIP_ID = 0x7231c
 	BK7252	= CPU_MODEL(F_BK7251, 0x00),  // TODO
 	BL2028N = BK7231N,