mirror/86Box
1
0
Fork 0
mirror of https://github.com/86Box/86Box.git synced 2026-02-22 09:35:32 -07:00
Code Issues Packages Projects Releases Activity
3,231 Commits 12 Branches 36 Tags
dc7983902ecad3ee90b9bc25d0415cbfc726e3f3
Commit Graph

71 Commits

Author SHA1 Message Date
tiseno100
298d25a6da Added 2 missing MSR's. Fixes the Tyan Tsunami ATX & SuperMicro P6SBA hate on i686 CPU's 2020-06-12 20:58:13 +03:00
tiseno100
3988f6fa45 Added the Acer V60N 
An i686 Acer BIOS board. Works as intended
 2020-06-12 19:18:28 +03:00
OBattler
42508ceb52 Implemented i686 MSR 404. 2020-06-12 17:24:58 +02:00
tiseno100
d46da3efa1 Fixed wrong CPUID's on the Pentium II Xeons 
Also added some \**bus based** speeds
 2020-06-09 00:47:36 +03:00
Daniel Gurney
416d4f673d Revert "Fixed cpu.h." 
This reverts commit 01dc901ace.
 2020-06-07 21:43:27 +03:00
Daniel Gurney
00bb03a2a1 Revert #788 
Dubious changes that caused conflicts
 2020-06-07 21:40:44 +03:00
OBattler
01dc901ace Fixed cpu.h. 2020-06-07 03:26:24 +02:00
anabate123
7f36a62220 Slot 1/Socket 370 fixes 
An update to the Slot 1 and Socket 370 processors in the CPU table to be applied as the 440EX supports Celeron processors.
 2020-06-06 20:56:37 -04:00
nerd73
3f0adb5211 Add the AMI Excalibur, a VLB OPTi 596/597 machine. 
Also adds emulation of the OPTi 5x7 chipset, and introduces a clock divider for VLB on 64-bit bus systems.
 2020-06-05 10:22:59 -06:00
nerd73
5596855871 Improved EBL_CR_POWERON MSR 
Improves emulation of the EBL_CR_POWERON MSR on Intel P6 and VIA C3 CPUs. Also makes a fix to a logging bug.
 2020-05-30 21:02:23 -06:00
RichardG867
35c95ce985 Machine table (and KN97) fixes 2020-05-27 00:06:06 -03:00
nerd73
eebdcf85cb Made writing to MSR 0x8B GPF on Intel Pentium/Pentium MMX 
Windows Vista now (correctly) no longer works on these CPUs. IDT WinChip, AMD K6, VIA Cyrix III, and Intel P6 family CPUs are not affected.
 2020-05-17 19:28:40 -06:00
OBattler
d5114bdf67 Fix to the previous commit to only do it when using the recompiler. 2020-05-15 07:26:31 +02:00
OBattler
8997159dde Update the TSC (and run the timers) on ACPI timer read and RDTSC instruction. 2020-05-15 07:25:20 +02:00
OBattler
3d278b344f Some PPI changes, should make the PPI behave consistently on hard reset. 2020-05-15 07:24:43 +02:00
OBattler
3a401af84e Changes to update_tsc() - no longer requires a parameter and advances by all the currently accumulated cycles. Also changed TSC-related delta's to be correctly uint64_t. 2020-05-14 01:36:52 +02:00
OBattler
f46181db78 Several fixes - the MR BIOS'es now work on the recompiler (thank you, port EBh!), so they have been moved out of the Dev branch. 2020-05-13 03:43:02 +02:00
tiseno100
82b73e7941 SuperMicro WinBios 440LX & 440BX + Slot 2 440GX bringup 2020-05-12 19:33:26 +03:00
OBattler
2bd6572f02 Merge branch 'master' of https://github.com/86Box/86Box 2020-05-12 13:37:06 +02:00
OBattler
241ad90b54 Got rid of a lot of incorrect variable declaration and missing extern's, 86Box now successfully links when compiled with GCC 10.x. 2020-05-12 13:36:47 +02:00
OBattler
3b9c6a0839 Merge pull request #733 from tiseno100/master 
Improved the VIA VPX code + changes on the machines
 2020-05-12 00:22:39 +02:00
OBattler
23739b3dc6 Some CPU fixes, fixes #736. 2020-05-06 00:22:21 +02:00
tiseno100
811fac7064 Corrected the Mendocino multipliers 
Now the Mendocino's use the correct intended multipliers.
 2020-05-05 13:29:59 +03:00
OBattler
0570e21f0f Applied Ryuzaki's Media menu patch, fixed a bug in cpu.c reported by ms. person, fixed bugs (and added a workaround for the Windows 2000 PCnet problems) to mem.c, and added a network packet queue to cap network speed (and do the actual rx poll in the main thread instead) for more stability, also some ES1371 fixes (but not enough to make it work on Linux). 2020-04-29 23:39:54 +02:00
OBattler
28530c83dc Slight changes related to PAE. 2020-04-28 18:37:19 +02:00
OBattler
59822c6c0e Overhauled DMA bus master reads and writes and cleaned up the AMD PCnet code a bit (network queue implementation is pending). 2020-04-28 01:01:39 +02:00
OBattler
ad040f18b0 Changed an accidental addition to the correct subtraction in the 808x DAS instruction, fixes XTIDE port reporting. 2020-04-27 03:07:50 +02:00
OBattler
d499d63fd1 Implemented the Pentium Pro+ HINT_NOP instructions and slightly reworked the Deschutes+ FXSAVE/FXRSTOR instructions. 2020-04-21 23:52:10 +02:00
OBattler
70862a3c25 Added dmmy support for MSR 0x179 for Debian 10. 2020-04-21 19:24:00 +02:00
OBattler
64b56db0d7 Fixed the implementation of XADD - fixes Windows 2000 Service Pack 4, and hopefully also Linux. 2020-04-21 00:27:22 +02:00
OBattler
cd0a57b6c3 Re-added some x87 differences between the old and new recompilers, fixes #692. 2020-04-19 18:26:57 +02:00
OBattler
600bb09f17 Added PS/2 Intel AMI keyboard controller type that always returns bit 6 of the input port as 1, fixes Intel Advanced/EV and Advanced/ZP SMM errors (with high-low beeps), and also IDE not found error behavior to fix IDE with some i686 BIOS'es. 2020-04-18 18:03:02 +02:00
nerd73
9bc74bbf00 Add the ECS P6KFX-A, a 440FX Slot 1 machine. 
Adds the ECS P6KFX-A as well as appropriate CPU tables for an early Slot 1 motherboard without Deschutes or 100 MHz FSB support. Also fixes a minor bug with 266 MHz Pentium IIs and ISA clock frequencies.
 2020-04-16 18:30:37 -06:00
OBattler
275dd5a2f7 ACPI, SMM, and PIIX fixes, fixes quite a few boards, also fixed the Via Apollo series northbridge ID's, some CPU instructions on both 808x and 286+, and added SMM to 486's (Intel and AMD), WinChip and WinChip 2, and VIA Cyrix III, also removed the TC430HX and the Toshiba machine from the Dev branch. 2020-04-16 21:56:19 +02:00
OBattler
61f0ae7954 Better ACPI implementation (currently only on PIIX4/PIIX4E/SMSC southbridges), finished the SMSC southbridge (but the Atrend BIOS still hangs, need to figure out why), and fixed Tandy EEPROM saving. 2020-04-13 20:01:47 +02:00
GH Cao
4aa066870d x87_ops: Stop using _WIN32 to check MSVC x86 2020-04-10 21:16:00 +02:00
OBattler
d75e901a83 Moved the Intel i686 CPU's and related machines out of the Dev branch. 2020-04-10 20:01:26 +02:00
OBattler
b6eda7946c Fixed bugs in mem.c and 386.c. 2020-04-10 19:45:53 +02:00
OBattler
f29f6de245 Redid the x87 merger, now the x87 interpreter is basically the same across both recompilers, and there's several newly introduced bugs less. 2020-04-10 14:07:25 +02:00
OBattler
2a0b3eb9c5 Added PAE, ported K6, P6, and WinChip 2 timings to the old recompiler, added a bunch of CPU's to the old recompiler, done some x87 fixes for both recompilers, added PAE, and fixed root directory entries for single-sided 5.25" DD floppies in the New Floppy Image dialog. 2020-04-10 01:08:52 +02:00
OBattler
7b93842881 Merge pull request #675 from driver1998/cr0 
Dynarec: Move CR0 into cpu_state
 2020-04-07 11:34:17 +02:00
GH Cao
d632f1dac9 Dynarec: Move CR0 into cpu_state 
Some dynarec backends (x86-64, arm64) expect the offset between cpu_state and CR0 to within a certain limit, otherwise they crashes (e.g: "host_x86_MOV64_REG_ABS - out of range").
Move CR0 to the end of cpu_state, make sure the offset is within limit.

Helps NT4 and Win95 with dynarec on.
 2020-04-07 17:02:34 +08:00
nerd73
312b96a897 Hacky P6 timing model based off K6 timings 2020-04-06 22:44:26 -06:00
OBattler
ca74e0c570 Merge pull request #671 from driver1998/clang 
Enable New Dynarec on Windows ARM
 2020-04-05 15:51:56 +02:00
GH Cao
9ed018eb96 new dynarec: Stop using WIN32 and _WIN32 to identify x86 MSVC WIN32 is defined in all Windows platforms, including Windows ARM 2020-04-04 19:16:43 +08:00
David Hrdlička
9acb489a1d MSVC and Windows SDK compatibility 2020-04-04 12:45:47 +02:00
Melissa Goad
e848f9cdf5 Some compile fixes for clang. Still doesn't compile, but still :P 2020-04-03 10:48:56 -05:00
OBattler
eccaafdbe8 Fixed A20 after returning from SMM on Intel i686 CPU's. 2020-04-01 09:06:30 +02:00
OBattler
b8b198a56a Fixed SMM, overhauled the emulation of the VIA northbridges, and added the Via Apollo VP3. 2020-04-01 08:59:29 +02:00
nerd73
925f1f3784 Add MTRR CPUID bit and clean up VIA C3's CPUID feature bits. 2020-03-31 17:39:55 -06:00