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3,032 Commits 12 Branches 36 Tags
08b4622348a75e777c4f5059cbb4e0a10d0c5bad
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49 Commits

Author SHA1 Message Date
OBattler
23739b3dc6 Some CPU fixes, fixes #736. 2020-05-06 00:22:21 +02:00
OBattler
0570e21f0f Applied Ryuzaki's Media menu patch, fixed a bug in cpu.c reported by ms. person, fixed bugs (and added a workaround for the Windows 2000 PCnet problems) to mem.c, and added a network packet queue to cap network speed (and do the actual rx poll in the main thread instead) for more stability, also some ES1371 fixes (but not enough to make it work on Linux). 2020-04-29 23:39:54 +02:00
OBattler
28530c83dc Slight changes related to PAE. 2020-04-28 18:37:19 +02:00
OBattler
59822c6c0e Overhauled DMA bus master reads and writes and cleaned up the AMD PCnet code a bit (network queue implementation is pending). 2020-04-28 01:01:39 +02:00
OBattler
ad040f18b0 Changed an accidental addition to the correct subtraction in the 808x DAS instruction, fixes XTIDE port reporting. 2020-04-27 03:07:50 +02:00
OBattler
d499d63fd1 Implemented the Pentium Pro+ HINT_NOP instructions and slightly reworked the Deschutes+ FXSAVE/FXRSTOR instructions. 2020-04-21 23:52:10 +02:00
OBattler
70862a3c25 Added dmmy support for MSR 0x179 for Debian 10. 2020-04-21 19:24:00 +02:00
OBattler
64b56db0d7 Fixed the implementation of XADD - fixes Windows 2000 Service Pack 4, and hopefully also Linux. 2020-04-21 00:27:22 +02:00
OBattler
cd0a57b6c3 Re-added some x87 differences between the old and new recompilers, fixes #692. 2020-04-19 18:26:57 +02:00
OBattler
600bb09f17 Added PS/2 Intel AMI keyboard controller type that always returns bit 6 of the input port as 1, fixes Intel Advanced/EV and Advanced/ZP SMM errors (with high-low beeps), and also IDE not found error behavior to fix IDE with some i686 BIOS'es. 2020-04-18 18:03:02 +02:00
nerd73
9bc74bbf00 Add the ECS P6KFX-A, a 440FX Slot 1 machine. 
Adds the ECS P6KFX-A as well as appropriate CPU tables for an early Slot 1 motherboard without Deschutes or 100 MHz FSB support. Also fixes a minor bug with 266 MHz Pentium IIs and ISA clock frequencies.
 2020-04-16 18:30:37 -06:00
OBattler
275dd5a2f7 ACPI, SMM, and PIIX fixes, fixes quite a few boards, also fixed the Via Apollo series northbridge ID's, some CPU instructions on both 808x and 286+, and added SMM to 486's (Intel and AMD), WinChip and WinChip 2, and VIA Cyrix III, also removed the TC430HX and the Toshiba machine from the Dev branch. 2020-04-16 21:56:19 +02:00
OBattler
61f0ae7954 Better ACPI implementation (currently only on PIIX4/PIIX4E/SMSC southbridges), finished the SMSC southbridge (but the Atrend BIOS still hangs, need to figure out why), and fixed Tandy EEPROM saving. 2020-04-13 20:01:47 +02:00
GH Cao
4aa066870d x87_ops: Stop using _WIN32 to check MSVC x86 2020-04-10 21:16:00 +02:00
OBattler
d75e901a83 Moved the Intel i686 CPU's and related machines out of the Dev branch. 2020-04-10 20:01:26 +02:00
OBattler
b6eda7946c Fixed bugs in mem.c and 386.c. 2020-04-10 19:45:53 +02:00
OBattler
f29f6de245 Redid the x87 merger, now the x87 interpreter is basically the same across both recompilers, and there's several newly introduced bugs less. 2020-04-10 14:07:25 +02:00
OBattler
2a0b3eb9c5 Added PAE, ported K6, P6, and WinChip 2 timings to the old recompiler, added a bunch of CPU's to the old recompiler, done some x87 fixes for both recompilers, added PAE, and fixed root directory entries for single-sided 5.25" DD floppies in the New Floppy Image dialog. 2020-04-10 01:08:52 +02:00
OBattler
7b93842881 Merge pull request #675 from driver1998/cr0 
Dynarec: Move CR0 into cpu_state
 2020-04-07 11:34:17 +02:00
GH Cao
d632f1dac9 Dynarec: Move CR0 into cpu_state 
Some dynarec backends (x86-64, arm64) expect the offset between cpu_state and CR0 to within a certain limit, otherwise they crashes (e.g: "host_x86_MOV64_REG_ABS - out of range").
Move CR0 to the end of cpu_state, make sure the offset is within limit.

Helps NT4 and Win95 with dynarec on.
 2020-04-07 17:02:34 +08:00
nerd73
312b96a897 Hacky P6 timing model based off K6 timings 2020-04-06 22:44:26 -06:00
OBattler
ca74e0c570 Merge pull request #671 from driver1998/clang 
Enable New Dynarec on Windows ARM
 2020-04-05 15:51:56 +02:00
GH Cao
9ed018eb96 new dynarec: Stop using WIN32 and _WIN32 to identify x86 MSVC WIN32 is defined in all Windows platforms, including Windows ARM 2020-04-04 19:16:43 +08:00
David Hrdlička
9acb489a1d MSVC and Windows SDK compatibility 2020-04-04 12:45:47 +02:00
Melissa Goad
e848f9cdf5 Some compile fixes for clang. Still doesn't compile, but still :P 2020-04-03 10:48:56 -05:00
OBattler
eccaafdbe8 Fixed A20 after returning from SMM on Intel i686 CPU's. 2020-04-01 09:06:30 +02:00
OBattler
b8b198a56a Fixed SMM, overhauled the emulation of the VIA northbridges, and added the Via Apollo VP3. 2020-04-01 08:59:29 +02:00
nerd73
925f1f3784 Add MTRR CPUID bit and clean up VIA C3's CPUID feature bits. 2020-03-31 17:39:55 -06:00
David Hrdlička
a505894a10 Move all include files to src/include 
- 86Box's own headers go to /86box
- munt's public interface goes to /mt32emu
- all slirp headers go to /slirp (might want to consider using only its public inteface)
- single file headers from other projects go in include root
 2020-03-29 19:53:29 +02:00
OBattler
66e159e0bf Fixed SMM, now it works correctly, and is now also operating on all CPU's from 386 onwards. 2020-03-29 18:12:43 +02:00
anabate123
2bfa946244 Added more speeds to Celeron (Slot 1/Socket 370) 
What would preliminary Mendocino emulation be without the remaining speeds?
 2020-03-26 16:59:43 -04:00
nerd73
51bbebbfa3 Changes to the IBM 386/486 and RapidCAD CPUs 
- Disabled the 'is486' flag and moved them to 386 timings
- Disabled cache on startup, enable-able later
- RapidCAD fixes (permanently disable L1, correct EDX reset)
 2020-03-25 18:02:25 -06:00
tiseno100
b1a421a2e9 Incorrect Encoding. Fixed 2020-03-25 12:31:54 +02:00
tiseno100
1f6d05f637 Added the Packard Bell Bora Pro + Celeron changes 
Now Slot1 motherboards can access the Celeron processors at the Intel/PGA370 category
Added the Packard Bell Bora Pro. A 440ZX based AMI board. It's just a MSI 6168 with the AMI PB OEM BIOS slapped in it. It reports excessive amounts of RAM and also looks for an SDRAM serial(which is not a huge deal).

Roms can be found on the roms PR
 2020-03-25 12:22:51 +02:00
Daniel Gurney
0c509fd551 Remove version tree-wide 2020-03-25 00:46:02 +02:00
OBattler
63b4cfc4ce Fixed dynarec_ops_3DNOW. 2020-03-24 02:42:52 +01:00
OBattler
1ff55cdf10 Fixed the table of the 486's. 2020-03-23 23:41:20 +01:00
nerd73
c007121062 Merge branch 'temp' into temp 2020-03-23 16:06:32 -06:00
OBattler
43f2bb849b Merge branch 'temp' into temp 2020-03-23 22:02:52 +01:00
OBattler
6219cbd31a Overdoze's 486 CPUID changes. 2020-03-23 21:14:34 +01:00
nerd73
169bd9bdab Make everything compile correctly 
Everything should compile fine now.
 2020-03-23 13:05:44 -06:00
nerd73
1ab21acd20 Interpreter-only 3DNow for old dynarec 2020-03-22 19:59:01 -06:00
nerd73
172f85ad40 Implemented MSRs 2020-03-21 23:42:01 -06:00
tiseno100
0d945fbf47 Added the ECS P6BXT-A+ 2020-03-21 10:04:11 +02:00
RichardG867
14935da701 Fix build with new dynarec disabled 2020-03-20 21:21:37 -03:00
nerd73
111d82fa0c Preliminary VIA Cyrix III emulation 
This adds preliminary emulation of the first-gen Samuel core, used in the VIA Cyrix III CPU, at clock speeds from 66 to 700 MHz. This also moves the 440BX emulation out of the dev-branch.

Things working:
- CPUID
- Windows 98SE
- Timings seem identical between WinChip/W2's integer section and this

Things left to do:
- 3DNow on old dynarec
- Half-speed FPU (currently simulated with WinChip 1 timings instead of WinChip 2)
 2020-03-01 15:06:35 -07:00
OBattler
5c4542283d Disabled some excess logging. 2020-03-01 00:53:38 +01:00
OBattler
ed6e8ffb77 Fixed CPUID's for low-clocked Klamath and Deschutes Pentium II's. 2020-03-01 00:48:32 +01:00
OBattler
490c04fcae Current WIP code. 2020-02-29 19:12:23 +01:00