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https://github.com/86Box/86Box.git
synced 2026-02-24 02:18:20 -07:00
Don't flip x/y coordinates and w/h of rectangles.
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@@ -1442,6 +1442,7 @@ extern nv3_t* nv3;
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void* nv3_init(const device_t *info);
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void nv3_close(void* priv);
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void nv3_speed_changed(void *priv);
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void nv3_recalc_timings(svga_t* svga);
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void nv3_force_redraw(void* priv);
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// Memory Mapping
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@@ -44,8 +44,9 @@ void nv3_class_007_method(uint32_t param, uint32_t method_id, nv3_ramin_context_
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// If the size is submitted, render it.
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if (method_id & 0x04)
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{
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nv3->pgraph.rectangle.size[index].w = (param >> 16) & 0xFFFF;
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nv3->pgraph.rectangle.size[index].h = param & 0xFFFF;
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nv3->pgraph.rectangle.size[index].w = param & 0xFFFF;
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nv3->pgraph.rectangle.size[index].h = (param >> 16) & 0xFFFF;
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nv_log("Rect%d Size=%d,%d\n", index, nv3->pgraph.rectangle.size[index].w, nv3->pgraph.rectangle.size[index].h);
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@@ -53,8 +54,9 @@ void nv3_class_007_method(uint32_t param, uint32_t method_id, nv3_ramin_context_
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}
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else // position
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{
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nv3->pgraph.rectangle.position[index].x = (param >> 16) & 0xFFFF;
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nv3->pgraph.rectangle.position[index].y = param & 0xFFFF;
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nv3->pgraph.rectangle.position[index].x = param & 0xFFFF;
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nv3->pgraph.rectangle.position[index].y = (param >> 16) & 0xFFFF;
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nv_log("Rect%d Position=%d,%d\n", index, nv3->pgraph.rectangle.position[index].x, nv3->pgraph.rectangle.position[index].y);
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}
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@@ -488,22 +488,24 @@ void nv3_recalc_timings(svga_t* svga)
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// i don't we should force the top 2 bits to 1...
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// required for VESA resolutions, force parameters higher
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if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDT10)) svga->vtotal += 0x400;
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if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDE10)) svga->dispend += 0x400;
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if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VRS10)) svga->vblankstart += 0x400;
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if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VBS10)) svga->vsyncstart += 0x400;
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if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_HBE6)) svga->hdisp += 0x400;
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if (svga->crtc[NV3_CRTC_REGISTER_HEB] & 0x01)
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svga->hdisp += 0x100; // large screen bit
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// Set the pixel mode
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switch (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 0x03)
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{
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///0x0 is VGA textmode
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case NV3_CRTC_REGISTER_PIXELMODE_8BPP:
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svga->bpp = 8;
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svga->lowres = 0;
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svga->map8 = svga->pallook;
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svga->render = svga_render_8bpp_highres;
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break;
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case NV3_CRTC_REGISTER_PIXELMODE_16BPP:
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@@ -703,14 +705,14 @@ void nv3_svga_out(uint16_t addr, uint8_t val, void* priv)
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Additionally only do it if the value actually changed*/
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if (old_value != val)
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{
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// Thx to Fuel who basically wrote all the SVGA compatibility code already (although I fixed some issues), because VGA is boring
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// Thx to Fuel who basically wrote most of the SVGA compatibility code already (although I fixed some issues), because VGA is boring
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// and in the words of an ex-Rendition/3dfx/NVIDIA engineer, "VGA was basically an undocumented bundle of steaming you-know-what.
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// And it was essential that any cores the PC 3D startups acquired had to work with all the undocumented modes and timing tweaks (mode X, etc.)"
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if (nv3->nvbase.svga.crtcreg < 0xE
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&& nv3->nvbase.svga.crtcreg > 0x10)
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{
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nv3->nvbase.svga.fullchange = changeframecount;
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svga_recalctimings(&nv3->nvbase.svga);
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nv3_recalc_timings(&nv3->nvbase.svga);
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}
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}
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@@ -172,7 +172,7 @@ void nv3_render_pixel(nv3_position_16_t position, uint32_t color, nv3_grobj_t gr
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TODO: MOVE TO BPIXEL DEPTH or GROBJ0 to determine this, once we figure out how to get the bpixel depth.
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*/
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uint32_t src = 0, dst = 0;
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switch (framebuffer_bpp)
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@@ -384,5 +384,4 @@ void nv3_pramdac_write(uint32_t address, uint32_t value)
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{
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nv_log(": Unknown register write (address=0x%08x)\n", address);
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}
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}
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