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Major video changes of the day (October 3rd, 2024)

Browse Source 
8514/A changes:
1. Correct interlaced display resolution.
2. Added a limit to cursor coordinates.
3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS.
4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping).

Cirrus related:
1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual).

IBM VGA:
1. Built-in/option rom-less VGA don't need the "available" flag.

ATI Mach8/32:
1. As with 8514/A, corrected interlaced display.

XGA-1/-2:
1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs.
2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init.
3. The Memory Mapped R/W sides now account for instance in their address range.
4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading.
5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT.
6. More logs when enabled to see any future bugs.
This commit is contained in:
TC1995
2024-10-03 14:56:23 +02:00
parent 8899b1411b
commit f102fee497
12 changed files with 513 additions and 414 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/include/86box/vid_8514a.h
View File

@@ -41,6 +41,8 @@ typedef union {
typedef struct ibm8514_t {
rom_t bios_rom;
rom_t bios_rom2;
rom_t bios_rom3;
hwcursor8514_t hwcursor;
hwcursor8514_t hwcursor_latch;
uint8_t pos_regs[8];

8
src/include/86box/vid_svga.h
View File

@@ -171,9 +171,11 @@ typedef struct svga_t {
pc_timer_t timer;
pc_timer_t timer8514;
pc_timer_t timer_xga;
double clock;
double clock8514;
double clock_xga;
double multiplier;
@@ -319,9 +321,13 @@ extern void ati8514_pos_write(uint16_t port, uint8_t val, void *priv);
extern void ati8514_init(svga_t *svga, void *ext8514, void *dev8514);
#endif
extern void xga_poll(void *priv, svga_t *svga);
extern void xga_write_test(uint32_t addr, uint8_t val, void *priv);
extern uint8_t xga_read_test(uint32_t addr, void *priv);
extern void xga_poll(void *priv);
extern void xga_recalctimings(svga_t *svga);
extern uint32_t svga_decode_addr(svga_t *svga, uint32_t addr, int write);
extern int svga_init(const device_t *info, svga_t *svga, void *priv, int memsize,
void (*recalctimings_ex)(struct svga_t *svga),
uint8_t (*video_in)(uint16_t addr, void *priv),

6
src/include/86box/vid_vga.h
View File

@@ -28,9 +28,7 @@ typedef struct vga_t {
rom_t bios_rom;
} vga_t;
static video_timings_t timing_vga = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 };
void vga_out(uint16_t addr, uint8_t val, void *priv);
uint8_t vga_in(uint16_t addr, void *priv);
extern void vga_out(uint16_t addr, uint8_t val, void *priv);
extern uint8_t vga_in(uint16_t addr, void *priv);
#endif /*VIDEO_VGA_H*/

11
src/include/86box/vid_xga.h
View File

@@ -31,10 +31,12 @@ typedef struct xga_hwcursor_t {
} xga_hwcursor_t;
typedef struct xga_t {
mem_mapping_t membios_mapping;
mem_mapping_t memio_mapping;
mem_mapping_t linear_mapping;
mem_mapping_t video_mapping;
rom_t bios_rom;
rom_t membios_rom;
rom_t vga_bios_rom;
xga_hwcursor_t hwcursor;
xga_hwcursor_t hwcursor_latch;
@@ -47,8 +49,8 @@ typedef struct xga_t {
uint8_t pos_regs[8];
uint8_t disp_addr;
uint8_t dac_mask;
uint8_t dac_status;
uint8_t dac_mask;
uint8_t dac_status;
uint8_t cfg_reg;
uint8_t instance;
uint8_t op_mode;
@@ -87,6 +89,8 @@ typedef struct xga_t {
uint8_t instance_isa;
uint8_t instance_num;
uint8_t ext_mem_addr;
uint8_t vga_post;
uint8_t addr_test;
uint8_t *vram;
uint8_t *changedvram;
@@ -167,6 +171,9 @@ typedef struct xga_t {
uint32_t write_bank;
uint32_t px_map_base;
uint32_t pallook[512];
uint32_t bios_diag;
PALETTE xgapal;
uint64_t dispontime;
uint64_t dispofftime;

72
src/video/vid_8514a.c
View File

@@ -44,8 +44,6 @@
#ifdef ATI_8514_ULTRA
#define BIOS_MACH8_ROM_PATH "roms/video/mach8/11301113140.BIN"
static video_timings_t timing_8514ultra_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 };
#endif
static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *priv);
@@ -2407,9 +2405,9 @@ rect_fill_pix:
dev->accel.sx += (dev->accel.cur_x & 3);
}
if (dev->accel.cmd & 0x20) {
if (dev->accel.cmd & 0x20)
dev->accel.cx -= (dev->accel.sx) + 1;
} else
else
dev->accel.cx += (dev->accel.sx) + 1;
if (dev->accel.cmd & 2) {
@@ -3006,9 +3004,7 @@ rect_fill:
else
dev->accel.oldcy = dev->accel.cy - 1;
dev->accel.oldcx = 0;
ibm8514_log("Polygon Boundary activated=%04x, len=%d, cur(%d,%d), frgdmix=%02x, err=%d, clipping: l=%d, r=%d, t=%d, b=%d, pixcntl=%02x.\n", dev->accel.cmd, dev->accel.sy, dev->accel.cur_x_nolimit, dev->accel.cy, dev->accel.frgd_mix & 0x1f, dev->accel.err_term, dev->accel.clip_left, clip_r, dev->accel.clip_top, clip_b, compare_mode, dev->accel.multifunc[0x0a]);
ibm8514_log("Polygon Boundary activated=%04x, len=%d, cur(%d,%d), frgdmix=%02x, err=%d, clipping: l=%d, r=%d, t=%d, b=%d, pixcntl=%02x.\n", dev->accel.cmd, dev->accel.sy, dev->accel.cx, dev->accel.cy, dev->accel.frgd_mix & 0x1f, dev->accel.err_term, dev->accel.multifunc[2], dev->accel.multifunc[4], dev->accel.clip_top, clip_b, dev->accel.multifunc[0x0a]);
if (ibm8514_cpu_src(svga)) {
dev->data_available = 0;
@@ -3122,10 +3118,8 @@ rect_fill:
}
} else {
while (count-- && (dev->accel.sy >= 0)) {
if (dev->accel.cx < 0)
dev->accel.cx = 0;
if (dev->accel.cy < 0)
dev->accel.cy = 0;
if (dev->accel.cx < dev->accel.clip_left)
dev->accel.cx = dev->accel.clip_left;
if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
@@ -3155,12 +3149,8 @@ rect_fill:
if ((dev->accel.cmd & 0x14) == 0x14) {
if (dev->accel.sy) {
if (dev->accel.cmd & 0x40) {
if (dev->accel.oldcy != dev->accel.cy) {
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
} else {
if (dev->accel.oldcy != dev->accel.cy) {
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
}
}
}
}
@@ -3178,6 +3168,7 @@ rect_fill:
break;
if (dev->accel.cmd & 0x40) {
dev->accel.oldcy = dev->accel.cy;
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
@@ -4159,12 +4150,12 @@ ibm8514_poll(void *priv)
if (dev->on[0] || dev->on[1]) {
ibm8514_log("ON!\n");
if (!dev->linepos) {
if ((dev->displine == dev->hwcursor_latch.y) && dev->hwcursor_latch.ena) {
if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) {
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff;
dev->hwcursor_oddeven = 0;
}
if ((dev->displine == (dev->hwcursor_latch.y + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1);
dev->hwcursor_oddeven = 1;
}
@@ -4195,7 +4186,7 @@ ibm8514_poll(void *priv)
if (dev->hwcursor_on) {
if (svga->hwcursor_draw)
svga->hwcursor_draw(svga, dev->displine + svga->y_add);
svga->hwcursor_draw(svga, (dev->displine + svga->y_add + ((dev->hwcursor_latch.y >= 0) ? 0 : dev->hwcursor_latch.y)) & 2047);
dev->hwcursor_on--;
if (dev->hwcursor_on && dev->interlace)
dev->hwcursor_on--;
@@ -4333,15 +4324,15 @@ ibm8514_recalctimings(svga_t *svga)
else
svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
if (dev->interlace)
dev->dispend >>= 1;
if (dev->dispend == 766)
dev->dispend += 2;
if (dev->dispend == 478)
dev->dispend += 2;
if (dev->interlace)
dev->dispend >>= 1;
dev->pitch = 1024;
dev->rowoffset = 0x80;
svga->map8 = dev->pallook;
@@ -4405,6 +4396,10 @@ ibm8514_mca_reset(void *priv)
static void *
ibm8514_init(const device_t *info)
{
#ifdef ATI_8514_ULTRA
uint32_t bios_addr = 0;
#endif
if (svga_get_pri() == NULL)
return NULL;
@@ -4426,6 +4421,7 @@ ibm8514_init(const device_t *info)
#ifdef ATI_8514_ULTRA
dev->extensions = device_get_config_int("extensions");
bios_addr = device_get_config_hex20("bios_addr");
switch (dev->extensions) {
case 1:
@@ -4446,10 +4442,14 @@ ibm8514_init(const device_t *info)
} else {
rom_init(&dev->bios_rom,
BIOS_MACH8_ROM_PATH,
0xd0000, 0x2000, 0x1fff,
bios_addr, 0x1000, 0xfff,
0, MEM_MAPPING_EXTERNAL);
rom_init(&dev->bios_rom2,
BIOS_MACH8_ROM_PATH,
bios_addr + 0x1000, 0x800, 0x7ff,
0x1000, MEM_MAPPING_EXTERNAL);
ati_eeprom_load(&mach->eeprom, "ati8514.nvr", 0);
dev->bios_addr = dev->bios_rom.mapping.base;
mach->accel.scratch0 = (((bios_addr >> 7) - 0x1000) >> 4);
}
ati8514_init(svga, svga->ext8514, svga->dev8514);
break;
@@ -4538,6 +4538,30 @@ static const device_config_t ext8514_config[] = {
}
}
},
{
.name = "bios_addr",
.description = "BIOS address",
.type = CONFIG_HEX20,
.default_string = "",
.default_int = 0xc8000,
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "C800h", .value = 0xc8000 },
{ .description = "CA00h", .value = 0xca000 },
{ .description = "CC00h", .value = 0xcc000 },
{ .description = "CE00h", .value = 0xce000 },
{ .description = "D000h", .value = 0xd0000 },
{ .description = "D200h", .value = 0xd2000 },
{ .description = "D400h", .value = 0xd4000 },
{ .description = "D600h", .value = 0xd6000 },
{ .description = "D800h", .value = 0xd8000 },
{ .description = "DA00h", .value = 0xda000 },
{ .description = "DC00h", .value = 0xdc000 },
{ .description = "DE00h", .value = 0xde000 },
{ .description = "" }
},
},
{
.type = CONFIG_END
}

35
src/video/vid_ati_mach8.c
View File

@@ -37,6 +37,7 @@
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_8514a.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/vid_ati_eeprom.h>
@@ -2478,11 +2479,13 @@ ati8514_recalctimings(svga_t *svga)
dev->dispend = dev->vdisp;
}
if (dev->accel.advfunc_cntl & 0x04) {
if (dev->accel.advfunc_cntl & 0x04)
svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0;
} else {
else
svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
}
if (dev->interlace)
dev->dispend >>= 1;
if (dev->dispend == 766)
dev->dispend += 2;
@@ -3456,7 +3459,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
static void
mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8514_t *dev)
{
if (port != 0x7aee && port != 0x7aef && port != 0x42e8 && port != 0x42e9 && port != 0x46e8 && port != 0x46e9)
if (port != 0x7aee && port != 0x7aef && port != 0x42e8 && port != 0x42e9)
mach_log("[%04X:%08X]: Port CALL OUT=%04x, val=%02x.\n", CS, cpu_state.pc, port, val);
switch (port) {
@@ -4290,26 +4293,6 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
case 0x52ee:
case 0x52ef:
READ8(port, mach->accel.scratch0);
#ifdef ATI_8514_ULTRA
if (mach->mca_bus) {
if (!(port & 1)) {
if (svga->ext8514 != NULL)
temp = dev->pos_regs[4];
} else {
if (svga->ext8514 != NULL)
temp = dev->pos_regs[5];
}
} else {
if (svga->ext8514 != NULL) {
temp = ((dev->bios_addr >> 7) - 0x1000) >> 4;
if (port & 1) {
temp &= ~0x80;
temp |= 0x01;
}
} else
temp = 0x00;
}
#endif
break;
case 0x56ee:
@@ -4368,7 +4351,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
default:
break;
}
if (port != 0x62ee && port != 0x62ef && port != 0x42e8 && port != 0x42e9)
if (port != 0x62ee && port != 0x62ef && port != 0x42e8 && port != 0x42e9 && port != 0x02e8 && port != 0x02e9)
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
return temp;
@@ -4641,6 +4624,7 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t
dev->vram[addr] = val;
return;
} else {
xga_write_test(addr, val, svga);
addr = mach32_decode_addr(svga, addr, 1);
if (addr == 0xffffffff)
return;
@@ -4858,6 +4842,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga)
if (linear) {
return dev->vram[addr & dev->vram_mask];
} else {
(void) xga_read_test(addr, svga);
addr = mach32_decode_addr(svga, addr, 0);
if (addr == 0xffffffff)
return 0xff;

31
src/video/vid_cl54xx.c
View File

@@ -37,6 +37,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/plat_fallthrough.h>
@@ -2195,6 +2196,8 @@ gd54xx_write(uint32_t addr, uint8_t val, void *priv)
return;
}
xga_write_test(addr, val, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
svga_write_linear(addr, val, svga);
@@ -2212,6 +2215,9 @@ gd54xx_writew(uint32_t addr, uint16_t val, void *priv)
return;
}
xga_write_test(addr, val, svga);
xga_write_test(addr + 1, val >> 8, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
@@ -2237,6 +2243,11 @@ gd54xx_writel(uint32_t addr, uint32_t val, void *priv)
return;
}
xga_write_test(addr, val, svga);
xga_write_test(addr + 1, val >> 8, svga);
xga_write_test(addr + 2, val >> 16, svga);
xga_write_test(addr + 3, val >> 24, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
@@ -2762,6 +2773,8 @@ gd54xx_read(uint32_t addr, void *priv)
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
return gd54xx_mem_sys_dest_read(gd54xx, 0);
(void) xga_read_test(addr, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
return svga_read_linear(addr, svga);
@@ -2780,6 +2793,9 @@ gd54xx_readw(uint32_t addr, void *priv)
return ret;
}
(void) xga_read_test(addr, svga);
(void) xga_read_test(addr + 1, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
return svga_readw_linear(addr, svga);
@@ -2800,6 +2816,11 @@ gd54xx_readl(uint32_t addr, void *priv)
return ret;
}
(void) xga_read_test(addr, svga);
(void) xga_read_test(addr + 1, svga);
(void) xga_read_test(addr + 2, svga);
(void) xga_read_test(addr + 3, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
return svga_readl_linear(addr, svga);
@@ -3826,6 +3847,16 @@ cl_pci_read(UNUSED(int func), int addr, void *priv)
ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 24) & 0xff) : 0x00;
break;
case 0x2c:
ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffc] : 0x00;
break;
case 0x2d:
ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffd] : 0x00;
break;
case 0x2e:
ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffe] : 0x00;
break;
case 0x30:
ret = (gd54xx->pci_regs[0x30] & 0x01); /*BIOS ROM address*/
break;

20
src/video/vid_et4000.c
View File

@@ -125,15 +125,6 @@ et4000_in(uint16_t addr, void *priv)
addr ^= 0x60;
switch (addr) {
case 0x3c2:
if (dev->type == ET4000_TYPE_MCA) {
if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
return 0;
else
return 0x10;
}
break;
case 0x3c5:
if ((svga->seqaddr & 0xf) == 7)
return svga->seqregs[svga->seqaddr & 0xf] | 4;
@@ -770,12 +761,16 @@ et4000_mca_write(int port, uint8_t val, void *priv)
/* Save the MCA register value. */
et4000->pos_regs[port & 7] = val;
mem_mapping_disable(&et4000->bios_rom.mapping);
if (et4000->pos_regs[2] & 1)
mem_mapping_enable(&et4000->bios_rom.mapping);
}
static uint8_t
et4000_mca_feedb(UNUSED(void *priv))
{
return 1;
et4000_t *et4000 = (et4000_t *) priv;
return et4000->pos_regs[2] & 1;
}
static void *
@@ -889,7 +884,10 @@ et4000_init(const device_t *info)
dev->vram_mask = dev->vram_size - 1;
rom_init(&dev->bios_rom, fn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (dev->type == ET4000_TYPE_MCA)
mem_mapping_disable(&dev->bios_rom.mapping);
dev->svga.translate_address = get_et4000_addr;

15
src/video/vid_ht216.c
View File

@@ -33,6 +33,7 @@
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/video.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/plat_fallthrough.h>
@@ -1217,6 +1218,8 @@ ht216_write(uint32_t addr, uint8_t val, void *priv)
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
xga_write_test(addr, val, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
@@ -1238,6 +1241,9 @@ ht216_writew(uint32_t addr, uint16_t val, void *priv)
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
xga_write_test(addr, val, svga);
xga_write_test(addr + 1, val >> 8, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
@@ -1261,6 +1267,11 @@ ht216_writel(uint32_t addr, uint32_t val, void *priv)
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
xga_write_test(addr, val, svga);
xga_write_test(addr + 1, val >> 8, svga);
xga_write_test(addr + 2, val >> 16, svga);
xga_write_test(addr + 3, val >> 24, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
@@ -1422,9 +1433,11 @@ static uint8_t
ht216_read(uint32_t addr, void *priv)
{
ht216_t *ht216 = (ht216_t *) priv;
const svga_t *svga = &ht216->svga;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
(void) xga_read_test(addr, svga);
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->read_banks[(addr >> 15) & 1];

94
src/video/vid_svga.c
View File

@@ -559,11 +559,12 @@ svga_set_ramdac_type(svga_t *svga, int type)
}
if (xga_active && xga) {
if (svga->ramdac_type == RAMDAC_8BIT)
xga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b);
else
xga->pallook[c] = makecol32((svga->vgapal[c].r & 0x3f) * 4,
(svga->vgapal[c].g & 0x3f) * 4,
(svga->vgapal[c].b & 0x3f) * 4);
xga->pallook[c] = makecol32(xga->xgapal[c].r, xga->xgapal[c].g, xga->xgapal[c].b);
else {
xga->pallook[c] = makecol32((xga->xgapal[c].r & 0x3f) * 4,
(xga->xgapal[c].g & 0x3f) * 4,
(xga->xgapal[c].b & 0x3f) * 4);
}
}
if (svga->ramdac_type == RAMDAC_8BIT)
svga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b);
@@ -669,11 +670,11 @@ svga_recalctimings(svga_t *svga)
}
if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/
if (svga->seqregs[1] & 8) { /*40 column*/
if (svga->seqregs[1] & 8) { /*40 column*/
svga->render = svga_render_text_40;
} else {
} else
svga->render = svga_render_text_80;
}
svga->hdisp_old = svga->hdisp;
} else {
svga->hdisp_old = svga->hdisp;
@@ -1036,7 +1037,7 @@ svga_poll(void *priv)
if (!svga->override) {
if (xga_active && xga && xga->on) {
if ((xga->disp_cntl_2 & 7) >= 2) {
xga_poll(xga, svga);
xga_poll(svga);
return;
}
}
@@ -1407,7 +1408,7 @@ svga_close(svga_t *svga)
svga_pri = NULL;
}
static uint32_t
uint32_t
svga_decode_addr(svga_t *svga, uint32_t addr, int write)
{
int memory_map_mode = (svga->gdcreg[6] >> 2) & 3;
@@ -1448,7 +1449,6 @@ static __inline void
svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
{
svga_t *svga = (svga_t *) priv;
xga_t *xga = (xga_t *) svga->xga;
int writemask2 = svga->writemask;
int reset_wm = 0;
latch_t vall;
@@ -1462,40 +1462,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
cycles -= svga->monitor->mon_video_timing_write_b;
if (!linear) {
if (xga_active && xga) {
if (((xga->op_mode & 7) >= 4) && (xga->aperture_cntl >= 1)) {
if (val == 0xa5) { /*Memory size test of XGA*/
xga->test = val;
if (addr == 0xa0001)
xga->a5_test = 1;
else if (addr == 0xafffe)
xga->a5_test = 2;
xga->on = 0;
vga_on = 1;
xga->disp_cntl_2 = 0;
svga_log("XGA test1 addr = %05x.\n", addr);
return;
} else if (val == 0x5a) {
xga->test = val;
xga->on = 0;
vga_on = 1;
xga->disp_cntl_2 = 0;
svga_log("XGA test2 addr = %05x.\n", addr);
return;
} else if ((addr == 0xa0000) || (addr == 0xa0010)) {
addr += xga->write_bank;
xga->vram[addr & xga->vram_mask] = val;
svga_log("XGA Linear endian reverse write, val = %02x, addr = %05x, banked mask = %04x.\n", val, addr, svga->banked_mask);
if (!xga->a5_test)
xga->linear_endian_reverse = 1;
return;
}
} else {
xga->on = 0;
vga_on = 1;
}
}
xga_write_test(addr, val, svga);
addr = svga_decode_addr(svga, addr, 1);
if (addr == 0xffffffff)
@@ -1670,12 +1637,11 @@ static __inline uint8_t
svga_read_common(uint32_t addr, uint8_t linear, void *priv)
{
svga_t *svga = (svga_t *) priv;
xga_t *xga = (xga_t *) svga->xga;
uint32_t latch_addr = 0;
int readplane = svga->readplane;
uint8_t count;
uint8_t temp;
uint8_t ret;
uint8_t ret = 0x00;
if (svga->adv_flags & FLAG_ADDR_BY8)
readplane = svga->gdcreg[4] & 7;
@@ -1683,39 +1649,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *priv)
cycles -= svga->monitor->mon_video_timing_read_b;
if (!linear) {
if (xga_active && xga) {
if (((xga->op_mode & 7) >= 4) && (xga->aperture_cntl >= 1)) {
if (xga->test == 0xa5) { /*Memory size test of XGA*/
if (addr == 0xa0001) {
ret = xga->test;
xga->on = 1;
vga_on = 0;
} else if ((addr == 0xa0000) && (xga->a5_test == 1)) { /*This is required by XGAKIT to pass the memory test*/
svga_log("A5 test bank = %x.\n", addr);
addr += xga->read_bank;
ret = xga->vram[addr & xga->vram_mask];
} else {
ret = xga->test;
xga->on = 1;
vga_on = 0;
}
svga_log("A5 read: XGA ON = %d, addr = %05x, ret = %02x, test1 = %x.\n", xga->on, addr, ret, xga->a5_test);
return ret;
} else if (xga->test == 0x5a) {
ret = xga->test;
xga->on = 1;
vga_on = 0;
svga_log("5A read: XGA ON = %d.\n", xga->on);
return ret;
} else if ((addr == 0xa0000) || (addr == 0xa0010)) {
addr += xga->read_bank;
return xga->vram[addr & xga->vram_mask];
}
} else {
xga->on = 0;
vga_on = 1;
}
}
(void) xga_read_test(addr, svga);
addr = svga_decode_addr(svga, addr, 0);
if (addr == 0xffffffff)

5
src/video/vid_vga.c
View File

@@ -31,6 +31,7 @@
#include <86box/vid_svga.h>
#include <86box/vid_vga.h>
static video_timings_t timing_vga = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 };
static video_timings_t timing_ps1_svga_isa = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 };
static video_timings_t timing_ps1_svga_mca = { .type = VIDEO_MCA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 };
@@ -207,7 +208,7 @@ const device_t ps1vga_device = {
.init = ps1vga_init,
.close = vga_close,
.reset = NULL,
{ .available = vga_available },
{ .available = NULL },
.speed_changed = vga_speed_changed,
.force_redraw = vga_force_redraw,
.config = NULL
@@ -221,7 +222,7 @@ const device_t ps1vga_mca_device = {
.init = ps1vga_init,
.close = vga_close,
.reset = NULL,
{ .available = vga_available },
{ .available = NULL },
.speed_changed = vga_speed_changed,
.force_redraw = vga_force_redraw,
.config = NULL

628
src/video/vid_xga.c
View File

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