Merge remote-tracking branch 'upstream/master' into feature/ich2

.github/workflows/cmake.yml

@@ -30,6 +30,9 @@ jobs:
 
     runs-on: windows-2022
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     defaults:
       run:
         shell: msys2 {0}
@@ -106,6 +109,11 @@ jobs:
 
       - name: Checkout repository
         uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
 
       - name: Configure CMake
         run: >-
@@ -117,7 +125,16 @@ jobs:
           -D STATIC_BUILD=${{ matrix.ui.static }}
 
       - name: Build
-        run: cmake --build build
+        run: |
+          cmake --build build
+
+      - name: Run sonar-scanner
+        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
 
       - name: Generate package
         run: cmake --install build
@@ -130,10 +147,12 @@ jobs:
 
   llvm-windows:
     name: "Windows vcpkg/LLVM (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.target.name }})"
+    if: 0
 
     runs-on: windows-2022
 
     env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
       VCPKG_BINARY_SOURCES: 'clear;nuget,GitHub,readwrite'
 
     strategy:
@@ -209,6 +228,11 @@ jobs:
 
       - name: Checkout repository
         uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
 
       - name: Configure CMake
         run: >
@@ -229,13 +253,24 @@ jobs:
 
       - name: Reconfigure CMake
         if: matrix.ui.qt == 'on'
-        run: cmake clean build
+        run: |
+          cmake clean build
 
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-win-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+#        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
 
       - name: Generate package
-        run: cmake --install build
+        run: |
+          cmake --install build
 
       - name: Upload artifact
         uses: actions/upload-artifact@v3
@@ -248,6 +283,9 @@ jobs:
 
     runs-on: ubuntu-22.04
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     strategy:
       fail-fast: true
       matrix:
@@ -295,6 +333,11 @@ jobs:
 
       - name: Checkout repository
         uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
 
       - name: Configure CMake
         run: >-
@@ -305,10 +348,20 @@ jobs:
           -D QT=${{ matrix.ui.qt }}
 
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+#        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
 
       - name: Generate package
-        run: cmake --install build
+        run: |
+          cmake --install build
 
       - name: Upload artifact
         uses: actions/upload-artifact@v3
@@ -321,6 +374,9 @@ jobs:
 
     runs-on: macos-11
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     strategy:
       fail-fast: true
       matrix:
@@ -362,6 +418,11 @@ jobs:
 
       - name: Checkout repository
         uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
 
       - name: Configure CMake
         run: >-
@@ -375,10 +436,20 @@ jobs:
           -D OpenAL_ROOT=$(brew --prefix openal-soft)
 
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+#        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
 
       - name: Generate package
-        run: cmake --install build
+        run: |
+          cmake --install build
 
       - name: Upload artifact
         uses: actions/upload-artifact@v3

sonar-project.properties

@@ -0,0 +1,12 @@
+sonar.projectKey=86Box_86Box
+sonar.organization=86box
+
+# This is the name and version displayed in the SonarCloud UI.
+#sonar.projectName=86Box
+#sonar.projectVersion=1.0
+
+# Path is relative to the sonar-project.properties file. Replace "\" by "/" on Windows.
+#sonar.sources=.
+
+# Encoding of the source code. Default is default system encoding
+#sonar.sourceEncoding=UTF-8

src/86box.c

@@ -404,19 +404,25 @@ pc_log(const char *fmt, ...)
 int
 pc_init(int argc, char *argv[])
 {
-    char      *ppath = NULL, *rpath = NULL;
-    char      *cfg = NULL, *p;
-    char       temp[2048], *fn[FDD_NUM] = { NULL };
-    char       drive = 0, *temp2 = NULL;
+    char      *ppath = NULL;
+    char      *rpath = NULL;
+    char      *cfg = NULL;
+    char      *p;
+    char       temp[2048];
+    char      *fn[FDD_NUM] = { NULL };
+    char       drive = 0;
+    char      *temp2 = NULL;
     struct tm *info;
     time_t     now;
-    int        c, lvmp = 0;
+    int        c;
+    int        lvmp = 0;
     int        i;
 #ifdef ENABLE_NG
     int ng = 0;
 #endif
 #ifdef _WIN32
-    uint32_t *uid, *shwnd;
+    uint32_t *uid;
+    uint32_t *shwnd;
 #endif
     uint32_t lang_init = 0;
 
@@ -493,7 +499,7 @@ usage:
             printf("-V or --vmname name  - overrides the name of the running VM\n");
             printf("-Z or --lastvmpath   - the last parameter is VM path rather than config\n");
             printf("\nA config file can be specified. If none is, the default file will be used.\n");
-            return (0);
+            return 0;
         } else if (!strcasecmp(argv[c], "--lastvmpath") || !strcasecmp(argv[c], "-Z")) {
             lvmp = 1;
         } else if (!strcasecmp(argv[c], "--dumpcfg") || !strcasecmp(argv[c], "-O")) {
@@ -585,7 +591,7 @@ usage:
             /* some (undocumented) test function here.. */
 
             /* .. and then exit. */
-            return (0);
+            return 0;
 #ifdef USE_INSTRUMENT
         } else if (!strcasecmp(argv[c], "--instrument")) {
             if ((c + 1) == argc)
@@ -786,7 +792,7 @@ usage:
     gdbstub_init();
 
     /* All good! */
-    return (1);
+    return 1;
 }
 
 void
@@ -812,7 +818,8 @@ pc_full_speed(void)
 int
 pc_init_modules(void)
 {
-    int     c, m;
+    int     c;
+    int     m;
     wchar_t temp[512];
     char    tempc[512];
 
@@ -846,7 +853,7 @@ pc_init_modules(void)
     }
     if (c == 0) {
         /* No usable ROMs found, aborting. */
-        return (0);
+        return 0;
     }
     pc_log("A total of %d ROM sets have been loaded.\n", c);
 
@@ -867,7 +874,7 @@ pc_init_modules(void)
         if (machine == -1) {
             fatal("No available machines\n");
             exit(-1);
-            return (0);
+            return 0;
         }
     }
 
@@ -890,7 +897,7 @@ pc_init_modules(void)
         if (gfxcard[0] == -1) {
             fatal("No available video cards\n");
             exit(-1);
-            return (0);
+            return 0;
         }
     }
 
@@ -933,7 +940,7 @@ pc_init_modules(void)
 
     machine_status_init();
 
-    return (1);
+    return 1;
 }
 
 void
@@ -1136,7 +1143,10 @@ pc_reset_hard_init(void)
 void
 update_mouse_msg(void)
 {
-    wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp;
+    wchar_t wcpufamily[2048];
+    wchar_t wcpu[2048];
+    wchar_t wmachine[2048];
+    wchar_t *wcp;
 
     mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1);
 
@@ -1176,8 +1186,6 @@ pc_reset_hard(void)
 void
 pc_close(thread_t *ptr)
 {
-    int i;
-
     /* Wait a while so things can shut down. */
     plat_delay_ms(200);
 
@@ -1205,7 +1213,7 @@ pc_close(thread_t *ptr)
 
     lpt_devices_close();
 
-    for (i = 0; i < FDD_NUM; i++)
+    for (uint8_t i = 0; i < FDD_NUM; i++)
         fdd_close(i);
 
 #ifdef ENABLE_808X_LOG
@@ -1305,7 +1313,10 @@ set_screen_size_monitor(int x, int y, int monitor_index)
 {
     int    temp_overscan_x = monitors[monitor_index].mon_overscan_x;
     int    temp_overscan_y = monitors[monitor_index].mon_overscan_y;
-    double dx, dy, dtx, dty;
+    double dx;
+    double dy;
+    double dtx;
+    double dty;
 
     /* Make sure we keep usable values. */
 #if 0

src/acpi.c

@@ -162,7 +162,7 @@ acpi_raise_smi(void *priv, int do_smi)
 
     if (dev->regs.glbctl & 0x01) {
         if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) {
-            if ((!dev->regs.smi_lock || !dev->regs.smi_active)) {
+            if (!dev->regs.smi_lock || !dev->regs.smi_active) {
                 if (do_smi)
                     smi_raise();
                 dev->regs.smi_active = 1;
@@ -188,7 +188,8 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
 {
     acpi_t  *dev = (acpi_t *) p;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -239,7 +240,8 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
 {
     acpi_t  *dev = (acpi_t *) p;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -306,7 +308,8 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
 {
     acpi_t  *dev = (acpi_t *) p;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -507,7 +510,8 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
 {
     acpi_t  *dev = (acpi_t *) p;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0xff;
     shift16 = (addr & 1) << 3;
@@ -659,7 +663,8 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
 {
     acpi_t  *dev = (acpi_t *) p;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0x7f;
     shift16 = (addr & 1) << 3;
@@ -763,7 +768,8 @@ static void
 acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, sus_typ;
+    int     shift16;
+    int     sus_typ;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -843,7 +849,8 @@ static void
 acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -914,7 +921,8 @@ static void
 acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -1130,7 +1138,8 @@ static void
 acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    int     shift16;
+    int     shift32;
 
     addr &= 0xff;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -1223,7 +1232,8 @@ static void
 acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    int     shift16;
+    int     shift32;
 
     addr &= 0xff;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -1286,7 +1296,8 @@ static void
 acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
 {
     acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x7f;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -1849,7 +1860,6 @@ static void
 acpi_reset(void *priv)
 {
     acpi_t *dev = (acpi_t *) priv;
-    int     i;
 
     memset(&dev->regs, 0x00, sizeof(acpi_regs_t));
     dev->regs.gpireg[0] = 0xff;
@@ -1860,7 +1870,7 @@ acpi_reset(void *priv)
        Gigabyte GA-686BX:
        - Bit 1: CMOS battery low (active high) */
     dev->regs.gpireg[2] = dev->gpireg2_default;
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         dev->regs.gporeg[i] = dev->gporeg_default[i];
     if (dev->vendor == VEN_VIA_596B) {
         dev->regs.gpo_val = 0x7fffffff;

src/chipset/82c100.c

@@ -70,10 +70,9 @@ ct_82c100_log(const char *fmt, ...)
 static void
 ct_82c100_ems_pages_recalc(ct_82c100_t *dev)
 {
-    int      i;
     uint32_t page_base;
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         page_base = dev->ems_window_base + (i << 14);
         if ((i == 1) || (i == 2))
             page_base ^= 0xc000;
@@ -353,7 +352,6 @@ static void *
 ct_82c100_init(const device_t *info)
 {
     ct_82c100_t *dev;
-    uint32_t     i;
 
     dev = (ct_82c100_t *) malloc(sizeof(ct_82c100_t));
     memset(dev, 0x00, sizeof(ct_82c100_t));
@@ -367,7 +365,7 @@ ct_82c100_init(const device_t *info)
     io_sethandler(0x007e, 2,
                   ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev);
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         mem_mapping_add(&(dev->ems_mappings[i]), (i + 28) << 14, 0x04000,
                         mem_read_emsb, mem_read_emsw, NULL,
                         mem_write_emsb, mem_write_emsw, NULL,
@@ -379,7 +377,7 @@ ct_82c100_init(const device_t *info)
 
     device_add(&port_92_device);
 
-    return (dev);
+    return dev;
 }
 
 const device_t ct_82c100_device = {

src/chipset/ali1429.c

@@ -124,7 +124,9 @@ typedef struct
 static void
 ali1429_shadow_recalc(ali1429_t *dev)
 {
-    uint32_t base, i, can_write, can_read;
+    uint32_t base;
+    uint32_t can_write;
+    uint32_t can_read;
 
     shadowbios       = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
     shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
@@ -132,7 +134,7 @@ ali1429_shadow_recalc(ali1429_t *dev)
     can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
     can_read  = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xc0000 + (i << 15);
 
         if (dev->regs[0x13] & (1 << i))

src/chipset/ali1435.c

@@ -1,315 +1,317 @@
-/*
- * 86Box	A hypervisor and IBM PC system emulator that specializes in
- *		running old operating systems and software designed for IBM
- *		PC systems and compatibles from 1981 through fairly recent
- *		system designs based on the PCI bus.
- *
- *		Emulation of ALi M1435 chipset that acts as both the
- *		southbridge.
- *
- *
- *
- * Authors:	Miran Grca, <mgrca8@gmail.com>
- *
- *		Copyright 2020 Miran Grca.
- */
-#include <stdarg.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <wchar.h>
-#define HAVE_STDARG_H
-#include <86box/86box.h>
-#include <86box/device.h>
-#include <86box/io.h>
-#include <86box/apm.h>
-#include <86box/dma.h>
-#include <86box/mem.h>
-#include <86box/smram.h>
-#include <86box/pci.h>
-#include <86box/timer.h>
-#include <86box/pic.h>
-#include <86box/pit.h>
-#include <86box/port_92.h>
-#include <86box/hdc_ide.h>
-#include <86box/hdc.h>
-#include <86box/machine.h>
-#include <86box/chipset.h>
-#include <86box/spd.h>
-
-#define MEM_STATE_SHADOW_R 0x01
-#define MEM_STATE_SHADOW_W 0x02
-#define MEM_STATE_SMRAM    0x04
-
-typedef struct
-{
-    uint8_t index, cfg_locked,
-        regs[16], pci_regs[256];
-} ali1435_t;
-
-#define ENABLE_ALI1435_LOG 1
-#ifdef ENABLE_ALI1435_LOG
-int ali1435_do_log = ENABLE_ALI1435_LOG;
-
-static void
-ali1435_log(const char *fmt, ...)
-{
-    va_list ap;
-
-    if (ali1435_do_log) {
-        va_start(ap, fmt);
-        pclog_ex(fmt, ap);
-        va_end(ap);
-    }
-}
-#else
-#    define ali1435_log(fmt, ...)
-#endif
-
-/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter
-         when the most siginificant bit is set. We work around that by manipulating the
-         emulated PIC's ELCR register. */
-static void
-ali1435_update_irqs(ali1435_t *dev, int set)
-{
-    uint8_t val;
-    int     i, reg;
-    int     shift, irq;
-    int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-    pic_t  *temp_pic;
-
-    for (i = 0; i < 4; i++) {
-        reg   = 0x80 + (i >> 1);
-        shift = (i & 1) << 2;
-        val   = (dev->pci_regs[reg] >> shift) & 0x0f;
-        irq   = irq_map[val & 0x07];
-        if (irq == -1)
-            continue;
-        temp_pic = (irq >= 8) ? &pic2 : &pic;
-        irq &= 7;
-        if (set && (val & 0x08))
-            temp_pic->elcr |= (1 << irq);
-        else
-            temp_pic->elcr &= ~(1 << irq);
-    }
-}
-
-static void
-ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    int        irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-
-    ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val);
-
-    if (func > 0)
-        return;
-
-    if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b)))
-        return;
-
-    if ((addr >= 0x0f) && (addr < 0x30))
-        return;
-
-    if ((addr >= 0x34) && (addr < 0x40))
-        return;
-
-    switch (addr) {
-        /* Dummy PCI Config */
-        case 0x04:
-            dev->pci_regs[addr] = (val & 0x7f) | 0x07;
-            break;
-
-        case 0x05:
-            dev->pci_regs[addr] = (val & 0x01);
-            break;
-
-        /* Dummy PCI Status */
-        case 0x07:
-            dev->pci_regs[addr] &= ~(val & 0xb8);
-            break;
-
-        case 0x80:
-        case 0x81:
-            dev->pci_regs[addr] = val;
-            ali1435_update_irqs(dev, 0);
-            irq = irq_map[val & 0x07];
-            if (irq >= 0) {
-                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
-                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
-            } else {
-                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
-                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
-            }
-            irq = irq_map[(val >> 4) & 0x07];
-            if (irq >= 0) {
-                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
-                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
-            } else {
-                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
-                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
-            }
-            ali1435_update_irqs(dev, 1);
-            break;
-
-        default:
-            dev->pci_regs[addr] = val;
-            break;
-    }
-}
-
-static uint8_t
-ali1435_pci_read(int func, int addr, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    uint8_t    ret;
-
-    ret = 0xff;
-
-    if (func == 0)
-        ret = dev->pci_regs[addr];
-
-    ali1435_log("ali1435_read(%02X, %02X) = %02X\n", func, addr, ret);
-
-    return ret;
-}
-
-static void
-ali1435_write(uint16_t addr, uint8_t val, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-
-    switch (addr) {
-        case 0x22:
-            dev->index = val;
-            break;
-
-        case 0x23:
-            /* #ifdef ENABLE_ALI1435_LOG
-                            if (dev->index != 0x03)
-                                    ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
-            #endif */
-
-            if (dev->index == 0x03)
-                dev->cfg_locked = (val != 0x69);
-
-            if (!dev->cfg_locked) {
-                pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
-
-                switch (dev->index) {
-                    /* PCI Mechanism select? */
-                    case 0x00:
-                        dev->regs[dev->index] = val;
-                        pclog("PMC = %i\n", val != 0xc8);
-                        pci_set_pmc(val != 0xc8);
-                        break;
-
-                    /* ???? */
-                    case 0x06:
-                        dev->regs[dev->index] = val;
-                        break;
-
-                    /* ???? */
-                    case 0x07:
-                        dev->regs[dev->index] = val;
-                        break;
-                }
-            }
-            break;
-    }
-}
-
-static uint8_t
-ali1435_read(uint16_t addr, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    uint8_t    ret = 0xff;
-
-    if ((addr == 0x23) && (dev->index < 0x10))
-        ret = dev->regs[dev->index];
-    else if (addr == 0x22)
-        ret = dev->index;
-
-    return ret;
-}
-
-static void
-ali1435_reset(void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-
-    memset(dev->regs, 0, 16);
-
-    dev->regs[0x00] = 0xff;
-
-    pci_set_pmc(0);
-
-    dev->cfg_locked = 1;
-
-    memset(dev->pci_regs, 0, 256);
-
-    dev->pci_regs[0x00] = 0x25;
-    dev->pci_regs[0x01] = 0x10; /*ALi*/
-    dev->pci_regs[0x02] = 0x35;
-    dev->pci_regs[0x03] = 0x14; /*M1435*/
-    dev->pci_regs[0x04] = 0x07;
-    dev->pci_regs[0x07] = 0x04;
-    dev->pci_regs[0x0b] = 0x06;
-
-    dev->pci_regs[0x80] = 0x80;
-    dev->pci_regs[0x81] = 0x00;
-
-    pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
-}
-
-static void
-ali1435_close(void *p)
-{
-    ali1435_t *dev = (ali1435_t *) p;
-
-    free(dev);
-}
-
-static void *
-ali1435_init(const device_t *info)
-{
-    ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t));
-    memset(dev, 0, sizeof(ali1435_t));
-
-    dev->cfg_locked = 1;
-
-    /* M1435 Ports:
-                22h	Index Port
-                23h	Data Port
-    */
-    io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev);
-
-    pci_add_card(PCI_ADD_NORTHBRIDGE, ali1435_pci_read, ali1435_pci_write, dev);
-
-    ali1435_reset(dev);
-
-    /* pci_set_irq_level(PCI_INTA, 0);
-    pci_set_irq_level(PCI_INTB, 0);
-    pci_set_irq_level(PCI_INTC, 0);
-    pci_set_irq_level(PCI_INTD, 0); */
-
-    return dev;
-}
-
-const device_t ali1435_device = {
-    .name          = "Intel ALi M1435",
-    .internal_name = "ali1435",
-    .flags         = DEVICE_PCI,
-    .local         = 0x00,
-    .init          = ali1435_init,
-    .close         = ali1435_close,
-    .reset         = ali1435_reset,
-    { .available = NULL },
-    .speed_changed = NULL,
-    .force_redraw  = NULL,
-    .config        = NULL
-};
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          Emulation of ALi M1435 chipset that acts as both the
+ *          southbridge.
+ *
+ *
+ *
+ * Authors: Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2020 Miran Grca.
+ */
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include <86box/device.h>
+#include <86box/io.h>
+#include <86box/apm.h>
+#include <86box/dma.h>
+#include <86box/mem.h>
+#include <86box/smram.h>
+#include <86box/pci.h>
+#include <86box/timer.h>
+#include <86box/pic.h>
+#include <86box/pit.h>
+#include <86box/port_92.h>
+#include <86box/hdc_ide.h>
+#include <86box/hdc.h>
+#include <86box/machine.h>
+#include <86box/chipset.h>
+#include <86box/spd.h>
+
+#define MEM_STATE_SHADOW_R 0x01
+#define MEM_STATE_SHADOW_W 0x02
+#define MEM_STATE_SMRAM    0x04
+
+typedef struct
+{
+    uint8_t index, cfg_locked,
+        regs[16], pci_regs[256];
+} ali1435_t;
+
+#define ENABLE_ALI1435_LOG 1
+#ifdef ENABLE_ALI1435_LOG
+int ali1435_do_log = ENABLE_ALI1435_LOG;
+
+static void
+ali1435_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (ali1435_do_log) {
+        va_start(ap, fmt);
+        pclog_ex(fmt, ap);
+        va_end(ap);
+    }
+}
+#else
+#    define ali1435_log(fmt, ...)
+#endif
+
+/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter
+         when the most siginificant bit is set. We work around that by manipulating the
+         emulated PIC's ELCR register. */
+static void
+ali1435_update_irqs(ali1435_t *dev, int set)
+{
+    uint8_t val;
+    int     reg;
+    int     shift;
+    int     irq;
+    int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+    pic_t  *temp_pic;
+
+    for (uint8_t i = 0; i < 4; i++) {
+        reg   = 0x80 + (i >> 1);
+        shift = (i & 1) << 2;
+        val   = (dev->pci_regs[reg] >> shift) & 0x0f;
+        irq   = irq_map[val & 0x07];
+        if (irq == -1)
+            continue;
+        temp_pic = (irq >= 8) ? &pic2 : &pic;
+        irq &= 7;
+        if (set && (val & 0x08))
+            temp_pic->elcr |= (1 << irq);
+        else
+            temp_pic->elcr &= ~(1 << irq);
+    }
+}
+
+static void
+ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+    int        irq;
+    int        irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+
+    ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val);
+
+    if (func > 0)
+        return;
+
+    if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b)))
+        return;
+
+    if ((addr >= 0x0f) && (addr < 0x30))
+        return;
+
+    if ((addr >= 0x34) && (addr < 0x40))
+        return;
+
+    switch (addr) {
+        /* Dummy PCI Config */
+        case 0x04:
+            dev->pci_regs[addr] = (val & 0x7f) | 0x07;
+            break;
+
+        case 0x05:
+            dev->pci_regs[addr] = (val & 0x01);
+            break;
+
+        /* Dummy PCI Status */
+        case 0x07:
+            dev->pci_regs[addr] &= ~(val & 0xb8);
+            break;
+
+        case 0x80:
+        case 0x81:
+            dev->pci_regs[addr] = val;
+            ali1435_update_irqs(dev, 0);
+            irq = irq_map[val & 0x07];
+            if (irq >= 0) {
+                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
+                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
+            } else {
+                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
+                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
+            }
+            irq = irq_map[(val >> 4) & 0x07];
+            if (irq >= 0) {
+                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
+                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
+            } else {
+                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
+                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
+            }
+            ali1435_update_irqs(dev, 1);
+            break;
+
+        default:
+            dev->pci_regs[addr] = val;
+            break;
+    }
+}
+
+static uint8_t
+ali1435_pci_read(int func, int addr, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+    uint8_t    ret;
+
+    ret = 0xff;
+
+    if (func == 0)
+        ret = dev->pci_regs[addr];
+
+    ali1435_log("ali1435_read(%02X, %02X) = %02X\n", func, addr, ret);
+
+    return ret;
+}
+
+static void
+ali1435_write(uint16_t addr, uint8_t val, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+
+    switch (addr) {
+        case 0x22:
+            dev->index = val;
+            break;
+
+        case 0x23:
+            /* #ifdef ENABLE_ALI1435_LOG
+                            if (dev->index != 0x03)
+                                    ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
+            #endif */
+
+            if (dev->index == 0x03)
+                dev->cfg_locked = (val != 0x69);
+
+            if (!dev->cfg_locked) {
+                pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
+
+                switch (dev->index) {
+                    /* PCI Mechanism select? */
+                    case 0x00:
+                        dev->regs[dev->index] = val;
+                        pclog("PMC = %i\n", val != 0xc8);
+                        pci_set_pmc(val != 0xc8);
+                        break;
+
+                    /* ???? */
+                    case 0x06:
+                        dev->regs[dev->index] = val;
+                        break;
+
+                    /* ???? */
+                    case 0x07:
+                        dev->regs[dev->index] = val;
+                        break;
+                }
+            }
+            break;
+    }
+}
+
+static uint8_t
+ali1435_read(uint16_t addr, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+    uint8_t    ret = 0xff;
+
+    if ((addr == 0x23) && (dev->index < 0x10))
+        ret = dev->regs[dev->index];
+    else if (addr == 0x22)
+        ret = dev->index;
+
+    return ret;
+}
+
+static void
+ali1435_reset(void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+
+    memset(dev->regs, 0, 16);
+
+    dev->regs[0x00] = 0xff;
+
+    pci_set_pmc(0);
+
+    dev->cfg_locked = 1;
+
+    memset(dev->pci_regs, 0, 256);
+
+    dev->pci_regs[0x00] = 0x25;
+    dev->pci_regs[0x01] = 0x10; /*ALi*/
+    dev->pci_regs[0x02] = 0x35;
+    dev->pci_regs[0x03] = 0x14; /*M1435*/
+    dev->pci_regs[0x04] = 0x07;
+    dev->pci_regs[0x07] = 0x04;
+    dev->pci_regs[0x0b] = 0x06;
+
+    dev->pci_regs[0x80] = 0x80;
+    dev->pci_regs[0x81] = 0x00;
+
+    pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
+}
+
+static void
+ali1435_close(void *p)
+{
+    ali1435_t *dev = (ali1435_t *) p;
+
+    free(dev);
+}
+
+static void *
+ali1435_init(const device_t *info)
+{
+    ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t));
+    memset(dev, 0, sizeof(ali1435_t));
+
+    dev->cfg_locked = 1;
+
+    /* M1435 Ports:
+                22h Index Port
+                23h Data Port
+    */
+    io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev);
+
+    pci_add_card(PCI_ADD_NORTHBRIDGE, ali1435_pci_read, ali1435_pci_write, dev);
+
+    ali1435_reset(dev);
+
+    /* pci_set_irq_level(PCI_INTA, 0);
+    pci_set_irq_level(PCI_INTB, 0);
+    pci_set_irq_level(PCI_INTC, 0);
+    pci_set_irq_level(PCI_INTD, 0); */
+
+    return dev;
+}
+
+const device_t ali1435_device = {
+    .name          = "Intel ALi M1435",
+    .internal_name = "ali1435",
+    .flags         = DEVICE_PCI,
+    .local         = 0x00,
+    .init          = ali1435_init,
+    .close         = ali1435_close,
+    .reset         = ali1435_reset,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/chipset/ali1489.c

@@ -206,7 +206,8 @@ static void
 ali1489_write(uint16_t addr, uint8_t val, void *priv)
 {
     ali1489_t    *dev = (ali1489_t *) priv;
-    uint8_t       old, irq;
+    uint8_t       old;
+    uint8_t       irq;
     const uint8_t irq_array[16] = { 0, 3, 4, 7, 0, 0, 0, 0, 9, 10, 5, 6, 11, 12, 14, 15 };
 
     switch (addr) {

src/chipset/ali1531.c

@@ -91,12 +91,15 @@ ali1531_smram_recalc(uint8_t val, ali1531_t *dev)
 static void
 ali1531_shadow_recalc(int cur_reg, ali1531_t *dev)
 {
-    int      i, bit, r_reg, w_reg;
-    uint32_t base, flags = 0;
+    int      bit;
+    int      r_reg;
+    int      w_reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         base  = 0x000c0000 + (i << 14);
         bit   = i & 7;
         r_reg = 0x4c + (i >> 3);

src/chipset/ali1541.c

@@ -92,12 +92,15 @@ ali1541_smram_recalc(uint8_t val, ali1541_t *dev)
 static void
 ali1541_shadow_recalc(int cur_reg, ali1541_t *dev)
 {
-    int      i, bit, r_reg, w_reg;
-    uint32_t base, flags = 0;
+    int      bit;
+    int      r_reg;
+    int      w_reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         base  = 0x000c0000 + (i << 14);
         bit   = i & 7;
         r_reg = 0x56 + (i >> 3);
@@ -124,7 +127,8 @@ ali1541_shadow_recalc(int cur_reg, ali1541_t *dev)
 static void
 ali1541_mask_bar(ali1541_t *dev)
 {
-    uint32_t bar, mask;
+    uint32_t bar;
+    uint32_t mask;
 
     switch (dev->pci_conf[0xbc] & 0x0f) {
         case 0x00:

src/chipset/ali1543.c

@@ -112,7 +112,6 @@ static void
 ali1533_write(int func, int addr, uint8_t val, void *priv)
 {
     ali1543_t *dev = (ali1543_t *) priv;
-    int        irq;
     ali1543_log("M1533: dev->pci_conf[%02x] = %02x\n", addr, val);
 
     if (func > 0)
@@ -219,7 +218,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
         case 0x4c: /* PCI INT to ISA Level to Edge transfer */
             dev->pci_conf[addr] = val;
 
-            for (irq = 1; irq < 9; irq++)
+            for (uint8_t irq = 1; irq < 9; irq++)
                 pci_set_irq_level(irq, !(val & (1 << (irq - 1))));
             break;
 
@@ -468,7 +467,8 @@ ali1533_read(int func, int addr, void *priv)
 static void
 ali5229_ide_irq_handler(ali1543_t *dev)
 {
-    int ctl = 0, ch = 0;
+    int ctl = 0;
+    int ch = 0;
     int bit = 0;
 
     if (dev->ide_conf[0x52] & 0x10) {
@@ -555,17 +555,20 @@ ali5229_ide_handler(ali1543_t *dev)
 {
     uint32_t ch = 0;
 
-    uint16_t native_base_pri_addr = ((dev->ide_conf[0x11] | dev->ide_conf[0x10] << 8)) & 0xfffe;
-    uint16_t native_side_pri_addr = ((dev->ide_conf[0x15] | dev->ide_conf[0x14] << 8)) & 0xfffe;
-    uint16_t native_base_sec_addr = ((dev->ide_conf[0x19] | dev->ide_conf[0x18] << 8)) & 0xfffe;
-    uint16_t native_side_sec_addr = ((dev->ide_conf[0x1c] | dev->ide_conf[0x1b] << 8)) & 0xfffe;
+    uint16_t native_base_pri_addr = (dev->ide_conf[0x11] | dev->ide_conf[0x10] << 8) & 0xfffe;
+    uint16_t native_side_pri_addr = (dev->ide_conf[0x15] | dev->ide_conf[0x14] << 8) & 0xfffe;
+    uint16_t native_base_sec_addr = (dev->ide_conf[0x19] | dev->ide_conf[0x18] << 8) & 0xfffe;
+    uint16_t native_side_sec_addr = (dev->ide_conf[0x1c] | dev->ide_conf[0x1b] << 8) & 0xfffe;
 
     uint16_t comp_base_pri_addr = 0x01f0;
     uint16_t comp_side_pri_addr = 0x03f6;
     uint16_t comp_base_sec_addr = 0x0170;
     uint16_t comp_side_sec_addr = 0x0376;
 
-    uint16_t current_pri_base, current_pri_side, current_sec_base, current_sec_side;
+    uint16_t current_pri_base;
+    uint16_t current_pri_side;
+    uint16_t current_sec_base;
+    uint16_t current_sec_side;
 
     /* Primary Channel Programming */
     if (dev->ide_conf[0x52] & 0x10) {
@@ -618,7 +621,7 @@ ali5229_ide_handler(ali1543_t *dev)
             ali1543_log("ali5229_ide_handler(): Enabling secondary IDE...\n");
             ide_sec_enable();
 
-            sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, (((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8))) + (8 ^ ch));
+            sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + (8 ^ ch));
             ali1543_log("M5229 SEC: BASE %04x SIDE %04x\n", current_sec_base, current_sec_side);
         }
     } else {

src/chipset/ali1621.c

@@ -94,7 +94,8 @@ ali1621_log(const char *fmt, ...)
 static void
 ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
 {
-    uint16_t access_smm = 0x0000, access_normal = 0x0000;
+    uint16_t access_smm    = 0x0000;
+    uint16_t access_normal = 0x0000;
 
     smram_disable_all();
 
@@ -138,13 +139,16 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
 static void
 ali1621_shadow_recalc(int cur_reg, ali1621_t *dev)
 {
-    int      i, r_bit, w_bit, reg;
-    uint32_t base, flags = 0;
+    int      r_bit;
+    int      w_bit;
+    int      reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
     /* C0000-EFFFF */
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base  = 0x000c0000 + (i << 14);
         r_bit = (i << 1) + 4;
         reg   = 0x84;
@@ -199,7 +203,8 @@ ali1621_shadow_recalc(int cur_reg, ali1621_t *dev)
 static void
 ali1621_mask_bar(ali1621_t *dev)
 {
-    uint32_t bar, mask;
+    uint32_t bar;
+    uint32_t mask;
 
     switch (dev->pci_conf[0xbc] & 0x0f) {
         case 0x00:
@@ -578,7 +583,6 @@ static void
 ali1621_reset(void *priv)
 {
     ali1621_t *dev = (ali1621_t *) priv;
-    int        i;
 
     /* Default Registers */
     dev->pci_conf[0x00] = 0xb9;
@@ -633,7 +637,7 @@ ali1621_reset(void *priv)
 
     ali1621_write(0, 0x83, 0x08, dev);
 
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         ali1621_write(0, 0x84 + i, 0x00, dev);
 }
 

src/chipset/ali6117.c

@@ -30,7 +30,6 @@
 #include <86box/pit.h>
 #include <86box/device.h>
 #include <86box/port_92.h>
-#include <86box/usb.h>
 #include <86box/hdc.h>
 #include <86box/hdc_ide.h>
 #include <86box/chipset.h>
@@ -103,8 +102,8 @@ ali6117_log(const char *fmt, ...)
 static void
 ali6117_recalcmapping(ali6117_t *dev)
 {
-    uint8_t  reg, bitpair;
-    uint32_t base, size;
+    uint32_t base;
+    uint32_t size;
     int      state;
 
     shadowbios       = 0;
@@ -113,8 +112,8 @@ ali6117_recalcmapping(ali6117_t *dev)
     ali6117_log("ALI6117: Shadowing for A0000-BFFFF (reg 12 bit 1) = %s\n", (dev->regs[0x12] & 0x02) ? "on" : "off");
     mem_set_mem_state(0xa0000, 0x20000, (dev->regs[0x12] & 0x02) ? (MEM_WRITE_INTERNAL | MEM_READ_INTERNAL) : (MEM_WRITE_EXTANY | MEM_READ_EXTANY));
 
-    for (reg = 0; reg <= 1; reg++) {
-        for (bitpair = 0; bitpair <= 3; bitpair++) {
+    for (uint8_t reg = 0; reg <= 1; reg++) {
+        for (uint8_t bitpair = 0; bitpair <= 3; bitpair++) {
             size = 0x8000;
             base = 0xc0000 + (size * ((reg * 4) + bitpair));
             ali6117_log("ALI6117: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x14 + reg, bitpair, 1 << ((bitpair * 2) + 1), 1 << (bitpair * 2));
@@ -149,10 +148,10 @@ ali6117_recalcmapping(ali6117_t *dev)
 static void
 ali6117_bank_recalc(ali6117_t *dev)
 {
-    int      i;
-    uint32_t bank, addr;
+    uint32_t bank;
+    uint32_t addr;
 
-    for (i = 0x00000000; i < (mem_size << 10); i += 4096) {
+    for (uint32_t i = 0x00000000; i < (mem_size << 10); i += 4096) {
         if ((i >= 0x000a0000) && (i < 0x00100000))
             continue;
 
@@ -455,7 +454,7 @@ ali6117_close(void *priv)
 static void *
 ali6117_init(const device_t *info)
 {
-    int i, last_match = 0;
+    int last_match = 0;
 
     ali6117_log("ALI6117: init()\n");
 
@@ -468,7 +467,7 @@ ali6117_init(const device_t *info)
 
     ali6117_setup(dev);
 
-    for (i = 31; i >= 0; i--) {
+    for (int8_t i = 31; i >= 0; i--) {
         if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) {
             last_match = ali6117_modes[i][0];
             dev->mode  = i;

src/chipset/contaq_82c59x.c

@@ -89,7 +89,8 @@ contaq_82c59x_isa_speed_recalc(contaq_82c59x_t *dev)
 static void
 contaq_82c59x_shadow_recalc(contaq_82c59x_t *dev)
 {
-    uint32_t i, base;
+    uint32_t i;
+    uint32_t base;
     uint8_t  bit;
 
     shadowbios = shadowbios_write = 0;

src/chipset/gc100.c

@@ -70,9 +70,9 @@ gc100_log(const char *fmt, ...)
 static uint8_t
 get_fdd_switch_settings(void)
 {
-    int i, fdd_count = 0;
+    int fdd_count = 0;
 
-    for (i = 0; i < FDD_NUM; i++) {
+    for (uint8_t i = 0; i < FDD_NUM; i++) {
         if (fdd_get_flags(i))
             fdd_count++;
     }

src/chipset/headland.c

@@ -105,7 +105,11 @@ static const int mem_conf_cr1[41] = {
 static uint32_t
 get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
 {
-    uint32_t bank_base[4], bank_shift[4], shift, other_shift, bank;
+    uint32_t bank_base[4];
+    uint32_t bank_shift[4];
+    uint32_t shift;
+    uint32_t other_shift;
+    uint32_t bank;
 
     if ((addr >= 0x0e0000) && (addr <= 0x0fffff))
         return addr;
@@ -173,7 +177,8 @@ hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
 static void
 hl_ems_update(headland_t *dev, uint8_t mar)
 {
-    uint32_t base_addr, virt_addr;
+    uint32_t base_addr;
+    uint32_t virt_addr;
     uint8_t  indx = mar & 0x1f;
 
     base_addr = (indx + 16) << 14;
@@ -202,9 +207,7 @@ hl_ems_update(headland_t *dev, uint8_t mar)
 static void
 set_global_EMS_state(headland_t *dev, int state)
 {
-    int i;
-
-    for (i = 0; i < 32; i++) {
+    for (uint8_t i = 0; i < 32; i++) {
         hl_ems_update(dev, i | (((dev->cr[0] & 0x01) << 5) ^ 0x20));
         hl_ems_update(dev, i | ((dev->cr[0] & 0x01) << 5));
     }
@@ -229,7 +232,6 @@ static void
 memmap_state_update(headland_t *dev)
 {
     uint32_t addr;
-    int      i;
     uint8_t  ht_cr0   = dev->cr[0];
     uint8_t  ht_romcs = !(dev->cr[4] & 0x01);
     if (dev->revision <= 1)
@@ -237,7 +239,7 @@ memmap_state_update(headland_t *dev)
     if (!(dev->cr[0] & 0x04))
         ht_cr0 &= ~0x18;
 
-    for (i = 0; i < 24; i++) {
+    for (uint8_t i = 0; i < 24; i++) {
         addr = get_addr(dev, 0x40000 + (i << 14), NULL);
         mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
     }
@@ -684,7 +686,7 @@ headland_init(const device_t *info)
 
     memmap_state_update(dev);
 
-    return (dev);
+    return dev;
 }
 
 const device_t headland_gc10x_device = {

src/chipset/ims8848.c

@@ -148,7 +148,8 @@ ims8848_log(const char *fmt, ...)
 static void
 ims8848_recalc(ims8848_t *dev)
 {
-    int      i, state_on;
+    int      i;
+    int      state_on;
     uint32_t base;
     ims8848_log("SHADOW: 00 = %02X, 08 = %02X, 1B = %02X, 1C = %02X\n",
                 dev->regs[0x00], dev->regs[0x08], dev->regs[0x1b], dev->regs[0x1c]);

src/chipset/intel_420ex.c

@@ -113,8 +113,9 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
 {
     uint8_t *regs = (uint8_t *) dev->regs;
 
-    uint32_t host_base = 0x000a0000, ram_base = 0x000a0000;
-    uint32_t size = 0x00010000;
+    uint32_t host_base = 0x000a0000;
+    uint32_t ram_base  = 0x000a0000;
+    uint32_t size      = 0x00010000;
 
     switch (regs[0x70] & 0x07) {
         case 0:

src/chipset/intel_4x0.c

@@ -119,7 +119,8 @@ i4x0_smram_handler_phase1(i4x0_t *dev)
     uint8_t *reg     = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]);
     uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]);
 
-    uint32_t s, base[2] = { 0x000a0000, 0x00000000 };
+    uint32_t s;
+    uint32_t base[2] = { 0x000a0000, 0x00000000 };
     uint32_t size[2] = { 0x00010000, 0x00000000 };
 
     if ((dev->type <= INTEL_420ZX) || (dev->type >= INTEL_430FX)) {
@@ -242,7 +243,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
     i4x0_t  *dev    = (i4x0_t *) priv;
     uint8_t *regs   = (uint8_t *) dev->regs;
     uint8_t *regs_l = (uint8_t *) dev->regs_locked;
-    int      i;
 
     if (func > 0)
         return;
@@ -1358,7 +1358,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                     case INTEL_440GX:
                         regs[0xe7] = 0x80;
-                        for (i = 0; i < 16; i++)
+                        for (uint8_t i = 0; i < 16; i++)
                             regs_l[0xe0 + i] = !!(val & 0x80);
                         if (!regs_l[0xe7]) {
                             regs[0xe7] |= (val & 0x7f);
@@ -1484,9 +1484,9 @@ static void
             regs[0x0d] = 0x20;
             /* According to information from FreeBSD 3.x source code:
                     0x00 = 486DX, 0x20 = 486SX, 0x40 = 486DX2 or 486DX4, 0x80 = Pentium OverDrive. */
-            if (!(hasfpu) && (cpu_multi == 1))
+            if (!hasfpu && (cpu_multi == 1))
                 regs[0x50] = 0x20;
-            else if (!(hasfpu) && (cpu_multi == 2))
+            else if (!hasfpu && (cpu_multi == 2))
                 regs[0x50] = 0x60; /* Guess based on the SX, DX, and DX2 values. */
             else if (hasfpu && (cpu_multi == 1))
                 regs[0x50] = 0x00;

src/chipset/intel_82335.c

@@ -86,8 +86,11 @@ intel_82335_log(const char *fmt, ...)
 static void
 intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 {
-    intel_82335_t *dev     = (intel_82335_t *) priv;
-    uint32_t       romsize = 0, base = 0, i = 0, rc1_remap = 0, rc2_remap = 0;
+    intel_82335_t *dev       = (intel_82335_t *) priv;
+    uint32_t       romsize   = 0;
+    uint32_t       base      = 0;
+    uint32_t       rc1_remap = 0;
+    uint32_t       rc2_remap = 0;
 
     dev->regs[addr] = val;
 
@@ -128,7 +131,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 
             case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */
                 if (EXTENDED_GRANULARITY_ENABLED) {
-                    for (i = 0; i < 8; i++) {
+                    for (uint8_t i = 0; i < 8; i++) {
                         base             = 0xc0000 + (i << 15);
                         shadowbios       = (dev->regs[0x2e] & (1 << (i + 8))) && (base == romsize);
                         shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize);

src/chipset/intel_i450kx.c

@@ -89,7 +89,8 @@ static void
 i450kx_smram_recalc(i450kx_t *dev, int bus)
 {
     uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
-    uint32_t addr, size;
+    uint32_t addr;
+    uint32_t size;
 
     smram_disable(dev->smram[bus]);
 
@@ -386,10 +387,8 @@ pb_read(int func, int addr, void *priv)
 static void
 mc_fill_drbs(i450kx_t *dev)
 {
-    int i;
-
     spd_write_drbs_interleaved(dev->mc_pci_conf, 0x60, 0x6f, 4);
-    for (i = 0x60; i <= 0x6f; i++) {
+    for (uint8_t i = 0x60; i <= 0x6f; i++) {
         if (i & 0x01)
             dev->mc_pci_conf[i] = 0x00;
         else

src/chipset/intel_piix.c

@@ -101,7 +101,8 @@ piix_log(const char *fmt, ...)
 static void
 smsc_ide_irqs(piix_t *dev)
 {
-    int irq_line = 3, irq_mode[2] = { 0, 0 };
+    int irq_line = 3;
+    uint8_t irq_mode[2] = { 0, 0 };
 
     if (dev->regs[1][0x09] & 0x01)
         irq_mode[0] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1;
@@ -148,7 +149,8 @@ smsc_ide_irqs(piix_t *dev)
 static void
 piix_ide_handlers(piix_t *dev, int bus)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     if (bus & 0x01) {
         ide_pri_disable();
@@ -317,7 +319,8 @@ static void
 piix_trap_update(void *priv)
 {
     piix_t  *dev     = (piix_t *) priv;
-    uint8_t  trap_id = 0, *fregs = dev->regs[3];
+    uint8_t  trap_id = 0;
+    uint8_t *fregs   = dev->regs[3];
     uint16_t temp;
 
     piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x1f0, 8);
@@ -459,7 +462,6 @@ piix_write(int func, int addr, uint8_t val, void *priv)
     piix_t  *dev = (piix_t *) priv;
     uint8_t *fregs;
     uint16_t base;
-    int      i;
 
     /* Return on unsupported function. */
     if (dev->max_func > 0) {
@@ -639,7 +641,7 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                     base = fregs[addr | 0x01] << 8;
                     base |= fregs[addr & 0xfe];
 
-                    for (i = 0; i < 4; i++)
+                    for (uint8_t i = 0; i < 4; i++)
                         ddma_update_io_mapping(dev->ddma, (addr & 4) + i, fregs[addr & 0xfe] + (i << 4), fregs[addr | 0x01], (base != 0x0000));
                 }
                 break;
@@ -1149,8 +1151,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 piix_read(int func, int addr, void *priv)
 {
-    piix_t *dev = (piix_t *) priv;
-    uint8_t ret = 0xff, *fregs;
+    piix_t  *dev = (piix_t *) priv;
+    uint8_t  ret = 0xff;
+    uint8_t *fregs;
 
     if ((dev->type == 3) && (func == 2) && (dev->max_func == 1) && (addr >= 0x40))
         ret = 0x00;
@@ -1202,7 +1205,6 @@ board_read(uint16_t port, void *priv)
 static void
 piix_reset_hard(piix_t *dev)
 {
-    int      i;
     uint8_t *fregs;
 
     uint16_t old_base = (dev->regs[1][0x20] & 0xf0) | (dev->regs[1][0x21] << 8);
@@ -1239,7 +1241,7 @@ piix_reset_hard(piix_t *dev)
     }
 
     /* Clear all 4 functions' arrays and set their vendor and device ID's. */
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         memset(dev->regs[i], 0, 256);
         if (dev->type == 5) {
             dev->regs[i][0x00] = 0x55;
@@ -1291,7 +1293,7 @@ piix_reset_hard(piix_t *dev)
     fregs[0xa0] = (dev->type < 4) ? 0x08 : 0x00;
     fregs[0xa8] = (dev->type < 4) ? 0x0f : 0x00;
     if (dev->type > 3)
-        fregs[0xb0] = (is_pentium) ? 0x00 : 0x04;
+        fregs[0xb0] = is_pentium ? 0x00 : 0x04;
     fregs[0xcb] = (dev->type > 3) ? 0x21 : 0x00;
     if (dev->type > 4) {
         fregs[0xd4] = 0x70;
@@ -1497,7 +1499,7 @@ piix_reset(void *p)
     }
 
     if (dev->type >= 4) {
-        piix_write(0, 0xb0, (is_pentium) ? 0x00 : 0x04, p);
+        piix_write(0, 0xb0, is_pentium ? 0x00 : 0x04, p);
         piix_write(3, 0x40, 0x01, p);
         piix_write(3, 0x41, 0x00, p);
         piix_write(3, 0x5b, 0x00, p);

src/chipset/neat.c

@@ -250,9 +250,9 @@ ems_readb(uint32_t addr, void *priv)
     uint8_t ret = 0xff;
 
     /* Grab the data. */
-    ret = *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 
-    return (ret);
+    return ret;
 }
 
 /* Read one word from paged RAM. */
@@ -263,9 +263,9 @@ ems_readw(uint32_t addr, void *priv)
     uint16_t ret = 0xffff;
 
     /* Grab the data. */
-    ret = *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 
-    return (ret);
+    return ret;
 }
 
 /* Write one byte to paged RAM. */
@@ -275,7 +275,7 @@ ems_writeb(uint32_t addr, uint8_t val, void *priv)
     neat_t *dev = (neat_t *) priv;
 
     /* Write the data. */
-    *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Write one word to paged RAM. */
@@ -285,7 +285,7 @@ ems_writew(uint32_t addr, uint16_t val, void *priv)
     neat_t *dev = (neat_t *) priv;
 
     /* Write the data. */
-    *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Re-calculate the active-page physical address. */
@@ -365,7 +365,7 @@ ems_read(uint16_t port, void *priv)
     neat_log("NEAT: ems_read(%04x) = %02x\n", port, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Initialize the EMS module. */
@@ -435,9 +435,10 @@ ems_init(neat_t *dev, int en)
 static void
 neat_write(uint16_t port, uint8_t val, void *priv)
 {
-    neat_t *dev = (neat_t *) priv;
-    uint8_t xval, *reg;
-    int     i;
+    neat_t  *dev = (neat_t *) priv;
+    uint8_t  xval;
+    uint8_t *reg;
+    int      i;
 
 #if NEAT_DEBUG > 2
     neat_log("NEAT: write(%04x, %02x)\n", port, val);
@@ -647,7 +648,7 @@ neat_read(uint16_t port, void *priv)
     neat_log("NEAT: read(%04x) = %02x\n", port, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 static void

src/chipset/opti283.c

@@ -113,10 +113,12 @@ opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv)
 static void
 opti283_shadow_recalc(opti283_t *dev)
 {
-    uint32_t i, base;
+    uint32_t base;
     uint32_t rbase;
-    uint8_t  sh_enable, sh_mode;
-    uint8_t  rom, sh_copy;
+    uint8_t  sh_enable;
+    uint8_t  sh_mode;
+    uint8_t  rom;
+    uint8_t  sh_copy;
 
     shadowbios = shadowbios_write = 0;
     dev->shadow_high              = 0;
@@ -143,7 +145,7 @@ opti283_shadow_recalc(opti283_t *dev)
     }
 
     sh_copy = dev->regs[0x11] & 0x08;
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base = 0xc0000 + (i << 14);
         if (i >= 4)
             sh_enable = dev->regs[0x12] & (1 << (i - 4));

src/chipset/opti391.c

@@ -60,9 +60,12 @@ typedef struct
 static void
 opti391_shadow_recalc(opti391_t *dev)
 {
-    uint32_t i, base;
-    uint8_t  sh_enable, sh_master;
-    uint8_t  sh_wp, sh_write_internal;
+    uint32_t i;
+    uint32_t base;
+    uint8_t  sh_enable;
+    uint8_t  sh_master;
+    uint8_t  sh_wp;
+    uint8_t  sh_write_internal;
 
     shadowbios = shadowbios_write = 0;
 

src/chipset/opti495.c

@@ -60,7 +60,8 @@ static void
 opti495_recalc(opti495_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t i;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;

src/chipset/opti499.c

@@ -59,7 +59,8 @@ static void
 opti499_recalc(opti499_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t i;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;

src/chipset/opti822.c

@@ -71,11 +71,13 @@ opti822_log(const char *fmt, ...)
 static void
 opti822_recalc(opti822_t *dev)
 {
-    int      i, reg, bit_r, bit_w;
+    int      reg;
+    int      bit_r;
+    int      bit_w;
     int      state;
     uint32_t base;
 
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base  = 0x000c0000 + (i << 14);
         reg   = 0x44 + ((i >> 2) ^ 3);
         bit_w = (i & 3);
@@ -99,15 +101,16 @@ static void
 opti822_update_irqs(opti822_t *dev, int set)
 {
     uint8_t val;
-    int     i, reg;
-    int     shift, irq;
+    int     reg;
+    int     shift;
+    int     irq;
     int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
     pic_t  *temp_pic;
 
     // dev->irq_convert = (dev->pci_regs[0x53] & 0x08);
     dev->irq_convert = 1;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         reg   = 0x88 + (i >> 1);
         shift = (i & 1) << 2;
         val   = (dev->pci_regs[reg] >> shift) & 0x0f;
@@ -127,8 +130,10 @@ static void
 opti822_pci_write(int func, int addr, uint8_t val, void *priv)
 {
     opti822_t *dev = (opti822_t *) priv;
-    int        irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-    int        pin, slot;
+    int        irq;
+    int        irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+    int        pin;
+    int        slot;
 
     opti822_log("opti822_write(%02X, %02X, %02X)\n", func, addr, val);
 
@@ -343,7 +348,6 @@ static void
 opti822_reset(void *priv)
 {
     opti822_t *dev = (opti822_t *) priv;
-    int        i;
 
     memset(dev->pci_regs, 0, 256);
 
@@ -366,7 +370,7 @@ opti822_reset(void *priv)
 
     dev->irq_convert = 1 /*0*/;
 
-    for (i = 0; i < 16; i++)
+    for (uint8_t i = 0; i < 16; i++)
         pci_set_irq_routing(PCI_INTA + i, PCI_IRQ_DISABLED);
 }
 

src/chipset/opti895.c

@@ -64,7 +64,8 @@ static void
 opti895_recalc(opti895_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t i;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;

src/chipset/scamp.c

@@ -151,8 +151,10 @@ ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -180,8 +182,10 @@ ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -211,8 +215,10 @@ ram_mirrored_interleaved_read(uint32_t addr, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -240,8 +246,10 @@ ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -269,8 +277,10 @@ ram_mirrored_read(uint32_t addr, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte   = addr & 1;
@@ -286,8 +296,10 @@ ram_mirrored_write(uint32_t addr, uint8_t val, void *priv)
 {
     ram_struct_t *rs   = (ram_struct_t *) priv;
     scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    int           bank = rs->bank;
+    int           byte;
+    int           row;
+    int           column;
 
     addr -= dev->ram_virt_base[bank];
     byte   = addr & 1;
@@ -302,15 +314,16 @@ static void
 recalc_mappings(void *priv)
 {
     scamp_t *dev = (scamp_t *) priv;
-    int      c;
-    uint32_t virt_base  = 0, old_virt_base;
+    uint32_t virt_base  = 0;
+    uint32_t old_virt_base;
     uint8_t  cur_rammap = dev->cfg_regs[CFG_RAMMAP] & 0xf;
-    int      bank_nr    = 0, phys_bank;
+    int      bank_nr    = 0;
+    int      phys_bank;
 
     mem_set_mem_state_both((1 << 20), (16256 - 1024) * 1024, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
     mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
-    for (c = 0; c < 2; c++)
+    for (uint8_t c = 0; c < 2; c++)
         mem_mapping_disable(&dev->ram_mapping[c]);
 
     /* Once the BIOS programs the correct DRAM configuration, switch to regular

src/chipset/scat.c

@@ -113,13 +113,16 @@ static void    scat_out(uint16_t port, uint8_t val, void *priv);
 static void
 shadow_state_update(scat_t *dev)
 {
-    int i, val;
+    int val;
 
-    uint32_t base, bit, romcs, shflags = 0;
+    uint32_t base;
+    uint32_t bit;
+    uint32_t romcs;
+    uint32_t shflags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 24; i++) {
+    for (uint8_t i = 0; i < 24; i++) {
         if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) < 4)
             val = 0;
         else
@@ -150,7 +153,6 @@ static void
 set_xms_bound(scat_t *dev, uint8_t val)
 {
     uint32_t xms_max = ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0xfe0000 : 0xfc0000;
-    int      i;
 
     switch (val & 0x0f) {
         case 1:
@@ -245,7 +247,7 @@ set_xms_bound(scat_t *dev, uint8_t val)
     mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000,
                          ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0x60000 : 0x40000);
     if (dev->regs[SCAT_VERSION] & 0xf0) {
-        for (i = 0; i < 8; i++) {
+        for (uint8_t i = 0; i < 8; i++) {
             if (val & 0x10)
                 mem_mapping_disable(&bios_high_mapping);
             else
@@ -258,7 +260,8 @@ static uint32_t
 get_addr(scat_t *dev, uint32_t addr, ems_page_t *p)
 {
 #if 1
-    int      nbanks_2048k, nbanks_512k;
+    int      nbanks_2048k;
+    int      nbanks_512k;
     uint32_t addr2;
     int      nbank;
 #else
@@ -882,10 +885,11 @@ get_addr(scat_t *dev, uint32_t addr, ems_page_t *p)
 static void
 set_global_EMS_state(scat_t *dev, int state)
 {
-    uint32_t base_addr, virt_addr;
-    int      i, conf;
+    uint32_t base_addr;
+    uint32_t virt_addr;
+    int      conf;
 
-    for (i = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 24; i < 32; i++) {
+    for (uint32_t i = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 24; i < 32; i++) {
         base_addr = (i + 16) << 14;
 
         if (i >= 24)
@@ -1009,12 +1013,13 @@ memmap_state_update(scat_t *dev)
 static void
 scat_out(uint16_t port, uint8_t val, void *priv)
 {
-    scat_t *dev           = (scat_t *) priv;
-    uint8_t reg_valid     = 0,
-            shadow_update = 0,
-            map_update    = 0,
-            indx;
-    uint32_t base_addr, virt_addr;
+    scat_t  *dev           = (scat_t *) priv;
+    uint8_t  reg_valid     = 0;
+    uint8_t  shadow_update = 0;
+    uint8_t  map_update    = 0;
+    uint8_t  indx;
+    uint32_t base_addr;
+    uint32_t virt_addr;
 
     switch (port) {
         case 0x22:
@@ -1193,7 +1198,8 @@ static uint8_t
 scat_in(uint16_t port, void *priv)
 {
     scat_t *dev = (scat_t *) priv;
-    uint8_t ret = 0xff, indx;
+    uint8_t ret = 0xff;
+    uint8_t indx;
 
     switch (port) {
         case 0x23:
@@ -1304,7 +1310,8 @@ mem_write_scatb(uint32_t addr, uint8_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1322,7 +1329,8 @@ mem_write_scatw(uint32_t addr, uint16_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1340,7 +1348,8 @@ mem_write_scatl(uint32_t addr, uint32_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1365,7 +1374,8 @@ static void *
 scat_init(const device_t *info)
 {
     scat_t  *dev;
-    uint32_t i, k;
+    uint32_t i;
+    uint32_t k;
     int      sx;
 
     dev = (scat_t *) malloc(sizeof(scat_t));
@@ -1418,7 +1428,7 @@ scat_init(const device_t *info)
         mem_mapping_disable(&ram_mid_mapping);
     mem_mapping_disable(&ram_high_mapping);
 
-    k = (sx) ? 0x80000 : 0x40000;
+    k = sx ? 0x80000 : 0x40000;
 
     dev->null_page.valid    = 0;
     dev->null_page.regs_2x8 = 0xff;
@@ -1511,7 +1521,7 @@ scat_init(const device_t *info)
 
     device_add(&port_92_device);
 
-    return (dev);
+    return dev;
 }
 
 const device_t scat_device = {

src/chipset/sis_5511.c

@@ -79,10 +79,10 @@ typedef struct sis_5511_t {
 static void
 sis_5511_shadow_recalc(sis_5511_t *dev)
 {
-    int      i, state;
+    int      state;
     uint32_t base;
 
-    for (i = 0x80; i <= 0x86; i++) {
+    for (uint8_t i = 0x80; i <= 0x86; i++) {
         if (i == 0x86) {
             state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
             state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;

src/chipset/sis_85c496.c

@@ -121,12 +121,12 @@ static void
 sis_85c496_recalcmapping(sis_85c496_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xc0000 + (i << 15);
 
         if (dev->pci_conf[0x44] & (1 << i)) {
@@ -185,9 +185,12 @@ static void
 sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
 {
     sis_85c496_t *dev = (sis_85c496_t *) priv;
-    uint8_t       old, valxor;
+    uint8_t       old;
+    uint8_t       valxor;
     uint8_t       smm_irq[4] = { 10, 11, 12, 15 };
-    uint32_t      host_base, ram_base, size;
+    uint32_t      host_base;
+    uint32_t      ram_base;
+    uint32_t      size;
 
     old    = dev->pci_conf[addr];
     valxor = (dev->pci_conf[addr]) ^ val;
@@ -526,7 +529,6 @@ static void
 sis_85c496_reset(void *priv)
 {
     sis_85c496_t *dev = (sis_85c496_t *) priv;
-    int           i;
 
     sis_85c49x_pci_write(0, 0x44, 0x00, dev);
     sis_85c49x_pci_write(0, 0x45, 0x00, dev);
@@ -535,7 +537,7 @@ sis_85c496_reset(void *priv)
     sis_85c49x_pci_write(0, 0x5a, 0x00, dev);
     // sis_85c49x_pci_write(0, 0x5a, 0x06, dev);
 
-    for (i = 0; i < 8; i++)
+    for (uint8_t i = 0; i < 8; i++)
         sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev);
 
     sis_85c49x_pci_write(0, 0x80, 0x00, dev);

src/chipset/sis_85c4xx.c

@@ -62,10 +62,13 @@ sis_85c4xx_recalcremap(sis_85c4xx_t *dev)
 static void
 sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
 {
-    uint32_t base, n    = 0;
-    uint32_t i, shflags = 0;
-    uint32_t readext, writeext;
-    uint8_t  romcs = 0xc0, cur_romcs;
+    uint32_t base;
+    uint32_t n         = 0;
+    uint32_t shflags   = 0;
+    uint32_t readext;
+    uint32_t writeext;
+    uint8_t  romcs     = 0xc0;
+    uint8_t  cur_romcs;
 
     dev->shadowed = 0x00;
 
@@ -79,7 +82,7 @@ sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
     if (dev->regs[0x08] & 0x04)
         romcs |= 0x02;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base      = 0xc0000 + (i << 15);
         cur_romcs = romcs & (1 << i);
         readext   = cur_romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL;
@@ -155,7 +158,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
     sis_85c4xx_t *dev       = (sis_85c4xx_t *) priv;
     uint8_t       rel_reg   = dev->cur_reg - dev->reg_base;
     uint8_t       valxor    = 0x00;
-    uint32_t      host_base = 0x000e0000, ram_base = 0x000a0000;
+    uint32_t      host_base = 0x000e0000;
+    uint32_t      ram_base  = 0x000a0000;
 
     switch (port) {
         case 0x22:

src/chipset/sis_85c50x.c

@@ -68,7 +68,9 @@ typedef struct sis_85c50x_t {
 static void
 sis_85c50x_shadow_recalc(sis_85c50x_t *dev)
 {
-    uint32_t base, i, can_read, can_write;
+    uint32_t base;
+    uint32_t can_read;
+    uint32_t can_write;
 
     can_read  = (dev->pci_conf[0x53] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
     can_write = (dev->pci_conf[0x53] & 0x20) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL;
@@ -79,7 +81,7 @@ sis_85c50x_shadow_recalc(sis_85c50x_t *dev)
     shadowbios       = 1;
     shadowbios_write = 1;
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xe0000 + (i << 14);
         mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x54] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
         base = 0xd0000 + (i << 14);

src/chipset/stpc.c

@@ -104,15 +104,15 @@ stpc_log(const char *fmt, ...)
 static void
 stpc_recalcmapping(stpc_t *dev)
 {
-    uint8_t  reg, bitpair;
-    uint32_t base, size;
+    uint32_t base;
+    uint32_t size;
     int      state;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (reg = 0; reg <= 3; reg++) {
-        for (bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) {
+    for (uint8_t reg = 0; reg <= 3; reg++) {
+        for (uint8_t bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) {
             if (reg == 3) {
                 size = 0x10000;
                 base = 0xf0000;
@@ -271,7 +271,8 @@ stpc_nb_read(int func, int addr, void *priv)
 static void
 stpc_ide_handlers(stpc_t *dev, int bus)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     if (bus & 0x01) {
         ide_pri_disable();
@@ -607,8 +608,10 @@ stpc_serial_handlers(uint8_t val)
         return 0;
     }
 
-    uint16_t uart0_io = 0x3f8, uart1_io = 0x3f8;
-    uint8_t  uart0_irq = 4, uart1_irq = 3;
+    uint16_t uart0_io = 0x3f8;
+    uint16_t uart1_io = 0x3f8;
+    uint8_t  uart0_irq = 4;
+    uint8_t  uart1_irq = 3;
 
     if (val & 0x10)
         uart1_io &= 0xfeff;
@@ -972,7 +975,8 @@ stpc_serial_init(const device_t *info)
 static void
 stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val)
 {
-    uint8_t old_addr = (dev->reg1 & 0x03), new_addr = (val & 0x03);
+    uint8_t old_addr = (dev->reg1 & 0x03);
+    uint8_t new_addr = (val & 0x03);
 
     switch (old_addr) {
         case 0x1:

src/chipset/umc_hb4.c

@@ -191,10 +191,10 @@ hb4_shadow_bios_low(hb4_t *dev)
 int
 hb4_shadow_main(hb4_t *dev)
 {
-    int i, state;
+    int state;
     int n = 0;
 
-    for (i = 0; i < 6; i++) {
+    for (uint8_t i = 0; i < 6; i++) {
         state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> (i + 2)) & 0x01)] | shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
 
         if (state != dev->mem_state[i + 1]) {

src/chipset/via_apollo.c

@@ -532,7 +532,7 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
             break;
 
         case 0x70:
-            if ((dev->id >= VIA_693A))
+            if (dev->id >= VIA_693A)
                 dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xdf) | (val & 0xdf);
             else if (dev->id == VIA_597)
                 dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xf1) | (val & 0xf1);

src/chipset/via_pipc.c

@@ -510,7 +510,8 @@ pipc_reset_hard(void *priv)
 static void
 pipc_ide_handlers(pipc_t *dev)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     ide_pri_disable();
     ide_sec_disable();
@@ -573,10 +574,14 @@ pipc_bus_master_handlers(pipc_t *dev)
 static void
 pipc_pcs_update(pipc_t *dev)
 {
-    uint8_t  i, io_base_reg, io_mask_reg, io_mask_shift, enable;
-    uint16_t io_base, io_mask;
+    uint8_t  io_base_reg;
+    uint8_t  io_mask_reg;
+    uint8_t  io_mask_shift;
+    uint8_t  enable;
+    uint16_t io_base;
+    uint16_t io_mask;
 
-    for (i = 0; i <= dev->max_pcs; i++) {
+    for (uint8_t i = 0; i <= dev->max_pcs; i++) {
         if (i & 2) {
             io_base_reg = 0x8c;
             io_mask_reg = 0x8a;
@@ -650,7 +655,6 @@ static void
 pipc_trap_update_596(void *priv)
 {
     pipc_t *dev = (pipc_t *) priv;
-    int     i;
 
     /* TRAP_DRQ (00000001) and TRAP_PIRQ (00000002) not implemented. */
 
@@ -681,7 +685,7 @@ pipc_trap_update_596(void *priv)
        by the Positive Decoding Control registers. I couldn't probe this behavior on hardware.
        It's better to be safe and cover all of them than to assume Intel-like behavior (one range). */
 
-    for (i = 0; i < 3; i++) {
+    for (uint8_t i = 0; i < 3; i++) {
         pipc_trap_update_paden(dev, TRAP_AUD_MIDI_0 + i,
                                0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x01),
                                0x300 + (0x10 * i), 4);
@@ -1158,7 +1162,7 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
             case 0x71:
             case 0x72:
             case 0x73:
-                dev->pci_isa_regs[(addr - 0x44)] = val;
+                dev->pci_isa_regs[addr - 0x44] = val;
                 break;
 
             case 0x74:
@@ -1428,7 +1432,7 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
             case 0x61:
             case 0x62:
             case 0x63:
-                dev->power_regs[(addr - 0x58)] = val;
+                dev->power_regs[addr - 0x58] = val;
                 break;
 
             case 0x70:

src/chipset/via_vt82c49x.c

@@ -65,9 +65,12 @@ vt82c49x_log(const char *fmt, ...)
 static void
 vt82c49x_recalc(vt82c49x_t *dev)
 {
-    int      i, relocate;
-    uint8_t  reg, bit;
-    uint32_t base, state;
+    int      i;
+    int      relocate;
+    uint8_t  reg;
+    uint8_t  bit;
+    uint32_t base;
+    uint32_t state;
     uint32_t shadow_bitmap = 0x00000000;
 
     relocate = (dev->regs[0x33] >> 2) & 0x03;
@@ -308,9 +311,7 @@ vt82c49x_read(uint16_t addr, void *priv)
 static void
 vt82c49x_reset(void *priv)
 {
-    uint16_t i;
-
-    for (i = 0; i < 256; i++)
+    for (uint16_t i = 0; i < 256; i++)
         vt82c49x_write(i, 0x00, priv);
 }
 

src/chipset/via_vt82c505.c

@@ -160,12 +160,11 @@ static void
 vt82c505_reset(void *priv)
 {
     vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
-    int         i;
 
     dev->pci_conf[0x04] = 0x07;
     dev->pci_conf[0x07] = 0x00;
 
-    for (i = 0x80; i <= 0x9f; i++) {
+    for (uint8_t i = 0x80; i <= 0x9f; i++) {
         switch (i) {
             case 0x81:
                 vt82c505_write(0, i, 0x01, priv);

src/chipset/vl82c480.c

@@ -61,15 +61,14 @@ vl82c480_shflags(uint8_t access)
 static void
 vl82c480_recalc(vl82c480_t *dev)
 {
-    int      i, j;
     uint32_t base;
     uint8_t  access;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (i = 0; i < 6; i++) {
-        for (j = 0; j < 8; j += 2) {
+    for (uint8_t i = 0; i < 6; i++) {
+        for (uint8_t j = 0; j < 8; j += 2) {
             base   = 0x000a0000 + (i << 16) + (j << 13);
             access = (dev->regs[0x0d + i] >> j) & 3;
             mem_set_mem_state(base, 0x4000, vl82c480_shflags(access));

src/config.c

@@ -78,7 +78,10 @@
 #include <86box/ui.h>
 #include <86box/snd_opl.h>
 
-static int   cx, cy, cw, ch;
+static int   cx;
+static int   cy;
+static int   cw;
+static int   ch;
 static ini_t config;
 
 /* TODO: Backwards compatibility, get rid of this when enough time has passed. */
@@ -223,7 +226,8 @@ static void
 load_monitor(int monitor_index)
 {
     ini_section_t cat;
-    char          name[512], temp[512];
+    char          name[512];
+    char          temp[512];
     char         *p = NULL;
 
     sprintf(name, "Monitor #%i", monitor_index + 1);
@@ -251,8 +255,14 @@ static void
 load_machine(void)
 {
     ini_section_t cat = ini_find_section(config, "Machine");
-    char         *p, *migrate_from = NULL;
-    int           c, i, j, speed, legacy_mfg, legacy_cpu;
+    char         *p;
+    char         *migrate_from = NULL;
+    int           c;
+    int           i;
+    int           j;
+    int           speed;
+    int           legacy_mfg;
+    int           legacy_cpu;
     double        multi;
 
     p = ini_section_get_string(cat, "machine", NULL);
@@ -582,7 +592,8 @@ load_input_devices(void)
 {
     ini_section_t cat = ini_find_section(config, "Input devices");
     char          temp[512];
-    int           c, d;
+    int           c;
+    int           d;
     char         *p;
 
     p = ini_section_get_string(cat, "mouse_type", NULL);
@@ -770,7 +781,8 @@ load_network(void)
     ini_section_t cat = ini_find_section(config, "Network");
     char         *p;
     char          temp[512];
-    uint16_t      c = 0, min = 0;
+    uint16_t      c = 0;
+    uint16_t      min = 0;
 
     /* Handle legacy configuration which supported only one NIC */
     p = ini_section_get_string(cat, "net_card", NULL);
@@ -875,7 +887,8 @@ load_ports(void)
     ini_section_t cat = ini_find_section(config, "Ports (COM & LPT)");
     char         *p;
     char          temp[512];
-    int           c, d;
+    int           c;
+    int           d;
 
     memset(temp, 0, sizeof(temp));
 
@@ -919,8 +932,10 @@ static void
 load_storage_controllers(void)
 {
     ini_section_t cat = ini_find_section(config, "Storage controllers");
-    char         *p, temp[512];
-    int           c, min = 0;
+    char         *p;
+    char          temp[512];
+    int           c;
+    int           min = 0;
     int           free_p = 0;
 
     /* TODO: Backwards compatibility, get rid of this when enough time has passed. */
@@ -1042,15 +1057,18 @@ static void
 load_hard_disks(void)
 {
     ini_section_t cat = ini_find_section(config, "Hard disks");
-    char          temp[512], tmp2[512];
+    char          temp[512];
+    char          tmp2[512];
     char          s[512];
-    int           c;
     char         *p;
-    uint32_t      max_spt, max_hpc, max_tracks;
-    uint32_t      board = 0, dev = 0;
+    uint32_t      max_spt;
+    uint32_t      max_hpc;
+    uint32_t      max_tracks;
+    uint32_t      board = 0;
+    uint32_t      dev = 0;
 
     memset(temp, '\0', sizeof(temp));
-    for (c = 0; c < HDD_NUM; c++) {
+    for (uint8_t c = 0; c < HDD_NUM; c++) {
         sprintf(temp, "hdd_%02i_parameters", c + 1);
         p = ini_section_get_string(cat, temp, "0, 0, 0, 0, none");
         sscanf(p, "%u, %u, %u, %i, %s",
@@ -1243,13 +1261,13 @@ static void
 load_floppy_drives(void)
 {
     ini_section_t cat = ini_find_section(config, "Floppy drives");
-    char          temp[512], *p;
-    int           c;
+    char          temp[512];
+    char         *p;
 
     if (!backwards_compat)
         return;
 
-    for (c = 0; c < FDD_NUM; c++) {
+    for (uint8_t c = 0; c < FDD_NUM; c++) {
         sprintf(temp, "fdd_%02i_type", c + 1);
         p = ini_section_get_string(cat, temp, (c < 2) ? "525_2dd" : "none");
         fdd_set_type(c, fdd_get_from_internal_name(p));
@@ -1304,10 +1322,14 @@ static void
 load_floppy_and_cdrom_drives(void)
 {
     ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives");
-    char          temp[512], tmp2[512], *p;
+    char          temp[512];
+    char          tmp2[512];
+    char         *p;
     char          s[512];
-    unsigned int  board = 0, dev = 0;
-    int           c, d           = 0;
+    unsigned int  board = 0;
+    unsigned int  dev = 0;
+    int           c;
+    int           d = 0;
 
     /* TODO: Backwards compatibility, get rid of this when enough time has passed. */
     backwards_compat = (cat == NULL);
@@ -1524,10 +1546,14 @@ static void
 load_other_removable_devices(void)
 {
     ini_section_t cat = ini_find_section(config, "Other removable devices");
-    char          temp[512], tmp2[512], *p;
+    char          temp[512];
+    char          tmp2[512];
+    char         *p;
     char          s[512];
-    unsigned int  board = 0, dev = 0;
-    int           c, d           = 0;
+    unsigned int  board = 0;
+    unsigned int  dev = 0;
+    int           c;
+    int           d = 0;
 
     /* TODO: Backwards compatibility, get rid of this when enough time has passed. */
     if (backwards_compat) {
@@ -1802,7 +1828,7 @@ load_other_peripherals(void)
     ini_section_t cat = ini_find_section(config, "Other peripherals");
     char         *p;
     char          temp[512];
-    int           c, free_p = 0;
+    int           free_p = 0;
 
     if (backwards_compat2) {
         p = ini_section_get_string(cat, "scsicard", NULL);
@@ -1859,7 +1885,7 @@ load_other_peripherals(void)
     bugger_enabled   = !!ini_section_get_int(cat, "bugger_enabled", 0);
     postcard_enabled = !!ini_section_get_int(cat, "postcard_enabled", 0);
 
-    for (c = 0; c < ISAMEM_MAX; c++) {
+    for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
         sprintf(temp, "isamem%d_type", c);
 
         p              = ini_section_get_string(cat, temp, "none");
@@ -1980,7 +2006,8 @@ static void
 save_general(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "General");
-    char          temp[512], buffer[512] = { 0 };
+    char          temp[512];
+    char          buffer[512] = { 0 };
 
     char *va_name;
 
@@ -2182,7 +2209,11 @@ save_machine(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Machine");
     char         *p;
-    int           c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1;
+    int           c;
+    int           i = 0;
+    int           legacy_mfg;
+    int           legacy_cpu = -1;
+    int           closest_legacy_cpu = -1;
 
     p = machine_get_internal_name();
     ini_section_set_string(cat, "machine", p);
@@ -2327,8 +2358,10 @@ static void
 save_input_devices(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Input devices");
-    char          temp[512], tmp2[512];
-    int           c, d;
+    char          temp[512];
+    char          tmp2[512];
+    int           c;
+    int           d;
 
     ini_section_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type));
 
@@ -2462,7 +2495,6 @@ save_sound(void)
 static void
 save_network(void)
 {
-    int           c = 0;
     char          temp[512];
     ini_section_t cat = ini_find_or_create_section(config, "Network");
 
@@ -2470,7 +2502,7 @@ save_network(void)
     ini_section_delete_var(cat, "net_host_device");
     ini_section_delete_var(cat, "net_card");
 
-    for (c = 0; c < NET_CARD_MAX; c++) {
+    for (uint8_t c = 0; c < NET_CARD_MAX; c++) {
         sprintf(temp, "net_%02i_card", c + 1);
         if (net_cards_conf[c].device_num == 0) {
             ini_section_delete_var(cat, temp);
@@ -2522,7 +2554,8 @@ save_ports(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Ports (COM & LPT)");
     char          temp[512];
-    int           c, d;
+    int           c;
+    int           d;
 
     for (c = 0; c < SERIAL_MAX; c++) {
         sprintf(temp, "serial%d_enabled", c + 1);
@@ -2675,7 +2708,6 @@ save_other_peripherals(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Other peripherals");
     char          temp[512];
-    int           c;
 
     if (bugger_enabled == 0)
         ini_section_delete_var(cat, "bugger_enabled");
@@ -2687,7 +2719,7 @@ save_other_peripherals(void)
     else
         ini_section_set_int(cat, "postcard_enabled", postcard_enabled);
 
-    for (c = 0; c < ISAMEM_MAX; c++) {
+    for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
         sprintf(temp, "isamem%d_type", c);
         if (isamem_type[c] == 0)
             ini_section_delete_var(cat, temp);
@@ -2710,12 +2742,12 @@ static void
 save_hard_disks(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Hard disks");
-    char          temp[32], tmp2[512];
+    char          temp[32];
+    char          tmp2[512];
     char         *p;
-    int           c;
 
     memset(temp, 0x00, sizeof(temp));
-    for (c = 0; c < HDD_NUM; c++) {
+    for (uint8_t c = 0; c < HDD_NUM; c++) {
         sprintf(temp, "hdd_%02i_parameters", c + 1);
         if (hdd_is_valid(c)) {
             p = hdd_bus_to_string(hdd[c].bus, 0);
@@ -2789,7 +2821,8 @@ static void
 save_floppy_and_cdrom_drives(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Floppy and CD-ROM drives");
-    char          temp[512], tmp2[512];
+    char          temp[512];
+    char          tmp2[512];
     int           c;
 
     for (c = 0; c < FDD_NUM; c++) {
@@ -2925,7 +2958,8 @@ static void
 save_other_removable_devices(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Other removable devices");
-    char          temp[512], tmp2[512];
+    char          temp[512];
+    char          tmp2[512];
     int           c;
 
     for (c = 0; c < ZIP_NUM; c++) {
@@ -3012,10 +3046,8 @@ save_other_removable_devices(void)
 void
 config_save(void)
 {
-    int i;
-
     save_general(); /* General */
-    for (i = 0; i < MONITORS_NUM; i++)
+    for (uint8_t i = 0; i < MONITORS_NUM; i++)
         save_monitor(i);
     save_machine();                 /* Machine */
     save_video();                   /* Video */

src/cpu/cpu.h

@@ -408,8 +408,6 @@ typedef struct {
     uint16_t flags, eflags;
 
     uint32_t _smbase;
-
-    uint8_t inside_emulation_mode;
 } cpu_state_t;
 
 typedef struct {

src/cpu/softfloat/softfloatx80.h

@@ -80,7 +80,11 @@ int floatx80_compare_quiet(floatx80 a, floatx80 b, struct float_status_t *status
 | for Binary Floating-Point Arithmetic.
 *----------------------------------------------------------------------------*/
 
+#ifdef __cplusplus
+BX_CPP_INLINE floatx80& floatx80_abs(floatx80 &reg)
+#else
 BX_CPP_INLINE floatx80 floatx80_abs(floatx80 reg)
+#endif
 {
     reg.exp &= 0x7FFF;
     return reg;
@@ -92,7 +96,11 @@ BX_CPP_INLINE floatx80 floatx80_abs(floatx80 reg)
 | Floating-Point Arithmetic.
 *----------------------------------------------------------------------------*/
 
+#ifdef __cplusplus
+BX_CPP_INLINE floatx80& floatx80_chs(floatx80 &reg)
+#else
 BX_CPP_INLINE floatx80 floatx80_chs(floatx80 reg)
+#endif
 {
     reg.exp ^= 0x8000;
     return reg;

src/cpu/x86_ops_i686.h

@@ -52,7 +52,64 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
     uint8_t   ftwb       = 0;
     uint16_t  rec_ftw    = 0;
     uint16_t  fpus       = 0;
-    uint64_t *p;
+    int       i, mmx_tags = 0;
+    uint16_t  exp        = 0x0000;
+    uint64_t  mant       = 0x0000000000000000ULL;
+    uint64_t  fraction;
+    uint8_t   jm, valid;
+                                      /* Exp_all_1 Exp_all_0 Frac_all_0 J M FTW_Valid  |  Ent
+                                         ----------------------------------------------+------ */
+    uint8_t   ftw_table_idx;
+    uint8_t   ftw_table[48] = { 0x03,   /* 0         0         0          0 0 0          |  0x00 */
+                                0x02,   /* 0         0         0          0 0 1          |  0x01 */
+                                0x03,   /* 0         0         0          0 0 0          |  0x02 */
+                                0x02,   /* 0         0         0          0 1 1          |  0x03 */
+                                0x03,   /* 0         0         0          1 0 0          |  0x04 */
+                                0x00,   /* 0         0         0          1 0 1          |  0x05 */
+                                0x03,   /* 0         0         0          1 1 0          |  0x06 */
+                                0x00,   /* 0         0         0          1 1 1          |  0x07 */
+                                0x03,   /* 0         0         1          0 0 0          |  0x08 */
+                                0x02,   /* 0         0         1          0 0 1          |  0x09 */
+                                0x03,   /* 0         0         1          0 1 0          |  0x0a - Impossible */
+                                0x03,   /* 0         0         1          0 1 1          |  0x0b - Impossible */
+                                0x03,   /* 0         0         1          1 0 0          |  0x0c */
+                                0x02,   /* 0         0         1          1 0 1          |  0x0d */
+                                0x03,   /* 0         0         1          1 1 0          |  0x0e - Impossible */
+                                0x03,   /* 0         0         1          1 1 1          |  0x0f - Impossible */
+                                0x03,   /* 0         1         0          0 0 0          |  0x10 */
+                                0x02,   /* 0         1         0          0 0 1          |  0x11 */
+                                0x03,   /* 0         1         0          0 1 0          |  0x12 */
+                                0x02,   /* 0         1         0          0 1 1          |  0x13 */
+                                0x03,   /* 0         1         0          1 0 0          |  0x14 */
+                                0x02,   /* 0         1         0          1 0 1          |  0x15 */
+                                0x03,   /* 0         1         0          1 1 0          |  0x16 */
+                                0x02,   /* 0         1         0          1 1 1          |  0x17 */
+                                0x03,   /* 0         1         1          0 0 0          |  0x18 */
+                                0x01,   /* 0         1         1          0 0 1          |  0x19 */
+                                0x03,   /* 0         1         1          0 1 0          |  0x1a - Impossible */
+                                0x03,   /* 0         1         1          0 1 1          |  0x1b - Impossible */
+                                0x03,   /* 0         1         1          1 0 0          |  0x1c */
+                                0x01,   /* 0         1         1          1 0 1          |  0x1d */
+                                0x03,   /* 0         1         1          1 1 0          |  0x1e - Impossible */
+                                0x03,   /* 0         1         1          1 1 1          |  0x1f - Impossible */
+                                0x03,   /* 1         0         0          0 0 0          |  0x20 */
+                                0x02,   /* 1         0         0          0 0 1          |  0x21 */
+                                0x03,   /* 1         0         0          0 1 0          |  0x22 */
+                                0x02,   /* 1         0         0          0 1 1          |  0x23 */
+                                0x03,   /* 1         0         0          1 0 0          |  0x24 */
+                                0x02,   /* 1         0         0          1 0 1          |  0x25 */
+                                0x03,   /* 1         0         0          1 1 0          |  0x26 */
+                                0x02,   /* 1         0         0          1 1 1          |  0x27 */
+                                0x03,   /* 1         0         1          0 0 0          |  0x28 */
+                                0x02,   /* 1         0         1          0 0 1          |  0x29 */
+                                0x03,   /* 1         0         1          0 1 0          |  0x2a - Impossible */
+                                0x03,   /* 1         0         1          0 1 1          |  0x2b - Impossible */
+                                0x03,   /* 1         0         1          1 0 0          |  0x2c */
+                                0x02,   /* 1         0         1          1 0 1          |  0x2d */
+                                0x03,   /* 1         0         1          1 1 0          |  0x2e - Impossible */
+                                0x03 }; /* 1         0         1          1 1 1          |  0x2f - Impossible */
+                                  /* M is the most significant bit of the franction, so it is impossible
+                                     for M to o be 1 when the fraction is all 0's. */
 
     if (CPUID < 0x650)
         return ILLEGAL(fetchdat);
@@ -96,90 +153,70 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
 
         ftwb = readmemb(easeg, cpu_state.eaaddr + 4);
 
-        if (ftwb & 0x01)
-            rec_ftw |= 0x0003;
-        if (ftwb & 0x02)
-            rec_ftw |= 0x000C;
-        if (ftwb & 0x04)
-            rec_ftw |= 0x0030;
-        if (ftwb & 0x08)
-            rec_ftw |= 0x00C0;
-        if (ftwb & 0x10)
-            rec_ftw |= 0x0300;
-        if (ftwb & 0x20)
-            rec_ftw |= 0x0C00;
-        if (ftwb & 0x40)
-            rec_ftw |= 0x3000;
-        if (ftwb & 0x80)
-            rec_ftw |= 0xC000;
-
         x87_op_off = readmeml(easeg, cpu_state.eaaddr + 16);
         x87_op_off |= (readmemw(easeg, cpu_state.eaaddr + 6) >> 12) << 16;
         x87_op_seg = readmemw(easeg, cpu_state.eaaddr + 20);
 
-        cpu_state.eaaddr = old_eaaddr + 32;
-        x87_ldmmx(&(cpu_state.MM[0]), &(cpu_state.MM_w4[0]));
-        x87_ld_frstor(0);
+        for (i = 0; i <= 7; i++) {
+            cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
+            mant = readmemq(easeg, cpu_state.eaaddr);
+            fraction = mant & 0x7fffffffffffffffULL;
+            exp = readmemw(easeg, cpu_state.eaaddr + 8);
+            jm = (mant >> 62) & 0x03;
+            valid = !(ftwb & (1 << i));
 
-        cpu_state.eaaddr = old_eaaddr + 48;
-        x87_ldmmx(&(cpu_state.MM[1]), &(cpu_state.MM_w4[1]));
-        x87_ld_frstor(1);
+            ftw_table_idx = (!!(exp == 0x1111)) << 5;
+            ftw_table_idx |= (!!(exp == 0x0000)) << 4;
+            ftw_table_idx |= (!!(fraction == 0x0000000000000000ULL)) << 3;
+            ftw_table_idx |= (jm << 1);
+            ftw_table_idx |= valid;
 
-        cpu_state.eaaddr = old_eaaddr + 64;
-        x87_ldmmx(&(cpu_state.MM[2]), &(cpu_state.MM_w4[2]));
-        x87_ld_frstor(2);
+            rec_ftw |= (ftw_table[ftw_table_idx] << (i << 1));
 
-        cpu_state.eaaddr = old_eaaddr + 80;
-        x87_ldmmx(&(cpu_state.MM[3]), &(cpu_state.MM_w4[3]));
-        x87_ld_frstor(3);
-
-        cpu_state.eaaddr = old_eaaddr + 96;
-        x87_ldmmx(&(cpu_state.MM[4]), &(cpu_state.MM_w4[4]));
-        x87_ld_frstor(4);
-
-        cpu_state.eaaddr = old_eaaddr + 112;
-        x87_ldmmx(&(cpu_state.MM[5]), &(cpu_state.MM_w4[5]));
-        x87_ld_frstor(5);
-
-        cpu_state.eaaddr = old_eaaddr + 128;
-        x87_ldmmx(&(cpu_state.MM[6]), &(cpu_state.MM_w4[6]));
-        x87_ld_frstor(6);
-
-        cpu_state.eaaddr = old_eaaddr + 144;
-        x87_ldmmx(&(cpu_state.MM[7]), &(cpu_state.MM_w4[7]));
-        x87_ld_frstor(7);
+            if (exp == 0xffff)
+                mmx_tags++;
+        }
 
         cpu_state.ismmx = 0;
-        /*Horrible hack, but as 86Box doesn't keep the FPU stack in 80-bit precision at all times
-          something like this is needed*/
-        p = (uint64_t *) cpu_state.tag;
-#ifdef USE_NEW_DYNAREC
-        if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff && cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff && !cpu_state.TOP && (*p == 0x0101010101010101ull))
-#else
-        if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff && cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff && !cpu_state.TOP && !(*p))
-#endif
+        /* Determine, whether or not the saved state is x87 or MMX based on a heuristic,
+           because we do not keep the internal state in 64-bit precision.
+
+           TODO: Is there no way to unify the whole lot? */
+        if ((mmx_tags == 8) && !cpu_state.TOP)
             cpu_state.ismmx = 1;
 
         x87_settag(rec_ftw);
 
+        if (cpu_state.ismmx) {
+            for (i = 0; i <= 7; i++) {
+                cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
+                x87_ldmmx(&(cpu_state.MM[i]), &(cpu_state.MM_w4[i]));
+            }
+        } else {
+            for (i = 0; i <= 7; i++) {
+                cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
+                x87_ld_frstor(i);
+            }
+        }
+
         CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
     } else {
         /* FXSAVE */
-        if ((twd & 0x0003) == 0x0003)
+        if ((twd & 0x0003) != 0x0003)
             ftwb |= 0x01;
-        if ((twd & 0x000C) == 0x000C)
+        if ((twd & 0x000c) != 0x000c)
             ftwb |= 0x02;
-        if ((twd & 0x0030) == 0x0030)
+        if ((twd & 0x0030) != 0x0030)
             ftwb |= 0x04;
-        if ((twd & 0x00C0) == 0x00C0)
+        if ((twd & 0x00c0) != 0x00c0)
             ftwb |= 0x08;
-        if ((twd & 0x0300) == 0x0300)
+        if ((twd & 0x0300) != 0x0300)
             ftwb |= 0x10;
-        if ((twd & 0x0C00) == 0x0C00)
+        if ((twd & 0x0c00) != 0x0c00)
             ftwb |= 0x20;
-        if ((twd & 0x3000) == 0x3000)
+        if ((twd & 0x3000) != 0x3000)
             ftwb |= 0x40;
-        if ((twd & 0xC000) == 0xC000)
+        if ((twd & 0xc000) != 0xc000)
             ftwb |= 0x80;
 
         writememw(easeg, cpu_state.eaaddr, cpu_state.npxc);
@@ -193,44 +230,20 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
         writememl(easeg, cpu_state.eaaddr + 16, x87_op_off);
         writememw(easeg, cpu_state.eaaddr + 20, x87_op_seg);
 
-        cpu_state.eaaddr = old_eaaddr + 32;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[0]) : x87_st_fsave(0);
-
-        cpu_state.eaaddr = old_eaaddr + 48;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[1]) : x87_st_fsave(1);
-
-        cpu_state.eaaddr = old_eaaddr + 64;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[2]) : x87_st_fsave(2);
-
-        cpu_state.eaaddr = old_eaaddr + 80;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[3]) : x87_st_fsave(3);
-
-        cpu_state.eaaddr = old_eaaddr + 96;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[4]) : x87_st_fsave(4);
-
-        cpu_state.eaaddr = old_eaaddr + 112;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[5]) : x87_st_fsave(5);
-
-        cpu_state.eaaddr = old_eaaddr + 128;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[6]) : x87_st_fsave(6);
-
-        cpu_state.eaaddr = old_eaaddr + 144;
-        cpu_state.ismmx ? x87_stmmx(cpu_state.MM[7]) : x87_st_fsave(7);
+        if (cpu_state.ismmx) {
+            for (i = 0; i <= 7; i++) {
+                cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
+                x87_stmmx(cpu_state.MM[i]);
+            }
+        } else {
+            for (i = 0; i <= 7; i++) {
+                cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
+                x87_st_fsave(i);
+            }
+        }
 
         cpu_state.eaaddr = old_eaaddr;
 
-        cpu_state.npxc = 0x37F;
-        codegen_set_rounding_mode(X87_ROUNDING_NEAREST);
-        cpu_state.npxs = 0;
-        p              = (uint64_t *) cpu_state.tag;
-#ifdef USE_NEW_DYNAREC
-        *p = 0;
-#else
-        *p = 0x0303030303030303ll;
-#endif
-        cpu_state.TOP   = 0;
-        cpu_state.ismmx = 0;
-
         CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
     }
 

src/cpu/x86_ops_rep.h

@@ -226,11 +226,11 @@
             uint8_t temp;                                                                                         \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG);                                                   \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG);                                               \
             high_page = 0;                                                                                        \
             do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG);                                               \
             do_mmut_wb(es, DEST_REG, &addr64_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -280,11 +280,11 @@
             uint16_t temp;                                                                                        \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL);                                             \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                         \
             high_page = 0;                                                                                        \
             do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                         \
             do_mmut_ww(es, DEST_REG, addr64a_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -334,11 +334,11 @@
             uint32_t temp;                                                                                        \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL);                                             \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                         \
             high_page = 0;                                                                                        \
             do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                         \
             do_mmut_wl(es, DEST_REG, addr64a_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -582,11 +582,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG);                                                       \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG);                                                    \
             high_page = uncached = 0;                                                                             \
             do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG);                                                    \
             do_mmut_rb2(es, DEST_REG, &addr64_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
@@ -636,11 +636,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL);                                                 \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                              \
             high_page = uncached = 0;                                                                             \
             do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                              \
             do_mmut_rw2(es, DEST_REG, addr64a_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
@@ -690,11 +690,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL);                                                 \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                              \
             high_page = uncached = 0;                                                                             \
             do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                              \
             do_mmut_rl2(es, DEST_REG, addr64a_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \

src/cpu/x86_ops_rep_dyn.h

@@ -189,11 +189,11 @@
             uint8_t temp;                                                                                         \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG);                                                   \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG);                                               \
             high_page = 0;                                                                                        \
             do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG);                                               \
             do_mmut_wb(es, DEST_REG, &addr64_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -238,11 +238,11 @@
             uint16_t temp;                                                                                        \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL);                                             \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                         \
             high_page = 0;                                                                                        \
             do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                         \
             do_mmut_ww(es, DEST_REG, addr64a_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -287,11 +287,11 @@
             uint32_t temp;                                                                                        \
                                                                                                                   \
             CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL);                                             \
+            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                         \
             high_page = 0;                                                                                        \
             do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
-            CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                         \
             do_mmut_wl(es, DEST_REG, addr64a_2);                                                                  \
             if (cpu_state.abrt)                                                                                   \
                 break;                                                                                            \
@@ -507,11 +507,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG);                                                       \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG);                                                    \
             high_page = uncached = 0;                                                                             \
             do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG);                                                    \
             do_mmut_rb2(es, DEST_REG, &addr64_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
@@ -558,11 +558,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL);                                                 \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                              \
             high_page = uncached = 0;                                                                             \
             do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL);                                              \
             do_mmut_rw2(es, DEST_REG, addr64a_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
@@ -609,11 +609,11 @@
             SEG_CHECK_READ(cpu_state.ea_seg);                                                                     \
             SEG_CHECK_READ(&cpu_state.seg_es);                                                                    \
             CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL);                                                 \
+            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                              \
             high_page = uncached = 0;                                                                             \
             do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a);                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \
-            CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL);                                              \
             do_mmut_rl2(es, DEST_REG, addr64a_2);                                                                 \
             if (cpu_state.abrt)                                                                                   \
                 return 1;                                                                                         \

src/cpu/x86_ops_string.h

@@ -6,13 +6,13 @@ opMOVSB_a16(uint32_t fetchdat)
     addr64 = addr64_2 = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI);
+    CHECK_WRITE(&cpu_state.seg_es, DI, DI);
     high_page = 0;
     do_mmut_rb(cpu_state.ea_seg->base, SI, &addr64);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, DI, DI);
 
     do_mmut_wb(es, DI, &addr64_2);
     if (cpu_state.abrt)
@@ -42,13 +42,13 @@ opMOVSB_a32(uint32_t fetchdat)
     addr64 = addr64_2 = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI);
+    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI);
     high_page = 0;
     do_mmut_rb(cpu_state.ea_seg->base, ESI, &addr64);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI);
     do_mmut_wb(es, EDI, &addr64_2);
     if (cpu_state.abrt)
         return 1;
@@ -79,13 +79,13 @@ opMOVSW_a16(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI + 1UL);
+    CHECK_WRITE(&cpu_state.seg_es, DI, DI + 1UL);
     high_page = 0;
     do_mmut_rw(cpu_state.ea_seg->base, SI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, DI, DI + 1UL);
     do_mmut_ww(es, DI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -115,13 +115,13 @@ opMOVSW_a32(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI + 1UL);
+    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 1UL);
     high_page = 0;
     do_mmut_rw(cpu_state.ea_seg->base, ESI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 1UL);
     do_mmut_ww(es, EDI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -152,13 +152,13 @@ opMOVSL_a16(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI + 3UL);
+    CHECK_WRITE(&cpu_state.seg_es, DI, DI + 3UL);
     high_page = 0;
     do_mmut_rl(cpu_state.ea_seg->base, SI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, DI, DI + 3UL);
     do_mmut_wl(es, DI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -188,13 +188,13 @@ opMOVSL_a32(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_WRITE(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI + 3UL);
+    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 3UL);
     high_page = 0;
     do_mmut_rl(cpu_state.ea_seg->base, ESI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_WRITE(&cpu_state.seg_es);
-    CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 3UL);
     do_mmut_wl(es, EDI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -224,13 +224,13 @@ opCMPSB_a16(uint32_t fetchdat)
     addr64 = addr64_2 = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI);
+    CHECK_READ(&cpu_state.seg_es, DI, DI);
     high_page = uncached = 0;
     do_mmut_rb(cpu_state.ea_seg->base, SI, &addr64);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, DI, DI);
     do_mmut_rb2(es, DI, &addr64_2);
     if (cpu_state.abrt)
         return 1;
@@ -264,13 +264,13 @@ opCMPSB_a32(uint32_t fetchdat)
     addr64 = addr64_2 = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI);
+    CHECK_READ(&cpu_state.seg_es, EDI, EDI);
     high_page = uncached = 0;
     do_mmut_rb(cpu_state.ea_seg->base, ESI, &addr64);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, EDI, EDI);
     do_mmut_rb2(es, EDI, &addr64_2);
     if (cpu_state.abrt)
         return 1;
@@ -306,13 +306,13 @@ opCMPSW_a16(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI + 1UL);
+    CHECK_READ(&cpu_state.seg_es, DI, DI + 1UL);
     high_page = uncached = 0;
     do_mmut_rw(cpu_state.ea_seg->base, SI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, DI, DI + 1UL);
     do_mmut_rw2(es, DI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -347,13 +347,13 @@ opCMPSW_a32(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI + 1UL);
+    CHECK_READ(&cpu_state.seg_es, EDI, EDI + 1UL);
     high_page = uncached = 0;
     do_mmut_rw(cpu_state.ea_seg->base, ESI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, EDI, EDI + 1UL);
     do_mmut_rw2(es, EDI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -389,13 +389,13 @@ opCMPSL_a16(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, SI, SI + 3UL);
+    CHECK_READ(&cpu_state.seg_es, DI, DI + 3UL);
     high_page = uncached = 0;
     do_mmut_rl(cpu_state.ea_seg->base, SI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, DI, DI + 3UL);
     do_mmut_rl2(es, DI, addr64a_2);
     if (cpu_state.abrt)
         return 1;
@@ -430,13 +430,13 @@ opCMPSL_a32(uint32_t fetchdat)
     addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000;
 
     SEG_CHECK_READ(cpu_state.ea_seg);
+    SEG_CHECK_READ(&cpu_state.seg_es);
     CHECK_READ(cpu_state.ea_seg, ESI, ESI + 3UL);
+    CHECK_READ(&cpu_state.seg_es, EDI, EDI + 3UL);
     high_page = uncached = 0;
     do_mmut_rl(cpu_state.ea_seg->base, ESI, addr64a);
     if (cpu_state.abrt)
         return 1;
-    SEG_CHECK_READ(&cpu_state.seg_es);
-    CHECK_READ(&cpu_state.seg_es, EDI, EDI + 3UL);
     do_mmut_rl2(es, EDI, addr64a_2);
     if (cpu_state.abrt)
         return 1;

src/ddma.c

@@ -91,7 +91,7 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p)
     ddma_channel_t *dev          = (ddma_channel_t *) p;
     int             ch           = dev->channel;
     int             page_regs[4] = { 7, 3, 1, 2 };
-    int             i, dmab = (ch >= 4) ? 0xc0 : 0x00;
+    int             dmab = (ch >= 4) ? 0xc0 : 0x00;
 
     switch (addr & 0x0f) {
         case 0x00:
@@ -132,7 +132,7 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p)
             outb(dmab + 0x0d, val);
             break;
         case 0x0e:
-            for (i = 0; i < 4; i++)
+            for (uint8_t i = 0; i < 4; i++)
                 outb(dmab + 0x0a, i);
             break;
         case 0x0f:
@@ -166,14 +166,13 @@ static void *
 ddma_init(const device_t *info)
 {
     ddma_t *dev;
-    int     i;
 
     dev = (ddma_t *) malloc(sizeof(ddma_t));
     if (dev == NULL)
         return (NULL);
     memset(dev, 0x00, sizeof(ddma_t));
 
-    for (i = 0; i < 8; i++)
+    for (uint8_t i = 0; i < 8; i++)
         dev->channels[i].channel = i;
 
     return dev;

src/device.c

@@ -59,7 +59,8 @@
 
 static device_t        *devices[DEVICE_MAX];
 static void            *device_priv[DEVICE_MAX];
-static device_context_t device_current, device_prev;
+static device_context_t device_current;
+static device_context_t device_prev;
 
 #ifdef ENABLE_DEVICE_LOG
 int device_do_log = ENABLE_DEVICE_LOG;
@@ -89,7 +90,8 @@ device_init(void)
 void
 device_set_context(device_context_t *c, const device_t *d, int inst)
 {
-    void *sec, *single_sec;
+    void *sec;
+    void *single_sec;
 
     memset(c, 0, sizeof(device_context_t));
     c->dev      = d;
@@ -184,7 +186,7 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
     } else
         device_priv[c] = p;
 
-    return (priv);
+    return priv;
 }
 
 char *
@@ -301,9 +303,7 @@ device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv
 void
 device_close_all(void)
 {
-    int c;
-
-    for (c = (DEVICE_MAX - 1); c >= 0; c--) {
+    for (int16_t c = (DEVICE_MAX - 1); c >= 0; c--) {
         if (devices[c] != NULL) {
             if (devices[c]->name)
                 device_log("Closing device: \"%s\"...\n", devices[c]->name);
@@ -317,9 +317,7 @@ device_close_all(void)
 void
 device_reset_all(uint32_t match_flags)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if ((devices[c]->reset != NULL) && (devices[c]->flags & match_flags))
                 devices[c]->reset(device_priv[c]);
@@ -330,9 +328,7 @@ device_reset_all(uint32_t match_flags)
 void *
 device_get_priv(const device_t *d)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if (devices[c] == d)
                 return (device_priv[c]);
@@ -347,7 +343,7 @@ device_available(const device_t *d)
 {
     device_config_t      *config = NULL;
     device_config_bios_t *bios   = NULL;
-    int                   bf, roms_present = 0;
+    int                   roms_present = 0;
     int                   i = 0;
 
     if (d != NULL) {
@@ -360,7 +356,7 @@ device_available(const device_t *d)
                     /* Go through the ROM's in the device configuration. */
                     while (bios->files_no != 0) {
                         i = 0;
-                        for (bf = 0; bf < bios->files_no; bf++)
+                        for (int bf = 0; bf < bios->files_no; bf++)
                             i += !!rom_present((char *) bios->files[bf]);
                         if (i == bios->files_no)
                             roms_present++;
@@ -377,11 +373,11 @@ device_available(const device_t *d)
         if (d->available != NULL)
             return (d->available());
         else
-            return (1);
+            return 1;
     }
 
     /* A NULL device is never available. */
-    return (0);
+    return 0;
 }
 
 const char *
@@ -443,9 +439,7 @@ device_has_config(const device_t *d)
 int
 device_poll(const device_t *d, int x, int y, int z, int b)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if (devices[c] == d) {
                 if (devices[c]->poll)
@@ -454,15 +448,13 @@ device_poll(const device_t *d, int x, int y, int z, int b)
         }
     }
 
-    return (0);
+    return 0;
 }
 
 void
 device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if (devices[c] == d) {
                 if (devices[c]->register_pci_slot)
@@ -478,8 +470,10 @@ device_register_pci_slot(const device_t *d, int device, int type, int inta, int
 void
 device_get_name(const device_t *d, int bus, char *name)
 {
-    char *sbus = NULL, *fbus;
-    char *tname, pbus[8] = { 0 };
+    char *sbus = NULL;
+    char *fbus;
+    char *tname;
+    char  pbus[8] = { 0 };
 
     if (d == NULL)
         return;
@@ -568,9 +562,7 @@ device_get_name(const device_t *d, int bus, char *name)
 void
 device_speed_changed(void)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if (devices[c]->speed_changed != NULL)
                 devices[c]->speed_changed(device_priv[c]);
@@ -583,9 +575,7 @@ device_speed_changed(void)
 void
 device_force_redraw(void)
 {
-    int c;
-
-    for (c = 0; c < DEVICE_MAX; c++) {
+    for (uint16_t c = 0; c < DEVICE_MAX; c++) {
         if (devices[c] != NULL) {
             if (devices[c]->force_redraw != NULL)
                 devices[c]->force_redraw(device_priv[c]);
@@ -626,7 +616,7 @@ device_get_config_int(const char *s)
         c++;
     }
 
-    return (0);
+    return 0;
 }
 
 int
@@ -641,7 +631,7 @@ device_get_config_int_ex(const char *s, int def)
         c++;
     }
 
-    return (def);
+    return def;
 }
 
 int
@@ -656,7 +646,7 @@ device_get_config_hex16(const char *s)
         c++;
     }
 
-    return (0);
+    return 0;
 }
 
 int
@@ -671,7 +661,7 @@ device_get_config_hex20(const char *s)
         c++;
     }
 
-    return (0);
+    return 0;
 }
 
 int
@@ -686,7 +676,7 @@ device_get_config_mac(const char *s, int def)
         c++;
     }
 
-    return (def);
+    return def;
 }
 
 void
@@ -753,39 +743,39 @@ int
 device_is_valid(const device_t *device, int m)
 {
     if (device == NULL)
-        return (1);
+        return 1;
 
     if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2))
-        return (0);
+        return 0;
 
     if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97))
-        return (0);
+        return 0;
 
-    return (1);
+    return 1;
 }
 
 int
@@ -795,7 +785,7 @@ machine_get_config_int(char *s)
     const device_config_t *c;
 
     if (d == NULL)
-        return (0);
+        return 0;
 
     c = d->config;
     while (c && c->type != -1) {
@@ -805,7 +795,7 @@ machine_get_config_int(char *s)
         c++;
     }
 
-    return (0);
+    return 0;
 }
 
 char *
@@ -815,7 +805,7 @@ machine_get_config_string(char *s)
     const device_config_t *c;
 
     if (d == NULL)
-        return (0);
+        return 0;
 
     c = d->config;
     while (c && c->type != -1) {
@@ -825,5 +815,5 @@ machine_get_config_string(char *s)
         c++;
     }
 
-    return (NULL);
+    return NULL;
 }

src/device/bugger.c

@@ -74,14 +74,16 @@
 #define CTRL_RESET 0xff /* this resets the board */
 #define BUG_DATA   1
 
-static uint8_t bug_ctrl, /* control register */
-    bug_data,            /* data register */
-    bug_ledr, bug_ledg,  /* RED and GREEN LEDs */
-    bug_seg1, bug_seg2,  /* LEFT and RIGHT 7SEG displays */
-    bug_spcfg;           /* serial port configuration */
+static uint8_t bug_ctrl;  /* control register */
+static uint8_t bug_data;  /* data register */
+static uint8_t bug_ledr;  /* RED LEDs */
+static uint8_t bug_ledg;  /* GREEN LEDs */
+static uint8_t bug_seg1;
+static uint8_t bug_seg2;  /* LEFT and RIGHT 7SEG displays */
+static uint8_t bug_spcfg; /* serial port configuration */
 #define FIFO_LEN 256
-static uint8_t bug_buff[FIFO_LEN], /* serial port data buffer */
-    *bug_bptr;
+static uint8_t  bug_buff[FIFO_LEN]; /* serial port data buffer */
+static uint8_t *bug_bptr;
 #define UISTR_LEN 24
 static char bug_str[UISTR_LEN]; /* UI output string */
 
@@ -312,7 +314,7 @@ bug_read(uint16_t port, void *priv)
                 break;
         }
 
-    return (ret);
+    return ret;
 }
 
 /* Initialize the ISA BusBugger emulator. */

src/device/cartridge.c

@@ -175,15 +175,13 @@ cart_close(int drive)
 void
 cart_reset(void)
 {
-    int i;
-
     cart_image_close(1);
     cart_image_close(0);
 
     if (!machine_has_cartridge(machine))
         return;
 
-    for (i = 0; i < 2; i++) {
+    for (uint8_t i = 0; i < 2; i++) {
         mem_mapping_add(&cart_mappings[i], 0x000d0000, 0x00002000,
                         cart_read, NULL, NULL,
                         NULL, NULL, NULL,

src/device/cassette.c

@@ -45,9 +45,11 @@ pc_cassette_t *cassette;
 
 char          cassette_fname[512];
 char          cassette_mode[512];
-unsigned long cassette_pos, cassette_srate;
+unsigned long cassette_pos;
+unsigned long cassette_srate;
 int           cassette_enable;
-int           cassette_append, cassette_pcm;
+int           cassette_append;
+int           cassette_pcm;
 int           cassette_ui_writeprot;
 
 static int cassette_cycles = -1;
@@ -138,7 +140,7 @@ pc_cas_new(void)
 
     pc_cas_init(cas);
 
-    return (cas);
+    return cas;
 }
 
 void
@@ -172,7 +174,7 @@ pc_cas_set_fname(pc_cassette_t *cas, const char *fname)
 
     if (fname == NULL) {
         ui_sb_update_icon_state(SB_CASSETTE, 1);
-        return (0);
+        return 0;
     }
 
     cas->fp = plat_fopen(fname, "r+b");
@@ -182,7 +184,7 @@ pc_cas_set_fname(pc_cassette_t *cas, const char *fname)
 
     if (cas->fp == NULL) {
         ui_sb_update_icon_state(SB_CASSETTE, 1);
-        return (1);
+        return 1;
     }
 
     cas->close = 1;
@@ -215,14 +217,12 @@ pc_cas_set_fname(pc_cassette_t *cas, const char *fname)
             pc_cas_set_pcm(cas, 0);
     }
 
-    return (0);
+    return 0;
 }
 
 static void
 pc_cas_reset(pc_cassette_t *cas)
 {
-    unsigned i;
-
     cas->clk_pcm = 0;
 
     cas->clk_out = cas->clk;
@@ -237,7 +237,7 @@ pc_cas_reset(pc_cassette_t *cas)
     cas->cas_inp_buf = 0;
     cas->cas_inp_bit = 0;
 
-    for (i = 0; i < 3; i++) {
+    for (uint8_t i = 0; i < 3; i++) {
         cas->pcm_inp_fir[i] = 0;
     }
 }
@@ -344,18 +344,18 @@ int
 pc_cas_set_position(pc_cassette_t *cas, unsigned long pos)
 {
     if (cas->fp == NULL) {
-        return (1);
+        return 1;
     }
 
     if (fseek(cas->fp, pos, SEEK_SET) != 0) {
-        return (1);
+        return 1;
     }
 
     cas->position = pos;
 
     pc_cas_reset(cas);
 
-    return (0);
+    return 0;
 }
 
 static void
@@ -394,17 +394,18 @@ pc_cas_read_bit(pc_cassette_t *cas)
 static int
 pc_cas_read_smp(pc_cassette_t *cas)
 {
-    int smp, *fir;
+    int  smp;
+    int *fir;
 
     if (feof(cas->fp)) {
-        return (0);
+        return 0;
     }
 
     smp = fgetc(cas->fp);
 
     if (smp == EOF) {
         cassette_log("cassette EOF at %lu\n", cas->position);
-        return (0);
+        return 0;
     }
 
     cas->position += 1;
@@ -417,7 +418,7 @@ pc_cas_read_smp(pc_cassette_t *cas)
 
     smp = (fir[0] + 2 * fir[1] + fir[2]) / 4;
 
-    return (smp);
+    return smp;
 }
 
 static void
@@ -461,8 +462,6 @@ pc_cas_write_smp(pc_cassette_t *cas, int val)
 void
 pc_cas_set_motor(pc_cassette_t *cas, unsigned char val)
 {
-    unsigned i;
-
     val = (val != 0);
 
     if (val == cas->motor) {
@@ -470,7 +469,7 @@ pc_cas_set_motor(pc_cassette_t *cas, unsigned char val)
     }
 
     if ((val == 0) && cas->save && cas->pcm) {
-        for (i = 0; i < (cas->srate / 16); i++) {
+        for (unsigned long i = 0; i < (cas->srate / 16); i++) {
             pc_cas_write_smp(cas, 0);
         }
     }
@@ -553,7 +552,8 @@ pc_cas_print_state(const pc_cassette_t *cas)
 static void
 pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt)
 {
-    unsigned long i, n;
+    unsigned long i;
+    unsigned long n;
     int           v = 0;
 
     n = cas->srate * cnt + cas->clk_pcm;

src/device/clock_ics9xxx.c

@@ -1147,7 +1147,8 @@ static uint8_t
 ics9xxx_find_bus_match(ics9xxx_t *dev, uint32_t bus, uint8_t preset_mask, uint8_t preset)
 {
     uint8_t  best_match = 0;
-    uint32_t delta, best_delta = -1;
+    uint32_t delta;
+    uint32_t best_delta = -1;
 
 #ifdef ENABLE_ICS9xxx_DETECT
     if (dev->model_idx == ICS9xxx_xx)

src/device/hwm_lm78.c

@@ -328,7 +328,9 @@ lm78_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv)
 static uint8_t
 lm78_read(lm78_t *dev, uint8_t reg, uint8_t bank)
 {
-    uint8_t ret = 0, masked_reg = reg, bankswitched = ((reg & 0xf8) == 0x50);
+    uint8_t ret = 0;
+    uint8_t masked_reg = reg;
+    uint8_t bankswitched = ((reg & 0xf8) == 0x50);
     lm75_t *lm75;
 
     if ((dev->local & LM78_AS99127F) && (bank == 3) && (reg != 0x4e)) {

src/device/i2c.c

@@ -77,14 +77,14 @@ i2c_addbus(char *name)
 void
 i2c_removebus(void *bus_handle)
 {
-    int        c;
-    i2c_t     *p, *q;
+    i2c_t     *p;
+    i2c_t     *q;
     i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
 
     if (!bus_handle)
         return;
 
-    for (c = 0; c < NADDRS; c++) {
+    for (uint8_t c = 0; c < NADDRS; c++) {
         p = bus->devices[c];
         if (!p)
             continue;
@@ -117,14 +117,14 @@ i2c_sethandler(void *bus_handle, uint8_t base, int size,
                void (*stop)(void *bus, uint8_t addr, void *priv),
                void *priv)
 {
-    int        c;
-    i2c_t     *p, *q = NULL;
+    i2c_t     *p;
+    i2c_t     *q = NULL;
     i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
 
     if (!bus_handle || ((base + size) > NADDRS))
         return;
 
-    for (c = 0; c < size; c++) {
+    for (int c = 0; c < size; c++) {
         p = bus->last[base + c];
         q = (i2c_t *) malloc(sizeof(i2c_t));
         memset(q, 0, sizeof(i2c_t));
@@ -156,14 +156,14 @@ i2c_removehandler(void *bus_handle, uint8_t base, int size,
                   void (*stop)(void *bus, uint8_t addr, void *priv),
                   void *priv)
 {
-    int        c;
-    i2c_t     *p, *q;
+    i2c_t     *p;
+    i2c_t     *q;
     i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
 
     if (!bus_handle || ((base + size) > NADDRS))
         return;
 
-    for (c = 0; c < size; c++) {
+    for (int c = 0; c < size; c++) {
         p = bus->devices[base + c];
         if (!p)
             continue;
@@ -209,7 +209,7 @@ i2c_start(void *bus_handle, uint8_t addr, uint8_t read)
     i2c_t     *p;
 
     if (!bus)
-        return (ret);
+        return ret;
 
     p = bus->devices[addr];
     if (p) {
@@ -223,7 +223,7 @@ i2c_start(void *bus_handle, uint8_t addr, uint8_t read)
 
     i2c_log("I2C %s: start(%02X) = %d\n", bus->name, addr, ret);
 
-    return (ret);
+    return ret;
 }
 
 uint8_t
@@ -234,7 +234,7 @@ i2c_read(void *bus_handle, uint8_t addr)
     i2c_t     *p;
 
     if (!bus)
-        return (ret);
+        return ret;
 
     p = bus->devices[addr];
     if (p) {
@@ -249,7 +249,7 @@ i2c_read(void *bus_handle, uint8_t addr)
 
     i2c_log("I2C %s: read(%02X) = %02X\n", bus->name, addr, ret);
 
-    return (ret);
+    return ret;
 }
 
 uint8_t
@@ -260,7 +260,7 @@ i2c_write(void *bus_handle, uint8_t addr, uint8_t data)
     i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
 
     if (!bus)
-        return (ret);
+        return ret;
 
     p = bus->devices[addr];
     if (p) {
@@ -274,7 +274,7 @@ i2c_write(void *bus_handle, uint8_t addr, uint8_t data)
 
     i2c_log("I2C %s: write(%02X, %02X) = %d\n", bus->name, addr, data, ret);
 
-    return (ret);
+    return ret;
 }
 
 void

src/device/isamem.c

@@ -186,7 +186,7 @@ ram_readb(uint32_t addr, void *priv)
     /* Grab the data. */
     ret = *(uint8_t *) (dev->ptr + (addr - dev->base));
 
-    return (ret);
+    return ret;
 }
 
 /* Read one word from onboard RAM. */
@@ -199,7 +199,7 @@ ram_readw(uint32_t addr, void *priv)
     /* Grab the data. */
     ret = *(uint16_t *) (dev->ptr + (addr - dev->base));
 
-    return (ret);
+    return ret;
 }
 
 /* Write one byte to onboard RAM. */
@@ -230,13 +230,13 @@ ems_readb(uint32_t addr, void *priv)
     uint8_t   ret = 0xff;
 
     /* Grab the data. */
-    ret = *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 #if ISAMEM_DEBUG
     if ((addr % 4096) == 0)
         isamem_log("EMS readb(%06x) = %02x\n", addr - dev & 0x3fff, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Read one word from onboard paged RAM. */
@@ -247,13 +247,13 @@ ems_readw(uint32_t addr, void *priv)
     uint16_t  ret = 0xffff;
 
     /* Grab the data. */
-    ret = *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 #if ISAMEM_DEBUG
     if ((addr % 4096) == 0)
         isamem_log("EMS readw(%06x) = %04x\n", addr - dev & 0x3fff, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Write one byte to onboard paged RAM. */
@@ -267,7 +267,7 @@ ems_writeb(uint32_t addr, uint8_t val, void *priv)
     if ((addr % 4096) == 0)
         isamem_log("EMS writeb(%06x, %02x)\n", addr - dev & 0x3fff, val);
 #endif
-    *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Write one word to onboard paged RAM. */
@@ -281,7 +281,7 @@ ems_writew(uint32_t addr, uint16_t val, void *priv)
     if ((addr % 4096) == 0)
         isamem_log("EMS writew(%06x, %04x)\n", addr & 0x3fff, val);
 #endif
-    *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Handle a READ operation from one of our registers. */
@@ -311,7 +311,7 @@ ems_read(uint16_t port, void *priv)
     isamem_log("ISAMEM: read(%04x) = %02x)\n", port, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Handle a WRITE operation to one of our registers. */
@@ -391,11 +391,11 @@ static void *
 isamem_init(const device_t *info)
 {
     memdev_t *dev;
-    uint32_t  k, t;
+    uint32_t  k;
+    uint32_t  t;
     uint32_t  addr;
     uint32_t  tot;
     uint8_t  *ptr;
-    int       i;
 
     /* Find our device and create an instance. */
     dev = (memdev_t *) malloc(sizeof(memdev_t));
@@ -624,7 +624,7 @@ isamem_init(const device_t *info)
          * create, initialize and disable the mappings, and set
          * up the I/O control handler.
          */
-        for (i = 0; i < EMS_MAXPAGE; i++) {
+        for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
             /* Create and initialize a page mapping. */
             mem_mapping_add(&dev->ems[i].mapping,
                             dev->frame_addr + (EMS_PGSIZE * i), EMS_PGSIZE,
@@ -655,10 +655,9 @@ static void
 isamem_close(void *priv)
 {
     memdev_t *dev = (memdev_t *) priv;
-    int       i;
 
     if (dev->flags & FLAG_EMS) {
-        for (i = 0; i < EMS_MAXPAGE; i++) {
+        for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
             io_removehandler(dev->base_addr + (EMS_PGSIZE * i), 2,
                              ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
         }
@@ -1566,12 +1565,12 @@ static const struct {
 void
 isamem_reset(void)
 {
-    int k, i;
+    int k;
 
     /* We explicitly set to zero here or bad things happen */
     isa_mem_size = 0;
 
-    for (i = 0; i < ISAMEM_MAX; i++) {
+    for (uint8_t i = 0; i < ISAMEM_MAX; i++) {
         k = isamem_type[i];
         if (k == 0)
             continue;
@@ -1603,12 +1602,12 @@ isamem_get_from_internal_name(const char *s)
 
     while (boards[c].dev != NULL) {
         if (!strcmp(boards[c].dev->internal_name, s))
-            return (c);
+            return c;
         c++;
     }
 
     /* Not found. */
-    return (0);
+    return 0;
 }
 
 const device_t *

src/device/isapnp.c

@@ -121,7 +121,8 @@ isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld)
 
     /* Populate config structure, performing endianness conversion as needed. */
     card->config.activate = ld->regs[0x30] & 0x01;
-    uint8_t i, reg_base;
+    uint8_t i;
+    uint8_t reg_base;
     for (i = 0; i < 4; i++) {
         reg_base                 = 0x40 + (8 * i);
         card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8);
@@ -168,7 +169,8 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
 
     /* Populate configuration registers. */
     ld->regs[0x30] = !!config->activate;
-    uint8_t  i, reg_base;
+    uint8_t  i;
+    uint8_t reg_base;
     uint32_t size;
     for (i = 0; i < 4; i++) {
         reg_base               = 0x40 + (8 * i);
@@ -253,7 +255,9 @@ static uint8_t
 isapnp_read_data(uint16_t addr, void *priv)
 {
     isapnp_t      *dev = (isapnp_t *) priv;
-    uint8_t        ret = 0xff, bit, next_shift;
+    uint8_t        ret = 0xff;
+    uint8_t        bit;
+    uint8_t        next_shift;
     isapnp_card_t *card;
 
     switch (dev->reg) {
@@ -450,7 +454,8 @@ isapnp_write_data(uint16_t addr, uint8_t val, void *priv)
     isapnp_t        *dev = (isapnp_t *) priv;
     isapnp_card_t   *card;
     isapnp_device_t *ld;
-    uint16_t         io_addr, reset_cards = 0;
+    uint16_t         io_addr;
+    uint16_t         reset_cards = 0;
 
     isapnp_log("ISAPnP: write_data(%02X)\n", val);
 
@@ -701,8 +706,10 @@ static void
 isapnp_close(void *priv)
 {
     isapnp_t        *dev  = (isapnp_t *) priv;
-    isapnp_card_t   *card = dev->first_card, *next_card;
-    isapnp_device_t *ld, *next_ld;
+    isapnp_card_t   *card = dev->first_card;
+    isapnp_card_t   *next_card;
+    isapnp_device_t *ld;
+    isapnp_device_t *next_ld;
 
     while (card) {
         ld = card->first_ld;
@@ -773,11 +780,22 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
     uint16_t vendor = (card->rom[0] << 8) | card->rom[1];
     isapnp_log("ISAPnP: Parsing ROM resources for card %c%c%c%02X%02X (serial %08X)\n", '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[2], card->rom[3], (card->rom[7] << 24) | (card->rom[6] << 16) | (card->rom[5] << 8) | card->rom[4]);
 #endif
-    uint16_t         i        = 9, j;
-    uint8_t          existing = 0, ldn = 0, res, in_df = 0;
-    uint8_t          irq = 0, io = 0, mem_range = 0, mem_range_32 = 0, irq_df = 0, io_df = 0, mem_range_df = 0, mem_range_32_df = 0;
+    uint16_t         i        = 9;
+    uint8_t          existing = 0;
+    uint8_t          ldn = 0;
+    uint8_t          res;
+    uint8_t          in_df = 0;
+    uint8_t          irq = 0;
+    uint8_t          io = 0;
+    uint8_t          mem_range = 0;
+    uint8_t          mem_range_32 = 0;
+    uint8_t          irq_df = 0;
+    uint8_t          io_df = 0;
+    uint8_t          mem_range_df = 0;
+    uint8_t          mem_range_32_df = 0;
     uint32_t         len;
-    isapnp_device_t *ld = NULL, *prev_ld = NULL;
+    isapnp_device_t *ld = NULL;
+    isapnp_device_t *prev_ld = NULL;
 
     /* Check if this is an existing card which already has logical devices.
        Any new logical devices will be added to the list after existing ones.
@@ -994,7 +1012,7 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
                 case 0x0f: /* end tag */
                     /* Calculate checksum. */
                     res = 0x00;
-                    for (j = 9; j <= i; j++)
+                    for (uint16_t j = 9; j <= i; j++)
                         res += card->rom[j];
                     card->rom[i + 1] = -res;
 

src/device/isartc.c

@@ -193,7 +193,9 @@ mm67_tick(nvr_t *nvr)
 {
     rtcdev_t *dev  = (rtcdev_t *) nvr->data;
     uint8_t  *regs = nvr->regs;
-    int       mon, year, f = 0;
+    int       mon;
+    int       year;
+    int       f = 0;
 
     /* Update and set interrupt if needed. */
     regs[MM67_SEC] = RTC_BCDINC(nvr->regs[MM67_SEC], 1);
@@ -236,7 +238,10 @@ mm67_tick(nvr_t *nvr)
                 regs[MM67_DOM] = RTC_BCDINC(regs[MM67_DOM], 1);
                 mon            = RTC_DCB(regs[MM67_MON]);
                 if (dev->year != -1) {
-                    year = RTC_DCB(regs[dev->year]);
+                    if (dev->flags & FLAG_YEARBCD)
+                        year = RTC_DCB(regs[dev->year]);
+                    else
+                        year = regs[dev->year];
                     if (dev->flags & FLAG_YEAR80)
                         year += 80;
                 } else
@@ -369,10 +374,8 @@ mm67_start(nvr_t *nvr)
 static void
 mm67_reset(nvr_t *nvr)
 {
-    int i;
-
     /* Initialize the RTC to a known state. */
-    for (i = MM67_MSEC; i <= MM67_MON; i++)
+    for (uint8_t i = MM67_MSEC; i <= MM67_MON; i++)
         nvr->regs[i] = RTC_BCD(0);
     nvr->regs[MM67_DOW] = RTC_BCD(1);
     nvr->regs[MM67_DOM] = RTC_BCD(1);
@@ -407,7 +410,7 @@ mm67_read(uint16_t port, void *priv)
     isartc_log("ISARTC: read(%04x) = %02x\n", port - dev->base_addr, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Handle a WRITE operation to one of our registers. */
@@ -787,12 +790,12 @@ isartc_get_from_internal_name(char *s)
 
     while (boards[c].dev != NULL) {
         if (!strcmp(boards[c].dev->internal_name, s))
-            return (c);
+            return c;
         c++;
     }
 
     /* Not found. */
-    return (0);
+    return 0;
 }
 
 const device_t *

src/device/kbc_at.c

@@ -795,7 +795,8 @@ static uint8_t
 write64_generic(void *priv, uint8_t val)
 {
     atkbc_t *dev = (atkbc_t *) priv;
-    uint8_t  current_drive, fixed_bits;
+    uint8_t  current_drive;
+    uint8_t  fixed_bits;
     uint8_t  kbc_ven = 0x0;
     kbc_ven          = dev->flags & KBC_VEN_MASK;
 
@@ -1276,7 +1277,7 @@ write64_olivetti(void *priv, uint8_t val)
              * bit 2: keyboard fuse present
              * bits 0-1: ???
              */
-            kbc_delay_to_ob(dev, (0x0c | ((is386) ? 0x00 : 0x80)) & 0xdf, 0, 0x00);
+            kbc_delay_to_ob(dev, (0x0c | (is386 ? 0x00 : 0x80)) & 0xdf, 0, 0x00);
             dev->p1 = ((dev->p1 + 1) & 3) | (dev->p1 & 0xfc);
             return 0;
     }
@@ -1413,8 +1414,9 @@ static void
 kbc_at_process_cmd(void *priv)
 {
     atkbc_t *dev = (atkbc_t *) priv;
-    int      i = 0, bad    = 1;
-    uint8_t  mask, kbc_ven = dev->flags & KBC_VEN_MASK;
+    int      bad = 1;
+    uint8_t  mask;
+    uint8_t kbc_ven = dev->flags & KBC_VEN_MASK;
     uint8_t  cmd_ac_conv[16] = { 0x0b, 2, 3, 4, 5, 6, 7, 8, 9, 0x0a, 0x1e, 0x30, 0x2e, 0x20, 0x12, 0x21 };
 
     if (dev->status & STAT_CD) {
@@ -1449,6 +1451,7 @@ kbc_at_process_cmd(void *priv)
                         /* TODO: Proper P1 implementation, with OR and AND flags in the machine table. */
                         dev->p1 = dev->p1 & 0xff;
                         write_p2(dev, 0x4b);
+                        picintc(0x1002);
                     }
 
                     dev->status = (dev->status & 0x0f) | 0x60;
@@ -1467,6 +1470,7 @@ kbc_at_process_cmd(void *priv)
                         /* TODO: Proper P1 implementation, with OR and AND flags in the machine table. */
                         dev->p1 = dev->p1 & 0xff;
                         write_p2(dev, 0xcf);
+                        picintc(0x0002);
                     }
 
                     dev->status = (dev->status & 0x0f) | 0x60;
@@ -1506,7 +1510,7 @@ kbc_at_process_cmd(void *priv)
                     dev->mem[0x32] = 0x00;    /* T0 and T1. */
                     dev->mem[0x33] = 0x00;    /* PSW - Program Status Word - always return 0x00 because we do not emulate this byte. */
                     /* 20 bytes in high nibble in set 1, low nibble in set 1, set 1 space format = 60 bytes. */
-                    for (i = 0; i < 20; i++) {
+                    for (uint8_t i = 0; i < 20; i++) {
                         kbc_at_queue_add(dev, cmd_ac_conv[dev->mem[i + 0x20] >> 4]);
                         kbc_at_queue_add(dev, cmd_ac_conv[dev->mem[i + 0x20] & 0x0f]);
                         kbc_at_queue_add(dev, 0x39);
@@ -1758,7 +1762,7 @@ kbc_at_read(uint16_t port, void *priv)
 
     kbc_at_log("ATkbc: [%04X:%08X] read (%04X) = %02X\n",  CS, cpu_state.pc, port, ret);
 
-    return (ret);
+    return ret;
 }
 
 static void
@@ -1814,14 +1818,14 @@ static void
 kbc_at_close(void *priv)
 {
     atkbc_t *dev = (atkbc_t *) priv;
-    int i, max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1;
+    int max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1;
 
     kbc_at_reset(dev);
 
     /* Stop timers. */
     timer_disable(&dev->send_delay_timer);
 
-    for (i = 0; i < max_ports; i++) {
+    for (int i = 0; i < max_ports; i++) {
         if (kbc_at_ports[i] != NULL) {
             free(kbc_at_ports[i]);
             kbc_at_ports[i] = NULL;
@@ -1835,7 +1839,7 @@ static void *
 kbc_at_init(const device_t *info)
 {
     atkbc_t *dev;
-    int i, max_ports;
+    int max_ports;
 
     dev = (atkbc_t *) malloc(sizeof(atkbc_t));
     memset(dev, 0x00, sizeof(atkbc_t));
@@ -1922,7 +1926,7 @@ kbc_at_init(const device_t *info)
 
     max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1;
 
-    for (i = 0; i < max_ports; i++) {
+    for (int i = 0; i < max_ports; i++) {
         kbc_at_ports[i] = (kbc_at_port_t *) malloc(sizeof(kbc_at_port_t));
         memset(kbc_at_ports[i], 0x00, sizeof(kbc_at_port_t));
         kbc_at_ports[i]->out_new = -1;
@@ -1934,7 +1938,7 @@ kbc_at_init(const device_t *info)
     /* The actual keyboard. */
     device_add(&keyboard_at_generic_device);
 
-    return (dev);
+    return dev;
 }
 
 const device_t keyboard_at_device = {

src/device/kbc_at_dev.c

@@ -75,7 +75,7 @@ kbc_at_dev_queue_pos(atkbc_dev_t *dev, uint8_t main)
     uint8_t ret;
 
     if (main)
-        ret = ((dev->queue_end - dev->queue_start) & 0xf);
+        ret = ((dev->queue_end - dev->queue_start) & dev->fifo_mask);
     else
         ret = ((dev->cmd_queue_end - dev->cmd_queue_start) & 0xf);
 
@@ -88,7 +88,7 @@ kbc_at_dev_queue_add(atkbc_dev_t *dev, uint8_t val, uint8_t main)
     if (main) {
         kbc_at_dev_log("%s: dev->queue[%02X]     = %02X;\n", dev->name, dev->queue_end, val);
         dev->queue[dev->queue_end]         = val;
-        dev->queue_end                     = (dev->queue_end + 1) & 0xf;
+        dev->queue_end                     = (dev->queue_end + 1) & dev->fifo_mask;
     } else {
         kbc_at_dev_log("%s: dev->cmd_queue[%02X] = %02X;\n", dev->name, dev->cmd_queue_end, val);
         dev->cmd_queue[dev->cmd_queue_end] = val;
@@ -121,7 +121,7 @@ kbc_at_dev_poll(void *priv)
             if (*dev->scan && (dev->port->out_new == -1) && (dev->queue_start != dev->queue_end)) {
                 kbc_at_dev_log("%s: %02X (DATA) on channel 1\n", dev->name, dev->queue[dev->queue_start]);
                 dev->port->out_new   = dev->queue[dev->queue_start];
-                dev->queue_start     = (dev->queue_start + 1) & 0xf;
+                dev->queue_start     = (dev->queue_start + 1) & dev->fifo_mask;
             }
             if (!(*dev->scan) || dev->port->wantcmd)
                 dev->state = DEV_STATE_MAIN_1;
@@ -155,6 +155,20 @@ kbc_at_dev_poll(void *priv)
                 dev->port->wantcmd    = 0;
             }
             break;
+        case DEV_STATE_EXECUTE_BAT:
+            dev->state = DEV_STATE_MAIN_OUT;
+            dev->execute_bat(dev);
+            break;
+        case DEV_STATE_MAIN_WANT_EXECUTE_BAT:
+            /* Output command response and then return to main loop #2. */
+            if ((dev->port->out_new == -1) && (dev->cmd_queue_start != dev->cmd_queue_end)) {
+                kbc_at_dev_log("%s: %02X (CMD ) on channel 1\n", dev->name, dev->cmd_queue[dev->cmd_queue_start]);
+                dev->port->out_new   = dev->cmd_queue[dev->cmd_queue_start];
+                dev->cmd_queue_start = (dev->cmd_queue_start + 1) & 0xf;
+            }
+            if (dev->cmd_queue_start == dev->cmd_queue_end)
+                dev->state = DEV_STATE_EXECUTE_BAT;
+            break;
     }
 }
 
@@ -170,12 +184,11 @@ kbc_at_dev_reset(atkbc_dev_t *dev, int do_fa)
 
     *dev->scan = 1;
 
-    if (do_fa)
+    if (do_fa) {
         kbc_at_dev_queue_add(dev, 0xfa, 0);
-
-    dev->state = DEV_STATE_MAIN_OUT;
-
-    dev->execute_bat(dev);
+        dev->state = DEV_STATE_MAIN_WANT_EXECUTE_BAT;
+    } else
+        dev->state = DEV_STATE_EXECUTE_BAT;
 }
 
 atkbc_dev_t *
@@ -194,5 +207,5 @@ kbc_at_dev_init(uint8_t inst)
     }
 
     /* Return our private data to the I/O layer. */
-    return (dev);
+    return dev;
 }

src/device/keyboard.c

@@ -90,14 +90,18 @@ key_process(uint16_t scan, int down)
     scancode *codes = scan_table;
     int       c;
 
+    if (!codes)
+        return;
+
     if (!keyboard_scan || (keyboard_send == NULL))
         return;
 
     oldkey[scan] = down;
-    if (down && codes[scan].mk[0] == 0)
+
+    if (down && (codes[scan].mk[0] == 0))
         return;
 
-    if (!down && codes[scan].brk[0] == 0)
+    if (!down && (codes[scan].brk[0] == 0))
         return;
 
     /* TODO: The keyboard controller needs to report the AT flag to us here. */

src/device/keyboard_at.c

@@ -28,6 +28,8 @@
 #define FLAG_AT        0x00  /* dev is AT or PS/2 */
 #define FLAG_TYPE_MASK 0x07  /* mask for type     */
 
+#define FIFO_SIZE      16
+
 enum {
     KBD_84_KEY = 0,
     KBD_101_KEY,
@@ -507,9 +509,7 @@ keyboard_at_set_scancode_set(void)
 static void
 add_data_vals(atkbc_dev_t *dev, uint8_t *val, uint8_t len)
 {
-    int i;
-
-    for (i = 0; i < len; i++)
+    for (uint8_t i = 0; i < len; i++)
         kbc_at_dev_queue_add(dev, val[i], 1);
 }
 
@@ -518,7 +518,8 @@ add_data_kbd(uint16_t val)
 {
     atkbc_dev_t *dev = SavedKbd;
     uint8_t  fake_shift[4];
-    uint8_t  num_lock = 0, shift_states = 0;
+    uint8_t  num_lock = 0;
+    uint8_t  shift_states = 0;
 
     keyboard_get_states(NULL, &num_lock, NULL);
     shift_states = keyboard_get_shift() & STATE_SHIFT_MASK;
@@ -720,7 +721,7 @@ static void
 keyboard_at_write(void *priv)
 {
     atkbc_dev_t *dev = (atkbc_dev_t *) priv;
-    uint8_t  i, val;
+    uint8_t val;
 
     if (dev->port == NULL)
         return;
@@ -824,7 +825,7 @@ keyboard_at_write(void *priv)
                 /* TODO: After keyboard type selection is implemented, make this
                          return the correct keyboard ID for the selected type. */
                 kbc_at_dev_queue_add(dev, 0xfa, 0);
-                for (i = 0; i < 4; i++) {
+                for (uint8_t i = 0; i < 4; i++) {
                     if (id_bytes[dev->type][i] == 0)
                         break;
 
@@ -960,6 +961,8 @@ keyboard_at_init(const device_t *info)
 
     dev->scan        = &keyboard_scan;
 
+    dev->fifo_mask   = FIFO_SIZE - 1;
+
     if (dev->port != NULL)
         kbc_at_dev_reset(dev, 0);
 
@@ -969,7 +972,7 @@ keyboard_at_init(const device_t *info)
     inv_cmd_response = (dev->type & FLAG_PS2) ? 0xfe : 0xfa;
 
     /* Return our private data to the I/O layer. */
-    return (dev);
+    return dev;
 }
 
 static void

src/device/keyboard_xt.c

@@ -343,10 +343,11 @@ const scancode scancode_xt[512] = {
 };
 
 static uint8_t key_queue[16];
-static int     key_queue_start = 0,
-           key_queue_end       = 0;
-static int is_tandy = 0, is_t1x00 = 0,
-           is_amstrad = 0;
+static int     key_queue_start = 0;
+static int     key_queue_end   = 0;
+static int     is_tandy = 0;
+static int     is_t1x00 = 0;
+static int     is_amstrad = 0;
 
 #ifdef ENABLE_KEYBOARD_XT_LOG
 int keyboard_xt_do_log = ENABLE_KEYBOARD_XT_LOG;
@@ -370,9 +371,9 @@ static uint8_t
 get_fdd_switch_settings(void)
 {
 
-    int i, fdd_count = 0;
+    uint8_t fdd_count = 0;
 
-    for (i = 0; i < FDD_NUM; i++) {
+    for (uint8_t i = 0; i < FDD_NUM; i++) {
         if (fdd_get_flags(i))
             fdd_count++;
     }
@@ -467,7 +468,8 @@ kbd_adddata(uint16_t val)
 void
 kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val))
 {
-    uint8_t num_lock = 0, shift_states = 0;
+    uint8_t num_lock = 0;
+    uint8_t shift_states = 0;
 
     if (!adddata)
         return;
@@ -515,7 +517,9 @@ static void
 kbd_write(uint16_t port, uint8_t val, void *priv)
 {
     xtkbd_t *kbd = (xtkbd_t *) priv;
-    uint8_t  bit, set, new_clock;
+    uint8_t  bit;
+    uint8_t  set;
+    uint8_t  new_clock;
 
     switch (port) {
         case 0x61: /* Keyboard Control Register (aka Port B) */
@@ -684,7 +688,7 @@ kbd_read(uint16_t port, void *priv)
             break;
     }
 
-    return (ret);
+    return ret;
 }
 
 static void
@@ -700,7 +704,7 @@ kbd_reset(void *priv)
 
     keyboard_scan = 1;
 
-    key_queue_start = 0,
+    key_queue_start = 0;
     key_queue_end   = 0;
 }
 
@@ -873,7 +877,7 @@ kbd_init(const device_t *info)
 
     is_amstrad = 0;
 
-    return (kbd);
+    return kbd;
 }
 
 static void

src/device/mouse.c

@@ -36,16 +36,16 @@ typedef struct {
 } mouse_t;
 
 int mouse_type = 0;
-int mouse_x,
-    mouse_y,
-    mouse_z,
-    mouse_buttons,
-    mouse_mode,
-    mouse_tablet_in_proximity = 0,
-    tablet_tool_type          = 1; /* 0 = Puck/Cursor, 1 = Pen */
+int mouse_x;
+int mouse_y;
+int mouse_z;
+int mouse_buttons;
+int mouse_mode;
+int mouse_tablet_in_proximity = 0;
+int tablet_tool_type          = 1; /* 0 = Puck/Cursor, 1 = Pen */
 
-double mouse_x_abs,
-    mouse_y_abs;
+double mouse_x_abs;
+double mouse_y_abs;
 
 pc_timer_t mouse_timer; /* mouse event timer */
 
@@ -266,18 +266,18 @@ mouse_get_from_internal_name(char *s)
 
     while (mouse_devices[c].device != NULL) {
         if (!strcmp((char *) mouse_devices[c].device->internal_name, s))
-            return (c);
+            return c;
         c++;
     }
 
-    return (0);
+    return 0;
 }
 
 int
 mouse_has_config(int mouse)
 {
     if (mouse_devices[mouse].device == NULL)
-        return (0);
+        return 0;
 
     return (mouse_devices[mouse].device->config ? 1 : 0);
 }
@@ -291,7 +291,7 @@ mouse_get_device(int mouse)
 int
 mouse_get_buttons(void)
 {
-    return (mouse_nbut);
+    return mouse_nbut;
 }
 
 /* Return number of MOUSE types we know about. */

src/device/mouse_bus.c

@@ -455,11 +455,11 @@ bm_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
     int xor ;
 
     if (!(dev->flags & FLAG_ENABLED))
-        return (1); /* Mouse is disabled, do nothing. */
+        return 1; /* Mouse is disabled, do nothing. */
 
     if (!x && !y && !((b ^ dev->mouse_buttons_last) & 0x07)) {
         dev->mouse_buttons_last = b;
-        return (1); /* State has not changed, do nothing. */
+        return 1; /* State has not changed, do nothing. */
     }
 
     /* Converts button states from MRL to LMR. */
@@ -512,7 +512,7 @@ bm_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
             bm_log("DEBUG: Data Interrupt Fired...\n");
         }
     }
-    return (0);
+    return 0;
 }
 
 /* The timer calls us on every tick if the mouse is in timer mode
@@ -520,7 +520,8 @@ bm_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
 static void
 bm_update_data(mouse_t *dev)
 {
-    int delta_x, delta_y;
+    int delta_x;
+    int delta_y;
     int xor ;
 
     /* If the counters are not frozen, update them. */

src/device/mouse_ps2.c

@@ -30,13 +30,15 @@ enum {
     MODE_ECHO
 };
 
-#define FLAG_EXPLORER 0x200 /* Has 5 buttons */
-#define FLAG_5BTN    0x100 /* using Intellimouse Optical mode */
-#define FLAG_INTELLI 0x80  /* device is IntelliMouse */
-#define FLAG_INTMODE 0x40  /* using Intellimouse mode */
-#define FLAG_SCALED  0x20  /* enable delta scaling */
-#define FLAG_ENABLED 0x10  /* dev is enabled for use */
-#define FLAG_CTRLDAT 0x08  /* ctrl or data mode */
+#define FLAG_EXPLORER 0x200  /* Has 5 buttons */
+#define FLAG_5BTN     0x100  /* using Intellimouse Optical mode */
+#define FLAG_INTELLI   0x80  /* device is IntelliMouse */
+#define FLAG_INTMODE   0x40  /* using Intellimouse mode */
+#define FLAG_SCALED    0x20  /* enable delta scaling */
+#define FLAG_ENABLED   0x10  /* dev is enabled for use */
+#define FLAG_CTRLDAT   0x08  /* ctrl or data mode */
+
+#define FIFO_SIZE      16
 
 int mouse_scan = 0;
 
@@ -73,7 +75,7 @@ ps2_report_coordinates(atkbc_dev_t *dev, int main)
     int temp_z;
 
     if (dev->x > 255) {
-        dev->x = 255;
+        dev->x = 255;        
         buff[0] |= 0x40;
     }
     if (dev->x < -256) {
@@ -97,14 +99,7 @@ ps2_report_coordinates(atkbc_dev_t *dev, int main)
         buff[0] |= 0x10;
     if (dev->y < 0)
         buff[0] |= 0x20;
-    if (mouse_buttons & 0x01)
-        buff[0] |= 0x01;
-    if (mouse_buttons & 0x02)
-        buff[0] |= 0x02;
-    if (dev->flags & FLAG_INTELLI) {
-        if (mouse_buttons & 0x04)
-            buff[0] |= 0x04;
-    }
+    buff[0] |= (dev->b & ((dev->flags & FLAG_INTELLI) ? 0x07 : 0x03));
     buff[1] = (dev->x & 0xff);
     buff[2] = (dev->y & 0xff);
 
@@ -113,7 +108,7 @@ ps2_report_coordinates(atkbc_dev_t *dev, int main)
     kbc_at_dev_queue_add(dev, buff[2], main);
     if (dev->flags & FLAG_INTMODE) {
         temp_z = dev->z & 0x0f;
-        if ((dev->flags & FLAG_5BTN)) {
+        if (dev->flags & FLAG_5BTN) {
             if (mouse_buttons & 8)
                 temp_z |= 0x10;
             if (mouse_buttons & 16)
@@ -155,7 +150,8 @@ static void
 ps2_write(void *priv)
 {
     atkbc_dev_t *dev = (atkbc_dev_t *) priv;
-    uint8_t  temp, val;
+    uint8_t  temp;
+    uint8_t  val;
     static uint8_t last_data[6] = { 0x00 };
 
     if (dev->port == NULL)
@@ -317,20 +313,27 @@ static int
 ps2_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
 {
     atkbc_dev_t *dev = (atkbc_dev_t *) priv;
+    int packet_size = (dev->flags & FLAG_INTMODE) ? 4 : 3;
 
     if (!mouse_scan || (!x && !y && !z && (b == dev->b)))
-        return (0xff);
+        return 0xff;
 
-    dev->x += x;
-    dev->y -= y;
-    dev->z -= z;
-    if ((dev->mode == MODE_STREAM) && (kbc_at_dev_queue_pos(dev, 1) < 13)) {
+    if ((dev->mode == MODE_STREAM) && (kbc_at_dev_queue_pos(dev, 1) < (FIFO_SIZE - packet_size))) {
+        dev->x = x;
+        dev->y = -y;
+        dev->z = -z;
+        dev->b = b;
+    } else {
+        dev->x += x;
+        dev->y -= y;
+        dev->z -= z;
         dev->b = b;
-
-        ps2_report_coordinates(dev, 1);
     }
 
-    return (0);
+    if ((dev->mode == MODE_STREAM) && (kbc_at_dev_queue_pos(dev, 1) < (FIFO_SIZE - packet_size)))
+        ps2_report_coordinates(dev, 1);
+
+    return 0;
 }
 
 /*
@@ -367,11 +370,13 @@ mouse_ps2_init(const device_t *info)
 
     dev->scan        = &mouse_scan;
 
+    dev->fifo_mask   = FIFO_SIZE - 1;
+
     if (dev->port != NULL)
         kbc_at_dev_reset(dev, 0);
 
     /* Return our private data to the I/O layer. */
-    return (dev);
+    return dev;
 }
 
 static void

src/device/mouse_serial.c

@@ -284,7 +284,7 @@ static uint8_t
 sermouse_data_hex(mouse_t *dev, int x, int y, int b)
 {
     char    ret[6] = { 0, 0, 0, 0, 0, 0 };
-    uint8_t i, but = 0x00;
+    uint8_t but = 0x00;
 
     but |= (b & 0x01) ? 0x04 : 0x00; /* left button */
     but |= (b & 0x04) ? 0x02 : 0x00; /* middle button */
@@ -292,7 +292,7 @@ sermouse_data_hex(mouse_t *dev, int x, int y, int b)
 
     sprintf(ret, "%02X%02X%01X", (int8_t) y, (int8_t) x, but & 0x0f);
 
-    for (i = 0; i < 5; i++)
+    for (uint8_t i = 0; i < 5; i++)
         dev->data[i] = ret[4 - i];
 
     return 5;
@@ -371,7 +371,8 @@ sermouse_last_button_status(mouse_t *dev)
 static void
 sermouse_update_delta(mouse_t *dev, int *local, int *global)
 {
-    int min, max;
+    int min;
+    int max;
 
     if (dev->format == 3) {
         min = -2048;
@@ -397,7 +398,9 @@ static uint8_t
 sermouse_update_data(mouse_t *dev)
 {
     uint8_t ret = 0;
-    int     delta_x, delta_y, delta_z;
+    int     delta_x;
+    int     delta_y;
+    int     delta_z;
 
     /* Update the deltas and the delays. */
     sermouse_update_delta(dev, &delta_x, &dev->rel_x);
@@ -529,7 +532,7 @@ sermouse_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv
 
     if (!x && !y && !z && (b == dev->oldb)) {
         dev->oldb = b;
-        return (1);
+        return 1;
     }
 
     dev->oldb = b;
@@ -568,7 +571,7 @@ sermouse_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv
     dev->rel_y += y;
     dev->rel_z += z;
 
-    return (0);
+    return 0;
 }
 
 static void

src/device/mouse_wacom_tablet.c

@@ -373,7 +373,8 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data)
             if (!memcmp(wacom->data_rec, "~*", 2)) {
                 uint32_t settings_dword = wacom->settings;
                 if (strstr((const char *) wacom->data_rec, ",")) {
-                    uint32_t x_res = wacom->x_res, y_res = wacom->y_res;
+                    uint32_t x_res = wacom->x_res;
+                    uint32_t y_res = wacom->y_res;
                     uint32_t increment = wacom->increment;
                     uint32_t interval = wacom->interval;
 
@@ -423,7 +424,7 @@ wacom_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
     if (wacom->b != b)
         wacom->oldb = wacom->b;
     wacom->b = b;
-    return (0);
+    return 0;
 }
 
 static int

src/device/pci_bridge.c

@@ -532,7 +532,11 @@ pci_bridge_reset(void *priv)
 static void *
 pci_bridge_init(const device_t *info)
 {
-    uint8_t interrupts[4], interrupt_count, interrupt_mask, slot_count, i;
+    uint8_t interrupts[4];
+    uint8_t interrupt_count;
+    uint8_t interrupt_mask;
+    uint8_t slot_count;
+    uint8_t i;
 
     pci_bridge_t *dev = (pci_bridge_t *) malloc(sizeof(pci_bridge_t));
     memset(dev, 0, sizeof(pci_bridge_t));

src/device/postcard.c

@@ -31,7 +31,8 @@
 
 static uint16_t postcard_port;
 static uint8_t  postcard_written;
-static uint8_t  postcard_code, postcard_prev_code;
+static uint8_t  postcard_code;
+static uint8_t  postcard_prev_code;
 #define UISTR_LEN 13
 static char postcard_str[UISTR_LEN]; /* UI output string */
 

src/device/serial.c

@@ -266,13 +266,11 @@ serial_transmit(serial_t *dev, uint8_t val)
 static void
 serial_move_to_txsr(serial_t *dev)
 {
-    int i = 0;
-
     if (dev->fifo_enabled) {
         dev->txsr = dev->xmit_fifo[0];
         if (dev->xmit_fifo_pos > 0) {
             /* Move the entire fifo forward by one byte. */
-            for (i = 1; i < 16; i++)
+            for (uint8_t i = 1; i < 16; i++)
                 dev->xmit_fifo[i - 1] = dev->xmit_fifo[i];
             /* Decrease FIFO position. */
             dev->xmit_fifo_pos--;
@@ -476,7 +474,8 @@ void
 serial_write(uint16_t addr, uint8_t val, void *p)
 {
     serial_t *dev = (serial_t *) p;
-    uint8_t   new_msr, old;
+    uint8_t   new_msr;
+    uint8_t   old;
 
     // serial_log("UART: Write %02X to port %02X\n", val, addr);
     serial_log("UART: [%04X:%08X] Write %02X to port %02X\n", CS, cpu_state.pc, val, addr);

src/device/serial_passthrough.c

@@ -52,9 +52,7 @@ serial_passthrough_log(const char *fmt, ...)
 void
 serial_passthrough_init(void)
 {
-    int c;
-
-    for (c = 0; c < SERIAL_MAX; c++) {
+    for (uint8_t c = 0; c < SERIAL_MAX; c++) {
         if (serial_passthrough_enabled[c]) {
             /* Instance n for COM n */
             device_add_inst(&serial_passthrough_device, c + 1);
@@ -139,7 +137,7 @@ serial_passthrough_transmit_period(serial_t *serial, void *p, double transmit_pe
 
     if (dev->mode != SERPT_MODE_HOSTSER)
         return;
-    dev->baudrate = 1000000.0 / (transmit_period);
+    dev->baudrate = 1000000.0 / transmit_period;
 
     serial_passthrough_speed_changed(p);
     plat_serpt_set_params(dev);

src/device/smbus_ali7101.c

@@ -90,7 +90,10 @@ static void
 smbus_ali7101_write(uint16_t addr, uint8_t val, void *priv)
 {
     smbus_ali7101_t *dev = (smbus_ali7101_t *) priv;
-    uint8_t          smbus_addr, cmd, read, prev_stat;
+    uint8_t          smbus_addr;
+    uint8_t          cmd;
+    uint8_t          read;
+    uint8_t          prev_stat;
     uint16_t         timer_bytes = 0;
 
     smbus_ali7101_log("SMBus ALI7101: write(%02X, %02X)\n", addr, val);

src/device/smbus_piix4.c

@@ -126,8 +126,13 @@ static void
 smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
 {
     smbus_piix4_t *dev = (smbus_piix4_t *) priv;
-    uint8_t        smbus_addr, cmd, read, block_len, prev_stat;
-    uint16_t       timer_bytes = 0, i = 0;
+    uint8_t        smbus_addr;
+    uint8_t        cmd;
+    uint8_t        read;
+    uint8_t        block_len;
+    uint8_t        prev_stat;
+    uint16_t       timer_bytes = 0;
+    uint16_t       i = 0;
 
     smbus_piix4_log("SMBus PIIX4: write(%02X, %02X)\n", addr, val);
 

src/discord.c

@@ -135,7 +135,7 @@ int
 discord_load(void)
 {
     if (discord_handle != NULL)
-        return (1);
+        return 1;
 
     // Try to load the DLL
     discord_handle = dynld_module(PATH_DISCORD_DLL, discord_imports);
@@ -144,11 +144,11 @@ discord_load(void)
         discord_log("discord: couldn't load " PATH_DISCORD_DLL "\n");
         discord_close();
 
-        return (0);
+        return 0;
     }
 
     discord_loaded = 1;
-    return (1);
+    return 1;
 }
 
 void

src/dma.c

@@ -132,7 +132,7 @@ dma_sg_next_addr(dma_t *dev)
 static void
 dma_block_transfer(int channel)
 {
-    int i, bit16;
+    int bit16;
 
     bit16 = (channel >= 4);
 
@@ -140,7 +140,7 @@ dma_block_transfer(int channel)
         bit16 = !!(dma_transfer_size(&(dma[channel])) == 2);
 
     dma_req_is_soft = 1;
-    for (i = 0; i <= dma[channel].cb; i++) {
+    for (uint16_t i = 0; i <= dma[channel].cb; i++) {
         if ((dma[channel].mode & 0x8c) == 0x84) {
             if (bit16)
                 dma_channel_write(channel, dma16_buffer[i]);
@@ -422,10 +422,9 @@ dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 dma_sg_int_status_read(uint16_t addr, void *priv)
 {
-    int     i;
     uint8_t ret = 0x00;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         if (i != 4)
             ret = (!!(dma[i].sg_status & 8)) << i;
     }
@@ -458,18 +457,18 @@ dma_read(uint16_t addr, void *priv)
                 temp = dma[channel].cc & 0xff;
             else
                 temp = dma[channel].cc >> 8;
-            return (temp);
+            return temp;
 
         case 8: /*Status register*/
             temp = dma_stat_rq_pc & 0xf;
             temp <<= 4;
             temp |= dma_stat & 0xf;
             dma_stat &= ~0xf;
-            return (temp);
+            return temp;
 
         case 0xd: /*Temporary register*/
         case 0xe:
-            return (0);
+            return 0;
     }
 
     return (dmaregs[0][addr & 0xf]);
@@ -629,7 +628,7 @@ dma_ps2_read(uint16_t addr, void *priv)
             }
             break;
     }
-    return (temp);
+    return temp;
 }
 
 static void
@@ -755,13 +754,13 @@ dma16_read(uint16_t addr, void *priv)
                 temp = dma[channel].cc & 0xff;
             else
                 temp = dma[channel].cc >> 8;
-            return (temp);
+            return temp;
 
         case 8: /*Status register*/
             temp = (dma_stat_rq_pc & 0xf0);
             temp |= dma_stat >> 4;
             dma_stat &= ~0xf0;
-            return (temp);
+            return temp;
     }
 
     return (dmaregs[1][addr & 0xf]);
@@ -891,7 +890,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv)
             dma[addr].ab   = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16);
             dma[addr].ac   = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16);
         } else {
-            dma[addr].page = (dma_at) ? val : val & 0xf;
+            dma[addr].page = dma_at ? val : val & 0xf;
             dma[addr].ab   = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16);
             dma[addr].ac   = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16);
         }
@@ -967,11 +966,9 @@ dma_set_params(uint8_t advanced, uint32_t mask)
 void
 dma_set_mask(uint32_t mask)
 {
-    int i;
-
     dma_mask = mask;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         dma[i].ab &= mask;
         dma[i].ac &= mask;
     }
@@ -1022,14 +1019,12 @@ dma_reset(void)
 void
 dma_remove_sg(void)
 {
-    int i;
-
     io_removehandler(dma_sg_base + 0x0a, 0x01,
                      dma_sg_int_status_read, NULL, NULL,
                      NULL, NULL, NULL,
                      NULL);
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         io_removehandler(dma_sg_base + 0x10 + i, 0x01,
                          dma_sg_read, dma_sg_readw, dma_sg_readl,
                          dma_sg_write, dma_sg_writew, dma_sg_writel,
@@ -1048,8 +1043,6 @@ dma_remove_sg(void)
 void
 dma_set_sg_base(uint8_t sg_base)
 {
-    int i;
-
     dma_sg_base = sg_base << 8;
 
     io_sethandler(dma_sg_base + 0x0a, 0x01,
@@ -1057,7 +1050,7 @@ dma_set_sg_base(uint8_t sg_base)
                   NULL, NULL, NULL,
                   NULL);
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         io_sethandler(dma_sg_base + 0x10 + i, 0x01,
                       dma_sg_read, dma_sg_readw, dma_sg_readl,
                       dma_sg_write, dma_sg_writew, dma_sg_writel,
@@ -1200,7 +1193,8 @@ dma_sg(uint8_t *data, int transfer_length, int out, void *priv)
     char *sop;
 #endif
 
-    int force_end = 0, buffer_pos = 0;
+    int force_end = 0;
+    int buffer_pos = 0;
 
 #ifdef ENABLE_DMA_LOG
     sop = out ? "Read" : "Writ";
@@ -1269,7 +1263,7 @@ _dma_read(uint32_t addr, dma_t *dma_c)
     } else
         temp = mem_readb_phys(addr);
 
-    return (temp);
+    return temp;
 }
 
 static uint16_t
@@ -1285,7 +1279,7 @@ _dma_readw(uint32_t addr, dma_t *dma_c)
     } else
         temp = _dma_read(addr, dma_c) | (_dma_read(addr + 1, dma_c) << 8);
 
-    return (temp);
+    return temp;
 }
 
 static void
@@ -1438,7 +1432,7 @@ dma_channel_read(int channel)
         return (temp | DMA_OVER);
     }
 
-    return (temp);
+    return temp;
 }
 
 int
@@ -1522,10 +1516,10 @@ dma_channel_write(int channel, uint16_t val)
             dma_c->sg_status |= 8;
         }
 
-        return (DMA_OVER);
+        return DMA_OVER;
     }
 
-    return (0);
+    return 0;
 }
 
 static void
@@ -1626,7 +1620,8 @@ dma_mode(int channel)
 void
 dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize)
 {
-    uint32_t i        = 0, n, n2;
+    uint32_t n;
+    uint32_t n2;
     uint8_t  bytes[4] = { 0, 0, 0, 0 };
 
     n  = TotalSize & ~(TransferSize - 1);
@@ -1634,7 +1629,7 @@ dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int Tra
 
     /* Do the divisible block, if there is one. */
     if (n) {
-        for (i = 0; i < n; i += TransferSize)
+        for (uint32_t i = 0; i < n; i += TransferSize)
             mem_read_phys((void *) &(DataRead[i]), PhysAddress + i, TransferSize);
     }
 
@@ -1648,7 +1643,8 @@ dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int Tra
 void
 dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize)
 {
-    uint32_t i        = 0, n, n2;
+    uint32_t n;
+    uint32_t n2;
     uint8_t  bytes[4] = { 0, 0, 0, 0 };
 
     n  = TotalSize & ~(TransferSize - 1);
@@ -1656,7 +1652,7 @@ dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize,
 
     /* Do the divisible block, if there is one. */
     if (n) {
-        for (i = 0; i < n; i += TransferSize)
+        for (uint32_t i = 0; i < n; i += TransferSize)
             mem_write_phys((void *) &(DataWrite[i]), PhysAddress + i, TransferSize);
     }
 

src/fifo8.c

@@ -51,7 +51,8 @@ fifo8_push(Fifo8 *fifo, uint8_t data)
 void
 fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num)
 {
-    uint32_t start, avail;
+    uint32_t start;
+    uint32_t avail;
 
     assert(fifo->num + num <= fifo->capacity);
 

src/game/gameport.c

@@ -285,7 +285,8 @@ gameport_update_joystick_type(void)
 void
 gameport_remap(void *priv, uint16_t address)
 {
-    gameport_t *dev = (gameport_t *) priv, *other_dev;
+    gameport_t *dev = (gameport_t *) priv;
+    gameport_t *other_dev;
 
     if (dev->addr) {
         /* Remove this port from the active ports list. */

src/game/joystick_sw_pad.c

@@ -183,10 +183,8 @@ sw_write(void *p)
         if (time_since_last > 9900 && time_since_last < 9940) {
             sw->poll_mode = 0;
             sw->poll_left = 49;
-            sw->poll_data = 0x2400ull | (0x1830ull << 15) | (0x19b0ull << 30);
+            sw->poll_data = 0x2400ULL | (0x1830ULL << 15) | (0x19b0ULL << 30);
         } else {
-            int c;
-
             sw->poll_mode = sw->data_mode;
             sw->data_mode = !sw->data_mode;
 
@@ -198,9 +196,8 @@ sw_write(void *p)
                 sw->poll_data = 1;
             }
 
-            for (c = 0; c < 4; c++) {
+            for (uint8_t c = 0; c < 4; c++) {
                 uint16_t data = 0x3fff;
-                int      b;
 
                 if (!JOYSTICK_PRESENT(c))
                     break;
@@ -214,7 +211,7 @@ sw_write(void *p)
                 if (joystick_state[c].axis[0] < -16383)
                     data &= ~8;
 
-                for (b = 0; b < 10; b++) {
+                for (uint8_t b = 0; b < 10; b++) {
                     if (joystick_state[c].button[b])
                         data &= ~(1 << (b + 4));
                 }

src/gdbstub.c

@@ -322,16 +322,22 @@ static char      target_xml[]   = /* QEMU gdb-xml/i386-32bit.xml with modificati
 #ifdef _WIN32
 static WSADATA wsa;
 #endif
-static int      gdbstub_socket = -1, stop_reason_len = 0, in_gdbstub = 0;
+static int      gdbstub_socket = -1;
+static int      stop_reason_len = 0;
+static int      in_gdbstub = 0;
 static uint32_t watch_addr;
 static char     stop_reason[2048];
 
-static gdbstub_client_t *first_client = NULL, *last_client = NULL;
+static gdbstub_client_t *first_client = NULL;
+static gdbstub_client_t *last_client = NULL;
 static mutex_t          *client_list_mutex;
 
 static void (*cpu_exec_shadow)(int cycs);
-static gdbstub_breakpoint_t *first_swbreak = NULL, *first_hwbreak = NULL,
-                            *first_rwatch = NULL, *first_wwatch = NULL, *first_awatch = NULL;
+static gdbstub_breakpoint_t *first_swbreak = NULL;
+static gdbstub_breakpoint_t *first_hwbreak = NULL;
+static gdbstub_breakpoint_t *first_rwatch = NULL;
+static gdbstub_breakpoint_t *first_wwatch = NULL;
+static gdbstub_breakpoint_t *first_awatch = NULL;
 
 int      gdbstub_step = 0, gdbstub_next_asap = 0;
 uint64_t gdbstub_watch_pages[(((uint32_t) -1) >> (MEM_GRANULARITY_BITS + 6)) + 1];
@@ -470,7 +476,8 @@ gdbstub_num_decode(char *p, int *dest, int mode)
 static int
 gdbstub_client_read_word(gdbstub_client_t *client, int *dest)
 {
-    char *p = &client->packet[client->packet_pos], *q = p;
+    char *p = &client->packet[client->packet_pos];
+    char *q = p;
     while (((*p >= '0') && (*p <= '9')) || ((*p >= 'A') && (*p <= 'F')) || ((*p >= 'a') && (*p <= 'f')))
         *dest = ((*dest) << 4) | gdbstub_hex_decode(*p++);
     return p - q;
@@ -599,7 +606,8 @@ static void
 gdbstub_client_respond(gdbstub_client_t *client)
 {
     /* Calculate checksum. */
-    int checksum = 0, i;
+    int checksum = 0;
+    int i;
     for (i = 0; i < client->response_pos; i++)
         checksum += client->response[i];
 
@@ -716,12 +724,17 @@ gdbstub_client_read_reg(int index, uint8_t *buf)
 static void
 gdbstub_client_packet(gdbstub_client_t *client)
 {
-    gdbstub_breakpoint_t *breakpoint, *prev_breakpoint = NULL, **first_breakpoint = NULL;
+    gdbstub_breakpoint_t *breakpoint;
+    gdbstub_breakpoint_t *prev_breakpoint = NULL;
+    gdbstub_breakpoint_t **first_breakpoint = NULL;
 
 #ifdef GDBSTUB_CHECK_CHECKSUM /* msys2 gdb 11.1 transmits qSupported and H with invalid checksum... */
     uint8_t rcv_checksum = 0, checksum = 0;
 #endif
-    int     i, j = 0, k = 0, l;
+    int     i;
+    int     j = 0;
+    int     k = 0;
+    int     l;
     uint8_t buf[10] = { 0 };
     char   *p;
 
@@ -1411,14 +1424,14 @@ gdbstub_cpu_exec(int cycs)
 
         /* Add register dump. */
         uint8_t buf[10] = { 0 };
-        int     i, j, k;
-        for (i = 0; i < GDB_REG_MAX; i++) {
+        int     j;
+        for (int i = 0; i < GDB_REG_MAX; i++) {
             if (i >= 0x10)
                 stop_reason[stop_reason_len++] = gdbstub_hex_encode(i >> 4);
             stop_reason[stop_reason_len++] = gdbstub_hex_encode(i & 0x0f);
             stop_reason[stop_reason_len++] = ':';
             j                              = gdbstub_client_read_reg(i, buf);
-            for (k = 0; k < j; k++) {
+            for (int k = 0; k < j; k++) {
                 stop_reason[stop_reason_len++] = gdbstub_hex_encode(buf[k] >> 4);
                 stop_reason[stop_reason_len++] = gdbstub_hex_encode(buf[k] & 0x0f);
             }
@@ -1717,7 +1730,8 @@ gdbstub_mem_access(uint32_t *addrs, int access)
     if (in_gdbstub)
         return;
 
-    int width = access & (GDBSTUB_MEM_WRITE - 1), i;
+    int width = access & (GDBSTUB_MEM_WRITE - 1);
+    int i;
 
     /* Go through the lists of watchpoints for this type of access. */
     gdbstub_breakpoint_t *watchpoint = (access & GDBSTUB_MEM_WRITE) ? first_wwatch : first_rwatch;

src/include/86box/86box.h

@@ -97,52 +97,54 @@ extern uint64_t instru_run_ms;
 #define window_y monitor_settings[0].mon_window_y
 #define window_w monitor_settings[0].mon_window_w
 #define window_h monitor_settings[0].mon_window_h
-extern int window_remember,
-    vid_resize,                   /* (C) allow resizing */
-    invert_display,               /* (C) invert the display */
-    suppress_overscan;            /* (C) suppress overscans */
+extern int      window_remember;
+extern int      vid_resize;       /* (C) allow resizing */
+extern int      invert_display;   /* (C) invert the display */
+extern int      suppress_overscan; /* (C) suppress overscans */
 extern uint32_t lang_id;          /* (C) language code identifier */
 extern char     icon_set[256];    /* (C) iconset identifier */
 extern int      scale;            /* (C) screen scale factor */
 extern int      dpi_scale;        /* (C) DPI scaling of the emulated screen */
 extern int      vid_api;          /* (C) video renderer */
-extern int      vid_cga_contrast, /* (C) video */
-    video_fullscreen,             /* (C) video */
-    video_fullscreen_first,       /* (C) video */
-    video_fullscreen_scale,       /* (C) video */
-    enable_overscan,              /* (C) video */
-    force_43,                     /* (C) video */
-    video_filter_method,          /* (C) video */
-    video_vsync,                  /* (C) video */
-    video_framerate,              /* (C) video */
-    gfxcard[2];                   /* (C) graphics/video card */
+extern int      vid_cga_contrast; /* (C) video */
+extern int    video_fullscreen;       /* (C) video */
+extern int    video_fullscreen_first; /* (C) video */
+extern int    video_fullscreen_scale; /* (C) video */
+extern int    enable_overscan;        /* (C) video */
+extern int    force_43;               /* (C) video */
+extern int    video_filter_method;    /* (C) video */
+extern int    video_vsync;            /* (C) video */
+extern int    video_framerate;        /* (C) video */
+extern int    gfxcard[2];             /* (C) graphics/video card */
 extern char video_shader[512];    /* (C) video */
-extern int  bugger_enabled,       /* (C) enable ISAbugger */
-    postcard_enabled,             /* (C) enable POST card */
-    isamem_type[],                /* (C) enable ISA mem cards */
-    isartc_type;                  /* (C) enable ISA RTC card */
-extern int sound_is_float,        /* (C) sound uses FP values */
-    voodoo_enabled,               /* (C) video option */
-    ibm8514_enabled,              /* (C) video option */
-    xga_enabled;                  /* (C) video option */
+extern int  bugger_enabled;       /* (C) enable ISAbugger */
+extern int    postcard_enabled;       /* (C) enable POST card */
+extern int    isamem_type[];          /* (C) enable ISA mem cards */
+extern int    isartc_type;            /* (C) enable ISA RTC card */
+extern int sound_is_float;        /* (C) sound uses FP values */
+extern int    voodoo_enabled;         /* (C) video option */
+extern int    ibm8514_enabled;        /* (C) video option */
+extern int    xga_enabled;            /* (C) video option */
 extern uint32_t mem_size;         /* (C) memory size (Installed on system board) */
 extern uint32_t isa_mem_size;     /* (C) memory size (ISA Memory Cards) */
-extern int      cpu,              /* (C) cpu type */
-    cpu_use_dynarec,              /* (C) cpu uses/needs Dyna */
-    fpu_type,                     /* (C) fpu type */
-    fpu_softfloat;                /* (C) fpu uses softfloat */
+extern int      cpu;              /* (C) cpu type */
+extern int    cpu_use_dynarec;    /* (C) cpu uses/needs Dyna */
+extern int    fpu_type;           /* (C) fpu type */
+extern int    fpu_softfloat;      /* (C) fpu uses softfloat */
 extern int time_sync;             /* (C) enable time sync */
 extern int hdd_format_type;       /* (C) hard disk file format */
-extern int confirm_reset,         /* (C) enable reset confirmation */
-    confirm_exit,                 /* (C) enable exit confirmation */
-    confirm_save;                 /* (C) enable save confirmation */
+extern int confirm_reset;         /* (C) enable reset confirmation */
+extern int    confirm_exit;       /* (C) enable exit confirmation */
+extern int    confirm_save;       /* (C) enable save confirmation */
 extern int enable_discord;        /* (C) enable Discord integration */
 
 extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out,
                                 how to remove that hack from the ET4000/W32p. */
-extern int    fixed_size_x, fixed_size_y;
+extern int    fixed_size_x;
+extern int    fixed_size_y;
 extern double mouse_sensitivity;            /* (C) Mouse sensitivity scale */
-extern double mouse_x_error, mouse_y_error; /* Mouse error accumulators */
+extern double mouse_x_error;     /* Mouse error accumulator - Y */
+extern double mouse_y_error;     /* Mouse error accumulator - Y */
 extern int    pit_mode;                     /* (C) force setting PIT mode */
 extern int    fm_driver;                    /* (C) select FM sound driver */
 
@@ -196,7 +198,8 @@ extern void sub_cycles(int c);
 extern void resub_cycles(int old_cycles);
 
 extern double isa_timing;
-extern int    io_delay, framecountx;
+extern int    io_delay;
+extern int    framecountx;
 
 extern volatile int cpu_thread_run;
 

src/include/86box/cassette.h

@@ -157,9 +157,11 @@ extern pc_cassette_t *cassette;
 
 extern char          cassette_fname[512];
 extern char          cassette_mode[512];
-extern unsigned long cassette_pos, cassette_srate;
+extern unsigned long cassette_pos;
+extern unsigned long cassette_srate;
 extern int           cassette_enable;
-extern int           cassette_append, cassette_pcm;
+extern int           cassette_append;
+extern int           cassette_pcm;
 extern int           cassette_ui_writeprot;
 
 extern const device_t cassette_device;

src/include/86box/fdd.h

@@ -120,7 +120,8 @@ extern int disable_write;
 
 extern int defaultwriteprot;
 
-extern int writeprot[FDD_NUM], fwriteprot[FDD_NUM];
+extern int writeprot[FDD_NUM];
+extern int fwriteprot[FDD_NUM];
 extern int fdd_changed[FDD_NUM];
 extern int drive_empty[FDD_NUM];
 

src/include/86box/hdc_ide.h

@@ -113,7 +113,8 @@ enum {
     TIMINGS_PIO_FC
 };
 
-extern int ide_ter_enabled, ide_qua_enabled;
+extern int ide_ter_enabled;
+extern int ide_qua_enabled;
 
 #ifdef SCSI_DEVICE_H
 extern ide_t *ide_get_drive(int ch);

src/include/86box/i8080.h

@@ -21,31 +21,38 @@ typedef struct i8080 {
     union {
         uint16_t af; /* Intended in case we also go for μPD9002 emulation, which also has a Z80 emulation mode. */
         struct {
-            uint8_t a, flags;
+            uint8_t a;
+            uint8_t flags;
         };
     };
     union {
         uint16_t bc;
         struct {
-            uint8_t b, c;
+            uint8_t b;
+            uint8_t c;
         };
     };
     union {
         uint16_t de;
         struct {
-            uint8_t d, e;
+            uint8_t d;
+            uint8_t e;
         };
     };
     union {
         uint16_t hl;
         struct {
-            uint8_t h, l;
+            uint8_t h;
+            uint8_t l;
         };
     };
-    uint16_t  pc, sp;
-    uint16_t  oldpc, ei;
-    uint32_t  pmembase, dmembase; /* Base from where i8080 starts. */
-    uint8_t   emulated;           /* 0 = not emulated, use separate registers, 1 = emulated, use x86 registers. */
+    uint16_t  pc;
+    uint16_t  sp;
+    uint16_t  oldpc;
+    uint16_t  ei;
+    uint32_t  pmembase;
+    uint32_t dmembase;   /* Base from where i8080 starts. */
+    uint8_t   emulated;  /* 0 = not emulated, use separate registers, 1 = emulated, use x86 registers. */
     uint16_t *cpu_flags;
     void (*writemembyte)(uint32_t, uint8_t);
     uint8_t (*readmembyte)(uint32_t);

src/include/86box/keyboard.h

@@ -33,7 +33,9 @@ enum {
     DEV_STATE_MAIN_2,
     DEV_STATE_MAIN_CMD,
     DEV_STATE_MAIN_WANT_IN,
-    DEV_STATE_MAIN_IN
+    DEV_STATE_MAIN_IN,
+    DEV_STATE_EXECUTE_BAT,
+    DEV_STATE_MAIN_WANT_EXECUTE_BAT
 };
 
 /* Used by the AT / PS/2 keyboard controller, common device, keyboard, and mouse. */
@@ -61,9 +63,9 @@ typedef struct {
        output multiple bytes. */
     uint8_t cmd_queue[16];
 
-    uint8_t queue[16];
+    uint8_t queue[64];
 
-    int     mode,
+    int     fifo_mask, mode,
             x, y, z, b;
 
     int     *scan;
@@ -190,8 +192,10 @@ extern const scancode scancode_xt[512];
 extern uint8_t keyboard_set3_flags[512];
 extern uint8_t keyboard_set3_all_repeat;
 extern uint8_t keyboard_set3_all_break;
-extern int     mouse_queue_start, mouse_queue_end;
-extern int     mouse_cmd_queue_start, mouse_cmd_queue_end;
+extern int     mouse_queue_start;
+extern int     mouse_queue_end;
+extern int     mouse_cmd_queue_start;
+extern int     mouse_cmd_queue_end;
 extern int     mouse_scan;
 
 extern kbc_at_port_t     *kbc_at_ports[2];

src/include/86box/machine.h

@@ -318,8 +318,8 @@ typedef struct _machine_ {
 } machine_t;
 
 /* Global variables. */
-extern const machine_filter_t machine_types[],
-    machine_chipsets[];
+extern const machine_filter_t machine_types[];
+extern const machine_filter_t machine_chipsets[];
 extern const machine_t machines[];
 extern int             bios_only;
 extern int             machine;

src/include/86box/mem.h

@@ -270,27 +270,27 @@ extern int        writelnext;
 extern uint32_t   ram_mapped_addr[64];
 extern uint8_t    page_ff[4096];
 
-extern mem_mapping_t ram_low_mapping,
+extern mem_mapping_t ram_low_mapping;
 #if 1
-    ram_mid_mapping,
+extern mem_mapping_t ram_mid_mapping;
 #endif
-    ram_remapped_mapping,
-    ram_high_mapping,
-    ram_2gb_mapping,
-    bios_mapping,
-    bios_high_mapping;
+extern mem_mapping_t ram_remapped_mapping;
+extern mem_mapping_t ram_high_mapping;
+extern mem_mapping_t ram_2gb_mapping;
+extern mem_mapping_t bios_mapping;
+extern mem_mapping_t bios_high_mapping;
 
 extern uint32_t mem_logical_addr;
 
-extern page_t *pages,
-    **page_lookup;
+extern page_t  *pages;
+extern page_t **page_lookup;
 
 extern uint32_t get_phys_virt, get_phys_phys;
 
-extern int shadowbios,
-    shadowbios_write;
-extern int readlnum,
-    writelnum;
+extern int shadowbios;
+extern int shadowbios_write;
+extern int readlnum;
+extern int writelnum;
 
 extern int memspeed[11];
 
@@ -299,9 +299,9 @@ extern uint8_t high_page; /* if a high (> 4 gb) page was detected */
 
 extern uint32_t pages_sz; /* #pages in table */
 
-extern int mem_a20_state,
-    mem_a20_alt,
-    mem_a20_key;
+extern int mem_a20_state;
+extern int mem_a20_alt;
+extern int mem_a20_key;
 
 extern uint8_t  read_mem_b(uint32_t addr);
 extern uint16_t read_mem_w(uint32_t addr);

src/include/86box/midi.h

@@ -56,7 +56,8 @@ typedef struct midi_t {
     midi_device_t *m_out_device, *m_in_device;
 } midi_t;
 
-extern midi_t *midi_out, *midi_in;
+extern midi_t *midi_out;
+extern midi_t *midi_in;
 
 extern void midi_out_init(midi_device_t *device);
 extern void midi_in_init(midi_device_t *device, midi_t **mididev);

src/include/86box/mouse.h

@@ -44,10 +44,13 @@ extern "C" {
 #endif
 
 extern int mouse_type;
-extern int mouse_x, mouse_y, mouse_z;
+extern int mouse_x;
+extern int mouse_y;
+extern int mouse_z;
 extern int mouse_mode; /* 1 = Absolute, 0 = Relative */
 extern int mouse_tablet_in_proximity;
-extern double mouse_x_abs, mouse_y_abs;
+extern double mouse_x_abs;
+extern double mouse_y_abs;
 extern int mouse_buttons;
 extern int tablet_tool_type;
 

src/include/86box/network.h

@@ -48,7 +48,7 @@
 #include <stdint.h>
 
 /* Network provider types. */
-#define NET_TYPE_NONE  0 /* networking disabled */
+#define NET_TYPE_NONE  0 /* use the null network driver */
 #define NET_TYPE_SLIRP 1 /* use the SLiRP port forwarder */
 #define NET_TYPE_PCAP  2 /* use the (Win)Pcap API */
 #define NET_TYPE_VDE   3 /* use the VDE plug API */
@@ -57,6 +57,7 @@
 /* Queue size must be a power of 2 */
 #define NET_QUEUE_LEN      16
 #define NET_QUEUE_LEN_MASK (NET_QUEUE_LEN - 1)
+#define NET_QUEUE_COUNT 3
 #define NET_CARD_MAX       4
 #define NET_HOST_INTF_MAX  64
 
@@ -125,6 +126,7 @@ typedef struct netdrv_t {
 extern const netdrv_t net_pcap_drv;
 extern const netdrv_t net_slirp_drv;
 extern const netdrv_t net_vde_drv;
+extern const netdrv_t net_null_drv;
 
 struct _netcard_t {
     const device_t *device;
@@ -132,7 +134,7 @@ struct _netcard_t {
     struct netdrv_t host_drv;
     NETRXCB         rx;
     NETSETLINKSTATE set_link_state;
-    netqueue_t      queues[3];
+    netqueue_t      queues[NET_QUEUE_COUNT];
     netpkt_t        queued_pkt;
     mutex_t        *tx_mutex;
     mutex_t        *rx_mutex;
@@ -150,9 +152,9 @@ typedef struct {
 } netdev_t;
 
 typedef struct {
-    int has_slirp: 1;
-    int has_pcap: 1;
-    int has_vde:  1;
+    int has_slirp;
+    int has_pcap;
+    int has_vde;
 } network_devmap_t;
 
 

src/include/86box/pci.h

@@ -94,8 +94,10 @@ typedef union {
     uint8_t  addr_regs[4];
 } bar_t;
 
-extern int pci_burst_time, agp_burst_time,
-    pci_nonburst_time, agp_nonburst_time;
+extern int pci_burst_time;
+extern int agp_burst_time;
+extern int pci_nonburst_time;
+extern int agp_nonburst_time;
 
 extern void pci_set_irq_routing(int pci_int, int irq);
 extern void pci_set_irq_level(int pci_int, int level);

src/include/86box/pic.h

@@ -29,7 +29,8 @@ typedef struct pic {
     struct pic *slaves[8];
 } pic_t;
 
-extern pic_t pic, pic2;
+extern pic_t pic;
+extern pic_t pic2;
 
 extern void     pic_reset_smi_irq_mask(void);
 extern void     pic_set_smi_irq_mask(int irq, int set);

src/include/86box/pit.h

@@ -84,15 +84,18 @@ typedef struct {
 extern pit_intf_t       pit_devs[2];
 extern const pit_intf_t pit_classic_intf;
 
-extern double SYSCLK, PCICLK, AGPCLK;
+extern double SYSCLK;
+extern double PCICLK;
+extern double AGPCLK;
 
-extern uint64_t PITCONST, ISACONST,
-    CGACONST,
-    MDACONST,
-    HERCCONST,
-    VGACONST1,
-    VGACONST2,
-    RTCCONST;
+extern uint64_t PITCONST;
+extern uint64_t ISACONST;
+extern uint64_t CGACONST;
+extern uint64_t MDACONST;
+extern uint64_t HERCCONST;
+extern uint64_t VGACONST1;
+extern uint64_t VGACONST2;
+extern uint64_t RTCCONST;
 
 extern int refresh_at_enable;
 

src/include/86box/snd_ac97.h

@@ -104,14 +104,22 @@ enum {
 };
 
 typedef struct {
-    const uint16_t index, value, write_mask;
+    const uint16_t index;
+    const uint16_t value;
+    const uint16_t write_mask;
 } ac97_vendor_reg_t;
 
 typedef struct {
-    uint32_t vendor_id, min_rate, max_rate, misc_flags;
-    uint16_t reset_flags, extid_flags,
-        powerdown_mask, regs[64];
-    uint8_t                  codec_id, vendor_reg_page_max;
+    uint32_t vendor_id;
+    uint32_t min_rate;
+    uint32_t max_rate;
+    uint32_t misc_flags;
+    uint16_t reset_flags;
+    uint16_t extid_flags;
+    uint16_t powerdown_mask;
+    uint16_t regs[64];
+    uint8_t                  codec_id;
+    uint8_t                  vendor_reg_page_max;
     const ac97_vendor_reg_t *vendor_regs;
     uint16_t                *vendor_reg_pages;
 } ac97_codec_t;
@@ -131,9 +139,12 @@ extern void    ac97_via_remap_modem_sgd(void *priv, uint16_t new_io_base, uint8_
 extern void    ac97_via_remap_audio_codec(void *priv, uint16_t new_io_base, uint8_t enable);
 extern void    ac97_via_remap_modem_codec(void *priv, uint16_t new_io_base, uint8_t enable);
 
-extern ac97_codec_t **ac97_codec, **ac97_modem_codec;
-extern int            ac97_codec_count, ac97_modem_codec_count,
-    ac97_codec_id, ac97_modem_codec_id;
+extern ac97_codec_t **ac97_codec;
+extern ac97_codec_t **ac97_modem_codec;
+extern int            ac97_codec_count;
+extern int            ac97_modem_codec_count;
+extern int            ac97_codec_id;
+extern int            ac97_modem_codec_id;
 
 #ifdef EMU_DEVICE_H
 extern const device_t ad1881_device;

src/include/86box/snd_mpu401.h

@@ -144,7 +144,8 @@ typedef struct mpu_t {
     void *priv;
 } mpu_t;
 
-extern int mpu401_standalone_enable, mpu401_already_loaded;
+extern int mpu401_standalone_enable;
+extern int mpu401_already_loaded;
 
 extern const device_t mpu401_device;
 extern const device_t mpu401_mca_device;

src/include/86box/snd_speaker.h

@@ -23,7 +23,8 @@
 extern int speaker_mute;
 
 extern int speaker_gated;
-extern int speaker_enable, was_speaker_enable;
+extern int speaker_enable;
+extern int was_speaker_enable;
 
 extern void speaker_init(void);
 

src/include/86box/sound.h

@@ -42,9 +42,9 @@ enum {
 };
 
 extern int ppispeakon;
-extern int gated,
-    speakval,
-    speakon;
+extern int gated;
+extern int speakval;
+extern int speakon;
 
 extern int sound_pos_global;
 extern int sound_card_current[SOUND_CARD_MAX];