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Fixed horizontal retrace start and end extensions on almost every applicable card, fixes #4025.

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This commit is contained in:
OBattler
2024-01-11 14:42:54 +01:00
parent 2afbe3b8a4
commit cd0636ee04
6 changed files with 56 additions and 59 deletions
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4
src/video/vid_et4000.c
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@@ -613,11 +613,11 @@ et4000_recalctimings(svga_t *svga)
svga->rowoffset = 0x100;
if (svga->crtc[0x3f] & 1)
svga->htotal += 256;
if (svga->crtc[0x3f] & 0x04)
svga->hblankstart += 0x100;
if (svga->attrregs[0x16] & 0x20)
svga->hdisp <<= 1;
svga->hblankstart = (((svga->crtc[0x3f] & 0x10) >> 4) << 8) + svga->crtc[4] + 1;
switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) {
case 0:
case 1:

4
src/video/vid_et4000w32.c
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@@ -445,11 +445,11 @@ et4000w32p_recalctimings(svga_t *svga)
svga->rowoffset += 0x100;
if (svga->crtc[0x3F] & 0x01)
svga->htotal += 256;
if (svga->crtc[0x3F] & 0x04)
svga->hblankstart += 0x100;
if (svga->attrregs[0x16] & 0x20)
svga->hdisp <<= 1;
svga->hblankstart = (((svga->crtc[0x3f] & 0x10) >> 4) << 8) + svga->crtc[4] + 1;
svga->clock = (cpuclock * (double) (1ULL << 32)) / svga->getclock((svga->miscout >> 2) & 3, svga->clock_gen);
if (et4000->type != ET4000W32P_DIAMOND) {

9
src/video/vid_mga.c
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@@ -943,8 +943,9 @@ mystique_recalctimings(svga_t *svga)
if (mystique->crtcext_regs[1] & CRTCX_R1_HTOTAL8)
svga->htotal |= 0x100;
if (mystique->crtcext_regs[1] & CRTCX_R1_HBLKSTRT8)
svga->hblankstart += 0x100;
svga->hblankstart = (((mystique->crtcext_regs[1] & 0x04) >> 2) << 8) + svga->crtc[4] + 1;
if (mystique->crtcext_regs[2] & CRTCX_R2_VTOTAL10)
svga->vtotal |= 0x400;
if (mystique->crtcext_regs[2] & CRTCX_R2_VTOTAL11)
@@ -975,8 +976,8 @@ mystique_recalctimings(svga_t *svga)
svga->hdisp_time = svga->hdisp;
svga->rowoffset = svga->crtc[0x13] | ((mystique->crtcext_regs[0] & CRTCX_R0_OFFSET_MASK) << 4);
svga->hblank_end_len = 0x80;
svga->hblank_end_val += mystique->crtcext_regs[1] & CRTCX_R1_HBLKEND6;
svga->hblank_end_val = (mystique->crtcext_regs[1] & 0x40) | (svga->crtc[3] & 0x1f) |
((svga->crtc[5] & 0x80) ? 0x20 : 0x00);
svga->hblank_overscan = 0;

18
src/video/vid_s3.c
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@@ -3988,6 +3988,8 @@ s3_recalctimings(svga_t *svga)
svga->dots_per_clock = ((svga->seqregs[1] & 1) ? 16 : 18);
}
svga->hblankstart = (((svga->crtc[0x5d] & 0x10) >> 4) << 8) + svga->crtc[4] + 1;
if (svga->crtc[0x5d] & 0x04)
svga->hblankstart += 0x100;
if (s3->chip >= S3_VISION964) {
@@ -3995,12 +3997,8 @@ s3_recalctimings(svga_t *svga)
The datasheets for the pre-Trio64V+ cards say +64, which implies bit 6,
and, contrary to VGADOC, it also exists on Trio32, Trio64, Vision868,
and Vision968. */
#if 0
pclog("svga->crtc[0x5d] = %02X\n", svga->crtc[0x5d]);
#endif
if (svga->crtc[0x5d] & 0x08)
svga->hblank_ext = 0x40;
svga->hblank_end_len = 0x00000040;
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | (((svga->crtc[5] & 0x80) >> 7) << 5) |
(((svga->crtc[0x5d] & 0x08) >> 3) << 6);
}
}
@@ -4152,16 +4150,14 @@ s3_trio64v_recalctimings(svga_t *svga)
}
}
if (svga->crtc[0x5d] & 0x04)
svga->hblankstart += 0x100;
svga->hblankstart = (((svga->crtc[0x5d] & 0x10) >> 4) << 8) + svga->crtc[4] + 1;
/* NOTE: The S3 Trio64V+ datasheet says this is bit 7, but then where is bit 6?
The datasheets for the pre-Trio64V+ cards say +64, which implies bit 6,
and, contrary to VGADOC, it also exists on Trio32, Trio64, Vision868,
and Vision968. */
if (svga->crtc[0x5d] & 0x08)
svga->hblank_ext = 0x40;
svga->hblank_end_len = 0x00000040;
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | (((svga->crtc[5] & 0x80) >> 7) << 5) |
(((svga->crtc[0x5d] & 0x08) >> 3) << 6);
svga->hblank_overscan = !(svga->crtc[0x33] & 0x20);
}

12
src/video/vid_s3_virge.c
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@@ -911,13 +911,11 @@ s3_virge_recalctimings(svga_t *svga)
}
svga->vram_display_mask = virge->vram_mask;
}
if (svga->crtc[0x5d] & 0x04)
svga->hblankstart += 0x100;
if (svga->crtc[0x5d] & 0x08)
svga->hblank_ext = 0x40;
svga->hblank_end_len = 0x00000040;
svga->hblankstart = (((svga->crtc[0x5d] & 0x10) >> 4) << 8) + svga->crtc[4] + 1;
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | (((svga->crtc[5] & 0x80) >> 7) << 5) |
(((svga->crtc[0x5d] & 0x08) >> 3) << 6);
svga->hblank_overscan = !(svga->crtc[0x33] & 0x20);
}

68
src/video/vid_voodoo_banshee.c
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@@ -540,37 +540,40 @@ banshee_recalctimings(svga_t *svga)
banshee_t *banshee = (banshee_t *) svga->priv;
const voodoo_t *voodoo = banshee->voodoo;
/*7 R/W Horizontal Retrace End bit 5. -
6 R/W Horizontal Retrace Start bit 8 0x4
5 R/W Horizontal Blank End bit 6. -
4 R/W Horizontal Blank Start bit 8. 0x3
3 R/W Reserved. -
2 R/W Horizontal Display Enable End bit 8. 0x1
1 R/W Reserved. -
0 R/W Horizontal Total bit 8. 0x0*/
if (svga->crtc[0x1a] & 0x01)
svga->htotal += 0x100;
if (svga->crtc[0x1a] & 0x04)
svga->hdisp += 0x100;
if (svga->crtc[0x1a] & 0x10)
svga->hblankstart += 0x100;
if (svga->crtc[0x1a] & 0x20)
svga->hblank_end_val += 0x40;
/*6 R/W Vertical Retrace Start bit 10 0x10
5 R/W Reserved. -
4 R/W Vertical Blank Start bit 10. 0x15
3 R/W Reserved. -
2 R/W Vertical Display Enable End bit 10 0x12
1 R/W Reserved. -
0 R/W Vertical Total bit 10. 0x6*/
if (svga->crtc[0x1b] & 0x01)
svga->vtotal += 0x400;
if (svga->crtc[0x1b] & 0x04)
svga->dispend += 0x400;
if (svga->crtc[0x1b] & 0x10)
svga->vblankstart += 0x400;
if (svga->crtc[0x1b] & 0x40)
svga->vsyncstart += 0x400;
if (banshee->vgaInit0 & 0x40) {
/*7 R/W Horizontal Retrace End bit 5. -
6 R/W Horizontal Retrace Start bit 8 0x4
5 R/W Horizontal Blank End bit 6. -
4 R/W Horizontal Blank Start bit 8. 0x3 ---- Erratum: Actually, 0x02!
3 R/W Reserved. -
2 R/W Horizontal Display Enable End bit 8. 0x1
1 R/W Reserved. -
0 R/W Horizontal Total bit 8. 0x0*/
if (svga->crtc[0x1a] & 0x01)
svga->htotal += 0x100;
if (svga->crtc[0x1a] & 0x04)
svga->hdisp += 0x100;
svga->hblankstart = (((svga->crtc[0x1a] & 0x40) >> 6) << 8) + svga->crtc[4] + 1;
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | (((svga->crtc[5] & 0x80) >> 7) << 5) |
(((svga->crtc[0x1a] & 0x20) >> 5) << 6);
/*6 R/W Vertical Retrace Start bit 10 0x10
5 R/W Reserved. -
4 R/W Vertical Blank Start bit 10. 0x15
3 R/W Reserved. -
2 R/W Vertical Display Enable End bit 10 0x12
1 R/W Reserved. -
0 R/W Vertical Total bit 10. 0x6*/
if (svga->crtc[0x1b] & 0x01)
svga->vtotal += 0x400;
if (svga->crtc[0x1b] & 0x04)
svga->dispend += 0x400;
if (svga->crtc[0x1b] & 0x10)
svga->vblankstart += 0x400;
if (svga->crtc[0x1b] & 0x40)
svga->vsyncstart += 0x400;
}
#if 0
banshee_log("svga->hdisp=%i\n", svga->hdisp);
#endif
@@ -615,8 +618,6 @@ banshee_recalctimings(svga_t *svga)
svga->char_width = 8;
svga->split = 99999;
svga->hblank_end_len = 0x80;
if (banshee->vidProcCfg & VIDPROCCFG_2X_MODE) {
svga->hdisp *= 2;
svga->htotal *= 2;
@@ -801,6 +802,7 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *priv)
case Init_vgaInit0:
banshee->vgaInit0 = val;
svga_set_ramdac_type(svga, (val & VGAINIT0_RAMDAC_8BIT ? RAMDAC_8BIT : RAMDAC_6BIT));
svga_recalctimings(svga);
break;
case Init_vgaInit1:
banshee->vgaInit1 = val;