Merge pull request #6823 from WNT50/ps2isa

Floppy and hard disk fixes for IBM PS/2 model 30-286
This commit is contained in:
Miran Grča
2026-02-19 12:29:53 +01:00
committed by GitHub
3 changed files with 8 additions and 9 deletions

View File

@@ -2184,7 +2184,7 @@ read_p1(atkbc_t *dev)
-----------------
IBM PS/1: xxxxxxxx
IBM PS/2 MCA: xxxxx1xx
IBM PS/2 Model 30-286: xxxxx1xx
IBM PS/2 Model 30-286: x0xxx1xx
Intel AMI Pentium BIOS'es with AMI MegaKey KB-5 keyboard controller: x1x1xxxx
Acer: xxxxx0xx
Packard Bell PB450: xxxxx1xx
@@ -2199,7 +2199,8 @@ read_p1(atkbc_t *dev)
Acer: Pull down bit 6 if primary display is MDA.
Pull down bit 2 always (must be so to enable CMOS Setup).
IBM PS/1: Pull down bit 6 if current floppy drive is 3.5".
IBM PS/2 Model 30-286: Pull down bits 5 and 4 based on planar memory size.
IBM PS/2 Model 30-286: Pull down bit 6 always (for 1.44M floppy).
Pull down bits 5 and 4 based on planar memory size.
Epson Action Tower 2600: Pull down bit 3 always (for Epson logo).
NCR: Pull down bit 5 always (power-on default speed = high).
Pull down bit 3 if there is no FPU.
@@ -2215,6 +2216,7 @@ read_p1(atkbc_t *dev)
Bit 6: Mostly, display: 0 = CGA, 1 = MDA, inverted on Xi8088 and Acer KBC's;
Intel AMI MegaKey KB-5: Used for green features, SMM handler expects it to be set;
IBM PS/1 Model 2011: 0 = current FDD is 3.5", 1 = current FDD is 5.25";
IBM PS/2 Model 30-286: 0 = drive A is 1.44M, 1 = drive A is 720k;
Compaq: 0 = Compaq dual-scan display, 1 = non-Compaq display.
Bit 5: Mostly, manufacturing jumper: 0 = installed (infinite loop at POST), 1 = not installed;
NCR: power-on default speed: 0 = high, 1 = low;

View File

@@ -937,9 +937,6 @@ do_send:
break;
case CMD_WRITE_VERIFY:
no_data = 1;
fallthrough;
case CMD_WRITE_SECTORS:
if (!drive->present) {
dev->ssb.not_ready = 1;

View File

@@ -264,18 +264,18 @@ machine_ps2_isa_p1_handler(void)
switch (mem_size / 1024) {
case 0: /*256Kx2*/
mem_p1 = 0xf0;
mem_p1 = 0xb0;
break;
case 1: /*256Kx4*/
mem_p1 = 0xe0;
mem_p1 = 0xa0;
break;
case 2: /*1Mx2*/
case 3:
mem_p1 = 0xd0;
mem_p1 = 0x90;
break;
case 4: /*1Mx4*/
default:
mem_p1 = 0xc0;
mem_p1 = 0x80;
break;
}