Merge branch 'master' into pr/2899

.ci/AppImageBuilder.yml

@@ -57,9 +57,9 @@ AppDir:
     - libqt5gui5 # if QT:BOOL=ON
     - libqt5widgets5 # if QT:BOOL=ON
     - libsixel1 # if CLI:BOOL=ON
-    - libslirp0 # if SLIRP_EXTERNAL:BOOL=ON
+    - libslirp0
     - libsndio7.0 # if OPENAL:BOOL=ON
-    - libwayland-client0 # if QT:BOOL=ON
+    - libvdeplug-dev # -dev also pulls in libvdeplug2. -dev is required to get the proper .so symlink to the library
     - libx11-6 # if QT:BOOL=ON
     - libx11-xcb1 # if QT:BOOL=ON
     - libxcb1 # if QT:BOOL=ON
@@ -67,10 +67,13 @@ AppDir:
     - libxcb-shape0 # if QT:BOOL=ON
     - libxcb-shm0 # if QT:BOOL=ON
     - libxcb-xfixes0 # if QT:BOOL=ON
+    - libxkbcommon-x11-0 # if QT:BOOL=ON
+    - qtwayland5 # if QT:BOOL=ON
     - zlib1g
   files:
     exclude:
     - etc
+    - lib/udev
     - usr/[!ls]* # * except lib, local, share
     - usr/lib/*/libasound.so.* # using our own ALSA can cause issues, and the API is pretty stable anyway
     - usr/lib/*.a # produced by library compilation

.ci/Jenkinsfile

@@ -78,8 +78,7 @@ def dynarecSlugs = [
 ]
 
 def presets = [
-	'Regular',
-	'Debug'
+	'Regular'
 ]
 
 def presetSlugs = [
@@ -284,13 +283,19 @@ pipeline {
 															def archName = archNames[archSlug]
 															if (os == 'macOS')
 																archName = archNamesMac[archSlug]
-															dir("${dynarecNames[dynarec]}/$os - $archName") {
-																ret = runBuild("-b \"$packageName\" \"$arch\" ${presetFlags[preset]} ${dynarecFlags[dynarec]} ${osFlags[os]} $buildFlags")
+															dir(dynarecNames[dynarec]) {
+																dir("$os - $archName") {
+																	ret = runBuild("-b \"$packageName\" \"$arch\" ${presetFlags[preset]} ${dynarecFlags[dynarec]} ${osFlags[os]} $buildFlags")
+																	if (presets.size() == 1)
+																		writeFile file: '.forcedir', text: ''
+																}
+																if ((osArchs.size() == 1) && (thisOsArchs.size() == 1))
+																	writeFile file: '.forcedir', text: ''
 															}
 
 															if (ret == 0) {
 																/* Archive resulting artifacts. */
-																archiveArtifacts artifacts: "**/**/$packageName*"
+																archiveArtifacts artifacts: "**/$packageName*, **/.forcedir", defaultExcludes: false
 															} else {
 																/* Fail this stage. */
 																failStage()

.ci/build.sh

@@ -24,8 +24,8 @@
 # - For Windows (MSYS MinGW) builds:
 #   - Packaging requires 7-Zip on Program Files
 #   - Packaging the Ghostscript DLL requires 32-bit and/or 64-bit Ghostscript on Program Files
-#   - Packaging the FluidSynth DLL requires it to be at /home/86Box/dll32/libfluidsynth.dll
-#     and/or /home/86Box/dll64/libfluidsynth64.dll (for 32-bit and 64-bit builds respectively)
+#   - Packaging the XAudio2 DLL for FAudio requires it to be at /home/86Box/dll32/xaudio2*.dll
+#     and/or /home/86Box/dll64/xaudio2*.dll (for 32-bit and 64-bit builds respectively)
 # - For Linux builds:
 #   - Only Debian and derivatives are supported
 #   - dpkg and apt-get are called through sudo to manage dependencies; make sure those
@@ -156,7 +156,18 @@ do
 
 		-p)
 			shift
-			dep_report=1
+
+			# Check for lddtree and install it if required.
+			which lddtree > /dev/null || DEBIAN_FRONTEND=noninteractive sudo apt-get -y install pax-utils
+
+			# Default to main binary.
+			binary="$1"
+			[ -z "$binary" ] && binary="archive_tmp/usr/local/bin/$project"
+
+			# Run lddtree with AppImage lib directories included in the search path.
+			LD_LIBRARY_PATH=$(find "$(pwd)/archive_tmp" -type d -name lib -o -name lib64 | while read dir; do find "$dir" -type d; done | tr '\n' ':') \
+				lddtree "$binary"
+			exit $?
 			;;
 
 		-s)
@@ -198,6 +209,7 @@ if [ -z "$package_name" -a -z "$tarball_name" ] || [ -n "$package_name" -a -z "$
 then
 	echo '[!] Usage: build.sh -b {package_name} {architecture} [-t] [cmake_flags...]'
 	echo '           build.sh -s {source_tarball_name}'
+	echo 'Dep. tree: build.sh -p [archive_tmp/path/to/binary]'
 	exit 100
 fi
 
@@ -247,6 +259,7 @@ case $arch in
 esac
 [ ! -e "cmake/$toolchain.cmake" ] && toolchain=flags-gcc
 toolchain_file="cmake/$toolchain.cmake"
+toolchain_file_libs=
 
 # Perform platform-specific setup.
 strip_binary=strip
@@ -275,7 +288,6 @@ then
 	echo [-] Using MSYSTEM [$MSYSTEM]
 
 	# Install dependencies only if we're in a new build and/or architecture.
-	freetype_dll="$cache_dir/freetype.$MSYSTEM.dll"
 	if check_buildtag "$MSYSTEM"
 	then
 		# Update databases and keyring only if we're in a new build.
@@ -317,8 +329,8 @@ then
 			done
 		fi
 
-		# Generate a new freetype DLL for this architecture.
-		rm -f "$freetype_dll"
+		# Clean pacman cache when running under Jenkins to save disk space.
+		[ "$CI" = "true" ] && rm -rf /var/cache/pacman/pkg
 
 		# Save build tag to skip this later. Doing it here (once everything is
 		# in place) is important to avoid potential issues with retried builds.
@@ -345,10 +357,6 @@ then
 			# Run build for the architecture.
 			args=
 			[ $strip -ne 0 ] && args="-t $args"
-			case $arch_universal in # workaround: force new dynarec on for ARM
-				arm*) cmake_flags_extra="-D NEW_DYNAREC=ON";;
-				*)    cmake_flags_extra=;;
-			esac
 			zsh -lc 'exec "'"$0"'" -n -b "universal slice" "'"$arch_universal"'" '"$args""$cmake_flags"' '"$cmake_flags_extra"
 			status=$?
 
@@ -561,16 +569,15 @@ else
 
 	# Establish general dependencies.
 	pkgs="cmake ninja-build pkg-config git wget p7zip-full extra-cmake-modules wayland-protocols tar gzip file appstream"
-	[ $dep_report -ne 0 ] && pkgs="$pkgs pax-utils"
 	if [ "$(dpkg --print-architecture)" = "$arch_deb" ]
 	then
 		pkgs="$pkgs build-essential"
 	else
 		# Add foreign architecture if required.
-		if ! dpkg --print-foreign-architectures | grep -qE '^'"$arch_deb"'$'
+		if ! dpkg --print-foreign-architectures | grep -Fqx "$arch_deb"
 		then
 			sudo dpkg --add-architecture "$arch_deb"
-			
+
 			# Force an apt-get update.
 			save_buildtag aptupdate "arch_$arch_deb"
 		fi
@@ -584,7 +591,7 @@ else
 	# ...and the ones we do want listed. Non-dev packages fill missing spots on the list.
 	libpkgs=""
 	longest_libpkg=0
-	for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev
+	for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev
 	do
 		libpkgs="$libpkgs $pkg:$arch_deb"
 		length=$(echo -n $pkg | sed 's/-dev$//' | sed "s/qtdeclarative/qt/" | wc -c)
@@ -605,10 +612,7 @@ else
 		*)	libdir="$arch_triplet";;
 	esac
 
-	# Create CMake cross toolchain file. The file is saved on a fixed location for
-	# the library builds we do later, since running CMake again on a library we've
-	# already built before will *not* update its toolchain file path; therefore, we
-	# cannot point them to our working directory, which may change across builds.
+	# Create CMake cross toolchain file.
 	toolchain_file_new="$cache_dir/toolchain.$arch_deb.cmake"
 	cat << EOF > "$toolchain_file_new"
 set(CMAKE_SYSTEM_NAME Linux)
@@ -629,13 +633,21 @@ set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
 set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
 
 set(ENV{PKG_CONFIG_PATH} "")
-set(ENV{PKG_CONFIG_LIBDIR} "/usr/lib/$libdir/pkgconfig:/usr/share/$libdir/pkgconfig")
+set(ENV{PKG_CONFIG_LIBDIR} "/usr/lib/$libdir/pkgconfig:/usr/share/$libdir/pkgconfig:/usr/share/pkgconfig")
 
 include("$(realpath "$toolchain_file")")
 EOF
 	toolchain_file="$toolchain_file_new"
 	strip_binary="$arch_triplet-strip"
 
+	# Create a separate toolchain file for library compilation without including
+	# our own toolchain files, letting libraries set their own C(XX)FLAGS instead.
+	# The file is saved on a fixed location, since running CMake again on a library
+	# we've already built before will *not* update its toolchain file path; therefore,
+	# we cannot point them to our working directory, which may change across builds.
+	toolchain_file_libs="$cache_dir/toolchain.$arch_deb.libs.cmake"
+	grep -Ev "^include\(" "$toolchain_file" > "$toolchain_file_libs"
+
 	# Install dependencies only if we're in a new build and/or architecture.
 	if check_buildtag "$arch_deb"
 	then
@@ -658,9 +670,6 @@ EOF
 	else
 		echo [-] Not installing dependencies again
 	fi
-
-	# Link against the system libslirp instead of compiling ours.
-	cmake_flags_extra="$cmake_flags_extra -D SLIRP_EXTERNAL=ON"
 fi
 
 # Point CMake to the toolchain file.
@@ -674,8 +683,8 @@ rm -rf build
 case $arch in
 	32 | x86)	cmake_flags_extra="$cmake_flags_extra -D ARCH=i386";;
 	64 | x86_64*)	cmake_flags_extra="$cmake_flags_extra -D ARCH=x86_64";;
-	ARM32 | arm32)	cmake_flags_extra="$cmake_flags_extra -D ARCH=arm";;
-	ARM64 | arm64)	cmake_flags_extra="$cmake_flags_extra -D ARCH=arm64";;
+	ARM32 | arm32)	cmake_flags_extra="$cmake_flags_extra -D ARCH=arm -D NEW_DYNAREC=ON";;
+	ARM64 | arm64)	cmake_flags_extra="$cmake_flags_extra -D ARCH=arm64 -D NEW_DYNAREC=ON";;
 	*)		cmake_flags_extra="$cmake_flags_extra -D \"ARCH=$arch\"";;
 esac
 
@@ -780,10 +789,6 @@ then
 	sevenzip="$pf/7-Zip/7z.exe"
 	[ "$arch" = "32" -a -d "/c/Program Files (x86)" ] && pf="/c/Program Files (x86)"
 
-	# Archive freetype from cache or generate it from local MSYS installation.
-	[ ! -e "$freetype_dll" ] && .ci/static2dll.sh -p freetype2 /$MSYSTEM/lib/libfreetype.a "$freetype_dll"
-	cp -p "$freetype_dll" archive_tmp/freetype.dll
-
 	# Archive Ghostscript DLL from local official distribution installation.
 	for gs in "$pf"/gs/gs*.*.*
 	do
@@ -794,8 +799,8 @@ then
 	"$sevenzip" e -y -o"archive_tmp" "$discord_zip" "lib/$arch_discord/discord_game_sdk.dll"
 	[ ! -e "archive_tmp/discord_game_sdk.dll" ] && echo [!] No Discord Game SDK for architecture [$arch_discord]
 
-	# Archive other DLLs from local directory.
-	cp -p "/home/$project/dll$arch/"* archive_tmp/
+	# Archive XAudio2 DLL if required.
+	grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt || cp -p "/home/$project/dll$arch/xaudio2"* archive_tmp/
 
 	# Archive executable, while also stripping it if requested.
 	if [ $strip -ne 0 ]
@@ -877,13 +882,13 @@ else
 
 	if grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt
 	then
-		# Build openal-soft 1.22.2 manually to fix audio issues. This is a temporary
+		# Build openal-soft 1.23.1 manually to fix audio issues. This is a temporary
 		# workaround until a newer version of openal-soft trickles down to Debian repos.
-		prefix="$cache_dir/openal-soft-1.22.2"
+		prefix="$cache_dir/openal-soft-1.23.1"
 		if [ ! -d "$prefix" ]
 		then
 			rm -rf "$cache_dir/openal-soft-"* # remove old versions
-			wget -qO - https://github.com/kcat/openal-soft/archive/refs/tags/1.22.2.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix"
+			wget -qO - https://github.com/kcat/openal-soft/archive/refs/tags/1.23.1.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix"
 		fi
 
 		# Patches to build with the old PipeWire version in Debian.
@@ -891,7 +896,7 @@ else
 		sed -i -e 's/PW_KEY_CONFIG_NAME/"config.name"/g' "$prefix/alc/backends/pipewire.cpp"
 
 		prefix_build="$prefix/build-$arch_deb"
-		cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
+		cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
 		cmake --build "$prefix_build" -j$(nproc) || exit 99
 		cmake --install "$prefix_build" || exit 99
 
@@ -907,7 +912,7 @@ else
 			wget -qO - https://github.com/FNA-XNA/FAudio/archive/refs/tags/22.03.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix"
 		fi
 		prefix_build="$prefix/build-$arch_deb"
-		cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
+		cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
 		cmake --build "$prefix_build" -j$(nproc) || exit 99
 		cmake --install "$prefix_build" || exit 99
 
@@ -928,7 +933,7 @@ else
 		wget -qO - https://github.com/thestk/rtmidi/archive/refs/tags/4.0.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix"
 	fi
 	prefix_build="$prefix/build-$arch_deb"
-	cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
+	cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99
 	cmake --build "$prefix_build" -j$(nproc) || exit 99
 	cmake --install "$prefix_build" || exit 99
 
@@ -940,15 +945,12 @@ else
 		rm -rf "$cache_dir/fluidsynth-"* # remove old versions
 		wget -qO - https://github.com/FluidSynth/fluidsynth/archive/refs/tags/v2.3.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix"
 	fi
-	cp cmake/flags-gcc.cmake cmake/flags-gcc.cmake.old
-	sed -i -e 's/ -Werror=.*\([" ]\)/\1/g' cmake/flags-gcc.cmake # temporary hack for -Werror=old-style-definition non-compliance on FluidSynth and SDL2
 	prefix_build="$prefix/build-$arch_deb"
 	cmake -G Ninja -D enable-dbus=OFF -D enable-jack=OFF -D enable-oss=OFF -D enable-sdl2=OFF -D enable-pulseaudio=OFF -D enable-pipewire=OFF -D enable-alsa=OFF \
-		-D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \
+		-D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \
 		-S "$prefix" -B "$prefix_build" || exit 99
 	cmake --build "$prefix_build" -j$(nproc) || exit 99
 	cmake --install "$prefix_build" || exit 99
-	cp -p "$cwd_root/archive_tmp/usr/bin/fluidsynth" fluidsynth
 
 	# Build SDL2 for joystick and FAudio support, with most components
 	# disabled to remove the dependencies on PulseAudio and libdrm.
@@ -976,11 +978,24 @@ else
 		-D SDL_ATOMIC=OFF -D SDL_EVENTS=ON -D SDL_HAPTIC=OFF -D SDL_POWER=OFF -D SDL_THREADS=ON -D SDL_TIMERS=ON -D SDL_FILE=OFF \
 		-D SDL_LOADSO=ON -D SDL_CPUINFO=ON -D SDL_FILESYSTEM=$sdl_ui -D SDL_DLOPEN=OFF -D SDL_SENSOR=OFF -D SDL_LOCALE=OFF \
 		\
-		-D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \
+		-D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \
 		-S "$prefix" -B "$prefix_build" || exit 99
 	cmake --build "$prefix_build" -j$(nproc) || exit 99
 	cmake --install "$prefix_build" || exit 99
-	mv cmake/flags-gcc.cmake.old cmake/flags-gcc.cmake
+
+	# We rely on the host to provide Vulkan libs to sidestep any potential
+	# dependency issues. While Qt expects libvulkan.so, at least Debian only
+	# ships libvulkan.so.1 without a symlink, so make our own as a workaround.
+	# The relative paths prevent appimage-builder from flattening the links.
+	mkdir -p "archive_tmp/usr/lib/$libdir"
+	relroot="../../../../../../../../../../../../../../../../../../../../../../../../../../../../.."
+	ln -s "$relroot/usr/lib/libvulkan.so.1" "archive_tmp/usr/lib/libvulkan.so"
+	ln -s "$relroot/usr/lib/$libdir/libvulkan.so.1" "archive_tmp/usr/lib/$libdir/libvulkan.so"
+
+	# The FluidSynth packaged by Debian bullseye is ABI incompatible with
+	# the newer version we compile, despite sharing a major version. Since we
+	# don't run into the one breaking ABI change they made, just symlink it.
+	ln -s "$(readlink "archive_tmp/usr/lib/libfluidsynth.so.3")" "archive_tmp/usr/lib/libfluidsynth.so.2"
 
 	# Archive Discord Game SDK library.
 	7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so"
@@ -1014,7 +1029,7 @@ else
 		mkdir -p "$icon_dir"
 		cp -rp "$icon_size" "$icon_dir/apps"
 	done
-	project_icon=$(ls "$icon_base/"[0-9]*x[0-9]*/* | head -1 | grep -oP '/\K([^/]+)(?=\.[^\.]+$)')
+	project_icon=$(find "$icon_base/"[0-9]*x[0-9]*/* -type f -name '*.png' -o -name '*.svg' | head -1 | grep -oP '/\K([^/]+)(?=\.[^\.]+$)')
 
 	# Archive executable, while also stripping it if requested.
 	mkdir -p archive_tmp/usr/local/bin
@@ -1139,20 +1154,11 @@ EOF
 			--recipe AppImageBuilder-generated.yml --appdir "$(grep -oP '^\s+path: \K(.+)' AppImageBuilder-generated.yml)"
 		status=$?
 		[ $status -eq 0 ] && break
+		[ $status -eq 127 ] && rm -rf /tmp/appimage_extracted_*
 	done
 
 	# Remove appimage-builder binary on failure, just in case it's corrupted.
 	[ $status -ne 0 ] && rm -f "$appimage_builder_binary"
-
-	# Generate library dependency report if requested.
-	if [ $dep_report -ne 0 ]
-	then
-		echo '[-] Library dependency report:'
-
-		# Run lddtree with AppImage lib directories included in the search path.
-		LD_LIBRARY_PATH=$(find "$(pwd)/archive_tmp" -type d -name lib -o -name lib64 | while read dir; do find "$dir" -type d; done | tr '\n' ':') \
-			lddtree "archive_tmp/usr/local/bin/$project" 2>&1 | tee depreport.txt
-	fi
 fi
 
 # Check if the archival succeeded.

.ci/dependencies_macports.txt

@@ -11,3 +11,7 @@ vulkan-headers
 MoltenVK
 qt5
 wget
+fluidsynth
+ghostscript
+libslirp
+vde2

.ci/dependencies_msys.txt

@@ -8,5 +8,6 @@ SDL2
 zlib
 libpng
 rtmidi
+libslirp
 qt5-static
 qt5-translations

.ci/static2dll.sh

@@ -1,160 +0,0 @@
-#!/bin/sh
-#
-# 86Box    A hypervisor and IBM PC system emulator that specializes in
-#          running old operating systems and software designed for IBM
-#          PC systems and compatibles from 1981 through fairly recent
-#          system designs based on the PCI bus.
-#
-#          This file is part of the 86Box distribution.
-#
-#          Script for converting MinGW static libraries into a DLL.
-#
-#
-# Authors: RichardG, <richardg867@gmail.com>
-#
-#          Copyright 2021 RichardG.
-#
-
-def_file="static2dll.def"
-seen_file="static2dll.seen"
-libs_file="static2dll.libs"
-
-find_lib() {
-	# Try to find a static library's file.
-	local msystem_lib="/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')/lib/lib"
-	if [ -e "$msystem_lib$1.a" ]
-	then
-		echo "$msystem_lib$1.a"
-	elif [ -e "$msystem_lib$1.dll.a" ]
-	then
-		echo "$msystem_lib$1.dll.a"
-	else
-		# Return dynamic reference to the library.
-		echo "-l$1"
-		return 1
-	fi
-}
-
-add_lib() {
-	# Always make sure this lib is listed after the last lib that depends on it.
-	old_libs=$(cat "$libs_file")
-	rm -f "$libs_file"
-	for lib in $old_libs
-	do
-		[ "$lib" != "$*" ] && echo "$lib" >> "$libs_file"
-	done
-	echo "$*" >> "$libs_file"
-
-	# Add libstdc++ in the end if required.
-	if echo "$*" | grep -q "/"
-	then
-		grep -Eq -- "__cxa_|__gxx_" "$1" 2> /dev/null && add_lib -static -lstdc++
-	fi
-
-	# Add libiconv for libintl.
-	if echo "$*" | grep -q "libintl"
-	then
-		add_lib $(find_lib iconv)
-	fi
-
-	# Add libuuid for glib.
-	if echo "$*" | grep -q "libglib"
-	then
-		add_lib $(find_lib uuid)
-	fi
-}
-
-run_pkgconfig() {
-	local cache_file="static2dll.$1.cache"
-	if [ -e "$cache_file" ]
-	then
-		cat "$cache_file"
-	else
-		pkg-config --static --libs "$1" 2> /dev/null | tee "$cache_file"
-	fi
-}
-
-parse_pkgconfig() {
-	# Parse arguments.
-	local layers=$1
-	shift
-	local input_lib_name=$1
-	shift
-
-	# Don't process the same file again.
-	grep -q '^'$input_lib_name'$' "$seen_file" && return
-	echo $input_lib_name >> "$seen_file"
-
-	echo "$layers" parse_pkgconfig $input_lib_name
-
-	# Parse pkg-config arguments.
-	for arg in $*
-	do
-		local arg_base="$(echo $arg | cut -c1-2)"
-		if [ "x$arg_base" = "x-l" ]
-		then
-			# Don't process the same lib again.
-			local lib_name="$(echo $arg | cut -c3-)"
-			[ "x$lib_name" == "x$input_lib_name" ] && continue
-
-			# Add lib path.
-			add_lib "$(find_lib $lib_name)"
-
-			# Get this lib's dependencies through pkg-config.
-			local pkgconfig="$(run_pkgconfig "$lib_name")"
-			[ $? -eq 0 ] && parse_pkgconfig "$layers"'>' "$lib_name" $pkgconfig || echo $lib_name >> "$seen_file"
-		elif [ "x$(echo $arg_base | cut -c1)" = "x-" ]
-		then
-			# Ignore other arguments.
-			continue
-		else
-			# Add lib path.
-			add_lib "$arg"
-		fi
-	done
-}
-
-# Parse arguments.
-case $1 in
-	-p) # -p pkg_config_name static_lib_path out_dll
-		shift
-		base_pkgconfig=$(run_pkgconfig "$1")
-		base_path="$2"
-		base_name="$1"
-		;;
-
-	*) # pc_path static_lib_path out_dll
-		base_pkgconfig="$(grep ^Libs.private: $1 | cut -d: -f2-)"
-		base_path="$2"
-		base_name="$2"
-		;;
-esac
-
-# Check arguments.
-if [ -z "$base_pkgconfig" -o -z "$base_path" -o -z "$base_name" ]
-then
-	echo Usage:
-	echo static2dll.sh -p {pkgconfig_package_name} {static_lib_path} {out_dll_name}
-	echo static2dll.sh {pc_file_path} {static_lib_path} {out_dll_name}
-	exit 1
-fi
-
-# Produce .def file.
-echo LIBRARY $(basename "$3") > "$def_file"
-echo EXPORTS >> "$def_file"
-nm "$base_path" | grep " [TC] " | sed "/ _/s// /" | awk '{ print $3 }' >> "$def_file"
-
-# Parse dependencies recursively.
-rm -f "$seen_file" "$libs_file" "$libs_file.tmp"
-touch "$seen_file" "$libs_file"
-parse_pkgconfig '>' $base_name $base_pkgconfig
-
-# Produce final DLL.
-dllwrap --def "$def_file" -o "$3" -Wl,--allow-multiple-definition "$base_path" $(cat "$libs_file")
-status=$?
-[ $status -eq 0 ] && rm -f "$def_file" "$seen_file" "$libs_file" "static2dll.*.cache"
-
-# Update final DLL timestamp.
-touch -r "$base_path" "$3"
-
-exit $status

.github/codeql/codeql-config.yml

@@ -0,0 +1,5 @@
+name: "86Box CodeQL config"
+
+queries:
+  - uses: security-extended
+#  - uses: security-and-quality

.github/workflows/c-cpp.yml

@@ -90,8 +90,13 @@ jobs:
             libpng:p
             openal:p
             rtmidi:p
+            libslirp:p
+            fluidsynth:p
             libvncserver:p
-      - uses: actions/checkout@v3
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
       - name: make
         run: >-
           make -fwin/Makefile.mingw -j
@@ -101,7 +106,9 @@ jobs:
           CLANG=${{ matrix.environment.clang }}
           X64=${{ matrix.environment.x64 }}
         working-directory: ./src
-      - uses: actions/upload-artifact@v3
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v3
         with:
           name: '86Box${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
           path: src/86Box.exe

.github/workflows/cmake.yml

@@ -24,11 +24,15 @@ on:
       - "!**/Makefile*"
 
 jobs:
+
   msys2:
     name: "Windows MSYS2 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
 
     runs-on: windows-2022
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     defaults:
       run:
         shell: msys2 {0}
@@ -100,9 +104,19 @@ jobs:
             libpng:p
             openal:p
             rtmidi:p
+            libslirp:p
+            fluidsynth:p
             libvncserver:p
             ${{ matrix.ui.packages }}
-      - uses: actions/checkout@v3
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
+
       - name: Configure CMake
         run: >-
           cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
@@ -111,21 +125,36 @@ jobs:
           -D CMAKE_INSTALL_PREFIX=./build/artifacts
           -D QT=${{ matrix.ui.qt }}
           -D STATIC_BUILD=${{ matrix.ui.static }}
+
       - name: Build
-        run: cmake --build build
+        run: |
+          cmake --build build
+
+      - name: Run sonar-scanner
+        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
+
       - name: Generate package
         run: cmake --install build
-      - uses: actions/upload-artifact@v3
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v3
         with:
           name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
           path: build/artifacts/**
 
   llvm-windows:
     name: "Windows vcpkg/LLVM (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.target.name }})"
+    if: 0
 
     runs-on: windows-2022
 
     env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
       VCPKG_BINARY_SOURCES: 'clear;nuget,GitHub,readwrite'
 
     strategy:
@@ -177,12 +206,15 @@ jobs:
         uses: ilammy/msvc-dev-cmd@v1
         with:
           arch: ${{ matrix.target.vcvars }}
+
       - name: Add LLVM to path
         run: echo "C:/Program Files/LLVM/bin" >> $env:GITHUB_PATH
+
       - name: Download Ninja
         run: >
           Invoke-WebRequest https://github.com/ninja-build/ninja/releases/download/v1.11.1/ninja-win.zip -OutFile ninja-win.zip && 
           Expand-Archive ninja-win.zip -DestinationPath .
+
       - name: Setup NuGet Credentials
         run: >
           & (C:/vcpkg/vcpkg fetch nuget | tail -n 2)
@@ -192,9 +224,18 @@ jobs:
           -name "GitHub"
           -username "86Box"
           -password "${{ secrets.GITHUB_TOKEN }}"
+
       - name: Fix MSVC atomic headers
         run: dir "C:/Program Files/Microsoft Visual Studio/2022/*/VC/Tools/MSVC/*/include" -include stdatomic.h -recurse | del
-      - uses: actions/checkout@v3
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
+
       - name: Configure CMake
         run: >
           cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
@@ -205,19 +246,36 @@ jobs:
           -D VCPKG_TARGET_TRIPLET=${{ matrix.target.triplet }}
           -D VCPKG_HOST_TRIPLET=x64-windows
           -D VCPKG_USE_HOST_TOOLS=ON
+
       - name: Fix Qt
         if: matrix.ui.qt == 'on'
         run: |
          $qtTargetsPath = "${{ github.workspace }}/build/vcpkg_installed/${{ matrix.target.triplet }}/share/Qt6/Qt6Targets.cmake"
          (Get-Content $qtTargetsPath) -replace "^.*-Zc:__cplusplus;-permissive-.*$","#$&" | Set-Content $qtTargetsPath
+
       - name: Reconfigure CMake
         if: matrix.ui.qt == 'on'
-        run: cmake clean build
+        run: |
+          cmake clean build
+
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-win-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
+
       - name: Generate package
-        run: cmake --install build
-      - uses: actions/upload-artifact@v3
+        run: |
+          cmake --install build
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v3
         with:
           name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-LLVM-${{ matrix.target.name }}-gha${{ github.run_number }}'
           path: build/artifacts/**
@@ -227,6 +285,9 @@ jobs:
 
     runs-on: ubuntu-22.04
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     strategy:
       fail-fast: true
       matrix:
@@ -252,7 +313,10 @@ jobs:
             slug: -Qt
             packages: >-
               qtbase5-dev
+              qtbase5-private-dev
               qttools5-dev
+              libevdev-dev
+              libxkbcommon-x11-dev
 
     steps:
       - name: Install dependencies
@@ -266,9 +330,19 @@ jobs:
           libc6-dev
           librtmidi-dev
           libopenal-dev
+          libslirp-dev
+          libfluidsynth-dev
           libvncserver-dev
           ${{ matrix.ui.packages }}
-      - uses: actions/checkout@v3
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
+
       - name: Configure CMake
         run: >-
           cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
@@ -276,11 +350,25 @@ jobs:
           -D NEW_DYNAREC=${{ matrix.dynarec.new }}
           -D CMAKE_INSTALL_PREFIX=./build/artifacts
           -D QT=${{ matrix.ui.qt }}
+
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+#        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
+
       - name: Generate package
-        run: cmake --install build
-      - uses: actions/upload-artifact@v3
+        run: |
+          cmake --install build
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v3
         with:
           name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-UbuntuJammy-x86_64-gha${{ github.run_number }}'
           path: build/artifacts/**
@@ -290,6 +378,9 @@ jobs:
 
     runs-on: macos-11
 
+    env:
+      BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
+
     strategy:
       fail-fast: true
       matrix:
@@ -326,9 +417,18 @@ jobs:
           libpng
           rtmidi
           openal-soft
+          fluidsynth
           libvncserver
           ${{ matrix.ui.packages }}
-      - uses: actions/checkout@v3
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+        with:
+          fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+      - name: Install sonar-scanner and build-wrapper
+        uses: SonarSource/sonarcloud-github-c-cpp@v1
+
       - name: Configure CMake
         run: >-
           cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
@@ -339,11 +439,25 @@ jobs:
           -D Qt5_ROOT=$(brew --prefix qt@5)
           -D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
           -D OpenAL_ROOT=$(brew --prefix openal-soft)
+
       - name: Build
-        run: cmake --build build
+        run: |
+          build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
+
+      - name: Run sonar-scanner
+        if: 0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+        run: |
+          sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
+
       - name: Generate package
-        run: cmake --install build
-      - uses: actions/upload-artifact@v3
+        run: |
+          cmake --install build
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v3
         with:
           name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
           path: build/artifacts/**

.github/workflows/codeql.yml

@@ -1,12 +1,149 @@
-name: "CodeQL"
+name: CodeQL
 
-on: [ push, pull_request]
+on:
+
+  push:
+    paths:
+      - src/**
+      - cmake/**
+      - "**/CMakeLists.txt"
+      - "CMakePresets.json"
+      - .github/workflows/codeql.yml
+      - vcpkg.json
+      - "!**/Makefile*"
+
+  pull_request:
+    paths:
+      - src/**
+      - cmake/**
+      - "**/CMakeLists.txt"
+      - "CMakePresets.json"
+      - .github/workflows/**
+      - .github/workflows/codeql.yml
+      - vcpkg.json
+      - "!**/Makefile*"
 
 jobs:
-  analyze:
-    name: Analyze
 
-    runs-on: ubuntu-latest
+  analyze-msys2:
+    name: "Analyze Windows MSYS2 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
+
+    runs-on: windows-2022
+
+    permissions:
+      actions: read
+      contents: read
+      security-events: write
+
+    defaults:
+      run:
+        shell: msys2 {0}
+
+    strategy:
+      fail-fast: true
+      matrix:
+        language: [ 'cpp' ]
+        build:
+#          - name: Regular
+#            preset: regular
+#          - name: Debug
+#            preset: debug
+#            slug: -Debug
+          - name: Dev
+            preset: experimental
+            slug: -Dev
+        dynarec:
+          - name: ODR
+            new: off
+            slug: -ODR
+          - name: NDR
+            new: on
+            slug: -NDR
+        ui:
+          - name: Win32 GUI
+            qt: off
+            static: on
+          - name: Qt GUI
+            qt: on
+            static: off
+            slug: -Qt
+            packages: >-
+              qt5-base:p
+              qt5-tools:p
+        environment:
+#          - msystem: MSYS
+#            toolchain: ./cmake/flags-gcc-x86_64.cmake
+          - msystem: MINGW32
+            prefix: mingw-w64-i686
+            toolchain: ./cmake/flags-gcc-i686.cmake
+          - msystem: MINGW64
+            prefix: mingw-w64-x86_64
+            toolchain: ./cmake/flags-gcc-x86_64.cmake
+#          - msystem: CLANG32
+#            prefix: mingw-w64-clang-i686
+#            toolchain: ./cmake/llvm-win32-i686.cmake
+#          - msystem: CLANG64
+#            prefix: mingw-w64-clang-x86_64
+#            toolchain: ./cmake/llvm-win32-x86_64.cmake
+          - msystem: UCRT64
+            prefix: mingw-w64-ucrt-x86_64
+            toolchain: ./cmake/flags-gcc-x86_64.cmake
+
+    steps:
+      - name: Prepare MSYS2 environment
+        uses: msys2/setup-msys2@v2
+        with:
+          release: false
+          update: true
+          msystem: ${{ matrix.environment.msystem }}
+          pacboy: >-
+            ninja:p
+            cmake:p
+            gcc:p
+            pkgconf:p
+            freetype:p
+            SDL2:p
+            zlib:p
+            libpng:p
+            openal:p
+            rtmidi:p
+            libslirp:p
+            fluidsynth:p
+            libvncserver:p
+            ${{ matrix.ui.packages }}
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
+      - name: Initialize CodeQL
+        uses: github/codeql-action/init@v2
+        with:
+          languages: ${{ matrix.language }}
+          config-file: ./.github/codeql/codeql-config.yml
+
+      - name: Configure CMake
+        run: >-
+          cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
+          --toolchain ${{ matrix.environment.toolchain }}
+          -D NEW_DYNAREC=${{ matrix.dynarec.new }}
+          -D CMAKE_INSTALL_PREFIX=./build/artifacts
+          -D QT=${{ matrix.ui.qt }}
+          -D STATIC_BUILD=${{ matrix.ui.static }}
+
+      - name: Build
+        run: cmake --build build
+
+
+      - name: Perform CodeQL Analysis
+        uses: github/codeql-action/analyze@v2
+        with:
+          category: "/language:${{matrix.language}}"
+
+  analyze-linux:
+
+    name: "Analyze Linux GCC 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
+
+    runs-on: ubuntu-22.04
 
     permissions:
       actions: read
@@ -14,9 +151,35 @@ jobs:
       security-events: write
 
     strategy:
-      fail-fast: false
+      fail-fast: true
       matrix:
         language: [ 'cpp' ]
+        build:
+#          - name: Regular
+#            preset: regular
+#          - name: Debug
+#            preset: debug
+#            slug: -Debug
+          - name: Dev
+            preset: experimental
+            slug: -Dev
+        dynarec:
+          - name: ODR
+            new: off
+            slug: -ODR
+          - name: NDR
+            new: on
+            slug: -NDR
+        ui:
+          - name: Qt GUI
+            qt: on
+            slug: -Qt
+            packages: >-
+              qtbase5-dev
+              qtbase5-private-dev
+              qttools5-dev
+              libevdev-dev
+              libxkbcommon-x11-dev
 
     steps:
       - name: Install dependencies
@@ -29,10 +192,11 @@ jobs:
           libpng-dev
           libc6-dev
           librtmidi-dev
-          qtbase5-dev
-          qttools5-dev
           libopenal-dev
+          libslirp-dev
+          libfluidsynth-dev
           libvncserver-dev
+          ${{ matrix.ui.packages }}
 
       - name: Checkout repository
         uses: actions/checkout@v3
@@ -41,9 +205,97 @@ jobs:
         uses: github/codeql-action/init@v2
         with:
           languages: ${{ matrix.language }}
+          config-file: ./.github/codeql/codeql-config.yml
 
-      - name: Autobuild
-        uses: github/codeql-action/autobuild@v2
+      - name: Configure CMake
+        run: >-
+          cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
+          --toolchain ./cmake/flags-gcc-x86_64.cmake
+          -D NEW_DYNAREC=${{ matrix.dynarec.new }}
+          -D CMAKE_INSTALL_PREFIX=./build/artifacts
+          -D QT=${{ matrix.ui.qt }}
+
+      - name: Build
+        run: cmake --build build
+
+      - name: Perform CodeQL Analysis
+        uses: github/codeql-action/analyze@v2
+        with:
+          category: "/language:${{matrix.language}}"
+
+  analyze-macos11:
+    name: "Analyze macOS 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
+
+    runs-on: macos-11
+
+    permissions:
+      actions: read
+      contents: read
+      security-events: write
+
+    strategy:
+      fail-fast: true
+      matrix:
+        language: [ 'cpp' ]
+        build:
+#          - name: Regular
+#            preset: regular
+#          - name: Debug
+#            preset: debug
+#            slug: -Debug
+          - name: Dev
+            preset: experimental
+            slug: -Dev
+        dynarec:
+          - name: ODR
+            new: off
+            slug: -ODR
+          - name: NDR
+            new: on
+            slug: -NDR
+        ui:
+          - name: Qt GUI
+            qt: on
+            slug: -Qt
+            packages: >-
+              qt@5
+
+    steps:
+      - name: Install dependencies
+        run: >-
+          brew install
+          ninja
+          freetype
+          sdl2
+          libpng
+          rtmidi
+          openal-soft
+          fluidsynth
+          libvncserver
+          ${{ matrix.ui.packages }}
+
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
+      - name: Initialize CodeQL
+        uses: github/codeql-action/init@v2
+        with:
+          languages: ${{ matrix.language }}
+          config-file: ./.github/codeql/codeql-config.yml
+
+      - name: Configure CMake
+        run: >-
+          cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
+          --toolchain ./cmake/flags-gcc-x86_64.cmake
+          -D NEW_DYNAREC=${{ matrix.dynarec.new }}
+          -D CMAKE_INSTALL_PREFIX=./build/artifacts
+          -D QT=${{ matrix.ui.qt }}
+          -D Qt5_ROOT=$(brew --prefix qt@5)
+          -D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
+          -D OpenAL_ROOT=$(brew --prefix openal-soft)
+
+      - name: Build
+        run: cmake --build build
 
       - name: Perform CodeQL Analysis
         uses: github/codeql-action/analyze@v2

.gitignore

@@ -34,6 +34,8 @@ Makefile
 *.tar.*
 *.AppImage
 /appimage-builder-cache
+/appimage-build
+/AppImageBuilder-generated.yml
 
 # Visual Studio Code
 /.vs
@@ -54,3 +56,6 @@ CMakeLists.txt.user
 /debian/debhelper-build-stamp
 /debian/files
 /obj-*-linux-gnu
+
+# MacOS Finder stuff
+.DS_Store

CMakeLists.txt

@@ -30,10 +30,6 @@ if(NOT DEFINED OPENAL OR OPENAL)
     list(APPEND VCPKG_MANIFEST_FEATURES "openal")
 endif()
 
-if(SLIRP_EXTERNAL)
-    list(APPEND VCPKG_MANIFEST_FEATURES "slirp")
-endif()
-
 if(MUNT_EXTERNAL)
     list(APPEND VCPKG_MANIFEST_FEATURES "munt")
 endif()

CMakePresets.json

@@ -56,6 +56,72 @@
                 "NEW_DYNAREC": "ON"
             },
             "inherits": "base"
+        },
+        {
+            "name": "llvm-macos-aarch64.cmake",
+            "displayName": "MacOS clang regular",
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/out/build/${presetName}",
+            "cacheVariables": {
+                "CMAKE_TOOLCHAIN_FILE": "cmake/llvm-macos-aarch64.cmake",
+                "NEW_DYNAREC": "ON",
+                "QT": "ON",
+                "USE_QT6": "OFF",
+                "Qt5_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5",
+                "MOLTENVK_DIR": "/opt/homebrew/opt/molten-vk",
+                "Qt5LinguistTools_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5LinguistTools",
+                "OpenAL_ROOT": "/opt/homebrew/opt/openal-soft"
+            },
+            "inherits": "regular"
+        },
+        {
+            "name": "llvm-macos-aarch64-debug",
+            "displayName": "MacOS clang debug",
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/out/build/${presetName}",
+            "cacheVariables": {
+                "CMAKE_TOOLCHAIN_FILE": "cmake/llvm-macos-aarch64.cmake",
+                "NEW_DYNAREC": "ON",
+                "QT": "ON",
+                "USE_QT6": "OFF",
+                "Qt5_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5",
+                "MOLTENVK_DIR": "/opt/homebrew/opt/molten-vk",
+                "Qt5LinguistTools_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5LinguistTools",
+                "OpenAL_ROOT": "/opt/homebrew/opt/openal-soft",
+                "CMAKE_CXX_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG",
+                "CMAKE_C_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG"
+            },
+            "inherits": "debug"
+        },
+        {
+            "name": "flags-gcc-aarch64-debug",
+            "displayName": "Linux ARM 64 - Debug",
+            "description": "Linux ARM64 - Debug build",
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/out/build/${presetName}",
+            "cacheVariables": {
+                "NEW_DYNAREC": "ON",
+                "CMAKE_BUILD_TYPE": "Debug",
+                "CMAKE_TOOLCHAIN_FILE": "cmake/flags-gcc-aarch64.cmake",
+                "CMAKE_INSTALL_PREFIX": "${sourceDir}/out/install/${presetName}",
+                "CMAKE_CXX_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG",
+                "CMAKE_C_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG"
+            },
+            "inherits": "debug"
+        },
+        {
+            "name": "flags-gcc-aarch64-regular",
+            "displayName": "Linux ARM 64 - Regular",
+            "description": "Linux ARM64 - Release build",
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/out/build/${presetName}",
+            "cacheVariables": {
+                "NEW_DYNAREC": "ON",
+                "CMAKE_BUILD_TYPE": "Release",
+                "CMAKE_TOOLCHAIN_FILE": "cmake/flags-gcc-aarch64.cmake",
+                "CMAKE_INSTALL_PREFIX": "${sourceDir}/out/install/${presetName}"
+            },
+            "inherits": "regular"
         }
     ],
     "buildPresets": [],

CONTRIBUTING.md

@@ -0,0 +1,13 @@
+# Contribution guidelines
+The 86Box project welcomes contributions from anyone, as long as some basic guidelines are followed.
+
+## Emulated hardware
+In order to accept new emulated hardware, the following criteria must be met:
+
+* A ROM must be available and be added to [our ROM repository](https://github.com/86Box/roms)
+* Documentation must be available or it must be feasible to reverse engineer with a reasonable amount of time and effort
+* It must be feasible to implement with a reasonable amount of time and effort
+* It has to fall inside the project's scope
+
+## Questions
+If you're unsure about any aspect of contributing, don't hesitate to get in touch via any of our official communities linked in our [readme](README.md#community) or [GitHub Discussions](https://github.com/86Box/86Box/discussions).

README.md

@@ -1,13 +1,15 @@
 86Box
 =====
+
 [![Build Status](https://ci.86box.net/job/86Box/badge/icon)](https://ci.86box.net/job/86Box/)
 
 **86Box** is a low level x86 emulator that runs older operating systems and software designed for IBM PC systems and compatibles from 1981 through fairly recent system designs based on the PCI bus.
 
 Features
 --------
+
 * Easy to use interface inspired by mainstream hypervisor software
-* Low level emulation of 8086-based processors up to the Pentium with focus on accuracy
+* Low level emulation of 8086-based processors up to the Mendocino-era Celeron with focus on accuracy
 * Great range of customizability of virtual machines
 * Many available systems, such as the very first IBM PC 5150 from 1981, or the more obscure IBM PS/2 line of systems based on the Micro Channel Architecture
 * Lots of supported peripherals including video adapters, sound cards, network adapters, hard disk controllers, and SCSI adapters
@@ -16,51 +18,54 @@ Features
 
 Minimum system requirements and recommendations
 -----------------------------------------------
-* Intel Core 2 or AMD Athlon 64 processor
-* Windows version: Windows 7 Service Pack 1, Windows 8.1 or Windows 10
+
+* Intel Core 2 or AMD Athlon 64 processor or newer
+* Windows version: Windows 7 Service Pack 1 or later
 * Linux version: Ubuntu 16.04, Debian 9.0 or other distributions from 2016 onwards
-* macOS version: macOS High Sierra 10.13
-* 4 GB of RAM
+* macOS version: macOS High Sierra 10.13 or newer
+* 4 GB of RAM or higher
 
 Performance may vary depending on both host and guest configuration. Most emulation logic is executed in a single thread; therefore, systems with better IPC (instructions per clock) generally should be able to emulate higher clock speeds.
 
 It is also recommended to use a manager application with 86Box for easier handling of multiple virtual machines.
+
 * [86Box Manager](https://github.com/86Box/86BoxManager) by [Overdoze](https://github.com/daviunic) (Windows only)
 * [86Box Manager Lite](https://github.com/insanemal/86box_manager_py) by [Insanemal](https://github.com/insanemal)
 * [WinBox for 86Box](https://github.com/86Box/WinBox-for-86Box) by Laci bá' (Windows only)
+* [Linbox-qt5](https://github.com/Dungeonseeker/linbox-qt5) by Dungeonseeker (Linux focused, should work on Windows though untested)
+* [MacBox for 86Box](https://github.com/Moonif/MacBox) by [Moonif](https://github.com/Moonif) (MacOS only)
 
 It is also possible to use 86Box on its own with the `--vmpath`/`-P` command line option.
 
 Getting started
 ---------------
+
 See [our documentation](https://86box.readthedocs.io/en/latest/index.html) for an overview of the emulator's features and user interface.
 
 Community
 ---------
+
 We operate an IRC channel and a Discord server for discussing 86Box, its development and anything related to retro computing. We look forward to hearing from you!
 
 [![Visit our IRC channel](https://kiwiirc.com/buttons/irc.ringoflightning.net/86Box.png)](https://kiwiirc.com/client/irc.ringoflightning.net/?nick=86box|?#86Box)
 
 [![Visit our Discord server](https://discordapp.com/api/guilds/262614059009048590/embed.png)](https://discord.gg/QXK9XTv)
 
+Contributions
+---------
+
+We welcome all contributions to the project, as long as the [contribution guidelines](CONTRIBUTING.md) are followed.
+
 Licensing
 ---------
+
 86Box is released under the [GNU General Public License, version 2](https://www.gnu.org/licenses/old-licenses/gpl-2.0.html) or later. For more information, see the `COPYING` file in the root of the repository.
 
 The emulator can also optionally make use of [munt](https://github.com/munt/munt), [FluidSynth](https://www.fluidsynth.org/), [Ghostscript](https://www.ghostscript.com/) and [Discord Game SDK](https://discord.com/developers/docs/game-sdk/sdk-starter-guide), which are distributed under their respective licenses.
 
-Contribution requirements
--------------------------
- Formal codification of the project's emulated hardware contribution requirements, which all have to be met to accept an addition:
-* A ROM must be available;
-* Documentation must be available or it must be feasible to reverse engineer with a reasonable amount of time and effort;
-* It must be feasible to implement with a reasonable amount of time and effort;
-* It has to fall inside the project's scope.
-
-Where unsure or for more details about the project's emulated hardware contribution requirements, contact a Contributor or higher.
-
 Donations
 ---------
+
 We do not charge you for the emulator but donations are still welcome:
 https://paypal.me/86Box.
 

bumpversion.sh

@@ -36,7 +36,7 @@ if [ -z "${romversion}" ]; then
 	# Get the latest ROM release from the GitHub API.
 	romversion=$(curl --silent "https://api.github.com/repos/86Box/roms/releases/latest" |
 		grep '"tag_name":' |
-		sed -E 's/.*"([^"]+)".*/\1/')
+		sed -E 's/.*"v([^"]+)".*/\1/')
 fi
 
 # Switch to the repository root directory.

debian/rules

@@ -25,7 +25,7 @@ endif
 	dh $@ --buildsystem cmake+ninja
 
 override_dh_auto_configure:
-	dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR) -DSLIRP_EXTERNAL=on
+	dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR)
 
 override_dh_auto_test:
 

sonar-project.properties

@@ -0,0 +1,12 @@
+sonar.projectKey=86Box_86Box
+sonar.organization=86box
+
+# This is the name and version displayed in the SonarCloud UI.
+#sonar.projectName=86Box
+#sonar.projectVersion=1.0
+
+# Path is relative to the sonar-project.properties file. Replace "\" by "/" on Windows.
+#sonar.sources=.
+
+# Encoding of the source code. Default is default system encoding
+#sonar.sourceEncoding=UTF-8

src/86box.c

@@ -8,8 +8,6 @@
  *
  *          Main emulator module where most things are controlled.
  *
- *
- *
  * Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
  *          Miran Grca, <mgrca8@gmail.com>
  *          Fred N. van Kempen, <decwiz@yahoo.com>
@@ -182,6 +180,7 @@ uint32_t isa_mem_size                           = 0;              /* (C) memory
 int      cpu_use_dynarec                        = 0;              /* (C) cpu uses/needs Dyna */
 int      cpu                                    = 0;              /* (C) cpu type */
 int      fpu_type                               = 0;              /* (C) fpu type */
+int      fpu_softfloat                          = 0;              /* (C) fpu uses softfloat */
 int      time_sync                              = 0;              /* (C) enable time sync */
 int      confirm_reset                          = 1;              /* (C) enable reset confirmation */
 int      confirm_exit                           = 1;              /* (C) enable exit confirmation */
@@ -209,16 +208,20 @@ char  exe_path[2048]; /* path (dir) of executable */
 char  usr_path[1024]; /* path (dir) of user data */
 char  cfg_path[1024]; /* full path of config file */
 FILE *stdlog = NULL;  /* file to log output to */
-// int   scrnsz_x = SCREEN_RES_X; /* current screen size, X */
-// int   scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */
+#if 0
+int   scrnsz_x = SCREEN_RES_X; /* current screen size, X */
+int   scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */
+#endif
 int config_changed; /* config has changed */
 int title_update;
 int framecountx        = 0;
 int hard_reset_pending = 0;
 
-// int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */
-// int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */
-// int efscrnsz_y = SCREEN_RES_Y;
+#if 0
+int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */
+int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */
+int efscrnsz_y = SCREEN_RES_Y;
+#endif
 
 static wchar_t mouse_msg[3][200];
 
@@ -405,19 +408,24 @@ pc_log(const char *fmt, ...)
 int
 pc_init(int argc, char *argv[])
 {
-    char      *ppath = NULL, *rpath = NULL;
-    char      *cfg = NULL, *p;
-    char       temp[2048], *fn[FDD_NUM] = { NULL };
-    char       drive = 0, *temp2 = NULL;
-    struct tm *info;
-    time_t     now;
-    int        c, lvmp = 0;
-    int        i;
+    char            *ppath = NULL;
+    char            *rpath = NULL;
+    char            *cfg = NULL;
+    char            *p;
+    char             temp[2048];
+    char            *fn[FDD_NUM] = { NULL };
+    char             drive = 0;
+    char            *temp2 = NULL;
+    const struct tm *info;
+    time_t           now;
+    int              c;
+    int              lvmp = 0;
 #ifdef ENABLE_NG
     int ng = 0;
 #endif
 #ifdef _WIN32
-    uint32_t *uid, *shwnd;
+    uint32_t *uid;
+    uint32_t *shwnd;
 #endif
     uint32_t lang_init = 0;
 
@@ -434,7 +442,7 @@ pc_init(int argc, char *argv[])
     }
     if (!strncmp(exe_path, "/private/var/folders/", 21)) {
         ui_msgbox_header(MBX_FATAL, L"App Translocation", EMU_NAME_W L" cannot determine the emulated machine's location due to a macOS security feature. Please move the " EMU_NAME_W L" app to another folder (not /Applications), or make a copy of it and open that copy instead.");
-        return (0);
+        return 0;
     }
 #elif !defined(_WIN32)
     /* Grab the actual path if we are an AppImage. */
@@ -462,7 +470,7 @@ pc_init(int argc, char *argv[])
 
         if (!strcasecmp(argv[c], "--help") || !strcasecmp(argv[c], "-?")) {
 usage:
-            for (i = 0; i < FDD_NUM; i++) {
+            for (uint8_t i = 0; i < FDD_NUM; i++) {
                 if (fn[i] != NULL) {
                     free(fn[i]);
                     fn[i] = NULL;
@@ -494,7 +502,7 @@ usage:
             printf("-V or --vmname name  - overrides the name of the running VM\n");
             printf("-Z or --lastvmpath   - the last parameter is VM path rather than config\n");
             printf("\nA config file can be specified. If none is, the default file will be used.\n");
-            return (0);
+            return 0;
         } else if (!strcasecmp(argv[c], "--lastvmpath") || !strcasecmp(argv[c], "-Z")) {
             lvmp = 1;
         } else if (!strcasecmp(argv[c], "--dumpcfg") || !strcasecmp(argv[c], "-O")) {
@@ -586,7 +594,7 @@ usage:
             /* some (undocumented) test function here.. */
 
             /* .. and then exit. */
-            return (0);
+            return 0;
 #ifdef USE_INSTRUMENT
         } else if (!strcasecmp(argv[c], "--instrument")) {
             if ((c + 1) == argc)
@@ -771,7 +779,7 @@ usage:
     /* Load the configuration file. */
     config_load();
 
-    for (i = 0; i < FDD_NUM; i++) {
+    for (uint8_t i = 0; i < FDD_NUM; i++) {
         if (fn[i] != NULL) {
             if (strlen(fn[i]) <= 511)
                 strncpy(floppyfns[i], fn[i], 511);
@@ -787,7 +795,7 @@ usage:
     gdbstub_init();
 
     /* All good! */
-    return (1);
+    return 1;
 }
 
 void
@@ -813,7 +821,8 @@ pc_full_speed(void)
 int
 pc_init_modules(void)
 {
-    int     c, m;
+    int     c;
+    int     m;
     wchar_t temp[512];
     char    tempc[512];
 
@@ -847,7 +856,7 @@ pc_init_modules(void)
     }
     if (c == 0) {
         /* No usable ROMs found, aborting. */
-        return (0);
+        return 0;
     }
     pc_log("A total of %d ROM sets have been loaded.\n", c);
 
@@ -868,7 +877,6 @@ pc_init_modules(void)
         if (machine == -1) {
             fatal("No available machines\n");
             exit(-1);
-            return (0);
         }
     }
 
@@ -891,7 +899,6 @@ pc_init_modules(void)
         if (gfxcard[0] == -1) {
             fatal("No available video cards\n");
             exit(-1);
-            return (0);
         }
     }
 
@@ -934,7 +941,7 @@ pc_init_modules(void)
 
     machine_status_init();
 
-    return (1);
+    return 1;
 }
 
 void
@@ -1137,7 +1144,10 @@ pc_reset_hard_init(void)
 void
 update_mouse_msg(void)
 {
-    wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp;
+    wchar_t  wcpufamily[2048];
+    wchar_t  wcpu[2048];
+    wchar_t  wmachine[2048];
+    wchar_t *wcp;
 
     mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1);
 
@@ -1175,10 +1185,8 @@ pc_reset_hard(void)
 }
 
 void
-pc_close(thread_t *ptr)
+pc_close(UNUSED(thread_t *ptr))
 {
-    int i;
-
     /* Wait a while so things can shut down. */
     plat_delay_ms(200);
 
@@ -1206,7 +1214,7 @@ pc_close(thread_t *ptr)
 
     lpt_devices_close();
 
-    for (i = 0; i < FDD_NUM; i++)
+    for (uint8_t i = 0; i < FDD_NUM; i++)
         fdd_close(i);
 
 #ifdef ENABLE_808X_LOG
@@ -1265,9 +1273,11 @@ pc_run(void)
     startblit();
     cpu_exec(cpu_s->rspeed / 100);
 #ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */
-    if (gdbstub_step == GDBSTUB_EXEC)
+    // if (gdbstub_step == GDBSTUB_EXEC)
 #endif
+#if 0
         mouse_process();
+#endif
     joystick_process();
     endblit();
 
@@ -1306,7 +1316,10 @@ set_screen_size_monitor(int x, int y, int monitor_index)
 {
     int    temp_overscan_x = monitors[monitor_index].mon_overscan_x;
     int    temp_overscan_y = monitors[monitor_index].mon_overscan_y;
-    double dx, dy, dtx, dty;
+    double dx;
+    double dy;
+    double dtx;
+    double dty;
 
     /* Make sure we keep usable values. */
 #if 0
@@ -1405,6 +1418,9 @@ set_screen_size_monitor(int x, int y, int monitor_index)
             monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 3);
             monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 3);
             break;
+
+        default:
+            break;
     }
 
     plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index);
@@ -1425,14 +1441,14 @@ reset_screen_size_monitor(int monitor_index)
 void
 reset_screen_size(void)
 {
-    for (int i = 0; i < MONITORS_NUM; i++)
+    for (uint8_t i = 0; i < MONITORS_NUM; i++)
         set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_efscrnsz_y);
 }
 
 void
 set_screen_size_natural(void)
 {
-    for (int i = 0; i < MONITORS_NUM; i++)
+    for (uint8_t i = 0; i < MONITORS_NUM; i++)
         set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_unscaled_size_y);
 }
 

src/CMakeLists.txt

@@ -109,6 +109,9 @@ endif()
 
 find_package(Freetype REQUIRED)
 include_directories(${FREETYPE_INCLUDE_DIRS})
+if(FREETYPE_INCLUDE_DIR_ft2build)
+    include_directories(${FREETYPE_INCLUDE_DIR_ft2build})
+endif()
 if(APPLE)
     # Freetype is dynamically loaded by the emulator, however, we link it
     # on macOS so it gets copied to the bundle by the installation process

src/acpi.c

@@ -148,7 +148,7 @@ acpi_raise_smi(void *priv, int do_smi)
 
     if (dev->regs.glbctl & 0x01) {
         if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) {
-            if ((!dev->regs.smi_lock || !dev->regs.smi_active)) {
+            if (!dev->regs.smi_lock || !dev->regs.smi_active) {
                 if (do_smi)
                     smi_raise();
                 dev->regs.smi_active = 1;
@@ -169,11 +169,12 @@ acpi_raise_smi(void *priv, int do_smi)
 }
 
 static uint32_t
-acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
+acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
+    acpi_t  *dev = (acpi_t *) priv;
     uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    int      shift16;
+    int      shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -210,6 +211,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
                 update_tsc();
 #endif
             break;
+
+        default:
+            break;
     }
 
 #ifdef ENABLE_ACPI_LOG
@@ -220,11 +224,12 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_ali(int size, uint16_t addr, void *p)
+acpi_reg_read_ali(int size, uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
-    uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    const acpi_t  *dev = (acpi_t *) priv;
+    uint32_t       ret = 0x00000000;
+    int            shift16;
+    int            shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -275,7 +280,7 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
             ret = dev->regs.pmcntrl;
             break;
         default:
-            ret = acpi_reg_read_common_regs(size, addr, p);
+            ret = acpi_reg_read_common_regs(size, addr, priv);
             break;
     }
 
@@ -287,11 +292,12 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_intel(int size, uint16_t addr, void *p)
+acpi_reg_read_intel(int size, uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
-    uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    const acpi_t  *dev = (acpi_t *) priv;
+    uint32_t       ret = 0x00000000;
+    int            shift16;
+    int            shift32;
 
     addr &= 0x3f;
     shift16 = (addr & 1) << 3;
@@ -371,7 +377,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
                 ret = dev->regs.gporeg[addr & 3];
             break;
         default:
-            ret = acpi_reg_read_common_regs(size, addr, p);
+            ret = acpi_reg_read_common_regs(size, addr, priv);
             break;
     }
 
@@ -383,11 +389,12 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_via_common(int size, uint16_t addr, void *p)
+acpi_reg_read_via_common(int size, uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
-    uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    const acpi_t  *dev = (acpi_t *) priv;
+    uint32_t       ret = 0x00000000;
+    int            shift16;
+    int            shift32;
 
     addr &= 0xff;
     shift16 = (addr & 1) << 3;
@@ -466,7 +473,7 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
             ret = (dev->regs.gptren >> shift32) & 0xff;
             break;
         default:
-            ret = acpi_reg_read_common_regs(size, addr, p);
+            ret = acpi_reg_read_common_regs(size, addr, priv);
             break;
     }
 
@@ -478,9 +485,9 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_via(int size, uint16_t addr, void *p)
+acpi_reg_read_via(int size, uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
+    acpi_t  *dev = (acpi_t *) priv;
     uint32_t ret = 0x00000000;
     int      shift16;
 
@@ -523,7 +530,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
             ret = (dev->regs.gpi_val >> shift16) & 0xff;
             break;
         default:
-            ret = acpi_reg_read_via_common(size, addr, p);
+            ret = acpi_reg_read_via_common(size, addr, priv);
             break;
     }
 
@@ -535,11 +542,12 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
+acpi_reg_read_via_596b(int size, uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
-    uint32_t ret = 0x00000000;
-    int      shift16, shift32;
+    const acpi_t  *dev = (acpi_t *) priv;
+    uint32_t       ret = 0x00000000;
+    int            shift16;
+    int            shift32;
 
     addr &= 0x7f;
     shift16 = (addr & 1) << 3;
@@ -572,7 +580,7 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
             ret = (dev->regs.gpo_val >> shift32) & 0xff;
             break;
         default:
-            ret = acpi_reg_read_via_common(size, addr, p);
+            ret = acpi_reg_read_via_common(size, addr, priv);
             break;
     }
 
@@ -584,13 +592,13 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_reg_read_smc(int size, uint16_t addr, void *p)
+acpi_reg_read_smc(int size, uint16_t addr, void *priv)
 {
     uint32_t ret = 0x00000000;
 
     addr &= 0x0f;
 
-    ret = acpi_reg_read_common_regs(size, addr, p);
+    ret = acpi_reg_read_common_regs(size, addr, priv);
 
 #ifdef ENABLE_ACPI_LOG
     if (size != 1)
@@ -600,11 +608,11 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
+acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv)
 {
-    acpi_t  *dev = (acpi_t *) p;
-    uint32_t ret = 0x00000000;
-    int      shift16;
+    const acpi_t  *dev = (acpi_t *) priv;
+    uint32_t       ret = 0x00000000;
+    int            shift16;
 
     addr &= 0x07;
     shift16 = (addr & 1) << 3;
@@ -633,6 +641,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
             /* Miscellaneous Control Register */
             ret = dev->regs.glbctl & 0xff;
             break;
+
+        default:
+            break;
     }
 
     acpi_log("(%i) ACPI Read  (%i) %02X: %02X\n", in_smm, size, addr, ret);
@@ -640,10 +651,11 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
 }
 
 static void
-acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, sus_typ;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     sus_typ;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -687,14 +699,13 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
                     }
 
                     if (sus_typ & SUS_RESET_PCI)
-                        device_reset_all_pci();
+                        device_reset_all(DEVICE_PCI);
 
                     if (sus_typ & SUS_RESET_CPU)
                         cpu_alt_reset = 0;
 
                     if (sus_typ & SUS_RESET_PCI) {
                         pci_reset();
-                        keyboard_at_reset();
 
                         mem_a20_alt = 0;
                         mem_a20_recalc();
@@ -714,14 +725,18 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
             }
             dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */;
             break;
+
+        default:
+            break;
     }
 }
 
 static void
-acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -776,7 +791,7 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
             dev->regs.pmcntrl = val & 1;
             break;
         default:
-            acpi_reg_write_common_regs(size, addr, val, p);
+            acpi_reg_write_common_regs(size, addr, val, priv);
             /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
             if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
                 dev->regs.gpcntrl &= ~0x0002;
@@ -789,10 +804,11 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
 }
 
 static void
-acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x3f;
 #ifdef ENABLE_ACPI_LOG
@@ -871,7 +887,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
                 dev->regs.gporeg[addr & 3] = val;
             break;
         default:
-            acpi_reg_write_common_regs(size, addr, val, p);
+            acpi_reg_write_common_regs(size, addr, val, priv);
             /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
             if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
                 dev->regs.glbctl &= ~0x0002;
@@ -885,10 +901,11 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
 }
 
 static void
-acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     shift32;
 
     addr &= 0xff;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -957,7 +974,7 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
             dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9;
             break;
         default:
-            acpi_reg_write_common_regs(size, addr, val, p);
+            acpi_reg_write_common_regs(size, addr, val, priv);
             /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
             if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
                 dev->regs.glbctl &= ~0x0002;
@@ -978,10 +995,11 @@ acpi_i2c_set(acpi_t *dev)
 }
 
 static void
-acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     shift32;
 
     addr &= 0xff;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -1035,16 +1053,17 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
             dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff;
             break;
         default:
-            acpi_reg_write_via_common(size, addr, val, p);
+            acpi_reg_write_via_common(size, addr, val, priv);
             break;
     }
 }
 
 static void
-acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    int     shift16, shift32;
+    acpi_t *dev = (acpi_t *) priv;
+    int     shift16;
+    int     shift32;
 
     addr &= 0x7f;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
@@ -1092,20 +1111,20 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
             dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff;
             break;
         default:
-            acpi_reg_write_via_common(size, addr, val, p);
+            acpi_reg_write_via_common(size, addr, val, priv);
             break;
     }
 }
 
 static void
-acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    acpi_t *dev = (acpi_t *) priv;
 
     addr &= 0x0f;
     acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
 
-    acpi_reg_write_common_regs(size, addr, val, p);
+    acpi_reg_write_common_regs(size, addr, val, priv);
     /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
     if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
         dev->regs.glbctl &= ~0x0001;
@@ -1117,9 +1136,9 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
 }
 
 static void
-acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
+acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    acpi_t *dev = (acpi_t *) priv;
     int     shift16;
 
     addr &= 0x07;
@@ -1161,76 +1180,79 @@ acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
                     acpi_update_irq(dev);
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint32_t
-acpi_reg_read_common(int size, uint16_t addr, void *p)
+acpi_reg_read_common(int size, uint16_t addr, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    const acpi_t *dev = (acpi_t *) priv;
     uint8_t ret = 0xff;
 
     if (dev->vendor == VEN_ALI)
-        ret = acpi_reg_read_ali(size, addr, p);
+        ret = acpi_reg_read_ali(size, addr, priv);
     else if (dev->vendor == VEN_VIA)
-        ret = acpi_reg_read_via(size, addr, p);
+        ret = acpi_reg_read_via(size, addr, priv);
     else if (dev->vendor == VEN_VIA_596B)
-        ret = acpi_reg_read_via_596b(size, addr, p);
+        ret = acpi_reg_read_via_596b(size, addr, priv);
     else if (dev->vendor == VEN_INTEL)
-        ret = acpi_reg_read_intel(size, addr, p);
+        ret = acpi_reg_read_intel(size, addr, priv);
     else if (dev->vendor == VEN_SMC)
-        ret = acpi_reg_read_smc(size, addr, p);
+        ret = acpi_reg_read_smc(size, addr, priv);
 
     return ret;
 }
 
 static void
-acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
+acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    const acpi_t *dev = (acpi_t *) priv;
 
     if (dev->vendor == VEN_ALI)
-        acpi_reg_write_ali(size, addr, val, p);
+        acpi_reg_write_ali(size, addr, val, priv);
     else if (dev->vendor == VEN_VIA)
-        acpi_reg_write_via(size, addr, val, p);
+        acpi_reg_write_via(size, addr, val, priv);
     else if (dev->vendor == VEN_VIA_596B)
-        acpi_reg_write_via_596b(size, addr, val, p);
+        acpi_reg_write_via_596b(size, addr, val, priv);
     else if (dev->vendor == VEN_INTEL)
-        acpi_reg_write_intel(size, addr, val, p);
+        acpi_reg_write_intel(size, addr, val, priv);
     else if (dev->vendor == VEN_SMC)
-        acpi_reg_write_smc(size, addr, val, p);
+        acpi_reg_write_smc(size, addr, val, priv);
 }
 
 static uint32_t
-acpi_aux_reg_read_common(int size, uint16_t addr, void *p)
+acpi_aux_reg_read_common(int size, uint16_t addr, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    const acpi_t *dev = (acpi_t *) priv;
     uint8_t ret = 0xff;
 
     if (dev->vendor == VEN_SMC)
-        ret = acpi_aux_reg_read_smc(size, addr, p);
+        ret = acpi_aux_reg_read_smc(size, addr, priv);
 
     return ret;
 }
 
 static void
-acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
+acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    const acpi_t *dev = (acpi_t *) priv;
 
     if (dev->vendor == VEN_SMC)
-        acpi_aux_reg_write_smc(size, addr, val, p);
+        acpi_aux_reg_write_smc(size, addr, val, priv);
 }
 
 static uint32_t
-acpi_reg_readl(uint16_t addr, void *p)
+acpi_reg_readl(uint16_t addr, void *priv)
 {
     uint32_t ret = 0x00000000;
 
-    ret = acpi_reg_read_common(4, addr, p);
-    ret |= (acpi_reg_read_common(4, addr + 1, p) << 8);
-    ret |= (acpi_reg_read_common(4, addr + 2, p) << 16);
-    ret |= (acpi_reg_read_common(4, addr + 3, p) << 24);
+    ret = acpi_reg_read_common(4, addr, priv);
+    ret |= (acpi_reg_read_common(4, addr + 1, priv) << 8);
+    ret |= (acpi_reg_read_common(4, addr + 2, priv) << 16);
+    ret |= (acpi_reg_read_common(4, addr + 3, priv) << 24);
 
     acpi_log("ACPI: Read L %08X from %04X\n", ret, addr);
 
@@ -1238,12 +1260,12 @@ acpi_reg_readl(uint16_t addr, void *p)
 }
 
 static uint16_t
-acpi_reg_readw(uint16_t addr, void *p)
+acpi_reg_readw(uint16_t addr, void *priv)
 {
     uint16_t ret = 0x0000;
 
-    ret = acpi_reg_read_common(2, addr, p);
-    ret |= (acpi_reg_read_common(2, addr + 1, p) << 8);
+    ret = acpi_reg_read_common(2, addr, priv);
+    ret |= (acpi_reg_read_common(2, addr + 1, priv) << 8);
 
     acpi_log("ACPI: Read W %08X from %04X\n", ret, addr);
 
@@ -1251,11 +1273,11 @@ acpi_reg_readw(uint16_t addr, void *p)
 }
 
 static uint8_t
-acpi_reg_read(uint16_t addr, void *p)
+acpi_reg_read(uint16_t addr, void *priv)
 {
     uint8_t ret = 0x00;
 
-    ret = acpi_reg_read_common(1, addr, p);
+    ret = acpi_reg_read_common(1, addr, priv);
 
     acpi_log("ACPI: Read B %02X from %04X\n", ret, addr);
 
@@ -1263,14 +1285,14 @@ acpi_reg_read(uint16_t addr, void *p)
 }
 
 static uint32_t
-acpi_aux_reg_readl(uint16_t addr, void *p)
+acpi_aux_reg_readl(uint16_t addr, void *priv)
 {
     uint32_t ret = 0x00000000;
 
-    ret = acpi_aux_reg_read_common(4, addr, p);
-    ret |= (acpi_aux_reg_read_common(4, addr + 1, p) << 8);
-    ret |= (acpi_aux_reg_read_common(4, addr + 2, p) << 16);
-    ret |= (acpi_aux_reg_read_common(4, addr + 3, p) << 24);
+    ret = acpi_aux_reg_read_common(4, addr, priv);
+    ret |= (acpi_aux_reg_read_common(4, addr + 1, priv) << 8);
+    ret |= (acpi_aux_reg_read_common(4, addr + 2, priv) << 16);
+    ret |= (acpi_aux_reg_read_common(4, addr + 3, priv) << 24);
 
     acpi_log("ACPI: Read Aux L %08X from %04X\n", ret, addr);
 
@@ -1278,12 +1300,12 @@ acpi_aux_reg_readl(uint16_t addr, void *p)
 }
 
 static uint16_t
-acpi_aux_reg_readw(uint16_t addr, void *p)
+acpi_aux_reg_readw(uint16_t addr, void *priv)
 {
     uint16_t ret = 0x0000;
 
-    ret = acpi_aux_reg_read_common(2, addr, p);
-    ret |= (acpi_aux_reg_read_common(2, addr + 1, p) << 8);
+    ret = acpi_aux_reg_read_common(2, addr, priv);
+    ret |= (acpi_aux_reg_read_common(2, addr + 1, priv) << 8);
 
     acpi_log("ACPI: Read Aux W %04X from %04X\n", ret, addr);
 
@@ -1291,11 +1313,11 @@ acpi_aux_reg_readw(uint16_t addr, void *p)
 }
 
 static uint8_t
-acpi_aux_reg_read(uint16_t addr, void *p)
+acpi_aux_reg_read(uint16_t addr, void *priv)
 {
     uint8_t ret = 0x00;
 
-    ret = acpi_aux_reg_read_common(1, addr, p);
+    ret = acpi_aux_reg_read_common(1, addr, priv);
 
     acpi_log("ACPI: Read Aux B %02X from %04X\n", ret, addr);
 
@@ -1303,59 +1325,59 @@ acpi_aux_reg_read(uint16_t addr, void *p)
 }
 
 static void
-acpi_reg_writel(uint16_t addr, uint32_t val, void *p)
+acpi_reg_writel(uint16_t addr, uint32_t val, void *priv)
 {
     acpi_log("ACPI: Write L %08X to %04X\n", val, addr);
 
-    acpi_reg_write_common(4, addr, val & 0xff, p);
-    acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
-    acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
-    acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
+    acpi_reg_write_common(4, addr, val & 0xff, priv);
+    acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
+    acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
+    acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
 }
 
 static void
-acpi_reg_writew(uint16_t addr, uint16_t val, void *p)
+acpi_reg_writew(uint16_t addr, uint16_t val, void *priv)
 {
     acpi_log("ACPI: Write W %04X to %04X\n", val, addr);
 
-    acpi_reg_write_common(2, addr, val & 0xff, p);
-    acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
+    acpi_reg_write_common(2, addr, val & 0xff, priv);
+    acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
 }
 
 static void
-acpi_reg_write(uint16_t addr, uint8_t val, void *p)
+acpi_reg_write(uint16_t addr, uint8_t val, void *priv)
 {
     acpi_log("ACPI: Write B %02X to %04X\n", val, addr);
 
-    acpi_reg_write_common(1, addr, val, p);
+    acpi_reg_write_common(1, addr, val, priv);
 }
 
 static void
-acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p)
+acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *priv)
 {
     acpi_log("ACPI: Write Aux L %08X to %04X\n", val, addr);
 
-    acpi_aux_reg_write_common(4, addr, val & 0xff, p);
-    acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
-    acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
-    acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
+    acpi_aux_reg_write_common(4, addr, val & 0xff, priv);
+    acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
+    acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
+    acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
 }
 
 static void
-acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p)
+acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *priv)
 {
     acpi_log("ACPI: Write Aux W %04X to %04X\n", val, addr);
 
-    acpi_aux_reg_write_common(2, addr, val & 0xff, p);
-    acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
+    acpi_aux_reg_write_common(2, addr, val & 0xff, priv);
+    acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
 }
 
 static void
-acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p)
+acpi_aux_reg_write(uint16_t addr, uint8_t val, void *priv)
 {
     acpi_log("ACPI: Write Aux B %02X to %04X\n", val, addr);
 
-    acpi_aux_reg_write_common(1, addr, val, p);
+    acpi_aux_reg_write_common(1, addr, val, priv);
 }
 
 void
@@ -1364,9 +1386,9 @@ acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en)
     int size;
 
     switch (dev->vendor) {
+        default:
         case VEN_ALI:
         case VEN_INTEL:
-        default:
             size = 0x040;
             break;
         case VEN_SMC:
@@ -1535,9 +1557,9 @@ acpi_pwrbtn_timer(void *priv)
 }
 
 static void
-acpi_apm_out(uint16_t port, uint8_t val, void *p)
+acpi_apm_out(uint16_t port, uint8_t val, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
+    acpi_t *dev = (acpi_t *) priv;
 
     acpi_log("[%04X:%08X] APM write: %04X = %02X (AX = %04X, BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, AX, BX, CX);
 
@@ -1547,7 +1569,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
         if (port == 0x0001) {
             acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi);
             dev->apm->cmd = val;
-            // acpi_raise_smi(dev, dev->apm->do_smi);
+#if 0
+            acpi_raise_smi(dev, dev->apm->do_smi);
+#endif
             if (dev->apm->do_smi)
                 smi_raise();
             dev->regs.ali_soft_smi = 1;
@@ -1565,10 +1589,10 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
 }
 
 static uint8_t
-acpi_apm_in(uint16_t port, void *p)
+acpi_apm_in(uint16_t port, void *priv)
 {
-    acpi_t *dev = (acpi_t *) p;
-    uint8_t ret = 0xff;
+    const acpi_t *dev = (acpi_t *) priv;
+    uint8_t       ret = 0xff;
 
     port &= 0x0001;
 
@@ -1593,7 +1617,6 @@ static void
 acpi_reset(void *priv)
 {
     acpi_t *dev = (acpi_t *) priv;
-    int     i;
 
     memset(&dev->regs, 0x00, sizeof(acpi_regs_t));
     dev->regs.gpireg[0] = 0xff;
@@ -1604,7 +1627,7 @@ acpi_reset(void *priv)
        Gigabyte GA-686BX:
        - Bit 1: CMOS battery low (active high) */
     dev->regs.gpireg[2] = dev->gpireg2_default;
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         dev->regs.gporeg[i] = dev->gporeg_default[i];
     if (dev->vendor == VEN_VIA_596B) {
         dev->regs.gpo_val = 0x7fffffff;
@@ -1671,7 +1694,7 @@ acpi_init(const device_t *info)
 
     dev = (acpi_t *) malloc(sizeof(acpi_t));
     if (dev == NULL)
-        return (NULL);
+        return NULL;
     memset(dev, 0x00, sizeof(acpi_t));
 
     cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock;
@@ -1700,6 +1723,7 @@ acpi_init(const device_t *info)
             dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI;
             dev->suspend_types[3] = SUS_SUSPEND;
             dev->suspend_types[5] = SUS_POWER_OFF; /* undocumented, used for S4/S5 by ASUS P5A ACPI table */
+            dev->suspend_types[7] = SUS_POWER_OFF; /* undocumented, used for S5 by Gigabyte GA-5AX ACPI table */
             break;
 
         case VEN_VIA:
@@ -1722,6 +1746,9 @@ acpi_init(const device_t *info)
             dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE;
             dev->suspend_types[4] = SUS_SUSPEND;
             break;
+
+        default:
+            break;
     }
 
     timer_add(&dev->timer, acpi_timer_overflow, dev, 0);

src/apm.c

@@ -52,9 +52,9 @@ apm_set_do_smi(apm_t *dev, uint8_t do_smi)
 }
 
 static void
-apm_out(uint16_t port, uint8_t val, void *p)
+apm_out(uint16_t port, uint8_t val, void *priv)
 {
-    apm_t *dev = (apm_t *) p;
+    apm_t *dev = (apm_t *) priv;
 
     apm_log("[%04X:%08X] APM write: %04X = %02X (BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, BX, CX);
 
@@ -69,10 +69,10 @@ apm_out(uint16_t port, uint8_t val, void *p)
 }
 
 static uint8_t
-apm_in(uint16_t port, void *p)
+apm_in(uint16_t port, void *priv)
 {
-    apm_t  *dev = (apm_t *) p;
-    uint8_t ret = 0xff;
+    const apm_t  *dev = (apm_t *) priv;
+    uint8_t       ret = 0xff;
 
     port &= 0x0001;
 
@@ -87,24 +87,23 @@ apm_in(uint16_t port, void *p)
 }
 
 static void
-apm_reset(void *p)
+apm_reset(void *priv)
 {
-    apm_t *dev = (apm_t *) p;
+    apm_t *dev = (apm_t *) priv;
 
     dev->cmd = dev->stat = 0x00;
 }
 
 static void
-apm_close(void *p)
+apm_close(void *priv)
 {
-    apm_t *dev = (apm_t *) p;
+    apm_t *dev = (apm_t *) priv;
 
     free(dev);
 }
 
-static void
-    *
-    apm_init(const device_t *info)
+static void *
+apm_init(const device_t *info)
 {
     apm_t *dev = (apm_t *) malloc(sizeof(apm_t));
     memset(dev, 0, sizeof(apm_t));

src/cdrom/cdrom.c

@@ -163,7 +163,7 @@ cdrom_interface_get_from_internal_name(char *s)
     int c = 0;
 
     while (controllers[c].device != NULL) {
-        if (!strcmp((char *) controllers[c].device->internal_name, s))
+        if (!strcmp(controllers[c].device->internal_name, s))
             return c;
         c++;
     }
@@ -183,12 +183,12 @@ cdrom_interface_has_config(int cdinterface)
     const device_t *dev = cdrom_interface_get_device(cdinterface);
 
     if (dev == NULL)
-        return (0);
+        return 0;
 
     if (!device_has_config(dev))
-        return (0);
+        return 0;
 
-    return (1);
+    return 1;
 }
 
 int
@@ -257,7 +257,9 @@ int
 cdrom_lba_to_msf_accurate(int lba)
 {
     int pos;
-    int m, s, f;
+    int m;
+    int s;
+    int f;
 
     pos = lba + 150;
     f   = pos % 75;
@@ -401,7 +403,9 @@ cdrom_stop(cdrom_t *dev)
 void
 cdrom_seek(cdrom_t *dev, uint32_t pos, uint8_t vendor_type)
 {
-    int      m, s, f;
+    int      m;
+    int      s;
+    int      f;
 
     if (!dev)
         return;
@@ -418,6 +422,8 @@ cdrom_seek(cdrom_t *dev, uint32_t pos, uint8_t vendor_type)
         case 0x80:
             pos = bcd2bin((pos >> 24) & 0xff);
             break;
+        default:
+            break;
     }
 
     dev->seek_pos = pos;
@@ -498,7 +504,9 @@ uint8_t
 cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf)
 {
     track_info_t ti;
-    int          m = 0, s = 0, f = 0;
+    int          m = 0;
+    int          s = 0;
+    int          f = 0;
 
     if (dev->cd_status == CD_STATUS_DATA_ONLY)
         return 0;
@@ -570,7 +578,9 @@ cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf)
 uint8_t
 cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
 {
-    int m = 0, s = 0, f = 0;
+    int m = 0;
+    int s = 0;
+    int f = 0;
 
     if (dev->cd_status == CD_STATUS_DATA_ONLY)
         return 0;
@@ -603,6 +613,8 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
             }
             dev->seek_pos = (pos >> 24) & 0xff;
             break;
+        default:
+            break;
     }
 
     /* Unlike standard commands, if there's a data track on an Audio CD (mixed mode)
@@ -615,7 +627,9 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
 uint8_t
 cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type)
 {
-    int m = 0, s = 0, f = 0;
+    int m = 0;
+    int s = 0;
+    int f = 0;
 
     if (dev->cd_status == CD_STATUS_DATA_ONLY)
         return 0;
@@ -642,6 +656,8 @@ cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type)
             }
             dev->cd_end = pos;
             break;
+        default:
+            break;
     }
 
     cdrom_log("Toshiba/NEC Play Audio: MSF = %06x, type = %02x, cdstatus = %02x\n", pos, type, dev->cd_status);
@@ -657,7 +673,9 @@ cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type)
 uint8_t
 cdrom_audio_scan(cdrom_t *dev, uint32_t pos, int type)
 {
-    int m = 0, s = 0, f = 0;
+    int m = 0;
+    int s = 0;
+    int f = 0;
 
     if (dev->cd_status == CD_STATUS_DATA_ONLY)
         return 0;
@@ -686,6 +704,8 @@ cdrom_audio_scan(cdrom_t *dev, uint32_t pos, int type)
         case 0x80:
             dev->seek_pos = (pos >> 24) & 0xff;
             break;
+        default:
+            break;
     }
 
     /* Do this at this point, since it's at this point that we know the
@@ -712,7 +732,10 @@ cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf)
 {
     uint8_t      ret;
     subchannel_t subc;
-    int          pos = 1, m, s, f;
+    int          pos = 1;
+    int          m;
+    int          s;
+    int          f;
     uint32_t     dat;
 
     dev->ops->get_subchannel(dev, dev->seek_pos, &subc);
@@ -895,9 +918,13 @@ static int
 read_toc_normal(cdrom_t *dev, unsigned char *b, unsigned char start_track, int msf)
 {
     track_info_t ti;
-    int          i, len = 4;
-    int          m, s, f;
-    int          first_track, last_track;
+    int          i;
+    int          len = 4;
+    int          m;
+    int          s;
+    int          f;
+    int          first_track;
+    int          last_track;
     uint32_t     temp;
 
     cdrom_log("read_toc_normal(%08X, %08X, %02X, %i)\n", dev, b, start_track, msf);
@@ -978,7 +1005,10 @@ static int
 read_toc_session(cdrom_t *dev, unsigned char *b, int msf)
 {
     track_info_t ti;
-    int          len = 4, m, s, f;
+    int          len = 4;
+    int          m;
+    int          s;
+    int          f;
     uint32_t     temp;
 
     cdrom_log("read_toc_session(%08X, %08X, %i)\n", dev, b, msf);
@@ -1027,8 +1057,9 @@ static int
 read_toc_raw(cdrom_t *dev, unsigned char *b)
 {
     track_info_t ti;
-    int          i, len = 4;
-    int          first_track, last_track;
+    int          len = 4;
+    int          first_track;
+    int          last_track;
 
     cdrom_log("read_toc_raw(%08X, %08X)\n", dev, b);
 
@@ -1037,7 +1068,7 @@ read_toc_raw(cdrom_t *dev, unsigned char *b)
     /* Bytes 2 and 3 = Number of first and last sessions */
     b[2] = b[3] = 1;
 
-    for (i = 0; i <= last_track; i++) {
+    for (int i = 0; i <= last_track; i++) {
         dev->ops->get_track_info(dev, i + 1, 0, &ti);
 
         cdrom_log("    tracks(%i) = %02X, %02X, %i:%02i.%02i\n", i, ti.attr, ti.number, ti.m, ti.s, ti.f);
@@ -1061,8 +1092,10 @@ static int
 read_toc_sony(cdrom_t *dev, unsigned char *b, unsigned char start_track, int msf)
 {
     track_info_t ti;
-    int          i, len = 4;
-    int          first_track, last_track;
+    int          i;
+    int          len = 4;
+    int          first_track;
+    int          last_track;
     uint32_t     temp;
 
     cdrom_log("read_toc_sony(%08X, %08X, %02X, %i)\n", dev, b, start_track, msf);
@@ -1173,7 +1206,8 @@ void
 cdrom_get_track_buffer(cdrom_t *dev, uint8_t *buf)
 {
     track_info_t ti;
-    int          first_track, last_track;
+    int          first_track;
+    int          last_track;
 
     if (dev != NULL) {
         dev->ops->get_tracks(dev, &first_track, &last_track);
@@ -1196,7 +1230,8 @@ void
 cdrom_get_q(cdrom_t *dev, uint8_t *buf, int *curtoctrk, uint8_t mode)
 {
     track_info_t ti;
-    int          first_track, last_track;
+    int          first_track;
+    int          last_track;
 
     if (dev != NULL) {
         dev->ops->get_tracks(dev, &first_track, &last_track);
@@ -1254,8 +1289,11 @@ uint8_t
 cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, int type)
 {
     track_info_t ti;
-    int          first_track, last_track;
-    int          m = 0, s = 0, f = 0;
+    int          first_track;
+    int          last_track;
+    int          m = 0;
+    int          s = 0;
+    int          f = 0;
 
     dev->ops->get_tracks(dev, &first_track, &last_track);
 
@@ -1301,13 +1339,15 @@ cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, in
             b[2] = 0;
             b[3] = 0;
             break;
+        default:
+            break;
     }
 
     return 1;
 }
 
 static int
-track_type_is_valid(uint8_t id, int type, int flags, int audio, int mode2)
+track_type_is_valid(UNUSED(uint8_t id), int type, int flags, int audio, int mode2)
 {
     if (!(flags & 0x70) && (flags & 0xf8)) { /* 0x08/0x80/0x88 are illegal modes */
         cdrom_log("CD-ROM %i: [Any Mode] 0x08/0x80/0x88 are illegal modes\n", id);
@@ -1583,10 +1623,15 @@ int
 cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int cdrom_sector_type,
                      int cdrom_sector_flags, int *len, uint8_t vendor_type)
 {
-    uint8_t *b, *temp_b;
-    uint32_t msf, lba;
-    int      audio = 0, mode2 = 0;
-    int      m, s, f;
+    uint8_t *b;
+    uint8_t *temp_b;
+    uint32_t msf;
+    uint32_t lba;
+    int      audio = 0;
+    int      mode2 = 0;
+    int      m;
+    int      s;
+    int      f;
 
     if (dev->cd_status == CD_STATUS_EMPTY)
         return 0;
@@ -1763,9 +1808,8 @@ void
 cdrom_hard_reset(void)
 {
     cdrom_t *dev;
-    int      i;
 
-    for (i = 0; i < CDROM_NUM; i++) {
+    for (uint8_t i = 0; i < CDROM_NUM; i++) {
         dev = &cdrom[i];
         if (dev->bus_type) {
             cdrom_log("CD-ROM %i: Hard reset\n", i);
@@ -1798,9 +1842,8 @@ void
 cdrom_close(void)
 {
     cdrom_t *dev;
-    int      i;
 
-    for (i = 0; i < CDROM_NUM; i++) {
+    for (uint8_t i = 0; i < CDROM_NUM; i++) {
         dev = &cdrom[i];
 
         if (dev->bus_type == CDROM_BUS_SCSI)

src/cdrom/cdrom_image.c

@@ -84,7 +84,8 @@ static void
 image_get_subchannel(cdrom_t *dev, uint32_t lba, subchannel_t *subc)
 {
     cd_img_t *img = (cd_img_t *) dev->image;
-    TMSF      rel_pos, abs_pos;
+    TMSF      rel_pos;
+    TMSF      abs_pos;
 
     cdi_get_audio_sub(img, lba, &subc->attr, &subc->track, &subc->index,
                       &rel_pos, &abs_pos);
@@ -102,17 +103,19 @@ static int
 image_get_capacity(cdrom_t *dev)
 {
     cd_img_t     *img = (cd_img_t *) dev->image;
-    int           first_track, last_track;
-    int           number, c;
+    int           first_track;
+    int           last_track;
+    int           number;
     unsigned char attr;
-    uint32_t      address = 0, lb = 0;
+    uint32_t      address = 0;
+    uint32_t      lb = 0;
 
     if (!img)
         return 0;
 
     cdi_get_audio_tracks_lba(img, &first_track, &last_track, &lb);
 
-    for (c = 0; c <= last_track; c++) {
+    for (int c = 0; c <= last_track; c++) {
         cdi_get_audio_track_info_lba(img, 0, c + 1, &number, &address, &attr);
         if (address > lb)
             lb = address;
@@ -127,8 +130,11 @@ image_is_track_audio(cdrom_t *dev, uint32_t pos, int ismsf)
     cd_img_t *img = (cd_img_t *) dev->image;
     uint8_t   attr;
     TMSF      tmsf;
-    int       m, s, f;
-    int       number, track;
+    int       m;
+    int       s;
+    int       f;
+    int       number;
+    int       track;
 
     if (!img || (dev->cd_status == CD_STATUS_DATA_ONLY))
         return 0;

src/cdrom/cdrom_image_backend.c

@@ -159,7 +159,15 @@ bin_init(const char *filename, int *error)
         tf->get_length = bin_get_length;
         tf->close      = bin_close;
     } else {
-        free(tf);
+        /* From the check above, error may still be non-zero if opening a directory.
+         * The error is set for viso to try and open the directory following this function.
+         * However, we need to make sure the descriptor is closed. */
+        if ((tf->file != NULL) && ((stats.st_mode & S_IFMT) == S_IFDIR)) {
+            /* tf is freed by bin_close */
+            bin_close(tf);
+        } else {
+            free(tf);
+        }
         tf = NULL;
     }
 
@@ -194,14 +202,13 @@ track_file_close(track_t *trk)
 static void
 cdi_clear_tracks(cd_img_t *cdi)
 {
-    int           i;
-    track_file_t *last = NULL;
+    const track_file_t *last = NULL;
     track_t      *cur  = NULL;
 
     if ((cdi->tracks == NULL) || (cdi->tracks_num == 0))
         return;
 
-    for (i = 0; i < cdi->tracks_num; i++) {
+    for (int i = 0; i < cdi->tracks_num; i++) {
         cur = &cdi->tracks[i];
 
         /* Make sure we do not attempt to close a NULL file. */
@@ -266,7 +273,7 @@ cdi_get_audio_tracks_lba(cd_img_t *cdi, int *st_track, int *end, uint32_t *lead_
 int
 cdi_get_audio_track_pre(cd_img_t *cdi, int track)
 {
-    track_t *trk = &cdi->tracks[track - 1];
+    const track_t *trk = &cdi->tracks[track - 1];
 
     if ((track < 1) || (track > cdi->tracks_num))
         return 0;
@@ -276,9 +283,9 @@ cdi_get_audio_track_pre(cd_img_t *cdi, int track)
 
 /* This replaces both Info and EndInfo, they are specified by a variable. */
 int
-cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF *start, uint8_t *attr)
+cdi_get_audio_track_info(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, TMSF *start, uint8_t *attr)
 {
-    track_t *trk = &cdi->tracks[track - 1];
+    const track_t *trk = &cdi->tracks[track - 1];
     int      pos = trk->start + 150;
 
     if ((track < 1) || (track > cdi->tracks_num))
@@ -295,9 +302,9 @@ cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF
 }
 
 int
-cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, uint32_t *start, uint8_t *attr)
+cdi_get_audio_track_info_lba(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, uint32_t *start, uint8_t *attr)
 {
-    track_t *trk = &cdi->tracks[track - 1];
+    const track_t *trk = &cdi->tracks[track - 1];
 
     if ((track < 1) || (track > cdi->tracks_num))
         return 0;
@@ -313,8 +320,8 @@ cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num,
 int
 cdi_get_track(cd_img_t *cdi, uint32_t sector)
 {
-    int      i;
-    track_t *cur, *next;
+    const track_t *cur;
+    const track_t *next;
 
     /* There must be at least two tracks - data and lead out. */
     if (cdi->tracks_num < 2)
@@ -322,7 +329,7 @@ cdi_get_track(cd_img_t *cdi, uint32_t sector)
 
     /* This has a problem - the code skips the last track, which is
        lead out - is that correct? */
-    for (i = 0; i < (cdi->tracks_num - 1); i++) {
+    for (int i = 0; i < (cdi->tracks_num - 1); i++) {
         cur  = &cdi->tracks[i];
         next = &cdi->tracks[i + 1];
         if ((cur->start <= sector) && (sector < next->start))
@@ -336,8 +343,8 @@ cdi_get_track(cd_img_t *cdi, uint32_t sector)
 int
 cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, uint8_t *index, TMSF *rel_pos, TMSF *abs_pos)
 {
-    int      cur_track = cdi_get_track(cdi, sector);
-    track_t *trk;
+    int            cur_track = cdi_get_track(cdi, sector);
+    const track_t *trk;
 
     if (cur_track < 1)
         return 0;
@@ -360,12 +367,17 @@ cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector)
 {
     size_t   length;
     int      track = cdi_get_track(cdi, sector) - 1;
-    uint64_t sect  = (uint64_t) sector, seek;
+    uint64_t sect  = (uint64_t) sector;
+    uint64_t seek;
     track_t *trk;
-    int      track_is_raw, ret;
-    int      raw_size, cooked_size;
+    int      track_is_raw;
+    int      ret;
+    int      raw_size;
+    int      cooked_size;
     uint64_t offset = 0ULL;
-    int      m = 0, s = 0, f = 0;
+    int      m = 0;
+    int      s = 0;
+    int      f = 0;
 
     if (track < 0)
         return 0;
@@ -420,9 +432,10 @@ cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector)
 int
 cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint32_t num)
 {
-    int      sector_size, success = 1;
+    int      sector_size;
+    int      success = 1;
     uint8_t *buf;
-    uint32_t buf_len, i;
+    uint32_t buf_len;
 
     /* TODO: This fails to account for Mode 2. Shouldn't we have a function
              to get sector size? */
@@ -430,7 +443,7 @@ cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint3
     buf_len     = num * sector_size;
     buf         = (uint8_t *) malloc(buf_len * sizeof(uint8_t));
 
-    for (i = 0; i < num; i++) {
+    for (uint32_t i = 0; i < num; i++) {
         success = cdi_read_sector(cdi, &buf[i * sector_size], raw, sector + i);
         if (!success)
             break;
@@ -453,7 +466,8 @@ cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector)
 {
     int      track = cdi_get_track(cdi, sector) - 1;
     track_t *trk;
-    uint64_t s = (uint64_t) sector, seek;
+    uint64_t s = (uint64_t) sector;
+    uint64_t seek;
 
     if (track < 0)
         return 0;
@@ -469,8 +483,8 @@ cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector)
 int
 cdi_get_sector_size(cd_img_t *cdi, uint32_t sector)
 {
-    int      track = cdi_get_track(cdi, sector) - 1;
-    track_t *trk;
+    int            track = cdi_get_track(cdi, sector) - 1;
+    const track_t *trk;
 
     if (track < 0)
         return 0;
@@ -482,8 +496,8 @@ cdi_get_sector_size(cd_img_t *cdi, uint32_t sector)
 int
 cdi_is_mode2(cd_img_t *cdi, uint32_t sector)
 {
-    int      track = cdi_get_track(cdi, sector) - 1;
-    track_t *trk;
+    int            track = cdi_get_track(cdi, sector) - 1;
+    const track_t *trk;
 
     if (track < 0)
         return 0;
@@ -496,8 +510,8 @@ cdi_is_mode2(cd_img_t *cdi, uint32_t sector)
 int
 cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector)
 {
-    int      track = cdi_get_track(cdi, sector) - 1;
-    track_t *trk;
+    int            track = cdi_get_track(cdi, sector) - 1;
+    const track_t *trk;
 
     if (track < 0)
         return 0;
@@ -542,7 +556,8 @@ cdi_track_push_back(cd_img_t *cdi, track_t *trk)
 int
 cdi_load_iso(cd_img_t *cdi, const char *filename)
 {
-    int     error, ret = 2;
+    int     error;
+    int     ret = 2;
     track_t trk;
 
     cdi->tracks     = NULL;
@@ -637,7 +652,9 @@ cdi_cue_get_buffer(char *str, char **line, int up)
                     done = 1;
                     break;
                 }
-                /*FALLTHROUGH*/
+#ifdef FALLTHROUGH_ANNOTATION
+                [[fallthrough]];
+#endif
 
             default:
                 if (up && islower((int) *s))
@@ -690,7 +707,9 @@ static int
 cdi_cue_get_frame(uint64_t *frames, char **line)
 {
     char temp[128];
-    int  min, sec, fr;
+    int  min;
+    int  sec;
+    int  fr;
     int  success;
 
     success = cdi_cue_get_buffer(temp, line, 0);
@@ -709,7 +728,8 @@ cdi_cue_get_frame(uint64_t *frames, char **line)
 static int
 cdi_cue_get_flags(track_t *cur, char **line)
 {
-    char temp[128], temp2[128];
+    char temp[128];
+    char temp2[128];
     int  success;
 
     success = cdi_cue_get_buffer(temp, line, 0);
@@ -730,7 +750,8 @@ static int
 cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, uint64_t *total_pregap, uint64_t cur_pregap)
 {
     /* Frames between index 0 (prestart) and 1 (current track start) must be skipped. */
-    uint64_t skip, temp;
+    uint64_t skip;
+    uint64_t temp;
     track_t *prev = NULL;
 
     /* Skip *MUST* be calculated even if prestart is 0. */
@@ -749,7 +770,7 @@ cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, u
     }
 
     /* First track (track number must be 1). */
-    if (cdi->tracks_num == 0) {
+    if ((prev == NULL) || (cdi->tracks_num == 0)) {
         /* I guess this makes sure the structure is not filled with invalid data. */
         if (cur->number != 1)
             return 0;
@@ -768,7 +789,7 @@ cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, u
         *total_pregap += cur_pregap;
         cur->start += *total_pregap;
     } else {
-        temp         = prev->file->get_length(prev->file) - ((uint64_t) prev->skip);
+        temp         = prev->file->get_length(prev->file) - (prev->skip);
         prev->length = temp / ((uint64_t) prev->sector_size);
         if ((temp % prev->sector_size) != 0)
             prev->length++;
@@ -797,16 +818,23 @@ int
 cdi_load_cue(cd_img_t *cdi, const char *cuefile)
 {
     track_t  trk;
-    char     pathname[MAX_FILENAME_LENGTH], filename[MAX_FILENAME_LENGTH];
+    char     pathname[MAX_FILENAME_LENGTH];
+    char     filename[MAX_FILENAME_LENGTH];
     char     temp[MAX_FILENAME_LENGTH];
-    uint64_t shift = 0ULL, prestart = 0ULL;
-    uint64_t cur_pregap = 0ULL, total_pregap = 0ULL;
-    uint64_t frame = 0ULL, index;
-    int      i, success;
-    int      error, can_add_track = 0;
+    uint64_t shift = 0ULL;
+    uint64_t prestart = 0ULL;
+    uint64_t cur_pregap = 0ULL;
+    uint64_t total_pregap = 0ULL;
+    uint64_t frame = 0ULL;
+    uint64_t index;
+    int      success;
+    int      error;
+    int      can_add_track = 0;
     FILE    *fp;
-    char     buf[MAX_LINE_LENGTH], ansi[MAX_FILENAME_LENGTH];
-    char    *line, *command;
+    char     buf[MAX_LINE_LENGTH];
+    char     ansi[MAX_FILENAME_LENGTH];
+    char    *line;
+    char    *command;
     char    *type;
 
     cdi->tracks     = NULL;
@@ -834,7 +862,7 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile)
 
         /* Do two iterations to make sure to nuke even if it's \r\n or \n\r,
            but do checks to make sure we're not nuking other bytes. */
-        for (i = 0; i < 2; i++) {
+        for (uint8_t i = 0; i < 2; i++) {
             if (strlen(buf) > 0) {
                 if (buf[strlen(buf) - 1] == '\n')
                     buf[strlen(buf) - 1] = '\0';
@@ -1027,13 +1055,11 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile)
 int
 cdi_has_data_track(cd_img_t *cdi)
 {
-    int i;
-
     if ((cdi == NULL) || (cdi->tracks == NULL))
         return 0;
 
     /* Data track has attribute 0x14. */
-    for (i = 0; i < cdi->tracks_num; i++) {
+    for (int i = 0; i < cdi->tracks_num; i++) {
         if (cdi->tracks[i].attr == DATA_TRACK)
             return 1;
     }
@@ -1044,13 +1070,11 @@ cdi_has_data_track(cd_img_t *cdi)
 int
 cdi_has_audio_track(cd_img_t *cdi)
 {
-    int i;
-
     if ((cdi == NULL) || (cdi->tracks == NULL))
         return 0;
 
     /* Audio track has attribute 0x14. */
-    for (i = 0; i < cdi->tracks_num; i++) {
+    for (int i = 0; i < cdi->tracks_num; i++) {
         if (cdi->tracks[i].attr == AUDIO_TRACK)
             return 1;
     }

src/cdrom/cdrom_image_viso.c

@@ -114,8 +114,10 @@ typedef struct _viso_entry_ {
 } viso_entry_t;
 
 typedef struct {
-    uint64_t vol_size_offsets[2], pt_meta_offsets[2];
-    int      format, use_version_suffix : 1;
+    uint64_t vol_size_offsets[2];
+    uint64_t pt_meta_offsets[2];
+    int      format;
+    uint8_t  use_version_suffix : 1;
     size_t   metadata_sectors, all_sectors, entry_map_size, sector_size, file_fifo_pos;
     uint8_t *metadata;
 
@@ -218,7 +220,7 @@ viso_convert_utf8(wchar_t *dest, const char *src, ssize_t buf_size)
     return p - dest;
 }
 
-#define VISO_WRITE_STR_FUNC(func, dst_type, src_type, converter)                    \
+#define VISO_WRITE_STR_FUNC(func, dst_type, src_type, converter, bounds_chk)        \
     static void                                                                     \
     func(dst_type *dest, const src_type *src, ssize_t buf_size, int charset)        \
     {                                                                               \
@@ -284,7 +286,7 @@ viso_convert_utf8(wchar_t *dest, const char *src, ssize_t buf_size)
                                                                                     \
                 default:                                                            \
                     /* Not valid for D or A, but valid for filenames. */            \
-                    if ((charset < VISO_CHARSET_FN) || (c > 0xffff))                \
+                    if ((charset < VISO_CHARSET_FN) || (bounds_chk))                \
                         c = '_';                                                    \
                     break;                                                          \
             }                                                                       \
@@ -293,15 +295,16 @@ viso_convert_utf8(wchar_t *dest, const char *src, ssize_t buf_size)
             *dest++ = converter(c);                                                 \
         }                                                                           \
     }
-VISO_WRITE_STR_FUNC(viso_write_string, uint8_t, char, )
-VISO_WRITE_STR_FUNC(viso_write_wstring, uint16_t, wchar_t, cpu_to_be16)
+VISO_WRITE_STR_FUNC(viso_write_string, uint8_t, char, , 0)
+VISO_WRITE_STR_FUNC(viso_write_wstring, uint16_t, wchar_t, cpu_to_be16, c > 0xffff)
 
 static int
 viso_fill_fn_short(char *data, const viso_entry_t *entry, viso_entry_t **entries)
 {
     /* Get name and extension length. */
     const char *ext_pos = strrchr(entry->basename, '.');
-    int         name_len, ext_len;
+    int         name_len;
+    int         ext_len;
     if (ext_pos) {
         name_len = ext_pos - entry->basename;
         ext_len  = strlen(ext_pos);
@@ -367,7 +370,7 @@ viso_fill_fn_rr(uint8_t *data, const viso_entry_t *entry, size_t max_len)
 
         /* Relocate extension if the original name exceeds the maximum length. */
         if (!S_ISDIR(entry->stats.st_mode)) { /* do this on files only */
-            char *ext = strrchr(entry->basename, '.');
+            const char *ext = strrchr(entry->basename, '.');
             if (ext > entry->basename) {
                 len = strlen(ext);
                 if (len >= max_len)
@@ -398,7 +401,7 @@ viso_fill_fn_joliet(uint8_t *data, const viso_entry_t *entry, size_t max_len) /*
 
         /* Relocate extension if the original name exceeds the maximum length. */
         if (!S_ISDIR(entry->stats.st_mode)) { /* do this on files only */
-            wchar_t *ext = wcsrchr(utf8dec, L'.');
+            const wchar_t *ext = wcsrchr(utf8dec, L'.');
             if (ext > utf8dec) {
                 len = wcslen(ext);
                 if (len > max_len)
@@ -472,7 +475,9 @@ viso_fill_time(uint8_t *data, time_t time, int format, int longform)
 static int
 viso_fill_dir_record(uint8_t *data, viso_entry_t *entry, viso_t *viso, int type)
 {
-    uint8_t *p = data, *q, *r;
+    uint8_t *p = data;
+    uint8_t *q;
+    uint8_t *r;
 
     *p++ = 0;                             /* size (filled in later) */
     *p++ = 0;                             /* extended attribute length */
@@ -626,10 +631,17 @@ pad_susp:
             if (!(*q & 1)) /* padding for even file ID lengths */
                 *p++ = 0;
             break;
+
+        default:
+            break;
     }
 
     if ((p - data) > 255)
-        fatal("VISO: Directory record overflow (%d) on entry %08X\n", p - data, entry);
+#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
+        fatal("VISO: Directory record overflow (%d) on entry %016" PRIX64 "\n", (uint32_t) (uintptr_t) (p - data), (uint64_t) (uintptr_t) entry);
+#else
+        fatal("VISO: Directory record overflow (%d) on entry %08X\n", (uint32_t) (uintptr_t) (p - data), (uint32_t) (uintptr_t) entry);
+#endif
 
     data[0] = p - data; /* length */
     return data[0];
@@ -650,9 +662,9 @@ viso_read(void *p, uint8_t *buffer, uint64_t seek, size_t count)
     /* Handle reads in a sector by sector basis. */
     while (count > 0) {
         /* Determine the current sector, offset and remainder. */
-        uint32_t sector        = seek / viso->sector_size,
-                 sector_offset = seek % viso->sector_size,
-                 sector_remain = MIN(count, viso->sector_size - sector_offset);
+        uint32_t sector        = seek / viso->sector_size;
+        uint32_t sector_offset = seek % viso->sector_size;
+        uint32_t sector_remain = MIN(count, viso->sector_size - sector_offset);
 
         /* Handle sector. */
         if (sector < viso->metadata_sectors) {
@@ -713,8 +725,9 @@ viso_read(void *p, uint8_t *buffer, uint64_t seek, size_t count)
 uint64_t
 viso_get_length(void *p)
 {
-    track_file_t *tf   = (track_file_t *) p;
-    viso_t       *viso = (viso_t *) tf->priv;
+    track_file_t       *tf   = (track_file_t *) p;
+    const viso_t       *viso = (viso_t *) tf->priv;
+
     return ((uint64_t) viso->all_sectors) * viso->sector_size;
 }
 
@@ -736,7 +749,8 @@ viso_close(void *p)
     remove(nvr_path(viso->tf.fn));
 #endif
 
-    viso_entry_t *entry = viso->root_dir, *next_entry;
+    viso_entry_t *entry = viso->root_dir;
+    viso_entry_t *next_entry;
     while (entry) {
         if (entry->file)
             fclose(entry->file);
@@ -760,7 +774,8 @@ viso_init(const char *dirname, int *error)
 
     /* Initialize our data structure. */
     viso_t  *viso = (viso_t *) calloc(1, sizeof(viso_t));
-    uint8_t *data = NULL, *p;
+    uint8_t *data = NULL;
+    uint8_t *p;
     *error        = 1;
     if (viso == NULL)
         goto end;
@@ -785,12 +800,18 @@ viso_init(const char *dirname, int *error)
 
     /* Set up directory traversal. */
     cdrom_image_viso_log("VISO: Traversing directories:\n");
-    viso_entry_t  *entry, *last_entry, *dir, *last_dir, *eltorito_dir = NULL, *eltorito_entry = NULL;
-    struct dirent *readdir_entry;
-    int            len, eltorito_others_present = 0;
-    size_t         dir_path_len;
-    uint64_t       eltorito_offset = 0;
-    uint8_t        eltorito_type   = 0;
+    viso_entry_t        *entry;
+    viso_entry_t        *last_entry;
+    viso_entry_t        *dir;
+    viso_entry_t        *last_dir;
+    const viso_entry_t  *eltorito_dir = NULL;
+    const viso_entry_t  *eltorito_entry = NULL;
+    struct dirent       *readdir_entry;
+    int                  len;
+    int                  eltorito_others_present = 0;
+    size_t               dir_path_len;
+    uint64_t             eltorito_offset = 0;
+    uint8_t              eltorito_type   = 0;
 
     /* Fill root directory entry. */
     dir_path_len = strlen(dirname);
@@ -1445,8 +1466,8 @@ next_entry:
     /* Go through files, assigning sectors to them. */
     cdrom_image_viso_log("VISO: Assigning sectors to files:\n");
     size_t        base_factor  = viso->sector_size / orig_sector_size;
-    viso_entry_t *prev_entry   = viso->root_dir,
-                 **entry_map_p = viso->entry_map;
+    viso_entry_t *prev_entry   = viso->root_dir;
+    viso_entry_t **entry_map_p = viso->entry_map;
     entry                      = prev_entry->next;
     while (entry) {
         /* Skip this entry if it corresponds to a directory. */
@@ -1512,7 +1533,8 @@ next_entry:
     if (!viso->metadata)
         goto end;
     fseeko64(viso->tf.file, 0, SEEK_SET);
-    uint64_t metadata_size = viso->metadata_sectors * viso->sector_size, metadata_remain = metadata_size;
+    uint64_t metadata_size = viso->metadata_sectors * viso->sector_size;
+    uint64_t metadata_remain = metadata_size;
     while (metadata_remain > 0)
         metadata_remain -= fread(viso->metadata + (metadata_size - metadata_remain), 1, MIN(metadata_remain, viso->sector_size), viso->tf.file);
 

src/cdrom/cdrom_mitsumi.c

@@ -116,7 +116,9 @@ typedef struct {
 /* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong:
    there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start
    of the audio while audio still plays. With an absolute conversion, the counter is fine. */
+#ifdef MSFtoLBA
 #undef MSFtoLBA
+#endif
 #define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f)
 
 #define CD_BCD(x)         (((x) % 10) | (((x) / 10) << 4))
@@ -242,9 +244,11 @@ mitsumi_cdrom_in(uint16_t port, void *priv)
                 ret |= FLAG_NOSTAT;
             pclog("Read port 1: ret = %02x\n", ret | FLAG_UNK);
             return ret | FLAG_UNK;
+        default:
+            break;
     }
 
-    return (0xff);
+    return 0xff;
 }
 
 static void
@@ -283,6 +287,8 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
                                     case 0x10:
                                         dev->enable_irq = val;
                                         break;
+                                    default:
+                                        break;
                                 }
                                 dev->cmdbuf[1]    = 0;
                                 dev->cmdbuf_count = 2;
@@ -297,6 +303,8 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
                                 if (dev->conf == 1)
                                     dev->cmdrd_count++;
                                 break;
+                            default:
+                                break;
                         }
                         break;
                     case CMD_READ1X:
@@ -316,12 +324,19 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
                                 break;
                             case 5:
                                 dev->readmsf = 0;
+#ifdef FALLTHROUGH_ANNOTATION
+                                [[fallthrough]];
+#endif
                             case 4:
                             case 3:
                                 dev->readmsf |= CD_DCB(val) << ((dev->cmdrd_count - 3) << 3);
                                 break;
+                            default:
+                                break;
                         }
                         break;
+                    default:
+                        break;
                 }
                 if (!dev->cmdrd_count)
                     dev->stat = cdrom.host_drive ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0;
@@ -406,11 +421,13 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
         case 1:
             mitsumi_cdrom_reset(dev);
             break;
+        default:
+            break;
     }
 }
 
 static void *
-mitsumi_cdrom_init(const device_t *info)
+mitsumi_cdrom_init(UNUSED(const device_t *info))
 {
     mcd_t *dev;
 

src/chipset/82c100.c

@@ -28,23 +28,24 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/nmi.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/rom.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
+typedef struct ems_page_t {
     int      enabled;
-    uint32_t virt, phys;
+    uint32_t virt;
+    uint32_t phys;
 } ems_page_t;
 
-typedef struct
-{
-    uint8_t  index, access;
-    uint16_t ems_io_base;
-    uint32_t ems_window_base;
-    uint8_t  ems_page_regs[4],
-        regs[256];
+typedef struct ct_82c100_t {
+    uint8_t       index;
+    uint8_t       access;
+    uint16_t      ems_io_base;
+    uint32_t      ems_window_base;
+    uint8_t       ems_page_regs[4];
+    uint8_t       regs[256];
     ems_page_t    ems_pages[4];
     mem_mapping_t ems_mappings[4];
 } ct_82c100_t;
@@ -70,10 +71,9 @@ ct_82c100_log(const char *fmt, ...)
 static void
 ct_82c100_ems_pages_recalc(ct_82c100_t *dev)
 {
-    int      i;
     uint32_t page_base;
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         page_base = dev->ems_window_base + (i << 14);
         if ((i == 1) || (i == 2))
             page_base ^= 0xc000;
@@ -109,7 +109,7 @@ ct_82c100_ems_out(uint16_t port, uint8_t val, void *priv)
 static uint8_t
 ct_82c100_ems_in(uint16_t port, void *priv)
 {
-    ct_82c100_t *dev = (ct_82c100_t *) priv;
+    const ct_82c100_t *dev = (ct_82c100_t *) priv;
     uint8_t      ret = 0xff;
 
     ret = dev->ems_page_regs[port >> 14];
@@ -120,9 +120,7 @@ ct_82c100_ems_in(uint16_t port, void *priv)
 static void
 ct_82c100_ems_update(ct_82c100_t *dev)
 {
-    int i;
-
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         ct_82c100_log("Disabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14));
         io_handler(0, dev->ems_io_base + (i << 14), 1,
                    ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev);
@@ -130,7 +128,7 @@ ct_82c100_ems_update(ct_82c100_t *dev)
 
     dev->ems_io_base = 0x0208 + (dev->regs[0x4c] & 0xf0);
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         ct_82c100_log("Enabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14));
         io_handler(1, dev->ems_io_base + (i << 14), 1,
                    ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev);
@@ -222,6 +220,9 @@ ct_82c100_out(uint16_t port, uint8_t val, void *priv)
                     dev->regs[0x4c] = val;
                     ct_82c100_ems_update(dev);
                     break;
+
+                default:
+                    break;
             }
             dev->access = 0;
         }
@@ -258,6 +259,9 @@ ct_82c100_in(uint16_t port, void *priv)
                 case 0x4c:
                     ret = dev->regs[dev->index];
                     break;
+
+                default:
+                    break;
             }
             dev->access = 0;
         }
@@ -274,15 +278,15 @@ ct_82c100_in(uint16_t port, void *priv)
 static uint8_t
 mem_read_emsb(uint32_t addr, void *priv)
 {
-    ems_page_t *page = (ems_page_t *) priv;
-    uint8_t     ret  = 0xff;
+    const ems_page_t *page = (ems_page_t *) priv;
+    uint8_t           ret  = 0xff;
 #ifdef ENABLE_CT_82C100_LOG
     uint32_t old_addr = addr;
 #endif
 
     addr = addr - page->virt + page->phys;
 
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ret = ram[addr];
 
     ct_82c100_log("mem_read_emsb(%08X = %08X): %02X\n", old_addr, addr, ret);
@@ -293,7 +297,7 @@ mem_read_emsb(uint32_t addr, void *priv)
 static uint16_t
 mem_read_emsw(uint32_t addr, void *priv)
 {
-    ems_page_t *page = (ems_page_t *) priv;
+    const ems_page_t *page = (ems_page_t *) priv;
     uint16_t    ret  = 0xffff;
 #ifdef ENABLE_CT_82C100_LOG
     uint32_t old_addr = addr;
@@ -301,7 +305,7 @@ mem_read_emsw(uint32_t addr, void *priv)
 
     addr = addr - page->virt + page->phys;
 
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ret = *(uint16_t *) &ram[addr];
 
     ct_82c100_log("mem_read_emsw(%08X = %08X): %04X\n", old_addr, addr, ret);
@@ -312,14 +316,14 @@ mem_read_emsw(uint32_t addr, void *priv)
 static void
 mem_write_emsb(uint32_t addr, uint8_t val, void *priv)
 {
-    ems_page_t *page = (ems_page_t *) priv;
+    const ems_page_t *page = (ems_page_t *) priv;
 #ifdef ENABLE_CT_82C100_LOG
     uint32_t old_addr = addr;
 #endif
 
     addr = addr - page->virt + page->phys;
 
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ram[addr] = val;
 
     ct_82c100_log("mem_write_emsb(%08X = %08X, %02X)\n", old_addr, addr, val);
@@ -328,14 +332,14 @@ mem_write_emsb(uint32_t addr, uint8_t val, void *priv)
 static void
 mem_write_emsw(uint32_t addr, uint16_t val, void *priv)
 {
-    ems_page_t *page = (ems_page_t *) priv;
+    const ems_page_t *page = (ems_page_t *) priv;
 #ifdef ENABLE_CT_82C100_LOG
     uint32_t old_addr = addr;
 #endif
 
     addr = addr - page->virt + page->phys;
 
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         *(uint16_t *) &ram[addr] = val;
 
     ct_82c100_log("mem_write_emsw(%08X = %08X, %04X)\n", old_addr, addr, val);
@@ -350,10 +354,9 @@ ct_82c100_close(void *priv)
 }
 
 static void *
-ct_82c100_init(const device_t *info)
+ct_82c100_init(UNUSED(const device_t *info))
 {
     ct_82c100_t *dev;
-    uint32_t     i;
 
     dev = (ct_82c100_t *) malloc(sizeof(ct_82c100_t));
     memset(dev, 0x00, sizeof(ct_82c100_t));
@@ -367,7 +370,7 @@ ct_82c100_init(const device_t *info)
     io_sethandler(0x007e, 2,
                   ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev);
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         mem_mapping_add(&(dev->ems_mappings[i]), (i + 28) << 14, 0x04000,
                         mem_read_emsb, mem_read_emsw, NULL,
                         mem_write_emsb, mem_write_emsw, NULL,
@@ -379,7 +382,7 @@ ct_82c100_init(const device_t *info)
 
     device_add(&port_92_device);
 
-    return (dev);
+    return dev;
 }
 
 const device_t ct_82c100_device = {

src/chipset/acc2168.c

@@ -30,6 +30,7 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/port_92.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
 #define ENABLED_SHADOW  (MEM_READ_INTERNAL | ((dev->regs[0x02] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL))
@@ -57,20 +58,21 @@ acc2168_log(const char *fmt, ...)
 #endif
 
 typedef struct acc2168_t {
-    uint8_t reg_idx, regs[256];
+    uint8_t reg_idx;
+    uint8_t regs[256];
 } acc2168_t;
 
 static void
 acc2168_shadow_recalc(acc2168_t *dev)
 {
-    for (uint32_t i = 0; i < 5; i++)
+    for (uint8_t i = 0; i < 5; i++)
         mem_set_mem_state_both(SHADOW_ADDR, SHADOW_SIZE, SHADOW_RECALC);
 }
 
 static void
-acc2168_write(uint16_t addr, uint8_t val, void *p)
+acc2168_write(uint16_t addr, uint8_t val, void *priv)
 {
-    acc2168_t *dev = (acc2168_t *) p;
+    acc2168_t *dev = (acc2168_t *) priv;
 
     switch (addr) {
         case 0xf2:
@@ -158,13 +160,15 @@ acc2168_write(uint16_t addr, uint8_t val, void *p)
                     break;
             }
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
-acc2168_read(uint16_t addr, void *p)
+acc2168_read(uint16_t addr, void *priv)
 {
-    acc2168_t *dev = (acc2168_t *) p;
+    const acc2168_t *dev = (acc2168_t *) priv;
 
     return (addr == 0xf3) ? dev->regs[dev->reg_idx] : dev->reg_idx;
 }
@@ -178,7 +182,7 @@ acc2168_close(void *priv)
 }
 
 static void *
-acc2168_init(const device_t *info)
+acc2168_init(UNUSED(const device_t *info))
 {
     acc2168_t *dev = (acc2168_t *) malloc(sizeof(acc2168_t));
     memset(dev, 0, sizeof(acc2168_t));

src/chipset/ali1429.c

@@ -115,16 +115,20 @@ ali1429_log(const char *fmt, ...)
 #    define ali1429_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint8_t is_g, index, cfg_locked, reg_57h,
-        regs[90];
+typedef struct ali_1429_t {
+    uint8_t is_g;
+    uint8_t index;
+    uint8_t cfg_locked;
+    uint8_t reg_57h;
+    uint8_t regs[90];
 } ali1429_t;
 
 static void
 ali1429_shadow_recalc(ali1429_t *dev)
 {
-    uint32_t base, i, can_write, can_read;
+    uint32_t base;
+    uint32_t can_write;
+    uint32_t can_read;
 
     shadowbios       = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
     shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
@@ -132,7 +136,7 @@ ali1429_shadow_recalc(ali1429_t *dev)
     can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
     can_read  = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xc0000 + (i << 15);
 
         if (dev->regs[0x13] & (1 << i))
@@ -164,7 +168,7 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
                 dev->cfg_locked = (val != 0xc5);
 
             if (!dev->cfg_locked) {
-                pclog("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
+                ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
 
                 /* Common M1429 Registers */
                 switch (dev->index) {
@@ -237,12 +241,16 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
                             case 6:
                                 cpu_set_isa_speed(cpu_busspeed / 12);
                                 break;
+                            default:
+                                break;
                         }
                         break;
 
                     case 0x21 ... 0x27:
                         dev->regs[dev->index] = val;
                         break;
+                    default:
+                        break;
                 }
 
                 /* M1429G Only Registers */
@@ -258,18 +266,22 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
                         case 0x57:
                             dev->reg_57h = val;
                             break;
+                        default:
+                            break;
                     }
                 }
             }
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 ali1429_read(uint16_t addr, void *priv)
 {
-    ali1429_t *dev = (ali1429_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1429_t *dev = (ali1429_t *) priv;
+    uint8_t          ret = 0xff;
 
     if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a))
         ret = dev->regs[dev->index];

src/chipset/ali1435.c

@@ -1,315 +1,327 @@
-/*
- * 86Box	A hypervisor and IBM PC system emulator that specializes in
- *		running old operating systems and software designed for IBM
- *		PC systems and compatibles from 1981 through fairly recent
- *		system designs based on the PCI bus.
- *
- *		Emulation of ALi M1435 chipset that acts as both the
- *		southbridge.
- *
- *
- *
- * Authors:	Miran Grca, <mgrca8@gmail.com>
- *
- *		Copyright 2020 Miran Grca.
- */
-#include <stdarg.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <wchar.h>
-#define HAVE_STDARG_H
-#include <86box/86box.h>
-#include <86box/device.h>
-#include <86box/io.h>
-#include <86box/apm.h>
-#include <86box/dma.h>
-#include <86box/mem.h>
-#include <86box/smram.h>
-#include <86box/pci.h>
-#include <86box/timer.h>
-#include <86box/pic.h>
-#include <86box/pit.h>
-#include <86box/port_92.h>
-#include <86box/hdc_ide.h>
-#include <86box/hdc.h>
-#include <86box/machine.h>
-#include <86box/chipset.h>
-#include <86box/spd.h>
-
-#define MEM_STATE_SHADOW_R 0x01
-#define MEM_STATE_SHADOW_W 0x02
-#define MEM_STATE_SMRAM    0x04
-
-typedef struct
-{
-    uint8_t index, cfg_locked,
-        regs[16], pci_regs[256];
-} ali1435_t;
-
-#define ENABLE_ALI1435_LOG 1
-#ifdef ENABLE_ALI1435_LOG
-int ali1435_do_log = ENABLE_ALI1435_LOG;
-
-static void
-ali1435_log(const char *fmt, ...)
-{
-    va_list ap;
-
-    if (ali1435_do_log) {
-        va_start(ap, fmt);
-        pclog_ex(fmt, ap);
-        va_end(ap);
-    }
-}
-#else
-#    define ali1435_log(fmt, ...)
-#endif
-
-/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter
-         when the most siginificant bit is set. We work around that by manipulating the
-         emulated PIC's ELCR register. */
-static void
-ali1435_update_irqs(ali1435_t *dev, int set)
-{
-    uint8_t val;
-    int     i, reg;
-    int     shift, irq;
-    int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-    pic_t  *temp_pic;
-
-    for (i = 0; i < 4; i++) {
-        reg   = 0x80 + (i >> 1);
-        shift = (i & 1) << 2;
-        val   = (dev->pci_regs[reg] >> shift) & 0x0f;
-        irq   = irq_map[val & 0x07];
-        if (irq == -1)
-            continue;
-        temp_pic = (irq >= 8) ? &pic2 : &pic;
-        irq &= 7;
-        if (set && (val & 0x08))
-            temp_pic->elcr |= (1 << irq);
-        else
-            temp_pic->elcr &= ~(1 << irq);
-    }
-}
-
-static void
-ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    int        irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-
-    ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val);
-
-    if (func > 0)
-        return;
-
-    if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b)))
-        return;
-
-    if ((addr >= 0x0f) && (addr < 0x30))
-        return;
-
-    if ((addr >= 0x34) && (addr < 0x40))
-        return;
-
-    switch (addr) {
-        /* Dummy PCI Config */
-        case 0x04:
-            dev->pci_regs[addr] = (val & 0x7f) | 0x07;
-            break;
-
-        case 0x05:
-            dev->pci_regs[addr] = (val & 0x01);
-            break;
-
-        /* Dummy PCI Status */
-        case 0x07:
-            dev->pci_regs[addr] &= ~(val & 0xb8);
-            break;
-
-        case 0x80:
-        case 0x81:
-            dev->pci_regs[addr] = val;
-            ali1435_update_irqs(dev, 0);
-            irq = irq_map[val & 0x07];
-            if (irq >= 0) {
-                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
-                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
-            } else {
-                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
-                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
-            }
-            irq = irq_map[(val >> 4) & 0x07];
-            if (irq >= 0) {
-                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
-                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
-            } else {
-                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
-                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
-            }
-            ali1435_update_irqs(dev, 1);
-            break;
-
-        default:
-            dev->pci_regs[addr] = val;
-            break;
-    }
-}
-
-static uint8_t
-ali1435_pci_read(int func, int addr, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    uint8_t    ret;
-
-    ret = 0xff;
-
-    if (func == 0)
-        ret = dev->pci_regs[addr];
-
-    ali1435_log("ali1435_read(%02X, %02X) = %02X\n", func, addr, ret);
-
-    return ret;
-}
-
-static void
-ali1435_write(uint16_t addr, uint8_t val, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-
-    switch (addr) {
-        case 0x22:
-            dev->index = val;
-            break;
-
-        case 0x23:
-            /* #ifdef ENABLE_ALI1435_LOG
-                            if (dev->index != 0x03)
-                                    ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
-            #endif */
-
-            if (dev->index == 0x03)
-                dev->cfg_locked = (val != 0x69);
-
-            if (!dev->cfg_locked) {
-                pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
-
-                switch (dev->index) {
-                    /* PCI Mechanism select? */
-                    case 0x00:
-                        dev->regs[dev->index] = val;
-                        pclog("PMC = %i\n", val != 0xc8);
-                        pci_set_pmc(val != 0xc8);
-                        break;
-
-                    /* ???? */
-                    case 0x06:
-                        dev->regs[dev->index] = val;
-                        break;
-
-                    /* ???? */
-                    case 0x07:
-                        dev->regs[dev->index] = val;
-                        break;
-                }
-            }
-            break;
-    }
-}
-
-static uint8_t
-ali1435_read(uint16_t addr, void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-    uint8_t    ret = 0xff;
-
-    if ((addr == 0x23) && (dev->index < 0x10))
-        ret = dev->regs[dev->index];
-    else if (addr == 0x22)
-        ret = dev->index;
-
-    return ret;
-}
-
-static void
-ali1435_reset(void *priv)
-{
-    ali1435_t *dev = (ali1435_t *) priv;
-
-    memset(dev->regs, 0, 16);
-
-    dev->regs[0x00] = 0xff;
-
-    pci_set_pmc(0);
-
-    dev->cfg_locked = 1;
-
-    memset(dev->pci_regs, 0, 256);
-
-    dev->pci_regs[0x00] = 0x25;
-    dev->pci_regs[0x01] = 0x10; /*ALi*/
-    dev->pci_regs[0x02] = 0x35;
-    dev->pci_regs[0x03] = 0x14; /*M1435*/
-    dev->pci_regs[0x04] = 0x07;
-    dev->pci_regs[0x07] = 0x04;
-    dev->pci_regs[0x0b] = 0x06;
-
-    dev->pci_regs[0x80] = 0x80;
-    dev->pci_regs[0x81] = 0x00;
-
-    pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
-    pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
-}
-
-static void
-ali1435_close(void *p)
-{
-    ali1435_t *dev = (ali1435_t *) p;
-
-    free(dev);
-}
-
-static void *
-ali1435_init(const device_t *info)
-{
-    ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t));
-    memset(dev, 0, sizeof(ali1435_t));
-
-    dev->cfg_locked = 1;
-
-    /* M1435 Ports:
-                22h	Index Port
-                23h	Data Port
-    */
-    io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev);
-
-    pci_add_card(PCI_ADD_NORTHBRIDGE, ali1435_pci_read, ali1435_pci_write, dev);
-
-    ali1435_reset(dev);
-
-    /* pci_set_irq_level(PCI_INTA, 0);
-    pci_set_irq_level(PCI_INTB, 0);
-    pci_set_irq_level(PCI_INTC, 0);
-    pci_set_irq_level(PCI_INTD, 0); */
-
-    return dev;
-}
-
-const device_t ali1435_device = {
-    .name          = "Intel ALi M1435",
-    .internal_name = "ali1435",
-    .flags         = DEVICE_PCI,
-    .local         = 0x00,
-    .init          = ali1435_init,
-    .close         = ali1435_close,
-    .reset         = ali1435_reset,
-    { .available = NULL },
-    .speed_changed = NULL,
-    .force_redraw  = NULL,
-    .config        = NULL
-};
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          Emulation of ALi M1435 chipset that acts as both the
+ *          southbridge.
+ *
+ *
+ *
+ * Authors: Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2020 Miran Grca.
+ */
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include <86box/device.h>
+#include <86box/io.h>
+#include <86box/apm.h>
+#include <86box/dma.h>
+#include <86box/mem.h>
+#include <86box/smram.h>
+#include <86box/pci.h>
+#include <86box/timer.h>
+#include <86box/pic.h>
+#include <86box/pit.h>
+#include <86box/plat_unused.h>
+#include <86box/port_92.h>
+#include <86box/hdc_ide.h>
+#include <86box/hdc.h>
+#include <86box/machine.h>
+#include <86box/chipset.h>
+#include <86box/spd.h>
+
+#define MEM_STATE_SHADOW_R 0x01
+#define MEM_STATE_SHADOW_W 0x02
+#define MEM_STATE_SMRAM    0x04
+
+typedef struct ali_1435_t {
+    uint8_t index;
+    uint8_t cfg_locked;
+    uint8_t regs[16];
+    uint8_t pci_regs[256];
+} ali1435_t;
+
+#define ENABLE_ALI1435_LOG 1
+#ifdef ENABLE_ALI1435_LOG
+int ali1435_do_log = ENABLE_ALI1435_LOG;
+
+static void
+ali1435_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (ali1435_do_log) {
+        va_start(ap, fmt);
+        pclog_ex(fmt, ap);
+        va_end(ap);
+    }
+}
+#else
+#    define ali1435_log(fmt, ...)
+#endif
+
+/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter
+         when the most siginificant bit is set. We work around that by manipulating the
+         emulated PIC's ELCR register. */
+static void
+ali1435_update_irqs(ali1435_t *dev, int set)
+{
+    uint8_t val;
+    int     reg;
+    int     shift;
+    int     irq;
+    int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+    pic_t  *temp_pic;
+
+    for (uint8_t i = 0; i < 4; i++) {
+        reg   = 0x80 + (i >> 1);
+        shift = (i & 1) << 2;
+        val   = (dev->pci_regs[reg] >> shift) & 0x0f;
+        irq   = irq_map[val & 0x07];
+        if (irq == -1)
+            continue;
+        temp_pic = (irq >= 8) ? &pic2 : &pic;
+        irq &= 7;
+        if (set && (val & 0x08))
+            temp_pic->elcr |= (1 << irq);
+        else
+            temp_pic->elcr &= ~(1 << irq);
+    }
+}
+
+static void
+ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+    int        irq;
+    int        irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+
+    ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val);
+
+    if (func > 0)
+        return;
+
+    if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b)))
+        return;
+
+    if ((addr >= 0x0f) && (addr < 0x30))
+        return;
+
+    if ((addr >= 0x34) && (addr < 0x40))
+        return;
+
+    switch (addr) {
+        /* Dummy PCI Config */
+        case 0x04:
+            dev->pci_regs[addr] = (val & 0x7f) | 0x07;
+            break;
+
+        case 0x05:
+            dev->pci_regs[addr] = (val & 0x01);
+            break;
+
+        /* Dummy PCI Status */
+        case 0x07:
+            dev->pci_regs[addr] &= ~(val & 0xb8);
+            break;
+
+        case 0x80:
+        case 0x81:
+            dev->pci_regs[addr] = val;
+            ali1435_update_irqs(dev, 0);
+            irq = irq_map[val & 0x07];
+            if (irq >= 0) {
+                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
+                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
+            } else {
+                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
+                pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
+            }
+            irq = irq_map[(val >> 4) & 0x07];
+            if (irq >= 0) {
+                ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
+                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
+            } else {
+                ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
+                pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
+            }
+            ali1435_update_irqs(dev, 1);
+            break;
+
+        default:
+            dev->pci_regs[addr] = val;
+            break;
+    }
+}
+
+static uint8_t
+ali1435_pci_read(int func, int addr, void *priv)
+{
+    const ali1435_t *dev = (ali1435_t *) priv;
+    uint8_t          ret;
+
+    ret = 0xff;
+
+    if (func == 0)
+        ret = dev->pci_regs[addr];
+
+    ali1435_log("ali1435_read(%02X, %02X) = %02X\n", func, addr, ret);
+
+    return ret;
+}
+
+static void
+ali1435_write(uint16_t addr, uint8_t val, void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+
+    switch (addr) {
+        case 0x22:
+            dev->index = val;
+            break;
+
+        case 0x23:
+#if 0
+#ifdef ENABLE_ALI1435_LOG
+            if (dev->index != 0x03)
+                ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
+#endif
+#endif
+            if (dev->index == 0x03)
+                dev->cfg_locked = (val != 0x69);
+
+            if (!dev->cfg_locked) {
+                pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
+
+                switch (dev->index) {
+                    /* PCI Mechanism select? */
+                    case 0x00:
+                        dev->regs[dev->index] = val;
+                        pclog("PMC = %i\n", val != 0xc8);
+                        pci_set_pmc(val != 0xc8);
+                        break;
+
+                    /* ???? */
+                    case 0x06:
+                        dev->regs[dev->index] = val;
+                        break;
+
+                    /* ???? */
+                    case 0x07:
+                        dev->regs[dev->index] = val;
+                        break;
+
+                    default:
+                        break;
+                }
+            }
+            break;
+        default:
+            break;
+    }
+}
+
+static uint8_t
+ali1435_read(uint16_t addr, void *priv)
+{
+    const ali1435_t *dev = (ali1435_t *) priv;
+    uint8_t          ret = 0xff;
+
+    if ((addr == 0x23) && (dev->index < 0x10))
+        ret = dev->regs[dev->index];
+    else if (addr == 0x22)
+        ret = dev->index;
+
+    return ret;
+}
+
+static void
+ali1435_reset(void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+
+    memset(dev->regs, 0, 16);
+
+    dev->regs[0x00] = 0xff;
+
+    pci_set_pmc(0);
+
+    dev->cfg_locked = 1;
+
+    memset(dev->pci_regs, 0, 256);
+
+    dev->pci_regs[0x00] = 0x25;
+    dev->pci_regs[0x01] = 0x10; /*ALi*/
+    dev->pci_regs[0x02] = 0x35;
+    dev->pci_regs[0x03] = 0x14; /*M1435*/
+    dev->pci_regs[0x04] = 0x07;
+    dev->pci_regs[0x07] = 0x04;
+    dev->pci_regs[0x0b] = 0x06;
+
+    dev->pci_regs[0x80] = 0x80;
+    dev->pci_regs[0x81] = 0x00;
+
+    pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
+    pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
+}
+
+static void
+ali1435_close(void *priv)
+{
+    ali1435_t *dev = (ali1435_t *) priv;
+
+    free(dev);
+}
+
+static void *
+ali1435_init(UNUSED(const device_t *info))
+{
+    ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t));
+    memset(dev, 0, sizeof(ali1435_t));
+
+    dev->cfg_locked = 1;
+
+    /* M1435 Ports:
+                22h Index Port
+                23h Data Port
+    */
+    io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev);
+
+    pci_add_card(PCI_ADD_NORTHBRIDGE, ali1435_pci_read, ali1435_pci_write, dev);
+
+    ali1435_reset(dev);
+
+#if 0
+    pci_set_irq_level(PCI_INTA, 0);
+    pci_set_irq_level(PCI_INTB, 0);
+    pci_set_irq_level(PCI_INTC, 0);
+    pci_set_irq_level(PCI_INTD, 0);
+#endif
+
+    return dev;
+}
+
+const device_t ali1435_device = {
+    .name          = "Intel ALi M1435",
+    .internal_name = "ali1435",
+    .flags         = DEVICE_PCI,
+    .local         = 0x00,
+    .init          = ali1435_init,
+    .close         = ali1435_close,
+    .reset         = ali1435_reset,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/chipset/ali1489.c

@@ -35,6 +35,7 @@
 #include <86box/nmi.h>
 #include <86box/pic.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/smram.h>
 
@@ -61,10 +62,14 @@ ali1489_log(const char *fmt, ...)
 #    define ali1489_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint8_t index, ide_index, ide_chip_id, pci_slot,
-        regs[256], pci_conf[256], ide_regs[256];
+typedef struct ali1489_t {
+    uint8_t index;
+    uint8_t ide_index;
+    uint8_t ide_chip_id;
+    uint8_t pci_slot;
+    uint8_t regs[256];
+    uint8_t pci_conf[256];
+    uint8_t ide_regs[256];
 
     port_92_t *port_92;
     smram_t   *smram;
@@ -75,11 +80,9 @@ static void ali1489_ide_handler(ali1489_t *dev);
 static void
 ali1489_shadow_recalc(ali1489_t *dev)
 {
-    uint32_t i;
-
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         if (dev->regs[0x13] & (1 << i)) {
             ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
                         0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
@@ -90,7 +93,7 @@ ali1489_shadow_recalc(ali1489_t *dev)
         }
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         if (dev->regs[0x14] & (1 << i)) {
             ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
                         0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
@@ -126,6 +129,8 @@ ali1489_smram_recalc(ali1489_t *dev)
             else
                 smram_enable(dev->smram, 0x38000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1);
             break;
+        default:
+            break;
     }
 
     if ((dev->regs[0x19] & 0x31) == 0x11) {
@@ -206,8 +211,9 @@ static void
 ali1489_write(uint16_t addr, uint8_t val, void *priv)
 {
     ali1489_t    *dev = (ali1489_t *) priv;
-    uint8_t       old, irq;
-    const uint8_t irq_array[16] = { 0, 3, 4, 7, 0, 0, 0, 0, 9, 10, 5, 6, 11, 12, 14, 15 };
+    uint8_t       old;
+    uint8_t       irq;
+    const uint8_t irq_array[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15 };
 
     switch (addr) {
         case 0x22:
@@ -319,6 +325,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
                                 case 0x30:
                                     picint(1 << 10);
                                     break;
+                                default:
+                                    break;
                             }
                             dev->regs[0x35] |= 0x0e;
                         } else if (!(val & 0x10))
@@ -380,6 +388,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
                         /* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */
                         dev->regs[dev->index] = val;
                         break;
+                    default:
+                        break;
                 }
 
                 if (dev->index != 0x03) {
@@ -389,14 +399,17 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
                 dev->regs[dev->index] = val;
 
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 ali1489_read(uint16_t addr, void *priv)
 {
-    uint8_t    ret = 0xff;
-    ali1489_t *dev = (ali1489_t *) priv;
+    uint8_t          ret = 0xff;
+    const ali1489_t *dev = (ali1489_t *) priv;
 
     switch (addr) {
         case 0x23:
@@ -408,6 +421,8 @@ ali1489_read(uint16_t addr, void *priv)
             else
                 ret = dev->regs[dev->index];
             break;
+        default:
+            break;
     }
 
     ali1489_log("M1489: dev->regs[%02x] (%02x)\n", dev->index, ret);
@@ -416,7 +431,7 @@ ali1489_read(uint16_t addr, void *priv)
 }
 
 static void
-ali1489_pci_write(int func, int addr, uint8_t val, void *priv)
+ali1489_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     ali1489_t *dev = (ali1489_t *) priv;
 
@@ -432,14 +447,17 @@ ali1489_pci_write(int func, int addr, uint8_t val, void *priv)
         case 0x07:
             dev->pci_conf[0x07] &= ~(val & 0xb8);
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-ali1489_pci_read(int func, int addr, void *priv)
+ali1489_pci_read(UNUSED(int func), int addr, void *priv)
 {
-    ali1489_t *dev = (ali1489_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1489_t *dev = (ali1489_t *) priv;
+    uint8_t          ret = 0xff;
 
     ret = dev->pci_conf[addr];
     ali1489_log("M1489-PCI: dev->pci_conf[%02x] (%02x)\n", addr, ret);
@@ -528,16 +546,22 @@ ali1489_ide_write(uint16_t addr, uint8_t val, void *priv)
                     dev->ide_regs[dev->ide_index] = val;
                     ali1489_ide_handler(dev);
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 ali1489_ide_read(uint16_t addr, void *priv)
 {
-    ali1489_t *dev = (ali1489_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1489_t *dev = (ali1489_t *) priv;
+    uint8_t          ret = 0xff;
 
     switch (addr) {
         case 0xf4:
@@ -547,6 +571,9 @@ ali1489_ide_read(uint16_t addr, void *priv)
             ret = dev->ide_regs[dev->ide_index];
             ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret);
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -575,7 +602,7 @@ ali1489_close(void *priv)
 }
 
 static void *
-ali1489_init(const device_t *info)
+ali1489_init(UNUSED(const device_t *info))
 {
     ali1489_t *dev = (ali1489_t *) malloc(sizeof(ali1489_t));
     memset(dev, 0, sizeof(ali1489_t));

src/chipset/ali1531.c

@@ -28,6 +28,7 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/smram.h>
 #include <86box/spd.h>
 
@@ -82,6 +83,9 @@ ali1531_smram_recalc(uint8_t val, ali1531_t *dev)
                 if (val & 0x10)
                     mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02);
                 break;
+
+            default:
+                break;
         }
     }
 
@@ -89,14 +93,17 @@ ali1531_smram_recalc(uint8_t val, ali1531_t *dev)
 }
 
 static void
-ali1531_shadow_recalc(int cur_reg, ali1531_t *dev)
+ali1531_shadow_recalc(UNUSED(int cur_reg), ali1531_t *dev)
 {
-    int      i, bit, r_reg, w_reg;
-    uint32_t base, flags = 0;
+    int      bit;
+    int      r_reg;
+    int      w_reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         base  = 0x000c0000 + (i << 14);
         bit   = i & 7;
         r_reg = 0x4c + (i >> 3);
@@ -121,7 +128,7 @@ ali1531_shadow_recalc(int cur_reg, ali1531_t *dev)
 }
 
 static void
-ali1531_write(int func, int addr, uint8_t val, void *priv)
+ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     ali1531_t *dev = (ali1531_t *) priv;
 
@@ -225,8 +232,10 @@ ali1531_write(int func, int addr, uint8_t val, void *priv)
         case 0x57: /* H2PO */
             dev->pci_conf[addr] = val & 0x60;
             /* Find where the Shut-down Special cycle is initiated. */
-            // if (!(val & 0x20))
-            // outb(0x92, 0x01);
+#if 0
+            if (!(val & 0x20))
+                outb(0x92, 0x01);
+#endif
             break;
 
         case 0x58:
@@ -285,14 +294,17 @@ ali1531_write(int func, int addr, uint8_t val, void *priv)
         case 0x83:
             dev->pci_conf[addr] = val & 0x10;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-ali1531_read(int func, int addr, void *priv)
+ali1531_read(UNUSED(int func), int addr, void *priv)
 {
-    ali1531_t *dev = (ali1531_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1531_t *dev = (ali1531_t *) priv;
+    uint8_t          ret = 0xff;
 
     ret = dev->pci_conf[addr];
 
@@ -303,7 +315,6 @@ static void
 ali1531_reset(void *priv)
 {
     ali1531_t *dev = (ali1531_t *) priv;
-    int        i;
 
     /* Default Registers */
     dev->pci_conf[0x00] = 0xb9;
@@ -339,10 +350,10 @@ ali1531_reset(void *priv)
     ali1531_write(0, 0x47, 0x00, dev);
     ali1531_write(0, 0x48, 0x00, dev);
 
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         ali1531_write(0, 0x4c + i, 0x00, dev);
 
-    for (i = 0; i < 16; i += 2) {
+    for (uint8_t i = 0; i < 16; i += 2) {
         ali1531_write(0, 0x60 + i, 0x08, dev);
         ali1531_write(0, 0x61 + i, 0x40, dev);
     }
@@ -358,7 +369,7 @@ ali1531_close(void *priv)
 }
 
 static void *
-ali1531_init(const device_t *info)
+ali1531_init(UNUSED(const device_t *info))
 {
     ali1531_t *dev = (ali1531_t *) malloc(sizeof(ali1531_t));
     memset(dev, 0, sizeof(ali1531_t));

src/chipset/ali1541.c

@@ -28,6 +28,7 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/smram.h>
 #include <86box/spd.h>
 
@@ -83,6 +84,8 @@ ali1541_smram_recalc(uint8_t val, ali1541_t *dev)
                 if (val & 0x10)
                     mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02);
                 break;
+            default:
+                break;
         }
     }
 
@@ -90,14 +93,17 @@ ali1541_smram_recalc(uint8_t val, ali1541_t *dev)
 }
 
 static void
-ali1541_shadow_recalc(int cur_reg, ali1541_t *dev)
+ali1541_shadow_recalc(UNUSED(int cur_reg), ali1541_t *dev)
 {
-    int      i, bit, r_reg, w_reg;
-    uint32_t base, flags = 0;
+    int      bit;
+    int      r_reg;
+    int      w_reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         base  = 0x000c0000 + (i << 14);
         bit   = i & 7;
         r_reg = 0x56 + (i >> 3);
@@ -124,11 +130,12 @@ ali1541_shadow_recalc(int cur_reg, ali1541_t *dev)
 static void
 ali1541_mask_bar(ali1541_t *dev)
 {
-    uint32_t bar, mask;
+    uint32_t bar;
+    uint32_t mask;
 
     switch (dev->pci_conf[0xbc] & 0x0f) {
-        case 0x00:
         default:
+        case 0x00:
             mask = 0x00000000;
             break;
         case 0x01:
@@ -166,7 +173,7 @@ ali1541_mask_bar(ali1541_t *dev)
 }
 
 static void
-ali1541_write(int func, int addr, uint8_t val, void *priv)
+ali1541_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     ali1541_t *dev = (ali1541_t *) priv;
 
@@ -363,8 +370,10 @@ ali1541_write(int func, int addr, uint8_t val, void *priv)
         case 0x87: /* H2PO */
             dev->pci_conf[addr] = val;
             /* Find where the Shut-down Special cycle is initiated. */
-            // if (!(val & 0x20))
-            // outb(0x92, 0x01);
+#if 0
+            if (!(val & 0x20))
+                outb(0x92, 0x01);
+#endif
             break;
 
         case 0x88:
@@ -542,14 +551,17 @@ ali1541_write(int func, int addr, uint8_t val, void *priv)
         case 0xf7:
             dev->pci_conf[addr] = val & 0x43;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-ali1541_read(int func, int addr, void *priv)
+ali1541_read(UNUSED(int func), int addr, void *priv)
 {
-    ali1541_t *dev = (ali1541_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1541_t *dev = (ali1541_t *) priv;
+    uint8_t          ret = 0xff;
 
     ret = dev->pci_conf[addr];
 
@@ -560,7 +572,6 @@ static void
 ali1541_reset(void *priv)
 {
     ali1541_t *dev = (ali1541_t *) priv;
-    int        i;
 
     /* Default Registers */
     dev->pci_conf[0x00] = 0xb9;
@@ -603,12 +614,13 @@ ali1541_reset(void *priv)
     ali1541_write(0, 0x54, 0x00, dev);
     ali1541_write(0, 0x55, 0x00, dev);
 
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         ali1541_write(0, 0x56 + i, 0x00, dev);
 
-    ali1541_write(0, 0x60 + i, 0x07, dev);
-    ali1541_write(0, 0x61 + i, 0x40, dev);
-    for (i = 0; i < 14; i += 2) {
+    ali1541_write(0, 0x60, 0x07, dev);
+    ali1541_write(0, 0x61, 0x40, dev);
+
+    for (uint8_t i = 0; i < 14; i += 2) {
         ali1541_write(0, 0x62 + i, 0x00, dev);
         ali1541_write(0, 0x63 + i, 0x00, dev);
     }
@@ -624,7 +636,7 @@ ali1541_close(void *priv)
 }
 
 static void *
-ali1541_init(const device_t *info)
+ali1541_init(UNUSED(const device_t *info))
 {
     ali1541_t *dev = (ali1541_t *) malloc(sizeof(ali1541_t));
     memset(dev, 0, sizeof(ali1541_t));

src/chipset/ali1543.c

@@ -36,6 +36,7 @@
 #include <86box/nvr.h>
 #include <86box/pci.h>
 #include <86box/pic.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/sio.h>
 #include <86box/smbus.h>
@@ -46,10 +47,19 @@
 #include <86box/chipset.h>
 
 typedef struct ali1543_t {
-    uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256],
-        pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable,
-        pmu_dev_enable, type;
-    int offset;
+    uint8_t pci_conf[256];
+    uint8_t pmu_conf[256];
+    uint8_t usb_conf[256];
+    uint8_t ide_conf[256];
+    uint8_t pci_slot;
+    uint8_t ide_slot;
+    uint8_t usb_slot;
+    uint8_t pmu_slot;
+    uint8_t usb_dev_enable;
+    uint8_t ide_dev_enable;
+    uint8_t pmu_dev_enable;
+    uint8_t type;
+    int     offset;
 
     apm_t           *apm;
     acpi_t          *acpi;
@@ -59,6 +69,7 @@ typedef struct ali1543_t {
     sff8038i_t      *ide_controller[2];
     smbus_ali7101_t *smbus;
     usb_t           *usb;
+    usb_params_t     usb_params;
 
 } ali1543_t;
 
@@ -94,7 +105,7 @@ ali1543_log(const char *fmt, ...)
 #endif
 
 static void
-ali1533_ddma_handler(ali1543_t *dev)
+ali1533_ddma_handler(UNUSED(ali1543_t *dev))
 {
     /* TODO: Find any documentation that actually explains the ALi southbridge DDMA mapping. */
 }
@@ -111,7 +122,6 @@ static void
 ali1533_write(int func, int addr, uint8_t val, void *priv)
 {
     ali1543_t *dev = (ali1543_t *) priv;
-    int        irq;
     ali1543_log("M1533: dev->pci_conf[%02x] = %02x\n", addr, val);
 
     if (func > 0)
@@ -151,10 +161,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
             break;
 
         case 0x41:
-            /* TODO: Bit 7 selects keyboard controller type:
-                     0 = AT, 1 = PS/2 */
-            keyboard_at_set_mouse_scan((val & 0x40) ? 1 : 0);
-            dev->pci_conf[addr] = val & 0xbf;
+            dev->pci_conf[addr] = val;
             break;
 
         case 0x42: /* ISA Bus Speed */
@@ -171,6 +178,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 case 6:
                     cpu_set_isa_pci_div((val & 7) + 1);
                     break;
+                default:
+                    break;
             }
             break;
 
@@ -221,7 +230,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
         case 0x4c: /* PCI INT to ISA Level to Edge transfer */
             dev->pci_conf[addr] = val;
 
-            for (irq = 1; irq < 9; irq++)
+            for (uint8_t irq = 1; irq < 9; irq++)
                 pci_set_irq_level(irq, !(val & (1 << (irq - 1))));
             break;
 
@@ -230,8 +239,10 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 dev->pci_conf[addr] = val;
 
                 ali1543_log("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]);
-                // pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]);
-                // pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]);
+#if 0
+                pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]);
+                pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]);
+#endif
             }
             break;
 
@@ -296,6 +307,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 case 0x30:
                     dev->ide_slot = 0x0d; /* A24 = slot 13 */
                     break;
+                default:
+                    break;
             }
             pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset);
             ali1543_log("IDE slot = %02X (A%0i)\n", ((int) dev->ide_slot) + dev->offset, dev->ide_slot + 11);
@@ -367,6 +380,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 case 0x0c:
                     dev->pmu_slot = 0x04; /* A15 = slot 04 */
                     break;
+                default:
+                    break;
             }
             pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset);
             ali1543_log("PMU slot = %02X (A%0i)\n", ((int) dev->pmu_slot) + dev->offset, dev->pmu_slot + 11);
@@ -383,6 +398,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 case 0x03:
                     dev->usb_slot = 0x01; /* A12 = slot 01 */
                     break;
+                default:
+                    break;
             }
             pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset);
             ali1543_log("USB slot = %02X (A%0i)\n", ((int) dev->usb_slot) + dev->offset, dev->usb_slot + 11);
@@ -440,6 +457,9 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
                 dev->pmu_dev_enable = 0;
             }
             break;
+
+        default:
+            break;
     }
 }
 
@@ -454,9 +474,7 @@ ali1533_read(int func, int addr, void *priv)
             ret = 0x00;
         else {
             ret = dev->pci_conf[addr];
-            if (addr == 0x41)
-                ret |= (keyboard_at_get_mouse_scan() << 2);
-            else if (addr == 0x58)
+            if (addr == 0x58)
                 ret = (ret & 0xbf) | (dev->ide_dev_enable ? 0x40 : 0x00);
             else if ((dev->type == 1) && ((addr >= 0x7c) && (addr <= 0xff)) && !dev->pmu_dev_enable) {
                 dev->pmu_dev_enable = 1;
@@ -472,7 +490,8 @@ ali1533_read(int func, int addr, void *priv)
 static void
 ali5229_ide_irq_handler(ali1543_t *dev)
 {
-    int ctl = 0, ch = 0;
+    int ctl = 0;
+    int ch = 0;
     int bit = 0;
 
     if (dev->ide_conf[0x52] & 0x10) {
@@ -513,6 +532,9 @@ ali5229_ide_irq_handler(ali1543_t *dev)
                 sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
                 sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2);
                 break;
+
+            default:
+                break;
         }
     }
 
@@ -550,6 +572,9 @@ ali5229_ide_irq_handler(ali1543_t *dev)
                 sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
                 sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2);
                 break;
+
+            default:
+                break;
         }
     }
 }
@@ -559,17 +584,20 @@ ali5229_ide_handler(ali1543_t *dev)
 {
     uint32_t ch = 0;
 
-    uint16_t native_base_pri_addr = ((dev->ide_conf[0x11] | dev->ide_conf[0x10] << 8)) & 0xfffe;
-    uint16_t native_side_pri_addr = ((dev->ide_conf[0x15] | dev->ide_conf[0x14] << 8)) & 0xfffe;
-    uint16_t native_base_sec_addr = ((dev->ide_conf[0x19] | dev->ide_conf[0x18] << 8)) & 0xfffe;
-    uint16_t native_side_sec_addr = ((dev->ide_conf[0x1c] | dev->ide_conf[0x1b] << 8)) & 0xfffe;
+    uint16_t native_base_pri_addr = (dev->ide_conf[0x11] | dev->ide_conf[0x10] << 8) & 0xfffe;
+    uint16_t native_side_pri_addr = (dev->ide_conf[0x15] | dev->ide_conf[0x14] << 8) & 0xfffe;
+    uint16_t native_base_sec_addr = (dev->ide_conf[0x19] | dev->ide_conf[0x18] << 8) & 0xfffe;
+    uint16_t native_side_sec_addr = (dev->ide_conf[0x1c] | dev->ide_conf[0x1b] << 8) & 0xfffe;
 
     uint16_t comp_base_pri_addr = 0x01f0;
     uint16_t comp_side_pri_addr = 0x03f6;
     uint16_t comp_base_sec_addr = 0x0170;
     uint16_t comp_side_sec_addr = 0x0376;
 
-    uint16_t current_pri_base, current_pri_side, current_sec_base, current_sec_side;
+    uint16_t current_pri_base;
+    uint16_t current_pri_side;
+    uint16_t current_sec_base;
+    uint16_t current_sec_side;
 
     /* Primary Channel Programming */
     if (dev->ide_conf[0x52] & 0x10) {
@@ -622,7 +650,7 @@ ali5229_ide_handler(ali1543_t *dev)
             ali1543_log("ali5229_ide_handler(): Enabling secondary IDE...\n");
             ide_sec_enable();
 
-            sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, (((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8))) + (8 ^ ch));
+            sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + (8 ^ ch));
             ali1543_log("M5229 SEC: BASE %04x SIDE %04x\n", current_sec_base, current_sec_side);
         }
     } else {
@@ -858,13 +886,16 @@ ali5229_write(int func, int addr, uint8_t val, void *priv)
         case 0x5f:
             dev->ide_conf[addr] = val & 0x7f;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 ali5229_read(int func, int addr, void *priv)
 {
-    ali1543_t *dev = (ali1543_t *) priv;
+    const ali1543_t *dev = (ali1543_t *) priv;
     uint8_t    ret = 0xff;
 
     if (dev->ide_dev_enable && (func == 0)) {
@@ -910,7 +941,12 @@ ali5237_write(int func, int addr, uint8_t val, void *priv)
 
         case 0x0c: /* Cache Line Size */
         case 0x0d: /* Latency Timer */
+            dev->usb_conf[addr] = val;
+            break;
+
         case 0x3c: /* Interrupt Line Register */
+            dev->usb_conf[addr] = val;
+            break;
 
         case 0x42: /* Test Mode Register */
             dev->usb_conf[addr] = val & 0x10;
@@ -938,13 +974,16 @@ ali5237_write(int func, int addr, uint8_t val, void *priv)
             if (!(dev->usb_conf[0x42] & 0x10))
                 dev->usb_conf[addr] = val;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 ali5237_read(int func, int addr, void *priv)
 {
-    ali1543_t *dev = (ali1543_t *) priv;
+    const ali1543_t *dev = (ali1543_t *) priv;
     uint8_t    ret = 0xff;
 
     if (dev->usb_dev_enable && (func == 0))
@@ -1422,6 +1461,9 @@ ali7101_read(int func, int addr, void *priv)
                 case 0x74:
                     dev->pmu_conf[addr] &= 0xcc;
                     break;
+
+                default:
+                    break;
             }
         }
     }
@@ -1429,6 +1471,17 @@ ali7101_read(int func, int addr, void *priv)
     return ret;
 }
 
+static void
+ali5237_usb_update_interrupt(usb_t* usb, void *priv)
+{
+    const ali1543_t *dev = (ali1543_t *) priv;
+
+    if (usb->irq_level)
+        pci_set_mirq(4, !!(dev->pci_conf[0x74] & 0x10));
+    else
+        pci_clear_mirq(4, !!(dev->pci_conf[0x74] & 0x10));
+}
+
 static void
 ali1543_reset(void *priv)
 {
@@ -1510,7 +1563,8 @@ ali1543_reset(void *priv)
     dev->pci_conf[0x0a] = 0x01;
     dev->pci_conf[0x0b] = 0x06;
 
-    ali1533_write(0, 0x48, 0x00, dev); // Disables all IRQ's
+    ali1533_write(0, 0x41, 0x00, dev);    /* Disables the keyboard and mouse IRQ latch. */
+    ali1533_write(0, 0x48, 0x00, dev);    /* Disables all IRQ's. */
     ali1533_write(0, 0x44, 0x00, dev);
     ali1533_write(0, 0x4d, 0x00, dev);
     ali1533_write(0, 0x53, 0x00, dev);
@@ -1520,6 +1574,8 @@ ali1543_reset(void *priv)
     ali1533_write(0, 0x74, 0x00, dev);
     ali1533_write(0, 0x75, 0x00, dev);
     ali1533_write(0, 0x76, 0x00, dev);
+    if (dev->type == 1)
+        ali1533_write(0, 0x78, 0x00, dev);
 
     unmask_a20_in_smm = 1;
 }
@@ -1576,7 +1632,10 @@ ali1543_init(const device_t *info)
     dev->smbus = device_add(&ali7101_smbus_device);
 
     /* USB */
-    dev->usb = device_add(&usb_device);
+    dev->usb_params.parent_priv      = dev;
+    dev->usb_params.smi_handle       = NULL;
+    dev->usb_params.update_interrupt = ali5237_usb_update_interrupt;
+    dev->usb                         = device_add_parameters(&usb_device, &dev->usb_params);
 
     dev->type   = info->local & 0xff;
     dev->offset = (info->local >> 8) & 0x7f;

src/chipset/ali1621.c

@@ -28,6 +28,8 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/plat_fallthrough.h>
+#include <86box/plat_unused.h>
 #include <86box/smram.h>
 #include <86box/spd.h>
 
@@ -94,7 +96,8 @@ ali1621_log(const char *fmt, ...)
 static void
 ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
 {
-    uint16_t access_smm = 0x0000, access_normal = 0x0000;
+    uint16_t access_smm    = 0x0000;
+    uint16_t access_normal = 0x0000;
 
     smram_disable_all();
 
@@ -106,10 +109,14 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
             switch (val & 0x30) {
                 case 0x10: /* Open. */
                     access_normal = ACCESS_SMRAM_RX;
-                    /* FALLTHROUGH */
+#ifdef FALLTHROUGH_ANNOTATION
+                    [[fallthrough]];
+#endif
                 case 0x30: /* Protect. */
                     access_smm |= ACCESS_SMRAM_R;
                     break;
+                default:
+                    break;
             }
         }
 
@@ -117,10 +124,14 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
             switch (val & 0x30) {
                 case 0x10: /* Open. */
                     access_normal |= ACCESS_SMRAM_W;
-                    /* FALLTHROUGH */
+#ifdef FALLTHROUGH_ANNOTATION
+                    [[fallthrough]];
+#endif
                 case 0x30: /* Protect. */
                     access_smm |= ACCESS_SMRAM_W;
                     break;
+                default:
+                    break;
             }
 
         smram_enable(dev->smram[0], 0xa0000, 0xa0000, 0x20000, ((val & 0x30) == 0x10), (val & 0x30));
@@ -136,15 +147,18 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
 }
 
 static void
-ali1621_shadow_recalc(int cur_reg, ali1621_t *dev)
+ali1621_shadow_recalc(UNUSED(int cur_reg), ali1621_t *dev)
 {
-    int      i, r_bit, w_bit, reg;
-    uint32_t base, flags = 0;
+    int      r_bit;
+    int      w_bit;
+    int      reg;
+    uint32_t base;
+    uint32_t flags = 0;
 
     shadowbios = shadowbios_write = 0;
 
     /* C0000-EFFFF */
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base  = 0x000c0000 + (i << 14);
         r_bit = (i << 1) + 4;
         reg   = 0x84;
@@ -199,11 +213,12 @@ ali1621_shadow_recalc(int cur_reg, ali1621_t *dev)
 static void
 ali1621_mask_bar(ali1621_t *dev)
 {
-    uint32_t bar, mask;
+    uint32_t bar;
+    uint32_t mask;
 
     switch (dev->pci_conf[0xbc] & 0x0f) {
-        case 0x00:
         default:
+        case 0x00:
             mask = 0x00000000;
             break;
         case 0x01:
@@ -241,7 +256,7 @@ ali1621_mask_bar(ali1621_t *dev)
 }
 
 static void
-ali1621_write(int func, int addr, uint8_t val, void *priv)
+ali1621_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     ali1621_t *dev = (ali1621_t *) priv;
 
@@ -560,14 +575,17 @@ ali1621_write(int func, int addr, uint8_t val, void *priv)
         case 0xf0 ... 0xff:
             dev->pci_conf[addr] = val;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-ali1621_read(int func, int addr, void *priv)
+ali1621_read(UNUSED(int func), int addr, void *priv)
 {
-    ali1621_t *dev = (ali1621_t *) priv;
-    uint8_t    ret = 0xff;
+    const ali1621_t *dev = (ali1621_t *) priv;
+    uint8_t          ret = 0xff;
 
     ret = dev->pci_conf[addr];
 
@@ -578,7 +596,6 @@ static void
 ali1621_reset(void *priv)
 {
     ali1621_t *dev = (ali1621_t *) priv;
-    int        i;
 
     /* Default Registers */
     dev->pci_conf[0x00] = 0xb9;
@@ -633,7 +650,7 @@ ali1621_reset(void *priv)
 
     ali1621_write(0, 0x83, 0x08, dev);
 
-    for (i = 0; i < 4; i++)
+    for (uint8_t i = 0; i < 4; i++)
         ali1621_write(0, 0x84 + i, 0x00, dev);
 }
 
@@ -649,7 +666,7 @@ ali1621_close(void *priv)
 }
 
 static void *
-ali1621_init(const device_t *info)
+ali1621_init(UNUSED(const device_t *info))
 {
     ali1621_t *dev = (ali1621_t *) malloc(sizeof(ali1621_t));
     memset(dev, 0, sizeof(ali1621_t));

src/chipset/ali6117.c

@@ -30,16 +30,17 @@
 #include <86box/pit.h>
 #include <86box/device.h>
 #include <86box/port_92.h>
-#include <86box/usb.h>
 #include <86box/hdc.h>
 #include <86box/hdc_ide.h>
 #include <86box/chipset.h>
+#include <86box/plat_fallthrough.h>
 
 typedef struct ali6117_t {
     uint32_t local;
 
     /* Main registers (port 22h/23h) */
-    uint8_t unlocked, mode;
+    uint8_t unlocked;
+    uint8_t mode;
     uint8_t reg_offset;
     uint8_t regs[256];
 } ali6117_t;
@@ -103,8 +104,8 @@ ali6117_log(const char *fmt, ...)
 static void
 ali6117_recalcmapping(ali6117_t *dev)
 {
-    uint8_t  reg, bitpair;
-    uint32_t base, size;
+    uint32_t base;
+    uint32_t size;
     int      state;
 
     shadowbios       = 0;
@@ -113,8 +114,8 @@ ali6117_recalcmapping(ali6117_t *dev)
     ali6117_log("ALI6117: Shadowing for A0000-BFFFF (reg 12 bit 1) = %s\n", (dev->regs[0x12] & 0x02) ? "on" : "off");
     mem_set_mem_state(0xa0000, 0x20000, (dev->regs[0x12] & 0x02) ? (MEM_WRITE_INTERNAL | MEM_READ_INTERNAL) : (MEM_WRITE_EXTANY | MEM_READ_EXTANY));
 
-    for (reg = 0; reg <= 1; reg++) {
-        for (bitpair = 0; bitpair <= 3; bitpair++) {
+    for (uint8_t reg = 0; reg <= 1; reg++) {
+        for (uint8_t bitpair = 0; bitpair <= 3; bitpair++) {
             size = 0x8000;
             base = 0xc0000 + (size * ((reg * 4) + bitpair));
             ali6117_log("ALI6117: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x14 + reg, bitpair, 1 << ((bitpair * 2) + 1), 1 << (bitpair * 2));
@@ -149,10 +150,10 @@ ali6117_recalcmapping(ali6117_t *dev)
 static void
 ali6117_bank_recalc(ali6117_t *dev)
 {
-    int      i;
-    uint32_t bank, addr;
+    uint32_t bank;
+    uint32_t addr;
 
-    for (i = 0x00000000; i < (mem_size << 10); i += 4096) {
+    for (uint32_t i = 0x00000000; i < (mem_size << 10); i += 4096) {
         if ((i >= 0x000a0000) && (i < 0x00100000))
             continue;
 
@@ -233,7 +234,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
 
                 case 0x12:
                     val &= 0xf7;
-                    /* FALL-THROUGH */
+#ifdef FALLTHROUGH_ANNOTATION
+                    [[fallthrough]];
+#endif
 
                 case 0x14:
                 case 0x15:
@@ -278,6 +281,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
                         case 0x7:
                             cpu_set_isa_speed(cpu_busspeed / 6);
                             break;
+
+                        default:
+                            break;
                     }
                     break;
 
@@ -373,6 +379,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x71:
                     val &= 0x1f;
                     break;
+
+                default:
+                    break;
             }
 
         dev->regs[dev->reg_offset] = val;
@@ -382,7 +391,7 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 ali6117_reg_read(uint16_t addr, void *priv)
 {
-    ali6117_t *dev = (ali6117_t *) priv;
+    const ali6117_t *dev = (ali6117_t *) priv;
     uint8_t    ret;
 
     if (addr == 0x22)
@@ -455,7 +464,7 @@ ali6117_close(void *priv)
 static void *
 ali6117_init(const device_t *info)
 {
-    int i, last_match = 0;
+    int last_match = 0;
 
     ali6117_log("ALI6117: init()\n");
 
@@ -468,7 +477,7 @@ ali6117_init(const device_t *info)
 
     ali6117_setup(dev);
 
-    for (i = 31; i >= 0; i--) {
+    for (int8_t i = 31; i >= 0; i--) {
         if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) {
             last_match = ali6117_modes[i][0];
             dev->mode  = i;

src/chipset/contaq_82c59x.c

@@ -48,16 +48,17 @@ contaq_82c59x_log(const char *fmt, ...)
 #    define contaq_82c59x_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint32_t phys, virt;
+typedef struct mem_remapping_t {
+    uint32_t phys;
+    uint32_t virt;
 } mem_remapping_t;
 
-typedef struct
-{
-    uint8_t index, green,
-        smi_status_set,
-        regs[256], smi_status[2];
+typedef struct contaq_82c59x_t {
+    uint8_t index;
+    uint8_t green;
+    uint8_t smi_status_set;
+    uint8_t regs[256];
+    uint8_t smi_status[2];
 
     smram_t *smram[2];
 } contaq_82c59x_t;
@@ -82,6 +83,8 @@ contaq_82c59x_isa_speed_recalc(contaq_82c59x_t *dev)
             case 0x03:
                 cpu_set_isa_speed(cpu_busspeed / 5);
                 break;
+            default:
+                break;
         }
     }
 }
@@ -89,7 +92,8 @@ contaq_82c59x_isa_speed_recalc(contaq_82c59x_t *dev)
 static void
 contaq_82c59x_shadow_recalc(contaq_82c59x_t *dev)
 {
-    uint32_t i, base;
+    uint32_t i;
+    uint32_t base;
     uint8_t  bit;
 
     shadowbios = shadowbios_write = 0;
@@ -273,8 +277,14 @@ contaq_82c59x_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x7c:
                     dev->regs[dev->index] = val;
                     break;
+
+                default:
+                    break;
             }
             break;
+        
+        default:
+            break;
     }
 }
 

src/chipset/cs4031.c

@@ -27,13 +27,13 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t index,
-        regs[256];
+typedef struct cs4031_t {
+    uint8_t    index;
+    uint8_t    regs[256];
     port_92_t *port_92;
 } cs4031_t;
 
@@ -134,15 +134,21 @@ cs4031_write(uint16_t addr, uint8_t val, void *priv)
                     dev->regs[dev->index] = val & 0xb3;
                     port_92_set_features(dev->port_92, val & 0x10, val & 0x20);
                     break;
+
+                default:
+                    break;
             }
             break;
+
+            default:
+                break;
     }
 }
 
 static uint8_t
 cs4031_read(uint16_t addr, void *priv)
 {
-    cs4031_t *dev = (cs4031_t *) priv;
+    const cs4031_t *dev = (cs4031_t *) priv;
 
     return (addr == 0x23) ? dev->regs[dev->index] : 0xff;
 }
@@ -156,7 +162,7 @@ cs4031_close(void *priv)
 }
 
 static void *
-cs4031_init(const device_t *info)
+cs4031_init(UNUSED(const device_t *info))
 {
     cs4031_t *dev = (cs4031_t *) malloc(sizeof(cs4031_t));
     memset(dev, 0, sizeof(cs4031_t));

src/chipset/cs8230.c

@@ -25,12 +25,12 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/fdd.h>
 #include <86box/fdc.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
+typedef struct cs8230_t {
     int     idx;
     uint8_t regs[256];
 } cs8230_t;
@@ -51,6 +51,8 @@ shadow_control(uint32_t addr, uint32_t size, int state)
         case 0x11:
             mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
             break;
+        default:
+            break;
     }
 
     flushmmucache_nopc();
@@ -59,9 +61,7 @@ shadow_control(uint32_t addr, uint32_t size, int state)
 static void
 rethink_shadow_mappings(cs8230_t *cs8230)
 {
-    int c;
-
-    for (c = 0; c < 32; c++) {
+    for (uint8_t c = 0; c < 32; c++) {
         /* Addresses 40000-bffff in 16k blocks */
         if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7)))
             mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */
@@ -69,7 +69,7 @@ rethink_shadow_mappings(cs8230_t *cs8230)
             mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */
     }
 
-    for (c = 0; c < 16; c++) {
+    for (uint8_t c = 0; c < 16; c++) {
         /* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */
         if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7)))
             mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */
@@ -79,10 +79,10 @@ rethink_shadow_mappings(cs8230_t *cs8230)
 }
 
 static uint8_t
-cs8230_read(uint16_t port, void *p)
+cs8230_read(uint16_t port, void *priv)
 {
-    cs8230_t *cs8230 = (cs8230_t *) p;
-    uint8_t   ret    = 0xff;
+    const cs8230_t *cs8230 = (cs8230_t *) priv;
+    uint8_t         ret    = 0xff;
 
     if (port & 1) {
         switch (cs8230->idx) {
@@ -112,6 +112,9 @@ cs8230_read(uint16_t port, void *p)
             case 0x2a:
                 ret = cs8230->regs[cs8230->idx];
                 break;
+
+            default:
+                break;
         }
     }
 
@@ -119,9 +122,9 @@ cs8230_read(uint16_t port, void *p)
 }
 
 static void
-cs8230_write(uint16_t port, uint8_t val, void *p)
+cs8230_write(uint16_t port, uint8_t val, void *priv)
 {
-    cs8230_t *cs8230 = (cs8230_t *) p;
+    cs8230_t *cs8230 = (cs8230_t *) priv;
 
     if (!(port & 1))
         cs8230->idx = val;
@@ -137,6 +140,8 @@ cs8230_write(uint16_t port, uint8_t val, void *p)
             case 0x0f: /* Address maps */
                 rethink_shadow_mappings(cs8230);
                 break;
+            default:
+                break;
         }
     }
 }
@@ -149,9 +154,8 @@ cs8230_close(void *priv)
     free(cs8230);
 }
 
-static void
-    *
-    cs8230_init(const device_t *info)
+static void *
+cs8230_init(UNUSED(const device_t *info))
 {
     cs8230_t *cs8230 = (cs8230_t *) malloc(sizeof(cs8230_t));
     memset(cs8230, 0, sizeof(cs8230_t));

src/chipset/et6000.c

@@ -28,14 +28,15 @@
 #include <86box/device.h>
 #include <86box/mem.h>
 #include <86box/pit.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
 #define INDEX (dev->index - 0x10)
 
-typedef struct
-{
-    uint8_t index, regs[6];
+typedef struct et6000_t {
+    uint8_t index;
+    uint8_t regs[256];
 } et6000_t;
 
 #ifdef ENABLE_ET6000_LOG
@@ -105,16 +106,22 @@ et6000_write(uint16_t addr, uint8_t val, void *priv)
                     et6000_shadow_control(0xe0000, 0x10000, val & 0x20, (val & 0x20) && (val & 0x10));
                     et6000_shadow_control(0xf0000, 0x10000, val & 0x40, !(val & 0x40));
                     break;
+
+                default:
+                    break;
             }
             et6000_log("ET6000: dev->regs[%02x] = %02x\n", dev->index, dev->regs[dev->index]);
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 et6000_read(uint16_t addr, void *priv)
 {
-    et6000_t *dev = (et6000_t *) priv;
+    const et6000_t *dev = (et6000_t *) priv;
 
     return ((addr == 0x23) && (INDEX >= 0) && (INDEX <= 5)) ? dev->regs[INDEX] : 0xff;
 }
@@ -128,7 +135,7 @@ et6000_close(void *priv)
 }
 
 static void *
-et6000_init(const device_t *info)
+et6000_init(UNUSED(const device_t *info))
 {
     et6000_t *dev = (et6000_t *) malloc(sizeof(et6000_t));
     memset(dev, 0, sizeof(et6000_t));

src/chipset/gc100.c

@@ -44,8 +44,7 @@
 #include <86box/io.h>
 #include <86box/video.h>
 
-typedef struct
-{
+typedef struct gc100_t {
     uint8_t reg[0x10];
 } gc100_t;
 
@@ -70,9 +69,9 @@ gc100_log(const char *fmt, ...)
 static uint8_t
 get_fdd_switch_settings(void)
 {
-    int i, fdd_count = 0;
+    uint8_t fdd_count = 0;
 
-    for (i = 0; i < FDD_NUM; i++) {
+    for (uint8_t i = 0; i < FDD_NUM; i++) {
         if (fdd_get_flags(i))
             fdd_count++;
     }
@@ -135,6 +134,9 @@ gc100_write(uint16_t port, uint8_t val, void *priv)
             /* addr 0x6 */
 
             /* addr 0x7 */
+
+        default:
+            break;
     }
 
     gc100_log("GC100: Write %02x at %02x\n", val, port);
@@ -143,9 +145,9 @@ gc100_write(uint16_t port, uint8_t val, void *priv)
 static uint8_t
 gc100_read(uint16_t port, void *priv)
 {
-    gc100_t *dev  = (gc100_t *) priv;
-    uint8_t  ret  = 0xff;
-    uint16_t addr = port & 0xf;
+    const gc100_t *dev  = (gc100_t *) priv;
+    uint8_t        ret  = 0xff;
+    uint16_t       addr = port & 0xf;
 
     ret = dev->reg[addr];
 
@@ -187,6 +189,9 @@ gc100_read(uint16_t port, void *priv)
             /* addr 0x6 */
 
             /* addr 0x7 */
+
+        default:
+            break;
     }
 
     return ret;

src/chipset/headland.c

@@ -34,6 +34,7 @@
 #include <86box/device.h>
 #include <86box/fdd.h>
 #include <86box/fdc.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
@@ -52,8 +53,9 @@ enum {
 #define HEADLAND_HAS_CRI   0x10
 #define HEADLAND_HAS_SLEEP 0x20
 
-typedef struct {
-    uint8_t  valid, enabled;
+typedef struct headland_mr_t {
+    uint8_t  valid;
+    uint8_t  enabled;
     uint16_t mr;
     uint32_t virt_base;
 
@@ -62,7 +64,8 @@ typedef struct {
 
 typedef struct headland_t {
     uint8_t revision;
-    uint8_t has_cri, has_sleep;
+    uint8_t has_cri;
+    uint8_t  has_sleep;
 
     uint8_t cri;
     uint8_t cr[7];
@@ -72,8 +75,8 @@ typedef struct headland_t {
 
     uint8_t ems_mar;
 
-    headland_mr_t null_mr,
-        ems_mr[64];
+    headland_mr_t null_mr;
+    headland_mr_t ems_mr[64];
 
     mem_mapping_t low_mapping;
     mem_mapping_t ems_mapping[64];
@@ -105,7 +108,11 @@ static const int mem_conf_cr1[41] = {
 static uint32_t
 get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
 {
-    uint32_t bank_base[4], bank_shift[4], shift, other_shift, bank;
+    uint32_t bank_base[4];
+    uint32_t bank_shift[4];
+    uint32_t shift;
+    uint32_t other_shift;
+    uint32_t bank;
 
     if ((addr >= 0x0e0000) && (addr <= 0x0fffff))
         return addr;
@@ -158,7 +165,7 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
 static void
 hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
 {
-    if (base_addr < ((uint32_t) mem_size << 10))
+    if (base_addr < (mem_size << 10))
         mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr);
     else
         mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
@@ -173,7 +180,8 @@ hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
 static void
 hl_ems_update(headland_t *dev, uint8_t mar)
 {
-    uint32_t base_addr, virt_addr;
+    uint32_t base_addr;
+    uint32_t virt_addr;
     uint8_t  indx = mar & 0x1f;
 
     base_addr = (indx + 16) << 14;
@@ -189,7 +197,7 @@ hl_ems_update(headland_t *dev, uint8_t mar)
         dev->ems_mr[mar & 0x3f].virt_base = virt_addr;
         if (indx < 24)
             mem_mapping_disable(&dev->upper_mapping[indx]);
-        if (virt_addr < ((uint32_t) mem_size << 10))
+        if (virt_addr < (mem_size << 10))
             mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr);
         else
             mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
@@ -200,11 +208,9 @@ hl_ems_update(headland_t *dev, uint8_t mar)
 }
 
 static void
-set_global_EMS_state(headland_t *dev, int state)
+set_global_EMS_state(headland_t *dev, UNUSED(int state))
 {
-    int i;
-
-    for (i = 0; i < 32; i++) {
+    for (uint8_t i = 0; i < 32; i++) {
         hl_ems_update(dev, i | (((dev->cr[0] & 0x01) << 5) ^ 0x20));
         hl_ems_update(dev, i | ((dev->cr[0] & 0x01) << 5));
     }
@@ -229,7 +235,6 @@ static void
 memmap_state_update(headland_t *dev)
 {
     uint32_t addr;
-    int      i;
     uint8_t  ht_cr0   = dev->cr[0];
     uint8_t  ht_romcs = !(dev->cr[4] & 0x01);
     if (dev->revision <= 1)
@@ -237,9 +242,9 @@ memmap_state_update(headland_t *dev)
     if (!(dev->cr[0] & 0x04))
         ht_cr0 &= ~0x18;
 
-    for (i = 0; i < 24; i++) {
+    for (uint8_t i = 0; i < 24; i++) {
         addr = get_addr(dev, 0x40000 + (i << 14), NULL);
-        mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
+        mem_mapping_set_exec(&dev->upper_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL);
     }
 
     memmap_state_default(dev, ht_romcs);
@@ -508,7 +513,7 @@ mem_read_b(uint32_t addr, void *priv)
     uint8_t        ret = 0xff;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ret = ram[addr];
 
     return ret;
@@ -522,7 +527,7 @@ mem_read_w(uint32_t addr, void *priv)
     uint16_t       ret = 0xffff;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ret = *(uint16_t *) &ram[addr];
 
     return ret;
@@ -536,7 +541,7 @@ mem_read_l(uint32_t addr, void *priv)
     uint32_t       ret = 0xffffffff;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ret = *(uint32_t *) &ram[addr];
 
     return ret;
@@ -549,7 +554,7 @@ mem_write_b(uint32_t addr, uint8_t val, void *priv)
     headland_t    *dev = mr->headland;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         ram[addr] = val;
 }
 
@@ -560,7 +565,7 @@ mem_write_w(uint32_t addr, uint16_t val, void *priv)
     headland_t    *dev = mr->headland;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         *(uint16_t *) &ram[addr] = val;
 }
 
@@ -571,7 +576,7 @@ mem_write_l(uint32_t addr, uint32_t val, void *priv)
     headland_t    *dev = mr->headland;
 
     addr = get_addr(dev, addr, mr);
-    if (addr < ((uint32_t) mem_size << 10))
+    if (addr < (mem_size << 10))
         *(uint32_t *) &ram[addr] = val;
 }
 
@@ -588,7 +593,6 @@ headland_init(const device_t *info)
 {
     headland_t *dev;
     int         ht386 = 0;
-    uint32_t    i;
 
     dev = (headland_t *) malloc(sizeof(headland_t));
     memset(dev, 0x00, sizeof(headland_t));
@@ -613,7 +617,7 @@ headland_init(const device_t *info)
     dev->null_mr.mr       = 0xff;
     dev->null_mr.headland = dev;
 
-    for (i = 0; i < 64; i++) {
+    for (uint8_t i = 0; i < 64; i++) {
         dev->ems_mr[i].valid    = 1;
         dev->ems_mr[i].mr       = 0x00;
         dev->ems_mr[i].headland = dev;
@@ -645,7 +649,7 @@ headland_init(const device_t *info)
         mem_mapping_enable(&dev->high_mapping);
     }
 
-    for (i = 0; i < 24; i++) {
+    for (uint8_t i = 0; i < 24; i++) {
         mem_mapping_add(&dev->upper_mapping[i],
                         0x40000 + (i << 14), 0x4000,
                         mem_read_b, mem_read_w, mem_read_l,
@@ -671,7 +675,7 @@ headland_init(const device_t *info)
                     MEM_MAPPING_INTERNAL, &dev->null_mr);
     mem_mapping_disable(&dev->shadow_mapping[1]);
 
-    for (i = 0; i < 64; i++) {
+    for (uint8_t i = 0; i < 64; i++) {
         dev->ems_mr[i].mr = 0x00;
         mem_mapping_add(&dev->ems_mapping[i],
                         ((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14, 0x04000,
@@ -684,7 +688,7 @@ headland_init(const device_t *info)
 
     memmap_state_update(dev);
 
-    return (dev);
+    return dev;
 }
 
 const device_t headland_gc10x_device = {

src/chipset/ims8848.c

@@ -30,6 +30,8 @@
 #include <86box/mem.h>
 #include <86box/smram.h>
 #include <86box/pci.h>
+#include <86box/pic.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
@@ -117,10 +119,11 @@
         Bit 0: HADS# Delay After LB. Cycle (1: Enabled / 0: Disable)
 */
 
-typedef struct
-{
-    uint8_t idx, access_data,
-        regs[256], pci_conf[256];
+typedef struct ims8848_t {
+    uint8_t idx;
+    uint8_t access_data;
+    uint8_t regs[256];
+    uint8_t pci_conf[256];
 
     smram_t *smram;
 } ims8848_t;
@@ -147,7 +150,7 @@ ims8848_log(const char *fmt, ...)
 static void
 ims8848_recalc(ims8848_t *dev)
 {
-    int      i, state_on;
+    int      state_on;
     uint32_t base;
     ims8848_log("SHADOW: 00 = %02X, 08 = %02X, 1B = %02X, 1C = %02X\n",
                 dev->regs[0x00], dev->regs[0x08], dev->regs[0x1b], dev->regs[0x1c]);
@@ -155,7 +158,7 @@ ims8848_recalc(ims8848_t *dev)
     state_on = MEM_READ_INTERNAL;
     state_on |= (dev->regs[0x08] & 0x04) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
 
-    for (i = 0; i < 2; i++) {
+    for (uint8_t i = 0; i < 2; i++) {
         base = 0xe0000 + (i << 16);
         if (dev->regs[0x00] & (1 << (i + 2)))
             mem_set_mem_state_both(base, 0x10000, state_on);
@@ -163,7 +166,7 @@ ims8848_recalc(ims8848_t *dev)
             mem_set_mem_state_both(base, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xc0000 + (i << 14);
         if (dev->regs[0x1c] & (1 << i))
             mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
@@ -242,10 +245,16 @@ ims8848_write(uint16_t addr, uint8_t val, void *priv)
                         /* Base Memory */
                         ims8848_base_memory(dev);
                         break;
+
+                    default:
+                        break;
                 }
                 dev->access_data = 0;
             }
             break;
+
+            default:
+                break;
     }
 }
 
@@ -274,6 +283,8 @@ ims8848_read(uint16_t addr, void *priv)
             }
             ims8848_log("[R] [%i] REG %02X = %02X\n", old_ad, dev->idx, ret);
             break;
+        default:
+            break;
     }
 
     return ret;
@@ -307,14 +318,17 @@ ims8849_pci_write(int func, int addr, uint8_t val, void *priv)
             case 0x52 ... 0x55:
                 dev->pci_conf[addr] = val;
                 break;
+
+            default:
+                break;
         }
 }
 
 static uint8_t
 ims8849_pci_read(int func, int addr, void *priv)
 {
-    ims8848_t *dev = (ims8848_t *) priv;
-    uint8_t    ret = 0xff;
+    const ims8848_t *dev = (ims8848_t *) priv;
+    uint8_t          ret = 0xff;
 
     if (func == 0)
         ret = dev->pci_conf[addr];
@@ -362,7 +376,7 @@ ims8848_close(void *priv)
 }
 
 static void *
-ims8848_init(const device_t *info)
+ims8848_init(UNUSED(const device_t *info))
 {
     ims8848_t *dev = (ims8848_t *) malloc(sizeof(ims8848_t));
     memset(dev, 0, sizeof(ims8848_t));

src/chipset/intel_420ex.c

@@ -31,32 +31,38 @@
 #include <86box/mem.h>
 #include <86box/smram.h>
 #include <86box/pci.h>
+#include <86box/pic.h>
 #include <86box/timer.h>
 #include <86box/pit.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/hdc_ide.h>
 #include <86box/hdc.h>
 #include <86box/machine.h>
 #include <86box/chipset.h>
 #include <86box/spd.h>
+#ifndef USE_DRB_HACK
+#include <86box/row.h>
+#endif
 
 #define MEM_STATE_SHADOW_R 0x01
 #define MEM_STATE_SHADOW_W 0x02
 #define MEM_STATE_SMRAM    0x04
 
-typedef struct
-{
-    uint8_t has_ide, smram_locked,
-        regs[256];
+typedef struct i420ex_t {
+    uint8_t has_ide;
+    uint8_t smram_locked;
+    uint8_t regs[256];
 
-    uint16_t timer_base,
-        timer_latch;
+    uint16_t timer_base;
+    uint16_t timer_latch;
 
     smram_t *smram;
 
     double fast_off_period;
 
-    pc_timer_t timer, fast_off_timer;
+    pc_timer_t timer;
+    pc_timer_t fast_off_timer;
 
     apm_t     *apm;
     port_92_t *port_92;
@@ -96,6 +102,8 @@ i420ex_map(uint32_t addr, uint32_t size, int state)
         case 3:
             mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
             break;
+        default:
+            break;
     }
     flushmmucache_nopc();
 }
@@ -110,15 +118,16 @@ i420ex_smram_handler_phase0(void)
 static void
 i420ex_smram_handler_phase1(i420ex_t *dev)
 {
-    uint8_t *regs = (uint8_t *) dev->regs;
+    const uint8_t *regs = (uint8_t *) dev->regs;
 
-    uint32_t host_base = 0x000a0000, ram_base = 0x000a0000;
-    uint32_t size = 0x00010000;
+    uint32_t host_base = 0x000a0000;
+    uint32_t ram_base  = 0x000a0000;
+    uint32_t size      = 0x00010000;
 
     switch (regs[0x70] & 0x07) {
+        default:
         case 0:
         case 1:
-        default:
             host_base = ram_base = 0x00000000;
             size                 = 0x00000000;
             break;
@@ -152,6 +161,25 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
                  (regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20));
 }
 
+#ifndef USE_DRB_HACK
+static void
+i420ex_drb_recalc(i420ex_t *dev)
+{
+    uint32_t boundary;
+
+    for (int8_t i = 4; i >= 0; i--)
+        row_disable(i);
+
+    for (uint8_t i = 0; i <= 4; i++) {
+        boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
+        row_set_boundary(i, boundary);
+    }
+
+    flushmmucache();
+}
+#endif
+
+
 static void
 i420ex_write(int func, int addr, uint8_t val, void *priv)
 {
@@ -193,6 +221,8 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
                         ide_set_side(0, 0x0376);
                         ide_pri_enable();
                         break;
+                    default:
+                        break;
                 }
             }
             break;
@@ -281,7 +311,12 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
         case 0x62:
         case 0x63:
         case 0x64:
+#ifdef USE_DRB_HACK
             spd_write_drbs(dev->regs, 0x60, 0x64, 1);
+#else
+            dev->regs[addr] = val;
+            i420ex_drb_recalc(dev);
+#endif
             break;
         case 0x66:
         case 0x67:
@@ -354,14 +389,16 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
             cpu_fast_off_count = val + 1;
             cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period);
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 i420ex_read(int func, int addr, void *priv)
 {
-    i420ex_t *dev = (i420ex_t *) priv;
-    uint8_t   ret;
+    const i420ex_t *dev = (i420ex_t *) priv;
+    uint8_t         ret;
 
     ret = 0xff;
 
@@ -387,7 +424,7 @@ i420ex_reset_hard(void *priv)
 
     dev->regs[0x4c] = 0x4d;
     dev->regs[0x4e] = 0x03;
-    /* Bits 2:1 of register 50h are 00 is 25 MHz, and 01 if 33 MHz, 10 and 11 are reserved. */
+   /* Bits 2:1 of register 50h are 00 is 25 MHz, and 01 if 33 MHz, 10 and 11 are reserved. */
     if (cpu_busspeed >= 33333333)
         dev->regs[0x50] |= 0x02;
     dev->regs[0x51] = 0x80;
@@ -409,9 +446,9 @@ i420ex_reset_hard(void *priv)
 }
 
 static void
-i420ex_apm_out(uint16_t port, uint8_t val, void *p)
+i420ex_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv)
 {
-    i420ex_t *dev = (i420ex_t *) p;
+    i420ex_t *dev = (i420ex_t *) priv;
 
     if (dev->apm->do_smi)
         dev->regs[0xaa] |= 0x80;
@@ -429,39 +466,41 @@ i420ex_fast_off_count(void *priv)
 }
 
 static void
-i420ex_reset(void *p)
+i420ex_reset(void *priv)
 {
-    i420ex_t *dev = (i420ex_t *) p;
-    int       i;
+    i420ex_t *dev = (i420ex_t *) priv;
 
-    i420ex_write(0, 0x48, 0x00, p);
+    i420ex_write(0, 0x48, 0x00, priv);
 
-    for (i = 0; i < 7; i++)
-        i420ex_write(0, 0x59 + i, 0x00, p);
+    /* Disable the PIC mouse latch. */
+    i420ex_write(0, 0x4e, 0x03, priv);
 
-    for (i = 0; i <= 4; i++)
-        i420ex_write(0, 0x60 + i, 0x01, p);
+    for (uint8_t i = 0; i < 7; i++)
+        i420ex_write(0, 0x59 + i, 0x00, priv);
+
+    for (uint8_t i = 0; i <= 4; i++)
+        dev->regs[0x60 + i] = 0x01;
 
     dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */
     dev->smram_locked = 0;
-    i420ex_write(0, 0x70, 0x00, p);
+    i420ex_write(0, 0x70, 0x00, priv);
 
     mem_set_mem_state(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
     mem_set_mem_state_smm(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
-    i420ex_write(0, 0xa0, 0x08, p);
-    i420ex_write(0, 0xa2, 0x00, p);
-    i420ex_write(0, 0xa4, 0x00, p);
-    i420ex_write(0, 0xa5, 0x00, p);
-    i420ex_write(0, 0xa6, 0x00, p);
-    i420ex_write(0, 0xa7, 0x00, p);
-    i420ex_write(0, 0xa8, 0x0f, p);
+    i420ex_write(0, 0xa0, 0x08, priv);
+    i420ex_write(0, 0xa2, 0x00, priv);
+    i420ex_write(0, 0xa4, 0x00, priv);
+    i420ex_write(0, 0xa5, 0x00, priv);
+    i420ex_write(0, 0xa6, 0x00, priv);
+    i420ex_write(0, 0xa7, 0x00, priv);
+    i420ex_write(0, 0xa8, 0x0f, priv);
 }
 
 static void
-i420ex_close(void *p)
+i420ex_close(void *priv)
 {
-    i420ex_t *dev = (i420ex_t *) p;
+    i420ex_t *dev = (i420ex_t *) priv;
 
     smram_del(dev->smram);
 
@@ -518,6 +557,11 @@ i420ex_init(const device_t *info)
 
     device_add(&ide_pci_2ch_device);
 
+#ifndef USE_DRB_HACK
+    row_device.local = 4 | (1 << 8) | (0x01 << 16) | (8 << 24);
+    device_add((const device_t *) &row_device);
+#endif
+
     i420ex_reset_hard(dev);
 
     return dev;

src/chipset/intel_4x0.c

@@ -28,6 +28,7 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 #include <86box/spd.h>
 #include <86box/machine.h>
@@ -50,17 +51,20 @@ enum {
     INTEL_440ZX
 };
 
-typedef struct
-{
-    uint8_t pm2_cntrl,
-        smram_locked, max_drb,
-        drb_unit, drb_default;
-    uint8_t    regs[256], regs_locked[256];
+typedef struct i4x0_t {
+    uint8_t    pm2_cntrl;
+    uint8_t    smram_locked;
+    uint8_t    max_drb;
+    uint8_t    drb_unit;
+    uint8_t    drb_default;
+    uint8_t    regs[256];
+    uint8_t    regs_locked[256];
     uint8_t    mem_state[256];
     int        type;
-    smram_t   *smram_low, *smram_high;
+    smram_t   *smram_low;
+    smram_t   *smram_high;
     agpgart_t *agpgart;
-    void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit);
+    void     (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit);
 } i4x0_t;
 
 #ifdef ENABLE_I4X0_LOG
@@ -114,12 +118,13 @@ static void
 i4x0_smram_handler_phase1(i4x0_t *dev)
 {
 
-    uint8_t *regs    = (uint8_t *) dev->regs;
-    uint32_t tom     = (mem_size << 10);
-    uint8_t *reg     = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]);
-    uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]);
+    const uint8_t *regs    = (uint8_t *) dev->regs;
+    uint32_t       tom     = (mem_size << 10);
+    const uint8_t *reg     = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]);
+    const uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]);
 
-    uint32_t s, base[2] = { 0x000a0000, 0x00000000 };
+    uint32_t s;
+    uint32_t base[2] = { 0x000a0000, 0x00000000 };
     uint32_t size[2] = { 0x00010000, 0x00000000 };
 
     if ((dev->type <= INTEL_420ZX) || (dev->type >= INTEL_430FX)) {
@@ -164,8 +169,8 @@ i4x0_smram_handler_phase1(i4x0_t *dev)
     } else {
         size[0] = 0x00010000;
         switch (*reg & 0x03) {
-            case 0:
             default:
+            case 0:
                 base[0] = (mem_size << 10) - size[0];
                 s       = 1;
                 break;
@@ -221,17 +226,17 @@ i4x0_mask_bar(uint8_t *regs, void *agpgart)
 }
 
 static uint8_t
-pm2_cntrl_read(uint16_t addr, void *p)
+pm2_cntrl_read(UNUSED(uint16_t addr), void *priv)
 {
-    i4x0_t *dev = (i4x0_t *) p;
+    const i4x0_t *dev = (i4x0_t *) priv;
 
     return dev->pm2_cntrl & 0x01;
 }
 
 static void
-pm2_cntrl_write(uint16_t addr, uint8_t val, void *p)
+pm2_cntrl_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
 {
-    i4x0_t *dev = (i4x0_t *) p;
+    i4x0_t *dev = (i4x0_t *) priv;
 
     dev->pm2_cntrl = val & 0x01;
 }
@@ -242,7 +247,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
     i4x0_t  *dev    = (i4x0_t *) priv;
     uint8_t *regs   = (uint8_t *) dev->regs;
     uint8_t *regs_l = (uint8_t *) dev->regs_locked;
-    int      i;
 
     if (func > 0)
         return;
@@ -251,6 +255,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
         switch (addr) {
             case 0x04: /*Command register*/
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
@@ -258,7 +263,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440BX:
                     case INTEL_440GX:
                     case INTEL_440ZX:
-                    default:
                         regs[0x04] = (regs[0x04] & ~0x42) | (val & 0x42);
                         break;
                     case INTEL_430FX:
@@ -291,16 +295,18 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[0x05] = val & 0x01;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x07:
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
                     case INTEL_430NX:
                     case INTEL_430HX:
-                    default:
                         regs[0x07] &= ~(val & 0x70);
                         break;
                     case INTEL_430FX:
@@ -343,6 +349,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430TX:
                         regs[0x0f] = (val & 0x40);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x12:
@@ -355,6 +363,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0x12] = (val & 0xc0);
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x13:
@@ -367,6 +377,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0x13] = val;
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x2c:
@@ -382,6 +394,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                             regs_l[addr] = 1;
                         }
                         break;
+                    default:
+                        break;
                 }
                 break;
 
@@ -396,14 +410,16 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430TX:
                         regs[0x4f] = (val & 0x80);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x50:
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
-                    default:
                         regs[0x50] = (val & 0xe5);
                         break;
                     case INTEL_430NX:
@@ -467,17 +483,19 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0x51] = (regs[0x51] & 0xb0) | (val & 0x4f);
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x52: /* Cache Control Register */
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
                     case INTEL_430FX:
                     case INTEL_430VX:
                     case INTEL_430TX:
-                    default:
                         regs[0x52] = (val & 0xfb);
                         break;
                     case INTEL_430NX:
@@ -515,6 +533,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         /* Not applicable to 440ZX as that does not support ECC. */
                         regs[0x53] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x54:
@@ -534,6 +554,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440FX:
                         regs[0x54] = val & 0x82;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x55:
@@ -553,6 +575,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[0x55] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x56:
@@ -577,6 +601,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[0x56] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x57:
@@ -628,10 +654,10 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                 break;
             case 0x58:
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
-                    default:
                         regs[0x58] = val & 0x01;
                         break;
                     case INTEL_430NX:
@@ -720,6 +746,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     break;
                 }
                 switch (dev->type) {
+                    default:
                     case INTEL_420TX:
                     case INTEL_420ZX:
                     case INTEL_430LX:
@@ -731,7 +758,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440BX:
                     case INTEL_440ZX:
                     case INTEL_440GX:
-                    default:
                         regs[addr] = val;
                         break;
                     case INTEL_430FX:
@@ -768,6 +794,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430TX:
                         regs[addr] = val & 0x7f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x66:
@@ -786,6 +814,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[addr] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x67:
@@ -810,6 +840,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430TX:
                         regs[addr] = val & 0xb7;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x68:
@@ -838,6 +870,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[0x68] = (regs[0x68] & 0x3f) | (val & 0xc0);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x69:
@@ -856,6 +890,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[0x69] = val & 0x3f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x6a:
@@ -880,6 +916,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         else
                             regs[addr] = val & 0x33;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x6c:
@@ -899,6 +937,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         else if (addr == 0x6d)
                             regs[addr] = val & 0xcf;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x6f:
@@ -909,6 +949,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[addr] = val & 0xcf;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x70:
@@ -930,6 +972,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[addr] = val & 0xf8;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x71:
@@ -953,6 +997,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440LX:
                         regs[addr] = val & 0x1f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x72: /* SMRAM */
@@ -998,6 +1044,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                             i4x0_smram_handler_phase1(dev);
                         }
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x74:
@@ -1008,6 +1056,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x74] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x75:
@@ -1018,6 +1068,10 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                     case INTEL_440GX:
                         regs[addr] = val;
+                        break;
+
+                    default:
+                        break;
                 }
                 break;
             case 0x77:
@@ -1025,6 +1079,10 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440BX:
                     case INTEL_440ZX:
                         regs[0x77] = val & 0x03;
+                        break;
+
+                    default:
+                        break;
                 }
                 break;
             case 0x78:
@@ -1039,6 +1097,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x78] = val & 0x1f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x79:
@@ -1054,6 +1114,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x79] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x7a:
@@ -1066,6 +1128,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         if (val & 0x40)
                             io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x7c:
@@ -1081,6 +1145,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[0x7c] = val & 0x1f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x7d:
@@ -1091,6 +1157,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430NX:
                         regs[0x7d] = val & 0x32;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x7e:
@@ -1102,6 +1170,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_430NX:
                         regs[addr] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x80:
@@ -1111,6 +1181,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x80] &= ~(val & 0x03);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x90:
@@ -1132,6 +1204,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x90] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x91:
@@ -1144,6 +1218,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         /* Not applicable on 82443EX and 82443ZX. */
                         regs[0x91] &= ~(val & 0x11);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x92:
@@ -1157,6 +1233,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0x92] &= ~(val & 0x1f);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0x93:
@@ -1170,6 +1248,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0x93] = (val & 0x0e);
                         trc_write(0x0093, val & 0x06, NULL);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xa7:
@@ -1178,6 +1258,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[0xa7] = val & 0x1f;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xa8:
@@ -1190,6 +1272,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[addr] = (val & 0x03);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xb0:
@@ -1201,6 +1285,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0xb0] = (val & 0x80);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xb1:
@@ -1214,6 +1300,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0xb1] = (val & 0xa0);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xb4:
@@ -1226,6 +1314,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0xb4] = (val & 0x3f);
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xb9:
@@ -1238,6 +1328,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[0xb9] = (val & 0xf0);
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
 
@@ -1252,6 +1344,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         regs[addr] = val;
                         i4x0_mask_bar(regs, dev->agpgart);
                         break;
+                    default:
+                        break;
                 }
                 break;
 
@@ -1261,6 +1355,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[addr] = (val & 0xf8);
                         break;
+                    default:
+                        break;
                 }
                 break;
 
@@ -1270,6 +1366,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440EX:
                         regs[addr] = (val & 0xf8);
                         break;
+                    default:
+                        break;
                 }
                 break;
 
@@ -1287,6 +1385,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[addr] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xca:
@@ -1298,6 +1398,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[addr] = val & 0xe7;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xcb:
@@ -1309,6 +1411,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[addr] = val & 0xa7;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xcc:
@@ -1320,6 +1424,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                         regs[0xcc] = (val & 0x58);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xe0:
@@ -1339,6 +1445,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         if (!regs_l[addr])
                             regs[addr] = val;
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xe5:
@@ -1350,6 +1458,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                         if (!regs_l[addr])
                             regs[addr] = (val & 0x3f);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xe7:
@@ -1358,12 +1468,14 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440ZX:
                     case INTEL_440GX:
                         regs[0xe7] = 0x80;
-                        for (i = 0; i < 16; i++)
+                        for (uint8_t i = 0; i < 16; i++)
                             regs_l[0xe0 + i] = !!(val & 0x80);
                         if (!regs_l[0xe7]) {
                             regs[0xe7] |= (val & 0x7f);
                         }
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xf0:
@@ -1373,6 +1485,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0xf0] = (val & 0xc0);
                         break;
+                    default:
+                        break;
                 }
                 break;
             case 0xf1:
@@ -1382,17 +1496,22 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
                     case INTEL_440GX:
                         regs[0xf1] = (val & 0x03);
                         break;
+                    default:
+                        break;
                 }
                 break;
+
+            default:
+                break;
         }
 }
 
 static uint8_t
 i4x0_read(int func, int addr, void *priv)
 {
-    i4x0_t  *dev  = (i4x0_t *) priv;
-    uint8_t  ret  = 0xff;
-    uint8_t *regs = (uint8_t *) dev->regs;
+    i4x0_t        *dev  = (i4x0_t *) priv;
+    uint8_t        ret  = 0xff;
+    const uint8_t *regs = (uint8_t *) dev->regs;
 
     if (func == 0) {
         ret = regs[addr];
@@ -1409,7 +1528,6 @@ static void
 i4x0_reset(void *priv)
 {
     i4x0_t *dev = (i4x0_t *) priv;
-    int     i;
 
     if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440BX) || (dev->type == INTEL_440ZX))
         memset(dev->regs_locked, 0x00, 256 * sizeof(uint8_t));
@@ -1419,11 +1537,16 @@ i4x0_reset(void *priv)
     else
         i4x0_write(0, 0x59, 0x0f, priv);
 
-    for (i = 0; i < 6; i++)
+    for (uint8_t i = 0; i < 6; i++)
         i4x0_write(0, 0x5a + i, 0x00, priv);
 
-    for (i = 0; i <= dev->max_drb; i++)
-        i4x0_write(0, 0x60 + i, dev->drb_default, priv);
+    for (uint8_t i = 0; i <= dev->max_drb; i++)
+        dev->regs[0x60 + i] = dev->drb_default;
+
+    if (dev->type >= INTEL_430NX) {
+        for (uint8_t i = 0; i < 4; i++)
+            dev->regs[0x68 + i] = 0x00;
+    }
 
     if (dev->type >= INTEL_430FX) {
         dev->regs[0x72] &= 0xef; /* Forcibly unlock the SMRAM register. */
@@ -1443,9 +1566,9 @@ i4x0_reset(void *priv)
 }
 
 static void
-i4x0_close(void *p)
+i4x0_close(void *priv)
 {
-    i4x0_t *dev = (i4x0_t *) p;
+    i4x0_t *dev = (i4x0_t *) priv;
 
     smram_del(dev->smram_high);
     smram_del(dev->smram_low);
@@ -1453,9 +1576,8 @@ i4x0_close(void *p)
     free(dev);
 }
 
-static void
-    *
-    i4x0_init(const device_t *info)
+static void *
+i4x0_init(const device_t *info)
 {
     i4x0_t  *dev = (i4x0_t *) malloc(sizeof(i4x0_t));
     uint8_t *regs;
@@ -1484,9 +1606,9 @@ static void
             regs[0x0d] = 0x20;
             /* According to information from FreeBSD 3.x source code:
                     0x00 = 486DX, 0x20 = 486SX, 0x40 = 486DX2 or 486DX4, 0x80 = Pentium OverDrive. */
-            if (!(hasfpu) && (cpu_multi == 1))
+            if (!hasfpu && (cpu_multi == 1))
                 regs[0x50] = 0x20;
-            else if (!(hasfpu) && (cpu_multi == 2))
+            else if (!hasfpu && (cpu_multi == 2))
                 regs[0x50] = 0x60; /* Guess based on the SX, DX, and DX2 values. */
             else if (hasfpu && (cpu_multi == 1))
                 regs[0x50] = 0x00;
@@ -1508,7 +1630,7 @@ static void
             regs[0x59] = 0x0f;
             regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02;
             dev->max_drb                                      = 3;
-            dev->drb_unit                                     = 4;
+            dev->drb_unit                                     = 1;
             dev->drb_default                                  = 0x02;
             break;
         case INTEL_430LX:
@@ -1746,6 +1868,8 @@ static void
             dev->drb_unit                                                                                         = 8;
             dev->drb_default                                                                                      = 0x01;
             break;
+        default:
+            break;
     }
 
     regs[0x04] = 0x06;

src/chipset/intel_82335.c

@@ -28,6 +28,7 @@
 #include <86box/device.h>
 #include <86box/mem.h>
 #include <86box/chipset.h>
+#include <86box/plat_unused.h>
 
 /* Shadow capabilities */
 #define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
@@ -56,12 +57,10 @@
 #define DEFINE_RC1_REMAP_SIZE ((dev->regs[0x24] & 0x02) ? 128 : 256)
 #define DEFINE_RC2_REMAP_SIZE ((dev->regs[0x26] & 0x02) ? 128 : 256)
 
-typedef struct
-{
+typedef struct intel_82335_t {
+    uint16_t regs[256];
 
-    uint16_t regs[256],
-
-        cfg_locked;
+    uint16_t cfg_locked;
 
 } intel_82335_t;
 
@@ -86,8 +85,11 @@ intel_82335_log(const char *fmt, ...)
 static void
 intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 {
-    intel_82335_t *dev     = (intel_82335_t *) priv;
-    uint32_t       romsize = 0, base = 0, i = 0, rc1_remap = 0, rc2_remap = 0;
+    intel_82335_t *dev       = (intel_82335_t *) priv;
+    uint32_t       romsize   = 0;
+    uint32_t       base      = 0;
+    uint32_t       rc1_remap = 0;
+    uint32_t       rc2_remap = 0;
 
     dev->regs[addr] = val;
 
@@ -106,7 +108,9 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
                     shadowbios_write = !!(dev->regs[0x22] & 0x01);
 
                     /* Base System 512/640KB set */
-                    // mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB);
+#if 0
+                    mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB);
+#endif
 
                     /* Video RAM shadow*/
                     mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? DETERMINE_VIDEO_RAM_WRITE_ACCESS : DISABLED_SHADOW);
@@ -128,14 +132,17 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 
             case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */
                 if (EXTENDED_GRANULARITY_ENABLED) {
-                    for (i = 0; i < 8; i++) {
+                    for (uint8_t i = 0; i < 8; i++) {
                         base             = 0xc0000 + (i << 15);
                         shadowbios       = (dev->regs[0x2e] & (1 << (i + 8))) && (base == romsize);
                         shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize);
                         mem_set_mem_state_both(base, 0x8000, GRANULARITY_RECALC);
                     }
-                    break;
                 }
+                break;
+
+            default:
+                break;
         }
     }
 
@@ -146,7 +153,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 static uint16_t
 intel_82335_read(uint16_t addr, void *priv)
 {
-    intel_82335_t *dev = (intel_82335_t *) priv;
+    const intel_82335_t *dev = (intel_82335_t *) priv;
 
     intel_82335_log("Register %02x: Read %04x\n", addr, dev->regs[addr]);
 
@@ -162,7 +169,7 @@ intel_82335_close(void *priv)
 }
 
 static void *
-intel_82335_init(const device_t *info)
+intel_82335_init(UNUSED(const device_t *info))
 {
     intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t));
     memset(dev, 0, sizeof(intel_82335_t));

src/chipset/intel_i450kx.c

@@ -35,6 +35,7 @@ i450GX is way more popular of an option but needs more stuff.
 #include <86box/device.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/smram.h>
 #include <86box/spd.h>
 #include <86box/chipset.h>
@@ -61,7 +62,8 @@ i450kx_log(const char *fmt, ...)
 typedef struct i450kx_t {
     smram_t *smram[2];
 
-    uint8_t pb_pci_conf[256], mc_pci_conf[256];
+    uint8_t pb_pci_conf[256];
+    uint8_t mc_pci_conf[256];
     uint8_t mem_state[2][256];
 
     uint8_t bus_index;
@@ -88,8 +90,9 @@ i450kx_map(i450kx_t *dev, int bus, uint32_t addr, uint32_t size, int state)
 static void
 i450kx_smram_recalc(i450kx_t *dev, int bus)
 {
-    uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
-    uint32_t addr, size;
+    const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
+    uint32_t       addr;
+    uint32_t       size;
 
     smram_disable(dev->smram[bus]);
 
@@ -109,9 +112,11 @@ i450kx_smram_recalc(i450kx_t *dev, int bus)
 static void
 i450kx_vid_buf_recalc(i450kx_t *dev, int bus)
 {
-    uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
+    const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
 
+#if 0
     // int state = (regs[0x58] & 0x02) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_DISABLED | MEM_WRITE_DISABLED);
+#endif
     int state = (regs[0x58] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
     if (bus)
@@ -166,8 +171,10 @@ pb_write(int func, int addr, uint8_t val, void *priv)
             case 0x4a:
             case 0x4b:
                 dev->pb_pci_conf[addr] = val;
-                // if (addr == 0x4a)
-                // pci_remap_bus(dev->bus_index, val);
+#if 0
+                if (addr == 0x4a)
+                    pci_remap_bus(dev->bus_index, val);
+#endif
                 break;
 
             case 0x4c:
@@ -319,13 +326,6 @@ pb_write(int func, int addr, uint8_t val, void *priv)
                 dev->pb_pci_conf[addr] = val & /*0x1a*/ 0x1f;
                 break;
 
-            case 0xb4:
-                dev->pb_pci_conf[addr] = val & 0xe0;
-                break;
-            case 0xb5:
-                dev->pb_pci_conf[addr] = val & 0x1f;
-                break;
-
             case 0xb8:
             case 0xb9:
                 dev->pb_pci_conf[addr] = val;
@@ -365,13 +365,16 @@ pb_write(int func, int addr, uint8_t val, void *priv)
             case 0xcb:
                 dev->pb_pci_conf[addr] = val;
                 break;
+
+            default:
+                break;
         }
 }
 
 static uint8_t
 pb_read(int func, int addr, void *priv)
 {
-    i450kx_t *dev = (i450kx_t *) priv;
+    const i450kx_t *dev = (i450kx_t *) priv;
     uint8_t   ret = 0xff;
 
     if (func == 0)
@@ -386,10 +389,8 @@ pb_read(int func, int addr, void *priv)
 static void
 mc_fill_drbs(i450kx_t *dev)
 {
-    int i;
-
     spd_write_drbs_interleaved(dev->mc_pci_conf, 0x60, 0x6f, 4);
-    for (i = 0x60; i <= 0x6f; i++) {
+    for (uint8_t i = 0x60; i <= 0x6f; i++) {
         if (i & 0x01)
             dev->mc_pci_conf[i] = 0x00;
         else
@@ -591,13 +592,16 @@ mc_write(int func, int addr, uint8_t val, void *priv)
             case 0xcb:
                 dev->mc_pci_conf[addr] = val;
                 break;
+
+            default:
+                break;
         }
 }
 
 static uint8_t
 mc_read(int func, int addr, void *priv)
 {
-    i450kx_t *dev = (i450kx_t *) priv;
+    const i450kx_t *dev = (i450kx_t *) priv;
     uint8_t   ret = 0xff;
 
     if (func == 0)
@@ -614,7 +618,9 @@ i450kx_reset(void *priv)
     i450kx_t *dev = (i450kx_t *) priv;
     uint32_t  i;
 
+#if 0
     // pclog("i450KX: i450kx_reset()\n");
+#endif
 
     /* Defaults PB */
     dev->pb_pci_conf[0x00] = 0x86;
@@ -672,9 +678,11 @@ i450kx_reset(void *priv)
     dev->pb_pci_conf[0xa6] = 0xfe;
     dev->pb_pci_conf[0xa7] = 0x00;
     /* Note: Do NOT reset these two registers on programmed (TRC) hard reset! */
-    // dev->pb_pci_conf[0xb0] = 0x00;
-    // dev->pb_pci_conf[0xb1] = 0x00;
-    dev->pb_pci_conf[0xb4] = 0x00;
+#if 0
+    dev->pb_pci_conf[0xb0] = 0x00;
+    dev->pb_pci_conf[0xb1] = 0x00;
+#endif
+    dev->pb_pci_conf[0xb4] = 0xff;
     dev->pb_pci_conf[0xb5] = 0x00;
     dev->pb_pci_conf[0xb8] = 0x05;
     dev->pb_pci_conf[0xb9] = 0x00;
@@ -694,7 +702,9 @@ i450kx_reset(void *priv)
     dev->pb_pci_conf[0xca] = 0x00;
     dev->pb_pci_conf[0xcb] = 0x00;
 
-    // pci_remap_bus(dev->bus_index, 0x00);
+#if 0
+    pci_remap_bus(dev->bus_index, 0x00);
+#endif
     i450kx_smram_recalc(dev, 1);
     i450kx_vid_buf_recalc(dev, 1);
     pb_write(0, 0x59, 0x30, dev);
@@ -787,7 +797,7 @@ i450kx_close(void *priv)
 }
 
 static void *
-i450kx_init(const device_t *info)
+i450kx_init(UNUSED(const device_t *info))
 {
     i450kx_t *dev = (i450kx_t *) malloc(sizeof(i450kx_t));
     memset(dev, 0, sizeof(i450kx_t));

src/chipset/intel_piix.c

@@ -40,6 +40,7 @@
 #include <86box/pci.h>
 #include <86box/pic.h>
 #include <86box/pit.h>
+#include <86box/plat.h>
 #include <86box/port_92.h>
 #include <86box/scsi_device.h>
 #include <86box/hdc.h>
@@ -50,7 +51,7 @@
 #include <86box/smbus.h>
 #include <86box/chipset.h>
 
-typedef struct {
+typedef struct piix_io_trap_t {
     struct _piix_ *dev;
     void          *trap;
     uint8_t        dev_id;
@@ -58,14 +59,20 @@ typedef struct {
 } piix_io_trap_t;
 
 typedef struct _piix_ {
-    uint8_t cur_readout_reg, rev,
-        type, func_shift,
-        max_func, pci_slot,
-        no_mirq0, pad,
-        regs[4][256],
-        readout_regs[256], board_config[2];
-    uint16_t func0_id, nvr_io_base,
-        acpi_io_base;
+    uint8_t        cur_readout_reg;
+    uint8_t        rev;
+    uint8_t        type;
+    uint8_t        func_shift;
+    uint8_t        max_func;
+    uint8_t        pci_slot;
+    uint8_t        no_mirq0;
+    uint8_t        pad;
+    uint8_t        regs[4][256];
+    uint8_t        readout_regs[256];
+    uint8_t        board_config[2];
+    uint16_t       func0_id;
+    uint16_t       nvr_io_base;
+    uint16_t       acpi_io_base;
     double         fast_off_period;
     sff8038i_t    *bm[2];
     smbus_piix4_t *smbus;
@@ -77,6 +84,7 @@ typedef struct _piix_ {
     piix_io_trap_t io_traps[26];
     port_92_t     *port_92;
     pc_timer_t     fast_off_timer;
+    usb_params_t   usb_params;
 } piix_t;
 
 #ifdef ENABLE_PIIX_LOG
@@ -100,7 +108,8 @@ piix_log(const char *fmt, ...)
 static void
 smsc_ide_irqs(piix_t *dev)
 {
-    int irq_line = 3, irq_mode[2] = { 0, 0 };
+    int irq_line = 3;
+    uint8_t irq_mode[2] = { 0, 0 };
 
     if (dev->regs[1][0x09] & 0x01)
         irq_mode[0] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1;
@@ -133,6 +142,8 @@ smsc_ide_irqs(piix_t *dev)
         case 0x07:
             irq_line = 15;
             break;
+        default:
+            break;
     }
 
     sff_set_irq_line(dev->bm[0], irq_line);
@@ -147,7 +158,8 @@ smsc_ide_irqs(piix_t *dev)
 static void
 piix_ide_handlers(piix_t *dev, int bus)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     if (bus & 0x01) {
         ide_pri_disable();
@@ -200,7 +212,7 @@ piix_ide_bm_handlers(piix_t *dev)
 }
 
 static uint8_t
-kbc_alias_reg_read(uint16_t addr, void *p)
+kbc_alias_reg_read(UNUSED(uint16_t addr), UNUSED(void *priv))
 {
     uint8_t ret = inb(0x61);
 
@@ -208,7 +220,7 @@ kbc_alias_reg_read(uint16_t addr, void *p)
 }
 
 static void
-kbc_alias_reg_write(uint16_t addr, uint8_t val, void *p)
+kbc_alias_reg_write(UNUSED(uint16_t addr), uint8_t val, UNUSED(void *priv))
 {
     outb(0x61, val);
 }
@@ -264,7 +276,7 @@ nvr_update_io_mapping(piix_t *dev)
 }
 
 static void
-piix_trap_io(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
+piix_trap_io(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNUSED(uint8_t val), void *priv)
 {
     piix_io_trap_t *trap = (piix_io_trap_t *) priv;
 
@@ -277,7 +289,7 @@ piix_trap_io(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
 static void
 piix_trap_io_ide(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
 {
-    piix_io_trap_t *trap = (piix_io_trap_t *) priv;
+    const piix_io_trap_t *trap = (piix_io_trap_t *) priv;
 
     /* IDE traps are per drive, not per channel. */
     if (ide_drives[trap->dev_id]->selected)
@@ -315,9 +327,10 @@ piix_trap_update_devctl(piix_t *dev, uint8_t trap_id, uint8_t dev_id,
 static void
 piix_trap_update(void *priv)
 {
-    piix_t  *dev     = (piix_t *) priv;
-    uint8_t  trap_id = 0, *fregs = dev->regs[3];
-    uint16_t temp;
+    piix_t        *dev     = (piix_t *) priv;
+    uint8_t        trap_id = 0;
+    const uint8_t *fregs   = dev->regs[3];
+    uint16_t       temp;
 
     piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x1f0, 8);
     piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x3f6, 1);
@@ -458,7 +471,6 @@ piix_write(int func, int addr, uint8_t val, void *priv)
     piix_t  *dev = (piix_t *) priv;
     uint8_t *fregs;
     uint16_t base;
-    int      i;
 
     /* Return on unsupported function. */
     if (dev->max_func > 0) {
@@ -512,7 +524,6 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                 break;
             case 0x4e:
                 fregs[0x4e] = val;
-                keyboard_at_set_mouse_scan((val & 0x10) ? 1 : 0);
                 if (dev->type >= 4)
                     kbc_alias_update_io_mapping(dev);
                 break;
@@ -553,8 +564,8 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                 break;
             case 0x6a:
                 switch (dev->type) {
-                    case 1:
                     default:
+                    case 1:
                         fregs[0x6a] = (fregs[0x6a] & 0xfb) | (val & 0x04);
                         fregs[0x0e] = (val & 0x04) ? 0x80 : 0x00;
                         piix_log("PIIX: Write %02X\n", val);
@@ -639,7 +650,7 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                     base = fregs[addr | 0x01] << 8;
                     base |= fregs[addr & 0xfe];
 
-                    for (i = 0; i < 4; i++)
+                    for (uint8_t i = 0; i < 4; i++)
                         ddma_update_io_mapping(dev->ddma, (addr & 4) + i, fregs[addr & 0xfe] + (i << 4), fregs[addr | 0x01], (base != 0x0000));
                 }
                 break;
@@ -789,6 +800,8 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                     }
                 }
                 break;
+            default:
+                break;
         }
     else if (func == 1)
         switch (addr) { /* IDE */
@@ -1010,6 +1023,8 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                     nvr_read_addr_set(!!(val & 0x10), dev->nvr);
                 }
                 break;
+            default:
+                break;
         }
     else if (func == 3)
         switch (addr) { /* Power Management */
@@ -1143,14 +1158,17 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                 fregs[0x91] = val;
                 smbus_update_io_mapping(dev);
                 break;
+            default:
+                break;
         }
 }
 
 static uint8_t
 piix_read(int func, int addr, void *priv)
 {
-    piix_t *dev = (piix_t *) priv;
-    uint8_t ret = 0xff, *fregs;
+    piix_t        *dev = (piix_t *) priv;
+    uint8_t        ret = 0xff;
+    const uint8_t *fregs;
 
     if ((dev->type == 3) && (func == 2) && (dev->max_func == 1) && (addr >= 0x40))
         ret = 0x00;
@@ -1159,9 +1177,7 @@ piix_read(int func, int addr, void *priv)
     if ((func <= dev->max_func) || ((func == 1) && (dev->max_func == 0))) {
         fregs = (uint8_t *) dev->regs[func];
         ret   = fregs[addr];
-        if ((func == 0) && (addr == 0x4e))
-            ret |= keyboard_at_get_mouse_scan();
-        else if ((func == 2) && (addr == 0xff))
+        if ((func == 2) && (addr == 0xff))
             ret |= 0xef;
 
         piix_log("PIIX function %i read: %02X from %02X\n", func, ret, addr);
@@ -1186,8 +1202,8 @@ board_write(uint16_t port, uint8_t val, void *priv)
 static uint8_t
 board_read(uint16_t port, void *priv)
 {
-    piix_t *dev = (piix_t *) priv;
-    uint8_t ret = 0x64;
+    const piix_t *dev = (piix_t *) priv;
+    uint8_t       ret = 0x64;
 
     if (port == 0x0078)
         ret = dev->board_config[0];
@@ -1204,7 +1220,6 @@ board_read(uint16_t port, void *priv)
 static void
 piix_reset_hard(piix_t *dev)
 {
-    int      i;
     uint8_t *fregs;
 
     uint16_t old_base = (dev->regs[1][0x20] & 0xf0) | (dev->regs[1][0x21] << 8);
@@ -1241,7 +1256,7 @@ piix_reset_hard(piix_t *dev)
     }
 
     /* Clear all 4 functions' arrays and set their vendor and device ID's. */
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         memset(dev->regs[i], 0, 256);
         if (dev->type == 5) {
             dev->regs[i][0x00] = 0x55;
@@ -1293,7 +1308,7 @@ piix_reset_hard(piix_t *dev)
     fregs[0xa0] = (dev->type < 4) ? 0x08 : 0x00;
     fregs[0xa8] = (dev->type < 4) ? 0x0f : 0x00;
     if (dev->type > 3)
-        fregs[0xb0] = (is_pentium) ? 0x00 : 0x04;
+        fregs[0xb0] = is_pentium ? 0x00 : 0x04;
     fregs[0xcb] = (dev->type > 3) ? 0x21 : 0x00;
     if (dev->type > 4) {
         fregs[0xd4] = 0x70;
@@ -1409,9 +1424,9 @@ piix_reset_hard(piix_t *dev)
 }
 
 static void
-piix_apm_out(uint16_t port, uint8_t val, void *p)
+piix_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv)
 {
-    piix_t *dev = (piix_t *) p;
+    piix_t *dev = (piix_t *) priv;
 
     if (dev->apm->do_smi) {
         if (dev->type < 4)
@@ -1429,70 +1444,84 @@ piix_fast_off_count(void *priv)
 }
 
 static void
-piix_reset(void *p)
+piix_usb_update_interrupt(usb_t* usb, void *priv)
 {
-    piix_t *dev = (piix_t *) p;
+    const piix_t *dev = (piix_t *) priv;
+
+    if (usb->irq_level)
+        pci_set_irq(dev->pci_slot, PCI_INTD);
+    else
+        pci_clear_irq(dev->pci_slot, PCI_INTD);
+}
+
+static void
+piix_reset(void *priv)
+{
+    const piix_t *dev = (piix_t *) priv;
 
     if (dev->type > 3) {
-        piix_write(3, 0x04, 0x00, p);
-        piix_write(3, 0x5b, 0x00, p);
+        piix_write(3, 0x04, 0x00, priv);
+        piix_write(3, 0x5b, 0x00, priv);
     } else {
-        piix_write(0, 0xa0, 0x08, p);
-        piix_write(0, 0xa2, 0x00, p);
-        piix_write(0, 0xa4, 0x00, p);
-        piix_write(0, 0xa5, 0x00, p);
-        piix_write(0, 0xa6, 0x00, p);
-        piix_write(0, 0xa7, 0x00, p);
-        piix_write(0, 0xa8, 0x0f, p);
+        piix_write(0, 0xa0, 0x08, priv);
+        piix_write(0, 0xa2, 0x00, priv);
+        piix_write(0, 0xa4, 0x00, priv);
+        piix_write(0, 0xa5, 0x00, priv);
+        piix_write(0, 0xa6, 0x00, priv);
+        piix_write(0, 0xa7, 0x00, priv);
+        piix_write(0, 0xa8, 0x0f, priv);
     }
 
+    /* Disable the PIC mouse latch. */
+    piix_write(0, 0x4e, 0x03, priv);
+
     if (dev->type == 5)
-        piix_write(0, 0xe1, 0x40, p);
-    piix_write(1, 0x04, 0x00, p);
+        piix_write(0, 0xe1, 0x40, priv);
+    piix_write(1, 0x04, 0x00, priv);
     if (dev->type == 5) {
-        piix_write(1, 0x09, 0x8a, p);
-        piix_write(1, 0x10, 0xf1, p);
-        piix_write(1, 0x11, 0x01, p);
-        piix_write(1, 0x14, 0xf5, p);
-        piix_write(1, 0x15, 0x03, p);
-        piix_write(1, 0x18, 0x71, p);
-        piix_write(1, 0x19, 0x01, p);
-        piix_write(1, 0x1c, 0x75, p);
-        piix_write(1, 0x1d, 0x03, p);
+        piix_write(1, 0x09, 0x8a, priv);
+        piix_write(1, 0x10, 0xf1, priv);
+        piix_write(1, 0x11, 0x01, priv);
+        piix_write(1, 0x14, 0xf5, priv);
+        piix_write(1, 0x15, 0x03, priv);
+        piix_write(1, 0x18, 0x71, priv);
+        piix_write(1, 0x19, 0x01, priv);
+        piix_write(1, 0x1c, 0x75, priv);
+        piix_write(1, 0x1d, 0x03, priv);
     } else
-        piix_write(1, 0x09, 0x80, p);
-    piix_write(1, 0x20, 0x01, p);
-    piix_write(1, 0x21, 0x00, p);
-    piix_write(1, 0x41, 0x00, p);
-    piix_write(1, 0x43, 0x00, p);
+        piix_write(1, 0x09, 0x80, priv);
+    piix_write(1, 0x20, 0x01, priv);
+    piix_write(1, 0x21, 0x00, priv);
+    piix_write(1, 0x41, 0x00, priv);
+    piix_write(1, 0x43, 0x00, priv);
 
     ide_pri_disable();
     ide_sec_disable();
 
     if (dev->type >= 3) {
-        piix_write(2, 0x04, 0x00, p);
+        piix_write(2, 0x04, 0x00, priv);
         if (dev->type == 5) {
-            piix_write(2, 0x10, 0x00, p);
-            piix_write(2, 0x11, 0x00, p);
-            piix_write(2, 0x12, 0x00, p);
-            piix_write(2, 0x13, 0x00, p);
+            piix_write(2, 0x10, 0x00, priv);
+            piix_write(2, 0x11, 0x00, priv);
+            piix_write(2, 0x12, 0x00, priv);
+            piix_write(2, 0x13, 0x00, priv);
         } else {
-            piix_write(2, 0x20, 0x01, p);
-            piix_write(2, 0x21, 0x00, p);
-            piix_write(2, 0x22, 0x00, p);
-            piix_write(2, 0x23, 0x00, p);
+            piix_write(2, 0x20, 0x01, priv);
+            piix_write(2, 0x21, 0x00, priv);
+            piix_write(2, 0x22, 0x00, priv);
+            piix_write(2, 0x23, 0x00, priv);
         }
     }
 
     if (dev->type >= 4) {
-        piix_write(0, 0xb0, (is_pentium) ? 0x00 : 0x04, p);
-        piix_write(3, 0x40, 0x01, p);
-        piix_write(3, 0x41, 0x00, p);
-        piix_write(3, 0x5b, 0x00, p);
-        piix_write(3, 0x80, 0x00, p);
-        piix_write(3, 0x90, 0x01, p);
-        piix_write(3, 0x91, 0x00, p);
-        piix_write(3, 0xd2, 0x00, p);
+        piix_write(0, 0xb0, is_pentium ? 0x00 : 0x04, priv);
+        piix_write(3, 0x40, 0x01, priv);
+        piix_write(3, 0x41, 0x00, priv);
+        piix_write(3, 0x5b, 0x00, priv);
+        piix_write(3, 0x80, 0x00, priv);
+        piix_write(3, 0x90, 0x01, priv);
+        piix_write(3, 0x91, 0x00, priv);
+        piix_write(3, 0xd2, 0x00, priv);
     }
 
     sff_set_irq_mode(dev->bm[0], 0, 0);
@@ -1532,9 +1561,8 @@ piix_speed_changed(void *priv)
         timer_on_auto(&dev->fast_off_timer, ((double) cpu_fast_off_val + 1) * dev->fast_off_period);
 }
 
-static void
-    *
-    piix_init(const device_t *info)
+static void *
+piix_init(const device_t *info)
 {
     piix_t *dev = (piix_t *) malloc(sizeof(piix_t));
     memset(dev, 0, sizeof(piix_t));
@@ -1570,8 +1598,12 @@ static void
         sff_set_irq_mode(dev->bm[1], 1, 2);
     }
 
-    if (dev->type >= 3)
-        dev->usb = device_add(&usb_device);
+    if (dev->type >= 3) {
+        dev->usb_params.parent_priv      = dev;
+        dev->usb_params.smi_handle       = NULL;
+        dev->usb_params.update_interrupt = piix_usb_update_interrupt;
+        dev->usb                         = device_add_parameters(&usb_device, &dev->usb_params);
+    }
 
     if (dev->type > 3) {
         dev->nvr   = device_add(&piix4_nvr_device);
@@ -1678,7 +1710,9 @@ static void
     else
         dev->board_config[1] |= 0x00;
 
-    // device_add(&i8254_sec_device);
+#if 0
+    device_add(&i8254_sec_device);
+#endif
 
     return dev;
 }

src/chipset/intel_sio.c

@@ -27,23 +27,25 @@
 #include <86box/dma.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/pic.h>
 #include <86box/timer.h>
 #include <86box/pit.h>
 #include <86box/port_92.h>
 #include <86box/machine.h>
 #include <86box/chipset.h>
+#include <86box/plat_unused.h>
 
-typedef struct
-{
-    uint8_t id,
-        regs[256];
+typedef struct sio_t {
+    uint8_t id;
+    uint8_t regs[256];
 
-    uint16_t timer_base,
-        timer_latch;
+    uint16_t timer_base;
+    uint16_t timer_latch;
 
     double fast_off_period;
 
-    pc_timer_t timer, fast_off_timer;
+    pc_timer_t timer;
+    pc_timer_t fast_off_timer;
 
     apm_t     *apm;
     port_92_t *port_92;
@@ -199,6 +201,8 @@ sio_write(int func, int addr, uint8_t val, void *priv)
             dev->regs[addr] = val;
             break;
         case 0x4c:
+            dev->regs[addr] = (val & 0x7f);
+            break;
         case 0x4d:
             dev->regs[addr] = (val & 0x7f);
             break;
@@ -312,14 +316,16 @@ sio_write(int func, int addr, uint8_t val, void *priv)
             cpu_fast_off_count = val + 1;
             cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period);
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 sio_read(int func, int addr, void *priv)
 {
-    sio_t  *dev = (sio_t *) priv;
-    uint8_t ret;
+    const sio_t  *dev = (sio_t *) priv;
+    uint8_t       ret;
 
     ret = 0xff;
 
@@ -330,12 +336,13 @@ sio_read(int func, int addr, void *priv)
 }
 
 static void
-sio_config_write(uint16_t addr, uint8_t val, void *priv)
+sio_config_write(UNUSED(uint16_t addr), UNUSED(uint8_t val), UNUSED(void *priv))
 {
+    //
 }
 
 static uint8_t
-sio_config_read(uint16_t port, void *priv)
+sio_config_read(uint16_t port, UNUSED(void *priv))
 {
     uint8_t ret = 0x00;
 
@@ -362,6 +369,9 @@ sio_config_read(uint16_t port, void *priv)
                     break;
             }
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -422,9 +432,9 @@ sio_reset_hard(void *priv)
 }
 
 static void
-sio_apm_out(uint16_t port, uint8_t val, void *p)
+sio_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv)
 {
-    sio_t *dev = (sio_t *) p;
+    sio_t *dev = (sio_t *) priv;
 
     if (dev->apm->do_smi)
         dev->regs[0xaa] |= 0x80;
@@ -440,29 +450,32 @@ sio_fast_off_count(void *priv)
 }
 
 static void
-sio_reset(void *p)
+sio_reset(void *priv)
 {
-    sio_t *dev = (sio_t *) p;
+    const sio_t *dev = (sio_t *) priv;
 
-    sio_write(0, 0x57, 0x04, p);
+    /* Disable the PIC mouse latch. */
+    sio_write(0, 0x4d, 0x40, priv);
+
+    sio_write(0, 0x57, 0x04, priv);
 
     dma_set_params(1, 0xffffffff);
 
     if (dev->id == 0x03) {
-        sio_write(0, 0xa0, 0x08, p);
-        sio_write(0, 0xa2, 0x00, p);
-        sio_write(0, 0xa4, 0x00, p);
-        sio_write(0, 0xa5, 0x00, p);
-        sio_write(0, 0xa6, 0x00, p);
-        sio_write(0, 0xa7, 0x00, p);
-        sio_write(0, 0xa8, 0x0f, p);
+        sio_write(0, 0xa0, 0x08, priv);
+        sio_write(0, 0xa2, 0x00, priv);
+        sio_write(0, 0xa4, 0x00, priv);
+        sio_write(0, 0xa5, 0x00, priv);
+        sio_write(0, 0xa6, 0x00, priv);
+        sio_write(0, 0xa7, 0x00, priv);
+        sio_write(0, 0xa8, 0x0f, priv);
     }
 }
 
 static void
-sio_close(void *p)
+sio_close(void *priv)
 {
-    sio_t *dev = (sio_t *) p;
+    sio_t *dev = (sio_t *) priv;
 
     free(dev);
 }
@@ -536,7 +549,9 @@ sio_init(const device_t *info)
 
     timer_add(&dev->timer, NULL, NULL, 0);
 
-    // device_add(&i8254_sec_device);
+#if 0
+    device_add(&i8254_sec_device);
+#endif
 
     return dev;
 }

src/chipset/neat.c

@@ -30,6 +30,7 @@
 #include <86box/device.h>
 #include <86box/io.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
 #define NEAT_DEBUG  0
@@ -200,7 +201,7 @@
 #define RB11_EMSLEN    0xe0 /*  EMS memory chunk size */
 #define RB11_EMSLEN_SH 5
 
-typedef struct {
+typedef struct emspage_t {
     int8_t        enabled; /* 1=ENABLED */
     char          pad;
     uint16_t      page;    /* selected page in EMS block */
@@ -209,18 +210,18 @@ typedef struct {
     mem_mapping_t mapping; /* mapping entry for page */
 } emspage_t;
 
-typedef struct {
+typedef struct neat_t {
     uint8_t regs[128]; /* all the CS8221 registers */
     uint8_t indx;      /* programmed index into registers */
 
     char pad;
 
-    uint16_t ems_base, /* configured base address */
-        ems_oldbase;
-    uint32_t ems_frame, /* configured frame address */
-        ems_oldframe;
-    uint16_t ems_size,          /* EMS size in KB */
-        ems_pages;              /* EMS size in pages */
+    uint16_t ems_base;          /* configured base address */
+    uint16_t ems_oldbase;
+    uint32_t ems_frame;         /* configured frame address */
+    uint32_t ems_oldframe;
+    uint16_t ems_size;          /* EMS size in KB */
+    uint16_t ems_pages;         /* EMS size in pages */
     emspage_t ems[EMS_MAXPAGE]; /* EMS page registers */
 } neat_t;
 
@@ -250,9 +251,9 @@ ems_readb(uint32_t addr, void *priv)
     uint8_t ret = 0xff;
 
     /* Grab the data. */
-    ret = *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 
-    return (ret);
+    return ret;
 }
 
 /* Read one word from paged RAM. */
@@ -263,9 +264,9 @@ ems_readw(uint32_t addr, void *priv)
     uint16_t ret = 0xffff;
 
     /* Grab the data. */
-    ret = *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff));
+    ret = *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
 
-    return (ret);
+    return ret;
 }
 
 /* Write one byte to paged RAM. */
@@ -275,7 +276,7 @@ ems_writeb(uint32_t addr, uint8_t val, void *priv)
     neat_t *dev = (neat_t *) priv;
 
     /* Write the data. */
-    *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Write one word to paged RAM. */
@@ -285,7 +286,7 @@ ems_writew(uint32_t addr, uint16_t val, void *priv)
     neat_t *dev = (neat_t *) priv;
 
     /* Write the data. */
-    *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val;
+    *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
 }
 
 /* Re-calculate the active-page physical address. */
@@ -340,15 +341,17 @@ ems_write(uint16_t port, uint8_t val, void *priv)
             ems->page |= (val & 0x7f); /* add new bits */
             ems_recalc(dev, ems);
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 ems_read(uint16_t port, void *priv)
 {
-    neat_t *dev = (neat_t *) priv;
-    uint8_t ret = 0xff;
-    int     vpage;
+    const neat_t *dev = (neat_t *) priv;
+    uint8_t       ret = 0xff;
+    int           vpage;
 
     /* Get the viewport page number. */
     vpage = (port / EMS_PGSIZE);
@@ -359,25 +362,27 @@ ems_read(uint16_t port, void *priv)
             if (dev->ems[vpage].enabled)
                 ret |= 0x80;
             break;
+        default:
+            break;
     }
 
 #if NEAT_DEBUG > 1
     neat_log("NEAT: ems_read(%04x) = %02x\n", port, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 /* Initialize the EMS module. */
 static void
 ems_init(neat_t *dev, int en)
 {
-    int i;
+    uint8_t j;
 
     /* Remove if needed. */
     if (!en) {
         if (dev->ems_base > 0)
-            for (i = 0; i < EMS_MAXPAGE; i++) {
+            for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
                 /* Disable for now. */
                 mem_mapping_disable(&dev->ems[i].mapping);
 
@@ -394,19 +399,19 @@ ems_init(neat_t *dev, int en)
     }
 
     /* Get configured I/O address. */
-    i             = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH;
-    dev->ems_base = 0x0208 + (0x10 * i);
+    j             = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH;
+    dev->ems_base = 0x0208 + (0x10 * j);
 
     /* Get configured frame address. */
-    i              = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH;
-    dev->ems_frame = 0xC0000 + (EMS_PGSIZE * i);
+    j              = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH;
+    dev->ems_frame = 0xC0000 + (EMS_PGSIZE * j);
 
     /*
      * For each supported page (we can have a maximum of 4),
      * create, initialize and disable the mappings, and set
      * up the I/O control handler.
      */
-    for (i = 0; i < EMS_MAXPAGE; i++) {
+    for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
         /* Create and initialize a page mapping. */
         mem_mapping_add(&dev->ems[i].mapping,
                         dev->ems_frame + (EMS_PGSIZE * i), EMS_PGSIZE,
@@ -435,9 +440,10 @@ ems_init(neat_t *dev, int en)
 static void
 neat_write(uint16_t port, uint8_t val, void *priv)
 {
-    neat_t *dev = (neat_t *) priv;
-    uint8_t xval, *reg;
-    int     i;
+    neat_t  *dev = (neat_t *) priv;
+    uint8_t  xval;
+    uint8_t *reg;
+    int      i;
 
 #if NEAT_DEBUG > 2
     neat_log("NEAT: write(%04x, %02x)\n", port, val);
@@ -607,6 +613,8 @@ neat_write(uint16_t port, uint8_t val, void *priv)
                         case 7: /* 7 MB */
                             dev->ems_size = i << 10;
                             break;
+                        default:
+                            break;
                     }
                     dev->ems_pages = (dev->ems_size << 10) / EMS_PGSIZE;
                     if (dev->regs[REG_RB7] & RB7_EMSEN) {
@@ -621,14 +629,16 @@ neat_write(uint16_t port, uint8_t val, void *priv)
                     break;
             }
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 neat_read(uint16_t port, void *priv)
 {
-    neat_t *dev = (neat_t *) priv;
-    uint8_t ret = 0xff;
+    const neat_t *dev = (neat_t *) priv;
+    uint8_t       ret = 0xff;
 
     switch (port) {
         case 0x22:
@@ -647,7 +657,7 @@ neat_read(uint16_t port, void *priv)
     neat_log("NEAT: read(%04x) = %02x\n", port, ret);
 #endif
 
-    return (ret);
+    return ret;
 }
 
 static void
@@ -659,17 +669,17 @@ neat_close(void *priv)
 }
 
 static void *
-neat_init(const device_t *info)
+neat_init(UNUSED(const device_t *info))
 {
     neat_t *dev;
-    int     i;
+    uint8_t dram_mode = 0;
 
     /* Create an instance. */
     dev = (neat_t *) malloc(sizeof(neat_t));
     memset(dev, 0x00, sizeof(neat_t));
 
     /* Initialize some of the registers to specific defaults. */
-    for (i = REG_RA0; i <= REG_RB11; i++) {
+    for (uint8_t i = REG_RA0; i <= REG_RB11; i++) {
         dev->indx = i;
         neat_write(0x0023, 0x00, dev);
     }
@@ -681,7 +691,6 @@ neat_init(const device_t *info)
      * TODO: We might also want to set 'valid' waitstate
      *       bits, based on our cpu speed.
      */
-    i = 0;
     switch (mem_size) {
         case 512: /* 512KB */
             /* 256K, 0, 0, 0 */
@@ -689,7 +698,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */
-            i = 2;
+            dram_mode = 2;
             break;
 
         case 640: /* 640KB */
@@ -698,7 +707,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */
             dev->regs[REG_RB8] &= ~RB8_BANKS;                /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH);  /* NONE */
-            i = 4;
+            dram_mode = 4;
             break;
 
         case 1024: /* 1MB */
@@ -707,7 +716,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */
-            i = 5;
+            dram_mode = 5;
             break;
 
         case 1536: /* 1.5MB */
@@ -716,7 +725,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */
-            i = 7;
+            dram_mode = 7;
             break;
 
         case 1664: /* 1.64MB */
@@ -725,7 +734,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */
             dev->regs[REG_RB8] |= RB8_BANKS;                 /* two banks */
             dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH);  /* 256K */
-            i = 10;
+            dram_mode = 10;
             break;
 
         case 2048: /* 2MB */
@@ -736,14 +745,14 @@ neat_init(const device_t *info)
             dev->regs[REG_RB8] |= RB8_BANKS;                /* two banks */
             dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] |= RB8_4WAY;                 /* 4way intl */
-            i = 11;
+            dram_mode = 11;
 #else
             /* 1M, 0, 0, 0 */
             dev->regs[REG_RB6] &= ~RB6_BANKS;               /* one bank */
             dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH);   /* 1M */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */
-            i = 3;
+            dram_mode = 3;
 #endif
             break;
 
@@ -753,7 +762,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH);   /* 1M */
-            i = 8;
+            dram_mode = 8;
             break;
 
         case 4096: /* 4MB */
@@ -762,7 +771,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH);   /* 1M */
             dev->regs[REG_RB8] &= ~RB8_BANKS;               /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */
-            i = 6;
+            dram_mode = 6;
             break;
 
         case 4224: /* 4.64MB */
@@ -771,7 +780,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */
             dev->regs[REG_RB8] |= RB8_BANKS;                 /* two banks */
             dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH);    /* 1M */
-            i = 12;
+            dram_mode = 12;
             break;
 
         case 5120: /* 5MB */
@@ -780,7 +789,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */
             dev->regs[REG_RB8] |= RB8_BANKS;                /* two banks */
             dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH);   /* 1M */
-            i = 13;
+            dram_mode = 13;
             break;
 
         case 6144: /* 6MB */
@@ -789,7 +798,7 @@ neat_init(const device_t *info)
             dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */
             dev->regs[REG_RB8] &= ~RB8_BANKS;             /* one bank */
             dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */
-            i = 9;
+            dram_mode = 9;
             break;
 
         case 8192: /* 8MB */
@@ -799,13 +808,13 @@ neat_init(const device_t *info)
             dev->regs[REG_RB8] |= RB8_BANKS;              /* two banks */
             dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */
             dev->regs[REG_RB8] |= RB8_4WAY;               /* 4way intl */
-            i = 14;
+            dram_mode = 14;
             break;
 
         default:
             neat_log("NEAT: **INVALID DRAM SIZE %iKB !**\n", mem_size);
     }
-    if (i > 0) {
+    if (dram_mode > 0) {
         neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", i, mem_size);
     }
 

src/chipset/olivetti_eva.c

@@ -32,9 +32,9 @@
 #include <86box/chipset.h>
 #include <86box/video.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 
-typedef struct
-{
+typedef struct olivetti_eva_t {
     uint8_t reg_065;
     uint8_t reg_067;
     uint8_t reg_069;
@@ -77,20 +77,24 @@ olivetti_eva_write(uint16_t addr, uint8_t val, void *priv)
              * Unfortunately, if triggered, the BIOS remapping function fails causing
              * a fatal error. Therefore, this code section is currently commented.
              */
-            // if (val & 1){
-            //     /*
-            //      * Set the register to 7 or above for the BIOS to trigger the
-            //      * memory remapping function if shadowing is active.
-            //      */
-            //     dev->reg_069 = 0x7;
-            // }
-            // if (val & 8) {
-            //     /*
-            //      * Activate shadowing for region e0000-fffff
-            //      */
-            //     mem_remap_top(256);
-            //     mem_set_mem_state_both(0xa0000, 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-            // }
+#if 0
+            if (val & 1) {
+                /*
+                 * Set the register to 7 or above for the BIOS to trigger the
+                 * memory remapping function if shadowing is active.
+                 */
+                 dev->reg_069 = 0x7;
+            }
+            if (val & 8) {
+                /*
+                 * Activate shadowing for region e0000-fffff
+                 */
+                 mem_remap_top(256);
+                 mem_set_mem_state_both(0xa0000, 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+            }
+#endif
+            break;
+        default:
             break;
     }
 }
@@ -111,6 +115,8 @@ olivetti_eva_read(uint16_t addr, void *priv)
         case 0x069:
             ret = dev->reg_069;
             break;
+        default:
+            break;
     }
     olivetti_eva_log("Olivetti EVA Gate Array: Read %02x at %02x\n", ret, addr);
     return ret;
@@ -125,7 +131,7 @@ olivetti_eva_close(void *priv)
 }
 
 static void *
-olivetti_eva_init(const device_t *info)
+olivetti_eva_init(UNUSED(const device_t *info))
 {
     olivetti_eva_t *dev = (olivetti_eva_t *) malloc(sizeof(olivetti_eva_t));
     memset(dev, 0, sizeof(olivetti_eva_t));

src/chipset/opti283.c

@@ -29,6 +29,8 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_fallthrough.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
 #ifdef ENABLE_OPTI283_LOG
@@ -49,15 +51,15 @@ opti283_log(const char *fmt, ...)
 #    define opti283_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint32_t phys, virt;
+typedef struct mem_remapping_t {
+    uint32_t phys;
+    uint32_t virt;
 } mem_remapping_t;
 
-typedef struct
-{
-    uint8_t index, shadow_high,
-        regs[256];
+typedef struct opti283_t {
+    uint8_t         index;
+    uint8_t         shadow_high;
+    uint8_t         regs[256];
     mem_remapping_t mem_remappings[2];
     mem_mapping_t   mem_mappings[2];
 } opti283_t;
@@ -65,7 +67,7 @@ typedef struct
 static uint8_t
 opti283_read_remapped_ram(uint32_t addr, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     return mem_read_ram((addr - dev->virt) + dev->phys, priv);
 }
@@ -73,7 +75,7 @@ opti283_read_remapped_ram(uint32_t addr, void *priv)
 static uint16_t
 opti283_read_remapped_ramw(uint32_t addr, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     return mem_read_ramw((addr - dev->virt) + dev->phys, priv);
 }
@@ -81,7 +83,7 @@ opti283_read_remapped_ramw(uint32_t addr, void *priv)
 static uint32_t
 opti283_read_remapped_raml(uint32_t addr, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     return mem_read_raml((addr - dev->virt) + dev->phys, priv);
 }
@@ -89,7 +91,7 @@ opti283_read_remapped_raml(uint32_t addr, void *priv)
 static void
 opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     mem_write_ram((addr - dev->virt) + dev->phys, val, priv);
 }
@@ -97,7 +99,7 @@ opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv)
 static void
 opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     mem_write_ramw((addr - dev->virt) + dev->phys, val, priv);
 }
@@ -105,7 +107,7 @@ opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv)
 static void
 opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv)
 {
-    mem_remapping_t *dev = (mem_remapping_t *) priv;
+    const mem_remapping_t *dev = (mem_remapping_t *) priv;
 
     mem_write_raml((addr - dev->virt) + dev->phys, val, priv);
 }
@@ -113,10 +115,12 @@ opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv)
 static void
 opti283_shadow_recalc(opti283_t *dev)
 {
-    uint32_t i, base;
+    uint32_t base;
     uint32_t rbase;
-    uint8_t  sh_enable, sh_mode;
-    uint8_t  rom, sh_copy;
+    uint8_t  sh_enable;
+    uint8_t  sh_mode;
+    uint8_t  rom;
+    uint8_t  sh_copy;
 
     shadowbios = shadowbios_write = 0;
     dev->shadow_high              = 0;
@@ -143,7 +147,7 @@ opti283_shadow_recalc(opti283_t *dev)
     }
 
     sh_copy = dev->regs[0x11] & 0x08;
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base = 0xc0000 + (i << 14);
         if (i >= 4)
             sh_enable = dev->regs[0x12] & (1 << (i - 4));
@@ -225,23 +229,31 @@ opti283_write(uint16_t addr, uint8_t val, void *priv)
 
                 case 0x14:
                     reset_on_hlt = !!(val & 0x40);
-                    /* FALLTHROUGH */
+#ifdef FALLTHROUGH_ANNOTATION
+                    [[fallthrough]];
+#endif
                 case 0x11:
                 case 0x12:
                 case 0x13:
                     dev->regs[dev->index] = val;
                     opti283_shadow_recalc(dev);
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti283_read(uint16_t addr, void *priv)
 {
-    opti283_t *dev = (opti283_t *) priv;
-    uint8_t    ret = 0xff;
+    const opti283_t *dev = (opti283_t *) priv;
+    uint8_t          ret = 0xff;
 
     if (addr == 0x24)
         ret = dev->regs[dev->index];
@@ -258,7 +270,7 @@ opti283_close(void *priv)
 }
 
 static void *
-opti283_init(const device_t *info)
+opti283_init(UNUSED(const device_t *info))
 {
     opti283_t *dev = (opti283_t *) malloc(sizeof(opti283_t));
     memset(dev, 0x00, sizeof(opti283_t));

src/chipset/opti291.c

@@ -28,6 +28,7 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
@@ -49,9 +50,9 @@ opti291_log(const char *fmt, ...)
 #    define opti291_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint8_t    index, regs[256];
+typedef struct opti291_t {
+    uint8_t    index;
+    uint8_t    regs[256];
     port_92_t *port_92;
 } opti291_t;
 
@@ -107,15 +108,21 @@ opti291_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x2c:
                     dev->regs[dev->index] = val;
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti291_read(uint16_t addr, void *priv)
 {
-    opti291_t *dev = (opti291_t *) priv;
+    const opti291_t *dev = (opti291_t *) priv;
 
     return (addr == 0x24) ? dev->regs[dev->index] : 0xff;
 }
@@ -129,7 +136,7 @@ opti291_close(void *priv)
 }
 
 static void *
-opti291_init(const device_t *info)
+opti291_init(UNUSED(const device_t *info))
 {
     opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t));
     memset(dev, 0, sizeof(opti291_t));

src/chipset/opti391.c

@@ -27,6 +27,7 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
 #ifdef ENABLE_OPTI391_LOG
@@ -47,22 +48,24 @@ opti391_log(const char *fmt, ...)
 #    define opti391_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint32_t phys, virt;
+typedef struct mem_remapping_t {
+    uint32_t phys;
+    uint32_t virt;
 } mem_remapping_t;
 
-typedef struct
-{
-    uint8_t index, regs[256];
+typedef struct opti391_t {
+    uint8_t index;
+    uint8_t regs[256];
 } opti391_t;
 
 static void
 opti391_shadow_recalc(opti391_t *dev)
 {
-    uint32_t i, base;
-    uint8_t  sh_enable, sh_master;
-    uint8_t  sh_wp, sh_write_internal;
+    uint32_t base;
+    uint8_t  sh_enable;
+    uint8_t  sh_master;
+    uint8_t  sh_wp;
+    uint8_t  sh_write_internal;
 
     shadowbios = shadowbios_write = 0;
 
@@ -75,7 +78,7 @@ opti391_shadow_recalc(opti391_t *dev)
 
     sh_write_internal = (dev->regs[0x26] & 0x40);
     /* D0000-EFFFF */
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xd0000 + (i << 14);
         if (base >= 0xe0000) {
             sh_master = (dev->regs[0x22] & 0x40);
@@ -105,7 +108,7 @@ opti391_shadow_recalc(opti391_t *dev)
     /* C0000-CFFFF */
     sh_master = !(dev->regs[0x26] & 0x10);
     sh_wp     = (dev->regs[0x26] & 0x20);
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base      = 0xc0000 + (i << 14);
         sh_enable = dev->regs[0x26] & (1 << i);
 
@@ -161,16 +164,22 @@ opti391_write(uint16_t addr, uint8_t val, void *priv)
                     dev->regs[dev->index] = val;
                     opti391_shadow_recalc(dev);
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti391_read(uint16_t addr, void *priv)
 {
-    opti391_t *dev = (opti391_t *) priv;
-    uint8_t    ret = 0xff;
+    const opti391_t *dev = (opti391_t *) priv;
+    uint8_t          ret = 0xff;
 
     if (addr == 0x24)
         ret = dev->regs[dev->index];
@@ -187,7 +196,7 @@ opti391_close(void *priv)
 }
 
 static void *
-opti391_init(const device_t *info)
+opti391_init(UNUSED(const device_t *info))
 {
     opti391_t *dev = (opti391_t *) malloc(sizeof(opti391_t));
     memset(dev, 0x00, sizeof(opti391_t));

src/chipset/opti495.c

@@ -31,11 +31,10 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t idx,
-        regs[256],
-        scratch[2];
+typedef struct opti495_t {
+    uint8_t idx;
+    uint8_t regs[256];
+    uint8_t scratch[2];
 } opti495_t;
 
 #ifdef ENABLE_OPTI495_LOG
@@ -60,7 +59,7 @@ static void
 opti495_recalc(opti495_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;
@@ -77,7 +76,7 @@ opti495_recalc(opti495_t *dev)
 
     mem_set_mem_state_both(0xf0000, 0x10000, shflags);
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xd0000 + (i << 14);
 
         if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) {
@@ -94,7 +93,7 @@ opti495_recalc(opti495_t *dev)
         mem_set_mem_state_both(base, 0x4000, shflags);
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xc0000 + (i << 14);
 
         if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) {
@@ -140,6 +139,8 @@ opti495_write(uint16_t addr, uint8_t val, void *priv)
                     case 0x26:
                         opti495_recalc(dev);
                         break;
+                    default:
+                        break;
                 }
             }
             break;
@@ -148,14 +149,16 @@ opti495_write(uint16_t addr, uint8_t val, void *priv)
         case 0xe2:
             dev->scratch[~addr & 0x01] = val;
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti495_read(uint16_t addr, void *priv)
 {
-    uint8_t    ret = 0xff;
-    opti495_t *dev = (opti495_t *) priv;
+    uint8_t          ret = 0xff;
+    const opti495_t *dev = (opti495_t *) priv;
 
     switch (addr) {
         case 0x22:
@@ -171,6 +174,8 @@ opti495_read(uint16_t addr, void *priv)
         case 0xe2:
             ret = dev->scratch[~addr & 0x01];
             break;
+        default:
+            break;
     }
 
     return ret;

src/chipset/opti499.c

@@ -29,12 +29,13 @@
 #include <86box/device.h>
 #include <86box/mem.h>
 #include <86box/port_92.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
+typedef struct opti499_t {
     uint8_t idx,
-        regs[256], scratch[2];
+    uint8_t regs[256];
+    uint8_t scratch[2];
 } opti499_t;
 
 #ifdef ENABLE_OPTI499_LOG
@@ -59,7 +60,7 @@ static void
 opti499_recalc(opti499_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;
@@ -76,7 +77,7 @@ opti499_recalc(opti499_t *dev)
 
     mem_set_mem_state_both(0xf0000, 0x10000, shflags);
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xd0000 + (i << 14);
 
         if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) {
@@ -92,7 +93,7 @@ opti499_recalc(opti499_t *dev)
         mem_set_mem_state_both(base, 0x4000, shflags);
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xc0000 + (i << 14);
 
         if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) {
@@ -153,6 +154,9 @@ opti499_write(uint16_t addr, uint8_t val, void *priv)
                     case 0x2d:
                         opti499_recalc(dev);
                         break;
+
+                    default:
+                        break;
                 }
             }
             break;
@@ -161,6 +165,9 @@ opti499_write(uint16_t addr, uint8_t val, void *priv)
         case 0xe2:
             dev->scratch[~addr & 0x01] = val;
             break;
+
+        default:
+            break;
     }
 }
 
@@ -187,6 +194,9 @@ opti499_read(uint16_t addr, void *priv)
         case 0xe2:
             ret = dev->scratch[~addr & 0x01];
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -229,7 +239,7 @@ opti499_close(void *priv)
 }
 
 static void *
-opti499_init(const device_t *info)
+opti499_init(UNUSED(const device_t *info))
 {
     opti499_t *dev = (opti499_t *) malloc(sizeof(opti499_t));
     memset(dev, 0, sizeof(opti499_t));

src/chipset/opti5x7.c

@@ -32,10 +32,10 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t idx, is_pci,
-        regs[16];
+typedef struct opti5x7_t {
+    uint8_t idx;
+    uint8_t is_pci;
+    uint8_t regs[16];
 } opti5x7_t;
 
 #ifdef ENABLE_OPTI5X7_LOG
@@ -84,7 +84,7 @@ opti5x7_shadow_map(int cur_reg, opti5x7_t *dev)
             mem_set_mem_state_both(0xf0000, 0x10000, ((dev->regs[6] & 4) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[6] & 8) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
         }
     } else {
-        for (int i = 0; i < 4; i++) {
+        for (uint8_t i = 0; i < 4; i++) {
             if (dev->is_pci)
                 mem_set_mem_state_cpu_both(0xc0000 + ((cur_reg & 1) << 16) + (i << 14), 0x4000, ((dev->regs[cur_reg] & (1 << (2 * i))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[cur_reg] & (2 << (2 * i))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
             else
@@ -143,16 +143,20 @@ opti5x7_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x11: /* Master Cycle Control Register */
                     dev->regs[dev->idx] = val;
                     break;
+                default:
+                    break;
             }
             opti5x7_log("OPTi 5x7: dev->regs[%02x] = %02x\n", dev->idx, dev->regs[dev->idx]);
             break;
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti5x7_read(uint16_t addr, void *priv)
 {
-    opti5x7_t *dev = (opti5x7_t *) priv;
+    const opti5x7_t *dev = (opti5x7_t *) priv;
 
     return (addr == 0x24) ? dev->regs[dev->idx] : 0xff;
 }

src/chipset/opti822.c

@@ -33,6 +33,7 @@
 #include <86box/timer.h>
 #include <86box/pic.h>
 #include <86box/pit.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/hdc_ide.h>
 #include <86box/hdc.h>
@@ -40,10 +41,9 @@
 #include <86box/chipset.h>
 #include <86box/spd.h>
 
-typedef struct
-{
-    uint8_t irq_convert,
-        pci_regs[256];
+typedef struct opti822_t {
+    uint8_t irq_convert;
+    uint8_t pci_regs[256];
 } opti822_t;
 
 // #define ENABLE_OPTI822_LOG 1
@@ -71,11 +71,13 @@ opti822_log(const char *fmt, ...)
 static void
 opti822_recalc(opti822_t *dev)
 {
-    int      i, reg, bit_r, bit_w;
+    int      reg;
+    int      bit_r;
+    int      bit_w;
     int      state;
     uint32_t base;
 
-    for (i = 0; i < 12; i++) {
+    for (uint8_t i = 0; i < 12; i++) {
         base  = 0x000c0000 + (i << 14);
         reg   = 0x44 + ((i >> 2) ^ 3);
         bit_w = (i & 3);
@@ -99,15 +101,18 @@ static void
 opti822_update_irqs(opti822_t *dev, int set)
 {
     uint8_t val;
-    int     i, reg;
-    int     shift, irq;
+    int     reg;
+    int     shift;
+    int     irq;
     int     irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
     pic_t  *temp_pic;
 
-    // dev->irq_convert = (dev->pci_regs[0x53] & 0x08);
+#if 0
+    dev->irq_convert = (dev->pci_regs[0x53] & 0x08);
+#endif
     dev->irq_convert = 1;
 
-    for (i = 0; i < 16; i++) {
+    for (uint8_t i = 0; i < 16; i++) {
         reg   = 0x88 + (i >> 1);
         shift = (i & 1) << 2;
         val   = (dev->pci_regs[reg] >> shift) & 0x0f;
@@ -127,8 +132,10 @@ static void
 opti822_pci_write(int func, int addr, uint8_t val, void *priv)
 {
     opti822_t *dev = (opti822_t *) priv;
-    int        irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
-    int        pin, slot;
+    int        irq;
+    int        irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
+    int        pin;
+    int        slot;
 
     opti822_log("opti822_write(%02X, %02X, %02X)\n", func, addr, val);
 
@@ -320,14 +327,17 @@ opti822_pci_write(int func, int addr, uint8_t val, void *priv)
             }
             opti822_update_irqs(dev, 1);
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti822_pci_read(int func, int addr, void *priv)
 {
-    opti822_t *dev = (opti822_t *) priv;
-    uint8_t    ret;
+    const opti822_t *dev = (opti822_t *) priv;
+    uint8_t          ret;
 
     ret = 0xff;
 
@@ -343,7 +353,6 @@ static void
 opti822_reset(void *priv)
 {
     opti822_t *dev = (opti822_t *) priv;
-    int        i;
 
     memset(dev->pci_regs, 0, 256);
 
@@ -366,7 +375,7 @@ opti822_reset(void *priv)
 
     dev->irq_convert = 1 /*0*/;
 
-    for (i = 0; i < 16; i++)
+    for (uint8_t i = 0; i < 16; i++)
         pci_set_irq_routing(PCI_INTA + i, PCI_IRQ_DISABLED);
 }
 
@@ -379,7 +388,7 @@ opti822_close(void *p)
 }
 
 static void *
-opti822_init(const device_t *info)
+opti822_init(UNUSED(const device_t *info))
 {
     opti822_t *dev = (opti822_t *) malloc(sizeof(opti822_t));
     memset(dev, 0, sizeof(opti822_t));

src/chipset/opti895.c

@@ -32,12 +32,12 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t idx, forced_green,
-        is_pci,
-        regs[256],
-        scratch[2];
+typedef struct opti895_t {
+    uint8_t idx;
+    uint8_t forced_green;
+    uint8_t is_pci;
+    uint8_t regs[256];
+    uint8_t scratch[2];
 
     smram_t *smram;
 } opti895_t;
@@ -64,7 +64,7 @@ static void
 opti895_recalc(opti895_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;
@@ -84,7 +84,7 @@ opti895_recalc(opti895_t *dev)
     else
         mem_set_mem_state_both(0xf0000, 0x10000, shflags);
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xd0000 + (i << 14);
 
         if (dev->regs[0x23] & (1 << i)) {
@@ -108,7 +108,7 @@ opti895_recalc(opti895_t *dev)
             mem_set_mem_state_both(base, 0x4000, shflags);
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xc0000 + (i << 14);
 
         if (dev->regs[0x26] & (1 << i)) {
@@ -184,6 +184,9 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
                             break;
                         }
                         break;
+
+                    default:
+                        break;
                 }
             }
             break;
@@ -192,14 +195,17 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
         case 0xe2:
             dev->scratch[addr - 0xe1] = val;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 opti895_read(uint16_t addr, void *priv)
 {
-    uint8_t    ret = 0xff;
-    opti895_t *dev = (opti895_t *) priv;
+    uint8_t          ret = 0xff;
+    const opti895_t *dev = (opti895_t *) priv;
 
     switch (addr) {
         case 0x23:
@@ -217,6 +223,9 @@ opti895_read(uint16_t addr, void *priv)
         case 0xe2:
             ret = dev->scratch[addr - 0xe1];
             break;
+
+        default:
+            break;
     }
 
     return ret;

src/chipset/scamp.c

@@ -31,6 +31,7 @@
 #include <86box/io.h>
 #include <86box/mem.h>
 #include <86box/nmi.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
@@ -66,20 +67,21 @@ enum {
     BANK_4M_INTERLEAVED
 };
 
-typedef struct {
+typedef struct ram_struct_t {
     void *parent;
     int   bank;
 } ram_struct_t;
 
-typedef struct {
+typedef struct ems_struct_t {
     void *parent;
     int   segment;
 } ems_struct_t;
 
-typedef struct {
+typedef struct scamp_t {
     int     cfg_index;
     uint8_t cfg_regs[256];
-    int     cfg_enable, ram_config;
+    int     cfg_enable;
+    int     ram_config;
 
     int           ems_index;
     int           ems_autoinc;
@@ -91,21 +93,23 @@ typedef struct {
     ram_struct_t  ram_struct[2];
     ems_struct_t  ems_struct[20];
 
-    uint32_t ram_virt_base[2], ram_phys_base[2];
+    uint32_t ram_virt_base[2];
+    uint32_t ram_phys_base[2];
     uint32_t ram_mask[2];
-    int      row_virt_shift[2], row_phys_shift[2];
-    int      ram_interleaved[2], ibank_shift[2];
+    int      row_virt_shift[2];
+    int      row_phys_shift[2];
+    int      ram_interleaved[2];
+    int      ibank_shift[2];
 
     port_92_t *port_92;
 } scamp_t;
 
-static const struct
-{
+static const struct {
     int size_kb;
     int rammap;
     int bank[2];
 } ram_configs[] = {
-    {512,    0x0, { BANK_256K, BANK_NONE }                        },
+    {  512,  0x0, { BANK_256K, BANK_NONE }                        },
     { 1024,  0x1, { BANK_256K_INTERLEAVED, BANK_NONE }            },
     { 1536,  0x2, { BANK_256K_INTERLEAVED, BANK_256K }            },
     { 2048,  0x3, { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }},
@@ -118,12 +122,11 @@ static const struct
     { 16384, 0x9, { BANK_4M_INTERLEAVED, BANK_NONE }              },
 };
 
-static const struct
-{
+static const struct {
     int bank[2];
     int remapped;
 } rammap[16] = {
-    {{ BANK_256K, BANK_NONE },                          0},
+    { { BANK_256K, BANK_NONE },                         0},
     { { BANK_256K_INTERLEAVED, BANK_NONE },             0},
     { { BANK_256K_INTERLEAVED, BANK_256K },             0},
     { { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }, 0},
@@ -149,10 +152,12 @@ static const struct
 static uint8_t
 ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -178,10 +183,12 @@ ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv)
 static void
 ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -209,10 +216,12 @@ ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv)
 static uint8_t
 ram_mirrored_interleaved_read(uint32_t addr, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -238,10 +247,12 @@ ram_mirrored_interleaved_read(uint32_t addr, void *priv)
 static void
 ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte = addr & 1;
@@ -267,10 +278,12 @@ ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv)
 static uint8_t
 ram_mirrored_read(uint32_t addr, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte   = addr & 1;
@@ -284,10 +297,12 @@ ram_mirrored_read(uint32_t addr, void *priv)
 static void
 ram_mirrored_write(uint32_t addr, uint8_t val, void *priv)
 {
-    ram_struct_t *rs   = (ram_struct_t *) priv;
-    scamp_t      *dev  = rs->parent;
-    int           bank = rs->bank, byte;
-    int           row, column;
+    const ram_struct_t *rs   = (ram_struct_t *) priv;
+    const scamp_t      *dev  = rs->parent;
+    int                 bank = rs->bank;
+    int                 byte;
+    int                 row;
+    int                 column;
 
     addr -= dev->ram_virt_base[bank];
     byte   = addr & 1;
@@ -302,15 +317,16 @@ static void
 recalc_mappings(void *priv)
 {
     scamp_t *dev = (scamp_t *) priv;
-    int      c;
-    uint32_t virt_base  = 0, old_virt_base;
+    uint32_t virt_base  = 0;
+    uint32_t old_virt_base;
     uint8_t  cur_rammap = dev->cfg_regs[CFG_RAMMAP] & 0xf;
-    int      bank_nr    = 0, phys_bank;
+    int      bank_nr    = 0;
+    int      phys_bank;
 
     mem_set_mem_state_both((1 << 20), (16256 - 1024) * 1024, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
     mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
-    for (c = 0; c < 2; c++)
+    for (uint8_t c = 0; c < 2; c++)
         mem_mapping_disable(&dev->ram_mapping[c]);
 
     /* Once the BIOS programs the correct DRAM configuration, switch to regular
@@ -411,6 +427,9 @@ recalc_mappings(void *priv)
                     virt_base += (1 << 24);
                     dev->row_virt_shift[bank_nr] = 12;
                     break;
+
+                default:
+                    break;
             }
         } else {
             switch (rammap[cur_rammap].bank[bank_nr]) {
@@ -476,6 +495,9 @@ recalc_mappings(void *priv)
                     virt_base += (1 << 24);
                     dev->row_virt_shift[bank_nr] = 12;
                     break;
+
+                default:
+                    break;
             }
         }
         switch (rammap[cur_rammap].bank[bank_nr]) {
@@ -521,6 +543,9 @@ recalc_mappings(void *priv)
                                                 ram_mirrored_interleaved_write, NULL, NULL);
                 }
                 break;
+
+            default:
+                break;
         }
     }
 }
@@ -549,9 +574,9 @@ recalc_sltptr(scamp_t *dev)
 static uint8_t
 scamp_ems_read(uint32_t addr, void *priv)
 {
-    ems_struct_t *ems     = (ems_struct_t *) priv;
-    scamp_t      *dev     = ems->parent;
-    int           segment = ems->segment;
+    const ems_struct_t *ems     = (ems_struct_t *) priv;
+    const scamp_t      *dev     = ems->parent;
+    int                 segment = ems->segment;
 
     addr = (addr & 0x3fff) | dev->mappings[segment];
     return ram[addr];
@@ -560,9 +585,9 @@ scamp_ems_read(uint32_t addr, void *priv)
 static void
 scamp_ems_write(uint32_t addr, uint8_t val, void *priv)
 {
-    ems_struct_t *ems     = (ems_struct_t *) priv;
-    scamp_t      *dev     = ems->parent;
-    int           segment = ems->segment;
+    const ems_struct_t *ems     = (ems_struct_t *) priv;
+    const scamp_t      *dev     = ems->parent;
+    int                 segment = ems->segment;
 
     addr      = (addr & 0x3fff) | dev->mappings[segment];
     ram[addr] = val;
@@ -571,7 +596,6 @@ scamp_ems_write(uint32_t addr, uint8_t val, void *priv)
 static void
 recalc_ems(scamp_t *dev)
 {
-    int            segment;
     const uint32_t ems_base[12] = {
         0xc0000, 0xc4000, 0xc8000, 0xcc000,
         0xd0000, 0xd4000, 0xd8000, 0xdc000,
@@ -580,7 +604,7 @@ recalc_ems(scamp_t *dev)
     uint32_t new_mappings[20];
     uint16_t ems_enable;
 
-    for (segment = 0; segment < 20; segment++)
+    for (int segment = 0; segment < 20; segment++)
         new_mappings[segment] = 0xa0000 + segment * 0x4000;
 
     if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB)
@@ -588,7 +612,7 @@ recalc_ems(scamp_t *dev)
     else
         ems_enable = 0;
 
-    for (segment = 0; segment < 12; segment++) {
+    for (int segment = 0; segment < 12; segment++) {
         if (ems_enable & (1 << segment)) {
             uint32_t phys_addr = dev->ems[segment] << 14;
 
@@ -600,7 +624,7 @@ recalc_ems(scamp_t *dev)
         }
     }
 
-    for (segment = 0; segment < 20; segment++) {
+    for (int segment = 0; segment < 20; segment++) {
         if (new_mappings[segment] != dev->mappings[segment]) {
             dev->mappings[segment] = new_mappings[segment];
             if (new_mappings[segment] < (mem_size * 1024)) {
@@ -631,6 +655,8 @@ shadow_control(uint32_t addr, uint32_t size, int state, int ems_enable)
             case 3:
                 mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
                 break;
+            default:
+                break;
         }
 
     flushmmucache_nopc();
@@ -743,6 +769,8 @@ scamp_write(uint16_t addr, uint8_t val, void *priv)
                     case CFG_FEAXS:
                         shadow_recalc(dev);
                         break;
+                    default:
+                        break;
                 }
             }
             break;
@@ -754,6 +782,9 @@ scamp_write(uint16_t addr, uint8_t val, void *priv)
                 mem_a20_recalc();
             }
             break;
+
+        default:
+            break;
     }
 }
 
@@ -796,6 +827,9 @@ scamp_read(uint16_t addr, void *priv)
             softresetx86();
             cpu_set_edx();
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -810,10 +844,9 @@ scamp_close(void *priv)
 }
 
 static void *
-scamp_init(const device_t *info)
+scamp_init(UNUSED(const device_t *info))
 {
     uint32_t addr;
-    int      c;
     scamp_t *dev = (scamp_t *) malloc(sizeof(scamp_t));
     memset(dev, 0x00, sizeof(scamp_t));
 
@@ -834,7 +867,7 @@ scamp_init(const device_t *info)
     dev->ram_config = 0;
 
     /* Find best fit configuration for the requested memory size */
-    for (c = 0; c < NR_ELEMS(ram_configs); c++) {
+    for (uint8_t c = 0; c < NR_ELEMS(ram_configs); c++) {
         if (mem_size < ram_configs[c].size_kb)
             break;
 
@@ -850,7 +883,7 @@ scamp_init(const device_t *info)
     mem_mapping_set_exec(&ram_mid_mapping, ram + 0xf0000);
 
     addr = 0;
-    for (c = 0; c < 2; c++) {
+    for (uint8_t c = 0; c < 2; c++) {
         dev->ram_struct[c].parent = dev;
         dev->ram_struct[c].bank   = c;
         mem_mapping_add(&dev->ram_mapping[c], 0, 0,
@@ -911,12 +944,15 @@ scamp_init(const device_t *info)
                 dev->ibank_shift[c]     = 23;
                 dev->ram_interleaved[c] = 1;
                 break;
+
+            default:
+                break;
         }
     }
 
     mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
-    for (c = 0; c < 20; c++) {
+    for (uint8_t c = 0; c < 20; c++) {
         dev->ems_struct[c].parent  = dev;
         dev->ems_struct[c].segment = c;
         mem_mapping_add(&dev->ems_mappings[c],

src/chipset/scat.c

@@ -55,8 +55,9 @@
 #define SCATSX_HIGH_PERFORMANCE_REFRESH 0x63
 #define SCATSX_CAS_TIMING_FOR_DMA       0x64
 
-typedef struct {
-    uint8_t valid, pad;
+typedef struct ems_page_t {
+    uint8_t valid;
+    uint8_t pad;
 
     uint8_t regs_2x8;
     uint8_t regs_2x9;
@@ -75,7 +76,8 @@ typedef struct scat_t {
 
     int external_is_RAS;
 
-    ems_page_t null_page, page[32];
+    ems_page_t null_page;
+    ems_page_t page[32];
 
     mem_mapping_t low_mapping[32];
     mem_mapping_t remap_mapping[6];
@@ -113,13 +115,16 @@ static void    scat_out(uint16_t port, uint8_t val, void *priv);
 static void
 shadow_state_update(scat_t *dev)
 {
-    int i, val;
+    int val;
 
-    uint32_t base, bit, romcs, shflags = 0;
+    uint32_t base;
+    uint32_t bit;
+    uint32_t romcs;
+    uint32_t shflags = 0;
 
     shadowbios = shadowbios_write = 0;
 
-    for (i = 0; i < 24; i++) {
+    for (uint8_t i = 0; i < 24; i++) {
         if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) < 4)
             val = 0;
         else
@@ -150,7 +155,6 @@ static void
 set_xms_bound(scat_t *dev, uint8_t val)
 {
     uint32_t xms_max = ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0xfe0000 : 0xfc0000;
-    int      i;
 
     switch (val & 0x0f) {
         case 1:
@@ -245,7 +249,7 @@ set_xms_bound(scat_t *dev, uint8_t val)
     mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000,
                          ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0x60000 : 0x40000);
     if (dev->regs[SCAT_VERSION] & 0xf0) {
-        for (i = 0; i < 8; i++) {
+        for (uint8_t i = 0; i < 8; i++) {
             if (val & 0x10)
                 mem_mapping_disable(&bios_high_mapping);
             else
@@ -258,7 +262,8 @@ static uint32_t
 get_addr(scat_t *dev, uint32_t addr, ems_page_t *p)
 {
 #if 1
-    int      nbanks_2048k, nbanks_512k;
+    int      nbanks_2048k;
+    int      nbanks_512k;
     uint32_t addr2;
     int      nbank;
 #else
@@ -882,10 +887,11 @@ get_addr(scat_t *dev, uint32_t addr, ems_page_t *p)
 static void
 set_global_EMS_state(scat_t *dev, int state)
 {
-    uint32_t base_addr, virt_addr;
-    int      i, conf;
+    uint32_t base_addr;
+    uint32_t virt_addr;
+    int      conf;
 
-    for (i = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 24; i < 32; i++) {
+    for (uint32_t i = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 24; i < 32; i++) {
         base_addr = (i + 16) << 14;
 
         if (i >= 24)
@@ -927,9 +933,8 @@ static void
 memmap_state_update(scat_t *dev)
 {
     uint32_t addr;
-    int      i;
 
-    for (i = (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 16); i < 44; i++) {
+    for (uint8_t i = (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 16); i < 44; i++) {
         addr = get_addr(dev, 0x40000 + (i << 14), &dev->null_page);
         mem_mapping_set_exec(&dev->efff_mapping[i],
                              addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
@@ -943,37 +948,40 @@ memmap_state_update(scat_t *dev)
     mem_mapping_set_exec(&dev->low_mapping[1],
                          addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
 
-    for (i = 2; i < 32; i++) {
+    for (uint8_t i = 2; i < 32; i++) {
         addr = get_addr(dev, i << 19, &dev->null_page);
         mem_mapping_set_exec(&dev->low_mapping[i],
                              addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
     }
 
     if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) {
-        for (i = 0; i < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; i++)
-            mem_mapping_enable(&dev->low_mapping[i]);
+        uint8_t j = 0;
 
-        for (; i < 32; i++)
-            mem_mapping_disable(&dev->low_mapping[i]);
+        for (j = 0; j < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; j++)
+            mem_mapping_enable(&dev->low_mapping[j]);
 
-        for (i = 24; i < 36; i++) {
+        for (; j < 32; j++)
+            mem_mapping_disable(&dev->low_mapping[j]);
+
+        for (j = 24; j < 36; j++) {
             if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40)) < 4)
-                mem_mapping_disable(&dev->efff_mapping[i]);
+                mem_mapping_disable(&dev->efff_mapping[j]);
             else
-                mem_mapping_enable(&dev->efff_mapping[i]);
+                mem_mapping_enable(&dev->efff_mapping[j]);
         }
     } else {
-        for (i = 0; i < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; i++)
-            mem_mapping_enable(&dev->low_mapping[i]);
+        uint8_t j = 0;
+        for (j = 0; j < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; j++)
+            mem_mapping_enable(&dev->low_mapping[j]);
 
-        for (; i < 32; i++)
-            mem_mapping_disable(&dev->low_mapping[i]);
+        for (; j < 32; j++)
+            mem_mapping_disable(&dev->low_mapping[j]);
 
-        for (i = 24; i < 36; i++) {
+        for (j = 24; j < 36; j++) {
             if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 2 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)
-                mem_mapping_disable(&dev->efff_mapping[i]);
+                mem_mapping_disable(&dev->efff_mapping[j]);
             else
-                mem_mapping_enable(&dev->efff_mapping[i]);
+                mem_mapping_enable(&dev->efff_mapping[j]);
         }
     }
 
@@ -981,21 +989,21 @@ memmap_state_update(scat_t *dev)
         if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) {
             mem_mapping_disable(&dev->low_mapping[2]);
 
-            for (i = 0; i < 6; i++) {
+            for (uint8_t i = 0; i < 6; i++) {
                 addr = get_addr(dev, 0x100000 + (i << 16), &dev->null_page);
                 mem_mapping_set_exec(&dev->remap_mapping[i],
                                      addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
                 mem_mapping_enable(&dev->remap_mapping[i]);
             }
         } else {
-            for (i = 0; i < 6; i++)
+            for (uint8_t i = 0; i < 6; i++)
                 mem_mapping_disable(&dev->remap_mapping[i]);
 
             if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) > 4) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 3))
                 mem_mapping_enable(&dev->low_mapping[2]);
         }
     } else {
-        for (i = 0; i < 6; i++)
+        for (uint8_t i = 0; i < 6; i++)
             mem_mapping_disable(&dev->remap_mapping[i]);
 
         mem_mapping_enable(&dev->low_mapping[2]);
@@ -1003,18 +1011,19 @@ memmap_state_update(scat_t *dev)
 
     set_global_EMS_state(dev, dev->regs[SCAT_EMS_CONTROL] & 0x80);
 
-    flushmmucache_cr3();
+    flushmmucache_nopc();
 }
 
 static void
 scat_out(uint16_t port, uint8_t val, void *priv)
 {
-    scat_t *dev           = (scat_t *) priv;
-    uint8_t reg_valid     = 0,
-            shadow_update = 0,
-            map_update    = 0,
-            indx;
-    uint32_t base_addr, virt_addr;
+    scat_t  *dev           = (scat_t *) priv;
+    uint8_t  reg_valid     = 0;
+    uint8_t  shadow_update = 0;
+    uint8_t  map_update    = 0;
+    uint8_t  indx;
+    uint32_t base_addr;
+    uint32_t virt_addr;
 
     switch (port) {
         case 0x22:
@@ -1186,14 +1195,18 @@ scat_out(uint16_t port, uint8_t val, void *priv)
             if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4)))
                 dev->reg_2xA = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? val : val & 0xc3;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 scat_in(uint16_t port, void *priv)
 {
-    scat_t *dev = (scat_t *) priv;
-    uint8_t ret = 0xff, indx;
+    const scat_t *dev = (scat_t *) priv;
+    uint8_t       ret = 0xff;
+    uint8_t       indx;
 
     switch (port) {
         case 0x23:
@@ -1252,6 +1265,8 @@ scat_in(uint16_t port, void *priv)
             if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4)))
                 ret = dev->reg_2xA;
             break;
+        default:
+            break;
     }
 
     return ret;
@@ -1304,7 +1319,8 @@ mem_write_scatb(uint32_t addr, uint8_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1322,7 +1338,8 @@ mem_write_scatw(uint32_t addr, uint16_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1340,7 +1357,8 @@ mem_write_scatl(uint32_t addr, uint32_t val, void *priv)
 {
     ems_page_t *page    = (ems_page_t *) priv;
     scat_t     *dev     = (scat_t *) page->scat;
-    uint32_t    oldaddr = addr, chkaddr;
+    uint32_t    oldaddr = addr;
+    uint32_t    chkaddr;
 
     addr    = get_addr(dev, addr, page);
     chkaddr = page->valid ? addr : oldaddr;
@@ -1365,7 +1383,8 @@ static void *
 scat_init(const device_t *info)
 {
     scat_t  *dev;
-    uint32_t i, k;
+    uint32_t j;
+    uint32_t k;
     int      sx;
 
     dev = (scat_t *) malloc(sizeof(scat_t));
@@ -1374,7 +1393,7 @@ scat_init(const device_t *info)
 
     sx = (dev->type == 32) ? 1 : 0;
 
-    for (i = 0; i < sizeof(dev->regs); i++)
+    for (uint32_t i = 0; i < sizeof(dev->regs); i++)
         dev->regs[i] = 0xff;
 
     if (sx) {
@@ -1418,7 +1437,7 @@ scat_init(const device_t *info)
         mem_mapping_disable(&ram_mid_mapping);
     mem_mapping_disable(&ram_high_mapping);
 
-    k = (sx) ? 0x80000 : 0x40000;
+    k = sx ? 0x80000 : 0x40000;
 
     dev->null_page.valid    = 0;
     dev->null_page.regs_2x8 = 0xff;
@@ -1435,7 +1454,7 @@ scat_init(const device_t *info)
                     mem_write_scatb, mem_write_scatw, mem_write_scatl,
                     ram + 0xf0000, MEM_MAPPING_INTERNAL, &dev->null_page);
 
-    for (i = 2; i < 32; i++) {
+    for (uint8_t i = 2; i < 32; i++) {
         mem_mapping_add(&dev->low_mapping[i], (i << 19), 0x80000,
                         mem_read_scatb, mem_read_scatw, mem_read_scatl,
                         mem_write_scatb, mem_write_scatw, mem_write_scatl,
@@ -1443,27 +1462,27 @@ scat_init(const device_t *info)
     }
 
     if (sx) {
-        i = 16;
+        j = 16;
         k = 0x40000;
     } else {
-        i = 0;
+        j = 0;
         k = (dev->regs[SCAT_VERSION] < 4) ? 0x40000 : 0x60000;
     }
     mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000, k);
 
-    for (; i < 44; i++) {
-        mem_mapping_add(&dev->efff_mapping[i], 0x40000 + (i << 14), 0x4000,
+    for (; j < 44; j++) {
+        mem_mapping_add(&dev->efff_mapping[j], 0x40000 + (j << 14), 0x4000,
                         mem_read_scatb, mem_read_scatw, mem_read_scatl,
                         mem_write_scatb, mem_write_scatw, mem_write_scatl,
-                        mem_size > (256 + (i << 4)) ? ram + 0x40000 + (i << 14) : NULL,
+                        mem_size > (256 + (j << 4)) ? ram + 0x40000 + (j << 14) : NULL,
                         MEM_MAPPING_INTERNAL, &dev->null_page);
 
         if (sx)
-            mem_mapping_enable(&dev->efff_mapping[i]);
+            mem_mapping_enable(&dev->efff_mapping[j]);
     }
 
     if (sx) {
-        for (i = 24; i < 32; i++) {
+        for (uint8_t i = 24; i < 32; i++) {
             dev->page[i].valid    = 1;
             dev->page[i].regs_2x8 = 0xff;
             dev->page[i].regs_2x9 = 0x03;
@@ -1475,7 +1494,7 @@ scat_init(const device_t *info)
             mem_mapping_disable(&dev->ems_mapping[i]);
         }
     } else {
-        for (i = 0; i < 32; i++) {
+        for (uint8_t i = 0; i < 32; i++) {
             dev->page[i].valid    = 1;
             dev->page[i].regs_2x8 = 0xff;
             dev->page[i].regs_2x9 = 0x03;
@@ -1488,7 +1507,7 @@ scat_init(const device_t *info)
         }
     }
 
-    for (i = 0; i < 6; i++) {
+    for (uint8_t i = 0; i < 6; i++) {
         mem_mapping_add(&dev->remap_mapping[i], 0x100000 + (i << 16), 0x10000,
                         mem_read_scatb, mem_read_scatw, mem_read_scatl,
                         mem_write_scatb, mem_write_scatw, mem_write_scatl,
@@ -1511,7 +1530,7 @@ scat_init(const device_t *info)
 
     device_add(&port_92_device);
 
-    return (dev);
+    return dev;
 }
 
 const device_t scat_device = {

src/chipset/sis_5511.c

@@ -32,6 +32,7 @@
 #include <86box/hdc_ide.h>
 #include <86box/hdc_ide_sff8038i.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/smram.h>
 
@@ -65,10 +66,13 @@ sis_5511_log(const char *fmt, ...)
 #endif
 
 typedef struct sis_5511_t {
-    uint8_t pci_conf[256], pci_conf_sb[2][256],
-        index, regs[16];
+    uint8_t pci_conf[256];
+    uint8_t pci_conf_sb[2][256];
+    uint8_t index;
+    uint8_t regs[16];
 
-    int nb_pci_slot, sb_pci_slot;
+    int nb_pci_slot;
+    int sb_pci_slot;
 
     sff8038i_t *ide_drive[2];
     smram_t    *smram;
@@ -79,10 +83,10 @@ typedef struct sis_5511_t {
 static void
 sis_5511_shadow_recalc(sis_5511_t *dev)
 {
-    int      i, state;
+    int      state;
     uint32_t base;
 
-    for (i = 0x80; i <= 0x86; i++) {
+    for (uint8_t i = 0x80; i <= 0x86; i++) {
         if (i == 0x86) {
             state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
             state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
@@ -121,6 +125,9 @@ sis_5511_smram_recalc(sis_5511_t *dev)
         case 2:
             smram_enable(dev->smram, 0x000e0000, 0x000b0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1);
             break;
+
+        default:
+            break;
     }
 
     flushmmucache();
@@ -153,7 +160,7 @@ sis_5513_bm_handler(sis_5511_t *dev)
 }
 
 static void
-sis_5511_write(int func, int addr, uint8_t val, void *priv)
+sis_5511_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     sis_5511_t *dev = (sis_5511_t *) priv;
 
@@ -331,14 +338,18 @@ sis_5511_write(int func, int addr, uint8_t val, void *priv)
         case 0x93: /* 5512 General Purpose Register Index */
             dev->pci_conf[addr] = val;
             break;
+
+        default:
+            break;
     }
     sis_5511_log("SiS 5511: dev->pci_conf[%02x] = %02x POST: %02x\n", addr, dev->pci_conf[addr], inb(0x80));
 }
 
 static uint8_t
-sis_5511_read(int func, int addr, void *priv)
+sis_5511_read(UNUSED(int func), int addr, void *priv)
 {
-    sis_5511_t *dev = (sis_5511_t *) priv;
+    const sis_5511_t *dev = (sis_5511_t *) priv;
+
     sis_5511_log("SiS 5511: dev->pci_conf[%02x] (%02x) POST %02x\n", addr, dev->pci_conf[addr], inb(0x80));
     return dev->pci_conf[addr];
 }
@@ -428,6 +439,9 @@ sis_5513_pci_to_isa_write(int addr, uint8_t val, sis_5511_t *dev)
         case 0x6a: /* GPIO Status Register */
             dev->pci_conf_sb[0][addr] &= val & 0x15;
             break;
+
+        default:
+            break;
     }
 }
 
@@ -514,6 +528,9 @@ sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev)
         case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */
             dev->pci_conf_sb[1][addr] = val;
             break;
+
+        default:
+            break;
     }
 }
 
@@ -528,6 +545,9 @@ sis_5513_write(int func, int addr, uint8_t val, void *priv)
         case 1:
             sis_5513_ide_write(addr, val, dev);
             break;
+
+        default:
+            break;
     }
     sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST: %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80));
 }
@@ -535,7 +555,7 @@ sis_5513_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 sis_5513_read(int func, int addr, void *priv)
 {
-    sis_5511_t *dev = (sis_5511_t *) priv;
+    const sis_5511_t *dev = (sis_5511_t *) priv;
 
     sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80));
     if ((func >= 0) && (func <= 1))
@@ -567,6 +587,9 @@ sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv)
                         case 2:
                             cpu_set_isa_pci_div(3);
                             break;
+
+                        default:
+                            break;
                     }
                     break;
                 case 0x01:
@@ -587,16 +610,22 @@ sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x0b:
                     dev->regs[dev->index] = val;
                     break;
+
+                default:
+                    break;
             }
             sis_5511_log("SiS 5513-ISA: dev->regs[%02x] = %02x POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80));
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 sis_5513_isa_read(uint16_t addr, void *priv)
 {
-    sis_5511_t *dev = (sis_5511_t *) priv;
+    const sis_5511_t *dev = (sis_5511_t *) priv;
 
     if (addr == 0x23) {
         sis_5511_log("SiS 5513-ISA: dev->regs[%02x] (%02x) POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80));
@@ -700,7 +729,7 @@ sis_5511_close(void *priv)
 }
 
 static void *
-sis_5511_init(const device_t *info)
+sis_5511_init(UNUSED(const device_t *info))
 {
     sis_5511_t *dev = (sis_5511_t *) malloc(sizeof(sis_5511_t));
     memset(dev, 0, sizeof(sis_5511_t));

src/chipset/sis_5571.c

@@ -29,6 +29,8 @@
 #include <86box/dma.h>
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/pic.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/hdc_ide.h>
 #include <86box/hdc_ide_sff8038i.h>
@@ -73,15 +75,19 @@ sis_5571_log(const char *fmt, ...)
 #endif
 
 typedef struct sis_5571_t {
-    uint8_t pci_conf[256], pci_conf_sb[3][256];
+    uint8_t pci_conf[256];
+    uint8_t pci_conf_sb[3][256];
 
-    int nb_pci_slot, sb_pci_slot;
+    int nb_pci_slot;
+    int sb_pci_slot;
 
     port_92_t  *port_92;
     sff8038i_t *ide_drive[2];
     smram_t    *smram;
     usb_t      *usb;
 
+    usb_params_t usb_params;
+
 } sis_5571_t;
 
 static void
@@ -114,6 +120,9 @@ sis_5571_smm_recalc(sis_5571_t *dev)
         case 0x03:
             smram_enable(dev->smram, 0xa0000, 0xa0000, 0x10000, (dev->pci_conf[0xa3] & 0x10), 1);
             break;
+
+        default:
+            break;
     }
 
     flushmmucache();
@@ -146,7 +155,7 @@ sis_5571_bm_handler(sis_5571_t *dev)
 }
 
 static void
-memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
+memory_pci_bridge_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     sis_5571_t *dev = (sis_5571_t *) priv;
 
@@ -321,14 +330,18 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
             dev->pci_conf[addr] = val & 0xd0;
             sis_5571_smm_recalc(dev);
             break;
+
+        default:
+            break;
     }
     sis_5571_log("SiS5571: dev->pci_conf[%02x] = %02x\n", addr, val);
 }
 
 static uint8_t
-memory_pci_bridge_read(int func, int addr, void *priv)
+memory_pci_bridge_read(UNUSED(int func), int addr, void *priv)
 {
-    sis_5571_t *dev = (sis_5571_t *) priv;
+    const sis_5571_t *dev = (sis_5571_t *) priv;
+
     sis_5571_log("SiS5571: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]);
     return dev->pci_conf[addr];
 }
@@ -372,6 +385,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
                         case 2:
                             cpu_set_isa_pci_div(3);
                             break;
+
+                        default:
+                            break;
                     }
                     break;
 
@@ -495,6 +511,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
                 case 0x77: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */
                     dev->pci_conf_sb[0][addr] = val;
                     break;
+
+                default:
+                    break;
             }
             sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] = %02x\n", addr, val);
             break;
@@ -574,6 +593,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
                 case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */
                     dev->pci_conf_sb[1][addr] = val;
                     break;
+
+                default:
+                    break;
             }
             sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] = %02x\n", addr, val);
             break;
@@ -612,15 +634,22 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
                 case 0x3c: /* Interrupt Line */
                     dev->pci_conf_sb[2][addr] = val;
                     break;
+
+                default:
+                    break;
             }
             sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val);
+            break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 pci_isa_bridge_read(int func, int addr, void *priv)
 {
-    sis_5571_t *dev = (sis_5571_t *) priv;
+    const sis_5571_t *dev = (sis_5571_t *) priv;
 
     switch (func) {
         case 0:
@@ -632,11 +661,49 @@ pci_isa_bridge_read(int func, int addr, void *priv)
         case 2:
             sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[2][addr]);
             return dev->pci_conf_sb[2][addr];
+
         default:
             return 0xff;
     }
 }
 
+static void
+sis_5571_usb_update_interrupt(usb_t* usb, void* priv)
+{
+    const sis_5571_t *dev = (sis_5571_t *) priv;
+
+    if (dev->pci_conf_sb[0][0x68] & 0x80) {
+        /* TODO: Is the normal PCI interrupt inhibited when USB IRQ remapping is enabled? */
+        switch (dev->pci_conf_sb[0][0x68] & 0x0F) {
+            case 0x00:
+            case 0x01:
+            case 0x02:
+            case 0x08:
+            case 0x0d:
+                break;
+
+            default:
+                if (usb->irq_level)
+                    picint(1 << dev->pci_conf_sb[0][0x68] & 0x0f);
+                else
+                    picintc(1 << dev->pci_conf_sb[0][0x68] & 0x0f);
+                break;
+        }
+    } else {
+        if (usb->irq_level)
+            pci_set_irq(dev->sb_pci_slot, PCI_INTA);
+        else
+            pci_clear_irq(dev->sb_pci_slot, PCI_INTA);
+    }
+}
+
+static uint8_t
+sis_5571_usb_handle_smi(UNUSED(usb_t* usb), UNUSED(void* priv))
+{
+    /* Left unimplemented for now. */
+    return 1;
+}
+
 static void
 sis_5571_reset(void *priv)
 {
@@ -701,7 +768,7 @@ sis_5571_close(void *priv)
 }
 
 static void *
-sis_5571_init(const device_t *info)
+sis_5571_init(UNUSED(const device_t *info))
 {
     sis_5571_t *dev = (sis_5571_t *) malloc(sizeof(sis_5571_t));
     memset(dev, 0x00, sizeof(sis_5571_t));
@@ -721,7 +788,10 @@ sis_5571_init(const device_t *info)
     dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2);
 
     /* USB */
-    dev->usb = device_add(&usb_device);
+    dev->usb_params.parent_priv      = dev;
+    dev->usb_params.update_interrupt = sis_5571_usb_update_interrupt;
+    dev->usb_params.smi_handle       = sis_5571_usb_handle_smi;
+    dev->usb                         = device_add_parameters(&usb_device, &dev->usb_params);
 
     sis_5571_reset(dev);
 

src/chipset/sis_85c310.c

@@ -10,18 +10,20 @@
 #include <86box/io.h>
 #include <86box/device.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t cur_reg, tries,
-        regs[258];
+typedef struct rabbit_t {
+    uint8_t cur_reg;
+    uint8_t tries;
+    uint8_t regs[258];
 } rabbit_t;
 
 static void
 rabbit_recalcmapping(rabbit_t *dev)
 {
-    uint32_t shread, shwrite;
+    uint32_t shread;
+    uint32_t shwrite;
     uint32_t shflags = 0;
 
     shread  = !!(dev->regs[0x101] & 0x40);
@@ -63,6 +65,8 @@ rabbit_recalcmapping(rabbit_t *dev)
             /* 128K at 0E0000-0FFFFF */
             mem_set_mem_state(0x000e0000, 0x00020000, shflags);
             break;
+        default:
+            break;
     }
 
     flushmmucache();
@@ -88,6 +92,8 @@ rabbit_write(uint16_t addr, uint8_t val, void *priv)
             } else
                 dev->regs[dev->cur_reg] = val;
             break;
+        default:
+            break;
     }
 }
 
@@ -105,6 +111,9 @@ rabbit_read(uint16_t addr, void *priv)
             } else
                 ret = dev->regs[dev->cur_reg];
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -119,7 +128,7 @@ rabbit_close(void *priv)
 }
 
 static void *
-rabbit_init(const device_t *info)
+rabbit_init(UNUSED(const device_t *info))
 {
     rabbit_t *dev = (rabbit_t *) malloc(sizeof(rabbit_t));
     memset(dev, 0, sizeof(rabbit_t));

src/chipset/sis_85c496.c

@@ -32,16 +32,25 @@
 #include <86box/dma.h>
 #include <86box/nvr.h>
 #include <86box/pic.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/hdc_ide.h>
 #include <86box/machine.h>
 #include <86box/chipset.h>
 #include <86box/spd.h>
+#ifndef USE_DRB_HACK
+#include <86box/row.h>
+#endif
 
 typedef struct sis_85c496_t {
-    uint8_t cur_reg, rmsmiblk_count,
-        regs[127],
-        pci_conf[256];
+    uint8_t    cur_reg;
+    uint8_t    rmsmiblk_count;
+#ifndef USE_DRB_HACK
+    uint8_t    drb_default;
+    uint8_t    drb_bits;
+#endif
+    uint8_t    regs[127];
+    uint8_t    pci_conf[256];
     smram_t   *smram;
     pc_timer_t rmsmiblk_timer;
     port_92_t *port_92;
@@ -98,14 +107,16 @@ sis_85c497_isa_write(uint16_t port, uint8_t val, void *priv)
                 dev->regs[dev->cur_reg] = val & 0xfc;
                 dma_set_mask((val & 0x80) ? 0xffffffff : 0x00ffffff);
                 break;
+            default:
+                break;
         }
 }
 
 static uint8_t
 sis_85c497_isa_read(uint16_t port, void *priv)
 {
-    sis_85c496_t *dev = (sis_85c496_t *) priv;
-    uint8_t       ret = 0xff;
+    const sis_85c496_t *dev = (sis_85c496_t *) priv;
+    uint8_t             ret = 0xff;
 
     if (port == 0x23)
         ret = dev->regs[dev->cur_reg];
@@ -121,12 +132,12 @@ static void
 sis_85c496_recalcmapping(sis_85c496_t *dev)
 {
     uint32_t base;
-    uint32_t i, shflags = 0;
+    uint32_t shflags = 0;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xc0000 + (i << 15);
 
         if (dev->pci_conf[0x44] & (1 << i)) {
@@ -180,14 +191,37 @@ sis_85c496_ide_handler(sis_85c496_t *dev)
     }
 }
 
+#ifndef USE_DRB_HACK
+static void
+sis_85c496_drb_recalc(sis_85c496_t *dev)
+{
+    int i;
+    uint32_t boundary;
+
+    for (i = 7; i >= 0; i--)
+        row_disable(i);
+
+    for (i = 0; i <= 7; i++) {
+        boundary = ((uint32_t) dev->pci_conf[0x48 + i]);
+        row_set_boundary(i, boundary);
+    }
+
+    flushmmucache();
+}
+#endif
+
+
 /* 00 - 3F = PCI Configuration, 40 - 7F = 85C496, 80 - FF = 85C497 */
 static void
-sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
+sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     sis_85c496_t *dev = (sis_85c496_t *) priv;
-    uint8_t       old, valxor;
+    uint8_t       old;
+    uint8_t       valxor;
     uint8_t       smm_irq[4] = { 10, 11, 12, 15 };
-    uint32_t      host_base, ram_base, size;
+    uint32_t      host_base;
+    uint32_t      ram_base;
+    uint32_t      size;
 
     old    = dev->pci_conf[addr];
     valxor = (dev->pci_conf[addr]) ^ val;
@@ -252,8 +286,12 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
         case 0x4d:
         case 0x4e:
         case 0x4f:
-            // dev->pci_conf[addr] = val;
+#ifdef USE_DRB_HACK
             spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1);
+#else
+            dev->pci_conf[addr] = val;
+            sis_85c496_drb_recalc(dev);
+#endif
             break;
         case 0x50:
         case 0x51: /* Exclusive Area 0 Setup */
@@ -318,6 +356,8 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
                             host_base = 0x000e0000;
                             ram_base  = 0x000b0000;
                             break;
+                        default:
+                            break;
                     }
 
                     smram_enable(dev->smram, host_base, ram_base, size,
@@ -456,14 +496,17 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
             dev->pci_conf[addr] = val & 0x6e;
             nvr_bank_set(0, !!(val & 0x40), dev->nvr);
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-sis_85c49x_pci_read(int func, int addr, void *priv)
+sis_85c49x_pci_read(UNUSED(int func), int addr, void *priv)
 {
-    sis_85c496_t *dev = (sis_85c496_t *) priv;
-    uint8_t       ret = dev->pci_conf[addr];
+    const sis_85c496_t *dev = (sis_85c496_t *) priv;
+    uint8_t             ret = dev->pci_conf[addr];
 
     switch (addr) {
         case 0xa0:
@@ -478,6 +521,9 @@ sis_85c49x_pci_read(int func, int addr, void *priv)
         case 0x83: /*Port 70h Mirror*/
             ret = inb(0x70);
             break;
+
+        default:
+            break;
     }
 
     sis_85c496_log("[%04X:%08X] PCI Read  %02X from %02X:%02X\n", CS, cpu_state.pc, ret, func, addr);
@@ -526,7 +572,6 @@ static void
 sis_85c496_reset(void *priv)
 {
     sis_85c496_t *dev = (sis_85c496_t *) priv;
-    int           i;
 
     sis_85c49x_pci_write(0, 0x44, 0x00, dev);
     sis_85c49x_pci_write(0, 0x45, 0x00, dev);
@@ -535,8 +580,8 @@ sis_85c496_reset(void *priv)
     sis_85c49x_pci_write(0, 0x5a, 0x00, dev);
     // sis_85c49x_pci_write(0, 0x5a, 0x06, dev);
 
-    for (i = 0; i < 8; i++)
-        sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev);
+    for (uint8_t i = 0; i < 8; i++)
+        dev->pci_conf[0x48 + i] = 0x02;
 
     sis_85c49x_pci_write(0, 0x80, 0x00, dev);
     sis_85c49x_pci_write(0, 0x81, 0x00, dev);
@@ -605,7 +650,9 @@ static void
 
     pci_add_card(PCI_ADD_NORTHBRIDGE, sis_85c49x_pci_read, sis_85c49x_pci_write, dev);
 
-    // sis_85c497_isa_reset(dev);
+#if 0
+    sis_85c497_isa_reset(dev);
+#endif
 
     dev->port_92 = device_add(&port_92_device);
     port_92_set_period(dev->port_92, 2ULL * TIMER_USEC);
@@ -625,6 +672,11 @@ static void
 
     timer_add(&dev->rmsmiblk_timer, sis_85c496_rmsmiblk_count, dev, 0);
 
+#ifndef USE_DRB_HACK
+    row_device.local = 7 | (1 << 8) | (0x02 << 16) | (8 << 24);
+    device_add((const device_t *) &row_device);
+#endif
+
     sis_85c496_reset(dev);
 
     return dev;

src/chipset/sis_85c4xx.c

@@ -28,6 +28,7 @@
 #include <86box/timer.h>
 #include <86box/io.h>
 #include <86box/device.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/mem.h>
 #include <86box/smram.h>
@@ -35,14 +36,19 @@
 #include <86box/machine.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t cur_reg, tries,
-        reg_base, reg_last,
-        reg_00, is_471,
-        force_flush, shadowed,
-        smram_enabled, pad,
-        regs[39], scratch[2];
+typedef struct sis_85c4xx_t {
+    uint8_t    cur_reg;
+    uint8_t    tries;
+    uint8_t    reg_base;
+    uint8_t    reg_last;
+    uint8_t    reg_00;
+    uint8_t    is_471;
+    uint8_t    force_flush;
+    uint8_t    shadowed;
+    uint8_t    smram_enabled;
+    uint8_t    pad;
+    uint8_t    regs[39];
+    uint8_t    scratch[2];
     uint32_t   mem_state[8];
     smram_t   *smram;
     port_92_t *port_92;
@@ -62,10 +68,13 @@ sis_85c4xx_recalcremap(sis_85c4xx_t *dev)
 static void
 sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
 {
-    uint32_t base, n    = 0;
-    uint32_t i, shflags = 0;
-    uint32_t readext, writeext;
-    uint8_t  romcs = 0xc0, cur_romcs;
+    uint32_t base;
+    uint32_t n         = 0;
+    uint32_t shflags   = 0;
+    uint32_t readext;
+    uint32_t writeext;
+    uint8_t  romcs     = 0xc0;
+    uint8_t  cur_romcs;
 
     dev->shadowed = 0x00;
 
@@ -79,7 +88,7 @@ sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
     if (dev->regs[0x08] & 0x04)
         romcs |= 0x02;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base      = 0xc0000 + (i << 15);
         cur_romcs = romcs & (1 << i);
         readext   = cur_romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL;
@@ -121,7 +130,7 @@ sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
 }
 
 static void
-sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv)
+sis_85c4xx_sw_smi_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv)
 {
     sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
 
@@ -155,7 +164,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
     sis_85c4xx_t *dev       = (sis_85c4xx_t *) priv;
     uint8_t       rel_reg   = dev->cur_reg - dev->reg_base;
     uint8_t       valxor    = 0x00;
-    uint32_t      host_base = 0x000e0000, ram_base = 0x000a0000;
+    uint32_t      host_base = 0x000e0000;
+    uint32_t      ram_base  = 0x000a0000;
 
     switch (port) {
         case 0x22:
@@ -231,6 +241,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
                                 port_92_add(dev->port_92);
                         }
                         break;
+                    default:
+                        break;
                 }
             } else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00))
                 dev->reg_00 = val;
@@ -241,6 +253,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
         case 0xe2:
             dev->scratch[port - 0xe1] = val;
             return;
+        default:
+            break;
     }
 }
 
@@ -269,6 +283,10 @@ sis_85c4xx_in(uint16_t port, void *priv)
         case 0xe1:
         case 0xe2:
             ret = dev->scratch[port - 0xe1];
+            break;
+
+        default:
+            break;
     }
 
     return ret;

src/chipset/sis_85c50x.c

@@ -29,6 +29,9 @@
 #include <86box/timer.h>
 
 #include <86box/apm.h>
+#include <86box/machine.h>
+#include <86box/pic.h>
+#include <86box/plat_unused.h>
 #include <86box/mem.h>
 #include <86box/smram.h>
 #include <86box/pci.h>
@@ -55,9 +58,10 @@ sis_85c50x_log(const char *fmt, ...)
 #endif
 
 typedef struct sis_85c50x_t {
-    uint8_t index,
-        pci_conf[256], pci_conf_sb[256],
-        regs[256];
+    uint8_t index;
+    uint8_t pci_conf[256];
+    uint8_t pci_conf_sb[256];
+    uint8_t regs[256];
 
     smram_t   *smram[2];
     port_92_t *port_92;
@@ -66,7 +70,9 @@ typedef struct sis_85c50x_t {
 static void
 sis_85c50x_shadow_recalc(sis_85c50x_t *dev)
 {
-    uint32_t base, i, can_read, can_write;
+    uint32_t base;
+    uint32_t can_read;
+    uint32_t can_write;
 
     can_read  = (dev->pci_conf[0x53] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
     can_write = (dev->pci_conf[0x53] & 0x20) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL;
@@ -77,7 +83,7 @@ sis_85c50x_shadow_recalc(sis_85c50x_t *dev)
     shadowbios       = 1;
     shadowbios_write = 1;
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xe0000 + (i << 14);
         mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x54] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
         base = 0xd0000 + (i << 14);
@@ -129,6 +135,8 @@ sis_85c50x_smm_recalc(sis_85c50x_t *dev)
             smram_enable(dev->smram[0], host_base, 0xb0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1);
             smram_enable(dev->smram[1], host_base ^ 0x00100000, 0xa0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1);
             break;
+        default:
+            break;
     }
 }
 
@@ -209,7 +217,10 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
                 dev->pci_conf[addr] = (val & 0x7f);
                 break;
             case 0x69:
-                dev->pci_conf[addr] &= ~(val);
+                dev->pci_conf[addr] &= ~val;
+                break;
+
+            default:
                 break;
         }
 }
@@ -217,8 +228,8 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 sis_85c50x_read(int func, int addr, void *priv)
 {
-    sis_85c50x_t *dev = (sis_85c50x_t *) priv;
-    uint8_t       ret = 0xff;
+    const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
+    uint8_t             ret = 0xff;
 
     if (func == 0x00)
         ret = dev->pci_conf[addr];
@@ -263,14 +274,17 @@ sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv)
             case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */
                 dev->pci_conf_sb[addr] = val;
                 break;
+
+            default:
+                break;
         }
 }
 
 static uint8_t
 sis_85c50x_sb_read(int func, int addr, void *priv)
 {
-    sis_85c50x_t *dev = (sis_85c50x_t *) priv;
-    uint8_t       ret = 0xff;
+    const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
+    uint8_t             ret = 0xff;
 
     if (func == 0x00)
         ret = dev->pci_conf_sb[addr];
@@ -310,16 +324,22 @@ sis_85c50x_isa_write(uint16_t addr, uint8_t val, void *priv)
                 case 0x85:
                     outb(0x70, val);
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 sis_85c50x_isa_read(uint16_t addr, void *priv)
 {
-    sis_85c50x_t *dev = (sis_85c50x_t *) priv;
-    uint8_t       ret = 0xff;
+    const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
+    uint8_t             ret = 0xff;
 
     switch (addr) {
         case 0x22:
@@ -332,6 +352,9 @@ sis_85c50x_isa_read(uint16_t addr, void *priv)
             else
                 ret = dev->regs[dev->index];
             break;
+
+        default:
+            break;
     }
 
     sis_85c50x_log("85C503 ISA: [R] (%04X) = %02X\n", addr, ret);
@@ -397,7 +420,7 @@ sis_85c50x_close(void *priv)
 }
 
 static void *
-sis_85c50x_init(const device_t *info)
+sis_85c50x_init(UNUSED(const device_t *info))
 {
     sis_85c50x_t *dev = (sis_85c50x_t *) malloc(sizeof(sis_85c50x_t));
     memset(dev, 0x00, sizeof(sis_85c50x_t));

src/chipset/stpc.c

@@ -30,6 +30,7 @@
 #include <86box/timer.h>
 #include <86box/pit.h>
 #include <86box/device.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/usb.h>
 #include <86box/hdc_ide.h>
@@ -65,7 +66,11 @@ typedef struct stpc_t {
     smram_t    *smram;
     usb_t      *usb;
     int         ide_slot;
+    int         usb_slot;
     sff8038i_t *bm[2];
+
+    /* Miscellaneous */
+    usb_params_t usb_params;
 } stpc_t;
 
 typedef struct stpc_serial_t {
@@ -100,15 +105,15 @@ stpc_log(const char *fmt, ...)
 static void
 stpc_recalcmapping(stpc_t *dev)
 {
-    uint8_t  reg, bitpair;
-    uint32_t base, size;
+    uint32_t base;
+    uint32_t size;
     int      state;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (reg = 0; reg <= 3; reg++) {
-        for (bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) {
+    for (uint8_t reg = 0; reg <= 3; reg++) {
+        for (uint8_t bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) {
             if (reg == 3) {
                 size = 0x10000;
                 base = 0xf0000;
@@ -161,8 +166,8 @@ stpc_host_write(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 stpc_host_read(uint16_t addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (addr == dev->host_base)
         ret = dev->host_offset;
@@ -191,8 +196,8 @@ stpc_localbus_write(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 stpc_localbus_read(uint16_t addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (addr == dev->localbus_base)
         ret = dev->localbus_offset;
@@ -244,6 +249,9 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv)
         case 0x52:
             val &= 0x70;
             break;
+
+        default:
+            break;
     }
 
     dev->pci_conf[0][addr] = val;
@@ -252,8 +260,8 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 stpc_nb_read(int func, int addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (func > 0)
         ret = 0xff;
@@ -267,7 +275,8 @@ stpc_nb_read(int func, int addr, void *priv)
 static void
 stpc_ide_handlers(stpc_t *dev, int bus)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     if (bus & 0x01) {
         ide_pri_disable();
@@ -427,14 +436,17 @@ stpc_ide_write(int func, int addr, uint8_t val, void *priv)
                 sff_bus_master_set_irq(0x00, dev->bm[1]);
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 stpc_ide_read(int func, int addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (func > 0)
         ret = 0xff;
@@ -484,6 +496,9 @@ stpc_isab_write(int func, int addr, uint8_t val, void *priv)
         case 0x05:
             val &= 0x01;
             break;
+
+        default:
+            break;
     }
 
     dev->pci_conf[1][addr] = val;
@@ -492,8 +507,8 @@ stpc_isab_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 stpc_isab_read(int func, int addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if ((func == 1) && (dev->local != STPC_ATLAS))
         ret = stpc_ide_read(0, addr, priv);
@@ -546,6 +561,8 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv)
             dev->pci_conf[3][addr] = val;
             ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1);
             break;
+        default:
+            break;
     }
 
     dev->pci_conf[3][addr] = val;
@@ -554,8 +571,8 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 stpc_usb_read(int func, int addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (func > 0)
         ret = 0xff;
@@ -597,14 +614,17 @@ stpc_remap_localbus(stpc_t *dev, uint16_t localbus_base)
 static uint8_t
 stpc_serial_handlers(uint8_t val)
 {
-    stpc_serial_t *dev = device_get_priv(&stpc_serial_device);
+    const stpc_serial_t *dev = device_get_priv(&stpc_serial_device);
+
     if (!dev) {
         stpc_log("STPC: Not remapping UARTs, disabled by strap (raw %02X)\n", val);
         return 0;
     }
 
-    uint16_t uart0_io = 0x3f8, uart1_io = 0x3f8;
-    uint8_t  uart0_irq = 4, uart1_irq = 3;
+    uint16_t uart0_io = 0x3f8;
+    uint16_t uart1_io = 0x3f8;
+    uint8_t  uart0_irq = 4;
+    uint8_t  uart1_irq = 3;
 
     if (val & 0x10)
         uart1_io &= 0xfeff;
@@ -713,6 +733,9 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv)
                 val &= 0xf1;
                 stpc_serial_handlers(val);
                 break;
+
+            default:
+                break;
         }
 
         dev->regs[dev->reg_offset] = val;
@@ -722,8 +745,8 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 stpc_reg_read(uint16_t addr, void *priv)
 {
-    stpc_t *dev = (stpc_t *) priv;
-    uint8_t ret;
+    const stpc_t *dev = (stpc_t *) priv;
+    uint8_t       ret;
 
     if (addr == 0x22)
         ret = dev->reg_offset;
@@ -870,6 +893,17 @@ stpc_setup(stpc_t *dev)
     pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
 }
 
+static void
+stpc_usb_update_interrupt(usb_t* usb, void* priv)
+{
+    const stpc_t *dev = (stpc_t *) priv;
+
+    if (usb->irq_level)
+        pci_set_irq(dev->usb_slot, PCI_INTA);
+    else
+        pci_clear_irq(dev->usb_slot, PCI_INTA);
+}
+
 static void
 stpc_close(void *priv)
 {
@@ -895,9 +929,13 @@ stpc_init(const device_t *info)
     pci_add_card(PCI_ADD_NORTHBRIDGE, stpc_nb_read, stpc_nb_write, dev);
     dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_isab_read, stpc_isab_write, dev);
     if (dev->local == STPC_ATLAS) {
+        dev->usb_params.smi_handle       = NULL;
+        dev->usb_params.update_interrupt = stpc_usb_update_interrupt;
+        dev->usb_params.parent_priv      = dev;
+
         dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_ide_read, stpc_ide_write, dev);
-        dev->usb      = device_add(&usb_device);
-        pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_usb_read, stpc_usb_write, dev);
+        dev->usb      = device_add_parameters(&usb_device, &dev->usb_params);
+        dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_usb_read, stpc_usb_write, dev);
     }
 
     dev->bm[0] = device_add_inst(&sff8038i_device, 1);
@@ -935,7 +973,7 @@ stpc_serial_close(void *priv)
 }
 
 static void *
-stpc_serial_init(const device_t *info)
+stpc_serial_init(UNUSED(const device_t *info))
 {
     stpc_log("STPC: serial_init()\n");
 
@@ -953,7 +991,8 @@ stpc_serial_init(const device_t *info)
 static void
 stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val)
 {
-    uint8_t old_addr = (dev->reg1 & 0x03), new_addr = (val & 0x03);
+    uint8_t old_addr = (dev->reg1 & 0x03);
+    uint8_t new_addr = (val & 0x03);
 
     switch (old_addr) {
         case 0x1:
@@ -967,6 +1006,8 @@ stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val)
         case 0x3:
             lpt2_remove();
             break;
+        default:
+            break;
     }
 
     switch (new_addr) {
@@ -1045,7 +1086,7 @@ stpc_lpt_close(void *priv)
 }
 
 static void *
-stpc_lpt_init(const device_t *info)
+stpc_lpt_init(UNUSED(const device_t *info))
 {
     stpc_log("STPC: lpt_init()\n");
 

src/chipset/umc_8886.c

@@ -121,10 +121,10 @@ umc_8886_log(const char *fmt, ...)
 #define SB_ID dev->sb_id
 
 typedef struct umc_8886_t {
-    uint8_t max_func,        /* Last function number */
-        pci_conf_sb[2][256]; /* PCI Registers */
-    uint16_t sb_id;          /* Southbridge Revision */
-    int      has_ide;        /* Check if Southbridge Revision is AF or F */
+    uint8_t max_func;            /* Last function number */
+    uint8_t pci_conf_sb[2][256]; /* PCI Registers */
+    uint16_t sb_id;              /* Southbridge Revision */
+    int      has_ide;            /* Check if Southbridge Revision is AF or F */
 } umc_8886_t;
 
 static void
@@ -202,7 +202,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                     case 0x56:
                         dev->pci_conf_sb[func][addr] = val;
 
-                        switch (val & 2) {
+                        switch (val & 3) {
                             case 0:
                                 cpu_set_isa_pci_div(3);
                                 break;
@@ -212,6 +212,8 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                             case 2:
                                 cpu_set_isa_pci_div(2);
                                 break;
+                            default:
+                                break;
                         }
 
                         break;
@@ -250,6 +252,9 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                     case 0xa5 ... 0xa8:
                         dev->pci_conf_sb[func][addr] = val;
                         break;
+
+                    default:
+                        break;
                 }
                 break;
 
@@ -271,16 +276,21 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                     case 0x41:
                         dev->pci_conf_sb[func][addr] = val;
                         break;
+
+                    default:
+                        break;
                 }
                 break;
+            default:
+                break;
         }
 }
 
 static uint8_t
 umc_8886_read(int func, int addr, void *priv)
 {
-    umc_8886_t *dev = (umc_8886_t *) priv;
-    uint8_t     ret = 0xff;
+    const umc_8886_t *dev = (umc_8886_t *) priv;
+    uint8_t           ret = 0xff;
 
     if (func <= dev->max_func)
         ret = dev->pci_conf_sb[func][addr];
@@ -339,7 +349,7 @@ umc_8886_reset(void *priv)
         umc_8886_ide_handler(1);
     }
 
-    for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */
+    for (uint8_t i = 1; i < 5; i++) /* Disable all IRQ interrupts */
         pci_set_irq_routing(i, PCI_IRQ_DISABLED);
 
     cpu_set_isa_pci_div(3);

src/chipset/umc_hb4.c

@@ -106,6 +106,7 @@
 
 #include <86box/mem.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/smram.h>
 
@@ -142,9 +143,10 @@ hb4_log(const char *fmt, ...)
 #endif
 
 typedef struct hb4_t {
-    uint8_t shadow,
-        shadow_read, shadow_write,
-        pci_conf[256]; /* PCI Registers */
+    uint8_t  shadow;
+    uint8_t  shadow_read;
+    uint8_t  shadow_write;
+    uint8_t  pci_conf[256]; /* PCI Registers */
     int      mem_state[9];
     smram_t *smram[3]; /* SMRAM Handlers */
 } hb4_t;
@@ -191,10 +193,10 @@ hb4_shadow_bios_low(hb4_t *dev)
 int
 hb4_shadow_main(hb4_t *dev)
 {
-    int i, state;
+    int state;
     int n = 0;
 
-    for (i = 0; i < 6; i++) {
+    for (uint8_t i = 0; i < 6; i++) {
         state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> (i + 2)) & 0x01)] | shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
 
         if (state != dev->mem_state[i + 1]) {
@@ -261,7 +263,7 @@ hb4_smram(hb4_t *dev)
 }
 
 static void
-hb4_write(int func, int addr, uint8_t val, void *priv)
+hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
 {
     hb4_t *dev = (hb4_t *) priv;
 
@@ -322,14 +324,17 @@ hb4_write(int func, int addr, uint8_t val, void *priv)
         case 0x61:
             dev->pci_conf[addr] = val;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 hb4_read(int func, int addr, void *priv)
 {
-    hb4_t  *dev = (hb4_t *) priv;
-    uint8_t ret = 0xff;
+    const hb4_t  *dev = (hb4_t *) priv;
+    uint8_t       ret = 0xff;
 
     if (func == 0)
         ret = dev->pci_conf[addr];
@@ -383,7 +388,7 @@ hb4_close(void *priv)
 }
 
 static void *
-hb4_init(const device_t *info)
+hb4_init(UNUSED(const device_t *info))
 {
     hb4_t *dev = (hb4_t *) malloc(sizeof(hb4_t));
     memset(dev, 0, sizeof(hb4_t));

src/chipset/via_apollo.c

@@ -69,6 +69,8 @@ apollo_map(uint32_t addr, uint32_t size, int state)
         case 3:
             mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
             break;
+        default:
+            break;
     }
 
     flushmmucache_nopc();
@@ -392,8 +394,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
             smram_disable_all();
             if (dev->id >= VIA_691)
                 switch (val & 0x03) {
-                    case 0x00:
                     default:
+                    case 0x00:
                         apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */
                         apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); /* Non-SMM: Code PCI, Data PCI */
                         break;
@@ -412,8 +414,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
                 }
             else if (dev->id >= VIA_597)
                 switch (val & 0x03) {
-                    case 0x00:
                     default:
+                    case 0x00:
                         /* Disable SMI Address Redirection (default) */
                         apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0);
                         apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0);
@@ -458,6 +460,9 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
                         apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3);
                         apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3);
                         break;
+
+                    default:
+                        break;
                 }
             break;
         case 0x65:
@@ -532,7 +537,7 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
             break;
 
         case 0x70:
-            if ((dev->id >= VIA_693A))
+            if (dev->id >= VIA_693A)
                 dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xdf) | (val & 0xdf);
             else if (dev->id == VIA_597)
                 dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xf1) | (val & 0xf1);
@@ -666,13 +671,15 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
 static uint8_t
 via_apollo_read(int func, int addr, void *priv)
 {
-    via_apollo_t *dev = (via_apollo_t *) priv;
-    uint8_t       ret = 0xff;
+    const via_apollo_t *dev = (via_apollo_t *) priv;
+    uint8_t             ret = 0xff;
 
     switch (func) {
         case 0:
             ret = dev->pci_conf[addr];
             break;
+        default:
+            break;
     }
 
     return ret;
@@ -685,6 +692,8 @@ via_apollo_write(int func, int addr, uint8_t val, void *priv)
         case 0:
             via_apollo_host_bridge_write(func, addr, val, priv);
             break;
+        default:
+            break;
     }
 }
 
@@ -728,6 +737,9 @@ via_apollo_init(const device_t *info)
         case VIA_694:
             device_add(&via_mvp3_agp_device);
             break;
+
+        default:
+            break;
     }
 
     if (dev->id >= VIA_597)

src/chipset/via_pipc.c

@@ -41,6 +41,8 @@
 #include <86box/ddma.h>
 #include <86box/pci.h>
 #include <86box/pic.h>
+#include <86box/plat_fallthrough.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/hdc.h>
 #include <86box/hdc_ide.h>
@@ -59,13 +61,15 @@
 
 /* Most revision numbers (PCI-ISA bridge or otherwise) were lifted from PCI device
    listings on forums, as VIA's datasheets are not very helpful regarding those. */
-#define VIA_PIPC_586A 0x05862500
-#define VIA_PIPC_586B 0x05864700
-#define VIA_PIPC_596A 0x05960900
-#define VIA_PIPC_596B 0x05962300
-#define VIA_PIPC_686A 0x06861400
-#define VIA_PIPC_686B 0x06864000
-#define VIA_PIPC_8231 0x82311000
+#define VIA_PIPC_586A         0x05862500
+#define VIA_PIPC_586B         0x05864700
+#define VIA_PIPC_596A         0x05960900
+#define VIA_PIPC_596B         0x05962300
+#define VIA_PIPC_686A         0x06861400
+#define VIA_PIPC_686B         0x06864000
+#define VIA_PIPC_8231         0x82311000
+
+#define VIA_PIPC_FM_EMULATION 1
 
 enum {
     TRAP_DRQ = 0,
@@ -107,22 +111,28 @@ enum {
 typedef struct {
     struct _pipc_ *dev;
     void          *trap;
-    uint32_t      *sts_reg, *en_reg, mask;
+    uint32_t      *sts_reg;
+    uint32_t      *en_reg;
+    uint32_t       mask;
 } pipc_io_trap_t;
 
 typedef struct _pipc_ {
     uint32_t local;
-    uint8_t  max_func, max_pcs;
+    uint8_t  max_func;
+    uint8_t  max_pcs;
 
-    uint8_t pci_isa_regs[256],
-        ide_regs[256],
-        usb_regs[2][256],
-        power_regs[256],
-        ac97_regs[2][256], fmnmi_regs[4];
+    uint8_t pci_isa_regs[256];
+    uint8_t ide_regs[256];
+    uint8_t usb_regs[2][256];
+    uint8_t power_regs[256];
+    uint8_t ac97_regs[2][256];
+    uint8_t fmnmi_regs[4];
+    uint8_t fmnmi_status;
 
     sff8038i_t    *bm[2];
     nvr_t         *nvr;
-    int            nvr_enabled, slot;
+    int            nvr_enabled;
+    int            slot;
     ddma_t        *ddma;
     smbus_piix4_t *smbus;
     usb_t         *usb[2];
@@ -130,9 +140,14 @@ typedef struct _pipc_ {
     acpi_t        *acpi;
     pipc_io_trap_t io_traps[TRAP_MAX];
 
-    void    *gameport, *ac97, *sio, *hwm;
+    void    *gameport;
+    void    *ac97;
+    void    *sio;
+    void    *hwm;
     sb_t    *sb;
-    uint16_t midigame_base, sb_base, fmnmi_base;
+    uint16_t midigame_base;
+    uint16_t sb_base;
+    uint16_t fmnmi_base;
 } pipc_t;
 
 #ifdef ENABLE_PIPC_LOG
@@ -160,7 +175,7 @@ static uint8_t pipc_read(int func, int addr, void *priv);
 static void    pipc_write(int func, int addr, uint8_t val, void *priv);
 
 static void
-pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
+pipc_io_trap_pact(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNUSED(uint8_t val), void *priv)
 {
     pipc_io_trap_t *trap = (pipc_io_trap_t *) priv;
 
@@ -173,7 +188,7 @@ pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *pri
 }
 
 static void
-pipc_io_trap_glb(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
+pipc_io_trap_glb(UNUSED(int size), UNUSED(uint16_t addr), uint8_t write, UNUSED(uint8_t val), void *priv)
 {
     pipc_io_trap_t *trap = (pipc_io_trap_t *) priv;
 
@@ -330,6 +345,8 @@ pipc_reset_hard(void *priv)
             case VIA_PIPC_8231:
                 dev->usb_regs[i][0x08] = 0x1e;
                 break;
+            default:
+                break;
         }
 
         dev->usb_regs[i][0x0a] = 0x03;
@@ -390,6 +407,9 @@ pipc_reset_hard(void *priv)
             case VIA_PIPC_686B:
                 dev->power_regs[0x08] = 0x40;
                 break;
+
+            default:
+                break;
         }
         if (dev->local == VIA_PIPC_686B)
             dev->power_regs[0x34] = 0x68;
@@ -451,6 +471,9 @@ pipc_reset_hard(void *priv)
                 case VIA_PIPC_8231:
                     dev->ac97_regs[i][0x08] = (i == 0) ? 0x40 : 0x20;
                     break;
+
+                default:
+                    break;
             }
 
             if (i == 0) {
@@ -508,7 +531,8 @@ pipc_reset_hard(void *priv)
 static void
 pipc_ide_handlers(pipc_t *dev)
 {
-    uint16_t main, side;
+    uint16_t main;
+    uint16_t side;
 
     ide_pri_disable();
     ide_sec_disable();
@@ -571,10 +595,14 @@ pipc_bus_master_handlers(pipc_t *dev)
 static void
 pipc_pcs_update(pipc_t *dev)
 {
-    uint8_t  i, io_base_reg, io_mask_reg, io_mask_shift, enable;
-    uint16_t io_base, io_mask;
+    uint8_t  io_base_reg;
+    uint8_t  io_mask_reg;
+    uint8_t  io_mask_shift;
+    uint8_t  enable;
+    uint16_t io_base;
+    uint16_t io_mask;
 
-    for (i = 0; i <= dev->max_pcs; i++) {
+    for (uint8_t i = 0; i <= dev->max_pcs; i++) {
         if (i & 2) {
             io_base_reg = 0x8c;
             io_mask_reg = 0x8a;
@@ -648,7 +676,6 @@ static void
 pipc_trap_update_596(void *priv)
 {
     pipc_t *dev = (pipc_t *) priv;
-    int     i;
 
     /* TRAP_DRQ (00000001) and TRAP_PIRQ (00000002) not implemented. */
 
@@ -679,7 +706,7 @@ pipc_trap_update_596(void *priv)
        by the Positive Decoding Control registers. I couldn't probe this behavior on hardware.
        It's better to be safe and cover all of them than to assume Intel-like behavior (one range). */
 
-    for (i = 0; i < 3; i++) {
+    for (uint8_t i = 0; i < 3; i++) {
         pipc_trap_update_paden(dev, TRAP_AUD_MIDI_0 + i,
                                0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x01),
                                0x300 + (0x10 * i), 4);
@@ -724,8 +751,8 @@ pipc_codec_handlers(pipc_t *dev, uint8_t modem)
 static uint8_t
 pipc_fmnmi_read(uint16_t addr, void *priv)
 {
-    pipc_t *dev = (pipc_t *) priv;
-    uint8_t ret = dev->fmnmi_regs[addr & 0x03];
+    const pipc_t *dev = (pipc_t *) priv;
+    uint8_t       ret = dev->fmnmi_regs[addr & 0x03];
 
     pipc_log("PIPC: fmnmi_read(%02X) = %02X\n", addr & 0x03, ret);
 
@@ -760,10 +787,10 @@ pipc_fmnmi_handlers(pipc_t *dev, uint8_t modem)
 static uint8_t
 pipc_fm_read(uint16_t addr, void *priv)
 {
+    const pipc_t *dev = (pipc_t *) priv;
 #ifdef VIA_PIPC_FM_EMULATION
-    uint8_t ret = 0x00;
+    uint8_t ret = ((addr & 0x03) == 0x00) ? dev->fmnmi_status : 0x00;
 #else
-    pipc_t *dev = (pipc_t *) priv;
     uint8_t ret = dev->sb->opl.read(addr, dev->sb->opl.priv);
 #endif
 
@@ -784,12 +811,26 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv)
        index port, and only fires NMI/SMI when writing to the data port. */
     if (!(addr & 0x01)) {
         dev->fmnmi_regs[0x00] = (addr & 0x02) ? 0x02 : 0x01;
-        dev->fmnmi_regs[0x01] = val;
-    } else {
         dev->fmnmi_regs[0x02] = val;
+    } else {
+        dev->fmnmi_regs[0x01] = val;
+
+        /* TODO: Probe how real hardware handles OPL timers. This assumed implementation
+           just sets the relevant interrupt flags as soon as a timer is started. */
+        if (!(addr & 0x02) && (dev->fmnmi_regs[0x02] == 0x04)) {
+            if (val & 0x80)
+                dev->fmnmi_status = 0x00;
+            if ((val & 0x41) == 0x01)
+                dev->fmnmi_status |= 0x40;
+            if ((val & 0x22) == 0x02)
+                dev->fmnmi_status |= 0x20;
+            if (dev->fmnmi_status & 0x60)
+                dev->fmnmi_status |= 0x80;
+        }
 
         /* Fire NMI/SMI if enabled. */
         if (dev->ac97_regs[0][0x48] & 0x01) {
+            pipc_log("PIPC: Raising %s\n", (dev->ac97_regs[0][0x48] & 0x04) ? "SMI" : "NMI");
             if (dev->ac97_regs[0][0x48] & 0x04)
                 smi_raise();
             else
@@ -1047,6 +1088,10 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
 
                 break;
 
+            case 0x44:
+                dev->pci_isa_regs[0x44] = val;
+                break;
+
             case 0x47:
                 if (val & 0x01)
                     trc_write(0x0047, (val & 0x80) ? 0x06 : 0x04, NULL);
@@ -1138,7 +1183,7 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
             case 0x71:
             case 0x72:
             case 0x73:
-                dev->pci_isa_regs[(addr - 0x44)] = val;
+                dev->pci_isa_regs[addr - 0x44] = val;
                 break;
 
             case 0x74:
@@ -1408,7 +1453,7 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
             case 0x61:
             case 0x62:
             case 0x63:
-                dev->power_regs[(addr - 0x58)] = val;
+                dev->power_regs[addr - 0x58] = val;
                 break;
 
             case 0x70:
@@ -1430,7 +1475,9 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
             case 0xd2:
                 if (dev->local == VIA_PIPC_686B)
                     smbus_piix4_setclock(dev->smbus, (val & 0x04) ? 65536 : 16384);
-                /* fall-through */
+#ifdef FALLTHROUGH_ANNOTATION
+                [[fallthrough]];
+#endif
 
             case 0x90:
             case 0x91:
@@ -1543,33 +1590,36 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
 }
 
 static void
-pipc_reset(void *p)
+pipc_reset(void *priv)
 {
-    pipc_t *dev     = (pipc_t *) p;
+    pipc_t *dev     = (pipc_t *) priv;
     uint8_t pm_func = dev->usb[1] ? 4 : 3;
 
-    pipc_write(pm_func, 0x41, 0x00, p);
-    pipc_write(pm_func, 0x48, 0x01, p);
-    pipc_write(pm_func, 0x49, 0x00, p);
+    pipc_write(pm_func, 0x41, 0x00, priv);
+    pipc_write(pm_func, 0x48, 0x01, priv);
+    pipc_write(pm_func, 0x49, 0x00, priv);
 
-    pipc_write(1, 0x04, 0x80, p);
-    pipc_write(1, 0x09, 0x85, p);
-    pipc_write(1, 0x10, 0xf1, p);
-    pipc_write(1, 0x11, 0x01, p);
-    pipc_write(1, 0x14, 0xf5, p);
-    pipc_write(1, 0x15, 0x03, p);
-    pipc_write(1, 0x18, 0x71, p);
-    pipc_write(1, 0x19, 0x01, p);
-    pipc_write(1, 0x1c, 0x75, p);
-    pipc_write(1, 0x1d, 0x03, p);
-    pipc_write(1, 0x20, 0x01, p);
-    pipc_write(1, 0x21, 0xcc, p);
+    pipc_write(1, 0x04, 0x80, priv);
+    pipc_write(1, 0x09, 0x85, priv);
+    pipc_write(1, 0x10, 0xf1, priv);
+    pipc_write(1, 0x11, 0x01, priv);
+    pipc_write(1, 0x14, 0xf5, priv);
+    pipc_write(1, 0x15, 0x03, priv);
+    pipc_write(1, 0x18, 0x71, priv);
+    pipc_write(1, 0x19, 0x01, priv);
+    pipc_write(1, 0x1c, 0x75, priv);
+    pipc_write(1, 0x1d, 0x03, priv);
+    pipc_write(1, 0x20, 0x01, priv);
+    pipc_write(1, 0x21, 0xcc, priv);
     if (dev->local <= VIA_PIPC_586B)
-        pipc_write(1, 0x40, 0x04, p);
+        pipc_write(1, 0x40, 0x04, priv);
     else
-        pipc_write(1, 0x40, 0x00, p);
+        pipc_write(1, 0x40, 0x00, priv);
 
-    pipc_write(0, 0x77, 0x00, p);
+    if (dev->local < VIA_PIPC_586B)
+        pipc_write(0, 0x44, 0x00, priv);
+
+    pipc_write(0, 0x77, 0x00, priv);
 }
 
 static void *
@@ -1655,13 +1705,13 @@ pipc_init(const device_t *info)
 }
 
 static void
-pipc_close(void *p)
+pipc_close(void *priv)
 {
-    pipc_t *dev = (pipc_t *) p;
+    pipc_t *dev = (pipc_t *) priv;
 
     pipc_log("PIPC: close()\n");
 
-    for (int i = 0; i < TRAP_MAX; i++)
+    for (uint8_t i = 0; i < TRAP_MAX; i++)
         io_trap_remove(dev->io_traps[i].trap);
 
     free(dev);

src/chipset/via_vt82c49x.c

@@ -35,13 +35,14 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct
-{
-    uint8_t has_ide, index,
-        regs[256];
+typedef struct vt82c49x_t {
+    uint8_t has_ide;
+    uint8_t index;
+    uint8_t regs[256];
 
-    smram_t *smram_smm, *smram_low,
-        *smram_high;
+    smram_t *smram_smm;
+    smram_t *smram_low;
+    smram_t *smram_high;
 } vt82c49x_t;
 
 #ifdef ENABLE_VT82C49X_LOG
@@ -65,9 +66,11 @@ vt82c49x_log(const char *fmt, ...)
 static void
 vt82c49x_recalc(vt82c49x_t *dev)
 {
-    int      i, relocate;
-    uint8_t  reg, bit;
-    uint32_t base, state;
+    int      relocate;
+    uint8_t  reg;
+    uint8_t  bit;
+    uint32_t base;
+    uint32_t state;
     uint32_t shadow_bitmap = 0x00000000;
 
     relocate = (dev->regs[0x33] >> 2) & 0x03;
@@ -75,7 +78,7 @@ vt82c49x_recalc(vt82c49x_t *dev)
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (i = 0; i < 8; i++) {
+    for (uint8_t i = 0; i < 8; i++) {
         base = 0xc0000 + (i << 14);
         reg  = 0x30 + (i >> 2);
         bit  = (i & 3) << 1;
@@ -120,7 +123,7 @@ vt82c49x_recalc(vt82c49x_t *dev)
         mem_set_mem_state_both(base, 0x4000, state);
     }
 
-    for (i = 0; i < 4; i++) {
+    for (uint8_t i = 0; i < 4; i++) {
         base = 0xe0000 + (i << 15);
         bit  = 6 - (i & 2);
 
@@ -186,6 +189,8 @@ vt82c49x_recalc(vt82c49x_t *dev)
             if (!shadow_bitmap)
                 mem_remap_top(384);
             break;
+        default:
+            break;
     }
 }
 
@@ -277,16 +282,22 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv)
                                      (val & 0x40) ? "second" : "prim");
                     }
                     break;
+
+                default:
+                    break;
             }
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 vt82c49x_read(uint16_t addr, void *priv)
 {
-    uint8_t     ret = 0xff;
-    vt82c49x_t *dev = (vt82c49x_t *) priv;
+    uint8_t           ret = 0xff;
+    const vt82c49x_t *dev = (vt82c49x_t *) priv;
 
     switch (addr) {
         case 0xa9:
@@ -300,6 +311,9 @@ vt82c49x_read(uint16_t addr, void *priv)
             else if (dev->index < 0x80)
                 ret = dev->regs[dev->index];
             break;
+
+        default:
+            break;
     }
 
     return ret;
@@ -308,9 +322,7 @@ vt82c49x_read(uint16_t addr, void *priv)
 static void
 vt82c49x_reset(void *priv)
 {
-    uint16_t i;
-
-    for (i = 0; i < 256; i++)
+    for (uint16_t i = 0; i < 256; i++)
         vt82c49x_write(i, 0x00, priv);
 }
 

src/chipset/via_vt82c505.c

@@ -26,6 +26,7 @@
 #include <86box/io.h>
 #include <86box/pic.h>
 #include <86box/pci.h>
+#include <86box/plat_unused.h>
 #include <86box/device.h>
 #include <86box/chipset.h>
 
@@ -116,14 +117,17 @@ vt82c505_write(int func, int addr, uint8_t val, void *priv)
         case 0x93:
             dev->pci_conf[addr] = val & 0xe0;
             break;
+
+        default:
+            break;
     }
 }
 
 static uint8_t
 vt82c505_read(int func, int addr, void *priv)
 {
-    vt82c505_t *dev = (vt82c505_t *) priv;
-    uint8_t     ret = 0xff;
+    const vt82c505_t *dev = (vt82c505_t *) priv;
+    uint8_t           ret = 0xff;
 
     if (func != 0)
         return ret;
@@ -147,8 +151,8 @@ vt82c505_out(uint16_t addr, uint8_t val, void *priv)
 static uint8_t
 vt82c505_in(uint16_t addr, void *priv)
 {
-    vt82c505_t *dev = (vt82c505_t *) priv;
-    uint8_t     ret = 0xff;
+    const vt82c505_t *dev = (vt82c505_t *) priv;
+    uint8_t           ret = 0xff;
 
     if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f))
         ret = vt82c505_read(0, dev->index, priv);
@@ -160,12 +164,11 @@ static void
 vt82c505_reset(void *priv)
 {
     vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
-    int         i;
 
     dev->pci_conf[0x04] = 0x07;
     dev->pci_conf[0x07] = 0x00;
 
-    for (i = 0x80; i <= 0x9f; i++) {
+    for (uint8_t i = 0x80; i <= 0x9f; i++) {
         switch (i) {
             case 0x81:
                 vt82c505_write(0, i, 0x01, priv);
@@ -195,7 +198,7 @@ vt82c505_close(void *priv)
 }
 
 static void *
-vt82c505_init(const device_t *info)
+vt82c505_init(UNUSED(const device_t *info))
 {
     vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
     memset(dev, 0, sizeof(vt82c505_t));

src/chipset/vl82c480.c

@@ -29,9 +29,9 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
-typedef struct {
-    uint8_t idx,
-        regs[256];
+typedef struct vl82c480_t {
+    uint8_t idx;
+    uint8_t regs[256];
 } vl82c480_t;
 
 static int
@@ -40,8 +40,8 @@ vl82c480_shflags(uint8_t access)
     int ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
 
     switch (access) {
-        case 0x00:
         default:
+        case 0x00:
             ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
             break;
         case 0x01:
@@ -61,15 +61,14 @@ vl82c480_shflags(uint8_t access)
 static void
 vl82c480_recalc(vl82c480_t *dev)
 {
-    int      i, j;
     uint32_t base;
     uint8_t  access;
 
     shadowbios       = 0;
     shadowbios_write = 0;
 
-    for (i = 0; i < 6; i++) {
-        for (j = 0; j < 8; j += 2) {
+    for (uint8_t i = 0; i < 6; i++) {
+        for (uint8_t j = 0; j < 8; j += 2) {
             base   = 0x000a0000 + (i << 16) + (j << 13);
             access = (dev->regs[0x0d + i] >> j) & 3;
             mem_set_mem_state(base, 0x4000, vl82c480_shflags(access));
@@ -82,9 +81,9 @@ vl82c480_recalc(vl82c480_t *dev)
 }
 
 static void
-vl82c480_write(uint16_t addr, uint8_t val, void *p)
+vl82c480_write(uint16_t addr, uint8_t val, void *priv)
 {
-    vl82c480_t *dev = (vl82c480_t *) p;
+    vl82c480_t *dev = (vl82c480_t *) priv;
 
     switch (addr) {
         case 0xec:
@@ -122,18 +121,24 @@ vl82c480_write(uint16_t addr, uint8_t val, void *p)
             }
             break;
 
+/* TODO: This is actually Fast A20 disable. */
+#if 0
         case 0xee:
             if (mem_a20_alt)
                 outb(0x92, inb(0x92) & ~2);
             break;
+#endif
+
+        default:
+            break;
     }
 }
 
 static uint8_t
-vl82c480_read(uint16_t addr, void *p)
+vl82c480_read(uint16_t addr, void *priv)
 {
-    vl82c480_t *dev = (vl82c480_t *) p;
-    uint8_t     ret = 0xff;
+    const vl82c480_t *dev = (vl82c480_t *) priv;
+    uint8_t           ret = 0xff;
 
     switch (addr) {
         case 0xec:
@@ -144,24 +149,30 @@ vl82c480_read(uint16_t addr, void *p)
             ret = dev->regs[dev->idx];
             break;
 
+/* TODO: This is actually Fast A20 enable. */
+#if 0
         case 0xee:
             if (!mem_a20_alt)
                 outb(0x92, inb(0x92) | 2);
             break;
+#endif
 
         case 0xef:
             softresetx86();
             cpu_set_edx();
             break;
+
+        default:
+            break;
     }
 
     return ret;
 }
 
 static void
-vl82c480_close(void *p)
+vl82c480_close(void *priv)
 {
-    vl82c480_t *dev = (vl82c480_t *) p;
+    vl82c480_t *dev = (vl82c480_t *) priv;
 
     free(dev);
 }

src/chipset/wd76c10.c

@@ -37,6 +37,7 @@
 #include <86box/hdc_ide.h>
 #include <86box/lpt.h>
 #include <86box/mem.h>
+#include <86box/plat_unused.h>
 #include <86box/port_92.h>
 #include <86box/serial.h>
 #include <86box/chipset.h>
@@ -63,17 +64,33 @@ wd76c10_log(const char *fmt, ...)
 #    define wd76c10_log(fmt, ...)
 #endif
 
-typedef struct
-{
-    uint16_t lock_reg, oscillator_40mhz, cache_flush, ems_page_reg,
-        ems_page_reg_pointer, port_shadow, pmc_interrupt,
-        high_mem_protect_boundry, delay_line, diagnostic,
-        nmi_status, pmc_input, pmc_timer,
-        pmc_output, ems_control_low_address_boundry, shadow_ram,
-        split_addr, bank32staddr, bank10staddr,
-        non_page_mode_dram_timing, mem_control,
-        refresh_control, disk_chip_select, prog_chip_sel_addr,
-        bus_timing_power_down_ctl, clk_control;
+typedef struct wd76c10_t {
+    uint16_t lock_reg;
+    uint16_t oscillator_40mhz;
+    uint16_t cache_flush;
+    uint16_t ems_page_reg;
+    uint16_t ems_page_reg_pointer;
+    uint16_t port_shadow;
+    uint16_t pmc_interrupt;
+    uint16_t high_mem_protect_boundry;
+    uint16_t delay_line;
+    uint16_t diagnostic;
+    uint16_t nmi_status;
+    uint16_t pmc_input;
+    uint16_t pmc_timer;
+    uint16_t pmc_output;
+    uint16_t ems_control_low_address_boundry;
+    uint16_t shadow_ram;
+    uint16_t split_addr;
+    uint16_t bank32staddr;
+    uint16_t bank10staddr;
+    uint16_t non_page_mode_dram_timing;
+    uint16_t mem_control;
+    uint16_t refresh_control;
+    uint16_t disk_chip_select;
+    uint16_t prog_chip_sel_addr;
+    uint16_t bus_timing_power_down_ctl;
+    uint16_t clk_control;
 
     int lock;
 
@@ -100,6 +117,8 @@ wd76c10_refresh_control(wd76c10_t *dev)
         case 4:
             serial_setup(dev->uart[1], 0x2e8, 3);
             break;
+        default:
+            break;
     }
 
     serial_remove(dev->uart[0]);
@@ -117,6 +136,8 @@ wd76c10_refresh_control(wd76c10_t *dev)
         case 4:
             serial_setup(dev->uart[0], 0x2e8, 4);
             break;
+        default:
+            break;
     }
 
     lpt1_remove();
@@ -134,6 +155,9 @@ wd76c10_refresh_control(wd76c10_t *dev)
             lpt1_init(0x278);
             lpt1_irq(7);
             break;
+
+        default:
+            break;
     }
 }
 
@@ -153,6 +177,8 @@ wd76c10_split_addr(wd76c10_t *dev)
             if (((dev->shadow_ram >> 8) & 3) == 3)
                 mem_remap_top(384);
             break;
+        default:
+            break;
     }
 }
 
@@ -187,6 +213,8 @@ wd76c10_shadow_recalc(wd76c10_t *dev)
         case 3:
             mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | MEM_WRITE_DISABLED);
             break;
+        default:
+            break;
     }
 
     switch ((dev->shadow_ram >> 8) & 3) {
@@ -203,6 +231,8 @@ wd76c10_shadow_recalc(wd76c10_t *dev)
         case 3:
             mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL));
             break;
+        default:
+            break;
     }
 }
 
@@ -309,6 +339,9 @@ wd76c10_write(uint16_t addr, uint16_t val, void *priv)
                 dev->cache_flush = val;
                 flushmmucache();
                 break;
+
+            default:
+                break;
         }
         wd76c10_log("WD76C10: dev->regs[%04x] = %04x\n", addr, val);
     }
@@ -326,13 +359,17 @@ wd76c10_write(uint16_t addr, uint16_t val, void *priv)
             dev->lock_reg = val & 0x00ff;
             LOCK          = !(val & 0x00da);
             break;
+
+        default:
+            break;
     }
 }
 
 static uint16_t
 wd76c10_read(uint16_t addr, void *priv)
 {
-    wd76c10_t *dev = (wd76c10_t *) priv;
+    const wd76c10_t *dev = (wd76c10_t *) priv;
+
     wd76c10_log("WD76C10: R dev->regs[%04x]\n", addr);
     switch (addr) {
         case 0x1072:
@@ -424,7 +461,7 @@ wd76c10_close(void *priv)
 }
 
 static void *
-wd76c10_init(const device_t *info)
+wd76c10_init(UNUSED(const device_t *info))
 {
     wd76c10_t *dev = (wd76c10_t *) malloc(sizeof(wd76c10_t));
     memset(dev, 0, sizeof(wd76c10_t));

src/codegen/codegen.h

@@ -212,7 +212,8 @@ codeblock_tree_delete(codeblock_t *block)
         return;
     } else {
         /*Difficult case - node has two children. Walk right child to find lowest node*/
-        codeblock_t *lowest = block->right, *highest;
+        codeblock_t *lowest = block->right;
+        codeblock_t *highest;
         codeblock_t *old_parent;
 
         while (lowest->left)

src/codegen/codegen_ops.c

@@ -91,8 +91,8 @@ RecompOpFn recomp_opcodes_0f[512] = {
 
 /*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
 /*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
-/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
-/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropEMMS,        NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  ropPUNPCKLBW,   ropPUNPCKLWD,   ropPUNPCKLDQ,   ropPACKSSWB,    ropPCMPGTB,     ropPCMPGTW,     ropPCMPGTD,     ropPACKUSWB,    ropPUNPCKHBW,   ropPUNPCKHWD,   ropPUNPCKHDQ,   ropPACKSSDW,    NULL,           NULL,           ropMOVD_mm_l,   ropMOVQ_mm_q,
+/*70*/  NULL,           ropPSxxW_imm,   ropPSxxD_imm,   ropPSxxQ_imm,   ropPCMPEQB,     ropPCMPEQW,     ropPCMPEQD,     ropEMMS,        NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVD_l_mm,   ropMOVQ_q_mm,
 
 /*80*/  ropJO_w,        ropJNO_w,       ropJB_w,        ropJNB_w,       ropJE_w,        ropJNE_w,       ropJBE_w,       ropJNBE_w,      ropJS_w,        ropJNS_w,       ropJP_w,        ropJNP_w,       ropJL_w,        ropJNL_w,       ropJLE_w,       ropJNLE_w,
 /*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
@@ -100,9 +100,9 @@ RecompOpFn recomp_opcodes_0f[512] = {
 /*b0*/  NULL,           NULL,           ropLSS,         NULL,           ropLFS,         ropLGS,         ropMOVZX_w_b,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_w_b,   NULL,
 
 /*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
-/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
-/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
-/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           ropPSRLW,       ropPSRLD,       ropPSRLQ,       NULL,           ropPMULLW,      NULL,           NULL,           ropPSUBUSB,     ropPSUBUSW,     NULL,           ropPAND,        ropPADDUSB,     ropPADDUSW,     NULL,           ropPANDN,
+/*e0*/  NULL,           ropPSRAW,       ropPSRAD,       NULL,           NULL,           ropPMULHW,      NULL,           NULL,           ropPSUBSB,      ropPSUBSW,      NULL,           ropPOR,         ropPADDSB,      ropPADDSW,      NULL,           ropPXOR,
+/*f0*/  NULL,           ropPSLLW,       ropPSLLD,       ropPSLLQ,       NULL,           ropPMADDWD,     NULL,           NULL,           ropPSUBB,       ropPSUBW,       ropPSUBD,       NULL,           ropPADDB,       ropPADDW,       ropPADDD,       NULL,
 
         /*32-bit data*/
 /*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
@@ -128,6 +128,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
     // clang-format on
 };
 
+RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
+    // clang-format off
+        /*16-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_w,        ropJNO_w,       ropJB_w,        ropJNB_w,       ropJE_w,        ropJNE_w,       ropJBE_w,       ropJNBE_w,      ropJS_w,        ropJNS_w,       ropJP_w,        ropJNP_w,       ropJL_w,        ropJNL_w,       ropJLE_w,       ropJNLE_w,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_16,  ropPOP_FS_16,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropPUSH_GS_16,  ropPOP_GS_16,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS,         NULL,           ropLFS,         ropLGS,         ropMOVZX_w_b,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_w_b,   NULL,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+        /*32-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_l,        ropJNO_l,       ropJB_l,        ropJNB_l,       ropJE_l,        ropJNE_l,       ropJBE_l,       ropJNBE_l,      ropJS_l,        ropJNS_l,       ropJP_l,        ropJNP_l,       ropJL_l,        ropJNL_l,       ropJLE_l,       ropJNLE_l,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_32,  ropPOP_FS_32,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropPUSH_GS_32,  ropPOP_GS_32,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS,         NULL,           ropLFS,         ropLGS,         ropMOVZX_l_b,   ropMOVZX_l_w,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_l_b,   ropMOVSX_l_w,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+    // clang-format on
+};
+
 RecompOpFn recomp_opcodes_d8[512] = {
     // clang-format off
         /*16-bit data*/

src/codegen/codegen_ops.h

@@ -7,6 +7,7 @@ typedef uint32_t (*RecompOpFn)(uint8_t opcode, uint32_t fetchdat, uint32_t op_32
 
 extern RecompOpFn recomp_opcodes[512];
 extern RecompOpFn recomp_opcodes_0f[512];
+extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
 extern RecompOpFn recomp_opcodes_d8[512];
 extern RecompOpFn recomp_opcodes_d9[512];
 extern RecompOpFn recomp_opcodes_da[512];

src/codegen/codegen_ops_arith.h

@@ -281,7 +281,8 @@ ROP_ARITH_RM(SUB, SUB, 1)
 static uint32_t
 ropCMP_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_B(fetchdat & 7);
@@ -307,7 +308,8 @@ ropCMP_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, c
 static uint32_t
 ropCMP_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_W(fetchdat & 7);
@@ -333,7 +335,8 @@ ropCMP_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, c
 static uint32_t
 ropCMP_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_L(fetchdat & 7);
@@ -360,7 +363,8 @@ ropCMP_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, c
 static uint32_t
 ropCMP_b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         dst_reg = LOAD_REG_B(fetchdat & 7);
@@ -386,7 +390,8 @@ ropCMP_b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc,
 static uint32_t
 ropCMP_w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         dst_reg = LOAD_REG_W(fetchdat & 7);
@@ -412,7 +417,8 @@ ropCMP_w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc,
 static uint32_t
 ropCMP_l_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         dst_reg = LOAD_REG_L(fetchdat & 7);

src/codegen/codegen_ops_fpu.h

@@ -156,7 +156,8 @@ static uint32_t
 ropFSTd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
     x86seg *target_seg;
-    int     host_reg1, host_reg2 = 0;
+    int     host_reg1;
+    int     host_reg2 = 0;
 
     FP_ENTER();
     op_pc--;
@@ -593,7 +594,8 @@ static uint32_t
 ropFISTPq(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
     x86seg *target_seg;
-    int     host_reg1, host_reg2;
+    int     host_reg1;
+    int     host_reg2;
 
     FP_ENTER();
     op_pc--;
@@ -679,7 +681,7 @@ opFLDimm(Z, 0.0)
 static uint32_t ropFLDLN2(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
     FP_ENTER();
-    FP_LOAD_IMM_Q(0x3fe62e42fefa39f0ull);
+    FP_LOAD_IMM_Q(0x3fe62e42fefa39f0ULL);
 
     return op_pc;
 }

src/codegen/codegen_ops_logic.h

@@ -175,7 +175,8 @@ ROP_LOGIC(XOR, XOR, 1)
 static uint32_t
 ropTEST_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_B(fetchdat & 7);
@@ -198,7 +199,8 @@ ropTEST_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc,
 static uint32_t
 ropTEST_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_W(fetchdat & 7);
@@ -221,7 +223,8 @@ ropTEST_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc,
 static uint32_t
 ropTEST_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg;
+    int src_reg;
+    int dst_reg;
 
     if ((fetchdat & 0xc0) == 0xc0) {
         src_reg = LOAD_REG_L(fetchdat & 7);

src/codegen/codegen_ops_mmx.h

@@ -1,7 +1,8 @@
 static uint32_t
 ropMOVQ_q_mm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int host_reg1, host_reg2 = 0;
+    int host_reg1;
+    int host_reg2 = 0;
 
     MMX_ENTER();
 
@@ -29,7 +30,8 @@ ropMOVQ_mm_q(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc,
     MMX_ENTER();
 
     if ((fetchdat & 0xc0) == 0xc0) {
-        int host_reg1, host_reg2;
+        int host_reg1;
+        int host_reg2;
 
         LOAD_MMX_Q(fetchdat & 7, &host_reg1, &host_reg2);
         STORE_MMX_Q((fetchdat >> 3) & 7, host_reg1, host_reg2);

src/codegen/codegen_ops_x86-64.h

@@ -536,7 +536,8 @@ FETCH_EA_16(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
         addlong((fetchdat >> 8) & 0xffff);
         (*op_pc) += 2;
     } else {
-        int base_reg = 0, index_reg = 0;
+        int base_reg = 0;
+        int index_reg = 0;
 
         switch (rm) {
             case 0:
@@ -639,8 +640,9 @@ FETCH_EA_32(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc,
     uint32_t new_eaaddr;
 
     if (rm == 4) {
-        uint8_t sib      = fetchdat >> 8;
-        int     base_reg = -1, index_reg = -1;
+        uint8_t sib       = fetchdat >> 8;
+        int     base_reg  = -1;
+        int     index_reg = -1;
 
         (*op_pc)++;
 

src/codegen/codegen_ops_xchg.h

@@ -45,7 +45,9 @@ OP_XCHG_EAX_(EBP)
 static uint32_t
 ropXCHG_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg, temp_reg;
+    int src_reg;
+    int dst_reg;
+    int temp_reg;
 
     if ((fetchdat & 0xc0) != 0xc0)
         return 0;
@@ -61,7 +63,9 @@ ropXCHG_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, cod
 static uint32_t
 ropXCHG_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg, temp_reg;
+    int src_reg;
+    int dst_reg;
+    int temp_reg;
 
     if ((fetchdat & 0xc0) != 0xc0)
         return 0;
@@ -77,7 +81,9 @@ ropXCHG_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, cod
 static uint32_t
 ropXCHG_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
 {
-    int src_reg, dst_reg, temp_reg;
+    int src_reg;
+    int dst_reg;
+    int temp_reg;
 
     if ((fetchdat & 0xc0) != 0xc0)
         return 0;

src/codegen/codegen_x86-64.c

@@ -845,7 +845,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
         switch (opcode) {
             case 0x0f:
                 op_table        = x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
@@ -883,7 +883,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 
             case 0xd8:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
-                recomp_op_table = recomp_opcodes_d8;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -893,7 +893,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xd9:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
-                recomp_op_table = recomp_opcodes_d9;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -902,7 +902,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xda:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
-                recomp_op_table = recomp_opcodes_da;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -911,7 +911,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdb:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
-                recomp_op_table = recomp_opcodes_db;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -920,7 +920,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdc:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
-                recomp_op_table = recomp_opcodes_dc;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -930,7 +930,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdd:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
-                recomp_op_table = recomp_opcodes_dd;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -939,7 +939,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xde:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
-                recomp_op_table = recomp_opcodes_de;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -948,7 +948,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdf:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
-                recomp_op_table = recomp_opcodes_df;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;

src/codegen/codegen_x86.c

@@ -69,7 +69,8 @@
 #        include <windows.h>
 #    endif
 
-int      codegen_flat_ds, codegen_flat_ss;
+int      codegen_flat_ds;
+int      codegen_flat_ss;
 int      mmx_ebx_ecx_loaded;
 int      codegen_flags_changed = 0;
 int      codegen_fpu_entered   = 0;
@@ -1883,7 +1884,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
         switch (opcode) {
             case 0x0f:
                 op_table        = x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
@@ -1921,7 +1922,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 
             case 0xd8:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
-                recomp_op_table = recomp_opcodes_d8;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -1931,7 +1932,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xd9:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
-                recomp_op_table = recomp_opcodes_d9;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -1940,7 +1941,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xda:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
-                recomp_op_table = recomp_opcodes_da;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -1949,7 +1950,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdb:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
-                recomp_op_table = recomp_opcodes_db;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -1958,7 +1959,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdc:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
-                recomp_op_table = recomp_opcodes_dc;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -1968,7 +1969,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdd:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
-                recomp_op_table = recomp_opcodes_dd;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -1977,7 +1978,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xde:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
-                recomp_op_table = recomp_opcodes_de;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -1986,7 +1987,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 break;
             case 0xdf:
                 op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
-                recomp_op_table = recomp_opcodes_df;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;

src/codegen_new/codegen.c

@@ -31,9 +31,7 @@ static struct
 int
 codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP)
 {
-    int c;
-
-    for (c = 0; c <= block->ins; c++) {
+    for (uint8_t c = 0; c <= block->ins; c++) {
         if (codegen_instructions[c].pc == pc) {
             *first_instruction = c;
             *TOP               = codegen_instructions[c].TOP;
@@ -137,7 +135,9 @@ codegen_generate_ea_16_long(ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat,
         uop_MOV_IMM(ir, IREG_eaaddr, addr);
         (*op_pc) += 2;
     } else {
-        int base_reg, index_reg, offset;
+        int base_reg;
+        int index_reg;
+        int offset;
 
         switch (cpu_rm & 7) {
             case 0:
@@ -374,7 +374,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
     codeblock_t *block              = &codeblock[block_current];
     ir_data_t   *ir                 = codegen_get_ir_data();
     uint32_t     op_pc              = new_pc;
-    OpFn        *op_table           = (OpFn *) x86_dynarec_opcodes;
+    const OpFn  *op_table           = (OpFn *) x86_dynarec_opcodes;
     RecompOpFn  *recomp_op_table    = recomp_opcodes;
     int          opcode_shift       = 0;
     int          opcode_mask        = 0x3ff;
@@ -398,8 +398,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0x0f;
 #endif
-                op_table        = (OpFn *) x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                op_table        = x86_dynarec_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
@@ -439,8 +439,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xd8;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_d8_a32 : (OpFn *) x86_dynarec_opcodes_d8_a16;
-                recomp_op_table = recomp_opcodes_d8;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -452,8 +452,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xd9;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_d9_a32 : (OpFn *) x86_dynarec_opcodes_d9_a16;
-                recomp_op_table = recomp_opcodes_d9;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -464,8 +464,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xda;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_da_a32 : (OpFn *) x86_dynarec_opcodes_da_a16;
-                recomp_op_table = recomp_opcodes_da;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -476,8 +476,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xdb;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_db_a32 : (OpFn *) x86_dynarec_opcodes_db_a16;
-                recomp_op_table = recomp_opcodes_db;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -488,8 +488,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xdc;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_dc_a32 : (OpFn *) x86_dynarec_opcodes_dc_a16;
-                recomp_op_table = recomp_opcodes_dc;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
                 opcode_shift    = 3;
                 opcode_mask     = 0x1f;
                 over            = 1;
@@ -501,8 +501,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xdd;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_dd_a32 : (OpFn *) x86_dynarec_opcodes_dd_a16;
-                recomp_op_table = recomp_opcodes_dd;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -513,8 +513,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xde;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_de_a32 : (OpFn *) x86_dynarec_opcodes_de_a16;
-                recomp_op_table = recomp_opcodes_de;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -525,8 +525,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xdf;
 #endif
-                op_table        = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_df_a32 : (OpFn *) x86_dynarec_opcodes_df_a16;
-                recomp_op_table = recomp_opcodes_df;
+                op_table        = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
+                recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
                 opcode_mask     = 0xff;
                 over            = 1;
                 pc_off          = -1;
@@ -541,14 +541,14 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xf2;
 #endif
-                op_table        = (OpFn *) x86_dynarec_opcodes_REPNE;
+                op_table        = x86_dynarec_opcodes_REPNE;
                 recomp_op_table = NULL; // recomp_opcodes_REPNE;
                 break;
             case 0xf3: /*REPE*/
 #ifdef DEBUG_EXTRA
                 last_prefix = 0xf3;
 #endif
-                op_table        = (OpFn *) x86_dynarec_opcodes_REPE;
+                op_table        = x86_dynarec_opcodes_REPE;
                 recomp_op_table = NULL; // recomp_opcodes_REPE;
                 break;
 
@@ -634,11 +634,11 @@ generate_call:
         }
 
         opcode_3dnow = fastreadb(cs + opcode_pc);
-        if (recomp_opcodes_3DNOW[opcode_3dnow]) {
+        if (!fpu_softfloat && recomp_opcodes_3DNOW[opcode_3dnow]) {
             next_pc = opcode_pc + 1;
 
             op_table           = (OpFn *) x86_dynarec_opcodes_3DNOW;
-            recomp_op_table    = recomp_opcodes_3DNOW;
+            recomp_op_table    = fpu_softfloat ? NULL : recomp_opcodes_3DNOW;
             opcode             = opcode_3dnow;
             recomp_opcode_mask = 0xff;
             opcode_mask        = 0xff;
@@ -713,6 +713,7 @@ generate_call:
         uop_MOV_IMM(ir, IREG_ssegs, op_ssegs);
     uop_LOAD_FUNC_ARG_IMM(ir, 0, fetchdat);
     uop_CALL_INSTRUCTION_FUNC(ir, op);
+    codegen_flags_changed = 0;
     codegen_mark_code_present(block, cs + cpu_state.pc, 8);
 
     last_op_32     = op_32;

src/codegen_new/codegen.h

@@ -140,12 +140,16 @@ codeblock_tree_add(codeblock_t *new_block)
                 block = block->right ? &codeblock[block->right] : NULL;
         }
 
-        if (a < old_block_cmp)
-            old_block->left = get_block_nr(new_block);
-        else
-            old_block->right = get_block_nr(new_block);
+        if (old_block != NULL) {
+            if (a < old_block_cmp)
+                old_block->left = get_block_nr(new_block);
+            else
+                old_block->right = get_block_nr(new_block);
+
+            new_block->parent = get_block_nr(old_block);
+        } else
+            new_block->parent = BLOCK_INVALID;
 
-        new_block->parent = get_block_nr(old_block);
         new_block->left = new_block->right = BLOCK_INVALID;
     }
 }
@@ -212,7 +216,8 @@ codeblock_tree_delete(codeblock_t *block)
         return;
     } else {
         /*Difficult case - node has two children. Walk right child to find lowest node*/
-        codeblock_t *lowest = &codeblock[block->right], *highest;
+        codeblock_t *lowest = &codeblock[block->right];
+        codeblock_t *highest;
         codeblock_t *old_parent;
         uint16_t     lowest_nr;
 

src/codegen_new/codegen_allocator.c

@@ -32,8 +32,6 @@ int codegen_allocator_usage = 0;
 void
 codegen_allocator_init(void)
 {
-    int c;
-
 #if defined WIN32 || defined _WIN32 || defined _WIN32
     mem_block_alloc = VirtualAlloc(NULL, MEM_BLOCK_NR * MEM_BLOCK_SIZE, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
     /* TODO: check deployment target: older Intel-based versions of macOS don't play
@@ -44,7 +42,7 @@ codegen_allocator_init(void)
     mem_block_alloc = mmap(0, MEM_BLOCK_NR * MEM_BLOCK_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0);
 #endif
 
-    for (c = 0; c < MEM_BLOCK_NR; c++) {
+    for (uint32_t c = 0; c < MEM_BLOCK_NR; c++) {
         mem_blocks[c].offset     = c * MEM_BLOCK_SIZE;
         mem_blocks[c].code_block = BLOCK_INVALID;
         if (c < MEM_BLOCK_NR - 1)

src/codegen_new/codegen_backend_arm64_imm.c

@@ -1313,7 +1313,8 @@ static uint32_t imm_table[][2] = {
 uint32_t
 host_arm64_find_imm(uint32_t data)
 {
-    int l = 0, r = IMM_NR - 1;
+    int l = 0;
+    int r = IMM_NR - 1;
 
     while (l <= r) {
         int m = (l + r) >> 1;

src/codegen_new/codegen_backend_x86.c

@@ -263,7 +263,6 @@ void
 codegen_backend_init(void)
 {
     codeblock_t *block;
-    int          c;
 
     codeblock      = malloc(BLOCK_SIZE * sizeof(codeblock_t));
     codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
@@ -271,7 +270,7 @@ codegen_backend_init(void)
     memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
     memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
 
-    for (c = 0; c < BLOCK_SIZE; c++)
+    for (uint32_t c = 0; c < BLOCK_SIZE; c++)
         codeblock[c].pc = BLOCK_PC_INVALID;
 
     block_current         = 0;

src/codegen_new/codegen_block.c

@@ -21,7 +21,8 @@
 
 uint8_t *block_write_data = NULL;
 
-int      codegen_flat_ds, codegen_flat_ss;
+int      codegen_flat_ds;
+int      codegen_flat_ss;
 int      mmx_ebx_ecx_loaded;
 int      codegen_flags_changed = 0;
 int      codegen_fpu_entered   = 0;
@@ -61,7 +62,8 @@ static void     delete_dirty_block(codeblock_t *block);
 
   The size of this list is limited to DIRTY_LIST_MAX_SIZE blocks. When this is
   exceeded the oldest entry will be moved to the free list.*/
-static uint16_t block_dirty_list_head, block_dirty_list_tail;
+static uint16_t block_dirty_list_head;
+static uint16_t block_dirty_list_tail;
 static int      dirty_list_size = 0;
 #define DIRTY_LIST_MAX_SIZE 64
 
@@ -210,13 +212,11 @@ block_free_list_get(void)
 void
 codegen_init(void)
 {
-    int c;
-
     codegen_allocator_init();
 
     codegen_backend_init();
     block_free_list = 0;
-    for (c = 0; c < BLOCK_SIZE; c++)
+    for (uint32_t c = 0; c < BLOCK_SIZE; c++)
         block_free_list_add(&codeblock[c]);
     block_dirty_list_head = block_dirty_list_tail = 0;
     dirty_list_size                               = 0;
@@ -472,7 +472,6 @@ codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
 {
     uint16_t block_nr               = page->block;
     int      remove_from_evict_list = 0;
-    int      c;
 
     while (block_nr) {
         codeblock_t *block      = &codeblock[block_nr];
@@ -509,7 +508,7 @@ codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
     page->code_present_mask &= ~page->dirty_mask;
     page->dirty_mask = 0;
 
-    for (c = 0; c < 64; c++) {
+    for (uint8_t c = 0; c < 64; c++) {
         if (page->byte_code_present_mask[c] & page->byte_dirty_mask[c])
             remove_from_evict_list = 0;
         page->byte_code_present_mask[c] &= ~page->byte_dirty_mask[c];

src/codegen_new/codegen_ir.c

@@ -12,7 +12,8 @@
 extern int       has_ea;
 static ir_data_t ir_block;
 
-static int codegen_unroll_start, codegen_unroll_count;
+static int codegen_unroll_start;
+static int codegen_unroll_count;
 static int codegen_unroll_first_instruction;
 
 ir_data_t *
@@ -64,13 +65,12 @@ codegen_ir_compile(ir_data_t *ir, codeblock_t *block)
     int c;
 
     if (codegen_unroll_count) {
-        int unroll_count;
         int unroll_end;
 
         codegen_set_loop_start(ir, codegen_unroll_first_instruction);
         unroll_end = ir->wr_pos;
 
-        for (unroll_count = 1; unroll_count < codegen_unroll_count; unroll_count++) {
+        for (int unroll_count = 1; unroll_count < codegen_unroll_count; unroll_count++) {
             int offset = ir->wr_pos - codegen_unroll_start;
             //                        pclog("Unroll from %i to %i, offset %i - iteration %i\n", codegen_unroll_start, ir->wr_pos, offset, unroll_count);
             for (c = codegen_unroll_start; c < unroll_end; c++) {

src/codegen_new/codegen_ops.c

@@ -144,6 +144,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
     // clang-format on
 };
 
+RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
+    // clang-format off
+        /*16-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_16,       ropJNO_16,      ropJB_16,       ropJNB_16,      ropJE_16,       ropJNE_16,      ropJBE_16,      ropJNBE_16,     ropJS_16,       ropJNS_16,      ropJP_16,       ropJNP_16,      ropJL_16,       ropJNL_16,      ropJLE_16,      ropJNLE_16,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_16,  ropPOP_FS_16,   NULL,           NULL,           ropSHLD_16_imm, NULL,           NULL,           NULL,           ropPUSH_GS_16,  ropPOP_GS_16,   NULL,           NULL,           ropSHRD_16_imm, NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS_16,      NULL,           ropLFS_16,      ropLGS_16,      ropMOVZX_16_8,  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_16_8,  NULL,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+        /*32-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_32,       ropJNO_32,      ropJB_32,       ropJNB_32,      ropJE_32,       ropJNE_32,      ropJBE_32,      ropJNBE_32,     ropJS_32,       ropJNS_32,      ropJP_32,       ropJNP_32,      ropJL_32,       ropJNL_32,      ropJLE_32,      ropJNLE_32,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_32,  ropPOP_FS_32,   NULL,           NULL,           ropSHLD_32_imm, NULL,           NULL,           NULL,           ropPUSH_GS_32,  ropPOP_GS_32,   NULL,           NULL,           ropSHRD_32_imm, NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS_32,      NULL,           ropLFS_32,      ropLGS_32,      ropMOVZX_32_8,  ropMOVZX_32_16, NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_32_8,  ropMOVSX_32_16,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+    // clang-format on
+};
+
 RecompOpFn recomp_opcodes_3DNOW[256] = {
 // clang-format off
 #if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64
@@ -556,3 +604,4 @@ RecompOpFn recomp_opcodes_df[512] = {
 /*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
     // clang-format on
 };
+

src/codegen_new/codegen_ops.h

@@ -9,6 +9,7 @@ typedef uint32_t (*RecompOpFn)(codeblock_t *block, struct ir_data_t *ir, uint8_t
 
 extern RecompOpFn recomp_opcodes[512];
 extern RecompOpFn recomp_opcodes_0f[512];
+extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
 extern RecompOpFn recomp_opcodes_3DNOW[256];
 extern RecompOpFn recomp_opcodes_d8[512];
 extern RecompOpFn recomp_opcodes_d9[512];

src/codegen_new/codegen_ops_branch.c

@@ -264,7 +264,8 @@ ropJNE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t ne
 static int
 ropJBE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
 {
-    int jump_uop, jump_uop2 = -1;
+    int jump_uop;
+    int jump_uop2 = -1;
     int do_unroll = ((CF_SET() || ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
 
     switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN) {
@@ -331,7 +332,8 @@ ropJBE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t ne
 static int
 ropJNBE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
 {
-    int jump_uop, jump_uop2 = -1;
+    int jump_uop;
+    int jump_uop2 = -1;
     int do_unroll = ((!CF_SET() && !ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
 
     switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN) {
@@ -686,7 +688,8 @@ ropJNL_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t ne
 static int
 ropJLE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
 {
-    int jump_uop, jump_uop2 = -1;
+    int jump_uop;
+    int jump_uop2 = -1;
     int do_unroll = (((NF_SET() ? 1 : 0) != (VF_SET() ? 1 : 0) || ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
 
     switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN) {
@@ -748,7 +751,8 @@ ropJLE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t ne
 static int
 ropJNLE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
 {
-    int jump_uop, jump_uop2 = -1;
+    int jump_uop;
+    int jump_uop2 = -1;
     int do_unroll = ((NF_SET() ? 1 : 0) == (VF_SET() ? 1 : 0) && !ZF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
 
     switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN) {
@@ -928,7 +932,8 @@ ropLOOPE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, u
 {
     uint32_t offset    = (int32_t) (int8_t) fastreadb(cs + op_pc);
     uint32_t dest_addr = op_pc + 1 + offset;
-    int      jump_uop, jump_uop2;
+    int      jump_uop;
+    int      jump_uop2;
 
     if (!(op_32 & 0x100))
         dest_addr &= 0xffff;
@@ -960,7 +965,8 @@ ropLOOPNE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat,
 {
     uint32_t offset    = (int32_t) (int8_t) fastreadb(cs + op_pc);
     uint32_t dest_addr = op_pc + 1 + offset;
-    int      jump_uop, jump_uop2;
+    int      jump_uop;
+    int      jump_uop2;
 
     if (!(op_32 & 0x100))
         dest_addr &= 0xffff;

src/codegen_new/codegen_ops_misc.c

@@ -269,7 +269,8 @@ uint32_t
 ropFF_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
 {
     x86seg *target_seg = NULL;
-    int     src_reg, sp_reg;
+    int     src_reg;
+    int     sp_reg;
 
     if ((fetchdat & 0x38) != 0x00 && (fetchdat & 0x38) != 0x08 && (fetchdat & 0x38) != 0x10 && (fetchdat & 0x38) != 0x20 && (fetchdat & 0x38) != 0x28 && (fetchdat & 0x38) != 0x30)
         return 0;
@@ -367,7 +368,8 @@ uint32_t
 ropFF_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
 {
     x86seg *target_seg = NULL;
-    int     src_reg, sp_reg;
+    int     src_reg;
+    int     sp_reg;
 
     if ((fetchdat & 0x38) != 0x00 && (fetchdat & 0x38) != 0x08 && (fetchdat & 0x38) != 0x10 && (fetchdat & 0x38) != 0x20 && (fetchdat & 0x38) != 0x28 && (fetchdat & 0x38) != 0x30)
         return 0;