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https://github.com/86Box/86Box.git
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Merge pull request #502 from nerd73/master
IBM 386SLC/486SLC/486 Blue Lightning emulation
This commit is contained in:
OBattler
GitHub
@@ -915,7 +915,10 @@ reset_common(int hard)
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cr0 = 1 << 30;
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else
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cr0 = 0;
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cpu_cache_int_enabled = 0;
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if (isibmcpu)
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cpu_cache_int_enabled = 1;
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else
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cpu_cache_int_enabled = 0;
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cpu_update_waitstates();
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cr4 = 0;
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cpu_state.eflags = 0;
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@@ -145,6 +145,7 @@ int is286,
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is386,
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is486,
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cpu_iscyrix,
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isibmcpu,
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israpidcad,
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is_pentium;
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@@ -255,8 +256,9 @@ cpu_set(void)
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is8086 = (cpu_s->cpu_type > CPU_8088);
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is286 = (cpu_s->cpu_type >= CPU_286);
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is386 = (cpu_s->cpu_type >= CPU_386SX);
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isibmcpu = (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
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israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
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is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD);
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is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL );
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is_pentium = (cpu_s->cpu_type >= CPU_WINCHIP);
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hasfpu = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD);
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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@@ -265,7 +267,8 @@ cpu_set(void)
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86);
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#endif
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cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC);
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cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC );
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if (cpu_s->multi) {
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if (cpu_s->pci_speed)
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cpu_busspeed = cpu_s->pci_speed;
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@@ -484,6 +487,7 @@ cpu_set(void)
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timing_jmp_pm_gate = 38;
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break;
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case CPU_IBM386SLC:
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case CPU_386SX:
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timing_rr = 2; /*register dest - register src*/
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timing_rm = 6; /*register dest - memory src*/
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@@ -546,6 +550,80 @@ cpu_set(void)
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timing_jmp_pm_gate = 45;
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break;
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case CPU_IBM486SLC:
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#ifdef USE_DYNAREC
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x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
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#else
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x86_setopcodes(ops_386, ops_486_0f);
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#endif
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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timing_mr = 5; /*memory dest - register src*/
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timing_mm = 3;
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timing_rml = 4; /*register dest - memory src long*/
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timing_mrl = 5; /*memory dest - register src long*/
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timing_mml = 5;
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timing_bt = 3-1; /*branch taken*/
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timing_bnt = 1; /*branch not taken*/
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timing_int = 4;
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timing_int_rm = 26;
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timing_int_v86 = 82;
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timing_int_pm = 44;
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timing_int_pm_outer = 71;
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timing_iret_rm = 15;
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timing_iret_v86 = 36; /*unknown*/
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timing_iret_pm = 20;
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timing_iret_pm_outer = 36;
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timing_call_rm = 18;
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timing_call_pm = 20;
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timing_call_pm_gate = 35;
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timing_call_pm_gate_inner = 69;
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timing_retf_rm = 13;
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timing_retf_pm = 17;
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timing_retf_pm_outer = 35;
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timing_jmp_rm = 17;
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timing_jmp_pm = 19;
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timing_jmp_pm_gate = 32;
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timing_misaligned = 3;
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break;
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case CPU_IBM486BL:
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#ifdef USE_DYNAREC
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x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
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#else
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x86_setopcodes(ops_386, ops_486_0f);
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#endif
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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timing_mr = 3; /*memory dest - register src*/
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timing_mm = 3;
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timing_rml = 2; /*register dest - memory src long*/
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timing_mrl = 3; /*memory dest - register src long*/
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timing_mml = 3;
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timing_bt = 3-1; /*branch taken*/
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timing_bnt = 1; /*branch not taken*/
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timing_int = 4;
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timing_int_rm = 26;
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timing_int_v86 = 82;
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timing_int_pm = 44;
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timing_int_pm_outer = 71;
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timing_iret_rm = 15;
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timing_iret_v86 = 36; /*unknown*/
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timing_iret_pm = 20;
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timing_iret_pm_outer = 36;
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timing_call_rm = 18;
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timing_call_pm = 20;
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timing_call_pm_gate = 35;
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timing_call_pm_gate_inner = 69;
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timing_retf_rm = 13;
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timing_retf_pm = 17;
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timing_retf_pm_outer = 35;
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timing_jmp_rm = 17;
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timing_jmp_pm = 19;
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timing_jmp_pm_gate = 32;
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timing_misaligned = 3;
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break;
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case CPU_RAPIDCAD:
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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@@ -31,39 +31,42 @@
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#define CPU_286 2 /* 286 class CPUs */
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#define CPU_386SX 3 /* 386 class CPUs */
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#define CPU_386DX 4
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#define CPU_RAPIDCAD 5
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#define CPU_486SLC 6
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#define CPU_486DLC 7
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#define CPU_i486SX 8 /* 486 class CPUs */
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#define CPU_Am486SX 9
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#define CPU_Cx486S 10
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#define CPU_i486DX 11
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#define CPU_Am486DX 12
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#define CPU_Cx486DX 13
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#define CPU_iDX4 14
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#define CPU_Cx5x86 15
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#define CPU_WINCHIP 16 /* 586 class CPUs */
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#define CPU_PENTIUM 17
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#define CPU_PENTIUMMMX 18
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#define CPU_Cx6x86 19
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#define CPU_Cx6x86MX 20
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#define CPU_Cx6x86L 21
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#define CPU_CxGX1 22
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#define CPU_IBM386SLC 5
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#define CPU_IBM486SLC 6
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#define CPU_IBM486BL 7
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#define CPU_RAPIDCAD 8
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#define CPU_486SLC 9
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#define CPU_486DLC 10
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#define CPU_i486SX 11 /* 486 class CPUs */
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#define CPU_Am486SX 12
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#define CPU_Cx486S 13
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#define CPU_i486DX 14
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#define CPU_Am486DX 15
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#define CPU_Cx486DX 16
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#define CPU_iDX4 17
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#define CPU_Cx5x86 18
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#define CPU_WINCHIP 19 /* 586 class CPUs */
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#define CPU_PENTIUM 20
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#define CPU_PENTIUMMMX 21
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#define CPU_Cx6x86 22
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#define CPU_Cx6x86MX 23
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#define CPU_Cx6x86L 24
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#define CPU_CxGX1 25
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#ifdef DEV_BRANCH
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#ifdef USE_AMD_K
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#define CPU_K5 23
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#define CPU_5K86 24
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#define CPU_K6 25
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#define CPU_K5 26
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#define CPU_5K86 27
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#define CPU_K6 28
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#endif
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#endif
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#ifdef DEV_BRANCH
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#ifdef USE_I686
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#define CPU_PENTIUMPRO 26 /* 686 class CPUs */
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#define CPU_PENTIUMPRO 29 /* 686 class CPUs */
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#if 0
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# define CPU_PENTIUM2 27
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# define CPU_PENTIUM2D 28
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# define CPU_PENTIUM2 30
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# define CPU_PENTIUM2D 31
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#else
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# define CPU_PENTIUM2D 27
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# define CPU_PENTIUM2D 30
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#endif
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#endif
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#endif
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@@ -102,6 +105,9 @@ extern CPU cpus_Am386SX[];
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extern CPU cpus_Am386DX[];
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extern CPU cpus_486SLC[];
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extern CPU cpus_486DLC[];
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extern CPU cpus_IBM386SLC[];
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extern CPU cpus_IBM486SLC[];
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extern CPU cpus_IBM486BL[];
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extern CPU cpus_i486[];
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extern CPU cpus_Am486[];
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extern CPU cpus_Cx486[];
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@@ -329,6 +335,7 @@ extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
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penalties when crossing 8-byte boundaries*/
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extern int is8086, is286, is386, is486;
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extern int isibmcpu;
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extern int is_rapidcad;
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extern int hasfpu;
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#define CPU_FEATURE_RDTSC (1 << 0)
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@@ -486,4 +493,4 @@ extern void cpu_dynamic_switch(int new_cpu);
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#endif /*EMU_CPU_H*/
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#endif
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#endif
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@@ -173,7 +173,33 @@ CPU cpus_Am386DX[] = {
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{"Am386DX/40", CPU_386DX, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3, 5},
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
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};
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CPU cpus_IBM386SLC[] = {
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/*IBM 386SLC*/
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{"386SLC/16", CPU_IBM386SLC, 16000000, 1, 0, 0x300, 0, 0, 0, 3,3,3,3, 2},
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{"386SLC/20", CPU_IBM386SLC, 20000000, 1, 0, 0x300, 0, 0, 0, 4,4,3,3, 3},
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{"386SLC/25", CPU_IBM386SLC, 25000000, 1, 0, 0x300, 0, 0, 0, 4,4,3,3, 3},
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
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};
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CPU cpus_IBM486SLC[] = {
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/*IBM 486SLC*/
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{"486SLC/33", CPU_IBM486SLC, 33333333, 1, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
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{"486SLC2/50", CPU_IBM486SLC, 50000000, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 6},
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{"486SLC2/66", CPU_IBM486SLC, 66666666, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 8},
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{"486SLC3/60", CPU_IBM486SLC, 60000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 7},
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{"486SLC3/75", CPU_IBM486SLC, 75000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 9},
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{"486SLC3/100", CPU_IBM486SLC, 100000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 12},
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
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};
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CPU cpus_IBM486BL[] = {
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/*IBM Blue Lightning*/
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{"486BL2/50", CPU_IBM486BL, 50000000, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 6},
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{"486BL2/66", CPU_IBM486BL, 66666666, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 8},
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{"486BL3/75", CPU_IBM486BL, 75000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 9},
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{"486BL3/100", CPU_IBM486BL, 100000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 12},
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
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};
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CPU cpus_486SLC[] = {
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/*Cx486SLC*/
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{"Cx486SLC/20", CPU_486SLC, 20000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3, 3},
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@@ -127,7 +127,9 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
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mmu_perm=4;
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if (is486 && !(cr0 & (1 << 30)))
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cpu_cache_int_enabled = 1;
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else
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else if (isibmcpu)
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cpu_cache_int_enabled = 1;
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else
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cpu_cache_int_enabled = 0;
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if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
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cpu_update_waitstates();
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@@ -909,7 +909,10 @@ reset_common(int hard)
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cr0 = 1 << 30;
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else
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cr0 = 0;
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cpu_cache_int_enabled = 0;
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if (isibmcpu)
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cpu_cache_int_enabled = 1;
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else
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cpu_cache_int_enabled = 0;
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cpu_update_waitstates();
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cr4 = 0;
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cpu_state.eflags = 0;
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@@ -151,6 +151,7 @@ int is286,
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is386,
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is486 = 1,
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cpu_iscyrix,
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isibmcpu,
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israpidcad,
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is_pentium;
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@@ -259,12 +260,13 @@ cpu_set(void)
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is8086 = (cpu_s->cpu_type > CPU_8088);
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is286 = (cpu_s->cpu_type >= CPU_286);
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is386 = (cpu_s->cpu_type >= CPU_386SX);
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isibmcpu = (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
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israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
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is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD);
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is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL );
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is_pentium = (cpu_s->cpu_type >= CPU_WINCHIP);
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hasfpu = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD);
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1);
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cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC);
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cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC );
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if (cpu_s->multi) {
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if (cpu_s->pci_speed)
|
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cpu_busspeed = cpu_s->pci_speed;
|
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@@ -484,7 +486,8 @@ cpu_set(void)
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timing_jmp_pm = 23;
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timing_jmp_pm_gate = 38;
|
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break;
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case CPU_IBM386SLC:
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case CPU_386SX:
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timing_rr = 2; /*register dest - register src*/
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timing_rm = 6; /*register dest - memory src*/
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@@ -546,6 +549,79 @@ cpu_set(void)
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timing_jmp_pm = 27;
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timing_jmp_pm_gate = 45;
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break;
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case CPU_IBM486SLC:
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#ifdef USE_DYNAREC
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x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
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#else
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x86_setopcodes(ops_386, ops_486_0f);
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#endif
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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timing_mr = 5; /*memory dest - register src*/
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timing_mm = 3;
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timing_rml = 4; /*register dest - memory src long*/
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timing_mrl = 5; /*memory dest - register src long*/
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timing_mml = 5;
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timing_bt = 3-1; /*branch taken*/
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timing_bnt = 1; /*branch not taken*/
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timing_int = 4;
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timing_int_rm = 26;
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timing_int_v86 = 82;
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timing_int_pm = 44;
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timing_int_pm_outer = 71;
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timing_iret_rm = 15;
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timing_iret_v86 = 36; /*unknown*/
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timing_iret_pm = 20;
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timing_iret_pm_outer = 36;
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timing_call_rm = 18;
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timing_call_pm = 20;
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timing_call_pm_gate = 35;
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timing_call_pm_gate_inner = 69;
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timing_retf_rm = 13;
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timing_retf_pm = 17;
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timing_retf_pm_outer = 35;
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timing_jmp_rm = 17;
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timing_jmp_pm = 19;
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timing_jmp_pm_gate = 32;
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timing_misaligned = 3;
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break;
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case CPU_IBM486BL:
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#ifdef USE_DYNAREC
|
||||
x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_486_0f);
|
||||
#endif
|
||||
timing_rr = 1; /*register dest - register src*/
|
||||
timing_rm = 2; /*register dest - memory src*/
|
||||
timing_mr = 3; /*memory dest - register src*/
|
||||
timing_mm = 3;
|
||||
timing_rml = 2; /*register dest - memory src long*/
|
||||
timing_mrl = 3; /*memory dest - register src long*/
|
||||
timing_mml = 3;
|
||||
timing_bt = 3-1; /*branch taken*/
|
||||
timing_bnt = 1; /*branch not taken*/
|
||||
timing_int = 4;
|
||||
timing_int_rm = 26;
|
||||
timing_int_v86 = 82;
|
||||
timing_int_pm = 44;
|
||||
timing_int_pm_outer = 71;
|
||||
timing_iret_rm = 15;
|
||||
timing_iret_v86 = 36; /*unknown*/
|
||||
timing_iret_pm = 20;
|
||||
timing_iret_pm_outer = 36;
|
||||
timing_call_rm = 18;
|
||||
timing_call_pm = 20;
|
||||
timing_call_pm_gate = 35;
|
||||
timing_call_pm_gate_inner = 69;
|
||||
timing_retf_rm = 13;
|
||||
timing_retf_pm = 17;
|
||||
timing_retf_pm_outer = 35;
|
||||
timing_jmp_rm = 17;
|
||||
timing_jmp_pm = 19;
|
||||
timing_jmp_pm_gate = 32;
|
||||
timing_misaligned = 3;
|
||||
break;
|
||||
|
||||
case CPU_RAPIDCAD:
|
||||
#ifdef USE_DYNAREC
|
||||
|
||||
@@ -27,34 +27,37 @@
|
||||
#define CPU_286 2 /* 286 class CPUs */
|
||||
#define CPU_386SX 3 /* 386 class CPUs */
|
||||
#define CPU_386DX 4
|
||||
#define CPU_RAPIDCAD 5
|
||||
#define CPU_486SLC 6
|
||||
#define CPU_486DLC 7
|
||||
#define CPU_i486SX 8 /* 486 class CPUs */
|
||||
#define CPU_Am486SX 9
|
||||
#define CPU_Cx486S 10
|
||||
#define CPU_i486DX 11
|
||||
#define CPU_Am486DX 12
|
||||
#define CPU_Cx486DX 13
|
||||
#define CPU_iDX4 14
|
||||
#define CPU_Cx5x86 15
|
||||
#define CPU_WINCHIP 16 /* 586 class CPUs */
|
||||
#define CPU_WINCHIP2 17
|
||||
#define CPU_PENTIUM 18
|
||||
#define CPU_PENTIUMMMX 19
|
||||
#define CPU_Cx6x86 20
|
||||
#define CPU_Cx6x86MX 21
|
||||
#define CPU_Cx6x86L 22
|
||||
#define CPU_CxGX1 23
|
||||
#define CPU_K5 24
|
||||
#define CPU_5K86 25
|
||||
#define CPU_K6 26
|
||||
#define CPU_K6_2 27
|
||||
#define CPU_K6_3 28
|
||||
#define CPU_K6_2P 29
|
||||
#define CPU_K6_3P 30
|
||||
#define CPU_PENTIUMPRO 31 /* 686 class CPUs */
|
||||
#define CPU_PENTIUM2D 32
|
||||
#define CPU_IBM386SLC 5
|
||||
#define CPU_IBM486SLC 6
|
||||
#define CPU_IBM486BL 7
|
||||
#define CPU_RAPIDCAD 8
|
||||
#define CPU_486SLC 9
|
||||
#define CPU_486DLC 10
|
||||
#define CPU_i486SX 11 /* 486 class CPUs */
|
||||
#define CPU_Am486SX 12
|
||||
#define CPU_Cx486S 13
|
||||
#define CPU_i486DX 14
|
||||
#define CPU_Am486DX 15
|
||||
#define CPU_Cx486DX 16
|
||||
#define CPU_iDX4 17
|
||||
#define CPU_Cx5x86 18
|
||||
#define CPU_WINCHIP 19 /* 586 class CPUs */
|
||||
#define CPU_WINCHIP2 20
|
||||
#define CPU_PENTIUM 21
|
||||
#define CPU_PENTIUMMMX 22
|
||||
#define CPU_Cx6x86 23
|
||||
#define CPU_Cx6x86MX 24
|
||||
#define CPU_Cx6x86L 25
|
||||
#define CPU_CxGX1 26
|
||||
#define CPU_K5 27
|
||||
#define CPU_5K86 28
|
||||
#define CPU_K6 29
|
||||
#define CPU_K6_2 30
|
||||
#define CPU_K6_3 31
|
||||
#define CPU_K6_2P 32
|
||||
#define CPU_K6_3P 33
|
||||
#define CPU_PENTIUMPRO 34 /* 686 class CPUs */
|
||||
#define CPU_PENTIUM2D 35
|
||||
|
||||
#define MANU_INTEL 0
|
||||
#define MANU_AMD 1
|
||||
@@ -90,6 +93,9 @@ extern CPU cpus_Am386SX[];
|
||||
extern CPU cpus_Am386DX[];
|
||||
extern CPU cpus_486SLC[];
|
||||
extern CPU cpus_486DLC[];
|
||||
extern CPU cpus_IBM386SLC[];
|
||||
extern CPU cpus_IBM486SLC[];
|
||||
extern CPU cpus_IBM486BL[];
|
||||
extern CPU cpus_i486[];
|
||||
extern CPU cpus_Am486[];
|
||||
extern CPU cpus_Cx486[];
|
||||
@@ -324,6 +330,7 @@ extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
|
||||
penalties when crossing 8-byte boundaries*/
|
||||
|
||||
extern int is8086, is286, is386, is486;
|
||||
extern int isibmcpu;
|
||||
extern int is_rapidcad;
|
||||
extern int hasfpu;
|
||||
#define CPU_FEATURE_RDTSC (1 << 0)
|
||||
|
||||
@@ -186,6 +186,34 @@ CPU cpus_486SLC[] = {
|
||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
|
||||
};
|
||||
|
||||
CPU cpus_IBM386SLC[] = {
|
||||
/*IBM 386SLC*/
|
||||
{"386SLC/16", CPU_IBM386SLC, 16000000, 1, 0, 0x300, 0, 0, 0, 3,3,3,3, 2},
|
||||
{"386SLC/20", CPU_IBM386SLC, 20000000, 1, 0, 0x300, 0, 0, 0, 4,4,3,3, 3},
|
||||
{"386SLC/25", CPU_IBM386SLC, 25000000, 1, 0, 0x300, 0, 0, 0, 4,4,3,3, 3},
|
||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
|
||||
};
|
||||
|
||||
CPU cpus_IBM486SLC[] = {
|
||||
/*IBM 486SLC*/
|
||||
{"486SLC/33", CPU_IBM486SLC, 33333333, 1, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
|
||||
{"486SLC2/50", CPU_IBM486SLC, 50000000, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 6},
|
||||
{"486SLC2/66", CPU_IBM486SLC, 66666666, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 8},
|
||||
{"486SLC3/60", CPU_IBM486SLC, 60000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 7},
|
||||
{"486SLC3/75", CPU_IBM486SLC, 75000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 9},
|
||||
{"486SLC3/100", CPU_IBM486SLC, 100000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 12},
|
||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
|
||||
};
|
||||
|
||||
CPU cpus_IBM486BL[] = {
|
||||
/*IBM Blue Lightning*/
|
||||
{"486BL2/50", CPU_IBM486BL, 50000000, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 6},
|
||||
{"486BL2/66", CPU_IBM486BL, 66666666, 2, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 8},
|
||||
{"486BL3/75", CPU_IBM486BL, 75000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 9},
|
||||
{"486BL3/100", CPU_IBM486BL, 100000000, 3, 0, 0x400, 0, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 12},
|
||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0, 0}
|
||||
};
|
||||
|
||||
CPU cpus_486DLC[] = {
|
||||
/*Cx486DLC*/
|
||||
{"Cx486DLC/25", CPU_486DLC, 25000000, 1, 0, 0x401, 0, 0x0001, 0, 4, 4,3,3, 3},
|
||||
|
||||
@@ -120,9 +120,11 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
mmu_perm=4;
|
||||
if (is486 && !(cr0 & (1 << 30)))
|
||||
cpu_cache_int_enabled = 1;
|
||||
else
|
||||
cpu_cache_int_enabled = 0;
|
||||
if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
|
||||
else if (isibmcpu)
|
||||
cpu_cache_int_enabled = 1;
|
||||
else
|
||||
cpu_cache_int_enabled = 0;
|
||||
if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
|
||||
cpu_update_waitstates();
|
||||
if (cr0 & 1)
|
||||
cpu_cur_status |= CPU_STATUS_PMODE;
|
||||
|
||||
@@ -99,7 +99,7 @@ const machine_t machines[] = {
|
||||
{ "[286 ISA] Quadtel IBM AT", "ibmatquadtel", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibmatquadtel_init, NULL },
|
||||
{ "[286 ISA] Phoenix IBM AT", "ibmatpx", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibmatpx_init, NULL },
|
||||
{ "[286 ISA] IBM PS/1 model 2011", "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 512,16384, 512, 63, machine_ps1_m2011_init, NULL },
|
||||
{ "[286 ISA] IBM PS/2 model 30-286", "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
|
||||
{ "[286 ISA] IBM PS/2 model 30-286", "ibmps2_m30_286", {{"Intel", cpus_ps2_m30_286}, {"IBM", cpus_IBM486SLC}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
|
||||
{ "[286 ISA] IBM XT Model 286", "ibmxt286", {{"", cpus_ibmxt286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 127, machine_at_ibmxt286_init, NULL },
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
|
||||
{ "[286 ISA] OpenAT", "open_at", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_open_at_init, NULL },
|
||||
@@ -114,7 +114,7 @@ const machine_t machines[] = {
|
||||
{ "[286 ISA] Headland IQS", "iqs", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_iqs_init, NULL },
|
||||
{ "[286 ISA] Samsung Deskmaster 286", "deskmaster286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_deskmaster286_init, NULL },
|
||||
|
||||
{ "[286 MCA] IBM PS/2 model 50", "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 10, 1, 63, machine_ps2_model_50_init, NULL },
|
||||
{ "[286 MCA] IBM PS/2 model 50", "ibmps2_m50", {{"Intel", cpus_ps2_m30_286}, {"IBM", cpus_IBM486SLC}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 10, 1, 63, machine_ps2_model_50_init, NULL },
|
||||
|
||||
{ "[386SX ISA] AMA-932J", "ama932j", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 512, 8192, 128, 127, machine_at_ama932j_init, at_ama932j_get_device },
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMI386SX)
|
||||
@@ -126,7 +126,7 @@ const machine_t machines[] = {
|
||||
{ "[386SX ISA] IBM PS/1 m.2121+ISA", "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 6, 1, 63, machine_ps1_m2121_init, NULL },
|
||||
{ "[386SX ISA] KMX-C-02", "kmxc02", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL },
|
||||
|
||||
{ "[386SX MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
|
||||
{ "[386SX MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM", cpus_IBM486SLC}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_MICRONICS386)
|
||||
{ "[386SX ISA] Unknown Micronics 386 Board", "micronics386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_micronics386_init, NULL },
|
||||
@@ -141,8 +141,8 @@ const machine_t machines[] = {
|
||||
{ "[386DX ISA] Compaq Portable III (386)", "portableiii386", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO | MACHINE_VIDEO_FIXED, 1, 14, 1, 127, machine_at_portableiii386_init, NULL },
|
||||
#endif
|
||||
|
||||
{ "[386DX MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 80", "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM", cpus_IBM486BL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 80", "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM", cpus_IBM486BL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
|
||||
|
||||
{ "[486 ISA] AMI 486 clone", "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL },
|
||||
{ "[486 ISA] AMI ALi 1429", "ali1429", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_ali1429_init, NULL },
|
||||
|
||||
@@ -86,7 +86,7 @@ const machine_t machines[] = {
|
||||
{ "[286 ISA] Quadtel IBM AT", "ibmatquadtel", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibmatquadtel_init, NULL },
|
||||
{ "[286 ISA] Phoenix IBM AT", "ibmatpx", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibmatpx_init, NULL },
|
||||
{ "[286 ISA] IBM PS/1 model 2011", "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 512,16384, 512, 63, machine_ps1_m2011_init, NULL },
|
||||
{ "[286 ISA] IBM PS/2 model 30-286", "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
|
||||
{ "[286 ISA] IBM PS/2 model 30-286", "ibmps2_m30_286", {{"Intel", cpus_ps2_m30_286}, {"IBM", cpus_IBM486SLC}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO | MACHINE_VIDEO_FIXED | MACHINE_HDC | MACHINE_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
|
||||
{ "[286 ISA] IBM XT Model 286", "ibmxt286", {{"", cpus_ibmxt286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 127, machine_at_ibmxt286_init, NULL },
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
|
||||
{ "[286 ISA] OpenAT", "open_at", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_open_at_init, NULL },
|
||||
@@ -101,7 +101,7 @@ const machine_t machines[] = {
|
||||
{ "[286 ISA] Headland IQS", "iqs", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_iqs_init, NULL },
|
||||
{ "[286 ISA] Samsung Deskmaster 286", "deskmaster286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_deskmaster286_init, NULL },
|
||||
|
||||
{ "[286 MCA] IBM PS/2 model 50", "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 10, 1, 63, machine_ps2_model_50_init, NULL },
|
||||
{ "[286 MCA] IBM PS/2 model 50", "ibmps2_m50", {{"Intel", cpus_ps2_m30_286}, {"IBM", cpus_IBM486SLC}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 10, 1, 63, machine_ps2_model_50_init, NULL },
|
||||
|
||||
{ "[386SX ISA] AMA-932J", "ama932j", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 512, 8192, 128, 127, machine_at_ama932j_init, at_ama932j_get_device },
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMI386SX)
|
||||
@@ -117,7 +117,7 @@ const machine_t machines[] = {
|
||||
{ "[386SX ISA] Unknown Micronics 386 Board", "micronics386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_micronics386_init, NULL },
|
||||
#endif
|
||||
|
||||
{ "[386SX MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
|
||||
{ "[386SX MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM", cpus_IBM486SLC}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
|
||||
|
||||
{ "[386DX ISA] AMI 386DX clone", "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL },
|
||||
{ "[386DX ISA] Award 386DX clone", "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_init, NULL },
|
||||
@@ -128,8 +128,8 @@ const machine_t machines[] = {
|
||||
{ "[386DX ISA] Compaq Portable III (386)", "portableiii386", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO | MACHINE_VIDEO_FIXED, 1, 14, 1, 127, machine_at_portableiii386_init, NULL },
|
||||
#endif
|
||||
|
||||
{ "[386DX MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 80", "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM", cpus_IBM486BL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL },
|
||||
{ "[386DX MCA] IBM PS/2 model 80", "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM", cpus_IBM486BL}, {"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
|
||||
|
||||
{ "[486 ISA] AMI 486 clone", "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL },
|
||||
{ "[486 ISA] AMI ALi 1429", "ali1429", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_ali1429_init, NULL },
|
||||
|
||||
Reference in New Issue
Block a user