Revert "Merge branch 'bugfixes' into master"

This reverts commit 8250b57325, reversing
changes made to 6c643d05b8.
This commit is contained in:
Daniel Gurney
2025-07-01 03:04:14 +03:00
parent 8250b57325
commit aef9d1ed94
25 changed files with 616 additions and 412 deletions

View File

@@ -18,8 +18,6 @@
#ifndef VIDEO_8514A_H
#define VIDEO_8514A_H
#include <stdbool.h>
#define INT_VSY (1 << 0)
#define INT_GE_BSY (1 << 1)
#define INT_FIFO_OVR (1 << 2)
@@ -46,34 +44,39 @@ typedef enum {
MODE_MAX
} ibm8514_mode_t;
typedef struct ibm8514_hwcursor_s {
int enable;
typedef struct hwcursor8514_t {
int ena;
int x;
int y;
int xoff;
int yoff;
int cur_xsize;
int cur_ysize;
int v_acc;
int h_acc;
uint32_t addr;
uint32_t pitch;
} ibm8514_hwcursor_t;
} hwcursor8514_t;
typedef union {
uint64_t q;
uint32_t d[2];
uint16_t w[4];
uint8_t b[8];
} ibm8514_latch_t;
} latch8514_t;
typedef struct ibm8514_t {
rom_t bios_rom;
rom_t bios_rom2;
mem_mapping_t bios_mapping;
ibm8514_hwcursor_t hwcursor;
ibm8514_hwcursor_t hwcursor_latch;
uint8_t *rom1;
uint8_t *rom2;
hwcursor8514_t hwcursor;
hwcursor8514_t hwcursor_latch;
uint8_t pos_regs[8];
char *rom_path;
int force_old_addr;
int type;
ibm8514_card_type local;
int bpp;
@@ -96,14 +99,18 @@ typedef struct ibm8514_t {
int dac_r;
int dac_g;
int dac_b;
int internal_pitch;
int hwcursor_on;
int modechange;
uint64_t dispontime;
uint64_t dispofftime;
struct {
uint16_t subsys_cntl;
uint16_t setup_md;
uint16_t advfunc_cntl;
uint16_t advfunc_cntl_old;
uint16_t cur_y;
uint16_t cur_x;
int16_t destx;
@@ -131,51 +138,84 @@ typedef struct ibm8514_t {
uint16_t clip_bottom;
int16_t clip_left;
int16_t clip_top;
uint8_t pix_trans[2];
int poly_draw;
int ssv_state;
int x1;
int x2;
int x3;
int y1;
int y2;
int temp_cnt;
int16_t dx_ibm;
int16_t dy_ibm;
int16_t cx;
int16_t cx_back;
int16_t cy;
/* oldcx was not used! */
int16_t oldcx;
int16_t oldcy;
int16_t sx;
int16_t sy;
int16_t dx;
int16_t dy;
int16_t err;
uint32_t src;
uint32_t dest;
int x_count;
/* y_count not used */
int xx_count;
int y_count;
int input;
int input2;
int output;
int output2;
int ssv_len;
int ssv_len_back;
uint8_t ssv_dir;
uint8_t ssv_draw;
int odd_in;
int odd_out;
uint16_t scratch;
int fill_state;
int xdir;
int ydir;
int linedraw;
uint32_t ge_offset;
uint32_t src_ge_offset;
uint32_t dst_ge_offset;
uint16_t src_pitch;
uint16_t dst_pitch;
int64_t cur_x_24bpp;
int64_t cur_y_24bpp;
int64_t dest_x_24bpp;
int64_t dest_y_24bpp;
} accel;
uint16_t test;
int h_blankstart;
int h_blank_end_val;
int hblankstart;
int hblank_end_val;
int hblankend;
int vtotal_reg;
int vtotal_8514;
int hblank_ext;
int hblank_sub;
int v_total_reg;
int v_total;
int dispend;
int vsyncstart;
int v_sync_start;
int v_syncstart;
int split;
int hdisp_8514;
int htotal_8514;
int h_disp;
int h_total;
int h_sync_start;
int h_sync_width;
int h_disp_time;
int rowoffset;
int dispon;
int hdispon;
int hdisp_on;
int linecountff;
int vc;
int linepos;
int oddeven;
@@ -196,27 +236,34 @@ typedef struct ibm8514_t {
uint8_t linedbl;
uint8_t data_available;
uint8_t data_available2;
uint8_t rowcount;
int hsync_start;
int hsync_width;
int htotal;
int hdisp_vga;
int hdisp;
int hdisp2;
int hdisped;
int scanline;
int vsyncstart;
int vsyncwidth;
int vtotal;
int vdisp_8514;
int vdisp_vga;
int v_disp;
int v_disp2;
int vdisp;
int vdisp2;
int disp_cntl;
int interlace;
uint16_t subsys_cntl;
uint8_t subsys_stat;
atomic_int force_busy;
atomic_int force_busy2;
atomic_int fifo_idx;
int blitter_busy;
uint64_t blitter_time;
uint64_t status_time;
int pitch;
int ext_pitch;
int ext_crt_pitch;
@@ -224,15 +271,14 @@ typedef struct ibm8514_t {
ibm8514_mode_t mode;
int onboard;
int linear;
bool vram_is_512k;
uint32_t vram_amount;
int vram_512k_8514;
int vendor_mode;
int _8514on;
int _8514crt;
PALETTE _8514pal;
ibm8514_latch_t latch;
latch8514_t latch;
void (*vblank_start)(void *priv);
void (*accel_out_fifo)(void *priv, uint16_t port, uint16_t val, int len);

View File

@@ -49,7 +49,7 @@ typedef struct ati_eeprom_t {
void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type);
void ati_eeprom_load_mach8(ati_eeprom_t *eeprom, char *fn, int mca);
void ati_eeprom_load_mach8_vga(ati_eeprom_t *eeprom, char *fn);
void ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat);
void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat);
int ati_eeprom_read(ati_eeprom_t *eeprom);
#endif /*VIDEO_ATI_EEPROM_H*/

View File

@@ -13,18 +13,14 @@
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Connor Hyde / starfrost, <mario64crashed@gmail.com>
*
* Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca.
* Copyright 2025 Connor Hyde.
*/
#ifndef VIDEO_EGA_H
#define VIDEO_EGA_H
#include <stdbool.h>
#if defined(EMU_MEM_H) && defined(EMU_ROM_H)
typedef struct ega_t {
mem_mapping_t mapping;
@@ -61,52 +57,65 @@ typedef struct ega_t {
uint16_t light_pen;
int32_t vidclock;
int32_t vres;
int32_t readmode;
int32_t writemode;
int32_t readplane;
int32_t vrammask;
int32_t chain4;
int32_t chain2_read;
int32_t chain2_write;
int32_t cursorvisible;
int32_t vc;
int32_t real_vc;
int32_t scanline;
int32_t dispon;
int32_t cursoron;
int32_t blink;
int32_t fullchange;
int32_t linepos;
int32_t vslines;
int32_t linecountff;
int32_t oddeven;
int32_t interlace;
int32_t linedbl;
int32_t rowcount;
int32_t vtotal;
int32_t dispend;
int32_t vsyncstart;
int32_t split;
int32_t hdisp;
int32_t htotal;
int32_t rowoffset;
int32_t vblankstart;
int32_t scrollcache;
int32_t firstline;
int32_t lastline;
int32_t firstline_draw;
int32_t lastline_draw;
int32_t x_add;
int32_t y_add;
int32_t displine;
int32_t index;
bool remap_required;
int32_t actual_type;
int32_t chipset;
int vidclock;
int fast;
int extvram;
int vres;
int readmode;
int writemode;
int readplane;
int vrammask;
int chain4;
int chain2_read;
int chain2_write;
int cursorvisible;
int oddeven_page;
int oddeven_chain;
int vc;
int real_vc;
int scanline;
int dispon;
int hdisp_on;
int cursoron;
int blink;
int fullchange;
int linepos;
int vslines;
int linecountff;
int oddeven;
int lowres;
int interlace;
int linedbl;
int lindebl;
int rowcount;
int vtotal;
int dispend;
int vsyncstart;
int split;
int hdisp;
int hdisp_old;
int htotal;
int hdisp_time;
int rowoffset;
int vblankstart;
int scrollcache;
int firstline;
int lastline;
int firstline_draw;
int lastline_draw;
int x_add;
int y_add;
int displine;
int res_x;
int res_y;
int bpp;
int index;
int remap_required;
int actual_type;
int chipset;
int mono_display;
int32_t mda_attr_to_color_table[256][2][2];
int mda_attr_to_color_table[256][2][2];
uint32_t charseta;
uint32_t charsetb;
@@ -155,7 +164,7 @@ extern const device_t jega_device;
extern const device_t jvga_device;
#endif
extern int32_t update_overscan;
extern int update_overscan;
#define DISPLAY_RGB 0
#define DISPLAY_COMPOSITE 1
@@ -165,7 +174,7 @@ extern int32_t update_overscan;
#define DISPLAY_WHITE 5
#if defined(EMU_MEM_H) && defined(EMU_ROM_H)
extern void ega_init(ega_t *ega, int32_t monitor_type, int32_t is_mono);
extern void ega_init(ega_t *ega, int monitor_type, int is_mono);
extern void ega_recalctimings(struct ega_t *ega);
extern void ega_recalc_remap_func(struct ega_t *ega);
#endif
@@ -177,18 +186,18 @@ extern void ega_write(uint32_t addr, uint8_t val, void *priv);
extern uint8_t ega_read(uint32_t addr, void *priv);
extern void ega_set_type(void *priv, uint32_t local);
extern int32_t firstline_draw;
extern int32_t lastline_draw;
extern int32_t displine;
extern int32_t scanline;
extern int firstline_draw;
extern int lastline_draw;
extern int displine;
extern int scanline;
extern uint32_t memaddr;
extern uint32_t cursoraddr;
extern int32_t cursorvisible;
extern int32_t cursoron;
extern int32_t cgablink;
extern int cursorvisible;
extern int cursoron;
extern int cgablink;
extern int32_t scrollcache;
extern int scrollcache;
extern uint8_t edatlookup[4][4];
extern uint8_t egaremap2bpp[256];

View File

@@ -34,7 +34,7 @@
struct monitor_t;
typedef struct hwcursor_t {
int enable;
int ena;
int x;
int y;
int xoff;
@@ -99,6 +99,7 @@ typedef struct svga_t {
int hdisp_time;
int rowoffset;
int dispon;
int hdisp_on;
int vc;
int scanline;
int linepos;

View File

@@ -20,7 +20,7 @@
#include <86box/rom.h>
typedef struct xga_hwcursor_t {
int enable;
int ena;
int x;
int y;
int xoff;
@@ -114,16 +114,18 @@ typedef struct xga_t {
int dac_pos;
int dac_r;
int dac_g;
int vtotal_xga;
int v_total;
int dispend;
int v_syncstart;
int split;
int vblankstart_xga;
int hdisp_xga;
int hdispold_xga;
int htotal_xga;
int v_blankstart;
int h_disp;
int h_disp_old;
int h_total;
int h_disp_time;
int rowoffset;
int dispon;
int hdispon_xga;
int h_disp_on;
int vc;
int scanline;
int linepos;

View File

@@ -161,7 +161,7 @@ bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_
break;
case 0x09: /* Command Register 2 (RS value = 1001) */
ramdac->cmd_r2 = val;
svga->dac_hwcursor.enable = !!(val & 0x03);
svga->dac_hwcursor.ena = !!(val & 0x03);
bt48x_set_bpp(ramdac, svga);
break;
case 0x0a:

View File

@@ -631,7 +631,7 @@ ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *s
}
svga->dac_hwcursor.addr = ramdac->smlc_part;
svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 0x04) ? 64 : 32;
svga->dac_hwcursor.enable = ((val & 0x03) != 0x00);
svga->dac_hwcursor.ena = ((val & 0x03) != 0x00);
break;
case 0x031:
if (!updt_cntl)

View File

@@ -170,7 +170,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg
svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize;
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize;
svga->dac_hwcursor.enable = !!(val & 0x03);
svga->dac_hwcursor.ena = !!(val & 0x03);
ramdac->mode = val & 0x03;
}
break;
@@ -182,13 +182,13 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg
svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize;
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize;
svga->dac_hwcursor.enable = !!(val & 0x03);
svga->dac_hwcursor.ena = !!(val & 0x03);
ramdac->mode = val & 0x03;
} else {
svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize;
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize;
svga->dac_hwcursor.enable = !!(ramdac->dcc & 0x03);
svga->dac_hwcursor.ena = !!(ramdac->dcc & 0x03);
ramdac->mode = ramdac->dcc & 0x03;
}
break;

View File

@@ -376,19 +376,19 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x12e8:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 2) {
dev->vtotal_reg = val;
dev->vtotal_reg &= 0x1fff;
dev->v_total_reg = val;
dev->v_total_reg &= 0x1fff;
ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val);
svga_recalctimings(svga);
} else {
WRITE8(port, dev->vtotal_reg, val);
WRITE8(port, dev->v_total_reg, val);
}
break;
case 0x12e9:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 1) {
WRITE8(port, dev->vtotal_reg, val >> 8);
dev->vtotal_reg &= 0x1fff;
WRITE8(port, dev->v_total_reg, val >> 8);
dev->v_total_reg &= 0x1fff;
ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val);
svga_recalctimings(svga);
}
@@ -397,21 +397,21 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x16e8:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 2) {
dev->vdisp_8514 = val;
dev->vdisp_8514 &= 0x1fff;
ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514);
dev->v_disp = val;
dev->v_disp &= 0x1fff;
ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp);
ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
svga_recalctimings(svga);
} else {
WRITE8(port, dev->vdisp_8514, val);
WRITE8(port, dev->v_disp, val);
}
break;
case 0x16e9:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 1) {
WRITE8(port, dev->vdisp_8514, val >> 8);
dev->vdisp_8514 &= 0x1fff;
ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514);
WRITE8(port, dev->v_disp, val >> 8);
dev->v_disp &= 0x1fff;
ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp);
ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
svga_recalctimings(svga);
}
@@ -420,26 +420,25 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x1ae8:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 2) {
dev->vsyncstart = val;
dev->vsyncstart &= 0x1fff;
ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart);
dev->v_sync_start = val;
dev->v_sync_start &= 0x1fff;
ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val);
svga_recalctimings(svga);
} else {
WRITE8(port, dev->vsyncstart, val);
WRITE8(port, dev->v_sync_start, val);
}
break;
case 0x1ae9:
/*In preparation to switch from VGA to 8514/A mode*/
if (len == 1) {
WRITE8(port, dev->vsyncstart, val >> 8);
dev->vsyncstart &= 0x1fff;
dev->vsyncstart++;
// change this if it breaks
WRITE8(port, dev->v_sync_start, val >> 8);
dev->v_sync_start &= 0x1fff;
dev->v_syncstart = dev->v_sync_start + 1;
if (dev->interlace)
dev->vsyncstart >>= 1;
dev->v_syncstart >>= 1;
ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart);
ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val);
svga_recalctimings(svga);
}
@@ -466,6 +465,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
dev->subsys_stat &= ~val;
if ((val & 0xc000) == 0x8000) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
} else {
WRITE8(port, dev->subsys_cntl, val);
@@ -477,6 +477,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
WRITE8(port, dev->subsys_cntl, val);
if ((val & 0xc0) == 0x80) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
}
break;
@@ -484,7 +485,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x4ae8:
WRITE8(port, dev->accel.advfunc_cntl, val);
dev->on = dev->accel.advfunc_cntl & 0x01;
ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga);
ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp);
ibm8514_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480");
svga_recalctimings(svga);
break;
@@ -519,6 +520,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x92e8:
if (len == 2) {
dev->test = val;
dev->accel.err_term = val & 0x3fff;
if (val & 0x2000)
dev->accel.err_term |= ~0x1fff;
@@ -536,6 +538,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
dev->accel.ssv_state = 0;
if (len == 2) {
dev->data_available = 0;
dev->data_available2 = 0;
dev->accel.cmd = val;
dev->accel.cmd_back = 1;
if (dev->accel.cmd & 0x100)
@@ -787,7 +790,7 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len)
case 0x92e8:
if (len == 2)
temp = dev->accel.err_term;
temp = dev->test;
break;
case 0x96e8:
@@ -845,12 +848,12 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len)
if (len == 1) {
dev->fifo_idx = 0;
if (dev->force_busy)
if (dev->force_busy2)
temp |= 0x02; /*Hardware busy*/
dev->force_busy = 0;
dev->force_busy2 = 0;
if (dev->data_available) {
if (dev->data_available2) {
temp |= 0x01; /*Read Data available*/
switch (dev->accel.cmd >> 13) {
case 2:
@@ -858,11 +861,11 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len)
case 4:
case 6:
if (dev->accel.sy < 0)
dev->data_available = 0;
dev->data_available2 = 0;
break;
default:
if (!dev->accel.sy)
dev->data_available = 0;
dev->data_available2 = 0;
break;
}
}
@@ -908,9 +911,11 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
switch (port) {
case 0x2e8:
if (dev->vc == dev->v_syncstart) {
if (dev->accel.advfunc_cntl & 0x04)
temp |= 0x02;
}
if (dev->vc == dev->vsyncstart && dev->accel.advfunc_cntl & 0x04)
temp |= 0x02;
ibm8514_log("Read: Display Status1=%02x.\n", temp);
break;
@@ -960,10 +965,12 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
if (!dev->fifo_idx && !dev->on) {
dev->force_busy = 0;
dev->force_busy2 = 0;
dev->data_available = 0;
dev->data_available2 = 0;
temp |= INT_FIFO_EMP;
}
temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80));
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
temp |= 0x20;
}
break;
@@ -1016,7 +1023,9 @@ ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t
if (ibm8514_cpu_src(svga)) {
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
}
}
@@ -1230,6 +1239,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (!dev->accel.ssv_len) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1330,6 +1340,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (!dev->accel.ssv_len) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1397,11 +1408,15 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
}
}
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
} else if (ibm8514_cpu_dest(svga)) {
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -1509,6 +1524,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (!dev->accel.sy) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1633,6 +1649,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (!dev->accel.sy) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1740,6 +1757,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (!dev->accel.sy) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1843,7 +1861,9 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
}
}
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
} else if (ibm8514_cpu_dest(svga)) {
if (!(dev->accel.cmd & 0x02)) {
@@ -1860,7 +1880,9 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
}
ibm8514_log("INPUT=%d.\n", dev->accel.input);
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return; /*Wait for data from CPU*/
}
}
@@ -2014,6 +2036,7 @@ skip_vector_rect_write:
if (dev->accel.sy < 0) {
dev->force_busy = 0;
dev->force_busy2 = 0;
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
}
@@ -2175,6 +2198,7 @@ skip_nibble_rect_write:
dev->accel.cmd_back = 1;
}
dev->force_busy = 0;
dev->force_busy2 = 0;
return;
}
}
@@ -2408,7 +2432,7 @@ skip_nibble_rect_write:
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat);
ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back);
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
}
} else
@@ -2558,11 +2582,15 @@ skip_nibble_rect_write:
if (ibm8514_cpu_src(svga)) {
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
} else if (ibm8514_cpu_dest(svga)) {
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -2631,6 +2659,7 @@ skip_nibble_rect_write:
if (!dev->accel.sy) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -2739,6 +2768,7 @@ skip_nibble_rect_write:
if (!dev->accel.sy) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -2826,11 +2856,15 @@ skip_nibble_rect_write:
}
}
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
} else if (ibm8514_cpu_dest(svga)) {
dev->force_busy = 1;
dev->force_busy2 = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return; /*Wait for data from CPU*/
} else
ibm8514_log("BitBLT normal: Parameters: DX=%d, DY=%d, CX=%d, CY=%d, dstwidth=%d, dstheight=%d, clipl=%d, clipr=%d, clipt=%d, clipb=%d.\n", dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, dev->accel.sx, dev->accel.sy, clip_l, clip_r, clip_t, clip_b);
@@ -2985,6 +3019,7 @@ skip_nibble_bitblt_write:
if (dev->accel.sy < 0) {
dev->accel.cmd_back = 1;
dev->force_busy = 0;
dev->force_busy2 = 0;
dev->fifo_idx = 0;
}
return;
@@ -3334,9 +3369,9 @@ ibm8514_render_blank(svga_t *svga)
dev->lastline_draw = dev->displine;
uint32_t *line_ptr = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
uint32_t line_width = (uint32_t)(dev->hdisp_8514) * sizeof(uint32_t);
uint32_t line_width = (uint32_t)(dev->h_disp) * sizeof(uint32_t);
if (dev->hdisp_8514 > 0)
if (dev->h_disp > 0)
memset(line_ptr, 0, line_width);
}
@@ -3357,7 +3392,7 @@ ibm8514_render_8bpp(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (int x = 0; x <= dev->hdisp_8514; x += 8) {
for (int x = 0; x <= dev->h_disp; x += 8) {
dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]);
p[0] = dev->pallook[dat & dev->dac_mask & 0xff];
p[1] = dev->pallook[(dat >> 8) & dev->dac_mask & 0xff];
@@ -3395,7 +3430,7 @@ ibm8514_render_15bpp(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->hdisp_8514; x += 8) {
for (x = 0; x <= dev->h_disp; x += 8) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]);
p[x] = video_15to32[dat & 0xffff];
p[x + 1] = video_15to32[dat >> 16];
@@ -3435,7 +3470,7 @@ ibm8514_render_16bpp(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->hdisp_8514; x += 8) {
for (x = 0; x <= dev->h_disp; x += 8) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]);
p[x] = video_16to32[dat & 0xffff];
p[x + 1] = video_16to32[dat >> 16];
@@ -3474,7 +3509,7 @@ ibm8514_render_24bpp(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (int x = 0; x <= dev->hdisp_8514; x += 4) {
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]);
p[x] = dat & 0xffffff;
@@ -3510,7 +3545,7 @@ ibm8514_render_BGR(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (int x = 0; x <= dev->hdisp_8514; x += 4) {
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]);
p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
@@ -3547,7 +3582,7 @@ ibm8514_render_ABGR8888(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->hdisp_8514; x++) {
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
}
@@ -3574,7 +3609,7 @@ ibm8514_render_32bpp(svga_t *svga)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->hdisp_8514; x++) {
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]);
p[x] = dat & 0xffffff;
}
@@ -3589,7 +3624,7 @@ ibm8514_render_overscan_left(ibm8514_t *dev, svga_t *svga)
if ((dev->displine + svga->y_add) < 0)
return;
if (svga->scrblank || (dev->hdisp_8514 == 0))
if (svga->scrblank || (dev->h_disp == 0))
return;
for (int i = 0; i < svga->x_add; i++)
@@ -3604,12 +3639,12 @@ ibm8514_render_overscan_right(ibm8514_t *dev, svga_t *svga)
if ((dev->displine + svga->y_add) < 0)
return;
if (svga->scrblank || (dev->hdisp_8514 == 0))
if (svga->scrblank || (dev->h_disp == 0))
return;
right = (overscan_x >> 1);
for (int i = 0; i < right; i++)
buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->hdisp_8514 + i] = svga->overscan_color;
buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->h_disp + i] = svga->overscan_color;
}
void
@@ -3631,12 +3666,12 @@ ibm8514_poll(void *priv)
if (dev->on) {
ibm8514_log("ON!\n");
if (!dev->linepos) {
if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.enable) {
if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) {
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff;
dev->hwcursor_oddeven = 0;
}
if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.enable && dev->interlace) {
if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1);
dev->hwcursor_oddeven = 1;
}
@@ -3646,6 +3681,7 @@ ibm8514_poll(void *priv)
dev->linepos = 1;
if (dev->dispon) {
dev->hdisp_on = 1;
dev->memaddr &= dev->vram_mask;
@@ -3688,6 +3724,7 @@ ibm8514_poll(void *priv)
timer_advance_u64(&svga->timer, dev->dispontime);
if (dev->dispon)
svga->cgastat &= ~1;
dev->hdisp_on = 0;
dev->linepos = 0;
if (dev->dispon) {
@@ -3722,10 +3759,10 @@ ibm8514_poll(void *priv)
if (svga->fullchange)
svga->fullchange--;
}
if (dev->vc == dev->vsyncstart) {
if (dev->vc == dev->v_syncstart) {
dev->dispon = 0;
svga->cgastat |= 8;
x = dev->hdisp_8514;
x = dev->h_disp;
if (dev->interlace && !dev->oddeven)
dev->lastline++;
@@ -3755,7 +3792,7 @@ ibm8514_poll(void *priv)
dev->memaddr = (dev->memaddr << 2);
dev->memaddr_backup = (dev->memaddr_backup << 2);
}
if (dev->vc == dev->vtotal_8514) {
if (dev->vc == dev->v_total) {
dev->vc = 0;
dev->scanline = (svga->crtc[0x8] & 0x1f);
dev->dispon = 1;
@@ -3781,48 +3818,43 @@ ibm8514_recalctimings(svga_t *svga)
ati8514_recalctimings(svga);
} else {
if (dev->on) {
dev->hdisp_vga = (dev->hdisped + 1) << 3;
dev->htotal_8514 = dev->htotal + 1;
dev->hdisp = (dev->hdisped + 1) << 3;
dev->h_total = dev->htotal + 1;
if (dev->htotal_8514 == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/
dev->htotal_8514 = 0x9e;
if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/
dev->h_total = 0x9e;
dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1;
if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 766))
dev->vdisp_vga += 2;
dev->vtotal_8514 = dev->vtotal_reg + 1;
if (dev->vtotal_8514 == 1)
dev->vtotal_8514 = 0x0669;
dev->vdisp = (dev->v_disp + 1) >> 1;
if ((dev->vdisp == 478) || (dev->vdisp == 766))
dev->vdisp += 2;
dev->v_total = dev->v_total_reg + 1;
if (dev->v_total == 1)
dev->v_total = 0x0669;
if (dev->interlace)
dev->vtotal_8514 >>= 1;
dev->vsyncstart++;
dev->vsyncstart_8514 = dev-vsyncstart_8514 + 1;
if (dev->vsyncstart_8514 == 1)
dev->vsyncstart_8514 = 0x0601;
dev->v_total >>= 1;
dev->v_syncstart = dev->v_sync_start + 1;
if (dev->v_syncstart == 1)
dev->v_syncstart = 0x0601;
if (dev->interlace)
dev->vsyncstart >>= 1;
dev->v_syncstart >>= 1;
dev->rowcount = !!(dev->disp_cntl & 0x08);
if ((dev->hdisp_vga != 640) && (dev->hdisp_vga != 1024)) {
if ((dev->hdisp != 640) && (dev->hdisp != 1024)) {
if (dev->accel.advfunc_cntl & 0x04) {
dev->hdisp_vga = 1024;
dev->vdisp_vga = 768;
dev->hdisp = 1024;
dev->vdisp = 768;
} else {
dev->hdisp_vga = 640;
dev->vdisp_vga = 480;
dev->hdisp = 640;
dev->vdisp = 480;
}
}
dev->hdisp_8514 = dev->hdisp_vga;
dev->dispend = dev->vdisp_vga;
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
dev->h_disp_time = dev->hdisp >> 3;
if (dev->accel.advfunc_cntl & 0x04)
svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0;
@@ -3837,8 +3869,8 @@ ibm8514_recalctimings(svga_t *svga)
dev->pitch = 1024;
dev->rowoffset = 0x80;
if (dev->vram_is_512k) {
if (dev->hdisp_8514 == 640)
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
}
dev->accel_bpp = 8;
@@ -3846,7 +3878,7 @@ ibm8514_recalctimings(svga_t *svga)
ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->accel.advfunc_cntl & 4, !ibm8514_standalone_enabled);
}
}
ibm8514_log("8514 enabled, hdisp_vga=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp_vga, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split);
ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split);
}
static uint8_t
@@ -3922,7 +3954,7 @@ ibm8514_init(const device_t *info)
svga->ext8514 = NULL;
dev->vram_amount = device_get_config_int("memory");
dev->vram_is_512k = dev->vram_amount == 512;
dev->vram_512k_8514 = dev->vram_amount == 512;
dev->vram_size = dev->vram_amount << 10;
dev->vram = calloc(dev->vram_size, 1);
dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1);

View File

@@ -107,18 +107,18 @@ ati_eeprom_save(ati_eeprom_t *eeprom)
}
void
ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat)
ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
{
if (!enable)
if (!ena)
eeprom->out = 1;
if (clk && !eeprom->oldclk) {
if (enable && !eeprom->oldena) {
if (ena && !eeprom->oldena) {
eeprom->state = EEPROM_WAIT;
eeprom->opcode = 0;
eeprom->count = 3;
eeprom->out = 1;
} else if (enable) {
} else if (ena) {
switch (eeprom->state) {
case EEPROM_WAIT:
if (!dat)
@@ -231,9 +231,9 @@ ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat)
break;
}
}
eeprom->oldena = enable;
eeprom->oldena = ena;
} else if (!clk && eeprom->oldclk) {
if (enable) {
if (ena) {
switch (eeprom->state) {
case EEPROM_OUTPUT:
eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0;

View File

@@ -256,6 +256,9 @@ typedef struct mach64_t {
event_t *wake_fifo_thread;
event_t *fifo_not_full_event;
uint64_t blitter_time;
uint64_t status_time;
uint16_t pci_id;
uint32_t config_chip_id;
uint32_t block_decoded_io;
@@ -1187,6 +1190,8 @@ fifo_thread(void *param)
thread_reset_event(mach64->wake_fifo_thread);
mach64->blitter_busy = 1;
while (!FIFO_EMPTY) {
uint64_t start_time = plat_timer_read();
uint64_t end_time;
fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK];
switch (fifo->addr_type & FIFO_TYPE) {
@@ -1209,6 +1214,9 @@ fifo_thread(void *param)
if (FIFO_ENTRIES > 0xe000)
thread_set_event(mach64->fifo_not_full_event);
end_time = plat_timer_read();
mach64->blitter_time += end_time - start_time;
}
mach64->blitter_busy = 0;
}
@@ -2298,7 +2306,7 @@ mach64_vblank_start(svga_t *svga)
svga->overlay.addr = mach64->buf_offset[0] & 0x3ffff8;
svga->overlay.pitch = mach64->buf_pitch[0] & 0xfff;
svga->overlay.enable = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1);
svga->overlay.ena = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1);
mach64->overlay_v_acc = 0;
mach64->scaler_update = 1;
@@ -3345,9 +3353,9 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv)
ati_eeprom_write(&mach64->eeprom, mach64->gen_test_cntl & 0x10, mach64->gen_test_cntl & 2, mach64->gen_test_cntl & 1);
mach64->gen_test_cntl = (mach64->gen_test_cntl & ~8) | (ati_eeprom_read(&mach64->eeprom) ? 8 : 0);
if (mach64->type == MACH64_GX)
svga->dac_hwcursor.enable = !!(mach64->gen_test_cntl & 0x80);
svga->dac_hwcursor.ena = !!(mach64->gen_test_cntl & 0x80);
else
svga->hwcursor.enable = !!(mach64->gen_test_cntl & 0x80);
svga->hwcursor.ena = !!(mach64->gen_test_cntl & 0x80);
break;
case 0xdc:

View File

@@ -371,14 +371,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (mach_pixel_write(mach)) {
mach_log("Extended Bresenham Write pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
mach_log("Extended Bresenham Read pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -526,6 +530,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (cpu_input) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -534,6 +539,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (cpu_input) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -734,6 +740,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if ((mono_src == 1) && !count) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -742,6 +749,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
} else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -951,14 +959,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (mach_pixel_write(mach)) {
mach_log("Non-Conforming BitBLT Write pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
mach_log("Non-Conforming BitBLT Read pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -977,6 +989,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
mach_log("No DEST.\n");
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -988,6 +1001,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (mach->accel.sx_end == mach->accel.sx_start) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
mach_log("No SRC.\n");
@@ -1004,6 +1018,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (dev->accel.sy == mach->accel.height) {
mach_log("No Blit on DPCONFIG=3251.\n");
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->fifo_idx = 0;
dev->accel.cmd_back = 1;
@@ -1213,6 +1228,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (dev->accel.sy >= mach->accel.height) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -1260,14 +1276,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (mach_pixel_write(mach)) {
mach_log("Direct Linedraw Write pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
mach_log("Direct Linedraw Read pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -1372,6 +1392,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (!count) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -1517,6 +1538,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (dev->accel.sx >= mach->accel.width) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -1637,6 +1659,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (!count) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -1774,6 +1797,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (dev->accel.sx >= mach->accel.width) {
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
dev->fifo_idx = 0;
@@ -1906,14 +1930,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (mach_pixel_write(mach)) {
mach_log("Scan To X Write pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 0;
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
mach_log("Scan To X Read pixtrans.\n");
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
}
@@ -2010,6 +2038,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
dev->fifo_idx = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->accel.cmd_back = 1;
dev->accel.cur_x = dev->accel.dx;
@@ -2183,6 +2212,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
dev->fifo_idx = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->accel.cmd_back = 1;
return;
@@ -2597,7 +2627,7 @@ ati_render_24bpp(svga_t *svga)
dev->lastline_draw = dev->displine;
if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/
for (int x = 0; x <= dev->hdisp_8514; x += 4) {
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]);
p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
@@ -2613,7 +2643,7 @@ ati_render_24bpp(svga_t *svga)
dev->memaddr += 12;
}
} else { /*RGB, Red-(23:16), Green-(15:8), Blue-(7:0)*/
for (int x = 0; x <= dev->hdisp_8514; x += 4) {
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]);
p[x] = dat & 0xffffff;
@@ -2653,12 +2683,12 @@ ati_render_32bpp(svga_t *svga)
dev->lastline_draw = dev->displine;
if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/
for (x = 0; x <= dev->hdisp_8514; x++) {
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0x00ff0000) >> 16) | (dat & 0x0000ff00) | ((dat & 0x000000ff) << 16);
}
} else { /*RGB, Red-(31:24), Green-(23:16), Blue-(15:8)*/
for (x = 0; x <= dev->hdisp_8514; x++) {
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0xffffff00) >> 8);
}
@@ -2677,84 +2707,72 @@ mach_set_resolution(mach_t *mach, svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
dev->htotal_8514 = dev->htotal + 1;
dev->h_total = (dev->htotal + 1);
if (dev->h_total == 8) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/
dev->h_total = 0x9e;
if (dev->htotal_8514 == 8) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/
dev->htotal_8514 = 0x9e;
dev->hdisp_vga = (dev->hdisped + 1) << 3;
dev->hdisp = (dev->hdisped + 1) << 3;
dev->vdisp = (dev->v_disp + 1) >> 1;
if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 898) || (dev->vdisp == 1022))
dev->vdisp += 2;
dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1;
if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 598) || (dev->vdisp_vga == 766) || (dev->vdisp_vga == 1022))
dev->vdisp_vga += 2;
dev->v_total = dev->v_total_reg + 1;
if (dev->v_total == 1)
dev->v_total = 0x0669;
dev->vtotal_8514 = dev->vtotal_reg + 1;
dev->v_syncstart = dev->v_sync_start + 1;
if (dev->v_syncstart == 1)
dev->v_syncstart = 0x0601;
dev->vsyncstart++;
mach_log("ATI Mode: set=%02x, dispcntl=%02x, h_total=%d, hdisp=%d, vdisp=%d, v_total=%04x, v_syncstart=%04x, hsync_start=%d, hsync_width=%d, clocksel=%02x, advancedcntl=%02x.\n", mach->shadow_set & 0x03, dev->disp_cntl, dev->h_total, dev->hdisp, dev->vdisp, dev->v_total, dev->v_syncstart, dev->hsync_start, dev->hsync_width, mach->accel.clock_sel & 0xff, dev->accel.advfunc_cntl & 0x05);
if ((dev->disp_cntl >> 5) == 1) { /*Enable the 8514/A subsystem and set modes according to the shadow sets if needed.*/
switch (mach->shadow_set & 0x03) {
case 0x01:
if (!(dev->accel.advfunc_cntl & 0x04)) {
dev->h_total = 0x64;
dev->hdisp = 640;
dev->vdisp = 480;
dev->v_total = 0x0419;
dev->v_syncstart = 0x03d7;
}
break;
case 0x02:
if (dev->accel.advfunc_cntl & 0x04) {
dev->h_total = 0x9e;
dev->hdisp = 1024;
dev->vdisp = 768;
dev->v_total = 0x0669;
dev->v_syncstart = 0x0601;
}
break;
mach_log("VSYNCSTART=%d, VTOTAL=%d, interlace=%02x, vdisp=%d.\n", dev->vsyncstart, dev->vtotal_8514, dev->interlace, dev->vdisp_vga);
if (!ATI_MACH32) {
if ((mach->accel.clock_sel & 0x01) &&
!(dev->accel.advfunc_cntl & 0x01))
ret = 2;
else if ((dev->accel.advfunc_cntl & 0x01) &&
!(mach->accel.clock_sel & 0x01))
ret = 1;
else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) ||
(!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01)))
ret = 0;
} else {
if ((mach->accel.clock_sel & 0x01) && !(mach->old_on2 & 0x01) &&
!(dev->accel.advfunc_cntl & 0x01))
ret = 2;
else if ((dev->accel.advfunc_cntl & 0x01) && !(mach->old_on1 & 0x01) &&
!(mach->accel.clock_sel & 0x01))
ret = 1;
else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) ||
(!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01)))
ret = 0;
}
if (ret) {
if (ret == 2)
svga_recalctimings(svga);
else {
switch (mach->shadow_set & 0x03) {
case 0x00:
if (mach->crt_resolution)
svga_recalctimings(svga);
else {
if (dev->accel.advfunc_cntl & 0x04) {
if (dev->hdisp_vga == 640) {
dev->hdisp_vga = 1024;
dev->vdisp_vga = 768;
mach_log("1024x768.\n");
}
} else {
if (dev->hdisp_vga == 1024) {
dev->hdisp_vga = 640;
dev->vdisp_vga = 480;
mach_log("640x480.\n");
}
}
svga_recalctimings(svga);
}
break;
case 0x01:
mach->crt_resolution = 0x01;
break;
case 0x02:
mach->crt_resolution = 0x02;
break;
default:
break;
default:
break;
}
svga_recalctimings(svga);
} else if ((dev->disp_cntl >> 5) == 2) { /*Reset 8514/A to defaults if needed.*/
if (dev->accel.advfunc_cntl & 0x04) {
if (dev->hdisp == 640) {
dev->h_total = 0x9e;
dev->hdisp = 1024;
dev->vdisp = 768;
dev->v_total = 0x0669;
dev->v_syncstart = 0x0601;
svga_recalctimings(svga);
}
} else {
if (dev->hdisp == 1024) {
dev->h_total = 0x64;
dev->hdisp = 640;
dev->vdisp = 480;
dev->v_total = 0x0419;
dev->v_syncstart = 0x03d7;
svga_recalctimings(svga);
}
}
} else /*No change (type 0) or reset type 3.*/
svga_recalctimings(svga);
mach_log("Shadow set ATI=%x, shadow set 8514/A and on1=%x, on2=%x, resolution h=%d, v=%d, vtotal=%d, vsyncstart=%d, crtres=%d, ret=%d, actual passthrough=%x.\n", mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01, dev->hdisp_vga, dev->vdisp_vga, dev->vtotal_8514, dev->v_syncstart, mach->crt_resolution, ret, dev->on);
}
void
@@ -2775,7 +2793,7 @@ ati8514_recalctimings(svga_t *svga)
dev->accel.ge_offset -= mach->accel.crt_offset;
mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n",
dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01);
dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01);
mach->accel.src_pitch = dev->pitch;
mach->accel.dst_pitch = dev->pitch;
@@ -2786,11 +2804,11 @@ ati8514_recalctimings(svga_t *svga)
mach_log("8514/A ON, pitch=%d, GE offset=%08x.\n", ((mach->accel.ge_pitch & 0xff) << 3), dev->accel.ge_offset);
dev->hdisp_8514 = dev->hdisp_vga;
dev->dispend = dev->vdisp_vga;
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
if (dev->dispend == 600)
dev->hdisp_8514 = 800;
else if (dev->hdisp_8514 == 640)
dev->h_disp = 800;
else if (dev->h_disp == 640)
dev->dispend = 480;
if (dev->accel.advfunc_cntl & 0x04)
@@ -2802,10 +2820,10 @@ ati8514_recalctimings(svga_t *svga)
dev->dispend >>= 1;
mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n",
dev->accel.advfunc_cntl & 0x04, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset,
dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace);
if (dev->vram_is_512k) {
if (dev->hdisp_8514 == 640)
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
@@ -2886,7 +2904,7 @@ mach_recalctimings(svga_t *svga)
mach->accel.crt_offset <<= 2;
}
if (ATI_MACH32 && !dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (ATI_MACH32 && !dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->accel.ge_offset <<= 1;
mach->accel.crt_offset <<= 1;
}
@@ -2895,17 +2913,17 @@ mach_recalctimings(svga_t *svga)
mach_log("RowCount=%x, rowoffset=%x, pitch=%d, geoffset=%x, crtoffset=%x.\n", dev->rowcount, dev->rowoffset, dev->pitch, dev->accel.ge_offset, mach->accel.crt_offset);
mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x, interlace=%x.\n",
dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04,
dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04,
mach->accel.clock_sel & 0xfe, dev->interlace);
dev->hdisp_8514 = dev->hdisp_vga;
dev->dispend = dev->vdisp_vga;
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
if (dev->dispend == 959) { /*FIXME: vertical resolution mess on EEPROM tests on Mach8*/
dev->dispend >>= 1;
dev->dispend++;
} else if (dev->dispend == 600)
dev->hdisp_8514 = 800;
else if (dev->hdisp_8514 == 640)
dev->h_disp = 800;
else if (dev->h_disp == 640)
dev->dispend = 480;
dev->h_disp_time = dev->hdisp >> 3;
@@ -2931,7 +2949,7 @@ mach_recalctimings(svga_t *svga)
mach->accel.src_ge_offset <<= 2;
mach->accel.dst_ge_offset <<= 2;
}
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
mach->accel.src_ge_offset <<= 1;
mach->accel.dst_ge_offset <<= 1;
}
@@ -2950,7 +2968,7 @@ mach_recalctimings(svga_t *svga)
else
mach->accel.dst_ge_offset <<= 2;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.dst_ge_offset <<= 1;
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
@@ -2965,7 +2983,7 @@ mach_recalctimings(svga_t *svga)
else
mach->accel.src_ge_offset <<= 2;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.src_ge_offset <<= 1;
mach->accel.src_ge_offset -= mach->accel.crt_offset;
@@ -2976,19 +2994,19 @@ mach_recalctimings(svga_t *svga)
break;
}
mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n",
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset,
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace, svga->hdisp);
mach_log("EXTGECONFIG bits 11-15=%04x.\n", mach->accel.ext_ge_config & 0x8800);
if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) {
mach_log("hv=%d,%d, pitch=%d, rowoffset=%d, gextconfig=%03x, bpp=%d, shadow=%x, vgahdisp=%d.\n",
dev->hdisp_8514, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0,
dev->h_disp, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0,
dev->accel_bpp, mach->shadow_set & 0x03, svga->hdisp);
switch (dev->accel_bpp) {
case 8:
if ((mach->accel.ext_ge_config & 0x30) == 0x00) {
if (dev->vram_is_512k) {
if (dev->hdisp_8514 == 640)
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
@@ -3026,10 +3044,10 @@ mach_recalctimings(svga_t *svga)
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n",
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset,
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp);
if (dev->vram_is_512k) {
if (dev->hdisp_8514 == 640)
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
@@ -3171,15 +3189,15 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 2) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10) && val) {
dev->vtotal_reg = val;
dev->vtotal_reg &= 0x1fff;
dev->v_total_reg = val;
dev->v_total_reg &= 0x1fff;
}
}
} else {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10)) {
WRITE8(port, dev->vtotal_reg, val);
dev->vtotal_reg &= 0x1fff;
WRITE8(port, dev->v_total_reg, val);
dev->v_total_reg &= 0x1fff;
}
}
}
@@ -3191,8 +3209,8 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 1) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) {
if (!(mach->shadow_cntl & 0x10)) { /*For 8514/A mode, take the shadow sets into account.*/
WRITE8(port, dev->vtotal_reg, val >> 8);
dev->vtotal_reg &= 0x1fff;
WRITE8(port, dev->v_total_reg, val >> 8);
dev->v_total_reg &= 0x1fff;
}
}
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val);
@@ -3204,17 +3222,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 2) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x20) && val) {
dev->vdisp_8514 = val;
dev->vdisp_8514 &= 0x1fff;
dev->v_disp = val;
dev->v_disp &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->vdisp_8514);
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
} else {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x20)) {
WRITE8(port, dev->vdisp_8514, val);
dev->vdisp_8514 &= 0x1fff;
WRITE8(port, dev->v_disp, val);
dev->v_disp &= 0x1fff;
}
}
}
@@ -3224,11 +3242,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 1) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x20)) {
WRITE8(port, dev->vdisp_8514, val >> 8);
dev->vdisp_8514 &= 0x1fff;
WRITE8(port, dev->v_disp, val >> 8);
dev->v_disp &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->vdisp_8514);
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
}
svga_recalctimings(svga);
@@ -3238,17 +3256,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 2) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10) && val) {
dev->vsyncstart = val;
dev->vsyncstart &= 0x1fff;
dev->v_sync_start = val;
dev->v_sync_start &= 0x1fff;
}
}
mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart);
mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val);
} else {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10)) {
WRITE8(port, dev->vsyncstart, val);
dev->vsyncstart &= 0x1fff;
WRITE8(port, dev->v_sync_start, val);
dev->v_sync_start &= 0x1fff;
}
}
}
@@ -3258,11 +3276,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 1) {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10)) {
WRITE8(port, dev->vsyncstart, val >> 8);
dev->vsyncstart &= 0x1fff;
WRITE8(port, dev->v_sync_start, val >> 8);
dev->v_sync_start &= 0x1fff;
}
}
mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart);
mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val);
}
svga_recalctimings(svga);
@@ -3294,6 +3312,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if ((dev->subsys_cntl & 0xc000) == 0x8000) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
break;
@@ -3319,7 +3338,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
dev->mode = IBM_MODE;
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, valxor=%x, shadow crt=%x, hdisp=%d, vdisp=%d, extmode=%02x, accelbpp=%d, crt=%d, crtres=%d.\n",
CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution);
CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution);
if (ATI_MACH32) {
mach_set_resolution(mach, svga);
@@ -3502,7 +3521,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
}
}
}
mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy);
mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy2);
break;
case 0xaae8:
@@ -3565,7 +3584,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
}
mach->cursor_offset_lo = mach->cursor_offset_lo_reg;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
break;
@@ -3575,10 +3594,10 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
if (len == 2) {
WRITE8(port + 1, mach->cursor_offset_hi_reg, val >> 8);
}
dev->hwcursor.enable = !!(mach->cursor_offset_hi_reg & 0x8000);
dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000);
mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
break;
@@ -3764,7 +3783,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
dev->mode = ATI_MODE;
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, val=%04x, xor=%d, hdisp=%d, vdisp=%d, accelbpp=%d.\n",
CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp_vga, dev->vdisp_vga, dev->accel_bpp);
CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp, dev->vdisp, dev->accel_bpp);
mach_log("Vendor ATI mode set %s resolution.\n",
(dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480");
@@ -3976,6 +3995,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
mach->accel.bres_count = val & 0x7ff;
mach_log("BresenhamDraw=%04x.\n", mach->accel.dp_config);
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.cmd_type = 1;
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
@@ -4028,6 +4048,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
mach->accel.dest_y_end = 0;
}
dev->data_available = 0;
dev->data_available2 = 0;
mach_log("BitBLT=%04x, pattidx=%d.\n", mach->accel.dp_config, mach->accel.patt_idx);
mach_log(".\n");
mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/
@@ -4090,6 +4111,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
mach->accel.scan_to_x = 0;
}
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/
mach_log("ScanToX len=%d.\n", val);
mach_log(".\n");
@@ -4111,6 +4133,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
mach_log("Data Path Configuration (%04x) write val=%04x, len=%d.\n", port, val, len);
if (len == 2) {
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.dp_config = val;
}
break;
@@ -4348,26 +4371,26 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in
if (len == 1) {
dev->fifo_idx = 0;
if (dev->force_busy)
if (dev->force_busy2)
temp |= 0x02; /*Hardware busy*/
dev->force_busy = 0;
dev->force_busy2 = 0;
if (dev->data_available) {
if (dev->data_available2) {
temp |= 0x01; /*Read Data available*/
if (mach->accel.cmd_type >= 0) {
switch (mach->accel.cmd_type) {
case 2:
if (dev->accel.sy >= mach->accel.height)
dev->data_available = 0;
dev->data_available2 = 0;
break;
case 5:
if (dev->accel.sx >= mach->accel.width)
dev->data_available = 0;
dev->data_available2 = 0;
break;
default:
if (dev->accel.sy < 0)
dev->data_available = 0;
dev->data_available2 = 0;
break;
}
} else {
@@ -4377,11 +4400,11 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in
case 4:
case 6:
if (dev->accel.sy < 0)
dev->data_available = 0;
dev->data_available2 = 0;
break;
default:
if (!dev->accel.sy)
dev->data_available = 0;
dev->data_available2 = 0;
break;
}
}
@@ -4572,35 +4595,35 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in
case 0xc2ee:
if (len == 2)
temp = dev->vtotal_reg;
temp = dev->v_total_reg;
else
temp = dev->vtotal_reg & 0xff;
temp = dev->v_total_reg & 0xff;
break;
case 0xc2ef:
if (len == 1)
temp = dev->vtotal_reg >> 8;
temp = dev->v_total_reg >> 8;
break;
case 0xc6ee:
if (len == 2)
temp = dev->vdisp_8514;
temp = dev->v_disp;
else
temp = dev->vdisp_8514 & 0xff;
temp = dev->v_disp & 0xff;
break;
case 0xc6ef:
if (len == 1)
temp = dev->vdisp_8514 >> 8;
temp = dev->v_disp >> 8;
break;
case 0xcaee:
if (len == 2)
temp = dev->vsyncstart;
temp = dev->v_sync_start;
else
temp = dev->vsyncstart & 0xff;
temp = dev->v_sync_start & 0xff;
break;
case 0xcaef:
if (len == 1)
temp = dev->vsyncstart >> 8;
temp = dev->v_sync_start >> 8;
break;
case 0xceee:
@@ -4764,12 +4787,14 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
if (!dev->fifo_idx && !dev->on) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->data_available = 0;
dev->data_available2 = 0;
temp |= INT_FIFO_EMP;
mach_log("Fifo Empty.\n");
}
temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80));
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
if (mach->accel.ext_ge_config & 0x08)
temp |= ((mach->accel.ext_ge_config & 0x07) << 4);
else
@@ -5199,19 +5224,19 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
int writemask2 = svga->writemask;
int reset_wm = 0;
ibm8514_latch_t vall;
latch8514_t vall;
uint8_t wm = svga->writemask;
uint8_t i;
cycles -= svga->monitor->mon_video_timing_write_b;
if (linear) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
switch (addr & 0x06) {
case 0x00:
case 0x06:
@@ -5362,7 +5387,7 @@ mach32_write(uint32_t addr, uint8_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
switch (addr & 0x06) {
case 0x00:
@@ -5402,7 +5427,7 @@ mach32_writew(uint32_t addr, uint16_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
if (addr & 0x04) {
mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga);
@@ -5437,7 +5462,7 @@ mach32_writel(uint32_t addr, uint32_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
mach32_write_common(addr, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga);
@@ -5680,12 +5705,12 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach)
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_w;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (addr & 0x04) {
dev->vram[addr - 2] = val & 0x0f;
dev->vram[addr - 1] = (val >> 4) & 0x0f;
@@ -5709,12 +5734,12 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach)
cycles -= svga->monitor->mon_video_timing_write_l;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->vram[addr] = val & 0x0f;
dev->vram[addr + 1] = (val >> 4) & 0x0f;
dev->vram[addr + 4] = (val >> 8) & 0x0f;
@@ -5740,11 +5765,11 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga)
cycles -= svga->monitor->mon_video_timing_read_b;
if (linear) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
switch ((addr & 0x06) >> 1) {
case 0x00:
case 0x03:
@@ -5854,7 +5879,7 @@ mach32_read(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
switch ((addr & 0x06) >> 1) {
case 0x00:
@@ -5891,7 +5916,7 @@ mach32_readw(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
if (addr & 0x04) {
ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f;
@@ -5923,7 +5948,7 @@ mach32_readl(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
ret = mach32_read_common(addr, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4);
@@ -5951,7 +5976,7 @@ mach32_readw_linear(uint32_t addr, mach_t *mach)
uint16_t ret;
cycles -= svga->monitor->mon_video_timing_read_w;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
if (addr & 0x04) {
@@ -5979,7 +6004,7 @@ mach32_readl_linear(uint32_t addr, mach_t *mach)
uint32_t ret;
cycles -= svga->monitor->mon_video_timing_read_l;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
ret = dev->vram[addr] & 0x0f;
@@ -6276,7 +6301,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine)
int shift = 0;
offset = dev->hwcursor_latch.x - dev->hwcursor_latch.xoff;
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
shift = 1;
mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine);
@@ -7014,6 +7039,7 @@ mach_reset(void *priv)
mach_disable_handlers(mach);
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
if (mach->pci_bus)
reset_state->pci_slot = mach->pci_slot;
@@ -7044,7 +7070,7 @@ mach8_init(const device_t *info)
mach->has_bios = !(info->local & 0xff00);
mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : ATI_68875;
dev->vram_amount = device_get_config_int("memory");
dev->vram_is_512k = dev->vram_amount == 512;
dev->vram_512k_8514 = dev->vram_amount == 512;
if (ATI_MACH32) {
if (mach->pci_bus) {
@@ -7223,10 +7249,10 @@ ati8514_init(svga_t *svga, void *ext8514, void *dev8514)
dev->accel_bpp = 8;
dev->rowoffset = 0x80;
dev->hdisped = 0x7f;
dev->vdisp_8514 = 0x05ff;
dev->v_disp = 0x05ff;
dev->htotal = 0x9d;
dev->vtotal_reg = 0x0668;
dev->vsyncstart = 0x0600;
dev->v_total_reg = 0x0668;
dev->v_sync_start = 0x0600;
dev->disp_cntl = 0x33;
mach->accel.clock_sel = 0x1c;
dev->accel.cmd_back = 1;

View File

@@ -1906,7 +1906,7 @@ chips_69000_write_ext_reg(chips_69000_t* chips, uint8_t val)
break;
case 0xA0:
chips->ext_regs[chips->ext_index] = val;
chips->svga.hwcursor.enable = ((val & 7) == 0b101) || ((val & 7) == 0b1);
chips->svga.hwcursor.ena = ((val & 7) == 0b101) || ((val & 7) == 0b1);
chips->svga.hwcursor.cur_xsize = chips->svga.hwcursor.cur_ysize = ((val & 7) == 0b1) ? 32 : 64;
break;
case 0xA2:

View File

@@ -814,7 +814,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
else
svga->overscan_color = svga->pallook[svga->attrregs[0x11]];
svga_recalctimings(svga);
svga->hwcursor.enable = val & CIRRUS_CURSOR_SHOW;
svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW;
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize =
((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) &&
@@ -1245,7 +1245,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
break;
case 0x3e:
gd54xx->overlay.mode = (val >> 1) & 7;
svga->overlay.enable = (val & 1) != 0;
svga->overlay.ena = (val & 1) != 0;
gd54xx_update_overlay(gd54xx);
break;

View File

@@ -665,6 +665,7 @@ ega_recalctimings(ega_t *ega)
ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8;
ega->render = ega_render_graphics;
}
ega->hdisp_old = ega->hdisp;
}
if (ega->chipset) {
@@ -842,6 +843,7 @@ ega_poll(void *priv)
ega->linepos = 1;
if (ega->dispon) {
ega->hdisp_on = 1;
ega->memaddr &= ega->vrammask;
if (ega->firstline == 2000) {
@@ -897,6 +899,7 @@ ega_poll(void *priv)
if (ega->dispon)
ega->status &= ~1;
ega->hdisp_on = 0;
ega->linepos = 0;
if ((ega->scanline == (ega->crtc[11] & 31)) || (ega->scanline == ega->rowcount))
@@ -1538,8 +1541,10 @@ ega_init(ega_t *ega, int monitor_type, int is_mono)
old_overscan_color = 0;
ega->miscout |= 0x22;
ega->oddeven_page = 0;
ega->seqregs[4] |= 2;
ega->extvram = 1;
update_overscan = 0;

View File

@@ -277,7 +277,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv)
et4000->regs[et4000->index] = val;
svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8);
svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8);
svga->hwcursor.enable = !!(et4000->regs[0xF7] & 0x80);
svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80);
svga->hwcursor.xoff = et4000->regs[0xE2];
svga->hwcursor.yoff = et4000->regs[0xE6];
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || ((et4000->type == ET4000W32) && (et4000->regs[0xe2] >= 0x1f) && (et4000->regs[0xe6] >= 0x1f))) ? 128 : 64;

View File

@@ -299,7 +299,7 @@ ht216_out(uint16_t addr, uint8_t val, void *priv)
break;
case 0xa5:
svga->hwcursor.enable = !!(val & 0x80);
svga->hwcursor.ena = !!(val & 0x80);
break;
case 0xc0:

View File

@@ -474,6 +474,8 @@ typedef struct mystique_t {
atomic_uint status;
atomic_bool softrap_status_read;
uint64_t blitter_time, status_time;
pc_timer_t softrap_pending_timer, wake_timer;
fifo_entry_t fifo[FIFO_SIZE];
@@ -1380,7 +1382,7 @@ mystique_write_xreg(mystique_t *mystique, int reg, uint8_t val)
case XREG_XCURCTRL:
mystique->xcurctrl = val;
svga->hwcursor.enable = (val & 3) ? 1 : 0;
svga->hwcursor.ena = (val & 3) ? 1 : 0;
break;
case XREG_XCURCOL0R:
@@ -6046,6 +6048,8 @@ static void
mystique_start_blit(mystique_t *mystique)
{
svga_t *svga = &mystique->svga;
uint64_t start_time = plat_timer_read();
uint64_t end_time;
/*Make sure we don't get any artifacts.*/
svga->chain2_write = 0;
@@ -6115,6 +6119,9 @@ mystique_start_blit(mystique_t *mystique)
fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK);
break;
}
end_time = plat_timer_read();
mystique->blitter_time += end_time - start_time;
}
static void

View File

@@ -356,6 +356,7 @@ typedef struct da2_t {
uint64_t da2const;
int dispon;
int hdisp_on;
uint32_t memaddr, memaddr_backup, cursoraddr;
int vc;
@@ -3019,6 +3020,7 @@ da2_poll(void *priv)
da2->linepos = 1;
if (da2->dispon) {
da2->hdisp_on = 1;
da2->memaddr &= da2->vram_display_mask;
if (da2->firstline == 2000) {
@@ -3050,6 +3052,7 @@ da2_poll(void *priv)
if (da2->dispon)
da2->cgastat &= ~1;
da2->hdisp_on = 0;
da2->linepos = 0;
if (da2->scanline == (da2->crtc[LC_CURSOR_ROW_END] & 31))

View File

@@ -375,6 +375,8 @@ typedef struct s3_t {
event_t *fifo_not_full_event;
atomic_int blitter_busy;
uint64_t blitter_time;
uint64_t status_time;
uint8_t subsys_cntl, subsys_stat;
@@ -3037,7 +3039,7 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
case 0x45:
if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968))
break;
svga->hwcursor.enable = val & 1;
svga->hwcursor.ena = val & 1;
break;
case 0x46:
case 0x47:
@@ -4442,13 +4444,13 @@ s3_trio64v_recalctimings(svga_t *svga)
else
svga->overlay.addr = s3->streams.sec_fb0;
svga->overlay.enable = (svga->overlay.x >= 0);
svga->overlay.ena = (svga->overlay.x >= 0);
svga->overlay.h_acc = s3->streams.dda_horiz_accumulator;
svga->overlay.v_acc = s3->streams.dda_vert_accumulator;
svga->rowoffset = s3->streams.pri_stride >> 3;
if (svga->overlay.enable) {
svga->overlay.enable = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) ||
if (svga->overlay.ena) {
svga->overlay.ena = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) ||
(((s3->streams.blend_ctrl >> 24) & 7) == 0b101);
}
switch ((s3->streams.pri_ctrl >> 24) & 0x7) {
@@ -9696,6 +9698,8 @@ static void
fifo_thread(void *param)
{
s3_t *s3 = (s3_t *) param;
uint64_t start_time;
uint64_t end_time;
while (s3->fifo_thread_run) {
thread_set_event(s3->fifo_not_full_event);
@@ -9703,6 +9707,7 @@ fifo_thread(void *param)
thread_reset_event(s3->wake_fifo_thread);
s3->blitter_busy = 1;
while (!FIFO_EMPTY) {
start_time = plat_timer_read();
fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK];
switch (fifo->addr_type & FIFO_TYPE) {
@@ -9734,6 +9739,9 @@ fifo_thread(void *param)
if (FIFO_ENTRIES > 0xe000)
thread_set_event(s3->fifo_not_full_event);
end_time = plat_timer_read();
s3->blitter_time += (end_time - start_time);
}
s3->blitter_busy = 0;
s3->subsys_stat |= INT_FIFO_EMP;

View File

@@ -585,7 +585,7 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
break;
case 0x45:
svga->hwcursor.enable = val & 1;
svga->hwcursor.ena = val & 1;
break;
case 0x46:
case 0x47:
@@ -966,19 +966,19 @@ s3_virge_recalctimings(svga_t *svga)
else
svga->overlay.addr = virge->streams.sec_fb0;
svga->overlay.enable = (svga->overlay.x >= 0);
svga->overlay.ena = (svga->overlay.x >= 0);
svga->overlay.h_acc = virge->streams.dda_horiz_accumulator;
svga->overlay.v_acc = virge->streams.dda_vert_accumulator;
if (virge->chip < S3_VIRGEGX2)
svga->rowoffset = virge->streams.pri_stride >> 3;
if (virge->chip <= S3_VIRGEDX && svga->overlay.enable) {
svga->overlay.enable = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101);
} else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.enable) {
if (virge->chip <= S3_VIRGEDX && svga->overlay.ena) {
svga->overlay.ena = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101);
} else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.ena) {
/* 0x20 = Secondary Stream enabled */
/* 0x2000 = Primary Stream enabled */
svga->overlay.enable = !!(virge->streams.blend_ctrl & 0x20);
svga->overlay.ena = !!(virge->streams.blend_ctrl & 0x20);
}
if (virge->chip >= S3_VIRGEGX2) {

View File

@@ -984,6 +984,61 @@ svga_recalctimings(svga_t *svga)
}
}
#if TBD
if (ibm8514_active && (svga->dev8514 != NULL)) {
if (dev->on) {
uint32_t _8514_dot = dev->h_sync_start;
uint32_t _8514_adj_dot = dev->h_sync_start;
uint32_t _8514_eff_mask = (dev->h_blank_end_val & ~0x0000001f) ? dev->h_blank_end_mask : 0x0000001f;
dev->h_blank_sub = 0;
mach_log("8514/A: HDISP=%d, HDISPED=%d, Blank: %04i-%04i, Total: %04i, "
"Mask: %02X, ADJ_DOT=%04i.\n", dev->hdisp, (dev->hdisped + 1) << 3,
dev->h_sync_start, dev->h_blank_end_val,
dev->h_total, _8514_eff_mask, _8514_adj_dot);
while (_8514_adj_dot < (dev->h_total << 1)) {
if (_8514_dot == dev->h_total)
_8514_dot = 0;
if (_8514_adj_dot >= dev->h_total)
dev->h_blank_sub++;
mach_log("8514/A: Loop: adjdot=%d, htotal=%d, dotmask=%02x, "
"hblankendvalmask=%02x, blankendval=%02x.\n", adj_dot,
dev->h_total, _8514_dot & _8514_eff_mask, dev->h_blank_end_val & _8514_eff_mask,
dev->h_blank_end_val);
if ((_8514_dot & _8514_eff_mask) == (dev->h_blank_end_val & _8514_eff_mask))
break;
_8514_dot++;
_8514_adj_dot++;
}
uint32_t _8514_hd = dev->hdisp;
dev->hdisp -= dev->h_blank_sub;
svga->left_overscan = svga->x_add = (dev->h_total - _8514_adj_dot - 1) << 3;
svga->monitor->mon_overscan_x = svga->x_add + (dev->h_sync_start << 3) - _8514_hd + 8;
svga->monitor->mon_overscan_x++;
if ((dev->hdisp >= 2048) || (svga->left_overscan < 0)) {
svga->left_overscan = svga->x_add = 0;
svga->monitor->mon_overscan_x = 0;
}
/* - 1 because + 1 but also - 2 to compensate for the + 2 added to vtotal above. */
svga->y_add = svga->vtotal - svga->vblankend - 1;
svga->monitor->mon_overscan_y = svga->y_add + abs(svga->vblankstart - svga->dispend);
if ((dev->dispend >= 2048) || (svga->y_add < 0)) {
svga->y_add = 0;
svga->monitor->mon_overscan_y = 0;
}
}
}
#endif
if (svga->vblankstart < svga->dispend) {
svga_log("DISPEND > VBLANKSTART.\n");
svga->dispend = svga->vblankstart;
@@ -1038,16 +1093,16 @@ svga_recalctimings(svga_t *svga)
if (ibm8514_active && (svga->dev8514 != NULL)) {
if (dev->on) {
disptime8514 = dev->htotal_8514;
_dispontime8514 = dev->hdisp_8514;
svga_log("HTOTAL=%d, HDISP=%d.\n", dev->htotal_8514, dev->hdisp_8514);
disptime8514 = dev->h_total;
_dispontime8514 = dev->h_disp_time;
svga_log("HTOTAL=%d, HDISP=%d.\n", dev->h_total, dev->h_disp);
}
}
if (xga_active && (svga->xga != NULL)) {
if (xga->on) {
disptime_xga = xga->htotal_xga ? xga->htotal_xga : TIMER_USEC;
_dispontime_xga = xga->hdisp_xga;
disptime_xga = xga->h_total ? xga->h_total : TIMER_USEC;
_dispontime_xga = xga->h_disp;
}
}
@@ -1253,32 +1308,32 @@ svga_poll(void *priv)
svga_log("SVGA Poll.\n");
if (!svga->linepos) {
if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.enable) {
if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.ena) {
svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - svga->hwcursor_latch.yoff;
svga->hwcursor_oddeven = 0;
}
if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.enable && svga->interlace) {
if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.ena && svga->interlace) {
svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - (svga->hwcursor_latch.yoff + 1);
svga->hwcursor_oddeven = 1;
}
if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.enable) {
if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.ena) {
svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - svga->dac_hwcursor_latch.yoff;
svga->dac_hwcursor_oddeven = 0;
}
if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.enable && svga->interlace) {
if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.ena && svga->interlace) {
svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1);
svga->dac_hwcursor_oddeven = 1;
}
if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.enable) {
if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.ena) {
svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff;
svga->overlay_oddeven = 0;
}
if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.enable && svga->interlace) {
if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.ena && svga->interlace) {
svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff;
svga->overlay_oddeven = 1;
}
@@ -1288,6 +1343,7 @@ svga_poll(void *priv)
svga->linepos = 1;
if (svga->dispon) {
svga->hdisp_on = 1;
svga->memaddr &= svga->vram_display_mask;
if (svga->firstline == 2000) {
@@ -1334,6 +1390,7 @@ svga_poll(void *priv)
if (svga->dispon)
svga->cgastat &= ~1;
svga->hdisp_on = 0;
svga->linepos = 0;
if ((svga->scanline == (svga->crtc[11] & 31)) || (svga->scanline == svga->rowcount))

View File

@@ -530,7 +530,7 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
case 0x50:
if (tgui->type >= TGUI_9440) {
svga->hwcursor.enable = !!(val & 0x80);
svga->hwcursor.ena = !!(val & 0x80);
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32);
}
break;

View File

@@ -679,7 +679,7 @@ banshee_recalctimings(svga_t *svga)
svga->interlace = !!(banshee->vidProcCfg & VIDPROCCFG_INTERLACE);
svga->overlay.enable = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE;
svga->overlay.ena = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE;
svga->overlay.x = voodoo->overlay.start_x;
svga->overlay.y = voodoo->overlay.start_y;
@@ -689,8 +689,8 @@ banshee_recalctimings(svga_t *svga)
if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE)
svga->overlay.pitch *= 128 * 32;
if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0)
svga->overlay.enable = 0;
if (svga->overlay.enable) {
svga->overlay.ena = 0;
if (svga->overlay.ena) {
#if 0
banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n",
voodoo->overlay.start_x, voodoo->overlay.start_y,
@@ -894,7 +894,7 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *priv)
banshee_log("vidProcCfg=%08x\n", val);
#endif
banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT;
svga->hwcursor.enable = val & VIDPROCCFG_HWCURSOR_ENA;
svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA;
svga->fullchange = changeframecount;
svga->lut_map = !(val & VIDPROCCFG_DESKTOP_CLUT_BYPASS) && (svga->bpp < 24);
svga_recalctimings(svga);

View File

@@ -257,9 +257,9 @@ xga_render_blank(svga_t *svga)
xga->lastline_draw = xga->displine;
uint32_t *line_ptr = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add];
uint32_t line_width = (uint32_t)(xga->hdisp_xga) * sizeof(uint32_t);
uint32_t line_width = (uint32_t)(xga->h_disp) * sizeof(uint32_t);
if (xga->hdisp_xga > 0)
if (xga->h_disp > 0)
memset(line_ptr, 0, line_width);
}
@@ -268,14 +268,14 @@ xga_recalctimings(svga_t *svga)
{
xga_t *xga = (xga_t *) svga->xga;
if (xga->on) {
xga->htotal_xga = xga->htotal + 1;
xga->vtotal_xga = xga->vtotal + 1;
xga->h_total = xga->htotal + 1;
xga->v_total = xga->vtotal + 1;
xga->dispend = xga->vdispend + 1;
xga->vsyncstart++;
xga->v_syncstart = xga->vsyncstart + 1;
xga->split = xga->linecmp + 1;
xga->vblankstart_xga = xga->vblankstart + 1;
xga->v_blankstart = xga->vblankstart + 1;
xga->hdisp_xga = (xga->hdisp + 1) << 3;
xga->h_disp = (xga->hdisp + 1) << 3;
xga->rowoffset = xga->pix_map_width;
@@ -283,11 +283,11 @@ xga_recalctimings(svga_t *svga)
xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6;
if (xga->interlace) {
xga->vtotal_xga >>= 1;
xga->v_total >>= 1;
xga->dispend >>= 1;
xga->vsyncstart >>= 1;
xga->v_syncstart >>= 1;
xga->split >>= 1;
xga->vblankstart_xga >>= 1;
xga->v_blankstart >>= 1;
}
xga->memaddr_latch = xga->disp_start_addr;
@@ -296,14 +296,14 @@ xga_recalctimings(svga_t *svga)
xga_log("XGA ClkSel1 = %d, ClkSel2 = %02x, dispcntl2=%02x.\n", (xga->clk_sel_1 >> 2) & 3, xga->clk_sel_2 & 0x80, xga->disp_cntl_2 & 0xc0);
switch ((xga->clk_sel_1 >> 2) & 3) {
case 0:
xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga);
xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp);
if (xga->clk_sel_2 & 0x80)
svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 41539000.0;
else
svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
break;
case 1:
xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga);
xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp);
svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 28322000.0;
break;
case 3:
@@ -424,7 +424,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val)
case 0x36:
xga->hwc_control = val;
xga->hwcursor.enable = xga->hwc_control & 1;
xga->hwcursor.ena = xga->hwc_control & 1;
break;
case 0x38:
@@ -1555,7 +1555,7 @@ xga_bitblt(svga_t *svga)
if (srcheight == 7)
xga->accel.pattern = 1;
else {
if ((dstwidth == (xga->hdisp_xga - 1)) && (srcwidth == 1)) {
if ((dstwidth == (xga->h_disp - 1)) && (srcwidth == 1)) {
if ((xga->accel.dst_map == 1) && (xga->accel.src_map == 2)) {
if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px_map_format[xga->accel.src_map] >= 0x0a))
xga->accel.pattern = 1;
@@ -1640,8 +1640,8 @@ xga_bitblt(svga_t *svga)
else if ((xga->accel.src_map == 1) && (patwidth == 7))
xga->accel.pattern = 1;
} else {
if (dstwidth == (xga->hdisp_xga - 1)) {
if (srcwidth == (xga->hdisp_xga - 1)) {
if (dstwidth == (xga->h_disp - 1)) {
if (srcwidth == (xga->h_disp - 1)) {
if ((xga->accel.src_map == 1) && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) {
if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px <= 7) && (xga->accel.py <= 3))
xga->accel.pattern = 1;
@@ -2591,7 +2591,7 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga)
if ((xga->displine + svga->y_add) < 0)
return;
if (svga->scrblank || (xga->hdisp_xga == 0))
if (svga->scrblank || (xga->h_disp == 0))
return;
uint32_t *line_ptr = buffer32->line[xga->displine + svga->y_add];
@@ -2607,10 +2607,10 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga)
if ((xga->displine + svga->y_add) < 0)
return;
if (svga->scrblank || (xga->hdisp_xga == 0))
if (svga->scrblank || (xga->h_disp == 0))
return;
uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->hdisp_xga];
uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp];
right = (overscan_x >> 1);
for (int i = 0; i < right; i++)
*line_ptr++ = svga->overscan_color;
@@ -2634,7 +2634,7 @@ xga_render_4bpp(svga_t *svga)
xga->lastline_draw = xga->displine;
for (int x = 0; x <= xga->hdisp_xga; x += 8) {
for (int x = 0; x <= xga->h_disp; x += 8) {
dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]);
p[0] = xga->pallook[dat & 0x0f];
p[1] = xga->pallook[(dat >> 8) & 0x0f];
@@ -2671,7 +2671,7 @@ xga_render_8bpp(svga_t *svga)
xga->firstline_draw = xga->displine;
xga->lastline_draw = xga->displine;
for (int x = 0; x <= xga->hdisp_xga; x += 8) {
for (int x = 0; x <= xga->h_disp; x += 8) {
dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]);
p[0] = xga->pallook[dat & 0xff];
p[1] = xga->pallook[(dat >> 8) & 0xff];
@@ -2709,7 +2709,7 @@ xga_render_16bpp(svga_t *svga)
xga->firstline_draw = xga->displine;
xga->lastline_draw = xga->displine;
for (x = 0; x <= xga->hdisp_xga; x += 8) {
for (x = 0; x <= xga->h_disp; x += 8) {
dat = *(uint32_t *) (&xga->vram[(xga->memaddr + (x << 1)) & xga->vram_mask]);
p[x] = video_16to32[dat & 0xffff];
p[x + 1] = video_16to32[dat >> 16];
@@ -3092,12 +3092,12 @@ xga_poll(void *priv)
xga_log("XGA Poll=%d.\n", xga->on);
if (xga->on) {
if (!xga->linepos) {
if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.enable) {
if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) {
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 32 : 0);
xga->hwcursor_oddeven = 0;
}
if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.enable && xga->interlace) {
if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) {
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 33 : 1);
xga->hwcursor_oddeven = 1;
}
@@ -3107,7 +3107,7 @@ xga_poll(void *priv)
xga->linepos = 1;
if (xga->dispon) {
xga->hdispon_xga = 1;
xga->h_disp_on = 1;
xga->memaddr &= xga->vram_mask;
@@ -3149,7 +3149,7 @@ xga_poll(void *priv)
if (xga->dispon)
svga->cgastat &= ~1;
xga->hdispon_xga = 0;
xga->h_disp_on = 0;
xga->linepos = 0;
if (xga->dispon) {
@@ -3194,10 +3194,10 @@ xga_poll(void *priv)
if (svga->fullchange)
svga->fullchange--;
}
if (xga->vc == xga->vsyncstart) {
if (xga->vc == xga->v_syncstart) {
xga->dispon = 0;
svga->cgastat |= 8;
x = xga->hdisp_xga;
x = xga->h_disp;
if (xga->interlace && !xga->oddeven)
xga->lastline++;
@@ -3227,7 +3227,7 @@ xga_poll(void *priv)
xga->memaddr = (xga->memaddr << 2);
xga->memaddr_backup = (xga->memaddr_backup << 2);
}
if (xga->vc == xga->vtotal_xga) {
if (xga->vc == xga->v_total) {
xga->vc = 0;
xga->scanline = 0;
xga->dispon = 1;