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https://github.com/86Box/86Box.git
synced 2026-02-22 17:45:31 -07:00
Fix rop core. Implement some basic image in memory methods.
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@@ -81,6 +81,7 @@ typedef enum nv3_pgraph_class_e
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#define NV3_IMAGE_IN_MEMORY_IN_MEMORY_DMA_CTX_TYPE 0x0304
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#define NV3_IMAGE_IN_MEMORY_PITCH 0x0308
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#define NV3_IMAGE_IN_MEMORY_TOP_LEFT_OFFSET 0x030C
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#define NV3_IMAGE_IN_MEMORY_TOP_LEFT_OFFSET_END 22
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#define NV3_W95TXT_COLORA 0x03FC // It's the colour of the text. This is used to submit a dummy object so the notifier can be used to sync in Win2000 DDraw6 drivers.
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@@ -118,14 +119,14 @@ typedef struct nv3_color_argb_32_s
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} nv3_color_argb_32_t;
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/* 30-bit colour format for internal PGRAPH use */
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typedef struct nv3_color_x3a10g10b10_s
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typedef struct nv3_color_x2a10g10b10_s
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{
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uint8_t reserved : 1;
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bool alpha_if_chroma_key_otherwise_reserved2 : 1; // 1-bit ALPHA if chroma key, OTHERWISE USELESS and IGNORE
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uint16_t r : 10;
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uint16_t g : 10;
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uint16_t b : 10;
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} nv3_color_x3a10g10b10_t;
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} nv3_color_x2a10g10b10_t;
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/* 16-bit A4R4G4B4 colour format */
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typedef struct nv3_color_16_a4r4g4b4_s
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@@ -1114,17 +1114,18 @@ typedef struct nv3_pgraph_s
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nv3_position_16_bigy_t dst_canvas_min;
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nv3_position_16_bigy_t dst_canvas_max;
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// Pattern stuff
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nv3_color_x3a10g10b10_t pattern_color_0_0;
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nv3_color_x2a10g10b10_t pattern_color_0_0;
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uint32_t pattern_color_0_1; // only 7:0 relevant
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nv3_color_x3a10g10b10_t pattern_color_1_0;
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nv3_color_x2a10g10b10_t pattern_color_1_0;
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uint32_t pattern_color_1_1; // only 7:0 relevant
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uint32_t pattern_bitmap_high; // high part of pattern bitmap for blit
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uint32_t pattern_bitmap_low;
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uint32_t pattern_shape; // may need to be an enum - 0=8x8, 1=64x1, 2=1x64
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uint32_t plane_mask; // only 7:0 relevant
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nv3_color_x3a10g10b10_t chroma_key; // color key
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nv3_color_x2a10g10b10_t chroma_key; // color key
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uint32_t beta_factor;
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nv3_pgraph_dma_settings_t dma_settings;
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uint8_t rop; // Current GDI Ternary Render Operation
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nv3_pgraph_clip_misc_settings_t clip_misc_settings;
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nv3_notifier_t notifier;
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nv3_position_16_bigy_t clip0_min;
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@@ -10,8 +10,10 @@
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This is currently used in the following graphics cards: Tseng Labs ET4000/32p, Cirrus Logic CL-GD54xx, 3dfx Voodoo Banshee/Voodoo 3, Trident TGUI9440,
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S3 ViRGE, C&T 69000, ATI Mach64, and NVidia RIVA 128
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*/
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int32_t video_rop_gdi_ternary(int32_t rop, int32_t dst, int32_t pattern, int32_t src, int32_t out)
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{
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int32_t video_rop_gdi_ternary(int32_t rop, int32_t dst, int32_t pattern, int32_t src)
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{
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uint32_t out = 0x00;
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switch (rop)
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{
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case 0x00:
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@@ -782,5 +784,7 @@ int32_t video_rop_gdi_ternary(int32_t rop, int32_t dst, int32_t pattern, int32_t
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case 0xff:
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out = ~0;
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break;
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}
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}
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return out;
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}
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@@ -28,10 +28,22 @@
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#include <86box/nv/vid_nv.h>
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#include <86box/nv/vid_nv3.h>
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void nv3_class_01c_method(uint32_t name, uint32_t method_id, nv3_ramin_context_t context, nv3_grobj_t grobj)
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void nv3_class_01c_method(uint32_t param, uint32_t method_id, nv3_ramin_context_t context, nv3_grobj_t grobj)
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{
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switch (method_id)
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{
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case NV3_IMAGE_IN_MEMORY_COLOR_FORMAT:
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break;
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/* Pitch - length between scanlines */
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case NV3_IMAGE_IN_MEMORY_PITCH:
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nv3->pgraph.image_in_memory.pitch = param & 0x1FF0;
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nv_log("Image in Memory PITCH=0x%04x", nv3->pgraph.image_in_memory.pitch);
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break;
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/* Byte offset in GPU VRAM of top left pixel (22:0) */
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case NV3_IMAGE_IN_MEMORY_TOP_LEFT_OFFSET:
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nv3->pgraph.image_in_memory.linear_address = param & ((1 << NV3_IMAGE_IN_MEMORY_TOP_LEFT_OFFSET_END) - 0x10);
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nv_log("Image in Memory TOP_LEFT_OFFSET=0x%08x", nv3->pgraph.image_in_memory.linear_address);
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break;
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default:
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nv_log("%s: Invalid or Unimplemented method 0x%04x", nv3_class_names[context.class_id & 0x1F], method_id);
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nv3_pgraph_interrupt_invalid(NV3_PGRAPH_INTR_1_INVALID_METHOD);
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@@ -28,27 +28,10 @@
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#include <86box/nv/vid_nv.h>
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#include <86box/nv/vid_nv3.h>
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#include <86box/nv/classes/vid_nv3_classes.h>
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#include <86box/utils/video_stdlib.h>
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/* Render Core: Performs a ROP */
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void nv3_perform_rop(uint32_t src, uint32_t dst, uint32_t pattern, uint32_t pen, nv3_render_operation_type rop)
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{
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switch (rop)
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{
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case nv3_rop_blackness:
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return 0;
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case nv3_rop_srcand:
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case nv3_rop_srccopy:
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return src;
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case nv3_rop_dstcopy:
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return dst; // do nothing
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case nv3_rop_dstinvert:
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return !dst;
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case nv3_rop_xor:
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return src ^ dst;
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case nv3_rop_whiteness:
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return 1;
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}
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return video_rop_gdi_ternary(rop, dst, pattern, src);
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}
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@@ -70,7 +70,7 @@ nv_register_t pgraph_registers[] = {
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{ NV3_PGRAPH_PATTERN_BITMAP_HIGH, "PGRAPH Pattern Bitmap (High 32bits)", NULL, NULL},
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{ NV3_PGRAPH_PATTERN_BITMAP_LOW, "PGRAPH Pattern Bitmap (Low 32bits)", NULL, NULL},
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{ NV3_PGRAPH_PATTERN_SHAPE, "PGRAPH Pattern Shape (1:0 - 0=8x8, 1=64x1, 2=1x64)", NULL, NULL},
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{ NV3_PGRAPH_ROP3, "PGRAPH Render Operation ROP3 (2^3 bits = 256 possible operations)", NULL, NULL},
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{ NV3_PGRAPH_ROP3, "PGRAPH GDI Ternary Render Operation ROP3 (2^3 bits = 256 possible operations)", NULL, NULL},
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{ NV3_PGRAPH_PLANE_MASK, "PGRAPH Current Plane Mask (7:0)", NULL, NULL},
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{ NV3_PGRAPH_CHROMA_KEY, "PGRAPH Chroma Key (17:0) (Bit 30 = Alpha, 29:20 = Red, 19:10 = Green, 9:0 = Blue)", NULL, NULL},
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{ NV3_PGRAPH_BETA, "PGRAPH Beta factor", NULL, NULL },
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@@ -207,6 +207,16 @@ uint32_t nv3_pgraph_read(uint32_t address)
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case NV3_PGRAPH_BETA:
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ret = nv3->pgraph.beta_factor;
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break;
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// Todo: Massive table of ROP IDs or at least known ones?
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case NV3_PGRAPH_ROP3:
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ret = nv3->pgraph.rop;
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break;
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case NV3_PGRAPH_CHROMA_KEY:
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ret = *(uint32_t*)&nv3->pgraph.chroma_key;
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break;
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case NV3_PGRAPH_PLANE_MASK:
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ret = nv3->pgraph.plane_mask;
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break;
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// DMA
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case NV3_PGRAPH_DMA:
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ret = *(uint32_t*)&nv3->pgraph.dma_settings;
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@@ -400,6 +410,16 @@ void nv3_pgraph_write(uint32_t address, uint32_t value)
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case NV3_PGRAPH_BETA:
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nv3->pgraph.beta_factor = value;
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break;
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// Todo: Massive table of ROP IDs or at least known ones?
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case NV3_PGRAPH_ROP3:
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nv3->pgraph.rop = value & 0xFF;
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break;
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case NV3_PGRAPH_CHROMA_KEY:
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nv3->pgraph.chroma_key = *(nv3_color_x2a10g10b10_t*)value;
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break;
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case NV3_PGRAPH_PLANE_MASK:
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nv3->pgraph.plane_mask = value;
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break;
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// DMA
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case NV3_PGRAPH_DMA:
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*(uint32_t*)&nv3->pgraph.dma_settings = value;
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