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The forgotten P82C604 .c file.
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OBattler
292
src/sio/sio_p82c604.c
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292
src/sio/sio_p82c604.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Chips & Technologies P82C604 Super I/O
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* chip used by the Philips P3345, based on reverse engineering.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2026 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/gameport.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/nvr.h>
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#include <86box/sio.h>
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#include <86box/machine.h>
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#ifdef ENABLE_P82C604_LOG
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#include "cpu.h"
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#endif
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typedef struct p82c604_t {
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uint8_t index;
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uint8_t regs[256];
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serial_t *uart[2];
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lpt_t *lpt;
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} p82c604_t;
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#ifdef ENABLE_P82C604_LOG
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int p82c604_do_log = ENABLE_P82C604_LOG;
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static void
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p82c604_log(const char *fmt, ...)
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{
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va_list ap;
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if (p82c604_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define p82c604_log(fmt, ...)
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#endif
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static void
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p82c604_update_ports(p82c604_t *dev, int set)
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{
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uint8_t uart1_int = 0xff;
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uint8_t uart2_int = 0xff;
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uint8_t lpt_int = 0xff;
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uint16_t uart1_addr = 0x0000;
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uint16_t uart2_addr = 0x0000;
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uint16_t lpt_addr = 0x0000;
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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lpt_port_remove(dev->lpt);
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if (!set)
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return;
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/*
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[xxxx000x] Parallel disabled;
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[xxxx001x] Parallel on 378h;
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[xxxx110x] Parallel on 278h.
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*/
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switch (dev->regs[0x18] & 0x0e) {
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default:
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case 0x00:
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lpt_addr = 0x0000;
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lpt_int = 0xff;
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break;
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case 0x02:
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lpt_addr = 0x0378;
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lpt_int = 7;
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break;
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case 0x0c:
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lpt_addr = 0x0278;
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lpt_int = 5;
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break;
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}
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/*
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[0000xxxx] Serial 1 disabled, Serial 2 disabled;
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[0010xxxx] Serial 1 on 3F8h, Serial 2 disabled;
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[0011xxxx] Serial 1 disabled, Serial 2 on 3F8h;
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[1000xxxx] Serial 1 on 2F8h, Serial 2 disabled;
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[1011xxxx] Serial 1 on 2F8h, Serial 2 on 3F8h.
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[1100xxxx] Serial 1 disabled, Serial 2 on 2F8h;
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[1110xxxx] Serial 1 on 3F8h, Serial 2 on 2F8h.
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*/
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switch (dev->regs[0x18] & 0xf0) {
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default:
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case 0x00:
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uart1_addr = uart2_addr = 0x0000;
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uart1_int = uart2_int = 0xff;
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break;
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case 0x20:
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uart1_addr = 0x03f8;
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uart2_addr = 0x0000;
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uart1_int = 4;
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uart2_int = 0xff;
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break;
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case 0x30:
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uart1_addr = 0x0000;
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uart2_addr = 0x03f8;
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uart1_int = 0xff;
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uart2_int = 4;
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break;
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case 0x80:
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uart1_addr = 0x02f8;
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uart2_addr = 0x0000;
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uart1_int = 3;
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uart2_int = 0xff;
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break;
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case 0xb0:
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uart1_addr = 0x02f8;
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uart2_addr = 0x03f8;
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uart1_int = 3;
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uart2_int = 4;
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break;
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case 0xc0:
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uart1_addr = 0x0000;
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uart2_addr = 0x02f8;
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uart1_int = 0xff;
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uart2_int = 3;
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break;
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case 0xe0:
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uart1_addr = 0x03f8;
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uart2_addr = 0x02f8;
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uart1_int = 4;
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uart2_int = 3;
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break;
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}
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/*
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[xxx0xxx] Parallel disabled.
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[xxx1xxx] Parallel enabled.
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*/
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if (!(dev->regs[0x10] & 0x08)) {
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lpt_addr = 0x0000;
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lpt_int = 0xff;
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}
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/*
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[xxxx0xx] Serial 2 disabled;
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[xxxx1xx] Serial 2 enabled.
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*/
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if (!(dev->regs[0x10] & 0x04)) {
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uart2_addr = 0x0000;
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uart2_int = 0xff;
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}
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/*
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[xxxxx0x] Serial 2 disabled;
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[xxxxx1x] Serial 2 enabled.
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*/
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if (!(dev->regs[0x10] & 0x02)) {
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uart1_addr = 0x0000;
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uart1_int = 0xff;
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}
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if (uart1_addr != 0x0000) {
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serial_setup(dev->uart[0], uart1_addr, uart1_int);
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p82c604_log("UART 1 at %04X, IRQ %i\n", uart1_addr, uart1_int);
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}
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if (uart2_addr != 0x0000) {
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serial_setup(dev->uart[1], uart2_addr, uart2_int);
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p82c604_log("UART 2 at %04X, IRQ %i\n", uart2_addr, uart2_int);
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}
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if (lpt_addr != 0x0000) {
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lpt_port_setup(dev->lpt, lpt_addr);
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lpt_port_irq(dev->lpt, lpt_int);
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p82c604_log("LPT1 at %04X, IRQ %i\n", lpt_addr, lpt_int);
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}
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}
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static uint8_t
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p82c604_config_read(uint16_t port, void *priv)
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{
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const p82c604_t *dev = (p82c604_t *) priv;
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uint8_t ret = 0xff;
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switch (port) {
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case 0x02dc:
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ret = dev->index;
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break;
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case 0x02dd:
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ret = dev->regs[dev->index];
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p82c604_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, dev->index, ret);
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break;
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}
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return ret;
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}
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static void
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p82c604_config_write(uint16_t port, uint8_t val, void *priv)
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{
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p82c604_t *dev = (p82c604_t *) priv;
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switch (port) {
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case 0x02dc:
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dev->index = val;
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break;
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case 0x02dd:
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if ((dev->index == 0x10) || (dev->index == 0x18))
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p82c604_update_ports(dev, 0);
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dev->regs[dev->index] = val;
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p82c604_log("[%04X:%08X] [W] %02X = %02X\n", CS, cpu_state.pc, dev->index, val);
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if ((dev->index == 0x10) || (dev->index == 0x18))
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p82c604_update_ports(dev, 1);
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break;
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}
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}
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static void
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p82c604_reset(void *priv)
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{
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p82c604_t *dev = (p82c604_t *) priv;
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p82c604_update_ports(dev, 0);
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/* Set power-on defaults. */
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dev->regs[0x10] = 0x80;
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dev->regs[0x18] = 0xed;
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p82c604_update_ports(dev, 1);
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}
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static void
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p82c604_close(void *priv)
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{
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p82c604_t *dev = (p82c604_t *) priv;
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free(dev);
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}
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static void *
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p82c604_init(const device_t *info)
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{
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p82c604_t *dev = (p82c604_t *) calloc(1, sizeof(p82c604_t));
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dev->uart[0] = device_add_inst(&ns16450_device, 1);
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dev->uart[1] = device_add_inst(&ns16450_device, 2);
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dev->lpt = device_add_inst(&lpt_port_device, 1);
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io_sethandler(0x02dc, 0x0002, p82c604_config_read, NULL, NULL, p82c604_config_write, NULL, NULL, dev);
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p82c604_reset(dev);
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return dev;
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}
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const device_t p82c604_device = {
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.name = "82C604 Multifunction Controller",
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.internal_name = "p82c604",
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.flags = 0,
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.local = 0,
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.init = p82c604_init,
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.close = p82c604_close,
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.reset = p82c604_reset,
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.available = NULL,
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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