mirror/86Box
1
0
Fork 0
mirror of https://github.com/86Box/86Box.git synced 2026-02-22 17:45:31 -07:00
Code Issues Packages Projects Releases Activity

Fix framebuffer size with vertical resolution > 1024 by applying large screen bit even in NV mode

Browse Source
This commit is contained in:
starfrost013
2025-04-12 17:28:04 +01:00
parent 371a2d269b
commit 801aa4a97d
3 changed files with 12 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
doc/nvidia_notes/status.xlsx
View File

Binary file not shown.

15
src/video/nv/nv3/nv3_core.c
View File

@@ -499,18 +499,25 @@ void nv3_recalc_timings(svga_t* svga)
// required for VESA resolutions, force parameters higher
// only fuck around with any of this in VGAmode?
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDT10)) svga->vtotal += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VRS10)) svga->vblankstart += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VBS10)) svga->vsyncstart += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_HBE6)) svga->hdisp += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDE10)) svga->dispend += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_HEB] & 0x01)
svga->hdisp += 0x100; // large screen bit
/*
if (pixel_mode == NV3_CRTC_REGISTER_PIXELMODE_VGA)
{
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDT10)) svga->vtotal += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VDE10)) svga->dispend += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VRS10)) svga->vblankstart += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_VBS10)) svga->vsyncstart += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 1 << (NV3_CRTC_REGISTER_FORMAT_HBE6)) svga->hdisp += 0x400;
if (svga->crtc[NV3_CRTC_REGISTER_HEB] & 0x01)
svga->hdisp += 0x100; // large screen bit
}
*/
/* Turn off override if we are in VGA mode */
svga->override = !(pixel_mode == NV3_CRTC_REGISTER_PIXELMODE_VGA);

2
src/video/nv/nv3/render/nv3_render_core.c
View File

@@ -147,7 +147,7 @@ uint32_t nv3_render_downconvert_color(nv3_grobj_t grobj, nv3_color_expanded_t co
warning("nv3_render_downconvert: Y8 not implemented");
break;
case nv3_pgraph_pixel_format_y16:
warning("nv3_render_downconvert: Y16 not implemented");
//warning("nv3_render_downconvert: Y16 not implemented");
break;
default:
warning("nv3_render_downconvert_color unknown format %d", format);