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Merge branch 'master' of https://github.com/86Box/86Box

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This commit is contained in:
OBattler
2024-12-18 01:20:08 +01:00
parent 80a0c48785 4dd638907e
commit 60e3ed6704
4 changed files with 33 additions and 15 deletions
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2
src/include/86box/machine.h
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@@ -722,7 +722,7 @@ extern int machine_at_pb680_init(const machine_t *);
extern int machine_at_pb810_init(const machine_t *);
extern int machine_at_mb520n_init(const machine_t *);
extern int machine_at_i430vx_init(const machine_t *);
extern int machine_at_hitman_init(const machine_t *);
extern int machine_at_gw2kte_init(const machine_t *);
extern int machine_at_ma23c_init(const machine_t *);
extern int machine_at_nupro592_init(const machine_t *);

12
src/machine/m_at_socket7.c
View File

@@ -825,15 +825,15 @@ machine_at_i430vx_init(const machine_t *model)
}
int
machine_at_hitman_init(const machine_t *model)
machine_at_gw2kte_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined2("roms/machines/hitman/1008CY1T.BIO",
"roms/machines/hitman/1008CY1T.BI1",
"roms/machines/hitman/1008CY1T.BI2",
"roms/machines/hitman/1008CY1T.BI3",
"roms/machines/hitman/1008CY1T.RCV",
ret = bios_load_linear_combined2("roms/machines/gw2kte/1008CY1T.BIO",
"roms/machines/gw2kte/1008CY1T.BI1",
"roms/machines/gw2kte/1008CY1T.BI2",
"roms/machines/gw2kte/1008CY1T.BI3",
"roms/machines/gw2kte/1008CY1T.RCV",
0x3a000, 128);
if (bios_only || !ret)

8
src/machine/machine_table.c
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@@ -11953,16 +11953,14 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* 430VX */
/* Has a SM(S)C FDC37C932FR Super I/O chip with on-chip KBC with AMI
MegaKey (revision '5') KBC firmware. */
{
.name = "[i430VX] Gateway 2000 Hitman",
.internal_name = "hitman",
.internal_name = "gw2kte",
.type = MACHINE_TYPE_SOCKET7,
.chipset = MACHINE_CHIPSET_INTEL_430VX,
.init = machine_at_hitman_init,
.init = machine_at_gw2kte_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
@@ -11996,8 +11994,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has a SM(S)C FDC37C935 Super I/O chip with on-chip KBC with Phoenix
MultiKey/42 (version 1.38) KBC firmware. */
{

26
src/network/net_pcnet.c
View File

@@ -2481,36 +2481,58 @@ pcnet_readl(uint16_t addr, void *priv)
static void
pcnet_mmio_writeb(uint32_t addr, uint8_t val, void *priv)
{
if (!(addr & 0x10)) {
pcnet_aprom_writeb((nic_t *) priv, addr, val);
return;
}
pcnet_write((nic_t *) priv, addr, val, 1);
}
static void
pcnet_mmio_writew(uint32_t addr, uint16_t val, void *priv)
{
if (!(addr & 0x10)) {
pcnet_aprom_writeb((nic_t *) priv, addr, val);
pcnet_aprom_writeb((nic_t *) priv, addr + 1, val >> 8);
return;
}
pcnet_write((nic_t *) priv, addr, val, 2);
}
static void
pcnet_mmio_writel(uint32_t addr, uint32_t val, void *priv)
{
if (!(addr & 0x10)) {
pcnet_aprom_writeb((nic_t *) priv, addr, val);
pcnet_aprom_writeb((nic_t *) priv, addr + 1, val >> 8);
pcnet_aprom_writeb((nic_t *) priv, addr + 2, val >> 16);
pcnet_aprom_writeb((nic_t *) priv, addr + 3, val >> 24);
return;
}
pcnet_write((nic_t *) priv, addr, val, 4);
}
static uint8_t
pcnet_mmio_readb(uint32_t addr, void *priv)
{
if (!(addr & 0x10))
return pcnet_aprom_readb((nic_t *) priv, addr);
return (pcnet_read((nic_t *) priv, addr, 1));
}
static uint16_t
pcnet_mmio_readw(uint32_t addr, void *priv)
{
if (!(addr & 0x10))
return pcnet_aprom_readb((nic_t *) priv, addr) | (pcnet_aprom_readb((nic_t *) priv, addr + 1) << 8);
return (pcnet_read((nic_t *) priv, addr, 2));
}
static uint32_t
pcnet_mmio_readl(uint32_t addr, void *priv)
{
if (!(addr & 0x10))
return pcnet_aprom_readb((nic_t *) priv, addr) | (pcnet_aprom_readb((nic_t *) priv, addr + 1) << 8) | (pcnet_aprom_readb((nic_t *) priv, addr + 2) << 16) | (pcnet_aprom_readb((nic_t *) priv, addr + 3) << 24);
return (pcnet_read((nic_t *) priv, addr, 4));
}
@@ -2607,7 +2629,7 @@ pcnet_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
/* Then let's set the PCI regs. */
pcnet_pci_bar[0].addr_regs[addr & 3] = val;
/* Then let's calculate the new I/O base. */
pcnet_pci_bar[0].addr &= 0xff00;
pcnet_pci_bar[0].addr &= 0xffe0;
dev->PCIBase = pcnet_pci_bar[0].addr;
/* Log the new base. */
pcnet_log(4, "%s: New I/O base is %04X\n", dev->name, dev->PCIBase);
@@ -2685,7 +2707,7 @@ pcnet_pci_read(UNUSED(int func), int addr, void *priv)
case 0x0E:
return 0; /*Header type */
case 0x10:
return 1; /*I/O space*/
return pcnet_pci_bar[0].addr_regs[0] | 1; /*I/O space*/
case 0x11:
return pcnet_pci_bar[0].addr_regs[1];
case 0x12: