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Changes to logging - nothing (other than some parts of pc.c) uses the global pclog anymore (and logs will be almost empty (until the base set logging flags is agreed upon);

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Fixes to various hard disk controllers;
Added the Packard Bell PB640;
Fixed the InPort mouse emulation - now it works correctly on Windows NT 3.1;
Removed the status window and the associated variables;
Completely removed the Green B 486 machine;
Fixed the MDSI Genius;
Fixed the single-sided 5.25" floppy drive;
Ported a CPU-related commit from VARCem.
This commit is contained in:
OBattler
2018-05-21 19:04:05 +02:00
parent 534ed6ea32
commit 5d8deea63b
130 changed files with 5062 additions and 3262 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
README.md
View File

@@ -8,6 +8,8 @@ PCI bus.
86Box is released under the GNU General Public License, version 2. For more
information, see the `LICENSE` file.
The project maintainer is OBattler.
Community
---------
We operate an IRC channel and a Discord server for discussing anything related

89
src/Makefile.local
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@@ -10,7 +10,7 @@
# settings, so we can avoid changing the main one for all of
# our local setups.
#
# Version: @(#)Makefile.local 1.0.12 2018/04/26
# Version: @(#)Makefile.local 1.0.13 2018/04/29
#
# Author: Fred N. van Kempen, <decwiz@yahoo.com>
#
@@ -34,33 +34,102 @@ STUFF :=
# -DANSI_CFG forces the config file to ANSI encoding.
# -DENABLE_VRAM_DUMP enables Video Ram dumping.
# -DENABLE_LOG_BREAKPOINT enables extra logging.
# Root logging:
# -DENABLE_BUGGER_LOG=N sets logging level at N.
# -DENABLE_CONFIG_LOG=N sets logging level at N.
# -DENABLE_DEVICE_LOG=N sets logging level at N.
# -DENABLE_KEYBOARD_AMSTRAD_LOG=N sets logging level at N.
# -DENABLE_KEYBOARD_AT_LOG=N sets logging level at N.
# -DENABLE_KEYBOARD_LOG=N sets logging level at N.
# -DENABLE_IO_LOG=N sets logging level at N.
# -DENABLE_MEM_LOG=N sets logging level at N.
# -DENABLE_MOUSE_LOG=N sets logging level at N.
# -DENABLE_MOUSE_BUS_LOG=N sets logging level at N.
# -DENABLE_MOUSE_PS2_LOG=N sets logging level at N.
# -DENABLE_MOUSE_SERIAL_LOG=N sets logging level at N.
# -DENABLE_NVR_LOG=N sets logging level at N.
# -DENABLE_PC_LOG=N sets logging level at N.
# -DENABLE_PCI_LOG=N sets logging level at N.
# -DENABLE_PIC_LOG=N sets logging level at N.
# -DENABLE_PIIX_LOG=N sets logging level at N.
# -DENABLE_ROM_LOG=N sets logging level at N.
# -DENABLE_SERIAL_LOG=N sets logging level at N.
# -DENABLE_VNC_LOG=N sets logging level at N.
# cdrom/ logging:
# -DENABLE_CDROM_LOG=N sets logging level at N.
# -DENABLE_CDROM_IMAGE_LOG=N sets logging level at N.
# -DENABLE_CDROM_IOCTL_LOG=N sets logging level at N.
# -DENABLE_HDD_LOG=N sets logging level at N.
# -DENABLE_XTA_LOG=N sets logging level at N.
# cpu/ logging:
# -DENABLE_386_LOG=N sets logging level at N.
# -DENABLE_386_DYNAREC_LOG=N sets logging level at N.
# -DENABLE_808X_LOG=N sets logging level at N.
# -DENABLE_X86SEG_LOG=N sets logging level at N.
# disk/ logging:
# -DENABLE_ESDI_AT_LOG=N sets logging level at N.
# -DENABLE_ESDI_MCA_LOG=N sets logging level at N.
# -DENABLE_HDC_LOG=N sets logging level at N.
# -DENABLE_HDD_IMAGE_LOG=N sets logging level at N.
# -DENABLE_IDE_LOG=N sets logging level at N.
# -DENABLE_FDC_LOG=N sets logging level at N.
# -DENABLE_MFM_AT_LOG=N sets logging level at N.
# -DENABLE_MFM_XT_LOG=N sets logging level at N.
# -DENABLE_XTA_LOG=N sets logging level at N.
# -DENABLE_ZIP_LOG=N sets logging level at N.
# floppy/ logging:
# -DENABLE_D86F_LOG=N sets logging level at N.
# -DENABLE_FDC_LOG=N sets logging level at N.
# -DENABLE_FDD_LOG=N sets logging level at N.
# -DENABLE_FDI_LOG=N sets logging level at N.
# -DENABLE_FDI2RAW_LOG=N sets logging level at N.
# -DENABLE_IMD_LOG=N sets logging level at N.
# -DENABLE_IMG_LOG=N sets logging level at N.
# -DENABLE_JSON_LOG=N sets logging level at N.
# -DENABLE_TD0_LOG=N sets logging level at N.
# machine/ logging:
# -DENABLE_AMSTRAD_LOG=N sets logging level at N.
# -DENABLE_EUROPC_LOG=N sets logging level at N.
# -DENABLE_MACHINE_LOG=N sets logging level at N.
# -DENABLE_PS1_HDC_LOG=N sets logging level at N.
# -DENABLE_PS2_MCA_LOG=N sets logging level at N.
# -DENABLE_T1000_LOG=N sets logging level at N.
# -DENABLE_T3100E_LOG=N sets logging level at N.
# -DENABLE_TANDY_LOG=N sets logging level at N.
# network/ logging:
# -DENABLE_NETWORK_LOG=N sets logging level at N.
# -DENABLE_NIC_LOG=N sets logging level at N.
# -DENABLE_SCAT_LOG=N sets logging level at N.
# -DENABLE_SCSI_BUS_LOG=N sets logging level at N.
# -DENABLE_SCSI_DISK_LOG=N sets logging level at N.
# -DENABLE_X54X_LOG=N sets logging level at N.
# -DENABLE_PCAP_LOG=N sets logging level at N.
# -DENABLE_SLIRP_LOG=N sets logging level at N.
# scsi/ logging:
# -DENABLE_AHA154X_LOG=N sets logging level at N.
# -DENABLE_BUSLOGIC_LOG=N sets logging level at N.
# -DENABLE_NCR5380_LOG=N sets logging level at N.
# -DENABLE_NCR53C810_LOG=N sets logging level at N.
# -DENABLE_SCSI_LOG=N sets logging level at N.
# -DENABLE_SCSI_BUS_LOG=N sets logging level at N.
# -DENABLE_SCSI_DISK_LOG=N sets logging level at N.
# -DENABLE_X54X_LOG=N sets logging level at N.
# sound/ logging:
# -DENABLE_ADLIB_LOG=N sets logging level at N.
# -DENABLE_AUDIOPCI_LOG=N sets logging level at N.
# -DENABLE_EMU8K_LOG=N sets logging level at N.
# -DENABLE_MPU401_LOG=N sets logging level at N.
# -DENABLE_PAS16_LOG=N sets logging level at N.
# -DENABLE_SB_LOG=N sets logging level at N.
# -DENABLE_SB_DSP_LOG=N sets logging level at N.
# -DENABLE_SOUND_LOG=N sets logging level at N.
# video/ logging:
# -DENABLE_ATI28800_LOG=N sets logging level at N.
# -DENABLE_MACH64_LOG=N sets logging level at N.
# -DENABLE_ET4000W32_LOG=N sets logging level at N.
# -DENABLE_NV_RIVA_LOG=N sets logging level at N.
# -DENABLE_NVIDIA_LOG=N sets logging level at N.
# -DENABLE_S3_VIRGE_LOG=N sets logging level at N.
# -DENABLE_VID_TABLE_LOG=N sets logging level at N.
# -DENABLE_VOODOO_LOG=N sets logging level at N.
# -DENABLE_VRAM_DUMP=N sets logging level at N.
# -DENABLE_SERIAL_LOG=N sets logging level at N.
# win/ logging:
# -DENABLE_DDRAW_LOG=N sets logging level at N.
# -DENABLE_DYNLD_LOG=N sets logging level at N.
# -DENABLE_JOYSTICK_LOG=N sets logging level at N.
# -DENABLE_WIN_LOG=N sets logging level at N.
EXTRAS :=

36
src/bugger.c
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@@ -44,15 +44,17 @@
* configuration register (CTRL_SPCFG bit set) but have to
* remember that stuff first...
*
* Version: @(#)bugger.c 1.0.11 2018/04/26
* Version: @(#)bugger.c 1.0.12 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
* Copyright 1989-2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "io.h"
#include "device.h"
@@ -89,6 +91,26 @@ static char bug_str[UISTR_LEN]; /* UI output string */
extern void ui_sb_bugui(char *__str);
#ifdef ENABLE_BUGGER_LOG
int bugger_do_log = ENABLE_BUGGER_LOG;
#endif
static void
bugger_log(const char *format, ...)
{
#ifdef ENABLE_BUGGER_LOG
va_list ap;
if (bugger_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Update the system's UI with the actual Bugger status. */
static void
bug_setui(void)
@@ -115,7 +137,7 @@ static void
bug_spflsh(void)
{
*bug_bptr = '\0';
pclog("BUGGER- serial port [%s]\n", bug_buff);
bugger_log("BUGGER- serial port [%s]\n", bug_buff);
bug_bptr = bug_buff;
}
@@ -141,7 +163,7 @@ bug_wsport(uint8_t val)
/* Restore the SPORT bit. */
bug_ctrl |= (old & CTRL_SPORT);
pclog("BUGGER- sport %02x\n", val);
bugger_log("BUGGER- sport %02x\n", val);
}
@@ -151,7 +173,7 @@ bug_wspcfg(uint8_t val)
{
bug_spcfg = val;
pclog("BUGGER- spcfg %02x\n", bug_spcfg);
bugger_log("BUGGER- spcfg %02x\n", bug_spcfg);
}
@@ -201,7 +223,7 @@ bug_wctrl(uint8_t val)
}
/* Update the UI with active settings. */
pclog("BUGGER- ctrl %02x\n", bug_ctrl);
bugger_log("BUGGER- ctrl %02x\n", bug_ctrl);
bug_setui();
}
@@ -226,7 +248,7 @@ bug_wdata(uint8_t val)
else
bug_ledr = val;
pclog("BUGGER- data %02x\n", bug_data);
bugger_log("BUGGER- data %02x\n", bug_data);
}
/* Update the UI with active settings. */
@@ -311,7 +333,7 @@ bug_read(uint16_t port, void *priv)
static void *
bug_init(const device_t *info)
{
pclog("%s, I/O=%04x\n", info->name, BUGGER_ADDR);
bugger_log("%s, I/O=%04x\n", info->name, BUGGER_ADDR);
/* Initialize local registers. */
bug_reset();

6
src/cdrom/cdrom.c
View File

@@ -9,18 +9,18 @@
* Implementation of the CD-ROM drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage.
*
* Version: @(#)cdrom.c 1.0.46 2018/03/26
* Version: @(#)cdrom.c 1.0.47 2018/05/10
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2018 Miran Grca.
*/
#include <inttypes.h>
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"

3
src/cdrom/cdrom.h
View File

@@ -9,7 +9,7 @@
* Implementation of the CD-ROM drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage.
*
* Version: @(#)cdrom.h 1.0.11 2018/03/26
* Version: @(#)cdrom.h 1.0.12 2018/04/30
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -40,7 +40,6 @@
#define CDROM_IMAGE 200
#define IDE_TIME (5LL * 100LL * (1LL << TIMER_SHIFT))
#define CDROM_TIME (5LL * 100LL * (1LL << TIMER_SHIFT))

38
src/config.c
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@@ -8,7 +8,7 @@
*
* Configuration file handler.
*
* Version: @(#)config.c 1.0.47 2018/03/26
* Version: @(#)config.c 1.0.47 2018/04/29
*
* Authors: Sarah Walker,
* Miran Grca, <mgrca8@gmail.com>
@@ -23,12 +23,14 @@
* it on Windows XP, and possibly also Vista. Use the
* -DANSI_CFG for use on these systems.
*/
#include <inttypes.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <inttypes.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "cpu/cpu.h"
#include "device.h"
@@ -103,6 +105,26 @@ typedef struct {
static list_t config_head;
#ifdef ENABLE_CONFIG_LOG
int config_do_log = ENABLE_CONFIG_LOG;
#endif
static void
config_log(const char *format, ...)
{
#ifdef ENABLE_CONFIG_LOG
va_list ap;
if (config_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
static section_t *
find_section(char *name)
{
@@ -963,7 +985,7 @@ load_floppy_drives(void)
wcsncpy(floppyfns[c], wp, sizeof_w(floppyfns[c]));
/* if (*wp != L'\0')
pclog("Floppy%d: %ls\n", c, floppyfns[c]); */
config_log("Floppy%d: %ls\n", c, floppyfns[c]); */
sprintf(temp, "fdd_%02i_writeprot", c+1);
ui_writeprot[c] = !!config_get_int(cat, temp, 0);
sprintf(temp, "fdd_%02i_turbo", c + 1);
@@ -1201,7 +1223,7 @@ config_load(void)
{
int i;
pclog("Loading config file '%ls'..\n", cfg_path);
config_log("Loading config file '%ls'..\n", cfg_path);
memset(hdd, 0, sizeof(hard_disk_t));
memset(cdrom_drives, 0, sizeof(cdrom_drive_t) * CDROM_NUM);
@@ -1244,7 +1266,7 @@ config_load(void)
mem_size = 640;
opl_type = 0;
pclog("Config file not present or invalid!\n");
config_log("Config file not present or invalid!\n");
return;
}
@@ -1263,7 +1285,7 @@ config_load(void)
/* Mark the configuration as changed. */
config_changed = 1;
pclog("Config loaded.\n\n");
config_log("Config loaded.\n\n");
}
@@ -1894,11 +1916,11 @@ config_dump(void)
entry_t *ent;
if (sec->name && sec->name[0])
pclog("[%s]\n", sec->name);
config_log("[%s]\n", sec->name);
ent = (entry_t *)sec->entry_head.next;
while (ent != NULL) {
pclog("%s = %ls\n", ent->name, ent->wdata);
config_log("%s = %ls\n", ent->name, ent->wdata);
ent = (entry_t *)ent->list.next;
}

168
src/cpu/386.c
View File

@@ -1,5 +1,6 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
@@ -7,6 +8,7 @@
#ifndef INFINITY
# define INFINITY (__builtin_inff())
#endif
#define HAVE_STDARG_H
#include "../86box.h"
#include "cpu.h"
#include "x86.h"
@@ -68,122 +70,6 @@ uint32_t *eal_r, *eal_w;
uint16_t *mod1add[2][8];
uint32_t *mod1seg[8];
#if 0
static __inline void fetch_ea_32_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
ea_rseg = cpu_state.ea_seg->seg;
if (cpu_rm == 4)
{
uint8_t sib = rmdat >> 8;
switch (cpu_mod)
{
case 0:
cpu_state.eaaddr = cpu_state.regs[sib & 7].l;
cpu_state.pc++;
break;
case 1:
cpu_state.pc++;
cpu_state.eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l;
/* pc++; */
break;
case 2:
cpu_state.eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l;
cpu_state.pc += 5;
break;
}
/*SIB byte present*/
if ((sib & 7) == 5 && !cpu_mod)
cpu_state.eaaddr = getlong();
else if ((sib & 6) == 4 && !cpu_state.ssegs)
{
easeg = ss;
ea_rseg = SS;
cpu_state.ea_seg = &_ss;
}
if (((sib >> 3) & 7) != 4)
cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
}
else
{
cpu_state.eaaddr = cpu_state.regs[cpu_rm].l;
if (cpu_mod)
{
if (cpu_rm == 5 && !cpu_state.ssegs)
{
easeg = ss;
ea_rseg = SS;
cpu_state.ea_seg = &_ss;
}
if (cpu_mod == 1)
{
cpu_state.eaaddr += ((uint32_t)(int8_t)(rmdat >> 8));
cpu_state.pc++;
}
else
{
cpu_state.eaaddr += getlong();
}
}
else if (cpu_rm == 5)
{
cpu_state.eaaddr = getlong();
}
}
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
{
uint32_t addr = easeg + cpu_state.eaaddr;
if ( readlookup2[addr >> 12] != -1)
eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr);
if (writelookup2[addr >> 12] != -1)
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
}
}
static __inline void fetch_ea_16_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
ea_rseg = cpu_state.ea_seg->seg;
if (!cpu_mod && cpu_rm == 6)
{
cpu_state.eaaddr = getword();
}
else
{
switch (cpu_mod)
{
case 0:
cpu_state.eaaddr = 0;
break;
case 1:
cpu_state.eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++;
break;
case 2:
cpu_state.eaaddr = getword();
break;
}
cpu_state.eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]);
if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs)
{
easeg = ss;
ea_rseg = SS;
cpu_state.ea_seg = &_ss;
}
cpu_state.eaaddr &= 0xFFFF;
}
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
{
uint32_t addr = easeg + cpu_state.eaaddr;
if ( readlookup2[addr >> 12] != -1)
eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr);
if (writelookup2[addr >> 12] != -1)
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
}
}
#endif
#define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_16_long(rmdat); if (cpu_state.abrt) return 0; }
#define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_32_long(rmdat); } if (cpu_state.abrt) return 0
@@ -222,6 +108,27 @@ extern int dontprint;
break; \
}
#ifdef ENABLE_386_LOG
int x386_do_log = ENABLE_386_LOG;
#endif
static void
x386_log(const char *fmt, ...)
{
#ifdef ENABLE_386_LOG
va_list ap;
if (x386_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
void exec386(int cycs)
{
uint8_t temp;
@@ -240,7 +147,6 @@ void exec386(int cycs)
cycdiff=0;
oldcyc=cycles;
timer_start_period(cycles << TIMER_SHIFT);
/* pclog("%i %02X\n", ins, ram[8]); */
while (cycdiff < cycle_period)
{
/* testr[0]=EAX; testr[1]=EBX; testr[2]=ECX; testr[3]=EDX;
@@ -268,10 +174,6 @@ dontprint=0;
opcode = fetchdat & 0xFF;
fetchdat >>= 8;
if (output == 3)
{
pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X %02X%02X %02X\n",CS,cs,cpu_state.pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0xB270+0x3F5], ram[0xB270+0x3F4], ram[0xB270+0x3F7], ram[0xB270+0x3F6], ram[0xB270+0x3F9], ram[0xB270+0x3F8], ram[0x4430+0x0D49]);
}
cpu_state.pc++;
x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
if (x86_was_reset)
@@ -284,17 +186,6 @@ dontprint=0;
if (cpu_state.abrt)
{
flags_rebuild();
/* pclog("Abort\n"); */
/* if (CS == 0x228) pclog("Abort at %04X:%04X - %i %i %i\n",CS,pc,notpresent,nullseg,cpu_state.abrt); */
/* if (testr[0]!=EAX) pclog("EAX corrupted %08X\n",pc);
if (testr[1]!=EBX) pclog("EBX corrupted %08X\n",pc);
if (testr[2]!=ECX) pclog("ECX corrupted %08X\n",pc);
if (testr[3]!=EDX) pclog("EDX corrupted %08X\n",pc);
if (testr[4]!=ESI) pclog("ESI corrupted %08X\n",pc);
if (testr[5]!=EDI) pclog("EDI corrupted %08X\n",pc);
if (testr[6]!=EBP) pclog("EBP corrupted %08X\n",pc);
if (testr[7]!=ESP) pclog("ESP corrupted %08X\n",pc);*/
/* if (testr[8]!=flags) pclog("FLAGS corrupted %08X\n",pc);*/
tempi = cpu_state.abrt;
cpu_state.abrt = 0;
x86_doabrt(tempi);
@@ -303,14 +194,14 @@ dontprint=0;
cpu_state.abrt = 0;
CS = oldcs;
cpu_state.pc = cpu_state.oldpc;
pclog("Double fault %i\n", ins);
x386_log("Double fault %i\n", ins);
pmodeint(8, 0);
if (cpu_state.abrt)
{
cpu_state.abrt = 0;
softresetx86();
cpu_set_edx();
pclog("Triple fault - reset\n");
x386_log("Triple fault - reset\n");
}
}
}
@@ -342,7 +233,6 @@ dontprint=0;
{
cpu_state.oldpc = cpu_state.pc;
oldcs = CS;
/* pclog("NMI\n"); */
x86_int(2);
nmi_enable = 0;
if (nmi_auto_clear)
@@ -356,10 +246,6 @@ dontprint=0;
temp=picinterrupt();
if (temp!=0xFF)
{
/* if (temp == 0x54) pclog("Take int 54\n"); */
/* if (output) output=3; */
/* if (temp == 0xd) pclog("Hardware int %02X %i %04X(%08X):%08X\n",temp,ins, CS,cs,pc); */
/* if (temp==0x54) output=3; */
flags_rebuild();
if (msw&1)
{
@@ -377,9 +263,7 @@ dontprint=0;
oxpc=cpu_state.pc;
cpu_state.pc=readmemw(0,addr);
loadcs(readmemw(0,addr+2));
/* if (temp==0x76) pclog("INT to %04X:%04X\n",CS,pc); */
}
/* pclog("Now at %04X(%08X):%08X\n", CS, cs, pc); */
}
}

55
src/cpu/386_dynarec.c
View File

@@ -1,5 +1,6 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
@@ -7,6 +8,7 @@
#ifndef INFINITY
# define INFINITY (__builtin_inff())
#endif
#define HAVE_STDARG_H
#include "../86box.h"
#include "cpu.h"
#include "x86.h"
@@ -69,6 +71,27 @@ uint32_t *eal_r, *eal_w;
uint16_t *mod1add[2][8];
uint32_t *mod1seg[8];
#ifdef ENABLE_386_DYNAREC_LOG
int x386_dynarec_do_log = ENABLE_386_DYNAREC_LOG;
#endif
static void
x386_dynarec_log(const char *fmt, ...)
{
#ifdef ENABLE_386_DYNAREC_LOG
va_list ap;
if (x386_dynarec_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static __inline void fetch_ea_32_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
@@ -210,7 +233,7 @@ void x86_int(int num)
cpu_state.abrt = 0;
softresetx86();
cpu_set_edx();
pclog("Triple fault in real mode - reset\n");
x386_dynarec_log("Triple fault in real mode - reset\n");
}
else
x86_int(8);
@@ -303,9 +326,9 @@ int x86_int_sw_rm(int num)
if (cpu_state.abrt) return 1;
writememw(ss,((SP-2)&0xFFFF),flags); if (cpu_state.abrt) {pclog("abrt5\n"); return 1; }
writememw(ss,((SP-2)&0xFFFF),flags); if (cpu_state.abrt) {x386_dynarec_log("abrt5\n"); return 1; }
writememw(ss,((SP-4)&0xFFFF),CS);
writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); if (cpu_state.abrt) {pclog("abrt6\n"); return 1; }
writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); if (cpu_state.abrt) {x386_dynarec_log("abrt6\n"); return 1; }
SP-=6;
eflags &= ~VIF_FLAG;
@@ -428,13 +451,6 @@ int checkio(int port)
int xout=0;
#if 0
#define divexcp() { \
pclog("Divide exception at %04X(%06X):%04X\n",CS,cs,cpu_state.pc); \
x86_int(0); \
}
#endif
#define divexcp() { \
x86_int(0); \
}
@@ -842,14 +858,14 @@ inrecomp=0;
cpu_state.abrt = 0;
CS = oldcs;
cpu_state.pc = cpu_state.oldpc;
pclog("Double fault %i\n", ins);
x386_dynarec_log("Double fault %i\n", ins);
pmodeint(8, 0);
if (cpu_state.abrt)
{
cpu_state.abrt = 0;
softresetx86();
cpu_set_edx();
pclog("Triple fault - reset\n");
x386_dynarec_log("Triple fault - reset\n");
}
}
}
@@ -879,7 +895,6 @@ inrecomp=0;
{
cpu_state.oldpc = cpu_state.pc;
oldcs = CS;
pclog("NMI\n");
x86_int(2);
nmi_enable = 0;
if (nmi_auto_clear)
@@ -897,18 +912,10 @@ inrecomp=0;
flags_rebuild();
if (msw&1)
{
/* if (temp == 0x0E)
{
pclog("Servicing FDC interupt (p)!\n");
} */
pmodeint(temp,0);
}
else
{
/* if (temp == 0x0E)
{
pclog("Servicing FDC interupt (r)!\n");
} */
writememw(ss,(SP-2)&0xFFFF,flags);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
@@ -921,10 +928,6 @@ inrecomp=0;
loadcs(readmemw(0,addr+2));
}
}
/* else
{
pclog("Servicing pending interrupt 0xFF (!)!\n");
} */
}
}
timer_end_period(cycles << TIMER_SHIFT);

93
src/cpu/386_ops.h
View File

@@ -1,23 +1,43 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the 86Box distribution.
* This file is part of the VARCem Project.
*
* 286/386+ instruction handlers list.
*
* Version: @(#)386_ops.h 1.0.3 2018/04/25
* Version: @(#)386_ops.h 1.0.2 2018/05/05
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
* leilei,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 leilei.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include "x86_ops.h"
@@ -147,20 +167,9 @@ static int ILLEGAL(uint32_t fetchdat)
return 0;
}
#if defined(DEV_BRANCH) && (defined(USE_AMD_K) || defined(USE_I686))
static int internal_illegal(char *s)
{
cpu_state.pc = cpu_state.oldpc;
x86gpf(s, 0);
return cpu_state.abrt;
}
#endif
#include "x86seg.h"
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#include "x86_ops_amd.h"
#endif
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
# include "x86_ops_amd.h"
#endif
#include "x86_ops_arith.h"
#include "x86_ops_atomic.h"
@@ -176,10 +185,8 @@ static int internal_illegal(char *s)
#include "x86_ops_jump.h"
#include "x86_ops_misc.h"
#include "x87_ops.h"
#ifdef DEV_BRANCH
#ifdef USE_I686
#include "x86_ops_i686.h"
#endif
#if defined(DEV_BRANCH) && defined(USE_I686)
# include "x86_ops_i686.h"
#endif
#include "x86_ops_mmx.h"
#include "x86_ops_mmx_arith.h"
@@ -204,6 +211,7 @@ static int internal_illegal(char *s)
#include "x86_ops_string.h"
#include "x86_ops_xchg.h"
static int op0F_w_a16(uint32_t fetchdat)
{
int opcode = fetchdat & 0xff;
@@ -245,7 +253,8 @@ static int op0F_l_a32(uint32_t fetchdat)
return x86_opcodes_0f[opcode | 0x300](fetchdat >> 8);
}
OpFn OP_TABLE(286_0f)[1024] =
const OpFn OP_TABLE(286_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -336,7 +345,7 @@ OpFn OP_TABLE(286_0f)[1024] =
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
};
OpFn OP_TABLE(386_0f)[1024] =
const OpFn OP_TABLE(386_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -427,7 +436,7 @@ OpFn OP_TABLE(386_0f)[1024] =
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
};
OpFn OP_TABLE(486_0f)[1024] =
const OpFn OP_TABLE(486_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -518,7 +527,7 @@ OpFn OP_TABLE(486_0f)[1024] =
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
};
OpFn OP_TABLE(winchip_0f)[1024] =
const OpFn OP_TABLE(winchip_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -609,7 +618,7 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
OpFn OP_TABLE(pentium_0f)[1024] =
const OpFn OP_TABLE(pentium_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -700,7 +709,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
};
OpFn OP_TABLE(pentiummmx_0f)[1024] =
const OpFn OP_TABLE(pentiummmx_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -791,9 +800,8 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
OpFn OP_TABLE(k6_0f)[1024] =
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
const OpFn OP_TABLE(k6_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -884,9 +892,8 @@ OpFn OP_TABLE(k6_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
#endif
#endif
OpFn OP_TABLE(c6x86mx_0f)[1024] =
const OpFn OP_TABLE(c6x86mx_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -979,7 +986,7 @@ OpFn OP_TABLE(c6x86mx_0f)[1024] =
#ifdef DEV_BRANCH
#ifdef USE_I686
OpFn OP_TABLE(pentiumpro_0f)[1024] =
const OpFn OP_TABLE(pentiumpro_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1071,7 +1078,7 @@ OpFn OP_TABLE(pentiumpro_0f)[1024] =
};
#if 0
OpFn OP_TABLE(pentium2_0f)[1024] =
const OpFn OP_TABLE(pentium2_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1163,7 +1170,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
};
#endif
OpFn OP_TABLE(pentium2d_0f)[1024] =
const OpFn OP_TABLE(pentium2d_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1256,7 +1263,7 @@ OpFn OP_TABLE(pentium2d_0f)[1024] =
#endif
#endif
OpFn OP_TABLE(286)[1024] =
const OpFn OP_TABLE(286)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1347,7 +1354,7 @@ OpFn OP_TABLE(286)[1024] =
/*f0*/ opLOCK, opLOCK, opREPNE, opREPE, opHLT, opCMC, opF6_a16, opF7_w_a16, opCLC, opSTC, opCLI, opSTI, opCLD, opSTD, opINCDEC_b_a16, opFF_w_a16,
};
OpFn OP_TABLE(386)[1024] =
const OpFn OP_TABLE(386)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1438,7 +1445,7 @@ OpFn OP_TABLE(386)[1024] =
/*f0*/ opLOCK, opINT1, opREPNE, opREPE, opHLT, opCMC, opF6_a32, opF7_l_a32, opCLC, opSTC, opCLI, opSTI, opCLD, opSTD, opINCDEC_b_a32, opFF_l_a32,
};
OpFn OP_TABLE(REPE)[1024] =
const OpFn OP_TABLE(REPE)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1529,7 +1536,7 @@ OpFn OP_TABLE(REPE)[1024] =
/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
};
OpFn OP_TABLE(REPNE)[1024] =
const OpFn OP_TABLE(REPNE)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/

95
src/cpu/808x.c
View File

@@ -18,7 +18,7 @@
* 2 clocks - fetch opcode 1 2 clocks - execute
* 2 clocks - fetch opcode 2 etc
*
* Version: @(#)808x.c 1.0.4 2018/04/26
* Version: @(#)808x.c 1.0.5 2018/04/29
*
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
@@ -44,10 +44,12 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "cpu.h"
#include "x86.h"
@@ -81,6 +83,27 @@ void writememwl(uint32_t seg, uint32_t addr, uint16_t val);
uint32_t readmemll(uint32_t seg, uint32_t addr);
void writememll(uint32_t seg, uint32_t addr, uint32_t val);
#ifdef ENABLE_808X_LOG
int x808x_do_log = ENABLE_808X_LOG;
#endif
static void
x808x_log(const char *fmt, ...)
{
#ifdef ENABLE_808X_LOG
va_list ap;
if (x808x_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
#undef readmemb
#undef readmemw
uint8_t readmemb(uint32_t a)
@@ -106,7 +129,7 @@ uint16_t readmemw(uint32_t s, uint16_t a)
else return *(uint16_t *)(readlookup2[(s + a) >> 12] + s + a);
}
void refreshread() { /*pclog("Refreshread\n"); */FETCHCOMPLETE(); memcycs+=4; }
void refreshread() { FETCHCOMPLETE(); memcycs+=4; }
#undef fetchea
#define fetchea() { rmdat=FETCH(); \
@@ -485,7 +508,7 @@ void makeznptable()
{
znptable8[c]=P_FLAG;
}
if (c == 0xb1) pclog("znp8 b1 = %i %02X\n", d, znptable8[c]);
if (c == 0xb1) x808x_log("znp8 b1 = %i %02X\n", d, znptable8[c]);
if (!c) znptable8[c]|=Z_FLAG;
if (c&0x80) znptable8[c]|=N_FLAG;
}
@@ -504,8 +527,8 @@ void makeznptable()
znptable16[c]=0;
else
znptable16[c]=P_FLAG;
if (c == 0xb1) pclog("znp16 b1 = %i %02X\n", d, znptable16[c]);
if (c == 0x65b1) pclog("znp16 65b1 = %i %02X\n", d, znptable16[c]);
if (c == 0xb1) x808x_log("znp16 b1 = %i %02X\n", d, znptable16[c]);
if (c == 0x65b1) x808x_log("znp16 65b1 = %i %02X\n", d, znptable16[c]);
if (!c) znptable16[c]|=Z_FLAG;
if (c&0x8000) znptable16[c]|=N_FLAG;
}
@@ -538,11 +561,11 @@ void dumpregs(int force)
f=fopen("ram.dmp","wb");
fwrite(ram,mem_size*1024,1,f);
fclose(f);
pclog("Dumping rram.dmp\n");
x808x_log("Dumping rram.dmp\n");
f=fopen("rram.dmp","wb");
for (c=0;c<0x1000000;c++) putc(readmemb(c),f);
fclose(f);
pclog("Dumping rram4.dmp\n");
x808x_log("Dumping rram4.dmp\n");
f=fopen("rram4.dmp","wb");
for (c=0;c<0x0050000;c++)
{
@@ -550,44 +573,44 @@ void dumpregs(int force)
putc(readmemb386l(0,c+0x80000000),f);
}
fclose(f);
pclog("Dumping done\n");
x808x_log("Dumping done\n");
#endif
if (is386)
pclog("EAX=%08X EBX=%08X ECX=%08X EDX=%08X\nEDI=%08X ESI=%08X EBP=%08X ESP=%08X\n",EAX,EBX,ECX,EDX,EDI,ESI,EBP,ESP);
x808x_log("EAX=%08X EBX=%08X ECX=%08X EDX=%08X\nEDI=%08X ESI=%08X EBP=%08X ESP=%08X\n",EAX,EBX,ECX,EDX,EDI,ESI,EBP,ESP);
else
pclog("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",AX,BX,CX,DX,DI,SI,BP,SP);
pclog("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,flags);
pclog("%04X:%04X %04X:%04X\n",oldcs,cpu_state.oldpc, oldcs2, oldpc2);
pclog("%i ins\n",ins);
x808x_log("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",AX,BX,CX,DX,DI,SI,BP,SP);
x808x_log("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,flags);
x808x_log("%04X:%04X %04X:%04X\n",oldcs,cpu_state.oldpc, oldcs2, oldpc2);
x808x_log("%i ins\n",ins);
if (is386)
pclog("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real");
x808x_log("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real");
else
pclog("In %s mode\n",(msw&1)?"protected":"real");
pclog("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,_cs.limit,_cs.access, _cs.limit_low, _cs.limit_high);
pclog("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,_ds.limit,_ds.access, _ds.limit_low, _ds.limit_high);
pclog("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,_es.limit,_es.access, _es.limit_low, _es.limit_high);
x808x_log("In %s mode\n",(msw&1)?"protected":"real");
x808x_log("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,_cs.limit,_cs.access, _cs.limit_low, _cs.limit_high);
x808x_log("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,_ds.limit,_ds.access, _ds.limit_low, _ds.limit_high);
x808x_log("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,_es.limit,_es.access, _es.limit_low, _es.limit_high);
if (is386)
{
pclog("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",seg_fs,_fs.limit,_fs.access, _fs.limit_low, _fs.limit_high);
pclog("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,_gs.limit,_gs.access, _gs.limit_low, _gs.limit_high);
x808x_log("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",seg_fs,_fs.limit,_fs.access, _fs.limit_low, _fs.limit_high);
x808x_log("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,_gs.limit,_gs.access, _gs.limit_low, _gs.limit_high);
}
pclog("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,_ss.limit,_ss.access, _ss.limit_low, _ss.limit_high);
pclog("GDT : base=%06X limit=%04X\n",gdt.base,gdt.limit);
pclog("LDT : base=%06X limit=%04X\n",ldt.base,ldt.limit);
pclog("IDT : base=%06X limit=%04X\n",idt.base,idt.limit);
pclog("TR : base=%06X limit=%04X\n", tr.base, tr.limit);
x808x_log("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,_ss.limit,_ss.access, _ss.limit_low, _ss.limit_high);
x808x_log("GDT : base=%06X limit=%04X\n",gdt.base,gdt.limit);
x808x_log("LDT : base=%06X limit=%04X\n",ldt.base,ldt.limit);
x808x_log("IDT : base=%06X limit=%04X\n",idt.base,idt.limit);
x808x_log("TR : base=%06X limit=%04X\n", tr.base, tr.limit);
if (is386)
{
pclog("386 in %s mode stack in %s mode\n",(use32)?"32-bit":"16-bit",(stack32)?"32-bit":"16-bit");
pclog("CR0=%08X CR2=%08X CR3=%08X CR4=%08x\n",cr0,cr2,cr3, cr4);
x808x_log("386 in %s mode stack in %s mode\n",(use32)?"32-bit":"16-bit",(stack32)?"32-bit":"16-bit");
x808x_log("CR0=%08X CR2=%08X CR3=%08X CR4=%08x\n",cr0,cr2,cr3, cr4);
}
pclog("Entries in readlookup : %i writelookup : %i\n",readlnum,writelnum);
x808x_log("Entries in readlookup : %i writelookup : %i\n",readlnum,writelnum);
for (c=0;c<1024*1024;c++)
{
if (readlookup2[c]!=0xFFFFFFFF) d++;
if (writelookup2[c]!=0xFFFFFFFF) e++;
}
pclog("Entries in readlookup : %i writelookup : %i\n",d,e);
x808x_log("Entries in readlookup : %i writelookup : %i\n",d,e);
x87_dumpregs();
indump = 0;
}
@@ -596,7 +619,7 @@ int resets = 0;
int x86_was_reset = 0;
void resetx86()
{
pclog("x86 reset\n");
x808x_log("x86 reset\n");
resets++;
ins = 0;
use32=0;
@@ -1065,7 +1088,7 @@ void execx86(int cycs)
cpu_state.pc--;
if (output)
{
if (!skipnextprint) pclog("%04X:%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X %i %p %02X\n",cs,cpu_state.pc,AX,BX,CX,DX,CS,DS,ES,SS,DI,SI,BP,SP,opcode,flags, ins, ram, ram[0x1a925]);
if (!skipnextprint) x808x_log("%04X:%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X %i %p %02X\n",cs,cpu_state.pc,AX,BX,CX,DX,CS,DS,ES,SS,DI,SI,BP,SP,opcode,flags, ins, ram, ram[0x1a925]);
skipnextprint=0;
}
cpu_state.pc++;
@@ -2974,7 +2997,7 @@ void execx86(int cycs)
}
else
{
pclog("DIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
x808x_log("DIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
@@ -2998,7 +3021,7 @@ void execx86(int cycs)
}
else
{
pclog("IDIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
x808x_log("IDIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
@@ -3070,7 +3093,7 @@ void execx86(int cycs)
}
else
{
pclog("DIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
x808x_log("DIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
@@ -3094,7 +3117,7 @@ void execx86(int cycs)
}
else
{
pclog("IDIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
x808x_log("IDIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);

58
src/cpu/codegen_x86-64.c
View File

@@ -1,8 +1,10 @@
#ifdef __amd64__
#include <stdint.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "cpu.h"
#include "x86.h"
@@ -94,7 +96,6 @@ void codegen_init()
exit(-1);
}
#endif
// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
}
void codegen_reset()
@@ -111,20 +112,6 @@ void codegen_reset()
void dump_block()
{
/* codeblock_t *block = pages[0x119000 >> 12].block;
pclog("dump_block:\n");
while (block)
{
uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
uint32_t end_pc = (block->endpc & 0xffc) | (block->phys & ~0xfff);
pclog(" %p : %08x-%08x %08x-%08x %p %p\n", (void *)block, start_pc, end_pc, block->pc, block->endpc, (void *)block->prev, (void *)block->next);
if (!block->pc)
fatal("Dead PC=0\n");
block = block->next;
}
pclog("dump_block done\n");*/
}
static void add_to_block_list(codeblock_t *block)
@@ -204,7 +191,6 @@ static void remove_from_block_list(codeblock_t *block, uint32_t pc)
}
else
{
// pclog(" pages.block_2=%p 3 %p %p\n", (void *)block->next_2, (void *)block, (void *)pages[block->phys_2 >> 12].block_2);
pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3] = block->next_2;
if (block->next_2)
block->next_2->prev_2 = NULL;
@@ -270,11 +256,8 @@ void codegen_block_init(uint32_t phys_addr)
block_current = (block_current + 1) & BLOCK_MASK;
block = &codeblock[block_current];
// if (block->pc == 0xb00b4ff5)
// pclog("Init target block\n");
if (block->valid != 0)
{
// pclog("Reuse block : was %08x now %08x\n", block->pc, cs+pc);
delete_block(block);
cpu_recomp_reuse++;
}
@@ -374,8 +357,6 @@ void codegen_block_start_recompile(codeblock_t *block)
addbyte(0xBD);
addquad(((uintptr_t)&cpu_state) + 128);
// pclog("New block %i for %08X %03x\n", block_current, cs+pc, block_num);
last_op32 = -1;
last_ea_seg = NULL;
last_ssegs = -1;
@@ -434,14 +415,10 @@ void codegen_block_generate_end_mask()
end_pc = 0x3ff;
start_pc >>= PAGE_MASK_SHIFT;
end_pc >>= PAGE_MASK_SHIFT;
// pclog("block_end: %08x %08x\n", start_pc, end_pc);
for (; start_pc <= end_pc; start_pc++)
{
block->page_mask |= ((uint64_t)1 << start_pc);
// pclog(" %08x %llx\n", start_pc, block->page_mask);
}
pages[block->phys >> 12].code_present_mask[(block->phys >> 10) & 3] |= block->page_mask;
block->phys_2 = -1;
@@ -467,7 +444,6 @@ void codegen_block_generate_end_mask()
fatal("!page_mask2\n");
if (block->next_2)
{
// pclog(" next_2->pc=%08x\n", block->next_2->pc);
if (block->next_2->valid == 0)
fatal("block->next_2->valid=0 %p\n", (void *)block->next_2);
}
@@ -476,7 +452,6 @@ void codegen_block_generate_end_mask()
}
}
// pclog("block_end: %08x %08x %016llx\n", block->pc, block->endpc, block->page_mask);
recomp_page = -1;
}
@@ -542,7 +517,6 @@ void codegen_block_end_recompile(codeblock_t *block)
block->next_2 = block->prev_2 = NULL;
codegen_block_generate_end_mask();
add_to_block_list(block);
// pclog("End block %i\n", block_num);
}
void codegen_flush()
@@ -597,10 +571,6 @@ int opcode_0f_modrm[256] =
void codegen_debug()
{
if (output)
{
pclog("At %04x(%08x):%04x %04x(%08x):%04x es=%08x EAX=%08x BX=%04x ECX=%08x BP=%04x EDX=%08x EDI=%08x\n", CS, cs, cpu_state.pc, SS, ss, ESP, es,EAX, BX,ECX,BP, EDX,EDI);
}
}
static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
@@ -1122,17 +1092,6 @@ generate_call:
addlong(codegen_block_ins);
codegen_block_ins = 0;
}
#if 0
if (codegen_block_full_ins)
{
addbyte(0x81); /*ADD $codegen_block_ins,ins*/
addbyte(0x04);
addbyte(0x25);
addlong((uint32_t)&cpu_recomp_full_ins);
addlong(codegen_block_full_ins);
codegen_block_full_ins = 0;
}
#endif
}
if ((op_table == x86_dynarec_opcodes_REPNE || op_table == x86_dynarec_opcodes_REPE) && !op_table[opcode | op_32])
@@ -1159,8 +1118,6 @@ generate_call:
}
op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask];
// if (output)
// pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]);
if (op_ssegs != last_ssegs)
{
last_ssegs = op_ssegs;
@@ -1169,7 +1126,6 @@ generate_call:
addbyte((uint8_t)cpu_state_offset(ssegs));
addbyte(op_ssegs);
}
//#if 0
if ((!test_modrm ||
(op_table == x86_dynarec_opcodes && opcode_modrm[opcode]) ||
(op_table == x86_dynarec_opcodes_0f && opcode_0f_modrm[opcode]))/* && !(op_32 & 0x200)*/)
@@ -1195,10 +1151,8 @@ generate_call:
op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset);
op_pc -= pc_off;
}
//#endif
if (op_ea_seg != last_ea_seg)
{
// last_ea_seg = op_ea_seg;
addbyte(0xC7); /*MOVL $&_ds,(ea_seg)*/
addbyte(0x45);
addbyte((uint8_t)cpu_state_offset(ea_seg));
@@ -1235,8 +1189,6 @@ generate_call:
addbyte(0x0F); addbyte(0x85); /*JNZ 0*/
addlong((uint32_t)(uintptr_t)&block->data[BLOCK_EXIT_OFFSET] - (uint32_t)(uintptr_t)(&block->data[block_pos + 4]));
// call(block, codegen_debug);
codegen_endpc = (cs + cpu_state.pc) + 8;
}

70
src/cpu/codegen_x86.c
View File

@@ -1,3 +1,41 @@
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Dynamic Recompiler for Intel 32-bit systems.
*
* Version: @(#)codegen_x86.c 1.0.3 2018/05/05
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _WIN32
#include <stdio.h>
@@ -956,11 +994,6 @@ static uint32_t gen_MEM_CHECK_WRITE()
return addr;
}
/*static void checkdebug(uint32_t a)
{
pclog("checkdebug %08x\n", a);
}*/
static uint32_t gen_MEM_CHECK_WRITE_W()
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -1200,10 +1233,17 @@ void codegen_init()
block_pos = (block_pos + 15) & ~15;
mem_check_write_l = (uint32_t)gen_MEM_CHECK_WRITE_L();
#ifndef _MSC_VER
asm(
"fstcw %0\n"
: "=m" (cpu_state.old_npxc)
);
#else
__asm
{
fstcw cpu_state.old_npxc
}
#endif
}
void codegen_reset()
@@ -1215,20 +1255,6 @@ void codegen_reset()
void dump_block()
{
/* codeblock_t *block = pages[0x119000 >> 12].block;
pclog("dump_block:\n");
while (block)
{
uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
uint32_t end_pc = (block->endpc & 0xffc) | (block->phys & ~0xfff);
pclog(" %p : %08x-%08x %08x-%08x %p %p\n", (void *)block, start_pc, end_pc, block->pc, block->endpc, (void *)block->prev, (void *)block->next);
if (!block->pc)
fatal("Dead PC=0\n");
block = block->next;
}
pclog("dump_block done\n");*/
}
static void add_to_block_list(codeblock_t *block)
@@ -1657,10 +1683,6 @@ int opcode_0f_modrm[256] =
void codegen_debug()
{
if (output)
{
pclog("At %04x(%08x):%04x %04x(%08x):%04x es=%08x EAX=%08x BX=%04x ECX=%08x BP=%04x EDX=%08x EDI=%08x\n", CS, cs, cpu_state.pc, SS, ss, ESP, es,EAX, BX,ECX,BP, EDX,EDI);
}
}
static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
@@ -1844,7 +1866,7 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
codeblock_t *block = &codeblock[block_current];
uint32_t op_32 = use32;
uint32_t op_pc = new_pc;
OpFn *op_table = x86_dynarec_opcodes;
const OpFn *op_table = x86_dynarec_opcodes;
RecompOpFn *recomp_op_table = recomp_opcodes;
int opcode_shift = 0;
int opcode_mask = 0x3ff;

392
src/cpu/cpu.c
View File

@@ -1,22 +1,42 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the 86Box distribution.
* This file is part of the VARCem Project.
*
* CPU type handler.
*
* Version: @(#)cpu.c 1.0.15 2018/04/08
* Version: @(#)cpu.c 1.0.6 2018/05/05
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
* leilei,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 leilei.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
@@ -31,58 +51,11 @@
#include "../mem.h"
#include "../pci.h"
#ifdef USE_DYNAREC
#include "codegen.h"
# include "codegen.h"
#endif
int isa_cycles;
static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6;
#ifdef USE_DYNAREC
OpFn *x86_dynarec_opcodes;
OpFn *x86_dynarec_opcodes_0f;
OpFn *x86_dynarec_opcodes_d8_a16;
OpFn *x86_dynarec_opcodes_d8_a32;
OpFn *x86_dynarec_opcodes_d9_a16;
OpFn *x86_dynarec_opcodes_d9_a32;
OpFn *x86_dynarec_opcodes_da_a16;
OpFn *x86_dynarec_opcodes_da_a32;
OpFn *x86_dynarec_opcodes_db_a16;
OpFn *x86_dynarec_opcodes_db_a32;
OpFn *x86_dynarec_opcodes_dc_a16;
OpFn *x86_dynarec_opcodes_dc_a32;
OpFn *x86_dynarec_opcodes_dd_a16;
OpFn *x86_dynarec_opcodes_dd_a32;
OpFn *x86_dynarec_opcodes_de_a16;
OpFn *x86_dynarec_opcodes_de_a32;
OpFn *x86_dynarec_opcodes_df_a16;
OpFn *x86_dynarec_opcodes_df_a32;
OpFn *x86_dynarec_opcodes_REPE;
OpFn *x86_dynarec_opcodes_REPNE;
#endif
OpFn *x86_opcodes;
OpFn *x86_opcodes_0f;
OpFn *x86_opcodes_d8_a16;
OpFn *x86_opcodes_d8_a32;
OpFn *x86_opcodes_d9_a16;
OpFn *x86_opcodes_d9_a32;
OpFn *x86_opcodes_da_a16;
OpFn *x86_opcodes_da_a32;
OpFn *x86_opcodes_db_a16;
OpFn *x86_opcodes_db_a32;
OpFn *x86_opcodes_dc_a16;
OpFn *x86_opcodes_dc_a32;
OpFn *x86_opcodes_dd_a16;
OpFn *x86_opcodes_dd_a32;
OpFn *x86_opcodes_de_a16;
OpFn *x86_opcodes_de_a32;
OpFn *x86_opcodes_df_a16;
OpFn *x86_opcodes_df_a32;
OpFn *x86_opcodes_REPE;
OpFn *x86_opcodes_REPNE;
enum
{
enum {
CPUID_FPU = (1 << 0),
CPUID_VME = (1 << 1),
CPUID_PSE = (1 << 3),
@@ -96,93 +69,145 @@ enum
CPUID_FXSR = (1 << 24)
};
CPU *cpu_s;
int cpu_effective;
int cpu_multi;
int cpu_iscyrix;
int cpu_16bitbus;
int cpu_busspeed;
int cpu_hasrdtsc;
int cpu_hasMMX, cpu_hasMSR;
int cpu_hasCR4;
int cpu_hasVME;
int cpu_cyrix_alignment;
int hasfpu;
int cpuspeed;
uint64_t cpu_CR4_mask;
int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles;
int cpu_waitstates;
int cpu_cache_int_enabled, cpu_cache_ext_enabled;
int cpu_pci_speed;
int is286, is386, is486;
int israpidcad, is_pentium;
uint64_t tsc = 0;
cr0_t CR0;
uint64_t pmc[2] = {0, 0};
uint16_t temp_seg_data[4] = {0, 0, 0, 0};
#ifdef DEV_BRANCH
#ifdef USE_I686
uint16_t cs_msr = 0;
uint32_t esp_msr = 0;
uint32_t eip_msr = 0;
uint64_t apic_base_msr = 0;
uint64_t mtrr_cap_msr = 0;
uint64_t mtrr_physbase_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t mtrr_physmask_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t mtrr_fix64k_8000_msr = 0;
uint64_t mtrr_fix16k_8000_msr = 0;
uint64_t mtrr_fix16k_a000_msr = 0;
uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t pat_msr = 0;
uint64_t mtrr_deftype_msr = 0;
uint64_t msr_ia32_pmc[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t ecx17_msr = 0;
uint64_t ecx79_msr = 0;
uint64_t ecx8x_msr[4] = {0, 0, 0, 0};
uint64_t ecx116_msr = 0;
uint64_t ecx11x_msr[4] = {0, 0, 0, 0};
uint64_t ecx11e_msr = 0;
uint64_t ecx186_msr = 0;
uint64_t ecx187_msr = 0;
uint64_t ecx1e0_msr = 0;
uint64_t ecx570_msr = 0;
#endif
#ifdef USE_DYNAREC
const OpFn *x86_dynarec_opcodes;
const OpFn *x86_dynarec_opcodes_0f;
const OpFn *x86_dynarec_opcodes_d8_a16;
const OpFn *x86_dynarec_opcodes_d8_a32;
const OpFn *x86_dynarec_opcodes_d9_a16;
const OpFn *x86_dynarec_opcodes_d9_a32;
const OpFn *x86_dynarec_opcodes_da_a16;
const OpFn *x86_dynarec_opcodes_da_a32;
const OpFn *x86_dynarec_opcodes_db_a16;
const OpFn *x86_dynarec_opcodes_db_a32;
const OpFn *x86_dynarec_opcodes_dc_a16;
const OpFn *x86_dynarec_opcodes_dc_a32;
const OpFn *x86_dynarec_opcodes_dd_a16;
const OpFn *x86_dynarec_opcodes_dd_a32;
const OpFn *x86_dynarec_opcodes_de_a16;
const OpFn *x86_dynarec_opcodes_de_a32;
const OpFn *x86_dynarec_opcodes_df_a16;
const OpFn *x86_dynarec_opcodes_df_a32;
const OpFn *x86_dynarec_opcodes_REPE;
const OpFn *x86_dynarec_opcodes_REPNE;
#endif
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
/* AMD K5 and K6 MSR's. */
uint64_t ecx83_msr = 0;
/* These are K6-only. */
uint64_t star = 0;
uint64_t sfmask = 0;
#endif
const OpFn *x86_opcodes;
const OpFn *x86_opcodes_0f;
const OpFn *x86_opcodes_d8_a16;
const OpFn *x86_opcodes_d8_a32;
const OpFn *x86_opcodes_d9_a16;
const OpFn *x86_opcodes_d9_a32;
const OpFn *x86_opcodes_da_a16;
const OpFn *x86_opcodes_da_a32;
const OpFn *x86_opcodes_db_a16;
const OpFn *x86_opcodes_db_a32;
const OpFn *x86_opcodes_dc_a16;
const OpFn *x86_opcodes_dc_a32;
const OpFn *x86_opcodes_dd_a16;
const OpFn *x86_opcodes_dd_a32;
const OpFn *x86_opcodes_de_a16;
const OpFn *x86_opcodes_de_a32;
const OpFn *x86_opcodes_df_a16;
const OpFn *x86_opcodes_df_a32;
const OpFn *x86_opcodes_REPE;
const OpFn *x86_opcodes_REPNE;
CPU *cpu_s;
int cpu_effective;
int cpu_multi;
int cpu_16bitbus;
int cpu_busspeed;
int cpu_cyrix_alignment;
int cpuspeed;
int CPUID;
uint64_t cpu_CR4_mask;
int isa_cycles;
int cpu_cycles_read, cpu_cycles_read_l,
cpu_cycles_write, cpu_cycles_write_l;
int cpu_prefetch_cycles, cpu_prefetch_width,
cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles;
int cpu_waitstates;
int cpu_cache_int_enabled, cpu_cache_ext_enabled;
int cpu_pci_speed;
int is286,
is386,
is486,
cpu_iscyrix,
israpidcad,
is_pentium;
int hasfpu,
cpu_hasrdtsc,
cpu_hasMMX,
cpu_hasMSR,
cpu_hasCR4,
cpu_hasVME;
uint64_t tsc = 0;
msr_t msr;
cr0_t CR0;
uint64_t pmc[2] = {0, 0};
uint16_t temp_seg_data[4] = {0, 0, 0, 0};
#if defined(DEV_BRANCH) && defined(USE_I686)
uint16_t cs_msr = 0;
uint32_t esp_msr = 0;
uint32_t eip_msr = 0;
uint64_t apic_base_msr = 0;
uint64_t mtrr_cap_msr = 0;
uint64_t mtrr_physbase_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t mtrr_physmask_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t mtrr_fix64k_8000_msr = 0;
uint64_t mtrr_fix16k_8000_msr = 0;
uint64_t mtrr_fix16k_a000_msr = 0;
uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t pat_msr = 0;
uint64_t mtrr_deftype_msr = 0;
uint64_t msr_ia32_pmc[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t ecx17_msr = 0;
uint64_t ecx79_msr = 0;
uint64_t ecx8x_msr[4] = {0, 0, 0, 0};
uint64_t ecx116_msr = 0;
uint64_t ecx11x_msr[4] = {0, 0, 0, 0};
uint64_t ecx11e_msr = 0;
uint64_t ecx186_msr = 0;
uint64_t ecx187_msr = 0;
uint64_t ecx1e0_msr = 0;
uint64_t ecx570_msr = 0;
#endif
int timing_rr;
int timing_mr, timing_mrl;
int timing_rm, timing_rml;
int timing_mm, timing_mml;
int timing_bt, timing_bnt;
int timing_int, timing_int_rm, timing_int_v86, timing_int_pm, timing_int_pm_outer;
int timing_iret_rm, timing_iret_v86, timing_iret_pm, timing_iret_pm_outer;
int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_gate_inner;
int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
int timing_misaligned;
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
uint64_t ecx83_msr = 0; /* AMD K5 and K6 MSR's. */
uint64_t star = 0; /* These are K6-only. */
uint64_t sfmask = 0;
#endif
msr_t msr;
int timing_rr;
int timing_mr, timing_mrl;
int timing_rm, timing_rml;
int timing_mm, timing_mml;
int timing_bt, timing_bnt;
int timing_int, timing_int_rm, timing_int_v86, timing_int_pm,
timing_int_pm_outer;
int timing_iret_rm, timing_iret_v86, timing_iret_pm,
timing_iret_pm_outer;
int timing_call_rm, timing_call_pm, timing_call_pm_gate,
timing_call_pm_gate_inner;
int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
int timing_misaligned;
void cpu_dynamic_switch(int new_cpu)
static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6;
void
cpu_dynamic_switch(int new_cpu)
{
if (cpu_effective == new_cpu)
return;
@@ -194,16 +219,17 @@ void cpu_dynamic_switch(int new_cpu)
cpu = c;
}
void cpu_set_edx()
void
cpu_set_edx(void)
{
EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].edx_reset;
}
void cpu_set()
void
cpu_set(void)
{
CPU *cpu_s;
if (!machines[machine].cpu[cpu_manufacturer].cpus)
{
/*CPU is invalid, set to default*/
@@ -250,7 +276,7 @@ void cpu_set()
cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles;
else
cpu_rom_prefetch_cycles = cpu_s->rspeed / 1000000;
if (cpu_s->pci_speed)
{
pci_nonburst_time = 4*cpu_s->rspeed / cpu_s->pci_speed;
@@ -261,16 +287,12 @@ void cpu_set()
pci_nonburst_time = 4;
pci_burst_time = 1;
}
pclog("PCI burst=%i nonburst=%i\n", pci_burst_time, pci_nonburst_time);
if (cpu_iscyrix)
io_sethandler(0x0022, 0x0002, cyrix_read, NULL, NULL, cyrix_write, NULL, NULL, NULL);
else
io_removehandler(0x0022, 0x0002, cyrix_read, NULL, NULL, cyrix_write, NULL, NULL, NULL);
pclog("hasfpu - %i\n",hasfpu);
pclog("is486 - %i %i\n",is486,cpu_s->cpu_type);
#ifdef USE_DYNAREC
x86_setopcodes(ops_386, ops_386_0f, dynarec_ops_386, dynarec_ops_386_0f);
#else
@@ -1091,8 +1113,7 @@ void cpu_set()
ccr4 = 0x80;
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
case CPU_K5:
case CPU_5K86:
#ifdef USE_DYNAREC
@@ -1146,10 +1167,8 @@ void cpu_set()
#endif
break;
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
#if defined(DEV_BRANCH) && defined(USE_I686)
case CPU_PENTIUMPRO:
#ifdef USE_DYNAREC
x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f);
@@ -1271,7 +1290,6 @@ void cpu_set()
codegen_timing_set(&codegen_timing_686);
#endif
break;
#endif
#endif
default:
@@ -1294,7 +1312,8 @@ cpu_current_pc(char *bufp)
}
void cpu_CPUID()
void
cpu_CPUID(void)
{
switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
{
@@ -1313,7 +1332,7 @@ void cpu_CPUID()
EDX = CPUID_FPU; /*FPU*/
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_iDX4:
@@ -1331,7 +1350,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_VME;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_Am486SX:
@@ -1348,7 +1367,7 @@ void cpu_CPUID()
EBX = ECX = EDX = 0; /*No FPU*/
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_Am486DX:
@@ -1366,7 +1385,7 @@ void cpu_CPUID()
EDX = CPUID_FPU; /*FPU*/
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_WINCHIP:
@@ -1397,7 +1416,7 @@ void cpu_CPUID()
EDX |= CPUID_MMX;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_PENTIUM:
@@ -1415,11 +1434,10 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
case CPU_K5:
if (!EAX)
{
@@ -1435,7 +1453,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_5K86:
@@ -1487,7 +1505,7 @@ void cpu_CPUID()
EDX = 0x10040120;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
case CPU_K6:
@@ -1549,9 +1567,8 @@ void cpu_CPUID()
EDX = 0x444D416E;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
#endif
#endif
case CPU_PENTIUMMMX:
@@ -1569,7 +1586,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
@@ -1588,7 +1605,7 @@ void cpu_CPUID()
EDX = CPUID_FPU;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
@@ -1607,7 +1624,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_CMPXCHG8B;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
@@ -1626,7 +1643,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
@@ -1646,7 +1663,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
#ifdef DEV_BRANCH
@@ -1669,7 +1686,7 @@ void cpu_CPUID()
{
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
/* case CPU_PENTIUM2:
@@ -1693,7 +1710,7 @@ void cpu_CPUID()
EDX = 0x0C040843;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break; */
case CPU_PENTIUM2D:
@@ -1717,7 +1734,7 @@ void cpu_CPUID()
EDX = 0x0C040844;
}
else
EAX = EBX = ECX = EDX = 0;
EAX = EBX = ECX = EDX = 0;
break;
#endif
#endif
@@ -1759,8 +1776,7 @@ void cpu_RDMSR()
}
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
case CPU_K5:
case CPU_5K86:
case CPU_K6:
@@ -1787,14 +1803,10 @@ void cpu_RDMSR()
EDX = sfmask >> 32;
break;
default:
#ifndef RELEASE_BUILD
pclog("Invalid MSR: %08X\n", ECX);
#endif
x86gpf(NULL, 0);
break;
}
break;
#endif
#endif
case CPU_PENTIUM:
@@ -1941,9 +1953,6 @@ void cpu_RDMSR()
break;
default:
i686_invalid_rdmsr:
#ifndef RELEASE_BUILD
pclog("Invalid MSR: %08X\n", ECX);
#endif
x86gpf(NULL, 0);
break;
}
@@ -1988,8 +1997,8 @@ void cpu_WRMSR()
break;
}
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
case CPU_K5:
case CPU_5K86:
case CPU_K6:
@@ -2012,7 +2021,6 @@ void cpu_WRMSR()
break;
}
break;
#endif
#endif
case CPU_PENTIUM:
@@ -2124,9 +2132,6 @@ void cpu_WRMSR()
break;
default:
i686_invalid_wrmsr:
#ifndef RELEASE_BUILD
pclog("Invalid MSR: %08X\n", ECX);
#endif
x86gpf(NULL, 0);
break;
}
@@ -2202,8 +2207,11 @@ uint8_t cyrix_read(uint16_t addr, void *priv)
return 0xff;
}
void
#ifdef USE_DYNAREC
void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn *dynarec_opcodes_0f)
x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f,
const OpFn *dynarec_opcodes, const OpFn *dynarec_opcodes_0f)
{
x86_opcodes = opcodes;
x86_opcodes_0f = opcodes_0f;
@@ -2211,22 +2219,24 @@ void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn
x86_dynarec_opcodes_0f = dynarec_opcodes_0f;
}
#else
void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f)
x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f)
{
x86_opcodes = opcodes;
x86_opcodes_0f = opcodes_0f;
}
#endif
void cpu_update_waitstates()
void
cpu_update_waitstates(void)
{
cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective];
if (is486)
cpu_prefetch_width = 16;
else
cpu_prefetch_width = cpu_16bitbus ? 2 : 4;
if (cpu_cache_int_enabled)
{
/* Disable prefetch emulation */

351
src/cpu/x86_ops.h
View File

@@ -1,6 +1,41 @@
/* Copyright holders: Sarah Walker, leilei
see COPYING for more details
*/
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Miscellaneous x86 CPU Instructions.
*
* Version: @(#)x86_ops.h 1.0.2 2018/05/05
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef _X86_OPS_H
#define _X86_OPS_H
@@ -11,194 +46,188 @@
typedef int (*OpFn)(uint32_t fetchdat);
#ifdef USE_DYNAREC
void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn *dynarec_opcodes_0f);
void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f,
const OpFn *dynarec_opcodes,
const OpFn *dynarec_opcodes_0f);
extern OpFn *x86_dynarec_opcodes;
extern OpFn *x86_dynarec_opcodes_0f;
extern OpFn *x86_dynarec_opcodes_d8_a16;
extern OpFn *x86_dynarec_opcodes_d8_a32;
extern OpFn *x86_dynarec_opcodes_d9_a16;
extern OpFn *x86_dynarec_opcodes_d9_a32;
extern OpFn *x86_dynarec_opcodes_da_a16;
extern OpFn *x86_dynarec_opcodes_da_a32;
extern OpFn *x86_dynarec_opcodes_db_a16;
extern OpFn *x86_dynarec_opcodes_db_a32;
extern OpFn *x86_dynarec_opcodes_dc_a16;
extern OpFn *x86_dynarec_opcodes_dc_a32;
extern OpFn *x86_dynarec_opcodes_dd_a16;
extern OpFn *x86_dynarec_opcodes_dd_a32;
extern OpFn *x86_dynarec_opcodes_de_a16;
extern OpFn *x86_dynarec_opcodes_de_a32;
extern OpFn *x86_dynarec_opcodes_df_a16;
extern OpFn *x86_dynarec_opcodes_df_a32;
extern OpFn *x86_dynarec_opcodes_REPE;
extern OpFn *x86_dynarec_opcodes_REPNE;
extern const OpFn *x86_dynarec_opcodes;
extern const OpFn *x86_dynarec_opcodes_0f;
extern const OpFn *x86_dynarec_opcodes_d8_a16;
extern const OpFn *x86_dynarec_opcodes_d8_a32;
extern const OpFn *x86_dynarec_opcodes_d9_a16;
extern const OpFn *x86_dynarec_opcodes_d9_a32;
extern const OpFn *x86_dynarec_opcodes_da_a16;
extern const OpFn *x86_dynarec_opcodes_da_a32;
extern const OpFn *x86_dynarec_opcodes_db_a16;
extern const OpFn *x86_dynarec_opcodes_db_a32;
extern const OpFn *x86_dynarec_opcodes_dc_a16;
extern const OpFn *x86_dynarec_opcodes_dc_a32;
extern const OpFn *x86_dynarec_opcodes_dd_a16;
extern const OpFn *x86_dynarec_opcodes_dd_a32;
extern const OpFn *x86_dynarec_opcodes_de_a16;
extern const OpFn *x86_dynarec_opcodes_de_a32;
extern const OpFn *x86_dynarec_opcodes_df_a16;
extern const OpFn *x86_dynarec_opcodes_df_a32;
extern const OpFn *x86_dynarec_opcodes_REPE;
extern const OpFn *x86_dynarec_opcodes_REPNE;
extern OpFn dynarec_ops_286[1024];
extern OpFn dynarec_ops_286_0f[1024];
extern const OpFn dynarec_ops_286[1024];
extern const OpFn dynarec_ops_286_0f[1024];
extern OpFn dynarec_ops_386[1024];
extern OpFn dynarec_ops_386_0f[1024];
extern const OpFn dynarec_ops_386[1024];
extern const OpFn dynarec_ops_386_0f[1024];
extern OpFn dynarec_ops_486_0f[1024];
extern const OpFn dynarec_ops_486_0f[1024];
extern OpFn dynarec_ops_winchip_0f[1024];
extern const OpFn dynarec_ops_winchip_0f[1024];
extern OpFn dynarec_ops_pentium_0f[1024];
extern OpFn dynarec_ops_pentiummmx_0f[1024];
extern OpFn dynarec_ops_c6x86mx_0f[1024];
extern const OpFn dynarec_ops_pentium_0f[1024];
extern const OpFn dynarec_ops_pentiummmx_0f[1024];
extern const OpFn dynarec_ops_c6x86mx_0f[1024];
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
extern OpFn dynarec_ops_k6_0f[1024];
#endif
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
extern const OpFn dynarec_ops_k6_0f[1024];
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
extern OpFn dynarec_ops_pentiumpro_0f[1024];
extern OpFn dynarec_ops_pentium2d_0f[1024];
#endif
#if defined(DEV_BRANCH) && defined(USE_I686)
extern const OpFn dynarec_ops_pentiumpro_0f[1024];
extern const OpFn dynarec_ops_pentium2d_0f[1024];
#endif
extern OpFn dynarec_ops_fpu_287_d9_a16[256];
extern OpFn dynarec_ops_fpu_287_d9_a32[256];
extern OpFn dynarec_ops_fpu_287_da_a16[256];
extern OpFn dynarec_ops_fpu_287_da_a32[256];
extern OpFn dynarec_ops_fpu_287_db_a16[256];
extern OpFn dynarec_ops_fpu_287_db_a32[256];
extern OpFn dynarec_ops_fpu_287_dc_a16[32];
extern OpFn dynarec_ops_fpu_287_dc_a32[32];
extern OpFn dynarec_ops_fpu_287_dd_a16[256];
extern OpFn dynarec_ops_fpu_287_dd_a32[256];
extern OpFn dynarec_ops_fpu_287_de_a16[256];
extern OpFn dynarec_ops_fpu_287_de_a32[256];
extern OpFn dynarec_ops_fpu_287_df_a16[256];
extern OpFn dynarec_ops_fpu_287_df_a32[256];
extern const OpFn dynarec_ops_fpu_287_d9_a16[256];
extern const OpFn dynarec_ops_fpu_287_d9_a32[256];
extern const OpFn dynarec_ops_fpu_287_da_a16[256];
extern const OpFn dynarec_ops_fpu_287_da_a32[256];
extern const OpFn dynarec_ops_fpu_287_db_a16[256];
extern const OpFn dynarec_ops_fpu_287_db_a32[256];
extern const OpFn dynarec_ops_fpu_287_dc_a16[32];
extern const OpFn dynarec_ops_fpu_287_dc_a32[32];
extern const OpFn dynarec_ops_fpu_287_dd_a16[256];
extern const OpFn dynarec_ops_fpu_287_dd_a32[256];
extern const OpFn dynarec_ops_fpu_287_de_a16[256];
extern const OpFn dynarec_ops_fpu_287_de_a32[256];
extern const OpFn dynarec_ops_fpu_287_df_a16[256];
extern const OpFn dynarec_ops_fpu_287_df_a32[256];
extern OpFn dynarec_ops_fpu_d8_a16[32];
extern OpFn dynarec_ops_fpu_d8_a32[32];
extern OpFn dynarec_ops_fpu_d9_a16[256];
extern OpFn dynarec_ops_fpu_d9_a32[256];
extern OpFn dynarec_ops_fpu_da_a16[256];
extern OpFn dynarec_ops_fpu_da_a32[256];
extern OpFn dynarec_ops_fpu_db_a16[256];
extern OpFn dynarec_ops_fpu_db_a32[256];
extern OpFn dynarec_ops_fpu_dc_a16[32];
extern OpFn dynarec_ops_fpu_dc_a32[32];
extern OpFn dynarec_ops_fpu_dd_a16[256];
extern OpFn dynarec_ops_fpu_dd_a32[256];
extern OpFn dynarec_ops_fpu_de_a16[256];
extern OpFn dynarec_ops_fpu_de_a32[256];
extern OpFn dynarec_ops_fpu_df_a16[256];
extern OpFn dynarec_ops_fpu_df_a32[256];
extern OpFn dynarec_ops_nofpu_a16[256];
extern OpFn dynarec_ops_nofpu_a32[256];
extern const OpFn dynarec_ops_fpu_d8_a16[32];
extern const OpFn dynarec_ops_fpu_d8_a32[32];
extern const OpFn dynarec_ops_fpu_d9_a16[256];
extern const OpFn dynarec_ops_fpu_d9_a32[256];
extern const OpFn dynarec_ops_fpu_da_a16[256];
extern const OpFn dynarec_ops_fpu_da_a32[256];
extern const OpFn dynarec_ops_fpu_db_a16[256];
extern const OpFn dynarec_ops_fpu_db_a32[256];
extern const OpFn dynarec_ops_fpu_dc_a16[32];
extern const OpFn dynarec_ops_fpu_dc_a32[32];
extern const OpFn dynarec_ops_fpu_dd_a16[256];
extern const OpFn dynarec_ops_fpu_dd_a32[256];
extern const OpFn dynarec_ops_fpu_de_a16[256];
extern const OpFn dynarec_ops_fpu_de_a32[256];
extern const OpFn dynarec_ops_fpu_df_a16[256];
extern const OpFn dynarec_ops_fpu_df_a32[256];
extern const OpFn dynarec_ops_nofpu_a16[256];
extern const OpFn dynarec_ops_nofpu_a32[256];
extern OpFn dynarec_ops_fpu_686_da_a16[256];
extern OpFn dynarec_ops_fpu_686_da_a32[256];
extern OpFn dynarec_ops_fpu_686_db_a16[256];
extern OpFn dynarec_ops_fpu_686_db_a32[256];
extern OpFn dynarec_ops_fpu_686_df_a16[256];
extern OpFn dynarec_ops_fpu_686_df_a32[256];
extern const OpFn dynarec_ops_fpu_686_da_a16[256];
extern const OpFn dynarec_ops_fpu_686_da_a32[256];
extern const OpFn dynarec_ops_fpu_686_db_a16[256];
extern const OpFn dynarec_ops_fpu_686_db_a32[256];
extern const OpFn dynarec_ops_fpu_686_df_a16[256];
extern const OpFn dynarec_ops_fpu_686_df_a32[256];
extern OpFn dynarec_ops_REPE[1024];
extern OpFn dynarec_ops_REPNE[1024];
extern const OpFn dynarec_ops_REPE[1024];
extern const OpFn dynarec_ops_REPNE[1024];
#else
void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f);
void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f);
#endif
extern OpFn *x86_opcodes;
extern OpFn *x86_opcodes_0f;
extern OpFn *x86_opcodes_d8_a16;
extern OpFn *x86_opcodes_d8_a32;
extern OpFn *x86_opcodes_d9_a16;
extern OpFn *x86_opcodes_d9_a32;
extern OpFn *x86_opcodes_da_a16;
extern OpFn *x86_opcodes_da_a32;
extern OpFn *x86_opcodes_db_a16;
extern OpFn *x86_opcodes_db_a32;
extern OpFn *x86_opcodes_dc_a16;
extern OpFn *x86_opcodes_dc_a32;
extern OpFn *x86_opcodes_dd_a16;
extern OpFn *x86_opcodes_dd_a32;
extern OpFn *x86_opcodes_de_a16;
extern OpFn *x86_opcodes_de_a32;
extern OpFn *x86_opcodes_df_a16;
extern OpFn *x86_opcodes_df_a32;
extern OpFn *x86_opcodes_REPE;
extern OpFn *x86_opcodes_REPNE;
extern const OpFn *x86_opcodes;
extern const OpFn *x86_opcodes_0f;
extern const OpFn *x86_opcodes_d8_a16;
extern const OpFn *x86_opcodes_d8_a32;
extern const OpFn *x86_opcodes_d9_a16;
extern const OpFn *x86_opcodes_d9_a32;
extern const OpFn *x86_opcodes_da_a16;
extern const OpFn *x86_opcodes_da_a32;
extern const OpFn *x86_opcodes_db_a16;
extern const OpFn *x86_opcodes_db_a32;
extern const OpFn *x86_opcodes_dc_a16;
extern const OpFn *x86_opcodes_dc_a32;
extern const OpFn *x86_opcodes_dd_a16;
extern const OpFn *x86_opcodes_dd_a32;
extern const OpFn *x86_opcodes_de_a16;
extern const OpFn *x86_opcodes_de_a32;
extern const OpFn *x86_opcodes_df_a16;
extern const OpFn *x86_opcodes_df_a32;
extern const OpFn *x86_opcodes_REPE;
extern const OpFn *x86_opcodes_REPNE;
extern OpFn ops_286[1024];
extern OpFn ops_286_0f[1024];
extern const OpFn ops_286[1024];
extern const OpFn ops_286_0f[1024];
extern OpFn ops_386[1024];
extern OpFn ops_386_0f[1024];
extern const OpFn ops_386[1024];
extern const OpFn ops_386_0f[1024];
extern OpFn ops_486_0f[1024];
extern const OpFn ops_486_0f[1024];
extern OpFn ops_winchip_0f[1024];
extern const OpFn ops_winchip_0f[1024];
extern OpFn ops_pentium_0f[1024];
extern OpFn ops_pentiummmx_0f[1024];
extern const OpFn ops_pentium_0f[1024];
extern const OpFn ops_pentiummmx_0f[1024];
extern OpFn ops_c6x86mx_0f[1024];
extern const OpFn ops_c6x86mx_0f[1024];
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
extern OpFn ops_k6_0f[1024];
#endif
#if defined(DEV_BRANCH) && defined(USE_AMD_K)
extern const OpFn ops_k6_0f[1024];
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
extern OpFn ops_pentiumpro_0f[1024];
extern OpFn ops_pentium2d_0f[1024];
#endif
#if defined(DEV_BRANCH) && defined(USE_I686)
extern const OpFn ops_pentiumpro_0f[1024];
extern const OpFn ops_pentium2d_0f[1024];
#endif
extern OpFn ops_fpu_287_d9_a16[256];
extern OpFn ops_fpu_287_d9_a32[256];
extern OpFn ops_fpu_287_da_a16[256];
extern OpFn ops_fpu_287_da_a32[256];
extern OpFn ops_fpu_287_db_a16[256];
extern OpFn ops_fpu_287_db_a32[256];
extern OpFn ops_fpu_287_dc_a16[32];
extern OpFn ops_fpu_287_dc_a32[32];
extern OpFn ops_fpu_287_dd_a16[256];
extern OpFn ops_fpu_287_dd_a32[256];
extern OpFn ops_fpu_287_de_a16[256];
extern OpFn ops_fpu_287_de_a32[256];
extern OpFn ops_fpu_287_df_a16[256];
extern OpFn ops_fpu_287_df_a32[256];
extern const OpFn ops_fpu_287_d9_a16[256];
extern const OpFn ops_fpu_287_d9_a32[256];
extern const OpFn ops_fpu_287_da_a16[256];
extern const OpFn ops_fpu_287_da_a32[256];
extern const OpFn ops_fpu_287_db_a16[256];
extern const OpFn ops_fpu_287_db_a32[256];
extern const OpFn ops_fpu_287_dc_a16[32];
extern const OpFn ops_fpu_287_dc_a32[32];
extern const OpFn ops_fpu_287_dd_a16[256];
extern const OpFn ops_fpu_287_dd_a32[256];
extern const OpFn ops_fpu_287_de_a16[256];
extern const OpFn ops_fpu_287_de_a32[256];
extern const OpFn ops_fpu_287_df_a16[256];
extern const OpFn ops_fpu_287_df_a32[256];
extern OpFn ops_fpu_d8_a16[32];
extern OpFn ops_fpu_d8_a32[32];
extern OpFn ops_fpu_d9_a16[256];
extern OpFn ops_fpu_d9_a32[256];
extern OpFn ops_fpu_da_a16[256];
extern OpFn ops_fpu_da_a32[256];
extern OpFn ops_fpu_db_a16[256];
extern OpFn ops_fpu_db_a32[256];
extern OpFn ops_fpu_dc_a16[32];
extern OpFn ops_fpu_dc_a32[32];
extern OpFn ops_fpu_dd_a16[256];
extern OpFn ops_fpu_dd_a32[256];
extern OpFn ops_fpu_de_a16[256];
extern OpFn ops_fpu_de_a32[256];
extern OpFn ops_fpu_df_a16[256];
extern OpFn ops_fpu_df_a32[256];
extern OpFn ops_nofpu_a16[256];
extern OpFn ops_nofpu_a32[256];
extern const OpFn ops_fpu_d8_a16[32];
extern const OpFn ops_fpu_d8_a32[32];
extern const OpFn ops_fpu_d9_a16[256];
extern const OpFn ops_fpu_d9_a32[256];
extern const OpFn ops_fpu_da_a16[256];
extern const OpFn ops_fpu_da_a32[256];
extern const OpFn ops_fpu_db_a16[256];
extern const OpFn ops_fpu_db_a32[256];
extern const OpFn ops_fpu_dc_a16[32];
extern const OpFn ops_fpu_dc_a32[32];
extern const OpFn ops_fpu_dd_a16[256];
extern const OpFn ops_fpu_dd_a32[256];
extern const OpFn ops_fpu_de_a16[256];
extern const OpFn ops_fpu_de_a32[256];
extern const OpFn ops_fpu_df_a16[256];
extern const OpFn ops_fpu_df_a32[256];
extern const OpFn ops_nofpu_a16[256];
extern const OpFn ops_nofpu_a32[256];
extern OpFn ops_fpu_686_da_a16[256];
extern OpFn ops_fpu_686_da_a32[256];
extern OpFn ops_fpu_686_db_a16[256];
extern OpFn ops_fpu_686_db_a32[256];
extern OpFn ops_fpu_686_df_a16[256];
extern OpFn ops_fpu_686_df_a32[256];
extern const OpFn ops_fpu_686_da_a16[256];
extern const OpFn ops_fpu_686_da_a32[256];
extern const OpFn ops_fpu_686_db_a16[256];
extern const OpFn ops_fpu_686_db_a32[256];
extern const OpFn ops_fpu_686_df_a16[256];
extern const OpFn ops_fpu_686_df_a32[256];
extern OpFn ops_REPE[1024];
extern OpFn ops_REPNE[1024];
extern const OpFn ops_REPE[1024];
extern const OpFn ops_REPNE[1024];
#endif /*_X86_OPS_H*/

118
src/cpu/x86seg.c
View File

@@ -8,20 +8,22 @@
*
* x86 CPU segment emulation.
*
* Version: @(#)x86seg.c 1.0.6 2017/11/24
* Version: @(#)x86seg.c 1.0.7 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "cpu.h"
#include "../device.h"
@@ -58,7 +60,27 @@ void pmodeint(int num, int soft);
/*NOT PRESENT is INT 0B
GPF is INT 0D*/
FILE *pclogf;
#ifdef ENABLE_X86SEG_LOG
int x86seg_do_log = ENABLE_X86SEG_LOG;
#endif
static void
x86seg_log(const char *fmt, ...)
{
#ifdef ENABLE_X86SEG_LOG
va_list ap;
if (x86seg_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
void x86abort(const char *format, ...)
{
va_list ap;
@@ -378,8 +400,8 @@ void loadseg(uint16_t seg, x86seg *s)
}
else if (s!=&_cs)
{
if (output) pclog("Seg data %04X %04X %04X %04X\n", segdat[0], segdat[1], segdat[2], segdat[3]);
if (output) pclog("Seg type %03X\n",segdat[2]&0x1F00);
x86seg_log("Seg data %04X %04X %04X %04X\n", segdat[0], segdat[1], segdat[2], segdat[3]);
x86seg_log("Seg type %03X\n",segdat[2]&0x1F00);
switch ((segdat[2]>>8)&0x1F)
{
case 0x10: case 0x11: case 0x12: case 0x13: /*Data segments*/
@@ -467,7 +489,7 @@ void loadcs(uint16_t seg)
{
uint16_t segdat[4];
uint32_t addr;
if (output) pclog("Load CS %04X\n",seg);
x86seg_log("Load CS %04X\n",seg);
if (msw&1 && !(eflags&VM_FLAG))
{
if (!(seg&~3))
@@ -601,7 +623,7 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc)
segdat[1]=readmemw(0,addr+2);
segdat[2]=readmemw(0,addr+4);
segdat[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) return;
if (output) pclog("%04X %04X %04X %04X\n",segdat[0],segdat[1],segdat[2],segdat[3]);
x86seg_log("%04X %04X %04X %04X\n",segdat[0],segdat[1],segdat[2],segdat[3]);
if (segdat[2]&0x1000) /*Normal code segment*/
{
if (!(segdat[2]&0x400)) /*Not conforming*/
@@ -864,7 +886,7 @@ void loadcscall(uint16_t seg)
if (msw&1 && !(eflags&VM_FLAG))
{
if (csout) pclog("Protected mode CS load! %04X\n",seg);
if (csout) x86seg_log("Protected mode CS load! %04X\n",seg);
if (!(seg&~3))
{
x86gpf(NULL,0);
@@ -898,7 +920,7 @@ void loadcscall(uint16_t seg)
newpc=segdat[0];
if (type&0x800) newpc|=segdat[3]<<16;
if (csout) pclog("Code seg call - %04X - %04X %04X %04X\n",seg,segdat[0],segdat[1],segdat[2]);
if (csout) x86seg_log("Code seg call - %04X - %04X %04X %04X\n",seg,segdat[0],segdat[1],segdat[2]);
if (segdat[2]&0x1000)
{
if (!(segdat[2]&0x400)) /*Not conforming*/
@@ -943,18 +965,18 @@ void loadcscall(uint16_t seg)
CS=seg;
do_seg_load(&_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
if (csout) pclog("Complete\n");
if (csout) x86seg_log("Complete\n");
cycles -= timing_call_pm;
}
else
{
type=segdat[2]&0xF00;
if (csout) pclog("Type %03X\n",type);
if (csout) x86seg_log("Type %03X\n",type);
switch (type)
{
case 0x400: /*Call gate*/
case 0xC00: /*386 Call gate*/
if (output) pclog("Callgate %08X\n", cpu_state.pc);
x86seg_log("Callgate %08X\n", cpu_state.pc);
cgate32=(type&0x800);
cgate16=!cgate32;
oldcs=CS;
@@ -971,13 +993,13 @@ void loadcscall(uint16_t seg)
}
if (!(segdat[2]&0x8000))
{
if (output) pclog("Call gate not present %04X\n",seg);
x86seg_log("Call gate not present %04X\n",seg);
x86np("Call gate not present\n", seg & 0xfffc);
return;
}
seg2=segdat[1];
if (output) pclog("New address : %04X:%08X\n", seg2, newpc);
x86seg_log("New address : %04X:%08X\n", seg2, newpc);
if (!(seg2&~3))
{
@@ -1009,7 +1031,7 @@ void loadcscall(uint16_t seg)
segdat[2]=readmemw(0,addr+4);
segdat[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) return;
if (output) pclog("Code seg2 call - %04X - %04X %04X %04X\n",seg2,segdat[0],segdat[1],segdat[2]);
x86seg_log("Code seg2 call - %04X - %04X %04X %04X\n",seg2,segdat[0],segdat[1],segdat[2]);
if (DPL > CPL)
{
@@ -1018,7 +1040,7 @@ void loadcscall(uint16_t seg)
}
if (!(segdat[2]&0x8000))
{
if (output) pclog("Call gate CS not present %04X\n",seg2);
x86seg_log("Call gate CS not present %04X\n",seg2);
x86np("Call gate CS not present", seg2 & 0xfffc);
return;
}
@@ -1048,7 +1070,7 @@ void loadcscall(uint16_t seg)
}
cpl_override=0;
if (cpu_state.abrt) return;
if (output) pclog("New stack %04X:%08X\n",newss,newsp);
x86seg_log("New stack %04X:%08X\n",newss,newsp);
if (!(newss&~3))
{
x86ts(NULL,newss&~3);
@@ -1076,12 +1098,12 @@ void loadcscall(uint16_t seg)
addr+=gdt.base;
}
cpl_override=1;
if (output) pclog("Read stack seg\n");
x86seg_log("Read stack seg\n");
segdat2[0]=readmemw(0,addr);
segdat2[1]=readmemw(0,addr+2);
segdat2[2]=readmemw(0,addr+4);
segdat2[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) return;
if (output) pclog("Read stack seg done!\n");
x86seg_log("Read stack seg done!\n");
if (((newss & 3) != DPL) || (DPL2 != DPL))
{
x86ts(NULL,newss&~3);
@@ -1105,7 +1127,7 @@ void loadcscall(uint16_t seg)
do_seg_load(&_ss, segdat2);
if (output) pclog("Set access 1\n");
x86seg_log("Set access 1\n");
#ifdef SEL_ACCESSED
cpl_override = 1;
@@ -1119,7 +1141,7 @@ void loadcscall(uint16_t seg)
set_use32(segdat[3]&0x40);
cpu_state.pc=newpc;
if (output) pclog("Set access 2\n");
x86seg_log("Set access 2\n");
#ifdef CS_ACCESSED
cpl_override = 1;
@@ -1127,7 +1149,7 @@ void loadcscall(uint16_t seg)
cpl_override = 0;
#endif
if (output) pclog("Type %04X\n",type);
x86seg_log("Type %04X\n",type);
if (type==0xC00)
{
PUSHL(oldss);
@@ -1155,9 +1177,9 @@ void loadcscall(uint16_t seg)
}
else
{
if (output) pclog("Stack %04X\n",SP);
x86seg_log("Stack %04X\n",SP);
PUSHW(oldss);
if (output) pclog("Write SS to %04X:%04X\n",SS,SP);
x86seg_log("Write SS to %04X:%04X\n",SS,SP);
PUSHW(oldsp2);
if (cpu_state.abrt)
{
@@ -1165,14 +1187,14 @@ void loadcscall(uint16_t seg)
ESP = oldsp2;
return;
}
if (output) pclog("Write SP to %04X:%04X\n",SS,SP);
x86seg_log("Write SP to %04X:%04X\n",SS,SP);
if (count)
{
while (count)
{
count--;
tempw=readmemw(oldssbase,(oldsp&0xFFFF)+(count*2));
if (output) pclog("PUSH %04X\n",tempw);
x86seg_log("PUSH %04X\n",tempw);
PUSHW(tempw);
if (cpu_state.abrt)
{
@@ -1246,7 +1268,7 @@ void pmoderetf(int is32, uint16_t off)
uint32_t addr, oaddr;
uint16_t segdat[4],segdat2[4],seg,newss;
uint32_t oldsp=ESP;
if (output) pclog("RETF %i %04X:%04X %08X %04X\n",is32,CS,cpu_state.pc,cr0,eflags);
x86seg_log("RETF %i %04X:%04X %08X %04X\n",is32,CS,cpu_state.pc,cr0,eflags);
if (is32)
{
newpc=POPL();
@@ -1254,12 +1276,12 @@ void pmoderetf(int is32, uint16_t off)
}
else
{
if (output) pclog("PC read from %04X:%04X\n",SS,SP);
x86seg_log("PC read from %04X:%04X\n",SS,SP);
newpc=POPW();
if (output) pclog("CS read from %04X:%04X\n",SS,SP);
x86seg_log("CS read from %04X:%04X\n",SS,SP);
seg=POPW(); if (cpu_state.abrt) return;
}
if (output) pclog("Return to %04X:%08X\n",seg,newpc);
x86seg_log("Return to %04X:%08X\n",seg,newpc);
if ((seg&3)<CPL)
{
ESP=oldsp;
@@ -1297,14 +1319,14 @@ void pmoderetf(int is32, uint16_t off)
segdat[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) { ESP=oldsp; return; }
oaddr = addr;
if (output) pclog("CPL %i RPL %i %i\n",CPL,seg&3,is32);
x86seg_log("CPL %i RPL %i %i\n",CPL,seg&3,is32);
if (stack32) ESP+=off;
else SP+=off;
if (CPL==(seg&3))
{
if (output) pclog("RETF CPL = RPL %04X\n", segdat[2]);
x86seg_log("RETF CPL = RPL %04X\n", segdat[2]);
switch (segdat[2]&0x1F00)
{
case 0x1800: case 0x1900: case 0x1A00: case 0x1B00: /*Non-conforming*/
@@ -1362,7 +1384,7 @@ void pmoderetf(int is32, uint16_t off)
x86gpf(NULL,seg&~3);
return;
}
if (output) pclog("RETF non-conforming, %i %i\n",seg&3, DPL);
x86seg_log("RETF non-conforming, %i %i\n",seg&3, DPL);
break;
case 0x1C00: case 0x1D00: case 0x1E00: case 0x1F00: /*Conforming*/
if ((seg&3) < DPL)
@@ -1371,7 +1393,7 @@ void pmoderetf(int is32, uint16_t off)
x86gpf(NULL,seg&~3);
return;
}
if (output) pclog("RETF conforming, %i %i\n",seg&3, DPL);
x86seg_log("RETF conforming, %i %i\n",seg&3, DPL);
break;
default:
ESP=oldsp;
@@ -1391,12 +1413,12 @@ void pmoderetf(int is32, uint16_t off)
}
else
{
if (output) pclog("SP read from %04X:%04X\n",SS,SP);
x86seg_log("SP read from %04X:%04X\n",SS,SP);
newsp=POPW();
if (output) pclog("SS read from %04X:%04X\n",SS,SP);
x86seg_log("SS read from %04X:%04X\n",SS,SP);
newss=POPW(); if (cpu_state.abrt) return;
}
if (output) pclog("Read new stack : %04X:%04X (%08X)\n", newss, newsp, ldt.base);
x86seg_log("Read new stack : %04X:%04X (%08X)\n", newss, newsp, ldt.base);
if (!(newss&~3))
{
ESP=oldsp;
@@ -1429,7 +1451,7 @@ void pmoderetf(int is32, uint16_t off)
segdat2[1]=readmemw(0,addr+2);
segdat2[2]=readmemw(0,addr+4);
segdat2[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) { ESP=oldsp; return; }
if (output) pclog("Segment data %04X %04X %04X %04X\n", segdat2[0], segdat2[1], segdat2[2], segdat2[3]);
x86seg_log("Segment data %04X %04X %04X %04X\n", segdat2[0], segdat2[1], segdat2[2], segdat2[3]);
if ((newss & 3) != (seg & 3))
{
ESP=oldsp;
@@ -1508,7 +1530,7 @@ void pmodeint(int num, int soft)
if (eflags&VM_FLAG && IOPL!=3 && soft)
{
if (output) pclog("V86 banned int\n");
x86seg_log("V86 banned int\n");
x86gpf(NULL,0);
return;
}
@@ -1529,7 +1551,7 @@ void pmodeint(int num, int soft)
{
x86gpf(NULL,(num*8)+2+((soft)?0:1));
}
if (output) pclog("addr >= IDT.limit\n");
x86seg_log("addr >= IDT.limit\n");
return;
}
addr+=idt.base;
@@ -1537,10 +1559,10 @@ void pmodeint(int num, int soft)
segdat[0]=readmemw(0,addr);
segdat[1]=readmemw(2,addr);
segdat[2]=readmemw(4,addr);
segdat[3]=readmemw(6,addr); cpl_override=0; if (cpu_state.abrt) { /* pclog("Abrt reading from %08X\n",addr); */ return; }
segdat[3]=readmemw(6,addr); cpl_override=0; if (cpu_state.abrt) { /* x86seg_log("Abrt reading from %08X\n",addr); */ return; }
oaddr = addr;
if (output) pclog("Addr %08X seg %04X %04X %04X %04X\n",addr,segdat[0],segdat[1],segdat[2],segdat[3]);
x86seg_log("Addr %08X seg %04X %04X %04X %04X\n",addr,segdat[0],segdat[1],segdat[2],segdat[3]);
if (!(segdat[2]&0x1F00))
{
x86gpf(NULL,(num*8)+2);
@@ -1683,7 +1705,7 @@ void pmodeint(int num, int soft)
cpl_override = 0;
#endif
if (output) pclog("New stack %04X:%08X\n",SS,ESP);
x86seg_log("New stack %04X:%08X\n",SS,ESP);
cpl_override=1;
if (type>=0x800)
{
@@ -1868,7 +1890,7 @@ void pmodeiret(int is32)
addr=seg&~7;
if (seg&4)
{
pclog("TS LDT %04X %04X IRET\n",seg,gdt.limit);
x86seg_log("TS LDT %04X %04X IRET\n",seg,gdt.limit);
x86ts(NULL,seg&~3);
return;
}
@@ -2032,7 +2054,7 @@ void pmodeiret(int is32)
else /*Return to outer level*/
{
oaddr = addr;
if (output) pclog("Outer level\n");
x86seg_log("Outer level\n");
if (is32)
{
newsp=POPL();
@@ -2044,7 +2066,7 @@ void pmodeiret(int is32)
newss=POPW(); if (cpu_state.abrt) { ESP = oldsp; return; }
}
if (output) pclog("IRET load stack %04X:%04X\n",newss,newsp);
x86seg_log("IRET load stack %04X:%04X\n",newss,newsp);
if (!(newss&~3))
{

190
src/cpu/x87_ops.h
View File

@@ -1,25 +1,48 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the 86Box distribution.
* This file is part of the VARCem Project.
*
* x87 FPU instructions core.
*
* Version: @(#)x87_ops.h 1.0.2 2018/04/05
* Version: @(#)x87_ops.h 1.0.5 2018/05/05
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
* leilei,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 leilei.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <math.h>
#include <fenv.h>
#ifdef _MSC_VER
# include <intrin.h>
#endif
#define fplog 0
@@ -208,7 +231,7 @@ static __inline void x87_st80(double d)
test.begin = (((int16_t)sign80)<<15)| (int16_t)exp80final;
test.eind.ll = mant80final;
writememl(easeg,cpu_state.eaaddr,test.eind.ll);
writememl(easeg,cpu_state.eaaddr,test.eind.ll & 0xffffffff);
writememl(easeg,cpu_state.eaaddr+4,test.eind.ll>>32);
writememw(easeg,cpu_state.eaaddr+8,test.begin);
}
@@ -260,14 +283,14 @@ static __inline void x87_stmmx(MMX_REG r)
static __inline uint16_t x87_compare(double a, double b)
{
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _WIN32
uint32_t out;
uint32_t result;
if (!is386)
{
if (((a == INFINITY) || (a == -INFINITY)) && ((b == INFINITY) || (b == -INFINITY)))
{
/* pclog("Comparing infinity\n"); */
#ifndef _MSC_VER
__asm volatile ("" : : : "memory");
__asm(
@@ -276,14 +299,26 @@ static __inline uint16_t x87_compare(double a, double b)
"fclex\n"
"fcompp\n"
"fnstsw %0\n"
: "=m" (out)
: "=m" (result)
: "m" (a), "m" (a)
);
#else
_ReadWriteBarrier();
__asm
{
fld a
fld a
fclex
fcompp
fnstsw result
}
#endif
return out & (C0|C2|C3);
return result & (C0|C2|C3);
}
}
#ifndef _MSC_VER
/* Memory barrier, to force GCC to write to the input parameters
* before the compare rather than after */
__asm volatile ("" : : : "memory");
@@ -294,11 +329,22 @@ static __inline uint16_t x87_compare(double a, double b)
"fclex\n"
"fcompp\n"
"fnstsw %0\n"
: "=m" (out)
: "=m" (result)
: "m" (a), "m" (b)
);
#else
_ReadWriteBarrier();
_asm
{
fld b
fld a
fclex
fcompp
fnstsw result
}
#endif
return out & (C0|C2|C3);
return result & (C0|C2|C3);
#else
/* Generic C version is known to give incorrect results in some
* situations, eg comparison of infinity (Unreal) */
@@ -308,32 +354,33 @@ static __inline uint16_t x87_compare(double a, double b)
{
if (((a == INFINITY) || (a == -INFINITY)) && ((b == INFINITY) || (b == -INFINITY)))
{
out |= C3;
return out;
result |= C3;
return result;
}
if (a == b)
out |= C3;
result |= C3;
else if (a < b)
out |= C0;
result |= C0;
}
else
{
if (a == b)
out |= C3;
result |= C3;
else if (a < b)
out |= C0;
result |= C0;
}
return out;
return result;
#endif
}
static __inline uint16_t x87_ucompare(double a, double b)
{
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _WIN32
uint32_t out;
uint32_t result;
#ifndef _MSC_VER
/* Memory barrier, to force GCC to write to the input parameters
* before the compare rather than after */
__asm volatile ("" : : : "memory");
@@ -344,22 +391,33 @@ static __inline uint16_t x87_ucompare(double a, double b)
"fclex\n"
"fucompp\n"
"fnstsw %0\n"
: "=m" (out)
: "=m" (result)
: "m" (a), "m" (b)
);
#else
_ReadWriteBarrier();
_asm
{
fld b
fld a
fclex
fcompp
fnstsw result
}
#endif
return out & (C0|C2|C3);
return result & (C0|C2|C3);
#else
/* Generic C version is known to give incorrect results in some
* situations, eg comparison of infinity (Unreal) */
uint32_t out = 0;
uint32_t result = 0;
if (a == b)
out |= C3;
result |= C3;
else if (a < b)
out |= C0;
result |= C0;
return out;
return result;
#endif
}
@@ -435,14 +493,14 @@ static int FPU_ILLEGAL_a32(uint32_t fetchdat)
#define ILLEGAL_a16 FPU_ILLEGAL_a16
#define ILLEGAL_a32 FPU_ILLEGAL_a32
OpFn OP_TABLE(fpu_d8_a16)[32] =
const OpFn OP_TABLE(fpu_d8_a16)[32] =
{
opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16,
opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16,
opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16,
opFADD, opFMUL, opFCOM, opFCOMP, opFSUB, opFSUBR, opFDIV, opFDIVR
};
OpFn OP_TABLE(fpu_d8_a32)[32] =
const OpFn OP_TABLE(fpu_d8_a32)[32] =
{
opFADDs_a32, opFMULs_a32, opFCOMs_a32, opFCOMPs_a32, opFSUBs_a32, opFSUBRs_a32, opFDIVs_a32, opFDIVRs_a32,
opFADDs_a32, opFMULs_a32, opFCOMs_a32, opFCOMPs_a32, opFSUBs_a32, opFSUBRs_a32, opFDIVs_a32, opFDIVRs_a32,
@@ -450,7 +508,7 @@ OpFn OP_TABLE(fpu_d8_a32)[32] =
opFADD, opFMUL, opFCOM, opFCOMP, opFSUB, opFSUBR, opFDIV, opFDIVR
};
OpFn OP_TABLE(fpu_287_d9_a16)[256] =
const OpFn OP_TABLE(fpu_287_d9_a16)[256] =
{
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -489,7 +547,7 @@ OpFn OP_TABLE(fpu_287_d9_a16)[256] =
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
};
OpFn OP_TABLE(fpu_287_d9_a32)[256] =
const OpFn OP_TABLE(fpu_287_d9_a32)[256] =
{
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -528,7 +586,7 @@ OpFn OP_TABLE(fpu_287_d9_a32)[256] =
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
};
OpFn OP_TABLE(fpu_d9_a16)[256] =
const OpFn OP_TABLE(fpu_d9_a16)[256] =
{
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -567,7 +625,7 @@ OpFn OP_TABLE(fpu_d9_a16)[256] =
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
};
OpFn OP_TABLE(fpu_d9_a32)[256] =
const OpFn OP_TABLE(fpu_d9_a32)[256] =
{
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -606,7 +664,7 @@ OpFn OP_TABLE(fpu_d9_a32)[256] =
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
};
OpFn OP_TABLE(fpu_287_da_a16)[256] =
const OpFn OP_TABLE(fpu_287_da_a16)[256] =
{
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16,
@@ -644,7 +702,7 @@ OpFn OP_TABLE(fpu_287_da_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_287_da_a32)[256] =
const OpFn OP_TABLE(fpu_287_da_a32)[256] =
{
opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32,
opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32,
@@ -683,7 +741,7 @@ OpFn OP_TABLE(fpu_287_da_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_da_a16)[256] =
const OpFn OP_TABLE(fpu_da_a16)[256] =
{
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16,
@@ -721,7 +779,7 @@ OpFn OP_TABLE(fpu_da_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_da_a32)[256] =
const OpFn OP_TABLE(fpu_da_a32)[256] =
{
opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32,
opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32,
@@ -760,7 +818,7 @@ OpFn OP_TABLE(fpu_da_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_686_da_a16)[256] =
const OpFn OP_TABLE(fpu_686_da_a16)[256] =
{
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16,
@@ -798,7 +856,7 @@ OpFn OP_TABLE(fpu_686_da_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_686_da_a32)[256] =
const OpFn OP_TABLE(fpu_686_da_a32)[256] =
{
opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32,
opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32,
@@ -837,7 +895,7 @@ OpFn OP_TABLE(fpu_686_da_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_287_db_a16)[256] =
const OpFn OP_TABLE(fpu_287_db_a16)[256] =
{
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -875,7 +933,7 @@ OpFn OP_TABLE(fpu_287_db_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_287_db_a32)[256] =
const OpFn OP_TABLE(fpu_287_db_a32)[256] =
{
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -914,7 +972,7 @@ OpFn OP_TABLE(fpu_287_db_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_db_a16)[256] =
const OpFn OP_TABLE(fpu_db_a16)[256] =
{
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -952,7 +1010,7 @@ OpFn OP_TABLE(fpu_db_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_db_a32)[256] =
const OpFn OP_TABLE(fpu_db_a32)[256] =
{
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -991,7 +1049,7 @@ OpFn OP_TABLE(fpu_db_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_686_db_a16)[256] =
const OpFn OP_TABLE(fpu_686_db_a16)[256] =
{
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1029,7 +1087,7 @@ OpFn OP_TABLE(fpu_686_db_a16)[256] =
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_686_db_a32)[256] =
const OpFn OP_TABLE(fpu_686_db_a32)[256] =
{
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1068,14 +1126,14 @@ OpFn OP_TABLE(fpu_686_db_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_287_dc_a16)[32] =
const OpFn OP_TABLE(fpu_287_dc_a16)[32] =
{
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDr, opFMULr, ILLEGAL_a16, ILLEGAL_a16, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr
};
OpFn OP_TABLE(fpu_287_dc_a32)[32] =
const OpFn OP_TABLE(fpu_287_dc_a32)[32] =
{
opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32,
opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32,
@@ -1083,14 +1141,14 @@ OpFn OP_TABLE(fpu_287_dc_a32)[32] =
opFADDr, opFMULr, ILLEGAL_a32, ILLEGAL_a32, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr
};
OpFn OP_TABLE(fpu_dc_a16)[32] =
const OpFn OP_TABLE(fpu_dc_a16)[32] =
{
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
opFADDr, opFMULr, opFCOM, opFCOMP, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr
};
OpFn OP_TABLE(fpu_dc_a32)[32] =
const OpFn OP_TABLE(fpu_dc_a32)[32] =
{
opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32,
opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32,
@@ -1098,7 +1156,7 @@ OpFn OP_TABLE(fpu_dc_a32)[32] =
opFADDr, opFMULr, opFCOM, opFCOMP, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr
};
OpFn OP_TABLE(fpu_287_dd_a16)[256] =
const OpFn OP_TABLE(fpu_287_dd_a16)[256] =
{
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1136,7 +1194,7 @@ OpFn OP_TABLE(fpu_287_dd_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_287_dd_a32)[256] =
const OpFn OP_TABLE(fpu_287_dd_a32)[256] =
{
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1175,7 +1233,7 @@ OpFn OP_TABLE(fpu_287_dd_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_dd_a16)[256] =
const OpFn OP_TABLE(fpu_dd_a16)[256] =
{
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1213,7 +1271,7 @@ OpFn OP_TABLE(fpu_dd_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_dd_a32)[256] =
const OpFn OP_TABLE(fpu_dd_a32)[256] =
{
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1252,7 +1310,7 @@ OpFn OP_TABLE(fpu_dd_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_287_de_a16)[256] =
const OpFn OP_TABLE(fpu_287_de_a16)[256] =
{
opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16,
opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16,
@@ -1291,7 +1349,7 @@ OpFn OP_TABLE(fpu_287_de_a16)[256] =
opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP,
};
OpFn OP_TABLE(fpu_287_de_a32)[256] =
const OpFn OP_TABLE(fpu_287_de_a32)[256] =
{
opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32,
opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32,
@@ -1330,7 +1388,7 @@ OpFn OP_TABLE(fpu_287_de_a32)[256] =
opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP,
};
OpFn OP_TABLE(fpu_de_a16)[256] =
const OpFn OP_TABLE(fpu_de_a16)[256] =
{
opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16,
opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16,
@@ -1369,7 +1427,7 @@ OpFn OP_TABLE(fpu_de_a16)[256] =
opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP,
};
OpFn OP_TABLE(fpu_de_a32)[256] =
const OpFn OP_TABLE(fpu_de_a32)[256] =
{
opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32,
opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32,
@@ -1408,7 +1466,7 @@ OpFn OP_TABLE(fpu_de_a32)[256] =
opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP,
};
OpFn OP_TABLE(fpu_287_df_a16)[256] =
const OpFn OP_TABLE(fpu_287_df_a16)[256] =
{
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1446,7 +1504,7 @@ OpFn OP_TABLE(fpu_287_df_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_287_df_a32)[256] =
const OpFn OP_TABLE(fpu_287_df_a32)[256] =
{
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1485,7 +1543,7 @@ OpFn OP_TABLE(fpu_287_df_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_df_a16)[256] =
const OpFn OP_TABLE(fpu_df_a16)[256] =
{
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1523,7 +1581,7 @@ OpFn OP_TABLE(fpu_df_a16)[256] =
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_df_a32)[256] =
const OpFn OP_TABLE(fpu_df_a32)[256] =
{
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1562,7 +1620,7 @@ OpFn OP_TABLE(fpu_df_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(fpu_686_df_a16)[256] =
const OpFn OP_TABLE(fpu_686_df_a16)[256] =
{
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
@@ -1600,7 +1658,7 @@ OpFn OP_TABLE(fpu_686_df_a16)[256] =
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
};
OpFn OP_TABLE(fpu_686_df_a32)[256] =
const OpFn OP_TABLE(fpu_686_df_a32)[256] =
{
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
@@ -1639,7 +1697,7 @@ OpFn OP_TABLE(fpu_686_df_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
OpFn OP_TABLE(nofpu_a16)[256] =
const OpFn OP_TABLE(nofpu_a16)[256] =
{
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,
@@ -1677,7 +1735,7 @@ OpFn OP_TABLE(nofpu_a16)[256] =
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,
};
OpFn OP_TABLE(nofpu_a32)[256] =
const OpFn OP_TABLE(nofpu_a32)[256] =
{
op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32,
op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32,

30
src/device.c
View File

@@ -9,7 +9,7 @@
* Implementation of the generic device interface to handle
* all devices attached to the emulator.
*
* Version: @(#)device.c 1.0.7 2018/04/26
* Version: @(#)device.c 1.0.8 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -37,10 +37,12 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "cpu/cpu.h"
#include "config.h"
@@ -57,6 +59,26 @@ static device_t *devices[DEVICE_MAX];
static device_t *device_current;
#ifdef ENABLE_DEVICE_LOG
int device_do_log = ENABLE_DEVICE_LOG;
#endif
static void
device_log(const char *format, ...)
{
#ifdef ENABLE_DEVICE_LOG
va_list ap;
if (device_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
void
device_init(void)
{
@@ -72,7 +94,7 @@ device_add(const device_t *d)
for (c=0; c<256; c++) {
if (devices[c] == (device_t *)d) {
pclog("DEVICE: device already exists!\n");
device_log("DEVICE: device already exists!\n");
return(NULL);
}
if (devices[c] == NULL) break;
@@ -88,9 +110,9 @@ device_add(const device_t *d)
priv = d->init(d);
if (priv == NULL) {
if (d->name)
pclog("DEVICE: device '%s' init failed\n", d->name);
device_log("DEVICE: device '%s' init failed\n", d->name);
else
pclog("DEVICE: device init failed\n");
device_log("DEVICE: device init failed\n");
device_priv[c] = NULL;

30
src/disk/hdc.c
View File

@@ -8,7 +8,7 @@
*
* Common code to handle all sorts of disk controllers.
*
* Version: @(#)hdc.c 1.0.14 2018/04/26
* Version: @(#)hdc.c 1.0.15 2018/04/29
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -16,10 +16,12 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../machine/machine.h"
#include "../device.h"
@@ -32,6 +34,26 @@ char *hdc_name; /* configured HDC name */
int hdc_current;
#ifdef ENABLE_HDC_LOG
int hdc_do_log = ENABLE_HDC_LOG;
#endif
static void
hdc_log(const char *fmt, ...)
{
#ifdef ENABLE_HDC_LOG
va_list ap;
if (hdc_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void *
null_init(const device_t *info)
{
@@ -142,7 +164,7 @@ hdc_init(char *name)
{
int c;
pclog("HDC: initializing..\n");
hdc_log("HDC: initializing..\n");
for (c = 0; controllers[c].device; c++) {
if (! strcmp(name, (char *) controllers[c].internal_name)) {
@@ -160,7 +182,7 @@ hdc_init(char *name)
void
hdc_reset(void)
{
pclog("HDC: reset(current=%d, internal=%d)\n",
hdc_log("HDC: reset(current=%d, internal=%d)\n",
hdc_current, (machines[machine].flags & MACHINE_HDC) ? 1 : 0);
/* If we have a valid controller, add its device. */

88
src/disk/hdc_esdi_at.c
View File

@@ -8,7 +8,7 @@
*
* Driver for the ESDI controller (WD1007-vse1) for PC/AT.
*
* Version: @(#)hdc_esdi_at.c 1.0.11 2018/04/26
* Version: @(#)hdc_esdi_at.c 1.0.13 2018/05/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,11 +21,13 @@
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#define _GNU_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../io.h"
@@ -104,28 +106,45 @@ typedef struct {
} esdi_t;
#ifdef ENABLE_ESDI_AT_LOG
int esdi_at_do_log = ENABLE_ESDI_AT_LOG;
#endif
static void
esdi_at_log(const char *fmt, ...)
{
#ifdef ENABLE_ESDI_AT_LOG
va_list ap;
if (esdi_at_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static inline void
irq_raise(esdi_t *esdi)
{
if (!(esdi->fdisk&2))
if (!(esdi->fdisk & 2))
picint(1 << 14);
esdi->irqstat=1;
esdi->irqstat = 1;
}
static inline void
irq_lower(esdi_t *esdi)
{
picintc(1 << 14);
}
if (esdi->irqstat) {
if (!(esdi->fdisk & 2))
picintc(1 << 14);
static void
irq_update(esdi_t *esdi)
{
if (esdi->irqstat && !((pic2.pend|pic2.ins)&0x40) && !(esdi->fdisk & 2))
picint(1 << 14);
esdi->irqstat = 0;
}
}
@@ -139,12 +158,12 @@ get_sector(esdi_t *esdi, off64_t *addr)
int c, h, s;
if (esdi->head > heads) {
pclog("esdi_get_sector: past end of configured heads\n");
esdi_at_log("esdi_get_sector: past end of configured heads\n");
return(1);
}
if (esdi->sector >= sectors+1) {
pclog("esdi_get_sector: past end of configured sectors\n");
esdi_at_log("esdi_get_sector: past end of configured sectors\n");
return(1);
}
@@ -202,7 +221,8 @@ esdi_writew(uint16_t port, uint16_t val, void *priv)
esdi->pos = 0;
esdi->status = STAT_BUSY;
timer_clock();
esdi->callback = 6LL*HDC_TIME;
/* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */
esdi->callback = (3125LL * TIMER_USEC) / 8LL;
timer_update_outstanding();
}
}
@@ -213,9 +233,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
{
esdi_t *esdi = (esdi_t *)priv;
#ifdef ENABLE_HDD_LOG
pclog("WD1007 write(%04x, %02x)\n", port, val);
#endif
esdi_at_log("WD1007 write(%04x, %02x)\n", port, val);
switch (port) {
case 0x1f0: /* data */
@@ -257,9 +275,8 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
esdi->command = val;
esdi->error = 0;
#ifdef ENABLE_HDD_LOG
pclog("WD1007: command %02x\n", val & 0xf0);
#endif
esdi_at_log("WD1007: command %02x\n", val & 0xf0);
switch (val & 0xf0) {
case CMD_RESTORE:
esdi->command &= ~0x0f; /*mask off step rate*/
@@ -349,7 +366,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
break;
default:
pclog("WD1007: bad command %02X\n", val);
esdi_at_log("WD1007: bad command %02X\n", val);
case 0xe8: /*???*/
esdi->status = STAT_BUSY;
timer_clock();
@@ -377,7 +394,9 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
esdi->status = STAT_BUSY;
}
esdi->fdisk = val;
irq_update(esdi);
/* Lower IRQ on IRQ disable. */
if ((val & 2) && !(esdi->fdisk & 0x02))
picintc(1 << 14);
break;
}
}
@@ -401,7 +420,8 @@ esdi_readw(uint16_t port, void *priv)
next_sector(esdi);
esdi->status = STAT_BUSY;
timer_clock();
esdi->callback = 6LL*HDC_TIME;
/* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */
esdi->callback = (3125LL * TIMER_USEC) / 8LL;
timer_update_outstanding();
} else {
ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0);
@@ -454,9 +474,7 @@ esdi_read(uint16_t port, void *priv)
break;
}
#ifdef ENABLE_HDD_LOG
pclog("WD1007 read(%04x) = %02x\n", port, temp);
#endif
esdi_at_log("WD1007 read(%04x) = %02x\n", port, temp);
return(temp);
}
@@ -484,9 +502,7 @@ esdi_callback(void *priv)
return;
}
#ifdef ENABLE_HDD_LOG
pclog("WD1007: command %02x\n", esdi->command);
#endif
esdi_at_log("WD1007: command %02x\n", esdi->command);
switch (esdi->command) {
case CMD_RESTORE:
@@ -632,9 +648,9 @@ esdi_callback(void *priv)
drive->cfg_spt = esdi->secount;
drive->cfg_hpc = esdi->head+1;
#ifdef ENABLE_HDD_LOG
pclog("WD1007: parameters: spt=%i hpc=%i\n", drive->cfg_spt,drive->cfg_hpc);
#endif
esdi_at_log("WD1007: parameters: spt=%i hpc=%i\n", drive->cfg_spt,drive->cfg_hpc);
if (! esdi->secount)
fatal("WD1007: secount=0\n");
esdi->status = STAT_READY|STAT_DSC;
@@ -673,7 +689,7 @@ esdi_callback(void *priv)
break;
default:
pclog("WD1007: bad read config %02x\n",
esdi_at_log("WD1007: bad read config %02x\n",
esdi->cylinder >> 8);
}
esdi->status = STAT_READY|STAT_DSC;
@@ -730,7 +746,7 @@ esdi_callback(void *priv)
break;
default:
pclog("WD1007: callback on unknown command %02x\n", esdi->command);
esdi_at_log("WD1007: callback on unknown command %02x\n", esdi->command);
/*FALLTHROUGH*/
case 0xe8:
@@ -750,7 +766,7 @@ loadhd(esdi_t *esdi, int hdd_num, int d, const wchar_t *fn)
drive_t *drive = &esdi->drives[hdd_num];
if (! hdd_image_load(d)) {
pclog("WD1007: drive %d not present!\n", d);
esdi_at_log("WD1007: drive %d not present!\n", d);
drive->present = 0;
return;
}

53
src/disk/hdc_esdi_mca.c
View File

@@ -52,7 +52,7 @@
* however, are auto-configured by the system software as
* shown above.
*
* Version: @(#)hdc_esdi_mca.c 1.0.12 2018/04/26
* Version: @(#)hdc_esdi_mca.c 1.0.13 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -60,11 +60,13 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../dma.h"
@@ -192,6 +194,26 @@ typedef struct esdi {
#define STATUS_DEVICE_HOST_ADAPTER (7 << 5)
#ifdef ENABLE_ESDI_MCA_LOG
int esdi_mca_do_log = ENABLE_ESDI_MCA_LOG;
#endif
static void
esdi_mca_log(const char *fmt, ...)
{
#ifdef ENABLE_ESDI_MCA_LOG
va_list ap;
if (esdi_mca_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static __inline void
set_irq(esdi_t *dev)
{
@@ -561,13 +583,12 @@ esdi_callback(void *priv)
dev->status_data[4] = drive->tracks;
dev->status_data[5] = drive->hpc | (drive->spt << 16);
#if 0
pclog("CMD_GET_DEV_CONFIG %i %04x %04x %04x %04x %04x %04x\n",
esdi_mca_log("CMD_GET_DEV_CONFIG %i %04x %04x %04x %04x %04x %04x\n",
drive->sectors,
dev->status_data[0], dev->status_data[1],
dev->status_data[2], dev->status_data[3],
dev->status_data[4], dev->status_data[5]);
#endif
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
dev->irq_in_progress = 1;
@@ -754,9 +775,8 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
{
esdi_t *dev = (esdi_t *)priv;
#if 0
pclog("ESDI: wr(%04x, %02x)\n", port & 7, val);
#endif
esdi_mca_log("ESDI: wr(%04x, %02x)\n", port & 7, val);
switch (port & 7) {
case 2: /*Basic control register*/
if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) {
@@ -887,9 +907,8 @@ esdi_writew(uint16_t port, uint16_t val, void *priv)
{
esdi_t *dev = (esdi_t *)priv;
#if 0
pclog("ESDI: wrw(%04x, %04x)\n", port & 7, val);
#endif
esdi_mca_log("ESDI: wrw(%04x, %04x)\n", port & 7, val);
switch (port & 7) {
case 0: /*Command Interface Register*/
if (dev->cmd_pos >= 4)
@@ -921,9 +940,8 @@ esdi_mca_read(int port, void *priv)
{
esdi_t *dev = (esdi_t *)priv;
#if 0
pclog("ESDI: mcard(%04x)\n", port);
#endif
esdi_mca_log("ESDI: mcard(%04x)\n", port);
return(dev->pos_regs[port & 7]);
}
@@ -933,10 +951,9 @@ esdi_mca_write(int port, uint8_t val, void *priv)
{
esdi_t *dev = (esdi_t *)priv;
#if 0
pclog("ESDI: mcawr(%04x, %02x) pos[2]=%02x pos[3]=%02x\n",
esdi_mca_log("ESDI: mcawr(%04x, %02x) pos[2]=%02x pos[3]=%02x\n",
port, val, dev->pos_regs[2], dev->pos_regs[3]);
#endif
if (port < 0x102)
return;
@@ -984,7 +1001,7 @@ esdi_mca_write(int port, uint8_t val, void *priv)
}
/* Say hello. */
pclog("ESDI: I/O=3510, IRQ=14, DMA=%d, BIOS @%05X\n",
esdi_mca_log("ESDI: I/O=3510, IRQ=14, DMA=%d, BIOS @%05X\n",
dev->dma, dev->bios);
}
}

209
src/disk/hdc_ide.c
View File

@@ -9,7 +9,7 @@
* Implementation of the IDE emulation for hard disks and ATAPI
* CD-ROM devices.
*
* Version: @(#)hdc_ide.c 1.0.45 2018/04/26
* Version: @(#)hdc_ide.c 1.0.46 2018/05/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -32,8 +32,10 @@
#include "../cpu/cpu.h"
#include "../machine/machine.h"
#include "../io.h"
#include "../mem.h"
#include "../pic.h"
#include "../pci.h"
#include "../rom.h"
#include "../timer.h"
#include "../device.h"
#include "../scsi/scsi.h"
@@ -72,9 +74,9 @@
#define WIN_SRST 0x08 /* ATAPI Device Reset */
#define WIN_RECAL 0x10
#define WIN_READ 0x20 /* 28-Bit Read */
#define WIN_READ_NORETRY 0x21 /* 28-Bit Read - no retry*/
#define WIN_READ_NORETRY 0x21 /* 28-Bit Read - no retry */
#define WIN_WRITE 0x30 /* 28-Bit Write */
#define WIN_WRITE_NORETRY 0x31 /* 28-Bit Write */
#define WIN_WRITE_NORETRY 0x31 /* 28-Bit Write - no retry */
#define WIN_VERIFY 0x40 /* 28-Bit Verify */
#define WIN_VERIFY_ONCE 0x41 /* Added by OBattler - deprected older ATA command, according to the specification I found, it is identical to 0x40 */
#define WIN_FORMAT 0x50
@@ -127,9 +129,11 @@ enum
};
#endif
#define IDE_PCI (PCI && (romset != ROM_PB640))
typedef struct {
int enable, cur_dev,
int bit32, cur_dev,
irq;
int64_t callback;
} ide_board_t;
@@ -150,6 +154,9 @@ static uint16_t ide_side_main[4] = { 0x3f6, 0x376, 0x36e, 0x3ee };
static void ide_callback(void *priv);
#define IDE_TIME (20LL * TIMER_USEC) / 3LL
#ifdef ENABLE_IDE_LOG
int ide_do_log = ENABLE_IDE_LOG;
#endif
@@ -259,6 +266,34 @@ ide_get_period(ide_t *ide, int size)
}
#if 0
int64_t
ide_get_seek_time(ide_t *ide, uint32_t new_pos)
{
double dusec, time;
uint32_t pos = hdd_image_get_pos(ide->hdd_num);
uint32_t t, nt;
t = pos / ide->spt;
nt = new_pos / ide->spt;
dusec = (double) TIMER_USEC;
time = (1000000.0 / 2800.0) * dusec; /* Revolution (1/2800 s). */
if ((t % ide->hpc) != (pos % ide->hpc)) /* Head change. */
time += (dusec / 250.0); /* 4ns */
t /= ide->hpc;
nt /= ide->hpc;
if (t != nt) {
t = ABS(t - nt);
time += ((40000.0 * dusec) / ((double) ide->tracks)) * ((double) t);
}
return (int64_t) time;
}
#endif
int
ide_drive_is_cdrom(ide_t *ide)
{
@@ -305,14 +340,7 @@ ide_irq_raise(ide_t *ide)
/* ide_log("Raising IRQ %i (board %i)\n", ide_boards[ide->board]->irq, ide->board); */
if ((ide_boards[ide->board]->irq == -1) || ide->irqstat) {
ide->irqstat=1;
ide->service=1;
return;
}
if (!(ide->fdisk&2)) {
if (!(ide->fdisk & 2) && (ide_boards[ide->board]->irq != -1)) {
if ((ide->board < 2) && ide_bus_master_set_irq)
ide_bus_master_set_irq(ide->board | 0x40, ide_bus_master_priv[ide->board]);
else
@@ -332,16 +360,13 @@ ide_irq_lower(ide_t *ide)
/* ide_log("Lowering IRQ %i (board %i)\n", ide_boards[ide->board]->irq, ide->board); */
if ((ide_boards[ide->board]->irq == -1) || !(ide->irqstat)) {
ide->irqstat=0;
return;
if ((ide_boards[ide->board]->irq != -1) && ide->irqstat) {
if ((ide->board < 2) && ide_bus_master_set_irq)
ide_bus_master_set_irq(ide->board, ide_bus_master_priv[ide->board]);
else
picintc(1 << ide_boards[ide->board]->irq);
}
if ((ide->board < 2) && ide_bus_master_set_irq)
ide_bus_master_set_irq(ide->board, ide_bus_master_priv[ide->board]);
else
picintc(1 << ide_boards[ide->board]->irq);
ide->irqstat=0;
}
@@ -414,7 +439,7 @@ ide_get_max(ide_t *ide, int type)
{
switch(type) {
case TYPE_PIO: /* PIO */
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return 0; /* Maximum PIO 0 for legacy PIO-only drive. */
else {
if (ide_drive_is_zip(ide))
@@ -424,12 +449,12 @@ ide_get_max(ide_t *ide, int type)
}
break;
case TYPE_SDMA: /* SDMA */
if (!PCI || (ide->board >= 2) || ide_drive_is_zip(ide))
if (!IDE_PCI || (ide->board >= 2) || ide_drive_is_zip(ide))
return -1;
else
return 2;
case TYPE_MDMA: /* MDMA */
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return -1;
else {
if (ide_drive_is_zip(ide))
@@ -438,7 +463,7 @@ ide_get_max(ide_t *ide, int type)
return 2;
}
case TYPE_UDMA: /* UDMA */
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return -1;
else
return 2;
@@ -465,7 +490,7 @@ ide_get_timings(ide_t *ide, int type)
{
switch(type) {
case TIMINGS_DMA:
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return 0;
else {
if (ide_drive_is_zip(ide))
@@ -475,7 +500,7 @@ ide_get_timings(ide_t *ide, int type)
}
break;
case TIMINGS_PIO:
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return 0;
else {
if (ide_drive_is_zip(ide))
@@ -485,7 +510,7 @@ ide_get_timings(ide_t *ide, int type)
}
break;
case TIMINGS_PIO_FC:
if (!PCI || (ide->board >= 2))
if (!IDE_PCI || (ide->board >= 2))
return 0;
else {
if (ide_drive_is_zip(ide))
@@ -560,10 +585,10 @@ static void ide_hd_identify(ide_t *ide)
Bit 2 = The fields reported in word 88 are valid. */
ide->buffer[53] = 1;
if (ide->specify_success) {
ide->buffer[54] = (full_size / ide->t_hpc) / ide->t_spt;
ide->buffer[55] = ide->t_hpc;
ide->buffer[56] = ide->t_spt;
if (ide->cfg_spt != 0) {
ide->buffer[54] = (full_size / ide->cfg_hpc) / ide->cfg_spt;
ide->buffer[55] = ide->cfg_hpc;
ide->buffer[56] = ide->cfg_spt;
} else {
if (full_size <= 16514064) {
ide->buffer[54] = d_tracks;
@@ -584,7 +609,7 @@ static void ide_hd_identify(ide_t *ide)
ide_log("Current CHS translation: %i, %i, %i\n", ide->buffer[54], ide->buffer[55], ide->buffer[56]);
}
if (PCI && (ide->board < 2)) {
if (IDE_PCI && (ide->board < 2)) {
ide->buffer[47] = 32 | 0x8000; /*Max sectors on multiple transfer command*/
ide->buffer[80] = 0x1e; /*ATA-1 to ATA-4 supported*/
ide->buffer[81] = 0x18; /*ATA-4 revision 18 supported*/
@@ -612,12 +637,17 @@ ide_atapi_cdrom_identify(ide_t *ide)
ide->buffer[0] = 0x8000 | (5<<8) | 0x80 | (2<<5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
#if 0
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION, 8); /* Firmware */
ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */
#else
ide_padstr((char *) (ide->buffer + 23), "4.20 ", 8); /* Firmware */
ide_padstr((char *) (ide->buffer + 27), "NEC CD-ROM DRIVE:273 ", 40); /* Model */
#endif
ide->buffer[49] = 0x200; /* LBA supported */
ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */
if (PCI && (ide->board < 2)) {
if (IDE_PCI && (ide->board < 2)) {
ide->buffer[71] = 30;
ide->buffer[72] = 30;
}
@@ -638,7 +668,7 @@ ide_atapi_zip_250_identify(ide_t *ide)
ide_padstr((char *) (ide->buffer + 23), "42.S", 8); /* Firmware */
ide_padstr((char *) (ide->buffer + 27), "IOMEGA ZIP 250 ATAPI", 40); /* Model */
if (PCI && (ide->board < 2)) {
if (IDE_PCI && (ide->board < 2)) {
ide->buffer[80] = 0x30; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-5*/
ide->buffer[81] = 0x15; /*Maximum ATA revision supported : ATA/ATAPI-5 T13 1321D revision 1*/
}
@@ -690,7 +720,8 @@ ide_identify(ide_t *ide)
max_mdma = ide_get_max(ide, TYPE_MDMA);
max_udma = ide_get_max(ide, TYPE_UDMA);
ide->buffer[48] |= 1; /*Dword transfers supported*/
if (ide_boards[ide->board]->bit32)
ide->buffer[48] |= 1; /*Dword transfers supported*/
ide->buffer[51] = ide_get_timings(ide, TIMINGS_PIO);
ide->buffer[53] &= 0x0006;
ide->buffer[52] = ide->buffer[62] = ide->buffer[63] = ide->buffer[64] = 0x0000;
@@ -756,8 +787,8 @@ ide_get_sector(ide_t *ide)
if (ide->lba)
return (off64_t)ide->lba_addr + ide->skip512;
else {
heads = ide->t_hpc;
sectors = ide->t_spt;
heads = ide->cfg_hpc;
sectors = ide->cfg_spt;
return ((((off64_t) ide->cylinder * heads) + ide->head) *
sectors) + (ide->sector - 1) + ide->skip512;
@@ -775,10 +806,10 @@ ide_next_sector(ide_t *ide)
ide->lba_addr++;
else {
ide->sector++;
if (ide->sector == (ide->t_spt + 1)) {
if (ide->sector == (ide->cfg_spt + 1)) {
ide->sector = 1;
ide->head++;
if (ide->head == ide->t_hpc) {
if (ide->head == ide->cfg_hpc) {
ide->head = 0;
ide->cylinder++;
}
@@ -1043,6 +1074,7 @@ ide_board_init(int board)
max = ide_get_max(dev, TYPE_PIO);
dev->mdma_mode = (1 << max);
dev->error = 1;
dev->cfg_spt = dev->cfg_hpc = 0;
}
}
@@ -1870,7 +1902,8 @@ ide_read_alt_status(uint16_t addr, void *priv)
ch = dev->cur_dev;
ide = ide_drives[ch];
ide_irq_lower(ide);
/* Per the Seagate ATA-3 specification:
Reading the alternate status does *NOT* clear the IRQ. */
temp = ide_status(ide, ch);
ide_log("ide_read_alt_status(%04X, %08X) = %02X\n", addr, priv, temp);
@@ -1895,10 +1928,6 @@ ide_readw(uint16_t addr, void *priv)
case 0x0: /* Data */
temp = ide_read_data(ide, 2);
break;
default:
temp = 0xff;
break;
}
/* ide_log("ide_readw(%04X, %08X) = %04X\n", addr, priv, temp); */
@@ -1939,7 +1968,6 @@ ide_callback(void *priv)
int snum, ret, ch;
int cdrom_id, cdrom_id_other;
int zip_id, zip_id_other;
uint64_t full_size = 0;
ide_board_t *dev = (ide_board_t *) priv;
ch = dev->cur_dev;
@@ -1949,9 +1977,6 @@ ide_callback(void *priv)
ide_set_callback(ide->board, 0LL);
if (ide->type == IDE_HDD)
full_size = (hdd[ide->hdd_num].tracks * hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt);
if (ide->reset) {
ide_log("CALLBACK RESET %i %i\n", ide->reset,ch);
@@ -1961,6 +1986,10 @@ ide_callback(void *priv)
ide->sector = ide_other->sector = 1;
ide->head = ide_other->head = 0;
ide->cylinder = ide_other->cylinder = 0;
// ide->cfg_spt = ide->cfg_hpc = 0; /* need new parameters (drive 0) */
// ide_other->cfg_spt = ide_other->cfg_hpc = 0; /* need new parameters (drive 1) */
ide->reset = ide_other->reset = 0;
ide_set_signature(ide);
@@ -2018,9 +2047,11 @@ ide_callback(void *priv)
/* Initialize the Task File Registers as follows: Status = 00h, Error = 01h, Sector Count = 01h, Sector Number = 01h,
Cylinder Low = 14h, Cylinder High =EBh and Drive/Head = 00h. */
case WIN_SRST: /*ATAPI Device Reset */
ide->atastat = DRDY_STAT | DSC_STAT;
ide->error=1; /*Device passed*/
ide->secount = ide->sector = 1;
ide->error = 1; /*Device passed*/
ide->secount = 1;
ide->sector = 1;
ide_set_signature(ide);
@@ -2071,7 +2102,7 @@ ide_callback(void *priv)
ide_set_signature(ide);
goto abort_cmd;
}
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
if (ide->do_initial_read) {
@@ -2101,7 +2132,7 @@ ide_callback(void *priv)
ide_log("IDE %i: DMA read aborted (bad device or board)\n", ide->channel);
goto abort_cmd;
}
if (!ide->specify_success) {
if (ide->cfg_spt == 0) {
ide_log("IDE %i: DMA read aborted (SPECIFY failed)\n", ide->channel);
goto id_not_found;
}
@@ -2153,7 +2184,7 @@ ide_callback(void *priv)
mand error. */
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide) || !ide->blocksize)
goto abort_cmd;
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
if (ide->do_initial_read) {
@@ -2182,7 +2213,7 @@ ide_callback(void *priv)
case WIN_WRITE_NORETRY:
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide))
goto abort_cmd;
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
ide_irq_raise(ide);
@@ -2204,7 +2235,7 @@ ide_callback(void *priv)
ide_log("IDE %i: DMA write aborted (bad device type or board)\n", ide->channel);
goto abort_cmd;
}
if (!ide->specify_success) {
if (ide->cfg_spt == 0) {
ide_log("IDE %i: DMA write aborted (SPECIFY failed)\n", ide->channel);
goto id_not_found;
}
@@ -2249,7 +2280,7 @@ ide_callback(void *priv)
case WIN_WRITE_MULTIPLE:
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide))
goto abort_cmd;
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
ide->blockcount++;
@@ -2272,7 +2303,7 @@ ide_callback(void *priv)
case WIN_VERIFY_ONCE:
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide))
goto abort_cmd;
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
ide->pos=0;
ide->atastat = DRDY_STAT | DSC_STAT;
@@ -2283,7 +2314,7 @@ ide_callback(void *priv)
case WIN_FORMAT:
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide))
goto abort_cmd;
if (!ide->specify_success)
if (ide->cfg_spt == 0)
goto id_not_found;
hdd_image_zero(ide->hdd_num, ide_get_sector(ide), ide->secount);
@@ -2332,14 +2363,14 @@ ide_callback(void *priv)
case WIN_SPECIFY: /* Initialize Drive Parameters */
if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide))
goto abort_cmd;
full_size /= (ide->head+1);
full_size /= ide->secount;
ide->specify_success = 1;
hdd_image_specify(ide->hdd_num, ide->head + 1, ide->secount);
ide->t_spt=ide->secount;
ide->t_hpc=ide->head;
ide->t_hpc++;
if (ide->cfg_spt == 0) {
/* Only accept after RESET or DIAG. */
ide->cfg_spt = ide->secount;
ide->cfg_hpc = ide->head + 1;
}
ide->command = 0x00;
ide->atastat = DRDY_STAT | DSC_STAT;
ide->error = 1;
ide_irq_raise(ide);
return;
@@ -2449,7 +2480,7 @@ abort_cmd:
id_not_found:
ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT;
ide->error = ABRT_ERR | 0x10;
ide->error = IDNF_ERR;
ide->pos = 0;
ide_irq_raise(ide);
}
@@ -2459,15 +2490,26 @@ static void
ide_set_handlers(uint8_t board)
{
if (ide_base_main[board] & 0x300) {
io_sethandler(ide_base_main[board], 8,
ide_readb, ide_readw, ide_readl,
ide_writeb, ide_writew, ide_writel,
if (ide_boards[board]->bit32) {
io_sethandler(ide_base_main[board], 1,
ide_readb, ide_readw, ide_readl,
ide_writeb, ide_writew, ide_writel,
ide_boards[board]);
} else {
io_sethandler(ide_base_main[board], 1,
ide_readb, ide_readw, NULL,
ide_writeb, ide_writew, NULL,
ide_boards[board]);
}
io_sethandler(ide_base_main[board] + 1, 7,
ide_readb, NULL, NULL,
ide_writeb, NULL, NULL,
ide_boards[board]);
}
if (ide_side_main[board] & 0x300) {
io_sethandler(ide_side_main[board], 1,
ide_read_alt_status, NULL, NULL,
ide_write_devctl, NULL, NULL,
ide_read_alt_status, NULL, NULL,
ide_write_devctl, NULL, NULL,
ide_boards[board]);
}
}
@@ -2476,13 +2518,24 @@ ide_set_handlers(uint8_t board)
static void
ide_remove_handlers(uint8_t board)
{
io_removehandler(ide_base_main[board], 8,
ide_readb, ide_readw, ide_readl,
ide_writeb, ide_writew, ide_writel,
if (ide_boards[board]->bit32) {
io_removehandler(ide_base_main[board], 1,
ide_readb, ide_readw, ide_readl,
ide_writeb, ide_writew, ide_writel,
ide_boards[board]);
} else {
io_removehandler(ide_base_main[board], 1,
ide_readb, ide_readw, NULL,
ide_writeb, ide_writew, NULL,
ide_boards[board]);
}
io_removehandler(ide_base_main[board] + 1, 7,
ide_readb, NULL, NULL,
ide_writeb, NULL, NULL,
ide_boards[board]);
io_removehandler(ide_side_main[board], 1,
ide_read_alt_status, NULL, NULL,
ide_write_devctl, NULL, NULL,
ide_read_alt_status, NULL, NULL,
ide_write_devctl, NULL, NULL,
ide_boards[board]);
}
@@ -2702,6 +2755,8 @@ ide_sainit(const device_t *info)
memset(ide_boards[0], 0, sizeof(ide_board_t));
ide_boards[0]->irq = 14;
ide_boards[0]->cur_dev = 0;
if (info->local & 8)
ide_boards[0]->bit32 = 1;
ide_base_main[0] = 0x1f0;
ide_side_main[0] = 0x3f6;
ide_set_handlers(0);
@@ -2719,6 +2774,8 @@ ide_sainit(const device_t *info)
memset(ide_boards[1], 0, sizeof(ide_board_t));
ide_boards[1]->irq = 15;
ide_boards[1]->cur_dev = 2;
if (info->local & 8)
ide_boards[1]->bit32 = 1;
ide_base_main[1] = 0x170;
ide_side_main[1] = 0x376;
ide_set_handlers(1);

9
src/disk/hdc_ide.h
View File

@@ -9,7 +9,7 @@
* Implementation of the IDE emulation for hard disks and ATAPI
* CD-ROM devices.
*
* Version: @(#)hdd_ide.h 1.0.9 2018/03/26
* Version: @(#)hdd_ide.h 1.0.10 2018/05/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -29,14 +29,13 @@ typedef struct {
hdd_num, channel,
pos, sector_pos,
lba, skip512,
reset, specify_success,
mdma_mode, do_initial_read,
reset, tracks,
spt, hpc,
tracks;
mdma_mode, do_initial_read;
uint32_t secount, sector,
cylinder, head,
drive, cylprecomp,
t_spt, t_hpc,
cfg_spt, cfg_hpc,
lba_addr;
uint16_t *buffer;

135
src/disk/hdc_mfm_at.c
View File

@@ -12,7 +12,7 @@
* based design. Most cards were WD1003-WA2 or -WAH, where the
* -WA2 cards had a floppy controller as well (to save space.)
*
* Version: @(#)hdc_mfm_at.c 1.0.15 2018/04/26
* Version: @(#)hdc_mfm_at.c 1.0.17 2018/05/02
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -23,11 +23,13 @@
#define __USE_LARGEFILE64
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../io.h"
@@ -110,28 +112,45 @@ typedef struct {
} mfm_t;
#ifdef ENABLE_MFM_AT_LOG
int mfm_at_do_log = ENABLE_MFM_AT_LOG;
#endif
static void
mfm_at_log(const char *fmt, ...)
{
#ifdef ENABLE_MFM_AT_LOG
va_list ap;
if (mfm_at_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static inline void
irq_raise(mfm_t *mfm)
{
if (!(mfm->fdisk&2))
if (!(mfm->fdisk & 2))
picint(1 << 14);
mfm->irqstat=1;
mfm->irqstat = 1;
}
static inline void
irq_lower(mfm_t *mfm)
{
picintc(1 << 14);
}
if (mfm->irqstat) {
if (!(mfm->fdisk & 2))
picintc(1 << 14);
static void
irq_update(mfm_t *mfm)
{
if (mfm->irqstat && !((pic2.pend|pic2.ins)&0x40) && !(mfm->fdisk & 2))
picint(1 << 14);
mfm->irqstat = 0;
}
}
@@ -153,18 +172,18 @@ get_sector(mfm_t *mfm, off64_t *addr)
drive_t *drive = &mfm->drives[mfm->drvsel];
if (drive->curcyl != mfm->cylinder) {
pclog("WD1003(%d) sector: wrong cylinder\n");
mfm_at_log("WD1003(%d) sector: wrong cylinder\n");
return(1);
}
if (mfm->head > drive->cfg_hpc) {
pclog("WD1003(%d) get_sector: past end of configured heads\n",
mfm_at_log("WD1003(%d) get_sector: past end of configured heads\n",
mfm->drvsel);
return(1);
}
if (mfm->sector >= drive->cfg_spt+1) {
pclog("WD1003(%d) get_sector: past end of configured sectors\n",
mfm_at_log("WD1003(%d) get_sector: past end of configured sectors\n",
mfm->drvsel);
return(1);
}
@@ -172,12 +191,12 @@ get_sector(mfm_t *mfm, off64_t *addr)
#if 1
/* We should check this in the SET_DRIVE_PARAMETERS command! --FvK */
if (mfm->head > drive->hpc) {
pclog("WD1003(%d) get_sector: past end of heads\n", mfm->drvsel);
mfm_at_log("WD1003(%d) get_sector: past end of heads\n", mfm->drvsel);
return(1);
}
if (mfm->sector >= drive->spt+1) {
pclog("WD1003(%d) get_sector: past end of sectors\n", mfm->drvsel);
mfm_at_log("WD1003(%d) get_sector: past end of sectors\n", mfm->drvsel);
return(1);
}
#endif
@@ -214,7 +233,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
if (! drive->present) {
/* This happens if sofware polls all drives. */
pclog("WD1003(%d) command %02x on non-present drive\n",
mfm_at_log("WD1003(%d) command %02x on non-present drive\n",
mfm->drvsel, val);
mfm->command = 0xff;
mfm->status = STAT_BUSY;
@@ -232,10 +251,8 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
switch (val & 0xf0) {
case CMD_RESTORE:
drive->steprate = (val & 0x0f);
#if ENABLE_HDC_LOG
pclog("WD1003(%d) restore, step=%d\n",
mfm_at_log("WD1003(%d) restore, step=%d\n",
mfm->drvsel, drive->steprate);
#endif
drive->curcyl = 0;
mfm->status = STAT_READY|STAT_DSC;
mfm->command &= 0xf0;
@@ -258,10 +275,8 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
case CMD_READ+1:
case CMD_READ+2:
case CMD_READ+3:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) read, opt=%d\n",
mfm_at_log("WD1003(%d) read, opt=%d\n",
mfm->drvsel, val&0x03);
#endif
mfm->command &= 0xfc;
if (val & 2)
fatal("WD1003: READ with ECC\n");
@@ -275,10 +290,8 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
case CMD_WRITE+1:
case CMD_WRITE+2:
case CMD_WRITE+3:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) write, opt=%d\n",
mfm_at_log("WD1003(%d) write, opt=%d\n",
mfm->drvsel, val & 0x03);
#endif
mfm->command &= 0xfc;
if (val & 2)
fatal("WD1003: WRITE with ECC\n");
@@ -328,11 +341,11 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
/* Only accept after RESET or DIAG. */
drive->cfg_spt = mfm->secount;
drive->cfg_hpc = mfm->head+1;
pclog("WD1003(%d) parameters: tracks=%d, spt=%i, hpc=%i\n",
mfm_at_log("WD1003(%d) parameters: tracks=%d, spt=%i, hpc=%i\n",
mfm->drvsel, drive->tracks,
drive->cfg_spt, drive->cfg_hpc);
} else {
pclog("WD1003(%d) parameters: tracks=%d,spt=%i,hpc=%i (IGNORED)\n",
mfm_at_log("WD1003(%d) parameters: tracks=%d,spt=%i,hpc=%i (IGNORED)\n",
mfm->drvsel, drive->tracks,
drive->cfg_spt, drive->cfg_hpc);
}
@@ -343,7 +356,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
break;
default:
pclog("WD1003: bad command %02X\n", val);
mfm_at_log("WD1003: bad command %02X\n", val);
mfm->status = STAT_BUSY;
timer_clock();
mfm->callback = 200LL*MFM_TIME;
@@ -366,7 +379,9 @@ mfm_writew(uint16_t port, uint16_t val, void *priv)
mfm->pos = 0;
mfm->status = STAT_BUSY;
timer_clock();
mfm->callback = 6LL*MFM_TIME;
/* 781.25 us per sector at 5 Mbit/s = 640 kB/s. */
mfm->callback = ((3125LL * TIMER_USEC) / 4LL);
/* mfm->callback = 10LL * MFM_TIME; */
timer_update_outstanding();
}
}
@@ -377,9 +392,8 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
{
mfm_t *mfm = (mfm_t *)priv;
#if ENABLE_HDC_LOG > 1
pclog("WD1003 write(%04x, %02x)\n", port, val);
#endif
mfm_at_log("WD1003 write(%04x, %02x)\n", port, val);
switch (port) {
case 0x01f0: /* data */
mfm_writew(port, val | (val << 8), priv);
@@ -436,7 +450,9 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
mfm->status = STAT_BUSY;
}
mfm->fdisk = val;
irq_update(mfm);
/* Lower IRQ on IRQ disable. */
if ((val & 2) && !(mfm->fdisk & 0x02))
picintc(1 << 14);
break;
}
}
@@ -459,7 +475,9 @@ mfm_readw(uint16_t port, void *priv)
next_sector(mfm);
mfm->status = STAT_BUSY;
timer_clock();
mfm->callback = 6LL*MFM_TIME;
/* 781.25 us per sector at 5 Mbit/s = 640 kB/s. */
mfm->callback = ((3125LL * TIMER_USEC) / 4LL);
/* mfm->callback = 10LL * MFM_TIME; */
timer_update_outstanding();
} else {
ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0);
@@ -514,9 +532,8 @@ mfm_read(uint16_t port, void *priv)
default:
break;
}
#if ENABLE_HDC_LOG > 1
pclog("WD1003 read(%04x) = %02x\n", port, ret);
#endif
mfm_at_log("WD1003 read(%04x) = %02x\n", port, ret);
return(ret);
}
@@ -527,10 +544,9 @@ do_seek(mfm_t *mfm)
{
drive_t *drive = &mfm->drives[mfm->drvsel];
#if ENABLE_HDC_LOG
pclog("WD1003(%d) seek(%d) max=%d\n",
mfm_at_log("WD1003(%d) seek(%d) max=%d\n",
mfm->drvsel,mfm->cylinder,drive->tracks);
#endif
if (mfm->cylinder < drive->tracks)
drive->curcyl = mfm->cylinder;
else
@@ -547,9 +563,8 @@ do_callback(void *priv)
mfm->callback = 0LL;
if (mfm->reset) {
#if ENABLE_HDC_LOG
pclog("WD1003(%d) reset\n", mfm->drvsel);
#endif
mfm_at_log("WD1003(%d) reset\n", mfm->drvsel);
mfm->status = STAT_READY|STAT_DSC;
mfm->error = 1;
mfm->secount = 1;
@@ -569,20 +584,16 @@ do_callback(void *priv)
switch (mfm->command) {
case CMD_SEEK:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) seek, step=%d\n",
mfm_at_log("WD1003(%d) seek, step=%d\n",
mfm->drvsel, drive->steprate);
#endif
do_seek(mfm);
mfm->status = STAT_READY|STAT_DSC;
irq_raise(mfm);
break;
case CMD_READ:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) read(%d,%d,%d)\n",
mfm_at_log("WD1003(%d) read(%d,%d,%d)\n",
mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector);
#endif
do_seek(mfm);
if (get_sector(mfm, &addr)) {
mfm->error = ERR_ID_NOT_FOUND;
@@ -600,10 +611,8 @@ do_callback(void *priv)
break;
case CMD_WRITE:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) write(%d,%d,%d)\n",
mfm_at_log("WD1003(%d) write(%d,%d,%d)\n",
mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector);
#endif
do_seek(mfm);
if (get_sector(mfm, &addr)) {
mfm->error = ERR_ID_NOT_FOUND;
@@ -628,10 +637,8 @@ do_callback(void *priv)
break;
case CMD_VERIFY:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) verify(%d,%d,%d)\n",
mfm_at_log("WD1003(%d) verify(%d,%d,%d)\n",
mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector);
#endif
do_seek(mfm);
mfm->pos = 0;
mfm->status = STAT_READY|STAT_DSC;
@@ -640,10 +647,8 @@ do_callback(void *priv)
break;
case CMD_FORMAT:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) format(%d,%d)\n",
mfm_at_log("WD1003(%d) format(%d,%d)\n",
mfm->drvsel, mfm->cylinder, mfm->head);
#endif
do_seek(mfm);
if (get_sector(mfm, &addr)) {
mfm->error = ERR_ID_NOT_FOUND;
@@ -660,9 +665,7 @@ do_callback(void *priv)
break;
case CMD_DIAGNOSE:
#if ENABLE_HDC_LOG
pclog("WD1003(%d) diag\n", mfm->drvsel);
#endif
mfm_at_log("WD1003(%d) diag\n", mfm->drvsel);
drive->steprate = 0x0f;
mfm->error = 1;
mfm->status = STAT_READY|STAT_DSC;
@@ -670,7 +673,7 @@ do_callback(void *priv)
break;
default:
pclog("WD1003(%d) callback on unknown command %02x\n",
mfm_at_log("WD1003(%d) callback on unknown command %02x\n",
mfm->drvsel, mfm->command);
mfm->status = STAT_READY|STAT_ERR|STAT_DSC;
mfm->error = ERR_ABRT;
@@ -705,7 +708,7 @@ mfm_init(const device_t *info)
mfm_t *mfm;
int c, d;
pclog("WD1003: ISA MFM/RLL Fixed Disk Adapter initializing ...\n");
mfm_at_log("WD1003: ISA MFM/RLL Fixed Disk Adapter initializing ...\n");
mfm = malloc(sizeof(mfm_t));
memset(mfm, 0x00, sizeof(mfm_t));
@@ -714,7 +717,7 @@ mfm_init(const device_t *info)
if ((hdd[d].bus == HDD_BUS_MFM) && (hdd[d].mfm_channel < MFM_NUM)) {
loadhd(mfm, hdd[d].mfm_channel, d, hdd[d].fn);
pclog("WD1003(%d): (%ls) geometry %d/%d/%d\n", c, hdd[d].fn,
mfm_at_log("WD1003(%d): (%ls) geometry %d/%d/%d\n", c, hdd[d].fn,
(int)hdd[d].tracks, (int)hdd[d].hpc, (int)hdd[d].spt);
if (++c >= MFM_NUM) break;

64
src/disk/hdc_mfm_xt.c
View File

@@ -41,7 +41,7 @@
* Since all controllers (including the ones made by DTC) use
* (mostly) the same API, we keep them all in this module.
*
* Version: @(#)hdc_mfm_xt.c 1.0.16 2018/04/26
* Version: @(#)hdc_mfm_xt.c 1.0.17 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -52,11 +52,13 @@
#define __USE_LARGEFILE64
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../dma.h"
@@ -153,6 +155,26 @@ typedef struct {
#define ERR_ILLEGAL_SECTOR_ADDRESS 0x21
#ifdef ENABLE_MFM_XT_LOG
int mfm_xt_do_log = ENABLE_MFM_XT_LOG;
#endif
static void
mfm_xt_log(const char *fmt, ...)
{
#ifdef ENABLE_MFM_XT_LOG
va_list ap;
if (mfm_xt_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static uint8_t
mfm_read(uint16_t port, void *priv)
{
@@ -279,7 +301,7 @@ mfm_error(mfm_t *mfm, uint8_t error)
mfm->completion_byte |= 0x02;
mfm->error = error;
pclog("mfm_error - %02x\n", mfm->error);
mfm_xt_log("mfm_error - %02x\n", mfm->error);
}
@@ -290,22 +312,22 @@ get_sector(mfm_t *mfm, off64_t *addr)
int heads = drive->cfg_hpc;
if (drive->current_cylinder != mfm->cylinder) {
pclog("mfm_get_sector: wrong cylinder\n");
mfm_xt_log("mfm_get_sector: wrong cylinder\n");
mfm->error = ERR_ILLEGAL_SECTOR_ADDRESS;
return(1);
}
if (mfm->head > heads) {
pclog("mfm_get_sector: past end of configured heads\n");
mfm_xt_log("mfm_get_sector: past end of configured heads\n");
mfm->error = ERR_ILLEGAL_SECTOR_ADDRESS;
return(1);
}
if (mfm->head > drive->hpc) {
pclog("mfm_get_sector: past end of heads\n");
mfm_xt_log("mfm_get_sector: past end of heads\n");
mfm->error = ERR_ILLEGAL_SECTOR_ADDRESS;
return(1);
}
if (mfm->sector >= 17) {
pclog("mfm_get_sector: past end of sectors\n");
mfm_xt_log("mfm_get_sector: past end of sectors\n");
mfm->error = ERR_ILLEGAL_SECTOR_ADDRESS;
return(1);
}
@@ -396,7 +418,7 @@ mfm_callback(void *priv)
mfm->sector_count = mfm->command[4];
do {
if (get_sector(mfm, &addr)) {
pclog("get_sector failed\n");
mfm_xt_log("get_sector failed\n");
mfm_error(mfm, mfm->error);
mfm_complete(mfm);
return;
@@ -423,7 +445,7 @@ mfm_callback(void *priv)
mfm->head = mfm->command[1] & 0x1f;
if (get_sector(mfm, &addr)) {
pclog("get_sector failed\n");
mfm_xt_log("get_sector failed\n");
mfm_error(mfm, mfm->error);
mfm_complete(mfm);
return;
@@ -471,7 +493,7 @@ mfm_callback(void *priv)
int val = dma_channel_write(3, mfm->sector_buf[mfm->data_pos]);
if (val == DMA_NODATA) {
pclog("CMD_READ_SECTORS out of data!\n");
mfm_xt_log("CMD_READ_SECTORS out of data!\n");
mfm->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
mfm->callback = MFM_TIME;
return;
@@ -544,7 +566,7 @@ mfm_callback(void *priv)
int val = dma_channel_read(3);
if (val == DMA_NODATA) {
pclog("CMD_WRITE_SECTORS out of data!\n");
mfm_xt_log("CMD_WRITE_SECTORS out of data!\n");
mfm->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
mfm->callback = MFM_TIME;
return;
@@ -619,7 +641,7 @@ mfm_callback(void *priv)
case STATE_RECEIVED_DATA:
drive->cfg_cyl = mfm->data[1] | (mfm->data[0] << 8);
drive->cfg_hpc = mfm->data[2];
pclog("Drive %i: cylinders=%i, heads=%i\n", mfm->drive_sel, drive->cfg_cyl, drive->cfg_hpc);
mfm_xt_log("Drive %i: cylinders=%i, heads=%i\n", mfm->drive_sel, drive->cfg_cyl, drive->cfg_hpc);
mfm_complete(mfm);
break;
@@ -648,7 +670,7 @@ mfm_callback(void *priv)
int val = dma_channel_read(3);
if (val == DMA_NODATA) {
pclog("CMD_WRITE_SECTOR_BUFFER out of data!\n");
mfm_xt_log("CMD_WRITE_SECTOR_BUFFER out of data!\n");
mfm->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
mfm->callback = MFM_TIME;
return;
@@ -697,7 +719,7 @@ mfm_callback(void *priv)
mfm->data[0] = drive->tracks & 0xff;
mfm->data[1] = 17 | ((drive->tracks >> 2) & 0xc0);
mfm->data[2] = drive->hpc-1;
pclog("Get drive params %02x %02x %02x %i\n", mfm->data[0], mfm->data[1], mfm->data[2], drive->tracks);
mfm_xt_log("Get drive params %02x %02x %02x %i\n", mfm->data[0], mfm->data[1], mfm->data[2], drive->tracks);
break;
case STATE_SENT_DATA:
@@ -803,7 +825,7 @@ mfm_set_switches(mfm_t *mfm)
}
if (c == 4)
pclog("WARNING: Drive %c: has format not supported by Fixed Disk Adapter", d ? 'D' : 'C');
mfm_xt_log("WARNING: Drive %c: has format not supported by Fixed Disk Adapter", d ? 'D' : 'C');
}
}
@@ -816,16 +838,16 @@ xebec_init(const device_t *info)
mfm_t *xebec = malloc(sizeof(mfm_t));
memset(xebec, 0x00, sizeof(mfm_t));
pclog("MFM: looking for disks..\n");
mfm_xt_log("MFM: looking for disks..\n");
for (i=0; i<HDD_NUM; i++) {
if ((hdd[i].bus == HDD_BUS_MFM) && (hdd[i].mfm_channel < MFM_NUM)) {
pclog("Found MFM hard disk on channel %i\n", hdd[i].mfm_channel);
mfm_xt_log("Found MFM hard disk on channel %i\n", hdd[i].mfm_channel);
loadhd(xebec, i, hdd[i].mfm_channel, hdd[i].fn);
if (++c > MFM_NUM) break;
}
}
pclog("MFM: %d disks loaded.\n", c);
mfm_xt_log("MFM: %d disks loaded.\n", c);
mfm_set_switches(xebec);
@@ -881,16 +903,16 @@ dtc5150x_init(const device_t *info)
mfm_t *dtc = malloc(sizeof(mfm_t));
memset(dtc, 0x00, sizeof(mfm_t));
pclog("MFM: looking for disks..\n");
mfm_xt_log("MFM: looking for disks..\n");
for (i=0; i<HDD_NUM; i++) {
if ((hdd[i].bus == HDD_BUS_MFM) && (hdd[i].mfm_channel < MFM_NUM)) {
pclog("Found MFM hard disk on channel %i (%ls)\n", hdd[i].mfm_channel, hdd[i].fn);
mfm_xt_log("Found MFM hard disk on channel %i (%ls)\n", hdd[i].mfm_channel, hdd[i].fn);
loadhd(dtc, i, hdd[i].mfm_channel, hdd[i].fn);
if (++c > MFM_NUM) break;
}
}
pclog("MFM: %d disks loaded.\n", c);
mfm_xt_log("MFM: %d disks loaded.\n", c);
dtc->switches = 0xff;

6
src/disk/hdc_xta.c
View File

@@ -46,7 +46,7 @@
*
* NOTE: The XTA interface is 0-based for sector numbers !!
*
* Version: @(#)hdc_ide_xta.c 1.0.7 2018/04/26
* Version: @(#)hdc_ide_xta.c 1.0.8 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -87,11 +87,13 @@
#define __USE_LARGEFILE64
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../dma.h"

3
src/disk/hdd.h
View File

@@ -8,7 +8,7 @@
*
* Definitions for the hard disk image handler.
*
* Version: @(#)hdd.h 1.0.4 2018/03/29
* Version: @(#)hdd.h 1.0.5 2018/04/30
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -119,6 +119,7 @@ extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8
extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count);
extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count);
extern uint32_t hdd_image_get_last_sector(uint8_t id);
extern uint32_t hdd_image_get_pos(uint8_t id);
extern uint8_t hdd_image_get_type(uint8_t id);
extern void hdd_image_specify(uint8_t id, uint64_t hpc, uint64_t spt);
extern void hdd_image_unload(uint8_t id, int fn_preserve);

47
src/disk/hdd_image.c
View File

@@ -8,7 +8,7 @@
*
* Handling of hard disk image files.
*
* Version: @(#)hdd_image.c 1.0.14 2018/03/28
* Version: @(#)hdd_image.c 1.0.15 2018/04/29
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -19,11 +19,11 @@
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#define _GNU_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#include <errno.h>
#define HAVE_STDARG_H
@@ -36,9 +36,9 @@ typedef struct
{
FILE *file;
uint32_t base;
uint32_t last_sector;
uint32_t pos, last_sector;
uint8_t type;
uint8_t loaded;
uint8_t loaded;
} hdd_image_t;
@@ -48,23 +48,22 @@ static char empty_sector[512];
static char *empty_sector_1mb;
#ifdef ENABLE_HDD_LOG
int hdd_image_do_log = ENABLE_HDD_LOG;
#ifdef ENABLE_HDD_IMAGE_LOG
int hdd_image_do_log = ENABLE_HDD_IMAGE_LOG;
#endif
static void
hdd_image_log(const char *fmt, ...)
{
#ifdef ENABLE_HDD_LOG
va_list ap;
#ifdef ENABLE_HDD_IMAGE_LOG
va_list ap;
if (hdd_image_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
if (hdd_image_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
@@ -203,6 +202,8 @@ hdd_image_load(int id)
is_hdx[0] = image_is_hdx(fn, 0);
is_hdx[1] = image_is_hdx(fn, 1);
hdd_images[id].pos = 0;
/* Try to open existing hard disk image */
if (fn[0] == '.') {
hdd_image_log("File name starts with .\n");
@@ -345,8 +346,9 @@ void
hdd_image_seek(uint8_t id, uint32_t sector)
{
off64_t addr = sector;
addr = (uint64_t)sector * 512;
addr = (uint64_t)sector << 9LL;
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, addr + hdd_images[id].base, SEEK_SET);
}
@@ -354,6 +356,7 @@ hdd_image_seek(uint8_t id, uint32_t sector)
void
hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
{
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
fread(buffer, 1, count << 9, hdd_images[id].file);
}
@@ -376,6 +379,7 @@ hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
if ((sectors - sector) < transfer_sectors)
transfer_sectors = sectors - sector;
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
fread(buffer, 1, transfer_sectors << 9, hdd_images[id].file);
@@ -388,6 +392,7 @@ hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
void
hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
{
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
fwrite(buffer, count << 9, 1, hdd_images[id].file);
}
@@ -402,6 +407,7 @@ hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
if ((sectors - sector) < transfer_sectors)
transfer_sectors = sectors - sector;
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
fwrite(buffer, transfer_sectors << 9, 1, hdd_images[id].file);
@@ -416,6 +422,7 @@ hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count)
{
uint32_t i = 0;
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
for (i = 0; i < count; i++)
fwrite(empty_sector, 512, 1, hdd_images[id].file);
@@ -433,6 +440,7 @@ hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count)
if ((sectors - sector) < transfer_sectors)
transfer_sectors = sectors - sector;
hdd_images[id].pos = sector;
fseeko64(hdd_images[id].file, ((uint64_t)sector << 9LL) + hdd_images[id].base, SEEK_SET);
for (i = 0; i < transfer_sectors; i++)
fwrite(empty_sector, 1, 512, hdd_images[id].file);
@@ -450,6 +458,13 @@ hdd_image_get_last_sector(uint8_t id)
}
uint32_t
hdd_image_get_pos(uint8_t id)
{
return hdd_images[id].pos;
}
uint8_t
hdd_image_get_type(uint8_t id)
{

3
src/disk/zip.h
View File

@@ -9,7 +9,7 @@
* Implementation of the Iomega ZIP drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage.
*
* Version: @(#)zip.h 1.0.5 2018/03/26
* Version: @(#)zip.h 1.0.6 2018/04/30
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -32,7 +32,6 @@
#define BUF_SIZE 32768
#define IDE_TIME (5LL * 100LL * (1LL << TIMER_SHIFT))
#define ZIP_TIME (5LL * 100LL * (1LL << TIMER_SHIFT))
#define ZIP_SECTORS (96*2048)

40
src/floppy/fdc.c
View File

@@ -9,7 +9,7 @@
* Implementation of the NEC uPD-765 and compatible floppy disk
* controller.
*
* Version: @(#)fdc.c 1.0.7 2018/04/26
* Version: @(#)fdc.c 1.0.8 2018/05/09
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
@@ -613,7 +613,7 @@ void
fdc_seek(fdc_t *fdc, int drive, int params)
{
fdd_seek(real_drive(fdc, drive), params);
fdc->time = 5000 * TIMER_SHIFT;
fdc->time = 5000LL * (1 << TIMER_SHIFT);
fdc->stat |= (1 << fdc->drive);
}
@@ -992,6 +992,10 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->read_track_sector.id.h = fdc->params[2];
fdc->read_track_sector.id.r = 1;
fdc->read_track_sector.id.n = fdc->params[4];
if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
fdc_noidam(fdc);
return;
}
fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_FIRST, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]);
break;
case 3: /*Specify*/
@@ -1017,12 +1021,20 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
case 5: /*Write data*/
case 9: /*Write deleted data*/
fdc_io_command_phase1(fdc, 1);
if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
fdc_noidam(fdc);
return;
}
fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]);
break;
case 0x11: /*Scan equal*/
case 0x19: /*Scan low or equal*/
case 0x1D: /*Scan high or equal*/
fdc_io_command_phase1(fdc, 1);
if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
fdc_noidam(fdc);
return;
}
fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]);
break;
case 0x16: /*Verify*/
@@ -1032,6 +1044,10 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
case 0xC: /*Read deleted data*/
fdc_io_command_phase1(fdc, 0);
fdc_log("Reading sector (drive %i) (%i) (%i %i %i %i) (%i %i %i)\n", fdc->drive, fdc->params[0], fdc->params[1], fdc->params[2], fdc->params[3], fdc->params[4], fdc->params[5], fdc->params[6], fdc->params[7]);
if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
fdc_noidam(fdc);
return;
}
if (((dma_mode(2) & 0x0C) == 0x00) && !(fdc->flags & FDC_FLAG_PCJR) && fdc->dma) {
/* DMA is in verify mode, treat this like a VERIFY command. */
fdc_log("Verify-mode read!\n");
@@ -1065,7 +1081,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en)
fdc_seek(fdc, fdc->drive, -fdc->max_track);
fdc_log("Recalibrating...\n");
fdc->time = 5000LL;
fdc->time = 5000LL * (1 << TIMER_SHIFT);
fdc->step = fdc->seek_dir = 1;
break;
case 0x0d: /*Format*/
@@ -1119,7 +1135,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc_seek(fdc, fdc->drive, -fdc->params[1]);
fdc->pcn[fdc->params[0] & 3] -= fdc->params[1];
}
fdc->time = 5000LL;
fdc->time = 5000LL * (1 << TIMER_SHIFT);
fdc->step = 1;
} else {
fdc->st0 = 0x20 | (fdc->params[0] & 7);
@@ -1146,7 +1162,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->seek_dir = 1;
fdc_seek(fdc, fdc->drive, fdc->params[1] - fdc->pcn[fdc->params[0] & 3]);
fdc->pcn[fdc->params[0] & 3] = fdc->params[1];
fdc->time = 5000LL;
fdc->time = 5000LL * (1 << TIMER_SHIFT);
fdc->step = 1;
fdc_log("fdc->time = %i\n", fdc->time);
}
@@ -1447,7 +1463,9 @@ fdc_callback(void *priv)
fdc->inread = 1;
return;
case 4: /*Sense drive status*/
fdc->res[10] = (fdc->params[0] & 7) | 0x28;
fdc->res[10] = (fdc->params[0] & 7) | 0x20;
if (fdd_is_double_sided(real_drive(fdc, fdc->drive)))
fdc->res[10] |= 0x08;
if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) {
if (fdd_track0(real_drive(fdc, fdc->drive)))
fdc->res[10] |= 0x10;
@@ -1539,10 +1557,14 @@ fdc_callback(void *priv)
fdc_poll_readwrite_finish(fdc, compare);
return;
}
if ((fdc->command & 0x80) && (fdd_get_head(real_drive(fdc, fdc->drive)) == 0)) {
if ((fdd_get_head(real_drive(fdc, fdc->drive)) == 0)) {
fdc->sector = 1;
fdc->head |= 1;
fdd_set_head(real_drive(fdc, fdc->drive), 1);
if (!fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
fdc_noidam(fdc);
return;
}
}
} else if (fdc->sector < fdc->params[5])
fdc->sector++;
@@ -1688,6 +1710,10 @@ fdc_error(fdc_t *fdc, int st5, int st6)
fdc->fintr = 0;
fdc->stat = 0xD0;
fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive;
if (fdc->head && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
pclog("Head 1 on 1-sided drive\n");
fdc->st0 |= 0x08;
}
fdc->res[5] = st5;
fdc->res[6] = st6;
fdc_log("FDC Error: %02X %02X %02X\n", fdc->res[4], fdc->res[5], fdc->res[6]);

42
src/floppy/fdd.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the floppy drive emulation.
*
* Version: @(#)fdd.c 1.0.7 2018/04/28
* Version: @(#)fdd.c 1.0.9 2018/05/13
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -36,10 +36,12 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../machine/machine.h"
#include "../mem.h"
@@ -227,6 +229,27 @@ static const struct
}
};
#ifdef ENABLE_FDD_LOG
int fdd_do_log = ENABLE_FDD_LOG;
#endif
static void
fdd_log(const char *fmt, ...)
{
#ifdef ENABLE_FDD_LOG
va_list ap;
if (fdd_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
char *fdd_getname(int type)
{
return (char *)drive_types[type].name;
@@ -358,7 +381,7 @@ int fdd_can_read_medium(int drive)
{
int hole = fdd_hole(drive);
hole = 1 << (hole + 3);
hole = 1 << (hole + 4);
return (drive_types[fdd[drive].type].flags & hole) ? 1 : 0;
}
@@ -410,11 +433,16 @@ int fdd_is_double_sided(int drive)
void fdd_set_head(int drive, int head)
{
fdd[drive].head = head;
if (head && !fdd_is_double_sided(drive))
fdd[drive].head = 0;
else
fdd[drive].head = head;
}
int fdd_get_head(int drive)
{
if (!fdd_is_double_sided(drive))
return 0;
return fdd[drive].head;
}
@@ -456,7 +484,7 @@ void fdd_load(int drive, wchar_t *fn)
wchar_t *p;
FILE *f;
pclog("FDD: loading drive %d with '%ls'\n", drive, fn);
fdd_log("FDD: loading drive %d with '%ls'\n", drive, fn);
if (!fn) return;
p = plat_get_extension(fn);
@@ -481,7 +509,7 @@ void fdd_load(int drive, wchar_t *fn)
}
c++;
}
pclog("FDD: could not load '%ls' %s\n",fn,p);
fdd_log("FDD: could not load '%ls' %s\n",fn,p);
drive_empty[drive] = 1;
fdd_set_head(drive, 0);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
@@ -490,7 +518,7 @@ void fdd_load(int drive, wchar_t *fn)
void fdd_close(int drive)
{
pclog("FDD: closing drive %d\n", drive);
fdd_log("FDD: closing drive %d\n", drive);
if (loaders[driveloaders[drive]].close) loaders[driveloaders[drive]].close(drive);
drive_empty[drive] = 1;

40
src/floppy/fdd_86f.c
View File

@@ -10,7 +10,7 @@
* data in the form of FM/MFM-encoded transitions) which also
* forms the core of the emulator's floppy disk emulation.
*
* Version: @(#)fdd_86f.c 1.0.8 2018/04/11
* Version: @(#)fdd_86f.c 1.0.9 2018/05/06
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -55,7 +55,9 @@
#include "fdd.h"
#include "fdc.h"
#include "fdd_86f.h"
#ifdef D86F_COMPRESS
#include "lzf/lzf.h"
#endif
/*
@@ -226,7 +228,9 @@ typedef struct {
uint16_t current_bit[2];
int cur_track;
uint32_t error_condition;
#ifdef D86F_COMPRESS
int is_compressed;
#endif
int id_found;
wchar_t original_file_name[2048];
uint8_t *filebuf;
@@ -3085,9 +3089,11 @@ d86f_writeback(int drive)
d86f_t *dev = d86f[drive];
uint8_t header[32];
int header_size;
#ifdef D86F_COMPRESS
uint32_t len;
int ret = 0;
FILE *cf;
#endif
header_size = d86f_header_size(drive);
if (! dev->f) return;
@@ -3101,6 +3107,7 @@ d86f_writeback(int drive)
d86f_write_tracks(drive, &dev->f, NULL);
#ifdef D86F_COMPRESS
if (dev->is_compressed) {
/* The image is compressed. */
@@ -3129,6 +3136,7 @@ d86f_writeback(int drive)
free(dev->outbuf);
free(dev->filebuf);
}
#endif
}
@@ -3451,13 +3459,15 @@ d86f_export(int drive, wchar_t *fn)
void
d86f_load(int drive, wchar_t *fn)
{
wchar_t temp_file_name[2048];
d86f_t *dev = d86f[drive];
uint32_t magic = 0;
uint32_t len = 0;
uint16_t temp = 0;
int i = 0, j = 0;
#ifdef D86F_COMPRESS
wchar_t temp_file_name[2048];
uint16_t temp = 0;
FILE *tf;
#endif
d86f_unregister(drive);
@@ -3534,8 +3544,12 @@ d86f_load(int drive, wchar_t *fn)
}
}
#ifdef D86F_COMPRESS
dev->is_compressed = (magic == 0x66623638) ? 1 : 0;
if ((len < 51052) && !dev->is_compressed) {
#else
if (len < 51052) {
#endif
/* File too small, abort. */
fclose(dev->f);
dev->f = NULL;
@@ -3568,6 +3582,7 @@ d86f_load(int drive, wchar_t *fn)
}
#endif
#ifdef D86F_COMPRESS
if (dev->is_compressed) {
memcpy(temp_file_name, drive ? nvr_path(L"TEMP$$$1.$$$") : nvr_path(L"TEMP$$$0.$$$"), 256);
memcpy(dev->original_file_name, fn, (wcslen(fn) << 1) + 2);
@@ -3614,15 +3629,17 @@ d86f_load(int drive, wchar_t *fn)
dev->f = plat_fopen(temp_file_name, L"rb+");
}
#endif
if (dev->disk_flags & 0x100) {
/* Zoned disk. */
d86f_log("86F: Disk is zoned (Apple or Sony)\n");
fclose(dev->f);
dev->f = NULL;
if (dev->is_compressed) {
#ifdef D86F_COMPRESS
if (dev->is_compressed)
plat_remove(temp_file_name);
}
#endif
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
free(dev);
return;
@@ -3633,8 +3650,10 @@ d86f_load(int drive, wchar_t *fn)
d86f_log("86F: Disk is fixed-RPM but zone type is not 0\n");
fclose(dev->f);
dev->f = NULL;
#ifdef D86F_COMPRESS
if (dev->is_compressed)
plat_remove(temp_file_name);
#endif
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
free(dev);
return;
@@ -3649,9 +3668,11 @@ d86f_load(int drive, wchar_t *fn)
fclose(dev->f);
dev->f = NULL;
#ifdef D86F_COMPRESS
if (dev->is_compressed)
dev->f = plat_fopen(temp_file_name, L"rb");
else
else
#endif
dev->f = plat_fopen(fn, L"rb");
}
@@ -3736,9 +3757,14 @@ d86f_load(int drive, wchar_t *fn)
d86f_common_handlers(drive);
drives[drive].format = d86f_format;
#ifdef D86F_COMPRESS
d86f_log("86F: Disk is %scompressed and does%s have surface description data\n",
dev->is_compressed ? "" : "not ",
d86f_has_surface_desc(drive) ? "" : " not");
#else
d86f_log("86F: Disk does%s have surface description data\n",
d86f_has_surface_desc(drive) ? "" : " not");
#endif
}
@@ -3796,8 +3822,10 @@ d86f_close(int drive)
fclose(dev->f);
dev->f = NULL;
}
#ifdef D86F_COMPRESS
if (dev->is_compressed)
plat_remove(temp_file_name);
#endif
}

31
src/floppy/fdd_fdi.c
View File

@@ -9,7 +9,7 @@
* Implementation of the FDI floppy stream image format
* interface to the FDI2RAW module.
*
* Version: @(#)fdd_fdi.c 1.0.2 2018/03/17
* Version: @(#)fdd_fdi.c 1.0.3 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -37,11 +37,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../plat.h"
#include "fdd.h"
@@ -71,6 +73,27 @@ static fdi_t *fdi[FDD_NUM];
static fdc_t *fdi_fdc;
#ifdef ENABLE_FDI_LOG
int fdi_do_log = ENABLE_FDI_LOG;
#endif
static void
fdi_log(const char *fmt, ...)
{
#ifdef ENABLE_FDI_LOG
va_list ap;
if (fdi_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static uint16_t
disk_flags(int drive)
{
@@ -339,7 +362,7 @@ fdi_load(int drive, wchar_t *fn)
header[25] = 0;
if (strcmp(header, "Formatted Disk Image file") != 0) {
/* This is a Japanese FDI file. */
pclog("fdi_load(): Japanese FDI file detected, redirecting to IMG loader\n");
fdi_log("fdi_load(): Japanese FDI file detected, redirecting to IMG loader\n");
fclose(dev->f);
free(dev);
img_load(drive, fn);
@@ -372,7 +395,7 @@ fdi_load(int drive, wchar_t *fn)
drives[drive].seek = fdi_seek;
pclog("Loaded as FDI\n");
fdi_log("Loaded as FDI\n");
}

47
src/floppy/fdd_imd.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the IMD floppy image format.
*
* Version: @(#)fdd_imd.c 1.0.6 2018/03/19
* Version: @(#)fdd_imd.c 1.0.7 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -34,11 +34,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../plat.h"
#include "fdd.h"
@@ -82,6 +84,27 @@ static imd_t *imd[FDD_NUM];
static fdc_t *imd_fdc;
#ifdef ENABLE_IMD_LOG
int imd_do_log = ENABLE_IMD_LOG;
#endif
static void
imd_log(const char *fmt, ...)
{
#ifdef ENABLE_IMD_LOG
va_list ap;
if (imd_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static uint32_t
get_raw_tsize(int side_flags, int slower_rpm)
{
@@ -617,13 +640,13 @@ imd_load(int drive, wchar_t *fn)
fseek(dev->f, 0, SEEK_SET);
fread(&magic, 1, 4, dev->f);
if (magic != 0x20444D49) {
pclog("IMD: Not a valid ImageDisk image\n");
imd_log("IMD: Not a valid ImageDisk image\n");
fclose(dev->f);
free(dev);;
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
return;
} else {
pclog("IMD: Valid ImageDisk image\n");
imd_log("IMD: Valid ImageDisk image\n");
}
fseek(dev->f, 0, SEEK_END);
@@ -635,24 +658,24 @@ imd_load(int drive, wchar_t *fn)
buffer2 = strchr(buffer, 0x1A);
if (buffer2 == NULL) {
pclog("IMD: No ASCII EOF character\n");
imd_log("IMD: No ASCII EOF character\n");
fclose(dev->f);
free(dev);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
return;
} else {
pclog("IMD: ASCII EOF character found at offset %08X\n", buffer2 - buffer);
imd_log("IMD: ASCII EOF character found at offset %08X\n", buffer2 - buffer);
}
buffer2++;
if ((buffer2 - buffer) == fsize) {
pclog("IMD: File ends after ASCII EOF character\n");
imd_log("IMD: File ends after ASCII EOF character\n");
fclose(dev->f);
free(dev);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
return;
} else {
pclog("IMD: File continues after ASCII EOF character\n");
imd_log("IMD: File continues after ASCII EOF character\n");
}
dev->start_offs = (buffer2 - buffer);
@@ -691,7 +714,7 @@ imd_load(int drive, wchar_t *fn)
dev->tracks[track][side].side_flags |= 0x20;
if ((dev->tracks[track][side].side_flags & 7) == 1)
dev->tracks[track][side].side_flags |= 0x20;
/* pclog("Side flags for (%02i)(%01i): %02X\n", track, side, dev->tracks[track][side].side_flags); */
/* imd_log("Side flags for (%02i)(%01i): %02X\n", track, side, dev->tracks[track][side].side_flags); */
dev->tracks[track][side].is_present = 1;
dev->tracks[track][side].file_offs = (buffer2 - buffer);
memcpy(dev->tracks[track][side].params, buffer2, 5);
@@ -766,7 +789,7 @@ imd_load(int drive, wchar_t *fn)
dev->disk_flags |= (3 << 5);
if ((raw_tsize - track_total + (mfm ? 146 : 73)) < (minimum_gap3 + minimum_gap4)) {
/* If we can't fit the sectors with a reasonable minimum gap even at 2% slower RPM, abort. */
pclog("IMD: Unable to fit the %i sectors in a track\n", track_spt);
imd_log("IMD: Unable to fit the %i sectors in a track\n", track_spt);
fclose(dev->f);
free(dev);
imd[drive] = NULL;
@@ -779,7 +802,7 @@ imd_load(int drive, wchar_t *fn)
} else if (gap3_sizes[converted_rate][sector_size][track_spt] != 0x00)
dev->tracks[track][side].gap3_len = gap3_sizes[converted_rate][sector_size][track_spt];
/* pclog("GAP3 length for (%02i)(%01i): %i bytes\n", track, side, dev->tracks[track][side].gap3_len); */
/* imd_log("GAP3 length for (%02i)(%01i): %i bytes\n", track, side, dev->tracks[track][side].gap3_len); */
if (track > dev->track_count)
dev->track_count = track;
@@ -797,7 +820,7 @@ imd_load(int drive, wchar_t *fn)
if (dev->sides == 2)
dev->disk_flags |= 8;
/* pclog("%i tracks, %i sides\n", dev->track_count, dev->sides); */
/* imd_log("%i tracks, %i sides\n", dev->track_count, dev->sides); */
/* Attach this format to the D86F engine. */
d86f_handler[drive].disk_flags = disk_flags;

63
src/floppy/fdd_img.c
View File

@@ -13,7 +13,7 @@
* re-merged with the other files. Much of it is generic to
* all formats.
*
* Version: @(#)fdd_img.c 1.0.6 2018/04/28
* Version: @(#)fdd_img.c 1.0.8 2018/05/09
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -41,11 +41,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../config.h"
#include "../plat.h"
@@ -297,6 +299,27 @@ const int gap3_sizes[5][8][48] = { { { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } } };
#ifdef ENABLE_IMG_LOG
int img_do_log = ENABLE_IMG_LOG;
#endif
static void
img_log(const char *fmt, ...)
{
#ifdef ENABLE_IMG_LOG
va_list ap;
if (img_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/* Generic */
static int
sector_size_code(int sector_size)
@@ -605,7 +628,7 @@ img_load(int drive, wchar_t *fn)
uint8_t bpb_mid; /* Media type ID. */
uint8_t bpb_sectors;
uint8_t bpb_sides;
uint8_t fdi, cqm, fdf, ddi;
uint8_t cqm, ddi, fdf, fdi;
uint16_t comment_len = 0;
int16_t block_len = 0;
uint32_t cur_pos = 0;
@@ -646,7 +669,7 @@ img_load(int drive, wchar_t *fn)
writeprot[drive] = 1;
fwriteprot[drive] = writeprot[drive];
fdi = cqm = ddi = 0;
cqm = ddi = fdf = fdi = 0;
dev->interleave = dev->skew = 0;
@@ -658,7 +681,7 @@ img_load(int drive, wchar_t *fn)
if (! wcscasecmp(ext, L"FDI")) {
/* This is a Japanese FDI image, so let's read the header */
pclog("img_load(): File is a Japanese FDI image...\n");
img_log("img_load(): File is a Japanese FDI image...\n");
fseek(dev->f, 0x10, SEEK_SET);
(void)fread(&bpb_bps, 1, 2, dev->f);
fseek(dev->f, 0x0C, SEEK_SET);
@@ -695,7 +718,7 @@ img_load(int drive, wchar_t *fn)
if ((first_byte == 0x1A) && (second_byte == 'F') &&
(third_byte == 'D') && (fourth_byte == 'F')) {
/* This is a FDF image. */
pclog("img_load(): File is a FDF image...\n");
img_log("img_load(): File is a FDF image...\n");
fwriteprot[drive] = writeprot[drive] = 1;
fclose(dev->f);
dev->f = plat_fopen(fn, L"rb");
@@ -717,10 +740,10 @@ img_load(int drive, wchar_t *fn)
/* Skip first 3 bytes - their meaning is unknown to us but could be a checksum. */
first_byte = fgetc(dev->f);
fread(&track_bytes, 1, 2, dev->f);
pclog("Block header: %02X %04X ", first_byte, track_bytes);
img_log("Block header: %02X %04X ", first_byte, track_bytes);
/* Read the length of encoded data block. */
fread(&track_bytes, 1, 2, dev->f);
pclog("%04X\n", track_bytes);
img_log("%04X\n", track_bytes);
}
if (feof(dev->f)) break;
@@ -771,10 +794,10 @@ img_load(int drive, wchar_t *fn)
/* Skip first 3 bytes - their meaning is unknown to us but could be a checksum. */
first_byte = fgetc(dev->f);
fread(&track_bytes, 1, 2, dev->f);
pclog("Block header: %02X %04X ", first_byte, track_bytes);
img_log("Block header: %02X %04X ", first_byte, track_bytes);
/* Read the length of encoded data block. */
fread(&track_bytes, 1, 2, dev->f);
pclog("%04X\n", track_bytes);
img_log("%04X\n", track_bytes);
}
if (feof(dev->f)) break;
@@ -835,7 +858,7 @@ img_load(int drive, wchar_t *fn)
if (((first_byte == 'C') && (second_byte == 'Q')) ||
((first_byte == 'c') && (second_byte == 'q'))) {
pclog("img_load(): File is a CopyQM image...\n");
img_log("img_load(): File is a CopyQM image...\n");
fwriteprot[drive] = writeprot[drive] = 1;
fclose(dev->f);
dev->f = plat_fopen(fn, L"rb");
@@ -900,7 +923,7 @@ img_load(int drive, wchar_t *fn)
}
}
}
pclog("Finished reading CopyQM image data\n");
img_log("Finished reading CopyQM image data\n");
cqm = 1;
dev->disk_at_once = 1;
@@ -910,10 +933,10 @@ img_load(int drive, wchar_t *fn)
dev->disk_at_once = 0;
/* Read the BPB */
if (ddi) {
pclog("img_load(): File is a DDI image...\n");
img_log("img_load(): File is a DDI image...\n");
fwriteprot[drive] = writeprot[drive] = 1;
} else
pclog("img_load(): File is a raw image...\n");
img_log("img_load(): File is a raw image...\n");
fseek(dev->f, dev->base + 0x0B, SEEK_SET);
fread(&bpb_bps, 1, 2, dev->f);
fseek(dev->f, dev->base + 0x13, SEEK_SET);
@@ -942,7 +965,7 @@ jump_if_fdf:
dev->sides = 2;
dev->sector_size = 2;
pclog("BPB reports %i sides and %i bytes per sector (%i sectors total)\n",
img_log("BPB reports %i sides and %i bytes per sector (%i sectors total)\n",
bpb_sides, bpb_bps, bpb_total);
guess = (bpb_sides < 1);
@@ -1069,7 +1092,7 @@ jump_if_fdf:
dev->sectors = 42;
dev->tracks = 86;
} else {
pclog("Image is bigger than can fit on an ED floppy, ejecting...\n");
img_log("Image is bigger than can fit on an ED floppy, ejecting...\n");
fclose(dev->f);
free(dev);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
@@ -1119,13 +1142,13 @@ jump_if_fdf:
dev->dmf = 0;
}
pclog("Image parameters: bit rate 300: %f, temporary rate: %i, hole: %i, DMF: %i, XDF type: %i\n", bit_rate_300, temp_rate, dev->disk_flags >> 1, dev->dmf, dev->xdf_type);
img_log("Image parameters: bit rate 300: %f, temporary rate: %i, hole: %i, DMF: %i, XDF type: %i\n", bit_rate_300, temp_rate, dev->disk_flags >> 1, dev->dmf, dev->xdf_type);
break;
}
}
if (temp_rate == 0xFF) {
pclog("Image is bigger than can fit on an ED floppy, ejecting...\n");
img_log("Image is bigger than can fit on an ED floppy, ejecting...\n");
fclose(dev->f);
free(dev);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
@@ -1138,7 +1161,7 @@ jump_if_fdf:
else
dev->gap3_size = gap3_sizes[temp_rate][dev->sector_size][dev->sectors];
if (! dev->gap3_size) {
pclog("ERROR: Floppy image of unknown format was inserted into drive %c:!\n", drive + 0x41);
img_log("ERROR: Floppy image of unknown format was inserted into drive %c:!\n", drive + 0x41);
fclose(dev->f);
free(dev);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
@@ -1162,7 +1185,7 @@ jump_if_fdf:
dev->is_cqm = cqm;
pclog("Disk flags: %i, track flags: %i\n",
img_log("Disk flags: %i, track flags: %i\n",
dev->disk_flags, dev->track_flags);
/* Set up the drive unit. */

45
src/floppy/fdd_json.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the PCjs JSON floppy image format.
*
* Version: @(#)fdd_json.c 1.0.4 2018/03/17
* Version: @(#)fdd_json.c 1.0.5 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -44,11 +44,13 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../plat.h"
#include "fdd.h"
@@ -104,6 +106,27 @@ typedef struct {
static json_t *images[FDD_NUM];
#ifdef ENABLE_JSON_LOG
int json_do_log = ENABLE_JSON_LOG;
#endif
static void
json_log(const char *fmt, ...)
{
#ifdef ENABLE_JSON_LOG
va_list ap;
if (json_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void
handle(json_t *dev, char *name, char *str)
{
@@ -182,7 +205,7 @@ handle(json_t *dev, char *name, char *str)
static int
unexpect(int c, int state, int level)
{
pclog("JSON: Unexpected '%c' in state %d/%d.\n", c, state, level);
json_log("JSON: Unexpected '%c' in state %d/%d.\n", c, state, level);
return(-1);
}
@@ -196,7 +219,7 @@ load_image(json_t *dev)
char *ptr;
if (dev->f == NULL) {
pclog("JSON: no file loaded!\n");
json_log("JSON: no file loaded!\n");
return(0);
}
@@ -373,7 +396,7 @@ json_seek(int drive, int track)
int interleave_type;
if (dev->f == NULL) {
pclog("JSON: seek: no file loaded!\n");
json_log("JSON: seek: no file loaded!\n");
return;
}
@@ -536,7 +559,7 @@ json_load(int drive, wchar_t *fn)
/* Load all sectors from the image file. */
if (! load_image(dev)) {
pclog("JSON: failed to initialize\n");
json_log("JSON: failed to initialize\n");
(void)fclose(dev->f);
free(dev);
images[drive] = NULL;
@@ -544,7 +567,7 @@ json_load(int drive, wchar_t *fn)
return;
}
pclog("JSON(%d): %ls (%i tracks, %i sides, %i sectors)\n",
json_log("JSON(%d): %ls (%i tracks, %i sides, %i sectors)\n",
drive, fn, dev->tracks, dev->sides, dev->spt[0][0]);
/*
@@ -601,7 +624,7 @@ json_load(int drive, wchar_t *fn)
}
if (temp_rate == 0xff) {
pclog("JSON: invalid image (temp_rate=0xff)\n");
json_log("JSON: invalid image (temp_rate=0xff)\n");
(void)fclose(dev->f);
dev->f = NULL;
free(dev);
@@ -622,7 +645,7 @@ json_load(int drive, wchar_t *fn)
dev->gap3_len = fdd_get_gap3_size(temp_rate,sec->size,dev->spt[0][0]);
if (! dev->gap3_len) {
pclog("JSON: image of unknown format was inserted into drive %c:!\n",
json_log("JSON: image of unknown format was inserted into drive %c:!\n",
'C'+drive);
(void)fclose(dev->f);
dev->f = NULL;
@@ -636,9 +659,9 @@ json_load(int drive, wchar_t *fn)
if (temp_rate & 0x04)
dev->track_flags |= 0x20; /* RPM */
pclog(" disk_flags: 0x%02x, track_flags: 0x%02x, GAP3 length: %i\n",
json_log(" disk_flags: 0x%02x, track_flags: 0x%02x, GAP3 length: %i\n",
dev->disk_flags, dev->track_flags, dev->gap3_len);
pclog(" bit rate 300: %.2f, temporary rate: %i, hole: %i, DMF: %i\n",
json_log(" bit rate 300: %.2f, temporary rate: %i, hole: %i, DMF: %i\n",
bit_rate, temp_rate, (dev->disk_flags >> 1), dev->dmf);
/* Set up handlers for 86F layer. */

59
src/floppy/fdd_td0.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the Teledisk floppy image format.
*
* Version: @(#)fdd_td0.c 1.0.5 2018/03/19
* Version: @(#)fdd_td0.c 1.0.6 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -46,11 +46,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../plat.h"
#include "fdd.h"
@@ -218,6 +220,27 @@ static const uint8_t d_len[256] = {
static td0_t *td0[FDD_NUM];
#ifdef ENABLE_TD0_LOG
int td0_do_log = ENABLE_TD0_LOG;
#endif
static void
td0_log(const char *fmt, ...)
{
#ifdef ENABLE_TD0_LOG
va_list ap;
if (td0_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void
fdd_image_read(int drive, char *buffer, uint32_t offset, uint32_t len)
{
@@ -611,7 +634,7 @@ td0_initialize(int drive)
int i, j, k;
if (dev->f == NULL) {
pclog("TD0: Attempted to initialize without loading a file first\n");
td0_log("TD0: Attempted to initialize without loading a file first\n");
return(0);
}
@@ -619,12 +642,12 @@ td0_initialize(int drive)
file_size = ftell(dev->f);
if (file_size < 12) {
pclog("TD0: File is too small to even contain the header\n");
td0_log("TD0: File is too small to even contain the header\n");
return(0);
}
if (file_size > TD0_MAX_BUFSZ) {
pclog("TD0: File exceeds the maximum size\n");
td0_log("TD0: File exceeds the maximum size\n");
return(0);
}
@@ -633,13 +656,13 @@ td0_initialize(int drive)
head_count = header[9];
if (header[0] == 't') {
pclog("TD0: File is compressed\n");
td0_log("TD0: File is compressed\n");
disk_decode.fdd_file = dev->f;
state_init_Decode(&disk_decode);
disk_decode.fdd_file_offset = 12;
state_Decode(&disk_decode, dev->imagebuf, TD0_MAX_BUFSZ);
} else {
pclog("TD0: File is uncompressed\n");
td0_log("TD0: File is uncompressed\n");
fseek(dev->f, 12, SEEK_SET);
fread(dev->imagebuf, 1, file_size - 12, dev->f);
}
@@ -650,14 +673,14 @@ td0_initialize(int drive)
track_spt = dev->imagebuf[offset];
if (track_spt == 255) {
/* Empty file? */
pclog("TD0: File has no tracks\n");
td0_log("TD0: File has no tracks\n");
return(0);
}
density = (header[5] >> 1) & 3;
if (density == 3) {
pclog("TD0: Unknown density\n");
td0_log("TD0: Unknown density\n");
return(0);
}
@@ -725,7 +748,7 @@ td0_initialize(int drive)
size = 128 << hs[3];
if ((total_size + size) >= TD0_MAX_BUFSZ) {
pclog("TD0: Processed buffer overflow\n");
td0_log("TD0: Processed buffer overflow\n");
return(0);
}
@@ -735,7 +758,7 @@ td0_initialize(int drive)
offset += 3;
switch (hs[8]) {
default:
pclog("TD0: Image uses an unsupported sector data encoding\n");
td0_log("TD0: Image uses an unsupported sector data encoding\n");
return(0);
case 0:
@@ -803,7 +826,7 @@ td0_initialize(int drive)
dev->disk_flags |= (3 << 5);
if ((raw_tsize - track_size + (fm ? 73 : 146)) < (minimum_gap3 + minimum_gap4)) {
/* If we can't fit the sectors with a reasonable minimum gap even at 2% slower RPM, abort. */
pclog("TD0: Unable to fit the %i sectors in a track\n", track_spt);
td0_log("TD0: Unable to fit the %i sectors in a track\n", track_spt);
return 0;
}
}
@@ -814,7 +837,7 @@ td0_initialize(int drive)
}
if ((dev->disk_flags & 0x60) == 0x60)
pclog("TD0: Disk will rotate 2% below perfect RPM\n");
td0_log("TD0: Disk will rotate 2% below perfect RPM\n");
dev->tracks = track_count + 1;
@@ -836,7 +859,7 @@ td0_initialize(int drive)
dev->current_side_flags[0] = dev->side_flags[0][0];
dev->current_side_flags[1] = dev->side_flags[0][1];
pclog("TD0: File loaded: %i tracks, %i sides, disk flags: %02X, side flags: %02X, %02X, GAP3 length: %02X\n", dev->tracks, dev->sides, dev->disk_flags, dev->current_side_flags[0], dev->current_side_flags[1], dev->gap3_len);
td0_log("TD0: File loaded: %i tracks, %i sides, disk flags: %02X, side flags: %02X, %02X, GAP3 length: %02X\n", dev->tracks, dev->sides, dev->disk_flags, dev->current_side_flags[0], dev->current_side_flags[1], dev->gap3_len);
return(1);
}
@@ -1136,13 +1159,13 @@ td0_load(int drive, wchar_t *fn)
fwriteprot[drive] = writeprot[drive];
if (! dsk_identify(drive)) {
pclog("TD0: Not a valid Teledisk image\n");
td0_log("TD0: Not a valid Teledisk image\n");
fclose(dev->f);
dev->f = NULL;
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
return;
} else {
pclog("TD0: Valid Teledisk image\n");
td0_log("TD0: Valid Teledisk image\n");
}
/* Allocate the processing buffers. */
@@ -1153,14 +1176,14 @@ td0_load(int drive, wchar_t *fn)
memset(dev->processed_buf, 0x00, i);
if (! td0_initialize(drive)) {
pclog("TD0: Failed to initialize\n");
td0_log("TD0: Failed to initialize\n");
fclose(dev->f);
free(dev->imagebuf);
free(dev->processed_buf);
memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
return;
} else {
pclog("TD0: Initialized successfully\n");
td0_log("TD0: Initialized successfully\n");
}
/* Attach this format to the D86F engine. */

162
src/floppy/fdi2raw.c
View File

@@ -12,7 +12,7 @@
* addition of get_last_head and C++ callability by Thomas
* Harte.
*
* Version: @(#)fdi2raw.c 1.0.2 2018/03/12
* Version: @(#)fdi2raw.c 1.0.3 2018/04/29
*
* Authors: Toni Wilen, <twilen@arabuusimiehet.com>
* and Vincent Joguin,
@@ -41,8 +41,9 @@
* USA.
*/
#define STATIC_INLINE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
@@ -53,6 +54,7 @@
#include "zfile.h"*/
/* ELSE */
#define xmalloc malloc
#define HAVE_STDARG_H
#include "../86box.h"
#include "fdi2raw.h"
@@ -62,6 +64,27 @@
#undef VERBOSE
#ifdef ENABLE_FDI2RAW_LOG
int fdi2raw_do_log = ENABLE_FDI2RAW_LOG;
#endif
static void
fdi2raw_log(const char *fmt, ...)
{
#ifdef ENABLE_FDI2RAW_LOG
va_list ap;
if (fdi2raw_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
#ifdef DEBUG
static char *datalog(uae_u8 *src, int len)
{
@@ -86,9 +109,6 @@ static char *datalog(uae_u8 *src, int len)
static char *datalog(uae_u8 *src, int len) { return ""; }
#endif
#define outlog pclog
#define debuglog pclog
static int fdi_allocated;
#ifdef DEBUG
static void fdi_free (void *p)
@@ -333,13 +353,13 @@ static int decode_raw_track (FDI *fdi)
/* unknown track */
static void zxx (FDI *fdi)
{
outlog ("track %d: unknown track type 0x%02.2X\n", fdi->current_track, fdi->track_type);
fdi2raw_log("track %d: unknown track type 0x%02.2X\n", fdi->current_track, fdi->track_type);
}
/* unsupported track */
#if 0
static void zyy (FDI *fdi)
{
outlog ("track %d: unsupported track type 0x%02.2X\n", fdi->current_track, fdi->track_type);
fdi2raw_log("track %d: unsupported track type 0x%02.2X\n", fdi->current_track, fdi->track_type);
}
#endif
/* empty track */
@@ -351,17 +371,9 @@ static void track_empty (FDI *fdi)
/* unknown sector described type */
static void dxx (FDI *fdi)
{
outlog ("\ntrack %d: unknown sector described type 0x%02.2X\n", fdi->current_track, fdi->track_type);
fdi2raw_log("\ntrack %d: unknown sector described type 0x%02.2X\n", fdi->current_track, fdi->track_type);
fdi->err = 1;
}
/* unsupported sector described type */
#if 0
static void dyy (FDI *fdi)
{
outlog ("\ntrack %d: unsupported sector described 0x%02.2X\n", fdi->current_track, fdi->track_type);
fdi->err = 1;
}
#endif
/* add position of mfm sync bit */
static void add_mfm_sync_bit (FDI *fdi)
{
@@ -371,12 +383,12 @@ static void add_mfm_sync_bit (FDI *fdi)
}
fdi->mfmsync_buffer[fdi->mfmsync_offset++] = fdi->out;
if (fdi->out == 0) {
outlog ("illegal position for mfm sync bit, offset=%d\n",fdi->out);
fdi2raw_log("illegal position for mfm sync bit, offset=%d\n",fdi->out);
fdi->err = 1;
}
if (fdi->mfmsync_offset >= MAX_MFM_SYNC_BUFFER) {
fdi->mfmsync_offset = 0;
outlog ("mfmsync buffer overflow\n");
fdi2raw_log("mfmsync buffer overflow\n");
fdi->err = 1;
}
fdi->out++;
@@ -397,7 +409,7 @@ static void bit_add (FDI *fdi, int bit)
fdi->track_dst[BIT_BYTEOFFSET] |= (1 << BIT_BITOFFSET);
fdi->out++;
if (fdi->out >= MAX_DST_BUFFER * 8) {
outlog ("destination buffer overflow\n");
fdi2raw_log("destination buffer overflow\n");
fdi->err = 1;
fdi->out = 1;
}
@@ -412,13 +424,13 @@ static void bit_mfm_add (FDI *fdi, int bit)
static void bit_drop_next (FDI *fdi)
{
if (fdi->nextdrop > 0) {
outlog("multiple bit_drop_next() called");
fdi2raw_log("multiple bit_drop_next() called");
} else if (fdi->nextdrop < 0) {
fdi->nextdrop = 0;
debuglog(":DNN:");
fdi2raw_log(":DNN:");
return;
}
debuglog(":DN:");
fdi2raw_log(":DN:");
fdi->nextdrop = 1;
}
@@ -426,10 +438,10 @@ static void bit_drop_next (FDI *fdi)
static void bit_dedrop (FDI *fdi)
{
if (fdi->nextdrop) {
outlog("bit_drop_next called before bit_dedrop");
fdi2raw_log("bit_drop_next called before bit_dedrop");
}
fdi->nextdrop = -1;
debuglog(":BDD:");
fdi2raw_log(":BDD:");
}
/* add one byte */
@@ -482,7 +494,7 @@ static void s08(FDI *fdi)
int bytes = *fdi->track_src++;
uae_u8 byte = *fdi->track_src++;
if (bytes == 0) bytes = 256;
debuglog ("s08:len=%d,data=%02.2X",bytes,byte);
fdi2raw_log("s08:len=%d,data=%02.2X",bytes,byte);
while(bytes--) byte_add (fdi, byte);
}
/* RLE MFM-decoded data */
@@ -492,7 +504,7 @@ static void s09(FDI *fdi)
uae_u8 byte = *fdi->track_src++;
if (bytes == 0) bytes = 256;
bit_drop_next (fdi);
debuglog ("s09:len=%d,data=%02.2X",bytes,byte);
fdi2raw_log("s09:len=%d,data=%02.2X",bytes,byte);
while(bytes--) byte_mfm_add (fdi, byte);
}
/* MFM-encoded data */
@@ -501,7 +513,7 @@ static void s0a(FDI *fdi)
int i, bits = (fdi->track_src[0] << 8) | fdi->track_src[1];
uae_u8 b;
fdi->track_src += 2;
debuglog ("s0a:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
fdi2raw_log("s0a:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
while (bits >= 8) {
byte_add (fdi, *fdi->track_src++);
bits -= 8;
@@ -521,7 +533,7 @@ static void s0b(FDI *fdi)
int i, bits = ((fdi->track_src[0] << 8) | fdi->track_src[1]) + 65536;
uae_u8 b;
fdi->track_src += 2;
debuglog ("s0b:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
fdi2raw_log("s0b:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
while (bits >= 8) {
byte_add (fdi, *fdi->track_src++);
bits -= 8;
@@ -542,7 +554,7 @@ static void s0c(FDI *fdi)
uae_u8 b;
fdi->track_src += 2;
bit_drop_next (fdi);
debuglog ("s0c:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
fdi2raw_log("s0c:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
while (bits >= 8) {
byte_mfm_add (fdi, *fdi->track_src++);
bits -= 8;
@@ -563,7 +575,7 @@ static void s0d(FDI *fdi)
uae_u8 b;
fdi->track_src += 2;
bit_drop_next (fdi);
debuglog ("s0d:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
fdi2raw_log("s0d:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8));
while (bits >= 8) {
byte_mfm_add (fdi, *fdi->track_src++);
bits -= 8;
@@ -692,13 +704,13 @@ static int amiga_check_track (FDI *fdi)
trackoffs = (id & 0xff00) >> 8;
if (trackoffs + 1 > drvsec) {
outlog("illegal sector offset %d\n",trackoffs);
fdi2raw_log("illegal sector offset %d\n",trackoffs);
ok = 0;
mbuf = mbuf2;
continue;
}
if ((id >> 24) != 0xff) {
outlog ("sector %d format type %02.2X?\n", trackoffs, id >> 24);
fdi2raw_log("sector %d format type %02.2X?\n", trackoffs, id >> 24);
ok = 0;
}
chksum = odd ^ even;
@@ -717,14 +729,14 @@ static int amiga_check_track (FDI *fdi)
even = getmfmlong (mbuf + 2 * 2);
mbuf += 4 * 2;
if (((odd << 1) | even) != chksum) {
outlog("sector %d header crc error\n", trackoffs);
fdi2raw_log("sector %d header crc error\n", trackoffs);
ok = 0;
mbuf = mbuf2;
continue;
}
outlog("sector %d header crc ok\n", trackoffs);
fdi2raw_log("sector %d header crc ok\n", trackoffs);
if (((id & 0x00ff0000) >> 16) != (uae_u32)fdi->current_track) {
outlog("illegal track number %d <> %d\n",fdi->current_track,(id & 0x00ff0000) >> 16);
fdi2raw_log("illegal track number %d <> %d\n",fdi->current_track,(id & 0x00ff0000) >> 16);
ok++;
mbuf = mbuf2;
continue;
@@ -747,14 +759,14 @@ static int amiga_check_track (FDI *fdi)
}
mbuf += 256 * 2;
if (chksum) {
outlog("sector %d data checksum error\n",trackoffs);
fdi2raw_log("sector %d data checksum error\n",trackoffs);
ok = 0;
} else if (sectable[trackoffs]) {
outlog("sector %d already found?\n", trackoffs);
fdi2raw_log("sector %d already found?\n", trackoffs);
mbuf = mbuf2;
} else {
outlog("sector %d ok\n",trackoffs);
if (slabel) outlog("(non-empty sector header)\n");
fdi2raw_log("sector %d ok\n",trackoffs);
if (slabel) fdi2raw_log("(non-empty sector header)\n");
sectable[trackoffs] = 1;
secwritten++;
if (trackoffs == 9)
@@ -763,7 +775,7 @@ static int amiga_check_track (FDI *fdi)
}
for (i = 0; i < drvsec; i++) {
if (!sectable[i]) {
outlog ("sector %d missing\n", i);
fdi2raw_log("sector %d missing\n", i);
ok = 0;
}
}
@@ -884,7 +896,7 @@ static void amiga_sector_header (FDI *fdi, uae_u8 *header, uae_u8 *data, int sec
static void s20(FDI *fdi)
{
bit_drop_next (fdi);
debuglog ("s20:header=%s,data=%s", datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 16));
fdi2raw_log("s20:header=%s,data=%s", datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 16));
amiga_sector_header (fdi, fdi->track_src, fdi->track_src + 4, 0, 0);
fdi->track_src += 4 + 16;
}
@@ -892,7 +904,7 @@ static void s20(FDI *fdi)
static void s21(FDI *fdi)
{
bit_drop_next (fdi);
debuglog ("s21:header=%s", datalog(fdi->track_src, 4));
fdi2raw_log("s21:header=%s", datalog(fdi->track_src, 4));
amiga_sector_header (fdi, fdi->track_src, 0, 0, 0);
fdi->track_src += 4;
}
@@ -900,14 +912,14 @@ static void s21(FDI *fdi)
static void s22(FDI *fdi)
{
bit_drop_next (fdi);
debuglog("s22:sector=%d,untilgap=%d", fdi->track_src[0], fdi->track_src[1]);
fdi2raw_log("s22:sector=%d,untilgap=%d", fdi->track_src[0], fdi->track_src[1]);
amiga_sector_header (fdi, 0, 0, fdi->track_src[0], fdi->track_src[1]);
fdi->track_src += 2;
}
/* standard 512-byte, CRC-correct Amiga data */
static void s23(FDI *fdi)
{
debuglog("s23:data=%s", datalog (fdi->track_src, 512));
fdi2raw_log("s23:data=%s", datalog (fdi->track_src, 512));
amiga_data (fdi, fdi->track_src);
fdi->track_src += 512;
}
@@ -915,7 +927,7 @@ static void s23(FDI *fdi)
static void s24(FDI *fdi)
{
int shift = *fdi->track_src++;
debuglog("s24:shift=%d,data=%s", shift, datalog (fdi->track_src, 128 << shift));
fdi2raw_log("s24:shift=%d,data=%s", shift, datalog (fdi->track_src, 128 << shift));
amiga_data_raw (fdi, fdi->track_src, 0, 128 << shift);
fdi->track_src += 128 << shift;
}
@@ -923,7 +935,7 @@ static void s24(FDI *fdi)
static void s25(FDI *fdi)
{
int shift = *fdi->track_src++;
debuglog("s25:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 128 << shift));
fdi2raw_log("s25:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 128 << shift));
amiga_data_raw (fdi, fdi->track_src + 4, fdi->track_src, 128 << shift);
fdi->track_src += 4 + (128 << shift);
}
@@ -931,7 +943,7 @@ static void s25(FDI *fdi)
static void s26(FDI *fdi)
{
s21 (fdi);
debuglog("s26:data=%s", datalog (fdi->track_src, 512));
fdi2raw_log("s26:data=%s", datalog (fdi->track_src, 512));
amiga_data (fdi, fdi->track_src);
fdi->track_src += 512;
}
@@ -939,7 +951,7 @@ static void s26(FDI *fdi)
static void s27(FDI *fdi)
{
s22 (fdi);
debuglog("s27:data=%s", datalog (fdi->track_src, 512));
fdi2raw_log("s27:data=%s", datalog (fdi->track_src, 512));
amiga_data (fdi, fdi->track_src);
fdi->track_src += 512;
}
@@ -1060,14 +1072,14 @@ static void s12(FDI *fdi)
static void s13(FDI *fdi)
{
bit_drop_next (fdi);
debuglog ("s13:header=%s", datalog (fdi->track_src, 4));
fdi2raw_log("s13:header=%s", datalog (fdi->track_src, 4));
ibm_sector_header (fdi, fdi->track_src, 0, -1, 1);
fdi->track_src += 4;
}
/* standard mini-extended IBM sector header */
static void s14(FDI *fdi)
{
debuglog ("s14:header=%s", datalog (fdi->track_src, 4));
fdi2raw_log("s14:header=%s", datalog (fdi->track_src, 4));
ibm_sector_header (fdi, fdi->track_src, 0, -1, 0);
fdi->track_src += 4;
}
@@ -1075,33 +1087,33 @@ static void s14(FDI *fdi)
static void s15(FDI *fdi)
{
bit_drop_next (fdi);
debuglog ("s15:sector=%d", *fdi->track_src);
fdi2raw_log("s15:sector=%d", *fdi->track_src);
ibm_sector_header (fdi, 0, 0, *fdi->track_src++, 1);
}
/* standard mini-short IBM sector header */
static void s16(FDI *fdi)
{
debuglog ("s16:track=%d", *fdi->track_src);
fdi2raw_log("s16:track=%d", *fdi->track_src);
ibm_sector_header (fdi, 0, 0, *fdi->track_src++, 0);
}
/* standard CRC-incorrect mini-extended IBM sector header */
static void s17(FDI *fdi)
{
debuglog ("s17:header=%s,crc=%s", datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 2));
fdi2raw_log("s17:header=%s,crc=%s", datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 2));
ibm_sector_header (fdi, fdi->track_src, fdi->track_src + 4, -1, 0);
fdi->track_src += 4 + 2;
}
/* standard CRC-incorrect mini-short IBM sector header */
static void s18(FDI *fdi)
{
debuglog ("s18:sector=%d,header=%s", *fdi->track_src, datalog (fdi->track_src + 1, 4));
fdi2raw_log("s18:sector=%d,header=%s", *fdi->track_src, datalog (fdi->track_src + 1, 4));
ibm_sector_header (fdi, 0, fdi->track_src + 1, *fdi->track_src, 0);
fdi->track_src += 1 + 4;
}
/* standard 512-byte CRC-correct IBM data */
static void s19(FDI *fdi)
{
debuglog ("s19:data=%s", datalog (fdi->track_src , 512));
fdi2raw_log("s19:data=%s", datalog (fdi->track_src , 512));
ibm_data (fdi, fdi->track_src, 0, 512);
fdi->track_src += 512;
}
@@ -1109,7 +1121,7 @@ static void s19(FDI *fdi)
static void s1a(FDI *fdi)
{
int shift = *fdi->track_src++;
debuglog ("s1a:shift=%d,data=%s", shift, datalog (fdi->track_src , 128 << shift));
fdi2raw_log("s1a:shift=%d,data=%s", shift, datalog (fdi->track_src , 128 << shift));
ibm_data (fdi, fdi->track_src, 0, 128 << shift);
fdi->track_src += 128 << shift;
}
@@ -1117,7 +1129,7 @@ static void s1a(FDI *fdi)
static void s1b(FDI *fdi)
{
int shift = *fdi->track_src++;
debuglog ("s1b:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src + (128 << shift), 2), datalog (fdi->track_src , 128 << shift));
fdi2raw_log("s1b:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src + (128 << shift), 2), datalog (fdi->track_src , 128 << shift));
ibm_data (fdi, fdi->track_src, fdi->track_src + (128 << shift), 128 << shift);
fdi->track_src += (128 << shift) + 2;
}
@@ -1323,25 +1335,25 @@ static int handle_sectors_described_track (FDI *fdi)
fdi->index_offset = get_u32(fdi->track_src);
fdi->index_offset >>= 8;
fdi->track_src += 3;
outlog ("sectors_described, index offset: %d\n",fdi->index_offset);
fdi2raw_log("sectors_described, index offset: %d\n",fdi->index_offset);
do {
fdi->track_type = *fdi->track_src++;
outlog ("%06.6X %06.6X %02.2X:",fdi->track_src - start_src + 0x200, fdi->out/8, fdi->track_type);
fdi2raw_log("%06.6X %06.6X %02.2X:",fdi->track_src - start_src + 0x200, fdi->out/8, fdi->track_type);
oldout = fdi->out;
decode_sectors_described_track[fdi->track_type](fdi);
outlog(" %d\n", fdi->out - oldout);
fdi2raw_log(" %d\n", fdi->out - oldout);
oldout = fdi->out;
if (fdi->out < 0 || fdi->err) {
outlog ("\nin %d bytes, out %d bits\n", fdi->track_src - fdi->track_src_buffer, fdi->out);
fdi2raw_log("\nin %d bytes, out %d bits\n", fdi->track_src - fdi->track_src_buffer, fdi->out);
return -1;
}
if (fdi->track_src - fdi->track_src_buffer >= fdi->track_src_len) {
outlog ("source buffer overrun, previous type: %02.2X\n", fdi->track_type);
fdi2raw_log("source buffer overrun, previous type: %02.2X\n", fdi->track_type);
return -1;
}
} while (fdi->track_type != 0xff);
outlog("\n");
fdi2raw_log("\n");
fix_mfm_sync (fdi);
return fdi->out;
}
@@ -1445,7 +1457,7 @@ static void fdi2_decode (FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *mi
|| (avgp[i] < (standard_MFM_2_bit_cell_size - (standard_MFM_2_bit_cell_size / 4))) ) )
i++;
if (i == pulses) {
outlog ("No stable and long-enough pulse in track.\n");
fdi2raw_log("No stable and long-enough pulse in track.\n");
return;
}
i--;
@@ -1572,7 +1584,7 @@ static void fdi2_decode (FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *mi
|| (minp[i] < (standard_MFM_2_bit_cell_size - (standard_MFM_2_bit_cell_size / 4))) ) )
i++;
if (i == pulses) {
outlog ("FDI: No stable and long-enough pulse in track.\n");
fdi2raw_log("FDI: No stable and long-enough pulse in track.\n");
return;
}
nexti = i;
@@ -1649,12 +1661,12 @@ static void fdi2_decode (FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *mi
}
avg_pulse += jitter;
if ((avg_pulse < min_pulse) || (avg_pulse > max_pulse)) {
outlog ("FDI: avg_pulse outside bounds! avg=%u min=%u max=%u\n", avg_pulse, min_pulse, max_pulse);
outlog ("FDI: avgp=%u (%u) minp=%u (%u) maxp=%u (%u) jitter=%d i=%d ni=%d\n",
fdi2raw_log("FDI: avg_pulse outside bounds! avg=%u min=%u max=%u\n", avg_pulse, min_pulse, max_pulse);
fdi2raw_log("FDI: avgp=%u (%u) minp=%u (%u) maxp=%u (%u) jitter=%d i=%d ni=%d\n",
avgp[i], avgp[nexti], minp[i], minp[nexti], maxp[i], maxp[nexti], jitter, i, nexti);
}
if (avg_pulse < ref_pulse)
outlog ("FDI: avg_pulse < ref_pulse! (%u < %u)\n", avg_pulse, ref_pulse);
fdi2raw_log("FDI: avg_pulse < ref_pulse! (%u < %u)\n", avg_pulse, ref_pulse);
pulse += avg_pulse - ref_pulse;
ref_pulse = 0;
if (i == eodat)
@@ -1927,7 +1939,7 @@ static int decode_lowlevel_track (FDI *fdi, int track, struct fdi_cache *cache)
idxp[i] = sum;
}
len = totalavg / 100000;
/* outlog("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n",
/* fdi2raw_log("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n",
totalavg, indexoffset, maxidx, weakbits, len); */
cache->avgp = avgp;
cache->idxp = idxp;
@@ -1970,7 +1982,7 @@ void fdi2raw_header_free (FDI *fdi)
fdi_free (c->maxp);
}
fdi_free (fdi);
debuglog ("FREE: memory allocated %d\n", fdi_allocated);
fdi2raw_log("FREE: memory allocated %d\n", fdi_allocated);
}
int fdi2raw_get_last_track (FDI *fdi)
@@ -2021,7 +2033,7 @@ FDI *fdi2raw_header(FILE *f)
uae_u8 type, size;
FDI *fdi;
debuglog ("ALLOC: memory allocated %d\n", fdi_allocated);
fdi2raw_log("ALLOC: memory allocated %d\n", fdi_allocated);
fdi = fdi_malloc(sizeof(FDI));
memset (fdi, 0, sizeof (FDI));
fdi->file = f;
@@ -2051,8 +2063,8 @@ FDI *fdi2raw_header(FILE *f)
fdi->disk_type = fdi->header[145];
fdi->rotation_speed = fdi->header[146] + 128;
fdi->write_protect = fdi->header[147] & 1;
outlog ("FDI version %d.%d\n", fdi->header[140], fdi->header[141]);
outlog ("last_track=%d rotation_speed=%d\n",fdi->last_track,fdi->rotation_speed);
fdi2raw_log("FDI version %d.%d\n", fdi->header[140], fdi->header[141]);
fdi2raw_log("last_track=%d rotation_speed=%d\n",fdi->last_track,fdi->rotation_speed);
offset = 512;
i = fdi->last_track;
@@ -2091,7 +2103,7 @@ int fdi2raw_loadrevolution_2 (FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, i
fdi2_decode (fdi, cache->totalavg,
cache->avgp, cache->minp, cache->maxp, cache->idxp,
cache->maxidx, &idx, cache->pulses, mfm);
/* outlog("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n",
/* fdi2raw_log("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n",
track, bitoffset, (double)cache->totalavg / bitoffset, cache->weakbits, cache->indexoffset); */
len = fdi->out;
if (cache->weakbits >= 10 && multirev)
@@ -2144,7 +2156,7 @@ int fdi2raw_loadtrack (FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int trac
else
fdi->bit_rate = 250;
/* outlog ("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n",
/* fdi2raw_log("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n",
fdi->current_track, fdi->track_src_len, fdi->track_type, fdi->bit_rate); */
if ((fdi->track_type & 0xc0) == 0x80) {

3
src/game/gameport.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of a generic Game Port.
*
* Version: @(#)gameport.c 1.0.5 2018/04/26
* Version: @(#)gameport.c 1.0.6 2018/04/29
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
@@ -177,7 +177,6 @@ gameport_write(uint16_t addr, uint8_t val, void *priv)
timer_clock();
p->state |= 0x0f;
pclog("gameport_write : joysticks_present=%i\n", joysticks_present);
p->axis[0].count = gameport_time(p->joystick->read_axis(p->joystick_dat, 0));
p->axis[1].count = gameport_time(p->joystick->read_axis(p->joystick_dat, 1));

4
src/intel_flash.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 1 Mbit 8-bit flash devices.
*
* Version: @(#)intel_flash.c 1.0.15 2018/04/26
* Version: @(#)intel_flash.c 1.0.16 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -185,8 +185,6 @@ void *intel_flash_init(uint8_t type)
wcscpy(flash_path, flash_name);
/* pclog("Flash path: %ls\n", flash_name); */
flash->flash_id = (type & FLASH_IS_BXB) ? 0x95 : 0x94;
flash->invert_high_pin = (type & FLASH_INVERT);

158
src/intel_piix.c
View File

@@ -10,7 +10,7 @@
* word 0 - base address
* word 1 - bits 1-15 = byte count, bit 31 = end of transfer
*
* Version: @(#)intel_piix.c 1.0.15 2018/04/26
* Version: @(#)intel_piix.c 1.0.16 2018/05/11
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -52,8 +52,8 @@ typedef struct
typedef struct
{
uint8_t type,
regs[256], regs_ide[256];
int type;
uint8_t regs[256], regs_ide[256];
piix_busmaster_t bm[2];
} piix_t;
@@ -244,10 +244,10 @@ piix_write(int func, int addr, uint8_t val, void *priv)
pci_set_irq_routing(PCI_INTD, val & 0xf);
break;
case 0x6a:
if (dev->type == 1)
dev->regs[addr] = (val & 0xFC) | (dev->regs[addr] | 3);
else if (dev->type == 3)
if (dev->type == 3)
dev->regs[addr] = (val & 0xFD) | (dev->regs[addr] | 2);
else
dev->regs[addr] = (val & 0xFC) | (dev->regs[addr] | 3);
return;
case 0x70:
piix_log("Set MIRQ routing: MIRQ0 -> %02X\n", val);
@@ -278,6 +278,8 @@ piix_read(int func, int addr, void *priv)
{
piix_t *dev = (piix_t *) priv;
if ((func == 1) && (dev->type & 0x100)) /* PB640's PIIX has no IDE part. */
return 0xff;
if (func > 1)
return 0xff;
@@ -299,97 +301,104 @@ piix_read(int func, int addr, void *priv)
else if (addr == 0x23)
return 0;
else if (addr == 0x41) {
if (dev->type == 1)
return dev->regs_ide[addr] & 0xB3;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs_ide[addr] & 0xF3;
else
return dev->regs_ide[addr] & 0xB3;
} else if (addr == 0x43) {
if (dev->type == 1)
return dev->regs_ide[addr] & 0xB3;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs_ide[addr] & 0xF3;
else
return dev->regs_ide[addr] & 0xB3;
} else
return dev->regs_ide[addr];
} else {
if ((addr & 0xFC) == 0x60)
return dev->regs[addr] & 0x8F;
if (addr == 4)
return (dev->regs[addr] & 0x80) | 7;
else if (addr == 5) {
if (dev->type == 1)
return 0;
else if (dev->type == 3)
if (addr == 4) {
if (dev->type & 0x100)
return (dev->regs[addr] & 0x80) | 0x0F;
else
return (dev->regs[addr] & 0x80) | 7;
} else if (addr == 5) {
if (dev->type == 3)
return dev->regs[addr] & 1;
else
return 0;
} else if (addr == 6)
return dev->regs[addr] & 0x80;
else if (addr == 7) {
if (dev->type == 1)
return dev->regs[addr] & 0x3E;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr];
else {
if (dev->type & 0x100)
return dev->regs[addr] & 0x02;
else
return dev->regs[addr] & 0x3E;
}
} else if (addr == 0x4E)
return (dev->regs[addr] & 0xEF) | keyboard_at_get_mouse_scan();
else if (addr == 0x69)
return dev->regs[addr] & 0xFE;
else if (addr == 0x6A) {
if (dev->type == 1)
return dev->regs[addr] & 0x07;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0xD1;
else
return dev->regs[addr] & 0x07;
} else if (addr == 0x6B) {
if (dev->type == 1)
return 0;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0x80;
else
return 0;
}
else if (addr == 0x70) {
if (dev->type == 1)
return dev->regs[addr] & 0xCF;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0xEF;
} else if (addr == 0x71) {
if (dev->type == 1)
else
return dev->regs[addr] & 0xCF;
else if (dev->type == 3)
} else if (addr == 0x71) {
if (dev->type == 3)
return 0;
else
return dev->regs[addr] & 0xCF;
} else if (addr == 0x76) {
if (dev->type == 1)
return dev->regs[addr] & 0x8F;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0x87;
else
return dev->regs[addr] & 0x8F;
} else if (addr == 0x77) {
if (dev->type == 1)
return dev->regs[addr] & 0x8F;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0x87;
else
return dev->regs[addr] & 0x8F;
} else if (addr == 0x80) {
if (dev->type == 1)
return 0;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 0x7F;
} else if (addr == 0x82) {
if (dev->type == 1)
else if (dev->type == 1)
return 0;
else if (dev->type == 3)
} else if (addr == 0x82) {
if (dev->type == 3)
return dev->regs[addr] & 0x0F;
else
return 0;
} else if (addr == 0xA0)
return dev->regs[addr] & 0x1F;
else if (addr == 0xA3) {
if (dev->type == 1)
return 0;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr] & 1;
else
return 0;
} else if (addr == 0xA7) {
if (dev->type == 1)
if (dev->type == 3)
return dev->regs[addr];
else
return dev->regs[addr] & 0xEF;
else if (dev->type == 3)
return dev->regs[addr];
} else if (addr == 0xAB) {
if (dev->type == 1)
return dev->regs[addr] & 0xFE;
else if (dev->type == 3)
if (dev->type == 3)
return dev->regs[addr];
else
return dev->regs[addr] & 0xFE;
} else
return dev->regs[addr];
}
@@ -740,11 +749,21 @@ piix_reset_hard(void *priv)
} else {
piix->regs[0x02] = 0x2e; piix->regs[0x03] = 0x12; /*82371FB (PIIX)*/
}
piix->regs[0x04] = 0x07; piix->regs[0x05] = 0x00;
if (piix->type & 0x100)
piix->regs[0x04] = 0x06;
else
piix->regs[0x04] = 0x07;
piix->regs[0x05] = 0x00;
piix->regs[0x06] = 0x80; piix->regs[0x07] = 0x02;
piix->regs[0x08] = 0x00; /*A0 stepping*/
if (piix->type & 0x100)
piix->regs[0x08] = 0x02; /*A0 stepping*/
else
piix->regs[0x08] = 0x00; /*A0 stepping*/
piix->regs[0x09] = 0x00; piix->regs[0x0a] = 0x01; piix->regs[0x0b] = 0x06;
piix->regs[0x0e] = 0x80; /*Multi-function device*/
if (piix->type & 0x100)
piix->regs[0x0e] = 0x00; /*Single-function device*/
else
piix->regs[0x0e] = 0x80; /*Multi-function device*/
piix->regs[0x4c] = 0x4d;
piix->regs[0x4e] = 0x03;
if (piix->type == 3)
@@ -781,7 +800,7 @@ piix_reset_hard(void *priv)
piix->regs_ide[0x0e] = 0x00;
piix->regs_ide[0x20] = 0x01; piix->regs_ide[0x21] = piix->regs_ide[0x22] = piix->regs_ide[0x23] = 0x00; /*Bus master interface base address*/
piix->regs_ide[0x40] = piix->regs_ide[0x42] = 0x00;
piix->regs_ide[0x41] = piix->regs_ide[0x43] = 0x80;
piix->regs_ide[0x41] = piix->regs_ide[0x43] = 0x00;
if (piix->type == 3)
piix->regs_ide[0x44] = 0x00;
@@ -796,9 +815,6 @@ piix_reset_hard(void *priv)
ide_pri_disable();
ide_sec_disable();
ide_pri_enable();
ide_sec_enable();
}
@@ -871,11 +887,25 @@ const device_t piix_device =
NULL
};
const device_t piix3_device =
const device_t piix_pb640_device =
{
"Intel 82371SB (PIIX3)",
"Intel 82371FB (PIIX) (PB640)",
DEVICE_PCI,
1,
0x101,
piix_init,
piix_close,
piix_reset,
NULL,
NULL,
NULL,
NULL
};
const device_t piix3_device =
{
"Intel 82371SB (PIIX3)",
DEVICE_PCI,
3,
piix_init,
piix_close,
piix_reset,

50
src/io.c
View File

@@ -8,7 +8,7 @@
*
* Implement I/O ports and their operations.
*
* Version: @(#)io.c 1.0.3 2018/02/02
* Version: @(#)io.c 1.0.4 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -17,11 +17,13 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "io.h"
#include "cpu/cpu.h"
@@ -48,13 +50,35 @@ int initialized = 0;
io_t *io[NPORTS], *io_last[NPORTS];
#ifdef IO_CATCH
static uint8_t null_inb(uint16_t addr, void *priv) { pclog("IO: read(%04x)\n"); return(0xff); }
static uint16_t null_inw(uint16_t addr, void *priv) { pclog("IO: readw(%04x)\n"); return(0xffff); }
static uint32_t null_inl(uint16_t addr, void *priv) { pclog("IO: readl(%04x)\n"); return(0xffffffff); }
static void null_outb(uint16_t addr, uint8_t val, void *priv) { pclog("IO: write(%04x, %02x)\n", val); }
static void null_outw(uint16_t addr, uint16_t val, void *priv) { pclog("IO: writew(%04x, %04x)\n", val); }
static void null_outl(uint16_t addr, uint32_t val, void *priv) { pclog("IO: writel(%04x, %08lx)\n", val); }
#ifdef ENABLE_IO_LOG
int io_do_log = ENABLE_IO_LOG;
#endif
#ifdef ENABLE_IO_LOG
static void
io_log(const char *format, ...)
{
#ifdef ENABLE_IO_LOG
va_list ap;
if (io_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
#endif
#ifdef ENABLE_IO_LOG
static uint8_t null_inb(uint16_t addr, void *priv) { io_log("IO: read(%04x)\n"); return(0xff); }
static uint16_t null_inw(uint16_t addr, void *priv) { io_log("IO: readw(%04x)\n"); return(0xffff); }
static uint32_t null_inl(uint16_t addr, void *priv) { io_log("IO: readl(%04x)\n"); return(0xffffffff); }
static void null_outb(uint16_t addr, uint8_t val, void *priv) { io_log("IO: write(%04x, %02x)\n", val); }
static void null_outw(uint16_t addr, uint16_t val, void *priv) { io_log("IO: writew(%04x, %04x)\n", val); }
static void null_outl(uint16_t addr, uint32_t val, void *priv) { io_log("IO: writel(%04x, %08lx)\n", val); }
#endif
@@ -83,7 +107,7 @@ io_init(void)
p = NULL;
}
#ifdef IO_CATCH
#ifdef ENABLE_IO_LOG
/* io[c] should be the only handler, pointing at the NULL catch handler. */
p = (io_t *) malloc(sizeof(io_t));
memset(p, 0, sizeof(io_t));
@@ -278,9 +302,9 @@ inb(uint16_t port)
}
}
#ifdef IO_TRACE
#ifdef ENABLE_IO_LOG
if (CS == IO_TRACE)
pclog("IOTRACE(%04X): inb(%04x)=%02x\n", IO_TRACE, port, r);
io_log("IOTRACE(%04X): inb(%04x)=%02x\n", IO_TRACE, port, r);
#endif
return(r);
@@ -301,9 +325,9 @@ outb(uint16_t port, uint8_t val)
}
}
#ifdef IO_TRACE
#ifdef ENABLE_IO_LOG
if (CS == IO_TRACE)
pclog("IOTRACE(%04X): outb(%04x,%02x)\n", IO_TRACE, port, val);
io_log("IOTRACE(%04X): outb(%04x,%02x)\n", IO_TRACE, port, val);
#endif
return;
}

6
src/keyboard_at.c
View File

@@ -8,7 +8,7 @@
*
* Intel 8042 (AT keyboard controller) emulation.
*
* Version: @(#)keyboard_at.c 1.0.35 2018/04/26
* Version: @(#)keyboard_at.c 1.0.36 2018/05/12
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -1482,10 +1482,8 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
kbd_mouse_set(kbd, 1);
if (mouse_write && ((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1))
mouse_write(val, mouse_p);
else if (!mouse_write && ((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1)) {
pclog("Adding 0xFF to queue\n");
else if (!mouse_write && ((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1))
keyboard_at_adddata_mouse(0xff);
}
break;
default:

69
src/machine/m_amstrad.c
View File

@@ -32,7 +32,7 @@
* in alpha mode, but in highres ("ECD350") mode, it displays
* some semi-random junk. Video-memory pointer maybe?
*
* Version: @(#)m_amstrad.c 1.0.13 2018/04/26
* Version: @(#)m_amstrad.c 1.0.14 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -42,11 +42,13 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../io.h"
@@ -150,6 +152,27 @@ static uint8_t crtc_mask[32] = {
};
#ifdef ENABLE_AMSTRAD_LOG
int amstrad_do_log = ENABLE_AMSTRAD_LOG;
#endif
static void
amstrad_log(const char *fmt, ...)
{
#ifdef ENABLE_AMSTRAD_LOG
va_list ap;
if (amstrad_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void
recalc_timings_1512(amsvid_t *vid)
{
@@ -915,10 +938,8 @@ static void
kbd_adddata(uint16_t val)
{
key_queue[key_queue_end] = val;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : %02X added to key queue at %i\n",
amstrad_log("keyboard_amstrad : %02X added to key queue at %i\n",
val, key_queue_end);
#endif
key_queue_end = (key_queue_end + 1) & 0xf;
}
@@ -934,13 +955,8 @@ static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
#ifdef WALTJE
int i = 0;
#endif
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : write %04X %02X %02X\n", port, val, ams->pb);
#endif
amstrad_log("keyboard_amstrad : write %04X %02X %02X\n", port, val, ams->pb);
switch (port) {
case 0x61:
@@ -958,13 +974,9 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
*
* This register is controlled by BIOS and/or ROS.
*/
#if ENABLE_KEYBOARD_LOG
pclog("AMSkb: write PB %02x (%02x)\n", val, ams->pb);
#endif
amstrad_log("AMSkb: write PB %02x (%02x)\n", val, ams->pb);
if (!(ams->pb & 0x40) && (val & 0x40)) { /*Reset keyboard*/
#if ENABLE_KEYBOARD_LOG
pclog("AMSkb: reset keyboard\n");
#endif
amstrad_log("AMSkb: reset keyboard\n");
kbd_adddata(0xaa);
}
ams->pb = val;
@@ -990,30 +1002,19 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
break;
case 0x64:
#ifdef WALTJE
pclog("AMSkb: STAT1 = %02x (%02x)\n", val, ams->stat1);
#endif
ams->stat1 = val;
break;
case 0x65:
#ifdef WALTJE
pclog("AMSkb: STAT2 = %02x (%02x)\n", val, ams->stat2);
i = 512 + (((val & 0x1f) - 0x0e) * 32);
pclog("AMSkb: %d KB RAM installed.\n", i);
#endif
ams->stat2 = val;
break;
case 0x66:
#ifdef WALTJE
pclog("AMSkb: RESET REQUESTED !\n");
#endif
pc_reset(1);
break;
default:
pclog("AMSkb: bad keyboard write %04X %02X\n", port, val);
amstrad_log("AMSkb: bad keyboard write %04X %02X\n", port, val);
}
}
@@ -1102,7 +1103,7 @@ kbd_read(uint16_t port, void *priv)
break;
default:
pclog("AMDkb: bad keyboard read %04X\n", port);
amstrad_log("AMDkb: bad keyboard read %04X\n", port);
}
return(ret);
@@ -1120,17 +1121,13 @@ kbd_poll(void *priv)
{
ams->wantirq = 0;
ams->pa = ams->key_waiting;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : take IRQ\n");
picint(2);
amstrad_log("keyboard_amstrad : take IRQ\n");
}
if (key_queue_start != key_queue_end && !ams->pa) {
ams->key_waiting = key_queue[key_queue_start];
#if ENABLE_KEYBOARD_LOG
ams->key_waiting = key_queue[key_queue_start];
amstrad_log("Reading %02X from the key queue at %i\n",
ams->key_waiting, key_queue_start);
ams->key_waiting, key_queue_start);
key_queue_start = (key_queue_start + 1) & 0xf;
ams->wantirq = 1;

153
src/machine/m_at_4gpv31.c
View File

@@ -1,153 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation for C&T 82C206/82c597 based 4GLX3 board.
*
* NOTE: The NEAT 82c206 code should be moved into a 82c206 module,
* so it can be re-used by other boards.
*
* Version: @(#)m_4gpv31.c 1.0.5 2018/03/18
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../io.h"
#include "../device.h"
#include "../keyboard.h"
#include "../floppy/fdd.h"
#include "../floppy/fdc.h"
#include "machine.h"
typedef struct {
uint8_t regs[256];
int indx;
int emspg[4];
} neat_t;
#if NOT_USED
static void
neat_wrems(uint32_t addr, uint8_t val, void *priv)
{
neat_t *dev = (neat_t *)priv;
ram[(dev->emspg[(addr >> 14) & 3] << 14) + (addr & 0x3fff)] = val;
}
static uint8_t
neat_rdems(uint32_t addr, void *priv)
{
neat_t *dev = (neat_t *)priv;
return(ram[(dev->emspg[(addr >> 14) & 3] << 14) + (addr & 0x3fff)]);
}
#endif
static void
neat_write(uint16_t port, uint8_t val, void *priv)
{
neat_t *dev = (neat_t *)priv;
pclog("NEAT: write(%04x, %02x)\n", port, val);
switch (port) {
case 0x22:
dev->indx = val;
break;
case 0x23:
dev->regs[dev->indx] = val;
switch (dev->indx) {
case 0x6e: /* EMS page extension */
dev->emspg[3] = (dev->emspg[3] & 0x7F) | (( val & 3) << 7);
dev->emspg[2] = (dev->emspg[2] & 0x7F) | (((val >> 2) & 3) << 7);
dev->emspg[1] = (dev->emspg[1] & 0x7F) | (((val >> 4) & 3) << 7);
dev->emspg[0] = (dev->emspg[0] & 0x7F) | (((val >> 6) & 3) << 7);
break;
}
break;
case 0x0208:
case 0x0209:
case 0x4208:
case 0x4209:
case 0x8208:
case 0x8209:
case 0xc208:
case 0xc209:
dev->emspg[port >> 14] = (dev->emspg[port >> 14] & 0x180) | (val & 0x7F);
break;
}
}
static uint8_t
neat_read(uint16_t port, void *priv)
{
neat_t *dev = (neat_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x22:
ret = dev->indx;
break;
case 0x23:
ret = dev->regs[dev->indx];
break;
}
pclog("NEAT: read(%04x) = %02x\n", port, ret);
return(ret);
}
static void
neat_init(void)
{
neat_t *dev;
dev = (neat_t *)malloc(sizeof(neat_t));
memset(dev, 0x00, sizeof(neat_t));
io_sethandler(0x0022, 2,
neat_read,NULL,NULL, neat_write,NULL,NULL, dev);
io_sethandler(0x0208, 2,
neat_read,NULL,NULL, neat_write,NULL,NULL, dev);
io_sethandler(0x4208, 2,
neat_read,NULL,NULL, neat_write,NULL,NULL, dev);
io_sethandler(0x8208, 2,
neat_read,NULL,NULL, neat_write,NULL,NULL, dev);
io_sethandler(0xc208, 2,
neat_read,NULL,NULL, neat_write,NULL,NULL, dev);
}
void
machine_at_4gpv31_init(const machine_t *model)
{
machine_at_common_ide_init(model);
device_add(&keyboard_at_ami_device);
device_add(&fdc_at_device);
neat_init();
}

919
src/machine/m_at_4x0.c Normal file
View File

@@ -0,0 +1,919 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel PCISet chips from 430LX to 440FX.
*
* Version: @(#)m_at_430lx_nx.c 1.0.0 2018/05/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../mem.h"
#include "../memregs.h"
#include "../io.h"
#include "../rom.h"
#include "../pci.h"
#include "../device.h"
#include "../disk/hdc.h"
#include "../disk/hdc_ide.h"
#include "../keyboard.h"
#include "../intel.h"
#include "../intel_flash.h"
#include "../intel_sio.h"
#include "../piix.h"
#include "../sio.h"
#include "../video/video.h"
#include "../video/vid_cl54xx.h"
#include "../video/vid_s3.h"
#include "machine.h"
enum
{
INTEL_430LX,
INTEL_430NX,
INTEL_430FX,
INTEL_430HX,
#if defined(DEV_BRANCH) && defined(USE_I686)
INTEL_430VX,
INTEL_440FX
#else
INTEL_430VX
#endif
};
typedef struct
{
uint8_t regs[256];
int type;
} i4x0_t;
typedef struct
{
int index;
} acerm3a_t;
static void
i4x0_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3) {
case 0:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
break;
case 1:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
break;
case 2:
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
break;
case 3:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
}
flushmmucache_nopc();
}
static void
i4x0_write(int func, int addr, uint8_t val, void *priv)
{
i4x0_t *dev = (i4x0_t *) priv;
if (func)
return;
if ((addr >= 0x10) && (addr < 0x4f))
return;
switch (addr) {
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0c: case 0x0e:
return;
case 0x04: /*Command register*/
if (dev->type >= INTEL_430FX) {
if (romset == ROM_PB640)
val &= 0x06;
else
val &= 0x02;
} else
val &= 0x42;
val |= 0x04;
break;
case 0x05:
if (dev->type >= INTEL_430FX)
val = 0;
else
val &= 0x01;
break;
case 0x06: /*Status*/
val = 0;
break;
case 0x07:
if (dev->type >= INTEL_430HX) {
val &= 0x80;
val |= 0x02;
} else {
val = 0x02;
if (romset == ROM_PB640)
val |= 0x20;
}
break;
case 0x59: /*PAM0*/
if ((dev->regs[0x59] ^ val) & 0xf0) {
i4x0_map(0xf0000, 0x10000, val >> 4);
shadowbios = (val & 0x10);
}
break;
case 0x5a: /*PAM1*/
if ((dev->regs[0x5a] ^ val) & 0x0f)
i4x0_map(0xc0000, 0x04000, val & 0xf);
if ((dev->regs[0x5a] ^ val) & 0xf0)
i4x0_map(0xc4000, 0x04000, val >> 4);
break;
case 0x5b: /*PAM2*/
if ((dev->regs[0x5b] ^ val) & 0x0f)
i4x0_map(0xc8000, 0x04000, val & 0xf);
if ((dev->regs[0x5b] ^ val) & 0xf0)
i4x0_map(0xcc000, 0x04000, val >> 4);
break;
case 0x5c: /*PAM3*/
if ((dev->regs[0x5c] ^ val) & 0x0f)
i4x0_map(0xd0000, 0x04000, val & 0xf);
if ((dev->regs[0x5c] ^ val) & 0xf0)
i4x0_map(0xd4000, 0x04000, val >> 4);
break;
case 0x5d: /*PAM4*/
if ((dev->regs[0x5d] ^ val) & 0x0f)
i4x0_map(0xd8000, 0x04000, val & 0xf);
if ((dev->regs[0x5d] ^ val) & 0xf0)
i4x0_map(0xdc000, 0x04000, val >> 4);
break;
case 0x5e: /*PAM5*/
if ((dev->regs[0x5e] ^ val) & 0x0f)
i4x0_map(0xe0000, 0x04000, val & 0xf);
if ((dev->regs[0x5e] ^ val) & 0xf0)
i4x0_map(0xe4000, 0x04000, val >> 4);
break;
case 0x5f: /*PAM6*/
if ((dev->regs[0x5f] ^ val) & 0x0f)
i4x0_map(0xe8000, 0x04000, val & 0xf);
if ((dev->regs[0x5f] ^ val) & 0xf0)
i4x0_map(0xec000, 0x04000, val >> 4);
break;
case 0x72: /*SMRAM*/
if ((dev->type >= INTEL_430FX) && ((dev->regs[0x72] ^ val) & 0x48))
i4x0_map(0xa0000, 0x20000, ((val & 0x48) == 0x48) ? 3 : 0);
break;
}
dev->regs[addr] = val;
}
static uint8_t
i4x0_read(int func, int addr, void *priv)
{
i4x0_t *dev = (i4x0_t *) priv;
if (func)
return 0xff;
return dev->regs[addr];
}
static void
i4x0_reset(void *priv)
{
i4x0_t *i4x0 = (i4x0_t *)priv;
i4x0_write(0, 0x59, 0x00, priv);
if (i4x0->type >= INTEL_430FX)
i4x0_write(0, 0x72, 0x02, priv);
}
static void
i4x0_close(void *p)
{
i4x0_t *i4x0 = (i4x0_t *)p;
free(i4x0);
}
static void
*i4x0_init(const device_t *info)
{
i4x0_t *i4x0 = (i4x0_t *) malloc(sizeof(i4x0_t));
memset(i4x0, 0, sizeof(i4x0_t));
i4x0->type = info->local;
i4x0->regs[0x00] = 0x86; i4x0->regs[0x01] = 0x80; /*Intel*/
switch(i4x0->type) {
case INTEL_430LX:
i4x0->regs[0x02] = 0xa3; i4x0->regs[0x03] = 0x04; /*82434LX/NX*/
i4x0->regs[0x08] = 0x03; /*A3 stepping*/
i4x0->regs[0x50] = 0x80;
i4x0->regs[0x52] = 0x40; /*256kb PLB cache*/
break;
case INTEL_430NX:
i4x0->regs[0x02] = 0xa3; i4x0->regs[0x03] = 0x04; /*82434LX/NX*/
i4x0->regs[0x08] = 0x10; /*A0 stepping*/
i4x0->regs[0x50] = 0xA0;
i4x0->regs[0x52] = 0x44; /*256kb PLB cache*/
i4x0->regs[0x66] = i4x0->regs[0x67] = 0x02;
break;
case INTEL_430FX:
i4x0->regs[0x02] = 0x2d; i4x0->regs[0x03] = 0x12; /*SB82437FX-66*/
if (romset == ROM_PB640)
i4x0->regs[0x08] = 0x02; /*???? stepping*/
else
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
i4x0->regs[0x52] = 0x40; /*256kb PLB cache*/
break;
case INTEL_430HX:
i4x0->regs[0x02] = 0x50; i4x0->regs[0x03] = 0x12; /*82439HX*/
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
i4x0->regs[0x51] = 0x20;
i4x0->regs[0x52] = 0xB5; /*512kb cache*/
i4x0->regs[0x56] = 0x52; /*DRAM control*/
i4x0->regs[0x59] = 0x40;
i4x0->regs[0x5A] = i4x0->regs[0x5B] = i4x0->regs[0x5C] = i4x0->regs[0x5D] = 0x44;
i4x0->regs[0x5E] = i4x0->regs[0x5F] = 0x44;
i4x0->regs[0x65] = i4x0->regs[0x66] = i4x0->regs[0x67] = 0x02;
i4x0->regs[0x68] = 0x11;
break;
case INTEL_430VX:
i4x0->regs[0x02] = 0x30; i4x0->regs[0x03] = 0x70; /*82437VX*/
i4x0->regs[0x08] = 0x00; /*A0 stepping*/
i4x0->regs[0x52] = 0x42; /*256kb PLB cache*/
i4x0->regs[0x53] = 0x14;
i4x0->regs[0x56] = 0x52; /*DRAM control*/
i4x0->regs[0x67] = 0x11;
i4x0->regs[0x69] = 0x03;
i4x0->regs[0x70] = 0x20;
i4x0->regs[0x74] = 0x0e;
i4x0->regs[0x78] = 0x23;
break;
#if defined(DEV_BRANCH) && defined(USE_I686)
case INTEL_440FX:
i4x0->regs[0x02] = 0x37; i4x0->regs[0x03] = 0x12; /*82441FX*/
i4x0->regs[0x08] = 0x02; /*A0 stepping*/
i4x0->regs[0x2c] = 0xf4;
i4x0->regs[0x2d] = 0x1a;
i4x0->regs[0x2f] = 0x11;
i4x0->regs[0x51] = 0x01;
i4x0->regs[0x53] = 0x80;
i4x0->regs[0x58] = 0x10;
i4x0->regs[0x5a] = i4x0->regs[0x5b] = i4x0->regs[0x5c] = i4x0->regs[0x5d] = 0x11;
i4x0->regs[0x5e] = 0x11;
i4x0->regs[0x5f] = 0x31;
break;
#endif
}
i4x0->regs[0x04] = 0x06; i4x0->regs[0x05] = 0x00;
#if defined(DEV_BRANCH) && defined(USE_I686)
if (i4x0->type == INTEL_440FX)
i4x0->regs[0x06] = 0x80;
#endif
if ((i4x0->type == INTEL_430FX) && (romset != ROM_PB640))
i4x0->regs[0x07] = 0x82;
#if defined(DEV_BRANCH) && defined(USE_I686)
else if (i4x0->type != INTEL_440FX)
#else
else
#endif
i4x0->regs[0x07] = 0x02;
i4x0->regs[0x0b] = 0x06;
if (i4x0->type >= INTEL_430FX)
i4x0->regs[0x57] = 0x01;
else
i4x0->regs[0x57] = 0x31;
i4x0->regs[0x60] = i4x0->regs[0x61] = i4x0->regs[0x62] = i4x0->regs[0x63] = 0x02;
i4x0->regs[0x64] = 0x02;
if (i4x0->type >= INTEL_430FX)
i4x0->regs[0x72] = 0x02;
pci_add_card(0, i4x0_read, i4x0_write, i4x0);
return i4x0;
}
const device_t i430lx_device =
{
"Intel 82434LX",
DEVICE_PCI,
INTEL_430LX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
const device_t i430nx_device =
{
"Intel 82434NX",
DEVICE_PCI,
INTEL_430NX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
const device_t i430fx_device =
{
"Intel SB82437FX-66",
DEVICE_PCI,
INTEL_430FX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
const device_t i430hx_device =
{
"Intel 82439HX",
DEVICE_PCI,
INTEL_430HX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
const device_t i430vx_device =
{
"Intel 82437VX",
DEVICE_PCI,
INTEL_430VX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
#if defined(DEV_BRANCH) && defined(USE_I686)
const device_t i440fx_device =
{
"Intel 82441FX",
DEVICE_PCI,
INTEL_440FX,
i4x0_init,
i4x0_close,
i4x0_reset,
NULL,
NULL,
NULL,
NULL
};
#endif
static void
acerm3a_out(uint16_t port, uint8_t val, void *p)
{
acerm3a_t *dev = (acerm3a_t *) p;
if (port == 0xea)
dev->index = val;
}
static uint8_t
acerm3a_in(uint16_t port, void *p)
{
acerm3a_t *dev = (acerm3a_t *) p;
if (port == 0xeb) {
switch (dev->index) {
case 2:
return 0xfd;
}
}
return 0xff;
}
static void
acerm3a_close(void *p)
{
acerm3a_t *dev = (acerm3a_t *)p;
free(dev);
}
static void
*acerm3a_init(const device_t *info)
{
acerm3a_t *acerm3a = (acerm3a_t *) malloc(sizeof(acerm3a_t));
memset(acerm3a, 0, sizeof(acerm3a_t));
io_sethandler(0x00ea, 0x0002, acerm3a_in, NULL, NULL, acerm3a_out, NULL, NULL, acerm3a);
return acerm3a;
}
const device_t acerm3a_device =
{
"Acer M3A Register",
0,
0,
acerm3a_init,
acerm3a_close,
NULL,
NULL,
NULL,
NULL,
NULL
};
static void
machine_at_premiere_common_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&ide_pci_2ch_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&sio_device);
fdc37c665_init();
intel_batman_init();
device_add(&intel_flash_bxt_ami_device);
}
void
machine_at_batman_init(const machine_t *model)
{
machine_at_premiere_common_init(model);
device_add(&i430lx_device);
}
void
machine_at_plato_init(const machine_t *model)
{
machine_at_premiere_common_init(model);
device_add(&i430nx_device);
}
void
machine_at_p54tp4xe_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_endeavor_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_ONBOARD, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
if (gfxcard == GFX_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
}
const device_t *
at_endeavor_get_device(void)
{
return &s3_phoenix_trio64_onboard_pci_device;
}
void
machine_at_zappa_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void
machine_at_mb500n_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_president_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_thor_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_ONBOARD, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_device);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void
machine_at_pb640_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_ONBOARD, 4, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430fx_device);
device_add(&piix_pb640_device);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
if (gfxcard == GFX_INTERNAL)
device_add(&gd5440_onboard_pci_device);
}
const device_t *
at_pb640_get_device(void)
{
return &gd5440_onboard_pci_device;
}
void
machine_at_acerm3a_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_ONBOARD, 4, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
fdc37c932fr_init();
device_add(&acerm3a_device);
device_add(&intel_flash_bxb_device);
}
void
machine_at_acerv35n_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
fdc37c932fr_init();
device_add(&acerm3a_device);
device_add(&intel_flash_bxb_device);
}
void
machine_at_ap53_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_ONBOARD, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
fdc37c669_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_p55t2p4_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_p55t2s_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
pc87306_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_p55tvp4_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
w83877f_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_i430vx_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
um8669f_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_p55va_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
fdc37c932fr_init();
device_add(&intel_flash_bxt_device);
}
#if defined(DEV_BRANCH) && defined(USE_I686)
void
machine_at_i440fx_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&i440fx_device);
device_add(&piix3_device);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
void
machine_at_s1668_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&keyboard_ps2_ami_pci_device);
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i440fx_device);
device_add(&piix3_device);
fdc37c665_init();
device_add(&intel_flash_bxt_device);
}
#endif

5
src/machine/m_at_opti495.c
View File

@@ -251,10 +251,12 @@ Note: the block address is forced to be a multiple of the block size by
ignoring the appropriate number of the least-significant bits
SeeAlso: #P0178,#P0187
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../io.h"
@@ -278,7 +280,6 @@ static void opti495_write(uint16_t addr, uint8_t val, void *p)
optireg=val;
break;
case 0x24:
pclog("OPTI: writing reg %02X %02X\n",optireg,val);
if (optireg>=0x20 && optireg<=0x2C)
{
optiregs[optireg-0x20]=val;

6
src/machine/m_at_scat.c
View File

@@ -10,16 +10,15 @@
*
* Re-worked version based on the 82C235 datasheet and errata.
*
* Version: @(#)m_at_scat.c 1.0.14 2018/04/26
* Version: @(#)m_at_scat.c 1.0.15 2018/04/29
*
* Authors: Original by GreatPsycho for PCem.
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
@@ -999,7 +998,6 @@ scat_write(uint16_t port, uint8_t val, void *priv)
}
if (scat_reg_valid)
scat_regs[scat_index] = val;
else pclog("Attemped to write unimplemented SCAT register %02X at %04X:%04X\n", scat_index, val, CS, cpu_state.oldpc);
if (scat_shadow_update)
scat_shadow_state_update();
if (scat_map_update)

11
src/machine/m_at_sis_85c50x.c
View File

@@ -6,14 +6,14 @@
*
* Emulation of the SiS 50x PCI chips.
*
* Version: @(#)m_at_sis_85c50x.c 1.0.6 2018/03/18
* Version: @(#)m_at_sis_85c50x.c 1.0.7 2018/04/29
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2015-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
@@ -87,7 +87,6 @@ static void sis_85c501_recalcmapping(void)
static void sis_85c501_write(int func, int addr, uint8_t val, void *p)
{
/* pclog("sis_85c501_write : addr=%02x val=%02x\n", addr, val); */
if (func)
return;
@@ -131,8 +130,6 @@ static void sis_85c501_write(int func, int addr, uint8_t val, void *p)
static void sis_85c503_write(int func, int addr, uint8_t val, void *p)
{
/* pclog("sis_85c503_write : addr=%02x val=%02x\n", addr, val); */
if (func > 0)
return;
@@ -162,28 +159,24 @@ static void sis_85c503_write(int func, int addr, uint8_t val, void *p)
break;
case 0x41:
pclog("Set IRQ routing: INT A -> %02X\n", val);
if (val & 0x80)
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
else
pci_set_irq_routing(PCI_INTA, val & 0xf);
break;
case 0x42:
pclog("Set IRQ routing: INT B -> %02X\n", val);
if (val & 0x80)
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
else
pci_set_irq_routing(PCI_INTC, val & 0xf);
break;
case 0x43:
pclog("Set IRQ routing: INT C -> %02X\n", val);
if (val & 0x80)
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
else
pci_set_irq_routing(PCI_INTB, val & 0xf);
break;
case 0x44:
pclog("Set IRQ routing: INT D -> %02X\n", val);
if (val & 0x80)
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
else

72
src/machine/m_at_t3100e.c
View File

@@ -117,7 +117,7 @@
* bit 2 set for single-pixel LCD font
* bits 0,1 for display font
*
* Version: @(#)m_at_t3100e.c 1.0.4 2018/03/18
* Version: @(#)m_at_t3100e.c 1.0.5 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -145,11 +145,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdint.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../mouse.h"
@@ -168,9 +170,6 @@ extern uint8_t *ram; /* Physical RAM */
void at_init();
static const int t3100e_log = 0;
/* The T3100e motherboard can (and does) dynamically reassign RAM between
* conventional, XMS and EMS. This translates to monkeying with the mappings.
*/
@@ -214,6 +213,27 @@ struct t3100e_ems_regs
void t3100e_ems_out(uint16_t addr, uint8_t val, void *p);
#ifdef ENABLE_T3100E_LOG
int t3100e_do_log = ENABLE_T3100E_LOG;
#endif
static void
t3100e_log(const char *fmt, ...)
{
#ifdef ENABLE_T3100E_LOG
va_list ap;
if (t3100e_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/* Given a memory address (which ought to be in the page frame at 0xD0000),
* which page does it relate to? */
static int addr_to_page(uint32_t addr)
@@ -329,7 +349,7 @@ void dump_mappings()
offset = t3100e_ems.page_exec[3];
}
pclog(" %p | base=%05x size=%05x %c @ %06x %s\n", mm,
t3100e_log(" %p | base=%05x size=%05x %c @ %06x %s\n", mm,
mm->base, mm->size, mm->enable ? 'Y' : 'N',
offset, name);
@@ -342,16 +362,14 @@ void t3100e_map_ram(uint8_t val)
int n;
int32_t upper_len;
if (t3100e_log)
{
pclog("OUT 0x8084, %02x [ set memory mapping :", val | 0x40);
if (val & 1) pclog("ENABLE_EMS ");
if (val & 2) pclog("ENABLE_XMS ");
if (val & 4) pclog("640K ");
if (val & 8) pclog("X8X ");
if (val & 16) pclog("UPPER_IS_XMS ");
pclog("\n");
}
t3100e_log("OUT 0x8084, %02x [ set memory mapping :", val | 0x40);
if (val & 1) t3100e_log("ENABLE_EMS ");
if (val & 2) t3100e_log("ENABLE_XMS ");
if (val & 4) t3100e_log("640K ");
if (val & 8) t3100e_log("X8X ");
if (val & 16) t3100e_log("UPPER_IS_XMS ");
t3100e_log("\n");
/* Bit 2 controls size of conventional memory */
if (val & 4)
{
@@ -441,7 +459,7 @@ uint8_t t3100e_sys_in(uint16_t addr, void *p)
/* The low 4 bits always seem to be 0x0C. The high 4 are a
* notification sent by the keyboard controller when it detects
* an [Fn] key combination */
if (t3100e_log) pclog("IN 0x8084\n");
t3100e_log("IN 0x8084\n");
return 0x0C | (regs->notify << 4);
}
@@ -455,7 +473,7 @@ void t3100e_sys_out(uint16_t addr, uint8_t val, void *p)
switch (val & 0xE0)
{
case 0x00: /* Set serial port IRQs. Not implemented */
if (t3100e_log) pclog("OUT 0x8084, %02x [ set serial port IRQs]\n", val);
t3100e_log("OUT 0x8084, %02x [ set serial port IRQs]\n", val);
break;
case 0x40: /* Set RAM mappings. */
t3100e_map_ram(val & 0x1F);
@@ -465,7 +483,7 @@ void t3100e_sys_out(uint16_t addr, uint8_t val, void *p)
t3100e_video_options_set(val & 0x1F); break;
/* Other options not implemented. */
default: if (t3100e_log) pclog("OUT 0x8084, %02x\n", val); break;
default: t3100e_log("OUT 0x8084, %02x\n", val); break;
}
}
@@ -562,7 +580,7 @@ void t3100e_ems_out(uint16_t addr, uint8_t val, void *p)
int pg = port_to_page(addr);
regs->page_exec[pg & 3] = t3100e_ems_execaddr(regs, pg, val);
if (t3100e_log) pclog("EMS: page %d %02x -> %02x [%06x]\n",
t3100e_log("EMS: page %d %02x -> %02x [%06x]\n",
pg, regs->page[pg], val, regs->page_exec[pg & 3]);
regs->page[pg] = val;
@@ -570,14 +588,14 @@ void t3100e_ems_out(uint16_t addr, uint8_t val, void *p)
/* Bit 7 set if page is enabled, reset if page is disabled */
if (regs->page_exec[pg])
{
if (t3100e_log) pclog("Enabling EMS RAM at %05x\n",
t3100e_log("Enabling EMS RAM at %05x\n",
page_to_addr(pg));
mem_mapping_enable(&regs->mapping[pg]);
mem_mapping_set_exec(&regs->mapping[pg], ram + regs->page_exec[pg]);
}
else
{
if (t3100e_log) pclog("Disabling EMS RAM at %05x\n",
t3100e_log("Disabling EMS RAM at %05x\n",
page_to_addr(pg));
mem_mapping_disable(&regs->mapping[pg]);
}
@@ -604,9 +622,9 @@ static uint16_t ems_read_ramw(uint32_t addr, void *priv)
int pg = addr_to_page(addr);
if (pg < 0) return 0xFF;
//pclog("ems_read_ramw addr=%05x ", addr);
//t3100e_log("ems_read_ramw addr=%05x ", addr);
addr = regs->page_exec[pg] + (addr & 0x3FFF);
//pclog("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]);
//t3100e_log("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]);
return *(uint16_t *)&ram[addr];
}
@@ -639,9 +657,9 @@ static void ems_write_ramw(uint32_t addr, uint16_t val, void *priv)
int pg = addr_to_page(addr);
if (pg < 0) return;
//pclog("ems_write_ramw addr=%05x ", addr);
//t3100e_log("ems_write_ramw addr=%05x ", addr);
addr = regs->page_exec[pg] + (addr & 0x3FFF);
//pclog("-> %06x val=%04x\n", addr, val);
//t3100e_log("-> %06x val=%04x\n", addr, val);
*(uint16_t *)&ram[addr] = val;
}
@@ -743,7 +761,7 @@ void machine_at_t3100e_init(const machine_t *model)
/* Map the EMS page frame */
for (pg = 0; pg < 4; pg++)
{
if (t3100e_log) pclog("Adding memory map at %x for page %d\n", page_to_addr(pg), pg);
t3100e_log("Adding memory map at %x for page %d\n", page_to_addr(pg), pg);
mem_mapping_add(&t3100e_ems.mapping[pg],
page_to_addr(pg), 16384,
ems_read_ram, ems_read_ramw, ems_read_raml,

6
src/machine/m_at_t3100e_vid.c
View File

@@ -22,7 +22,7 @@
* 61 50 52 0F 19 06 19 19 02 0D 0B 0C MONO
* 2D 28 22 0A 67 00 64 67 02 03 06 07 640x400
*
* Version: @(#)m_at_t3100e_vid.c 1.0.5 2018/04/26
* Version: @(#)m_at_t3100e_vid.c 1.0.6 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -50,11 +50,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../io.h"
@@ -196,7 +198,6 @@ void t3100e_write(uint32_t addr, uint8_t val, void *p)
t3100e_t *t3100e = (t3100e_t *)p;
egawrites++;
// pclog("CGA_WRITE %04X %02X\n", addr, val);
t3100e->vram[addr & 0x7fff] = val;
cycles -= 4;
}
@@ -209,7 +210,6 @@ uint8_t t3100e_read(uint32_t addr, void *p)
egareads++;
cycles -= 4;
// pclog("CGA_READ %04X\n", addr);
return t3100e->vram[addr & 0x7fff];
}

3
src/machine/m_at_wd76c10.c
View File

@@ -1,8 +1,8 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include <stdio.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
@@ -50,7 +50,6 @@ wd76c10_read(uint16_t port, void *priv)
static void
wd76c10_write(uint16_t port, uint16_t val, void *priv)
{
pclog("WD76C10 write %04X %04X\n", port, val);
switch (port)
{
case 0x0092:

45
src/machine/m_europc.c
View File

@@ -68,7 +68,7 @@
*
* WARNING THIS IS A WORK-IN-PROGRESS MODULE. USE AT OWN RISK.
*
* Version: @(#)europc.c 1.0.5 2018/04/26
* Version: @(#)europc.c 1.0.6 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -109,12 +109,14 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <time.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../nmi.h"
@@ -167,6 +169,27 @@ typedef struct {
static europc_t europc;
#ifdef ENABLE_EUROPC_LOG
int europc_do_log = ENABLE_EUROPC_LOG;
#endif
static void
europc_log(const char *fmt, ...)
{
#ifdef ENABLE_EUROPC_LOG
va_list ap;
if (europc_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/*
* This is called every second through the NVR/RTC hook.
*
@@ -388,7 +411,7 @@ jim_set(europc_t *sys, uint8_t reg, uint8_t val)
case 0x1f: /* 0001 1111 */
case 0x0b: /* 0000 1011 */
//europc_jim.mode=AGA_MONO;
pclog("EuroPC: AGA Monochrome mode!\n");
europc_log("EuroPC: AGA Monochrome mode!\n");
break;
case 0x18: /* 0001 1000 */
@@ -398,12 +421,12 @@ jim_set(europc_t *sys, uint8_t reg, uint8_t val)
case 0x0e: /* 0000 1100 */
/*80 columns? */
pclog("EuroPC: AGA 80-column mode!\n");
europc_log("EuroPC: AGA 80-column mode!\n");
break;
case 0x0d: /* 0000 1011 */
/*40 columns? */
pclog("EuroPC: AGA 40-column mode!\n");
europc_log("EuroPC: AGA 40-column mode!\n");
break;
default:
@@ -444,7 +467,7 @@ jim_write(uint16_t addr, uint8_t val, void *priv)
uint8_t b;
#if EUROPC_DEBUG > 1
pclog("EuroPC: jim_wr(%04x, %02x)\n", addr, val);
europc_log("EuroPC: jim_wr(%04x, %02x)\n", addr, val);
#endif
switch (addr & 0x000f) {
@@ -485,7 +508,7 @@ jim_write(uint16_t addr, uint8_t val, void *priv)
break;
default:
pclog("EuroPC: invalid JIM write %02x, val %02x\n", addr, val);
europc_log("EuroPC: invalid JIM write %02x, val %02x\n", addr, val);
break;
}
}
@@ -532,12 +555,12 @@ jim_read(uint16_t addr, void *priv)
break;
default:
pclog("EuroPC: invalid JIM read %02x\n", addr);
europc_log("EuroPC: invalid JIM read %02x\n", addr);
break;
}
#if EUROPC_DEBUG > 1
pclog("EuroPC: jim_rd(%04x): %02x\n", addr, r);
europc_log("EuroPC: jim_rd(%04x): %02x\n", addr, r);
#endif
return(r);
@@ -552,10 +575,10 @@ europc_boot(const device_t *info)
uint8_t b;
#if EUROPC_DEBUG
pclog("EuroPC: booting mainboard..\n");
europc_log("EuroPC: booting mainboard..\n");
#endif
pclog("EuroPC: NVR=[ %02x %02x %02x %02x %02x ] %sVALID\n",
europc_log("EuroPC: NVR=[ %02x %02x %02x %02x %02x ] %sVALID\n",
sys->nvr.regs[MRTC_CONF_A], sys->nvr.regs[MRTC_CONF_B],
sys->nvr.regs[MRTC_CONF_C], sys->nvr.regs[MRTC_CONF_D],
sys->nvr.regs[MRTC_CONF_E],

9
src/machine/m_pcjr.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of the IBM PCjr.
*
* Version: @(#)m_pcjr.c 1.0.7 2018/04/26
* Version: @(#)m_pcjr.c 1.0.8 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -18,12 +18,14 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../nmi.h"
@@ -603,9 +605,6 @@ kbd_read(uint16_t port, void *priv)
pcjr->latched = 0;
ret = 0;
break;
default:
pclog("\nBad PCjr keyboard read %04X\n", port);
}
return(ret);

59
src/machine/m_ps1_hdc.c
View File

@@ -43,7 +43,7 @@
* Type table with the main code, so the user can only select
* items from that list...
*
* Version: @(#)m_ps1_hdc.c 1.0.5 2018/04/26
* Version: @(#)m_ps1_hdc.c 1.0.6 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -85,11 +85,13 @@
#define __USE_LARGEFILE64
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../dma.h"
@@ -470,6 +472,27 @@ static const geom_t ibm_type_table[] = {
};
#ifdef ENABLE_PS1_HDC_LOG
int ps1_hdc_do_log = ENABLE_PS1_HDC_LOG;
#endif
static void
ps1_hdc_log(const char *fmt, ...)
{
#ifdef ENABLE_PS1_HDC_LOG
va_list ap;
if (ps1_hdc_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/* FIXME: we should use the disk/hdd_table.c code with custom tables! */
static int
ibm_drive_type(drive_t *drive)
@@ -506,26 +529,20 @@ static int
get_sector(hdc_t *dev, drive_t *drive, off64_t *addr)
{
if (drive->cur_cyl != dev->track) {
#if 0
pclog("HDC: get_sector: wrong cylinder %d/%d\n",
ps1_hdc_log("HDC: get_sector: wrong cylinder %d/%d\n",
drive->cur_cyl, dev->track);
#endif
dev->ssb.wrong_cyl = 1;
return(1);
}
if (dev->head >= drive->hpc) {
#if 0
pclog("HDC: get_sector: past end of heads\n");
#endif
ps1_hdc_log("HDC: get_sector: past end of heads\n");
dev->ssb.cylinder_err = 1;
return(1);
}
if (dev->sector > drive->spt) {
#if 0
pclog("HDC: get_sector: past end of sectors\n");
#endif
ps1_hdc_log("HDC: get_sector: past end of sectors\n");
dev->ssb.mark_not_found = 1;
return(1);
}
@@ -822,9 +839,7 @@ do_send:
val = dma_channel_write(dev->dma,
*dev->buf_ptr++);
if (val == DMA_NODATA) {
#if 0
pclog("HDC: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len);
#endif
ps1_hdc_log("HDC: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len);
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0);
@@ -946,9 +961,7 @@ do_recv:
while (dev->buf_idx < dev->buf_len) {
val = dma_channel_read(dev->dma);
if (val == DMA_NODATA) {
#if 0
pclog("HDC: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len);
#endif
ps1_hdc_log("HDC: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len);
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0);
@@ -1093,9 +1106,7 @@ hdc_read(uint16_t port, void *priv)
case 0: /* DATA register */
if (dev->state == STATE_SDATA) {
if (dev->buf_idx > dev->buf_len) {
#if 0
pclog("HDC: read with empty buffer!\n");
#endif
ps1_hdc_log("HDC: read with empty buffer!\n");
dev->state = STATE_IDLE;
dev->intstat |= ISR_INVALID_CMD;
dev->status &= (ASR_TX_EN|ASR_DATA_REQ|ASR_DIR);
@@ -1138,9 +1149,7 @@ hdc_write(uint16_t port, uint8_t val, void *priv)
case 0: /* DATA register */
if (dev->state == STATE_RDATA) {
if (dev->buf_idx >= dev->buf_len) {
#if 0
pclog("HDC: write with full buffer!\n");
#endif
ps1_hdc_log("HDC: write with full buffer!\n");
dev->intstat |= ISR_INVALID_CMD;
dev->status &= ~ASR_DATA_REQ;
set_intr(dev, 1);
@@ -1249,7 +1258,7 @@ ps1_hdc_init(const device_t *info)
dev->irq = 14;
dev->dma = 3;
pclog("HDC: initializing (I/O=%04X, IRQ=%d, DMA=%d)\n",
ps1_hdc_log("HDC: initializing (I/O=%04X, IRQ=%d, DMA=%d)\n",
dev->base, dev->irq, dev->dma);
/* Load any disks for this device class. */
@@ -1278,7 +1287,7 @@ ps1_hdc_init(const device_t *info)
drive->hdd_num = i;
drive->present = 1;
pclog("HDC: drive%d (type %d: cyl=%d,hd=%d,spt=%d), disk %d\n",
ps1_hdc_log("HDC: drive%d (type %d: cyl=%d,hd=%d,spt=%d), disk %d\n",
hdd[i].xta_channel, drive->type,
drive->tracks, drive->hpc, drive->spt, i);

64
src/machine/m_ps2_mca.c
View File

@@ -1,7 +1,9 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../cpu/x86.h"
@@ -94,9 +96,30 @@ static struct
static uint8_t ps2_cache[65536];
static int ps2_cache_valid[65536/8];
#ifdef ENABLE_PS2_MCA_LOG
int ps2_mca_do_log = ENABLE_PS2_MCA_LOG;
#endif
static void
ps2_mca_log(const char *format, ...)
{
#ifdef ENABLE_PS2_MCA_LOG
va_list ap;
if (ps2_mca_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
static uint8_t ps2_read_cache_ram(uint32_t addr, void *priv)
{
// pclog("ps2_read_cache_ram: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
ps2_mca_log("ps2_read_cache_ram: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
if (!ps2_cache_valid[addr >> 3])
{
ps2_cache_valid[addr >> 3] = 1;
@@ -109,7 +132,7 @@ static uint8_t ps2_read_cache_ram(uint32_t addr, void *priv)
}
static uint16_t ps2_read_cache_ramw(uint32_t addr, void *priv)
{
// pclog("ps2_read_cache_ramw: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
ps2_mca_log("ps2_read_cache_ramw: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
if (!ps2_cache_valid[addr >> 3])
{
ps2_cache_valid[addr >> 3] = 1;
@@ -122,7 +145,7 @@ static uint16_t ps2_read_cache_ramw(uint32_t addr, void *priv)
}
static uint32_t ps2_read_cache_raml(uint32_t addr, void *priv)
{
// pclog("ps2_read_cache_raml: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
ps2_mca_log("ps2_read_cache_raml: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc);
if (!ps2_cache_valid[addr >> 3])
{
ps2_cache_valid[addr >> 3] = 1;
@@ -135,7 +158,7 @@ static uint32_t ps2_read_cache_raml(uint32_t addr, void *priv)
}
static void ps2_write_cache_ram(uint32_t addr, uint8_t val, void *priv)
{
// pclog("ps2_write_cache_ram: addr=%08x val=%02x %04x:%04x %i\n", addr, val, CS,cpu_state.pc, ins);
ps2_mca_log("ps2_write_cache_ram: addr=%08x val=%02x %04x:%04x %i\n", addr, val, CS,cpu_state.pc, ins);
ps2_cache[addr] = val;
}
@@ -408,10 +431,10 @@ static void model_55sx_write(uint16_t port, uint8_t val)
case 0x104:
ps2.memory_bank[ps2.option[3] & 7] &= ~0xf;
ps2.memory_bank[ps2.option[3] & 7] |= (val & 0xf);
/* pclog("Write memory bank %i %02x\n", ps2.option[3] & 7, val); */
ps2_mca_log("Write memory bank %i %02x\n", ps2.option[3] & 7, val);
break;
case 0x105:
/* pclog("Write POS3 %02x\n", val); */
ps2_mca_log("Write POS3 %02x\n", val);
ps2.option[3] = val;
shadowbios = !(val & 0x10);
shadowbios_write = val & 0x10;
@@ -636,14 +659,14 @@ uint8_t ps2_mca_read(uint16_t port, void *p)
break;
}
/* pclog("ps2_read: port=%04x temp=%02x\n", port, temp); */
return temp;
ps2_mca_log("ps2_read: port=%04x temp=%02x\n", port, temp);
return temp;
}
static void ps2_mca_write(uint16_t port, uint8_t val, void *p)
{
/* pclog("ps2_write: port=%04x val=%02x %04x:%04x\n", port, val, CS,cpu_state.pc); */
ps2_mca_log("ps2_write: port=%04x val=%02x %04x:%04x\n", port, val, CS,cpu_state.pc);
switch (port)
{
@@ -893,18 +916,18 @@ static void mem_encoding_update()
if (ps2.mem_regs[1] & 2) {
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
/* pclog("PS/2 Model 80-111: ROM space enabled\n"); */
ps2_mca_log("PS/2 Model 80-111: ROM space enabled\n");
} else {
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
/* pclog("PS/2 Model 80-111: ROM space disabled\n"); */
ps2_mca_log("PS/2 Model 80-111: ROM space disabled\n");
}
if (ps2.mem_regs[1] & 4) {
mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0x80000);
/* pclog("PS/2 Model 80-111: 00080000- 0009FFFF disabled\n"); */
ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF disabled\n");
} else {
mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0xa0000);
/* pclog("PS/2 Model 80-111: 00080000- 0009FFFF enabled\n"); */
ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF enabled\n");
}
if (!(ps2.mem_regs[1] & 8))
@@ -920,10 +943,9 @@ static void mem_encoding_update()
mem_mapping_set_exec(&ps2.split_mapping, &ram[ps2.split_phys]);
mem_mapping_set_addr(&ps2.split_mapping, ps2.split_addr, ps2.split_size << 10);
/* pclog("PS/2 Model 80-111: Split memory block enabled at %08X\n", ps2.split_addr); */
} /* else {
pclog("PS/2 Model 80-111: Split memory block disabled\n");
} */
ps2_mca_log("PS/2 Model 80-111: Split memory block enabled at %08X\n", ps2.split_addr);
} else
ps2_mca_log("PS/2 Model 80-111: Split memory block disabled\n");
}
static uint8_t mem_encoding_read(uint16_t addr, void *p)
@@ -982,7 +1004,7 @@ static void mem_encoding_write_cached(uint16_t addr, uint8_t val, void *p)
ps2.mem_regs[2] = (ps2.mem_regs[2] & 0x80) | (val & ~0x88);
if (val & 2)
{
// pclog("Clear latch - %i\n", ps2.pending_cache_miss);
ps2_mca_log("Clear latch - %i\n", ps2.pending_cache_miss);
if (ps2.pending_cache_miss)
ps2.mem_regs[2] |= 0x80;
else
@@ -1000,7 +1022,7 @@ static void mem_encoding_write_cached(uint16_t addr, uint8_t val, void *p)
ram_mid_mapping.flags &= ~MEM_MAPPING_ROM;
break;
}
// pclog("mem_encoding_write: addr=%02x val=%02x %04x:%04x %02x %02x\n", addr, val, CS,cpu_state.pc, ps2.mem_regs[1],ps2.mem_regs[2]);
ps2_mca_log("mem_encoding_write: addr=%02x val=%02x %04x:%04x %02x %02x\n", addr, val, CS,cpu_state.pc, ps2.mem_regs[1],ps2.mem_regs[2]);
mem_encoding_update();
if ((ps2.mem_regs[1] & 0x10) && (ps2.mem_regs[2] & 0x21) == 0x20)
{

30
src/machine/m_tandy.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of Tandy models 1000, 1000HX and 1000SL2.
*
* Version: @(#)m_tandy.c 1.0.6 2018/04/26
* Version: @(#)m_tandy.c 1.0.7 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -16,12 +16,14 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../pit.h"
@@ -397,6 +399,28 @@ static int eep_data_out;
static uint8_t vid_in(uint16_t addr, void *priv);
static void vid_out(uint16_t addr, uint8_t val, void *priv);
#ifdef ENABLE_TANDY_LOG
int tandy_do_log = ENABLE_TANDY_LOG;
#endif
static void
tandy_log(const char *fmt, ...)
{
#ifdef ENABLE_TANDY_LOG
va_list ap;
if (tandy_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void
recalc_mapping(tandy_t *dev)
{
@@ -1666,7 +1690,7 @@ init_rom(tandy_t *dev)
if (! rom_load_interleaved(L"roms/machines/tandy1000sl2/8079047.hu1",
L"roms/machines/tandy1000sl2/8079048.hu2",
0x000000, 0x80000, 0, dev->rom)) {
pclog("TANDY: unable to load BIOS for 1000/SL2 !\n");
tandy_log("TANDY: unable to load BIOS for 1000/SL2 !\n");
free(dev->rom);
dev->rom = NULL;
return;

49
src/machine/m_xt_t1000.c
View File

@@ -51,7 +51,7 @@
* NOTE: Still need to figure out a way to load/save ConfigSys and
* HardRAM stuff. Needs to be linked in to the NVR code.
*
* Version: @(#)m_xt_t1000.c 1.0.5 2018/04/11
* Version: @(#)m_xt_t1000.c 1.0.6 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -79,12 +79,14 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <time.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../io.h"
@@ -176,6 +178,27 @@ typedef struct {
static t1000_t t1000;
#ifdef ENABLE_T1000_LOG
int t1000_do_log = ENABLE_T1000_LOG;
#endif
static void
t1000_log(const char *fmt, ...)
{
#ifdef ENABLE_TANDY_LOG
va_list ap;
if (t1000_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/* Set the chip time. */
static void
tc8521_time_set(uint8_t *regs, struct tm *tm)
@@ -225,7 +248,7 @@ tc8521_time_get(uint8_t *regs, struct tm *tm)
static void
tc8521_tick(nvr_t *nvr)
{
pclog("TC8521: ping\n");
t1000_log("TC8521: ping\n");
}
@@ -336,7 +359,7 @@ ems_execaddr(t1000_t *sys, int pg, uint16_t val)
* HardRAM or conventional RAM */
val &= 0x7f;
#if 0
#if 0
t1000_log("Select EMS page: %d of %d\n", val, sys->ems_pages);
#endif
if (val < sys->ems_pages) {
@@ -354,7 +377,7 @@ ems_in(uint16_t addr, void *priv)
{
t1000_t *sys = (t1000_t *)priv;
#if 0
#if 0
t1000_log("ems_in(%04x)=%02x\n", addr, sys->ems_reg[(addr >> 14) & 3]);
#endif
return(sys->ems_reg[(addr >> 14) & 3]);
@@ -367,7 +390,7 @@ ems_out(uint16_t addr, uint8_t val, void *priv)
t1000_t *sys = (t1000_t *)priv;
int pg = (addr >> 14) & 3;
#if 0
#if 0
t1000_log("ems_out(%04x, %02x) pg=%d\n", addr, val, pg);
#endif
sys->ems_reg[pg] = val;
@@ -394,7 +417,7 @@ ems_set_hardram(t1000_t *sys, uint8_t val)
else
sys->ems_base = 0;
#if 0
#if 0
t1000_log("EMS base set to %02x\n", val);
#endif
sys->ems_pages = 48 - 4 * sys->ems_base;
@@ -424,7 +447,7 @@ ems_set_port(t1000_t *sys, uint8_t val)
{
int n;
#if 0
#if 0
t1000_log("ems_set_port(%d)", val & 0x0f);
#endif
if (sys->ems_port) {
@@ -449,7 +472,7 @@ ems_set_port(t1000_t *sys, uint8_t val)
sys->ems_port = 0;
}
#if 0
#if 0
t1000_log(" -> %04x\n", sys->ems_port);
#endif
}
@@ -484,12 +507,12 @@ ems_read_ramw(uint32_t addr, void *priv)
if (pg < 0) return(0xff);
#if 0
#if 0
t1000_log("ems_read_ramw addr=%05x ", addr);
#endif
addr = sys->page_exec[pg] + (addr & 0x3FFF);
#if 0
#if 0
t1000_log("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]);
#endif
@@ -534,12 +557,12 @@ ems_write_ramw(uint32_t addr, uint16_t val, void *priv)
if (pg < 0) return;
#if 0
#if 0
t1000_log("ems_write_ramw addr=%05x ", addr);
#endif
addr = sys->page_exec[pg] + (addr & 0x3fff);
#if 0
#if 0
t1000_log("-> %06x val=%04x\n", addr, val);
#endif

4
src/machine/m_xt_t1000_vid.c
View File

@@ -9,7 +9,7 @@
* Implementation of the Toshiba T1000 plasma display, which
* has a fixed resolution of 640x200 pixels.
*
* Version: @(#)m_xt_t1000_vid.c 1.0.6 2018/04/26
* Version: @(#)m_xt_t1000_vid.c 1.0.7 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -185,7 +185,6 @@ static void t1000_write(uint32_t addr, uint8_t val, void *p)
t1000_t *t1000 = (t1000_t *)p;
egawrites++;
// pclog("CGA_WRITE %04X %02X\n", addr, val);
t1000->vram[addr & 0x3fff] = val;
cycles -= 4;
}
@@ -196,7 +195,6 @@ static uint8_t t1000_read(uint32_t addr, void *p)
egareads++;
cycles -= 4;
// pclog("CGA_READ %04X\n", addr);
return t1000->vram[addr & 0x3fff];
}

29
src/machine/machine.c
View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)machine.c 1.0.33 2018/03/26
* Version: @(#)machine.c 1.0.34 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -18,10 +18,12 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../dma.h"
@@ -40,10 +42,31 @@ int AT, PCI;
int romset;
#ifdef ENABLE_MACHINE_LOG
int machine_do_log = ENABLE_MACHINE_LOG;
#endif
static void
machine_log(const char *fmt, ...)
{
#ifdef ENABLE_TANDY_LOG
va_list ap;
if (machine_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
void
machine_init(void)
{
pclog("Initializing as \"%s\"\n", machine_getname());
machine_log("Initializing as \"%s\"\n", machine_getname());
/* Set up the architecture flags. */
AT = IS_ARCH(machine, MACHINE_AT);

3
src/machine/machine.h
View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)machine.h 1.0.23 2018/03/28
* Version: @(#)machine.h 1.0.24 2018/05/10
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -113,6 +113,7 @@ extern void machine_at_zappa_init(const machine_t *);
extern void machine_at_mb500n_init(const machine_t *);
extern void machine_at_president_init(const machine_t *);
extern void machine_at_thor_init(const machine_t *);
extern void machine_at_pb640_init(const machine_t *);
extern void machine_at_acerm3a_init(const machine_t *);
extern void machine_at_acerv35n_init(const machine_t *);

8
src/machine/machine_table.c
View File

@@ -11,7 +11,7 @@
* NOTES: OpenAT wip for 286-class machine with open BIOS.
* PS2_M80-486 wip, pending receipt of TRM's for machine.
*
* Version: @(#)machine_table.c 1.0.28 2018/04/10
* Version: @(#)machine_table.c 1.0.29 2018/05/10
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -129,7 +129,10 @@ const machine_t machines[] = {
{ "[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL },
{ "[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_MRTHOR)
{ "[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
#endif
{ "[Socket 7 FX] Packard Bell PB640", ROM_PB640, "pb640", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 8, 128, 8, 127, machine_at_pb640_init, NULL },
{ "[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL },
{ "[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL },
@@ -150,7 +153,10 @@ const machine_t machines[] = {
{ "[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL },
{ "[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_MRTHOR)
{ "[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
#endif
{ "[Socket 7 FX] Packard Bell PB640", ROM_PB640, "pb640", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 8, 128, 8, 127, machine_at_pb640_init, NULL },
{ "[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL },
{ "[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL },

1
src/mcr.c
View File

@@ -24,7 +24,6 @@ void resetmcr(void)
void writemcr(uint16_t addr, uint8_t val)
{
pclog("MCR: write %04X %02X %04X:%04X\n",addr,val,CS,cpu_state.pc);
switch (addr)
{
case 0x22:

34
src/mem.c
View File

@@ -12,7 +12,7 @@
* the DYNAMIC_TABLES=1 enables this. Will eventually go
* away, either way...
*
* Version: @(#)mem.c 1.0.9 2018/03/19
* Version: @(#)mem.c 1.0.10 2018/04/29
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -40,11 +40,13 @@
* Boston, MA 02111-1307
* USA.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "cpu/cpu.h"
#include "cpu/x86_ops.h"
@@ -149,6 +151,26 @@ static uint8_t ff_pccache[4] = { 0xff, 0xff, 0xff, 0xff };
static int port_92_reg = 0;
#ifdef ENABLE_MEM_LOG
int mem_do_log = ENABLE_MEM_LOG;
#endif
static void
mem_log(const char *format, ...)
{
#ifdef ENABLE_MEM_LOG
va_list ap;
if (mem_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
void
resetreadlookup(void)
{
@@ -156,7 +178,7 @@ resetreadlookup(void)
/* This is NULL after app startup, when mem_init() has not yet run. */
#if DYNAMIC_TABLES
pclog("MEM: reset_lookup: pages=%08lx, lookup=%08lx, pages_sz=%i\n", pages, page_lookup, pages_sz);
mem_log("MEM: reset_lookup: pages=%08lx, lookup=%08lx, pages_sz=%i\n", pages, page_lookup, pages_sz);
#endif
/* Initialize the page lookup table. */
@@ -479,7 +501,7 @@ getpccache(uint32_t a)
return &_mem_exec[a >> 14][(uintptr_t)(a & 0x3000) - (uintptr_t)(a2 & ~0xfff)];
}
pclog("Bad getpccache %08X\n", a);
mem_log("Bad getpccache %08X\n", a);
#if FIXME
return &ff_array[0-(uintptr_t)(a2 & ~0xfff)];
@@ -717,7 +739,7 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val)
addr2 &= rammask;
#if 0
if (addr2 >= 0xa0000 && addr2 < 0xc0000)
if (addr2 >= 0xa0000 && addr2 < 0xc0000)
mem_log("writememwl %08X %02X\n", addr2, val);
#endif
@@ -1618,7 +1640,7 @@ mem_reset(void)
* Allocate and initialize the (new) page table.
* We only do this if the size of the page table has changed.
*/
#if DYNAMIC_TABLES
#if DYNAMIC_TABLES
mem_log("MEM: reset: previous pages=%08lx, pages_sz=%i\n", pages, pages_sz);
#endif
if (pages_sz != m) {
@@ -1628,7 +1650,7 @@ pclog("MEM: reset: previous pages=%08lx, pages_sz=%i\n", pages, pages_sz);
pages = NULL;
}
pages = (page_t *)malloc(m*sizeof(page_t));
#if DYNAMIC_TABLES
#if DYNAMIC_TABLES
mem_log("MEM: reset: new pages=%08lx, pages_sz=%i\n", pages, pages_sz);
#endif

10
src/memregs.c
View File

@@ -9,16 +9,18 @@
* Emulation of the memory I/O scratch registers on ports 0xE1
* and 0xE2, used by just about any emulated machine.
*
* Version: @(#)memregs.c 1.0.5 2017/12/28
* Version: @(#)memregs.c 1.0.6 2018/04/29
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2017 Miran Grca.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "io.h"
#include "memregs.h"
@@ -51,15 +53,11 @@ uint8_t memregs_read(uint16_t port, void *priv)
void memregs_init(void)
{
/* pclog("Memory Registers Init\n"); */
io_sethandler(0x00e1, 0x0002, memregs_read, NULL, NULL, memregs_write, NULL, NULL, NULL);
}
void powermate_memregs_init(void)
{
/* pclog("Memory Registers Init\n"); */
io_sethandler(0x00ed, 0x0002, memregs_read, NULL, NULL, memregs_write, NULL, NULL, NULL);
io_sethandler(0xffff, 0x0001, memregs_read, NULL, NULL, memregs_write, NULL, NULL, NULL);
}

26
src/mouse.c
View File

@@ -11,7 +11,7 @@
* TODO: Add the Genius bus- and serial mouse.
* Remove the '3-button' flag from mouse types.
*
* Version: @(#)mouse.c 1.0.26 2018/04/26
* Version: @(#)mouse.c 1.0.27 2018/04/29
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -19,10 +19,12 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "device.h"
#include "mouse.h"
@@ -78,6 +80,26 @@ static int mouse_nbut;
static int (*mouse_dev_poll)();
#ifdef ENABLE_MOUSE_LOG
int mouse_do_log = ENABLE_MOUSE_LOG;
#endif
static void
mouse_log(const char *format, ...)
{
#ifdef ENABLE_MOUSE_LOG
va_list ap;
if (mouse_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Initialize the mouse module. */
void
mouse_init(void)
@@ -112,7 +134,7 @@ mouse_reset(void)
if ((mouse_curr != NULL) || (mouse_type == MOUSE_TYPE_INTERNAL))
return; /* Mouse already initialized. */
pclog("MOUSE: reset(type=%d, '%s')\n",
mouse_log("MOUSE: reset(type=%d, '%s')\n",
mouse_type, mouse_devices[mouse_type].device->name);
/* Clear local data. */

207
src/mouse_bus.c
View File

@@ -49,18 +49,20 @@
*
* Based on an early driver for MINIX 1.5.
*
* Version: @(#)mouse_bus.c 1.0.33 2018/04/26
* Version: @(#)mouse_bus.c 1.0.35 2018/05/21
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 1989-2018 Fred N. van Kempen.
*/
#include <inttypes.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <inttypes.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "config.h"
#include "io.h"
@@ -81,7 +83,7 @@ typedef struct mouse {
const char *name; /* name of this device */
int8_t type; /* type of this device */
int8_t irq; /* IRQ channel to use */
uint8_t flags; /* device flags */
uint16_t flags; /* device flags */
uint8_t r_magic, /* MAGIC register */
r_ctrl, /* CONTROL register (WR) */
@@ -96,7 +98,6 @@ typedef struct mouse {
int8_t x, y;
int x_delay,
y_delay;
uint8_t need_upd;
uint8_t irq_num;
int64_t timer; /* mouse event timer */
@@ -104,6 +105,7 @@ typedef struct mouse {
uint8_t (*read)(struct mouse *, uint16_t);
void (*write)(struct mouse *, uint16_t, uint8_t);
} mouse_t;
#define FLAG_NEW 0x100 /* device is the newer variant */
#define FLAG_INPORT 0x80 /* device is MS InPort */
#define FLAG_3BTN 0x20 /* enable 3-button mode */
#define FLAG_SCALED 0x10 /* enable delta scaling */
@@ -147,11 +149,30 @@ typedef struct mouse {
# define MSDATA_HZ200 0x04 /* ATIXL 200Hz */
#define MSMOUSE_MAGIC 2 /* MAGIC register */
# define MAGIC_MSBYTE1 0xde /* indicates MS InPort */
// # define MAGIC_MSBYTE2 0x12
# define MAGIC_MSBYTE2 0x22 /* According to the Bochs code, this sould be 0x22, not 0x12. */
# define MAGIC_MSBYTE2 0x12
#define MSMOUSE_CONFIG 3 /* CONFIG register */
#ifdef ENABLE_MOUSE_BUS_LOG
int mouse_bus_do_log = ENABLE_MOUSE_BUS_LOG;
#endif
static void
mouse_bus_log(const char *format, ...)
{
#ifdef ENABLE_MOUSE_BUS_LOG
va_list ap;
if (mouse_bus_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Reset the controller state. */
static void
ms_reset(mouse_t *dev)
@@ -168,7 +189,6 @@ ms_reset(mouse_t *dev)
dev->flags |= (FLAG_INTR | FLAG_ENABLED);
dev->x_delay = dev->y_delay = 0;
dev->need_upd = 0;
dev->cur_but = 0x00;
}
@@ -201,12 +221,11 @@ ms_update_data(mouse_t *dev)
dev->y_delay = 0;
}
if ((dev->x_delay == 0) && (dev->y_delay == 0))
dev->need_upd = 0;
dev->x = (int8_t) delta_x;
dev->y = (int8_t) delta_y;
dev->cur_but = dev->but;
if (!(dev->flags & FLAG_FROZEN)) {
dev->x = (int8_t) delta_x;
dev->y = (int8_t) delta_y;
dev->cur_but = dev->but;
}
}
@@ -214,39 +233,44 @@ ms_update_data(mouse_t *dev)
static void
ms_write(mouse_t *dev, uint16_t port, uint8_t val)
{
uint8_t valxor;
switch (port) {
case MSMOUSE_CTRL:
switch (val) {
case MSCTRL_RESET:
ms_reset(dev);
break;
/* Bit 7 is reset. */
if (val & MSCTRL_RESET)
ms_reset(dev);
/* Bits 0-2 are the internal register index. */
switch (val & 0x07) {
case MSCTRL_COMMAND:
case MSCTRL_RD_BUT:
case MSCTRL_RD_X:
case MSCTRL_RD_Y:
dev->r_ctrl = val & 0x07;
break;
case 0x87:
ms_reset(dev);
dev->r_ctrl = MSCTRL_COMMAND;
dev->r_cmd = val & 0x07;
break;
}
break;
case MSMOUSE_DATA:
picintc(1 << dev->irq);
if (val == MSDATA_IRQ) {
picint(1<<dev->irq);
} else switch (dev->r_ctrl) {
case MSCTRL_COMMAND:
if (val & MSCTRL_FREEZE) {
/* Hold the sampling. */
ms_update_data(dev);
} else {
/* Reset current state. */
picintc(1 << dev->irq);
} else {
switch (dev->r_cmd) {
case MSCTRL_COMMAND:
valxor = (dev->r_ctrl ^ val);
if (valxor & MSCTRL_FREEZE) {
if (val & LTCTRL_FREEZE) {
/* Hold the sampling while we do something. */
dev->flags |= FLAG_FROZEN;
} else {
/* Reset current state. */
dev->flags &= ~FLAG_FROZEN;
}
}
}
if (val & (MSCTRL_IENB_M | MSCTRL_IENB_A))
@@ -254,7 +278,7 @@ ms_write(mouse_t *dev, uint16_t port, uint8_t val)
else
dev->flags &= ~FLAG_INTR;
dev->r_cmd = val;
dev->r_ctrl = val;
break;
default:
@@ -283,9 +307,11 @@ ms_read(mouse_t *dev, uint16_t port)
break;
case MSMOUSE_DATA:
switch (dev->r_ctrl) {
switch (dev->r_cmd) {
case MSCTRL_RD_BUT:
ret = dev->cur_but;
if (dev->flags & FLAG_NEW)
ret |= 0x40; /* On new InPort, always have bit 6 set. */
break;
case MSCTRL_RD_X:
@@ -297,7 +323,7 @@ ms_read(mouse_t *dev, uint16_t port)
break;
case MSCTRL_COMMAND:
ret = dev->r_cmd;
ret = dev->r_ctrl;
break;
}
break;
@@ -348,25 +374,25 @@ bm_timer(void *priv)
if (dev->flags & FLAG_INPORT) {
dev->timer = ((1000000LL * TIMER_USEC) / 30LL);
if ((dev->flags & FLAG_INTR) && dev->need_upd) {
ms_update_data(dev);
if (dev->flags & FLAG_INTR)
picint(1 << dev->irq);
/* pclog("IRQ %i raised\n", dev->irq); */
}
} else {
picint(1 << dev->irq);
if (dev->irq_num == 5) {
/* pclog("5th IRQ, enabling mouse...\n"); */
mouse_bus_log("5th IRQ, enabling mouse...\n");
lt_reset(dev);
dev->flags |= FLAG_ENABLED;
}
if (dev->irq_num == 4) {
/* pclog("4th IRQ, going for the 5th...\n"); */
mouse_bus_log("4th IRQ, going for the 5th...\n");
dev->irq_num++;
dev->timer = ((1000000LL * TIMER_USEC) / 30LL);
} else {
/* pclog("IRQ before the 4th, disabling timer...\n"); */
mouse_bus_log("IRQ before the 4th, disabling timer...\n");
dev->timer = 0;
}
}
@@ -467,6 +493,19 @@ lt_write(mouse_t *dev, uint16_t port, uint8_t val)
}
static int
lt_read_int(mouse_t *dev)
{
if (!(dev->flags & FLAG_NEW))
return 1; /* On old LogiBus, read the IRQ bits always. */
if (dev->flags & FLAG_INTR)
return 1; /* On new LogiBus, read the IRQ bits if interrupts are enabled. */
return 0; /* Otherwise, do not. */
}
/* Handle a READ from a Logitech register. */
static uint8_t
lt_read(mouse_t *dev, uint16_t port)
@@ -518,7 +557,7 @@ lt_read(mouse_t *dev, uint16_t port)
case LTMOUSE_CTRL: /* [02] control register */
ret = 0x0f;
if (!(dev->r_ctrl & LTCTRL_IDIS) && (dev->seq++ == 0)) {
if (!(dev->r_ctrl & LTCTRL_IDIS) && (dev->seq > 0x3FF) && lt_read_int(dev)) {
/* !IDIS, return DIP switch setting. */
switch(dev->irq) {
case 2:
@@ -538,6 +577,7 @@ lt_read(mouse_t *dev, uint16_t port)
break;
}
}
dev->seq = (dev->seq + 1) & 0x7ff;
break;
case LTMOUSE_CONFIG: /* [03] config register */
@@ -558,11 +598,9 @@ bm_write(uint16_t port, uint8_t val, void *priv)
{
mouse_t *dev = (mouse_t *)priv;
#if MOUSE_DEBUG
pclog("%s: write(%d,%02x)\n", dev->name, port-MOUSE_PORT, val);
#endif
mouse_bus_log("%s: write(%d,%02x)\n", dev->name, port-MOUSE_PORT, val);
dev->write(dev, port-MOUSE_PORT, val);
dev->write(dev, port & 0x03, val);
}
@@ -573,11 +611,9 @@ bm_read(uint16_t port, void *priv)
mouse_t *dev = (mouse_t *)priv;
uint8_t ret;
ret = dev->read(dev, port-MOUSE_PORT);
ret = dev->read(dev, port & 0x03);
#if MOUSE_DEBUG > 1
pclog("%s: read(%d): %02x\n", dev->name, port-MOUSE_PORT, ret);
#endif
mouse_bus_log("%s: read(%d): %02x\n", dev->name, port-MOUSE_PORT, ret);
return(ret);
}
@@ -587,20 +623,18 @@ bm_read(uint16_t port, void *priv)
static int
bm_poll(int x, int y, int z, int b, void *priv)
{
uint8_t b_last;
mouse_t *dev = (mouse_t *)priv;
b_last = dev->but;
/* Return early if nothing to do. */
if (!x && !y && !z && (dev->but == b))
return(1);
/* If we are not enabled, return. */
if (! (dev->flags & FLAG_ENABLED))
pclog("bm_poll(): Mouse not enabled\n");
#if 0
pclog("%s: poll(%d,%d,%d,%02x) %d\n",
dev->name, x, y, z, b, !!(dev->flags & FLAG_FROZEN));
#endif
mouse_bus_log("bm_poll(): Mouse not enabled\n");
if (dev->flags & FLAG_SCALED) {
/* Scale down the motion. */
@@ -609,6 +643,11 @@ bm_poll(int x, int y, int z, int b, void *priv)
}
if (dev->flags & FLAG_INPORT) {
if (x || y || z)
dev->but = 0x40; /* Mouse has moved. */
else
dev->but = 0x00;
if (x > 127) x = 127;
if (y > 127) y = 127;
if (x < -128) x = -128;
@@ -616,10 +655,18 @@ bm_poll(int x, int y, int z, int b, void *priv)
dev->x_delay += x;
dev->y_delay += y;
dev->but = (uint8_t)(0x40 | ((b & 1) << 2) | ((b & 2) >> 1));
dev->but |= (uint8_t) (((b & 1) << 2) | ((b & 2) >> 1));
if (dev->flags & FLAG_3BTN)
dev->but |= ((b & 4) >> 1);
dev->need_upd = 1;
if ((b_last ^ dev->but) & 0x04)
dev->but |= 0x20; /* Left button state has changed. */
if (((b_last ^ dev->but) & 0x02) && (dev->flags & FLAG_3BTN))
dev->but |= 0x10; /* Middle button state has changed. */
if ((b_last ^ dev->but) & 0x01)
dev->but |= 0x08; /* Right button state has changed. */
dev->but |= 0x80; /* Packet complete. */
} else {
/* If we are frozen, do not update the state. */
if (! (dev->flags & FLAG_FROZEN)) {
@@ -672,7 +719,8 @@ static void *
bm_init(const device_t *info)
{
mouse_t *dev;
int i;
int i, j;
uint16_t base;
dev = (mouse_t *)malloc(sizeof(mouse_t));
memset(dev, 0x00, sizeof(mouse_t));
@@ -682,9 +730,12 @@ bm_init(const device_t *info)
i = device_get_config_int("buttons");
if (i > 2)
dev->flags |= FLAG_3BTN;
j = device_get_config_int("model");
if (j)
dev->flags |= FLAG_NEW;
pclog("%s: I/O=%04x, IRQ=%d, buttons=%d\n",
dev->name, MOUSE_PORT, dev->irq, i);
mouse_bus_log("%s: I/O=%04x, IRQ=%d, buttons=%d, model=%s\n",
dev->name, MOUSE_PORT, dev->irq, i, j ? "new" : "old");
switch(dev->type) {
case MOUSE_TYPE_LOGIBUS:
@@ -712,7 +763,8 @@ bm_init(const device_t *info)
}
/* Request an I/O range. */
io_sethandler(MOUSE_PORT, 4,
base = device_get_config_int("base");
io_sethandler(base, 4,
bm_read, NULL, NULL, bm_write, NULL, NULL, dev);
/* Tell them how many buttons we have. */
@@ -724,6 +776,26 @@ bm_init(const device_t *info)
static const device_config_t bm_config[] = {
{
"base", "Address", CONFIG_HEX16, "", MOUSE_PORT,
{
{
"0x230", 0x230
},
{
"0x234", 0x234
},
{
"0x238", 0x238
},
{
"0x23C", 0x23c
},
{
""
}
}
},
{
"irq", "IRQ", CONFIG_SELECTION, "", MOUSE_IRQ, {
{
@@ -756,6 +828,19 @@ static const device_config_t bm_config[] = {
}
}
},
{
"model", "Model", CONFIG_SELECTION, "", 0, {
{
"Old", 0
},
{
"New", 1
},
{
""
}
}
},
{
"", "", -1
}

30
src/mouse_ps2.c
View File

@@ -8,15 +8,17 @@
*
* Implementation of PS/2 series Mouse devices.
*
* Version: @(#)mouse_ps2.c 1.0.7 2018/04/26
* Version: @(#)mouse_ps2.c 1.0.9 2018/05/12
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "config.h"
#include "device.h"
@@ -57,6 +59,26 @@ typedef struct {
int mouse_scan = 0;
#ifdef ENABLE_MOUSE_PS2_LOG
int mouse_ps2_do_log = ENABLE_MOUSE_PS2_LOG;
#endif
static void
mouse_ps2_log(const char *format, ...)
{
#ifdef ENABLE_MOUSE_PS2_LOG
va_list ap;
if (mouse_ps2_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
static void
ps2_write(uint8_t val, void *priv)
{
@@ -74,7 +96,7 @@ ps2_write(uint8_t val, void *priv)
case 0xf3: /* set sample rate */
dev->sample_rate = val;
keyboard_at_adddata_mouse(0xfa);
keyboard_at_adddata_mouse(0xfa); /* Command response */
break;
default:
@@ -123,7 +145,7 @@ ps2_write(uint8_t val, void *priv)
case 0xf3: /* set command mode */
dev->flags |= FLAG_CTRLDAT;
keyboard_at_adddata_mouse(0xfa);
keyboard_at_adddata_mouse(0xfa); /* ACK for command byte */
break;
case 0xf4: /* enable */
@@ -242,7 +264,7 @@ mouse_ps2_init(const device_t *info)
/* Hook into the general AT Keyboard driver. */
keyboard_at_set_mouse(ps2_write, dev);
pclog("%s: buttons=%d\n", dev->name, (dev->flags & FLAG_INTELLI)? 3 : 2);
mouse_ps2_log("%s: buttons=%d\n", dev->name, (dev->flags & FLAG_INTELLI)? 3 : 2);
/* Tell them how many buttons we have. */
mouse_set_buttons((dev->flags & FLAG_INTELLI) ? 3 : 2);

36
src/mouse_serial.c
View File

@@ -10,15 +10,17 @@
*
* TODO: Add the Genius Serial Mouse.
*
* Version: @(#)mouse_serial.c 1.0.22 2018/04/26
* Version: @(#)mouse_serial.c 1.0.23 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "config.h"
#include "device.h"
@@ -50,6 +52,26 @@ typedef struct {
#define FLAG_ENABLED 0x01 /* dev is enabled for use */
#ifdef ENABLE_MOUSE_SERIAL_LOG
int mouse_serial_do_log = ENABLE_MOUSE_SERIAL_LOG;
#endif
static void
mouse_serial_log(const char *format, ...)
{
#ifdef ENABLE_MOUSE_SERIAL_LOG
va_list ap;
if (mouse_serial_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Callback from serial driver: RTS was toggled. */
static void
sermouse_callback(struct SERIAL *serial, void *priv)
@@ -98,7 +120,7 @@ sermouse_timer(void *priv)
break;
default:
pclog("%s: unsupported mouse type %d?\n", dev->type);
mouse_serial_log("%s: unsupported mouse type %d?\n", dev->type);
}
}
@@ -113,7 +135,7 @@ sermouse_poll(int x, int y, int z, int b, void *priv)
if (!x && !y && b == dev->oldb) return(1);
#if 0
pclog("%s: poll(%d,%d,%d,%02x)\n", dev->name, x, y, z, b);
mouse_serial_log("%s: poll(%d,%d,%d,%02x)\n", dev->name, x, y, z, b);
#endif
dev->oldb = b;
@@ -164,9 +186,9 @@ sermouse_poll(int x, int y, int z, int b, void *priv)
}
#if 0
pclog("%s: [", dev->name);
for (b=0; b<len; b++) pclog(" %02X", buff[b]);
pclog(" ] (%d)\n", len);
mouse_serial_log("%s: [", dev->name);
for (b=0; b<len; b++) mouse_serial_log(" %02X", buff[b]);
mouse_serial_log(" ] (%d)\n", len);
#endif
/* Send the packet to the bottom-half of the attached port. */
@@ -235,7 +257,7 @@ sermouse_init(const device_t *info)
dev->serial->rcr_callback = sermouse_callback;
dev->serial->rcr_callback_p = dev;
pclog("%s: port=COM%d\n", dev->name, dev->port+1);
mouse_serial_log("%s: port=COM%d\n", dev->name, dev->port+1);
timer_add(sermouse_timer, &dev->delay, &dev->delay, dev);

55
src/network/net_pcap.c
View File

@@ -8,7 +8,7 @@
*
* Handle WinPcap library processing.
*
* Version: @(#)net_pcap.c 1.0.3 2018/03/15
* Version: @(#)net_pcap.c 1.0.4 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -44,12 +44,13 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
// #include <pcap/pcap.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../config.h"
#include "../device.h"
@@ -136,6 +137,26 @@ static dllimp_t pcap_imports[] = {
};
#ifdef ENABLE_PCAP_LOG
int pcap_do_log = ENABLE_PCAP_LOG;
#endif
static void
pcap_log(const char *format, ...)
{
#ifdef ENABLE_PCAP_LOG
va_list ap;
if (pcap_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Handle the receiving of frames from the channel. */
static void
poll_thread(void *arg)
@@ -147,7 +168,7 @@ poll_thread(void *arg)
uint16_t mac_cmp16[2];
event_t *evt;
pclog("PCAP: polling started.\n");
pcap_log("PCAP: polling started.\n");
thread_set_event(poll_state);
/* Create a waitable event. */
@@ -195,7 +216,7 @@ poll_thread(void *arg)
if (evt != NULL)
thread_destroy_event(evt);
pclog("PCAP: polling stopped.\n");
pcap_log("PCAP: polling stopped.\n");
thread_set_event(poll_state);
}
@@ -227,7 +248,7 @@ net_pcap_prepare(netdev_t *list)
/* Retrieve the device list from the local machine */
if (f_pcap_findalldevs(&devlist, errbuf) == -1) {
pclog("PCAP: error in pcap_findalldevs: %s\n", errbuf);
pcap_log("PCAP: error in pcap_findalldevs: %s\n", errbuf);
return(-1);
}
@@ -277,11 +298,11 @@ net_pcap_init(void)
strcpy(errbuf, f_pcap_lib_version());
str = strchr(errbuf, '(');
if (str != NULL) *(str-1) = '\0';
pclog("PCAP: initializing, %s\n", errbuf);
pcap_log("PCAP: initializing, %s\n", errbuf);
/* Get the value of our capture interface. */
if ((network_host[0] == '\0') || !strcmp(network_host, "none")) {
pclog("PCAP: no interface configured!\n");
pcap_log("PCAP: no interface configured!\n");
return(-1);
}
@@ -301,7 +322,7 @@ net_pcap_close(void)
if (pcap == NULL) return;
pclog("PCAP: closing.\n");
pcap_log("PCAP: closing.\n");
/* Tell the polling thread to shut down. */
pc = (void *)pcap; pcap = NULL;
@@ -311,9 +332,9 @@ net_pcap_close(void)
network_busy(0);
/* Wait for the thread to finish. */
pclog("PCAP: waiting for thread to end...\n");
pcap_log("PCAP: waiting for thread to end...\n");
thread_wait_event(poll_state, -1);
pclog("PCAP: thread ended\n");
pcap_log("PCAP: thread ended\n");
thread_destroy_event(poll_state);
poll_tid = NULL;
@@ -360,13 +381,13 @@ net_pcap_reset(const netcard_t *card, uint8_t *mac)
1, /* promiscuous mode? */
10, /* timeout in msec */
errbuf)) == NULL) { /* error buffer */
pclog(" Unable to open device: %s!\n", network_host);
pcap_log(" Unable to open device: %s!\n", network_host);
return(-1);
}
pclog("PCAP: interface: %s\n", network_host);
pcap_log("PCAP: interface: %s\n", network_host);
/* Create a MAC address based packet filter. */
pclog("PCAP: installing filter for MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
pcap_log("PCAP: installing filter for MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
sprintf(filter_exp,
"( ((ether dst ff:ff:ff:ff:ff:ff) or (ether dst %02x:%02x:%02x:%02x:%02x:%02x)) and not (ether src %02x:%02x:%02x:%02x:%02x:%02x) )",
@@ -374,12 +395,12 @@ net_pcap_reset(const netcard_t *card, uint8_t *mac)
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
if (f_pcap_compile((void *)pcap, &fp, filter_exp, 0, 0xffffffff) != -1) {
if (f_pcap_setfilter((void *)pcap, &fp) != 0) {
pclog("PCAP: error installing filter (%s) !\n", filter_exp);
pcap_log("PCAP: error installing filter (%s) !\n", filter_exp);
f_pcap_close((void *)pcap);
return(-1);
}
} else {
pclog("PCAP: could not compile filter (%s) !\n", filter_exp);
pcap_log("PCAP: could not compile filter (%s) !\n", filter_exp);
f_pcap_close((void *)pcap);
return(-1);
}
@@ -387,7 +408,7 @@ net_pcap_reset(const netcard_t *card, uint8_t *mac)
/* Save the callback info. */
poll_card = card;
pclog("PCAP: starting thread..\n");
pcap_log("PCAP: starting thread..\n");
poll_state = thread_create_event();
poll_tid = thread_create(poll_thread, mac);
thread_wait_event(poll_state, -1);

46
src/network/net_slirp.c
View File

@@ -8,7 +8,7 @@
*
* Handle SLiRP library processing.
*
* Version: @(#)net_slirp.c 1.0.2 2018/03/15
* Version: @(#)net_slirp.c 1.0.3 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -44,11 +44,13 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "slirp/slirp.h"
#include "slirp/queue.h"
#include "../86box.h"
@@ -64,6 +66,26 @@ static const netcard_t *poll_card; /* netcard attached to us */
static event_t *poll_state;
#ifdef ENABLE_SLIRP_LOG
int slirp_do_log = ENABLE_SLIRP_LOG;
#endif
static void
slirp_log(const char *format, ...)
{
#ifdef ENABLE_SLIRP_LOG
va_list ap;
if (slirp_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
static void
slirp_tic(void)
{
@@ -100,7 +122,7 @@ poll_thread(UNUSED(void *arg))
struct queuepacket *qp;
event_t *evt;
pclog("SLiRP: polling started.\n");
slirp_log("SLiRP: polling started.\n");
thread_set_event(poll_state);
/* Create a waitable event. */
@@ -123,10 +145,8 @@ poll_thread(UNUSED(void *arg))
if (QueuePeek(slirpq) != 0) {
/* Grab a packet from the queue. */
qp = QueueDelete(slirpq);
#if 0
pclog("SLiRP: inQ:%d got a %dbyte packet @%08lx\n",
slirp_log("SLiRP: inQ:%d got a %dbyte packet @%08lx\n",
QueuePeek(slirpq), qp->len, qp);
#endif
poll_card->rx(poll_card->priv, (uint8_t *)qp->data, qp->len);
@@ -145,7 +165,7 @@ poll_thread(UNUSED(void *arg))
if (evt != NULL)
thread_destroy_event(evt);
pclog("SLiRP: polling stopped.\n");
slirp_log("SLiRP: polling stopped.\n");
thread_set_event(poll_state);
}
@@ -154,10 +174,10 @@ poll_thread(UNUSED(void *arg))
int
net_slirp_init(void)
{
pclog("SLiRP: initializing..\n");
slirp_log("SLiRP: initializing..\n");
if (slirp_init() != 0) {
pclog("SLiRP could not be initialized!\n");
slirp_log("SLiRP could not be initialized!\n");
return(-1);
}
@@ -178,7 +198,7 @@ net_slirp_reset(const netcard_t *card, uint8_t *mac)
/* Save the callback info. */
poll_card = card;
pclog("SLiRP: creating thread..\n");
slirp_log("SLiRP: creating thread..\n");
poll_state = thread_create_event();
poll_tid = thread_create(poll_thread, mac);
thread_wait_event(poll_state, -1);
@@ -194,7 +214,7 @@ net_slirp_close(void)
if (slirpq == NULL) return;
pclog("SLiRP: closing.\n");
slirp_log("SLiRP: closing.\n");
/* Tell the polling thread to shut down. */
sl = slirpq; slirpq = NULL;
@@ -204,9 +224,9 @@ net_slirp_close(void)
network_busy(0);
/* Wait for the thread to finish. */
pclog("SLiRP: waiting for thread to end...\n");
slirp_log("SLiRP: waiting for thread to end...\n");
thread_wait_event(poll_state, -1);
pclog("SLiRP: thread ended\n");
slirp_log("SLiRP: thread ended\n");
thread_destroy_event(poll_state);
poll_tid = NULL;

108
src/network/network.c
View File

@@ -12,7 +12,7 @@
* it should be malloc'ed and then linked to the NETCARD def.
* Will be done later.
*
* Version: @(#)network.c 1.0.3 2018/03/15
* Version: @(#)network.c 1.0.4 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -48,14 +48,13 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#ifdef WALTJE
# include <ctype.h>
#endif
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../plat.h"
@@ -103,85 +102,24 @@ static struct {
} poll_data;
#ifdef WALTJE
# define is_print(c) (isalnum((int)(c)) || ((c) == ' '))
#if 0
/* Dump a buffer in hex, standard output. */
static void
hexdump(uint8_t *bufp, int len)
{
char asci[20];
uint8_t c;
int addr;
addr = 0;
while (len-- > 0) {
c = bufp[addr];
if ((addr % 16) == 0) {
printf("%06X %02X", addr, c);
} else {
printf(" %02X", c);
}
asci[(addr & 15)] = (char)((is_print(c) ? c : '.') & 0xff);
if ((++addr % 16) == 0) {
asci[16] = '\0';
printf(" | %s |\n", asci);
}
}
if (addr % 16) {
while (addr % 16) {
printf(" ");
asci[(addr & 15)] = ' ';
addr++;
}
asci[16] = '\0';
printf(" | %s |\n", asci);
}
}
#ifdef ENABLE_NETWORK_LOG
int network_do_log = ENABLE_NETWORK_LOG;
#endif
/* Dump a buffer in hex to output buffer. */
static void
hexdump_p(char *ptr, uint8_t *bufp, int len)
network_log(const char *format, ...)
{
char asci[20];
uint8_t c;
int addr;
#ifdef ENABLE_NETWORK_LOG
va_list ap;
addr = 0;
while (len-- > 0) {
c = bufp[addr];
if ((addr % 16) == 0) {
sprintf(ptr, "%06X %02X", addr, c);
} else {
sprintf(ptr, " %02X", c);
}
ptr += strlen(ptr);
asci[(addr & 15)] = (char)((is_print(c) ? c : '.') & 0xff);
if ((++addr % 16) == 0) {
asci[16] = '\0';
sprintf(ptr, " | %s |\n", asci);
ptr += strlen(ptr);
}
if (network_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
if (addr % 16) {
while (addr % 16) {
sprintf(ptr, " ");
ptr += strlen(ptr);
asci[(addr & 15)] = ' ';
addr++;
}
asci[16] = '\0';
sprintf(ptr, " | %s |\n", asci);
ptr += strlen(ptr);
}
}
#endif
}
void
@@ -311,7 +249,7 @@ network_close(void)
network_mutex = NULL;
network_mac = NULL;
pclog("NETWORK: closed.\n");
network_log("NETWORK: closed.\n");
}
@@ -329,10 +267,10 @@ network_reset(void)
int i = -1;
#ifdef ENABLE_NIC_LOG
pclog("NETWORK: reset (type=%d, card=%d) debug=%d\n",
network_log("NETWORK: reset (type=%d, card=%d) debug=%d\n",
network_type, network_card, nic_do_log);
#else
pclog("NETWORK: reset (type=%d, card=%d)\n",
network_log("NETWORK: reset (type=%d, card=%d)\n",
network_type, network_card);
#endif
ui_sb_update_icon(SB_NETWORK, 0);
@@ -370,13 +308,13 @@ network_reset(void)
return;
}
pclog("NETWORK: set up for %s, card='%s'\n",
network_log("NETWORK: set up for %s, card='%s'\n",
(network_type==NET_TYPE_SLIRP)?"SLiRP":"Pcap",
net_cards[network_card].name);
/* Add the (new?) card to the I/O system. */
if (net_cards[network_card].device) {
pclog("NETWORK: adding device '%s'\n",
network_log("NETWORK: adding device '%s'\n",
net_cards[network_card].name);
device_add(net_cards[network_card].device);
}
@@ -389,14 +327,6 @@ network_tx(uint8_t *bufp, int len)
{
ui_sb_update_icon(SB_NETWORK, 1);
#ifdef WALTJE
{
char temp[4096];
hexdump_p(temp, bufp, len);
pclog("NETWORK: >> len=%d\n%s\n", len, temp);
}
#endif
switch(network_type) {
case NET_TYPE_PCAP:
net_pcap_in(bufp, len);

28
src/nvr.c
View File

@@ -8,7 +8,7 @@
*
* Implement a generic NVRAM/CMOS/RTC device.
*
* Version: @(#)nvr.c 1.0.8 2018/04/29
* Version: @(#)nvr.c 1.0.9 2018/04/29
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -44,12 +44,14 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "device.h"
#include "machine/machine.h"
@@ -71,6 +73,26 @@ static struct tm intclk;
static nvr_t *saved_nvr = NULL;
#ifdef ENABLE_NVR_LOG
int nvr_do_log = ENABLE_NVR_LOG;
#endif
static void
nvr_log(const char *format, ...)
{
#ifdef ENABLE_NVR_LOG
va_list ap;
if (nvr_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/* Determine whether or not the year is leap. */
int
nvr_is_leap(int year)
@@ -238,7 +260,7 @@ nvr_load(void)
/* Load the (relevant) part of the NVR contents. */
if (saved_nvr->size != 0) {
path = nvr_path(saved_nvr->fn);
pclog("NVR: loading from '%ls'\n", path);
nvr_log("NVR: loading from '%ls'\n", path);
fp = plat_fopen(path, L"rb");
if (fp != NULL) {
/* Read NVR contents from file. */
@@ -272,7 +294,7 @@ nvr_save(void)
if (saved_nvr->size != 0) {
path = nvr_path(saved_nvr->fn);
pclog("NVR: saving to '%ls'\n", path);
nvr_log("NVR: saving to '%ls'\n", path);
fp = plat_fopen(path, L"wb");
if (fp != NULL) {
/* Save NVR contents to file. */

6
src/nvr_at.c
View File

@@ -189,7 +189,7 @@
* including the later update (DS12887A) which implemented a
* "century" register to be compatible with Y2K.
*
* Version: @(#)nvr_at.c 1.0.8 2018/04/29
* Version: @(#)nvr_at.c 1.0.9 2018/05/10
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -655,7 +655,9 @@ nvr_at_init(const device_t *info)
/* Allocate an NVR for this machine. */
nvr = (nvr_t *)malloc(sizeof(nvr_t));
if (nvr == NULL) return(NULL);
memset(nvr, 0x00, sizeof(nvr_t));
/* FIXME: See which is correct, this or 0xFF. */
/* memset(nvr, 0x00, sizeof(nvr_t)); */
memset(nvr, 0xFF, sizeof(nvr_t));
local = (local_t *)malloc(sizeof(local_t));
memset(local, 0xff, sizeof(local_t));

40
src/pc.c
View File

@@ -8,7 +8,7 @@
*
* Main emulator module where most things are controlled.
*
* Version: @(#)pc.c 1.0.70 2018/04/26
* Version: @(#)pc.c 1.0.71 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -19,11 +19,11 @@
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <inttypes.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <time.h>
#include <wchar.h>
#define HAVE_STDARG_H
@@ -267,6 +267,26 @@ fatal(const char *fmt, ...)
}
#ifdef ENABLE_PC_LOG
int pc_do_log = ENABLE_PC_LOG;
#endif
static void
pc_log(const char *format, ...)
{
#ifdef ENABLE_PC_LOG
va_list ap;
if (pc_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
/*
* Perform initial startup of the PC.
*
@@ -479,7 +499,7 @@ pc_full_speed(void)
cpuspeed2 = cpuspeed;
if (! atfullspeed) {
pclog("Set fullspeed - %i %i %i\n", is386, AT, cpuspeed2);
pc_log("Set fullspeed - %i %i %i\n", is386, AT, cpuspeed2);
if (AT)
setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed);
else
@@ -546,7 +566,7 @@ pc_init_modules(void)
{
int c, i;
pclog("Scanning for ROM images:\n");
pc_log("Scanning for ROM images:\n");
for (c=0,i=0; i<ROM_MAX; i++) {
romspresent[i] = rom_load_bios(i);
c += romspresent[i];
@@ -555,7 +575,7 @@ pc_init_modules(void)
/* No usable ROMs found, aborting. */
return(0);
}
pclog("A total of %d ROM sets have been loaded.\n", c);
pc_log("A total of %d ROM sets have been loaded.\n", c);
/* Load the ROMs for the selected machine. */
again:
@@ -683,8 +703,6 @@ pc_send_cae(void)
void
pc_reset_hard_close(void)
{
pclog("pc_reset_hard_close()\n");
suppress_overscan = 0;
nvr_save();
@@ -712,8 +730,6 @@ pc_reset_hard_close(void)
void
pc_reset_hard_init(void)
{
pclog("pc_reset_hard_init()\n");
/*
* First, we reset the modules that are not part of
* the actual machine, but which support some of the
@@ -903,7 +919,7 @@ pc_thread(void *param)
int *quitp = (int *)param;
int framecountx;
pclog("PC: starting main thread...\n");
pc_log("PC: starting main thread...\n");
main_time = 0;
framecountx = 0;
@@ -996,7 +1012,7 @@ pc_thread(void *param)
}
}
pclog("PC: main thread done.\n");
pc_log("PC: main thread done.\n");
}
@@ -1022,7 +1038,7 @@ set_screen_size(int x, int y)
/* Make sure we keep usable values. */
#if 0
pclog("SetScreenSize(%d, %d) resize=%d\n", x, y, vid_resize);
pc_log("SetScreenSize(%d, %d) resize=%d\n", x, y, vid_resize);
#endif
if (x < 320) x = 320;
if (y < 200) y = 200;

991
src/pic.c
View File

File diff suppressed because it is too large Load Diff

3
src/piix.h
View File

@@ -8,7 +8,7 @@
*
* Emulation core dispatcher.
*
* Version: @(#)piix.h 1.0.3 2018/03/26
* Version: @(#)piix.h 1.0.3 2018/05/11
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -17,6 +17,7 @@
*/
extern const device_t piix_device;
extern const device_t piix_pb640_device;
extern const device_t piix3_device;
extern int piix_bus_master_dma_read(int channel, uint8_t *data, int transfer_length, void *priv);

66
src/rom.c
View File

@@ -13,7 +13,7 @@
* - c386sx16 BIOS fails checksum
* - the loadfont() calls should be done elsewhere
*
* Version: @(#)rom.c 1.0.35 2018/03/16
* Version: @(#)rom.c 1.0.37 2018/05/20
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -23,11 +23,13 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "config.h"
#include "cpu/cpu.h"
@@ -41,6 +43,26 @@
int romspresent[ROM_MAX];
#ifdef ENABLE_ROM_LOG
int rom_do_log = ENABLE_ROM_LOG;
#endif
static void
rom_log(const char *format, ...)
{
#ifdef ENABLE_ROM_LOG
va_list ap;
if (rom_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
FILE *
rom_fopen(wchar_t *fn, wchar_t *mode)
{
@@ -95,7 +117,7 @@ rom_read(uint32_t addr, void *priv)
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
pclog("ROM: read byte from BIOS at %06lX\n", addr);
rom_log("ROM: read byte from BIOS at %06lX\n", addr);
#endif
return(rom->rom[addr & rom->mask]);
@@ -109,7 +131,7 @@ rom_readw(uint32_t addr, void *priv)
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
pclog("ROM: read word from BIOS at %06lX\n", addr);
rom_log("ROM: read word from BIOS at %06lX\n", addr);
#endif
return(*(uint16_t *)&rom->rom[addr & rom->mask]);
@@ -123,7 +145,7 @@ rom_readl(uint32_t addr, void *priv)
#ifdef ROM_TRACE
if (rom->mapping.base==ROM_TRACE)
pclog("ROM: read long from BIOS at %06lX\n", addr);
rom_log("ROM: read long from BIOS at %06lX\n", addr);
#endif
return(*(uint32_t *)&rom->rom[addr & rom->mask]);
@@ -137,7 +159,7 @@ rom_load_linear(wchar_t *fn, uint32_t addr, int sz, int off, uint8_t *ptr)
FILE *f = rom_fopen(fn, L"rb");
if (f == NULL) {
pclog("ROM: image '%ls' not found\n", fn);
rom_log("ROM: image '%ls' not found\n", fn);
return(0);
}
@@ -166,7 +188,7 @@ rom_load_linear_inverted(wchar_t *fn, uint32_t addr, int sz, int off, uint8_t *p
FILE *f = rom_fopen(fn, L"rb");
if (f == NULL) {
pclog("ROM: image '%ls' not found\n", fn);
rom_log("ROM: image '%ls' not found\n", fn);
return(0);
}
@@ -204,9 +226,9 @@ rom_load_interleaved(wchar_t *fnl, wchar_t *fnh, uint32_t addr, int sz, int off,
int c;
if (fl == NULL || fh == NULL) {
if (fl == NULL) pclog("ROM: image '%ls' not found\n", fnl);
if (fl == NULL) rom_log("ROM: image '%ls' not found\n", fnl);
else (void)fclose(fl);
if (fh == NULL) pclog("ROM: image '%ls' not found\n", fnh);
if (fh == NULL) rom_log("ROM: image '%ls' not found\n", fnh);
else (void)fclose(fh);
return(0);
@@ -296,9 +318,6 @@ rom_load_bios(int rom_id)
FILE *f;
loadfont(L"roms/video/mda/mda.rom", 0);
loadfont(L"roms/video/wyse700/wy700.rom", 3);
loadfont(L"roms/video/genius/8x12.bin", 4);
loadfont(FONT_ATIKOR_PATH, 6);
/* If not done yet, allocate a 128KB buffer for the BIOS ROM. */
if (rom == NULL)
@@ -861,12 +880,24 @@ rom_load_bios(int rom_id)
biosmask = 0x1ffff;
return(1);
#if defined(DEV_BRANCH) && defined(USE_MRTHOR)
case ROM_MRTHOR:
if (! rom_load_linear(
L"roms/machines/mrthor/mr_atx.bio",
0x000000, 131072, 0, rom)) break;
biosmask = 0x1ffff;
return(1);
#endif
case ROM_PB640:
if (! rom_load_linear(
L"roms/machines/pb640/1007CP0R.BIO",
0x010000, 65536, 128, rom)) break;
if (! rom_load_linear(
L"roms/machines/pb640/1007CP0R.BI1",
0x000000, 0x00d000, 128, rom)) break;
biosmask = 0x1ffff;
return(1);
case ROM_ZAPPA:
if (! rom_load_linear(
@@ -899,9 +930,6 @@ rom_load_bios(int rom_id)
return(1);
case ROM_IBMPS2_M80:
#ifdef WALTJE
case ROM_IBMPS2_M80_486:
#endif
if (! rom_load_interleaved(
L"roms/machines/ibmps2_m80/15f6637.bin",
L"roms/machines/ibmps2_m80/15f6639.bin",
@@ -909,14 +937,6 @@ rom_load_bios(int rom_id)
biosmask = 0x1ffff;
return(1);
#if defined(DEV_BRANCH) && defined(USE_GREENB)
case ROM_4GPV31:
if (! rom_load_linear(
L"roms/machines/green-b/4gpv31-ami-1993-8273517.bin",
0x000000, 65536, 0, rom)) break;
return(1);
#endif
case ROM_T1000:
loadfont(L"roms/machines/t1000/t1000font.bin", 2);
if (!rom_load_linear(
@@ -941,7 +961,7 @@ rom_load_bios(int rom_id)
break;
default:
pclog("ROM: don't know how to handle ROM set %d !\n", rom_id);
rom_log("ROM: don't know how to handle ROM set %d !\n", rom_id);
}
return(0);

16
src/rom.h
View File

@@ -8,7 +8,7 @@
*
* Definitions for the ROM image handler.
*
* Version: @(#)rom.h 1.0.16 2018/03/02
* Version: @(#)rom.h 1.0.17 2018/05/10
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
* Copyright 2018 Fred N. van Kempen.
@@ -122,17 +122,10 @@ enum {
#endif
ROM_AWARD486_OPTI495,
ROM_DTK486, /* DTK PKM-0038S E-2/SiS 471/Award/SiS 85C471 */
#if defined(DEV_BRANCH) && defined(USE_GREENB)
ROM_4GPV31, /* Green-B 4GPV3.1 ISA/VLB 486/Pentium, AMI */
#endif
ROM_IBMPS1_2133,
ROM_IBMPS2_M70_TYPE3,
ROM_IBMPS2_M70_TYPE4,
#ifdef WALTJE
ROM_IBMPS2_M80_486,
#endif
ROM_IBMPS2_M70_TYPE3,
ROM_IBMPS2_M70_TYPE4,
ROM_R418, /* Rise Computer R418/SiS 496/497/Award/SMC FDC37C665 */
@@ -150,7 +143,10 @@ enum {
ROM_PRESIDENT, /* President Award 430FX PCI/430FX/Award/Unknown SIO */
ROM_THOR, /* Intel Advanced_ATX/430FX/AMI/NS PC87306 */
#if defined(DEV_BRANCH) && defined(USE_MRTHOR)
ROM_MRTHOR, /* Intel Advanced_ATX/430FX/MR.BIOS/NS PC87306 */
#endif
ROM_PB640, /* Packard Bell PB640/430FX/AMI/NS PC87306 */
ROM_ACERM3A, /* Acer M3A/430HX/Acer/SMC FDC37C932FR */
ROM_ACERV35N, /* Acer V35N/430HX/Acer/SMC FDC37C932FR */

32
src/scsi/scsi.c
View File

@@ -8,7 +8,7 @@
*
* Handling of the SCSI controllers.
*
* Version: @(#)scsi.c 1.0.18 2018/03/26
* Version: @(#)scsi.c 1.0.19 2018/04/29
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -17,11 +17,13 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../mem.h"
#include "../rom.h"
@@ -87,6 +89,26 @@ static SCSI_CARD scsi_cards[] = {
};
#ifdef ENABLE_SCSI_LOG
int scsi_do_log = ENABLE_SCSI_LOG;
#endif
static void
scsi_log(const char *fmt, ...)
{
#ifdef ENABLE_SCSI_LOG
va_list ap;
if (scsi_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
int scsi_card_available(int card)
{
if (scsi_cards[card].device)
@@ -152,11 +174,11 @@ void scsi_card_init(void)
if (!scsi_cards[scsi_card_current].device)
return;
pclog("Building SCSI hard disk map...\n");
scsi_log("Building SCSI hard disk map...\n");
build_scsi_hd_map();
pclog("Building SCSI CD-ROM map...\n");
scsi_log("Building SCSI CD-ROM map...\n");
build_scsi_cdrom_map();
pclog("Building SCSI ZIP map...\n");
scsi_log("Building SCSI ZIP map...\n");
build_scsi_zip_map();
for (i=0; i<SCSI_ID_MAX; i++) {

30
src/serial.c
View File

@@ -1,8 +1,10 @@
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "86box.h"
#include "machine/machine.h"
#include "io.h"
@@ -26,6 +28,26 @@ SERIAL serial1, serial2;
int serial_do_log = 0;
#ifdef ENABLE_SERIAL_LOG
int serial_do_log = ENABLE_SERIAL_LOG;
#endif
static void
serial_log(const char *format, ...)
{
#ifdef ENABLE_SERIAL_LOG
va_list ap;
if (serial_do_log) {
va_start(ap, format);
pclog_ex(format, ap);
va_end(ap);
}
#endif
}
void serial_reset()
{
serial1.iir = serial1.ier = serial1.lcr = 0;
@@ -279,7 +301,7 @@ void serial_remove(int port)
return;
}
/* pclog("Removing serial port %i at %04X...\n", port, base_address[port - 1]); */
serial_log("Removing serial port %i at %04X...\n", port, base_address[port - 1]);
switch(port)
{
@@ -296,7 +318,7 @@ void serial_remove(int port)
void serial_setup(int port, uint16_t addr, int irq)
{
/* pclog("Adding serial port %i at %04X...\n", port, addr); */
serial_log("Adding serial port %i at %04X...\n", port, addr);
switch(port)
{
@@ -345,7 +367,7 @@ void serial_init(void)
if (serial_enabled[0])
{
/* pclog("Adding serial port 1...\n"); */
serial_log("Adding serial port 1...\n");
memset(&serial1, 0, sizeof(serial1));
io_sethandler(0x3f8, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, &serial1);
serial1.irq = 4;
@@ -354,7 +376,7 @@ void serial_init(void)
}
if (serial_enabled[1])
{
/* pclog("Adding serial port 2...\n"); */
serial_log("Adding serial port 2...\n");
memset(&serial2, 0, sizeof(serial2));
io_sethandler(0x2f8, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, &serial2);
serial2.irq = 3;

22
src/sio_fdc37c669.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the SMC FDC37C669 Super I/O Chip.
*
* Version: @(#)sio_fdc37c669.c 1.0.8 2018/04/04
* Version: @(#)sio_fdc37c669.c 1.0.9 2018/04/29
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016-2018 Miran Grca.
@@ -73,7 +73,6 @@ void fdc37c669_write(uint16_t port, uint8_t val, void *priv)
uint8_t index = (port & 1) ? 0 : 1;
uint8_t valxor = 0;
uint8_t max = 42;
/* pclog("fdc37c669_write : port=%04x reg %02X = %02X locked=%i\n", port, fdc37c669_curreg, val, fdc37c669_locked); */
if (index)
{
@@ -138,11 +137,9 @@ process_value:
case 1:
if (valxor & 4)
{
/* pclog("Removing LPT1\n"); */
lpt1_remove();
if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] >= 0x40))
{
/* pclog("LPT1 init (%02X)\n", make_port(0x23)); */
lpt1_init(make_port(0x23));
}
}
@@ -154,21 +151,17 @@ process_value:
case 2:
if (valxor & 8)
{
/* pclog("Removing UART1\n"); */
serial_remove(1);
if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
{
/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
}
}
if (valxor & 0x80)
{
/* pclog("Removing UART2\n"); */
serial_remove(2);
if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
{
/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
}
}
@@ -213,11 +206,9 @@ process_value:
case 0x23:
if (valxor)
{
/* pclog("Removing LPT1\n"); */
lpt1_remove();
if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] >= 0x40))
{
/* pclog("LPT1 init (%02X)\n", make_port(0x23)); */
lpt1_init(make_port(0x23));
}
}
@@ -225,11 +216,9 @@ process_value:
case 0x24:
if (valxor & 0xfe)
{
/* pclog("Removing UART1\n"); */
serial_remove(1);
if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
{
/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
}
}
@@ -237,11 +226,9 @@ process_value:
case 0x25:
if (valxor & 0xfe)
{
/* pclog("Removing UART2\n"); */
serial_remove(2);
if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
{
/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
}
}
@@ -249,21 +236,17 @@ process_value:
case 0x28:
if (valxor & 0xf)
{
/* pclog("Removing UART2\n"); */
serial_remove(2);
if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
{
/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
}
}
if (valxor & 0xf0)
{
/* pclog("Removing UART1\n"); */
serial_remove(1);
if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
{
/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
}
}
@@ -275,8 +258,6 @@ uint8_t fdc37c669_read(uint16_t port, void *priv)
{
uint8_t index = (port & 1) ? 0 : 1;
/* pclog("fdc37c669_read : port=%04x reg %02X locked=%i\n", port, fdc37c669_curreg, fdc37c669_locked); */
if (!fdc37c669_locked)
{
return 0xFF;
@@ -286,7 +267,6 @@ uint8_t fdc37c669_read(uint16_t port, void *priv)
return fdc37c669_curreg;
else
{
/* pclog("0x03F1: %02X\n", fdc37c669_regs[fdc37c669_curreg]); */
if ((fdc37c669_curreg < 0x18) && (fdc37c669_rw_locked)) return 0xff;
return fdc37c669_regs[fdc37c669_curreg];
}

10
src/sio_fdc37c93x.c
View File

@@ -9,7 +9,7 @@
* Implementation of the SMC FDC37C932FR and FDC37C935 Super
* I/O Chips.
*
* Version: @(#)sio_fdc37c93x.c 1.0.12 2018/04/04
* Version: @(#)sio_fdc37c93x.c 1.0.13 2018/04/29
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016-2018 Miran Grca.
@@ -53,13 +53,11 @@ static uint16_t make_port(uint8_t ld)
static uint8_t fdc37c93x_gpio_read(uint16_t port, void *priv)
{
/* pclog("fdc37c93x: GPIO read: %02X\n", fdc37c93x_gpio_reg); */
return fdc37c93x_gpio_reg;
}
static void fdc37c93x_gpio_write(uint16_t port, uint8_t val, void *priv)
{
/* pclog("fdc37c93x: GPIO write: %02X\n", val); */
fdc37c93x_gpio_reg = val;
}
@@ -71,11 +69,9 @@ static void fdc37c93x_fdc_handler(void)
uint8_t local_enable = !!fdc37c93x_ld_regs[0][0x30];
fdc_remove(fdc37c93x_fdc);
/* pclog("fdc37c93x: Removing FDC (%i, %i)\n", global_enable, local_enable); */
if (global_enable && local_enable)
{
ld_port = make_port(0);
/* pclog("fdc37c93x: Setting FDC port to %04X\n", ld_port); */
if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) {
fdc_set_base(fdc37c93x_fdc, ld_port);
}
@@ -93,7 +89,6 @@ static void fdc37c93x_lpt_handler(void)
if (global_enable && local_enable)
{
ld_port = make_port(3);
/* pclog("fdc37c93x: Setting LPT1 port to %04X\n", ld_port); */
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
lpt1_init(ld_port);
}
@@ -112,7 +107,6 @@ static void fdc37c93x_serial_handler(int uart)
if (global_enable && local_enable)
{
ld_port = make_port(uart_no);
/* pclog("fdc37c93x: Setting COM%i port to %04X\n", uart, ld_port); */
if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8))
serial_setup(uart, ld_port, fdc37c93x_ld_regs[uart_no][0x70]);
}
@@ -128,7 +122,6 @@ static void fdc37c93x_auxio_handler(void)
if (local_enable)
{
fdc37c93x_gpio_base = ld_port = make_port(8);
/* pclog("fdc37c93x: Setting Auxiliary I/O port to %04X\n", ld_port); */
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF))
io_sethandler(fdc37c93x_gpio_base, 0x0001, fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, NULL);
}
@@ -198,7 +191,6 @@ static void fdc37c932fr_access_bus_handler(void)
if (global_enable && local_enable)
{
access_bus.base = ld_port = make_port(9);
/* pclog("fdc37c93x: Setting Auxiliary I/O port to %04X\n", ld_port); */
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
io_sethandler(access_bus.base, 0x0004, fdc37c932fr_access_bus_read, NULL, NULL, fdc37c932fr_access_bus_write, NULL, NULL, NULL);
}

36
src/sio_pc87306.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of the NatSemi PC87306 Super I/O chip.
*
* Version: @(#)sio_pc87306.c 1.0.10 2018/04/04
* Version: @(#)sio_pc87306.c 1.0.12 2018/05/11
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016-2018 Miran Grca.
@@ -20,13 +20,16 @@
#include "86box.h"
#include "io.h"
#include "device.h"
#include "pci.h"
#include "lpt.h"
#include "mem.h"
#include "pci.h"
#include "rom.h"
#include "serial.h"
#include "disk/hdc.h"
#include "disk/hdc_ide.h"
#include "floppy/fdd.h"
#include "floppy/fdc.h"
#include "machine/machine.h"
#include "sio.h"
@@ -84,7 +87,6 @@ void lpt1_handler()
lpt_port = 0x278;
break;
case 3:
// pclog("PNP0 Bits 4,5 = 00, FAR Bits 1,0 = 3 - reserved\n");
lpt_port = 0x000;
break;
}
@@ -153,11 +155,7 @@ void serial2_handler()
void pc87306_write(uint16_t port, uint8_t val, void *priv)
{
uint8_t index;
uint8_t valxor;
#if 0
uint16_t or_value;
#endif
uint8_t index, valxor;
index = (port & 1) ? 0 : 1;
@@ -240,27 +238,6 @@ process_value:
fdc_set_base(pc87306_fdc, (val & 0x20) ? 0x370 : 0x3f0);
}
}
if (valxor & 0xc0)
{
#if 0
ide_pri_disable();
if (val & 0x80)
{
or_value = 0;
}
else
{
or_value = 0x80;
}
ide_set_base(0, 0x170 | or_value);
ide_set_side(0, 0x376 | or_value);
if (val & 0x40)
{
ide_pri_enable();
}
#endif
}
break;
case 1:
if (valxor & 3)
@@ -441,7 +418,6 @@ void pc87306_reset(void)
{
memset(pc87306_regs, 0, 29);
/* pc87306_regs[0] = 0x4B; */
pc87306_regs[0] = 0x0B;
pc87306_regs[1] = 0x01;
pc87306_regs[3] = 0x01;

9
src/sio_um8669f.c
View File

@@ -88,7 +88,6 @@ void um8669f_pnp_write(uint16_t port, uint8_t val, void *p)
um8669f->cur_device = val & 7;
else
{
/* pclog("Write UM8669F %02x [%02x] %02x\n", um8669f->cur_reg, um8669f->cur_device, val); */
switch (um8669f->cur_reg)
{
case REG_ENABLE:
@@ -116,8 +115,6 @@ void um8669f_pnp_write(uint16_t port, uint8_t val, void *p)
break;
}
/* pclog("UM8669F: Write %02X to [%02X][%02X]...\n", val, um8669f->cur_device, um8669f->cur_reg); */
switch (um8669f->cur_device)
{
case DEV_FDC:
@@ -161,8 +158,6 @@ void um8669f_pnp_write(uint16_t port, uint8_t val, void *p)
uint8_t um8669f_pnp_read(uint16_t port, void *p)
{
um8669f_t *um8669f = (um8669f_t *)p;
/* pclog("Read UM8669F %02x\n", um8669f->cur_reg); */
switch (um8669f->cur_reg)
{
@@ -205,7 +200,6 @@ void um8669f_write(uint16_t port, uint8_t val, void *p)
}
else
{
/* pclog("Write UM8669f register %02x %02x %04x:%04x %i\n", um8669f_curreg, val, CS,cpu_state.pc, ins); */
um8669f->regs_108[um8669f->cur_reg_108] = val;
if (um8669f->cur_reg_108 == 0xc1) {
@@ -231,8 +225,7 @@ void um8669f_write(uint16_t port, uint8_t val, void *p)
uint8_t um8669f_read(uint16_t port, void *p)
{
um8669f_t *um8669f = (um8669f_t *)p;
/* pclog("um8669f_read : port=%04x reg %02X locked=%i %02x\n", port, um8669f_curreg, um8669f_locked, um8669f_regs[um8669f_curreg]); */
if (um8669f->locked)
return 0xff;

5
src/sio_w83877f.c
View File

@@ -11,7 +11,7 @@
* Winbond W83877F Super I/O Chip
* Used by the Award 430HX
*
* Version: @(#)sio_w83877f.c 1.0.10 2018/04/04
* Version: @(#)sio_w83877f.c 1.0.11 2018/04/29
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016-2018 Miran Grca.
@@ -224,7 +224,6 @@ static void w83877f_remap(void)
winbond_port = (HEFRAS ? 0x3f0 : 0x250);
winbond_key_times = HEFRAS + 1;
winbond_key = (HEFRAS ? 0x86 : 0x88) | HEFERE;
/* pclog("W83877F: Remapped to port %04X, key %02X\n", winbond_port, winbond_key); */
}
@@ -300,8 +299,6 @@ void w83877f_serial_handler(int id)
int reg_id = (id - 1) ? 0x24 : 0x25;
int irq_mask = (id - 1) ? 0xF : 0xF0;
/* pclog("Registers (%i): %02X %02X %02X\n", id, w83877f_regs[4], w83877f_regs[reg_id], w83877f_regs[0x28]); */
if ((w83877f_regs[4] & reg_mask) || !(w83877f_regs[reg_id] & 0xc0))
{
serial_remove(id);

6
src/sound/midi_fluidsynth.c
View File

@@ -42,7 +42,6 @@ enum fluid_interp {
extern void givealbuffer_midi(void *buf, uint32_t size);
extern void pclog(const char *format, ...);
extern void al_set_midi(int freq, int buf_size);
extern int soundon;
@@ -224,7 +223,6 @@ void fluidsynth_msg(uint8_t *msg)
case 0xF0: /* SysEx */
break;
default:
/* pclog("fluidsynth: unknown send() command 0x%02X", cmd); */
break;
}
}
@@ -331,8 +329,6 @@ void* fluidsynth_init(const device_t *info)
al_set_midi(data->samplerate, data->buf_size);
/* pclog("fluidsynth (%s) initialized, samplerate %d, buf_size %d\n", f_fluid_version_str(), data->samplerate, data->buf_size); */
midi_device_t* dev = malloc(sizeof(midi_device_t));
memset(dev, 0, sizeof(midi_device_t));
@@ -386,8 +382,6 @@ void fluidsynth_close(void* p)
dynld_close(fluidsynth_handle);
fluidsynth_handle = NULL;
}
/* pclog("fluidsynth closed\n"); */
}
static const device_config_t fluidsynth_config[] =

11
src/sound/midi_mt32.c
View File

@@ -15,7 +15,6 @@
extern void givealbuffer_midi(void *buf, uint32_t size);
extern void pclog(const char *format, ...);
extern void al_set_midi(int freq, int buf_size);
static const mt32emu_report_handler_i_v0 handler_v0 = {
@@ -63,7 +62,6 @@ mt32emu_return_code mt32_check(const char* func, mt32emu_return_code ret, mt32em
{
if (ret != expected)
{
/* pclog("%s() failed, expected %d but returned %d\n", func, expected, ret); */
return 0;
}
return 1;
@@ -201,15 +199,8 @@ void* mt32emu_init(wchar_t *control_rom, wchar_t *pcm_rom)
mt32emu_set_reversed_stereo_enabled(context, device_get_config_int("reversed_stereo"));
mt32emu_set_nice_amp_ramp_enabled(context, device_get_config_int("nice_ramp"));
/* pclog("mt32 output gain: %f\n", mt32emu_get_output_gain(context));
pclog("mt32 reverb output gain: %f\n", mt32emu_get_reverb_output_gain(context));
pclog("mt32 reverb: %d\n", mt32emu_is_reverb_enabled(context));
pclog("mt32 reversed stereo: %d\n", mt32emu_is_reversed_stereo_enabled(context)); */
al_set_midi(samplerate, buf_size);
/* pclog("mt32 (Munt %s) initialized, samplerate %d, buf_size %d\n", mt32emu_get_library_version_string(), samplerate, buf_size); */
midi_device_t* dev = malloc(sizeof(midi_device_t));
memset(dev, 0, sizeof(midi_device_t));
@@ -261,8 +252,6 @@ void mt32_close(void* p)
midi_close();
free((midi_device_t*)p);
/* pclog("mt32 closed\n"); */
}
static const device_config_t mt32_config[] =

30
src/sound/snd_adlib.c
View File

@@ -1,8 +1,10 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../mca.h"
@@ -12,6 +14,26 @@
#include "snd_opl.h"
#ifdef ENABLE_ADLIB_LOG
int adlib_do_log = ENABLE_ADLIB_LOG;
#endif
static void
adlib_log(const char *fmt, ...)
{
#ifdef ENABLE_ADLIB_LOG
va_list ap;
if (adlib_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
typedef struct adlib_t
{
opl_t opl;
@@ -37,7 +59,7 @@ uint8_t adlib_mca_read(int port, void *p)
{
adlib_t *adlib = (adlib_t *)p;
pclog("adlib_mca_read: port=%04x\n", port);
adlib_log("adlib_mca_read: port=%04x\n", port);
return adlib->pos_regs[port & 7];
}
@@ -49,7 +71,7 @@ void adlib_mca_write(int port, uint8_t val, void *p)
if (port < 0x102)
return;
pclog("adlib_mca_write: port=%04x val=%02x\n", port, val);
adlib_log("adlib_mca_write: port=%04x val=%02x\n", port, val);
switch (port)
{
@@ -68,7 +90,7 @@ void *adlib_init(const device_t *info)
adlib_t *adlib = malloc(sizeof(adlib_t));
memset(adlib, 0, sizeof(adlib_t));
pclog("adlib_init\n");
adlib_log("adlib_init\n");
opl2_init(&adlib->opl);
io_sethandler(0x0388, 0x0002, opl2_read, NULL, NULL, opl2_write, NULL, NULL, &adlib->opl);
sound_add_handler(adlib_get_buffer, adlib);

5
src/sound/snd_cms.c
View File

@@ -1,8 +1,10 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../device.h"
@@ -180,7 +182,6 @@ void *cms_init(const device_t *info)
cms_t *cms = malloc(sizeof(cms_t));
memset(cms, 0, sizeof(cms_t));
pclog("cms_init\n");
io_sethandler(0x0220, 0x0010, cms_read, NULL, NULL, cms_write, NULL, NULL, cms);
sound_add_handler(cms_get_buffer, cms);
return cms;

7
src/sound/snd_gus.c
View File

@@ -1,8 +1,10 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../nmi.h"
@@ -1006,8 +1008,6 @@ void *gus_init(const device_t *info)
gus->ram = malloc(1 << 20);
memset(gus->ram, 0, 1 << 20);
pclog("gus_init\n");
for (c=0;c<32;c++)
{
gus->ctrl[c]=1;
@@ -1020,7 +1020,6 @@ void *gus_init(const device_t *info)
out/=1.002709201; /* 0.0235 dB Steps */
}
pclog("GUS: top volume %f %f %f %f\n",vol16bit[4095],vol16bit[3800],vol16bit[3000],vol16bit[2048]);
gus->voices=14;
gus->samp_timer = gus->samp_latch = (int64_t)(TIMER_USEC * (1000000.0 / 44100.0));

67
src/sound/snd_mpu401.c
View File

@@ -8,7 +8,7 @@
*
* Roland MPU-401 emulation.
*
* Version: @(#)snd_mpu401.c 1.0.9 2018/04/26
* Version: @(#)snd_mpu401.c 1.0.10 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* DOSBox Team,
@@ -19,12 +19,14 @@
* Copyright 2008-2018 DOSBox Team.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../io.h"
@@ -47,33 +49,29 @@ static int64_t mpu401_event_callback = 0LL;
static int64_t mpu401_eoi_callback = 0LL;
static int64_t mpu401_reset_callback = 0LL;
#ifdef ENABLE_MPU401_LOG
static int mpu401_do_log = ENABLE_MPU401_LOG;
static char logfmt[512];
#endif
static void MPU401_WriteCommand(mpu_t *mpu, uint8_t val);
static void MPU401_EOIHandlerDispatch(void *p);
#ifdef ENABLE_MPU401_LOG
int mpu401_do_log = ENABLE_MPU401_LOG;
#endif
static void
mpulog(const char *fmt, ...)
mpu401_log(const char *fmt, ...)
{
#ifdef ENABLE_MPU401_LOG
va_list ap;
if (mpu401_do_log) {
va_start(ap, fmt);
memset(logfmt, 0, 512);
strcpy(logfmt, "MPU-401: ");
strcpy(logfmt + strlen(logfmt), fmt);
vprintf(logfmt, ap);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
#define pclog mpulog
static void
@@ -100,7 +98,7 @@ QueueByte(mpu_t *mpu, uint8_t data)
mpu->queue_used++;
mpu->queue[pos]=data;
} else
pclog("MPU401:Data queue full\n");
mpu401_log("MPU401:Data queue full\n");
}
@@ -161,7 +159,7 @@ MPU401_ResetDone(void *priv)
{
mpu_t *mpu = (mpu_t *)priv;
pclog("MPU-401 reset callback\n");
mpu401_log("MPU-401 reset callback\n");
mpu401_reset_callback = 0LL;
@@ -197,10 +195,6 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val)
break;
}
#if 0
if (val&0x20)
pclog("MPU-401:Unhandled Recording Command %x",(int)val);
#endif
switch (val & 0xc) {
case 0x4: /* Stop */
mpu->state.playing = 0;
@@ -215,7 +209,6 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val)
break;
case 0x8: /* Play */
// pclog("MPU-401:Intelligent mode playback started");
mpu->state.playing = 1;
mpu401_event_callback = (MPU401_TIMECONSTANT / (mpu->clock.tempo*mpu->clock.timebase)) * 1000LL * TIMER_USEC;
ClrQueue(mpu);
@@ -332,7 +325,7 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val)
break;
case 0xff: /* Reset MPU-401 */
pclog("MPU-401:Reset %X\n",val);
mpu401_log("MPU-401:Reset %X\n",val);
mpu401_reset_callback = MPU401_RESETBUSY * 33LL * TIMER_USEC;
mpu->state.reset=1;
MPU401_Reset(mpu);
@@ -342,12 +335,12 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val)
break;
case 0x3f: /* UART mode */
pclog("MPU-401:Set UART mode %X\n",val);
mpu401_log("MPU-401:Set UART mode %X\n",val);
mpu->mode=M_UART;
break;
default:;
//pclog("MPU-401:Unhandled command %X",val);
//mpu401_log("MPU-401:Unhandled command %X",val);
}
QueueByte(mpu, MSG_MPU_ACK);
@@ -371,7 +364,7 @@ MPU401_WriteData(mpu_t *mpu, uint8_t val)
case 0xe1: /* Set relative tempo */
mpu->state.command_byte=0;
if (val!=0x40) //default value
pclog("MPU-401:Relative tempo change not implemented\n");
mpu401_log("MPU-401:Relative tempo change not implemented\n");
return;
case 0xe7: /* Set internal clock to host interval */
@@ -428,7 +421,7 @@ MPU401_WriteData(mpu_t *mpu, uint8_t val)
break;
case 0xf0:
//pclog("MPU-401:Illegal WSD byte\n");
//mpu401_log("MPU-401:Illegal WSD byte\n");
mpu->state.wsd=0;
mpu->state.channel=mpu->state.old_chan;
return;
@@ -656,7 +649,7 @@ MPU401_EOIHandler(void *priv)
mpu_t *mpu = (mpu_t *)priv;
uint8_t i;
pclog("MPU-401 end of input callback\n");
mpu401_log("MPU-401 end of input callback\n");
mpu401_eoi_callback = 0LL;
mpu->state.eoi_scheduled=0;
@@ -697,7 +690,7 @@ MPU401_EOIHandlerDispatch(void *priv)
static void
imf_write(uint16_t addr, uint8_t val, void *priv)
{
pclog("IMF:Wr %4X,%X\n", addr, val);
mpu401_log("IMF:Wr %4X,%X\n", addr, val);
}
@@ -750,16 +743,16 @@ mpu401_write(uint16_t addr, uint8_t val, void *priv)
{
mpu_t *mpu = (mpu_t *)priv;
/* pclog("MPU401 Write Port %04X, val %x\n", addr, val); */
/* mpu401_log("MPU401 Write Port %04X, val %x\n", addr, val); */
switch (addr & 1) {
case 0: /*Data*/
MPU401_WriteData(mpu, val);
pclog("Write Data (0x330) %X\n", val);
mpu401_log("Write Data (0x330) %X\n", val);
break;
case 1: /*Command*/
MPU401_WriteCommand(mpu, val);
pclog("Write Command (0x331) %x\n", val);
mpu401_log("Write Command (0x331) %x\n", val);
break;
}
}
@@ -774,7 +767,7 @@ mpu401_read(uint16_t addr, void *priv)
switch (addr & 1) {
case 0: //Read Data
ret = MPU401_ReadData(mpu);
pclog("Read Data (0x330) %X\n", ret);
mpu401_log("Read Data (0x330) %X\n", ret);
break;
case 1: //Read Status
@@ -782,11 +775,11 @@ mpu401_read(uint16_t addr, void *priv)
if (!mpu->queue_used) ret=STATUS_INPUT_NOT_READY;
ret |= 0x3f; //FIXME: check with MPU401 TechRef
pclog("Read Status (0x331) %x\n", ret);
mpu401_log("Read Status (0x331) %x\n", ret);
break;
}
/* pclog("MPU401 Read Port %04X, ret %x\n", addr, ret); */
/* mpu401_log("MPU401 Read Port %04X, ret %x\n", addr, ret); */
return(ret);
}
@@ -798,7 +791,7 @@ MPU401_Event(void *priv)
int new_time;
uint8_t i;
pclog("MPU-401 event callback\n");
mpu401_log("MPU-401 event callback\n");
if (mpu->mode==M_UART) {
mpu401_event_callback = 0LL;
@@ -838,7 +831,7 @@ next_event:
return;
} else {
mpu401_event_callback += (MPU401_TIMECONSTANT/new_time) * 1000LL * TIMER_USEC;
pclog("Next event after %i us (time constant: %i)\n", (int) ((MPU401_TIMECONSTANT/new_time) * 1000 * TIMER_USEC), (int) MPU401_TIMECONSTANT);
mpu401_log("Next event after %i us (time constant: %i)\n", (int) ((MPU401_TIMECONSTANT/new_time) * 1000 * TIMER_USEC), (int) MPU401_TIMECONSTANT);
}
}
@@ -860,7 +853,7 @@ mpu401_init(mpu_t *mpu, uint16_t addr, int irq, int mode)
mpu->mode = M_UART;
mpu->intelligent = (mode == M_INTELLIGENT) ? 1 : 0;
pclog("Starting as %s (mode is %s)\n", mpu->intelligent ? "INTELLIGENT" : "UART", (mode == M_INTELLIGENT) ? "INTELLIGENT" : "UART");
mpu401_log("Starting as %s (mode is %s)\n", mpu->intelligent ? "INTELLIGENT" : "UART", (mode == M_INTELLIGENT) ? "INTELLIGENT" : "UART");
mpu401_event_callback = 0LL;
mpu401_eoi_callback = 0LL;
@@ -902,7 +895,7 @@ mpu401_standalone_init(const device_t *info)
mpu = malloc(sizeof(mpu_t));
memset(mpu, 0, sizeof(mpu_t));
pclog("mpu_init\n");
mpu401_log("mpu_init\n");
mpu401_init(mpu, device_get_config_hex16("base"), device_get_config_int("irq"), device_get_config_int("mode"));
return(mpu);

43
src/sound/snd_pas16.c
View File

@@ -1,8 +1,10 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../io.h"
@@ -176,6 +178,27 @@ enum
PAS16_FILT_MUTE = 0x20
};
#ifdef ENABLE_PAS16_LOG
int pas16_do_log = ENABLE_PAS16_LOG;
#endif
static void
pas16_log(const char *fmt, ...)
{
#ifdef ENABLE_PAS16_LOG
va_list ap;
if (pas16_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static uint8_t pas16_in(uint16_t port, void *p)
{
pas16_t *pas16 = (pas16_t *)p;
@@ -272,7 +295,7 @@ static uint8_t pas16_in(uint16_t port, void *p)
temp = 0xff;
break;
}
/* if (port != 0x388 && port != 0x389 && port != 0xb8b) */pclog("pas16_in : port %04X return %02X %04X:%04X\n", port, temp, CS,cpu_state.pc);
/* if (port != 0x388 && port != 0x389 && port != 0xb8b) */pas16_log("pas16_in : port %04X return %02X %04X:%04X\n", port, temp, CS,cpu_state.pc);
/* if (CS == 0x1FF4 && pc == 0x0585)
{
if (output)
@@ -285,7 +308,7 @@ static uint8_t pas16_in(uint16_t port, void *p)
static void pas16_out(uint16_t port, uint8_t val, void *p)
{
pas16_t *pas16 = (pas16_t *)p;
/* if (port != 0x388 && port != 0x389) */pclog("pas16_out : port %04X val %02X %04X:%04X\n", port, val, CS,cpu_state.pc);
/* if (port != 0x388 && port != 0x389) */pas16_log("pas16_out : port %04X val %02X %04X:%04X\n", port, val, CS,cpu_state.pc);
/* if (CS == 0x369 && pc == 0x2AC5)
fatal("here\n");*/
switch ((port - pas16->base) + 0x388)
@@ -352,12 +375,12 @@ static void pas16_out(uint16_t port, uint8_t val, void *p)
case 0xf389:
pas16->io_conf_2 = val;
pas16->dma = pas16_dmas[val & 0x7];
pclog("pas16_out : set PAS DMA %i\n", pas16->dma);
pas16_log("pas16_out : set PAS DMA %i\n", pas16->dma);
break;
case 0xf38a:
pas16->io_conf_3 = val;
pas16->irq = pas16_irqs[val & 0xf];
pclog("pas16_out : set PAS IRQ %i\n", pas16->irq);
pas16_log("pas16_out : set PAS IRQ %i\n", pas16->irq);
break;
case 0xf38b:
pas16->io_conf_4 = val;
@@ -380,11 +403,11 @@ static void pas16_out(uint16_t port, uint8_t val, void *p)
pas16->sb_irqdma = val;
sb_dsp_setirq(&pas16->dsp, pas16_sb_irqs[(val >> 3) & 7]);
sb_dsp_setdma8(&pas16->dsp, pas16_sb_dmas[(val >> 6) & 3]);
pclog("pas16_out : set SB IRQ %i DMA %i\n", pas16_sb_irqs[(val >> 3) & 7], pas16_sb_dmas[(val >> 6) & 3]);
pas16_log("pas16_out : set SB IRQ %i DMA %i\n", pas16_sb_irqs[(val >> 3) & 7], pas16_sb_dmas[(val >> 6) & 3]);
break;
default:
pclog("pas16_out : unknown %04X\n", port);
pas16_log("pas16_out : unknown %04X\n", port);
}
if (cpu_state.pc == 0x80048CF3)
{
@@ -417,7 +440,7 @@ static void pas16_pit_out(uint16_t port, uint8_t val, void *p)
pas16->pit.ctrls[t] = pas16->pit.ctrl = val;
if (t == 3)
{
pclog("PAS16: bad PIT reg select\n");
pas16_log("PAS16: bad PIT reg select\n");
return;
}
if (!(pas16->pit.ctrl & 0x30))
@@ -627,7 +650,7 @@ static void pas16_pcm_poll(void *p)
pas16->irq_stat |= PAS16_INT_PCM;
if (pas16->irq_ena & PAS16_INT_PCM)
{
pclog("pas16_pcm_poll : cause IRQ %i %02X\n", pas16->irq, 1 << pas16->irq);
pas16_log("pas16_pcm_poll : cause IRQ %i %02X\n", pas16->irq, 1 << pas16->irq);
picint(1 << pas16->irq);
}
}
@@ -658,7 +681,7 @@ static void pas16_out_base(uint16_t port, uint8_t val, void *p)
io_removehandler((pas16->base - 0x388) + 0xff88, 0x0004, pas16_in, NULL, NULL, pas16_out, NULL, NULL, pas16);
pas16->base = val << 2;
pclog("pas16_write_base : PAS16 base now at %04X\n", pas16->base);
pas16_log("pas16_write_base : PAS16 base now at %04X\n", pas16->base);
io_sethandler((pas16->base - 0x388) + 0x0388, 0x0004, pas16_in, NULL, NULL, pas16_out, NULL, NULL, pas16);
io_sethandler((pas16->base - 0x388) + 0x0788, 0x0004, pas16_in, NULL, NULL, pas16_out, NULL, NULL, pas16);

53
src/sound/snd_sb.c
View File

@@ -8,7 +8,7 @@
*
* Sound Blaster emulation.
*
* Version: @(#)sound_sb.c 1.0.8 2018/04/26
* Version: @(#)sound_sb.c 1.0.9 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -17,11 +17,13 @@
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../mca.h"
@@ -168,6 +170,27 @@ const int32_t sb_att_7dbstep_2bits[]=
164,6537,14637,32767
};
#ifdef ENABLE_SB_LOG
int sb_do_log = ENABLE_SB_LOG;
#endif
static void
sb_log(const char *fmt, ...)
{
#ifdef ENABLE_SB_LOG
va_list ap;
if (sb_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
/* sb 1, 1.5, 2, 2 mvc do not have a mixer, so signal is hardwired */
static void sb_get_buffer_sb2(int32_t *buffer, int len, void *p)
{
@@ -533,7 +556,7 @@ void sb_ct1335_mixer_write(uint16_t addr, uint8_t val, void *p)
break;
default:
/* pclog("sb_ct1335: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
sb_log("sb_ct1335: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break;
}
}
@@ -560,7 +583,7 @@ uint8_t sb_ct1335_mixer_read(uint16_t addr, void *p)
case 0x00: case 0x02: case 0x06: case 0x08: case 0x0A:
return mixer->regs[mixer->index];
default:
/* pclog("sb_ct1335: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
sb_log("sb_ct1335: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break;
}
@@ -624,7 +647,7 @@ void sb_ct1345_mixer_write(uint16_t addr, uint8_t val, void *p)
default:
/* pclog("sb_ct1345: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
sb_log("sb_ct1345: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break;
}
}
@@ -684,7 +707,7 @@ uint8_t sb_ct1345_mixer_read(uint16_t addr, void *p)
return mixer->regs[mixer->index];
default:
/* pclog("sb_ct1345: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
sb_log("sb_ct1345: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break;
}
@@ -831,7 +854,7 @@ void sb_ct1745_mixer_write(uint16_t addr, uint8_t val, void *p)
/*TODO: pcspeaker volume, with "output_selector" check? or better not? */
sound_set_cd_volume(((uint32_t)mixer->master_l * (uint32_t)mixer->cd_l) / 65535,
((uint32_t)mixer->master_r * (uint32_t)mixer->cd_r) / 65535);
// pclog("sb_ct1745: Received register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
sb_log("sb_ct1745: Received register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
}
}
@@ -843,7 +866,7 @@ uint8_t sb_ct1745_mixer_read(uint16_t addr, void *p)
if (!(addr & 1))
return mixer->index;
// pclog("sb_ct1745: received register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
sb_log("sb_ct1745: received register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
if (mixer->index>=0x30 && mixer->index<=0x47)
{
@@ -925,7 +948,7 @@ uint8_t sb_ct1745_mixer_read(uint16_t addr, void *p)
default:
/* pclog("sb_ct1745: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
sb_log("sb_ct1745: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break;
}
@@ -945,8 +968,8 @@ uint8_t sb_mcv_read(int port, void *p)
{
sb_t *sb = (sb_t *)p;
/* pclog("sb_mcv_read: port=%04x\n", port); */
sb_log("sb_mcv_read: port=%04x\n", port);
return sb->pos_regs[port & 7];
}
@@ -958,7 +981,7 @@ void sb_mcv_write(int port, uint8_t val, void *p)
if (port < 0x102)
return;
/* pclog("sb_mcv_write: port=%04x val=%02x\n", port, val); */
sb_log("sb_mcv_write: port=%04x val=%02x\n", port, val);
addr = sb_mcv_addr[sb->pos_regs[4] & 7];
if (sb->opl_enabled) {
@@ -989,8 +1012,8 @@ uint8_t sb_pro_mcv_read(int port, void *p)
{
sb_t *sb = (sb_t *)p;
/* pclog("sb_pro_mcv_read: port=%04x\n", port); */
sb_log("sb_pro_mcv_read: port=%04x\n", port);
return sb->pos_regs[port & 7];
}
@@ -1002,7 +1025,7 @@ void sb_pro_mcv_write(int port, uint8_t val, void *p)
if (port < 0x102)
return;
/* pclog("sb_pro_mcv_write: port=%04x val=%02x\n", port, val); */
sb_log("sb_pro_mcv_write: port=%04x val=%02x\n", port, val);
addr = (sb->pos_regs[2] & 0x20) ? 0x220 : 0x240;
io_removehandler(addr+0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl);

177
src/sound/snd_sb_dsp.c
View File

@@ -5,11 +5,13 @@
Pentium - 45kHz*/
#include <math.h>
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../pic.h"
@@ -29,17 +31,6 @@
void pollsb(void *p);
void sb_poll_i(void *p);
//#define SB_DSP_RECORD_DEBUG
//#define SB_TEST_RECORDING_SAW
#ifdef SB_DSP_RECORD_DEBUG
FILE* soundf = 0/*NULL*/;
#endif
#ifdef SB_TEST_RECORDING_SAW
int counttest;
#endif
static int sbe2dat[4][9] = {
{ 0x01, -0x02, -0x04, 0x08, -0x10, 0x20, 0x40, -0x80, -106 },
{ -0x01, 0x02, -0x04, 0x08, 0x10, -0x20, 0x40, -0x80, 165 },
@@ -119,6 +110,27 @@ uint16_t sb_dsp_versions[] = {0, 0, 0x105, 0x200, 0x201, 0x300, 0x302, 0x405, 0x
float low_fir_sb16_coef[SB16_NCoef];
#ifdef ENABLE_SB_DSP_LOG
int sb_dsp_do_log = ENABLE_SB_DSP_LOG;
#endif
static void
sb_dsp_log(const char *fmt, ...)
{
#ifdef ENABLE_SB_DSP_LOG
va_list ap;
if (sb_dsp_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static inline double sinc(double x)
{
return sin(M_PI * x) / (M_PI * x);
@@ -156,7 +168,7 @@ static void recalc_sb16_filter(int playback_freq)
void sb_irq(sb_dsp_t *dsp, int irq8)
{
// pclog("IRQ %i %02X\n",irq8,pic.mask);
sb_dsp_log("IRQ %i %02X\n",irq8,pic.mask);
if (irq8) dsp->sb_irq8 = 1;
else dsp->sb_irq16 = 1;
picint(1 << dsp->sb_irqnum);
@@ -195,14 +207,6 @@ void sb_dsp_reset(sb_dsp_t *dsp)
picintc(1 << dsp->sb_irqnum);
dsp->asp_data_len = 0;
#ifdef SB_DSP_RECORD_DEBUG
if (soundf != 0)
{
fclose(soundf);
soundf=0;
}
#endif
}
void sb_doreset(sb_dsp_t *dsp)
@@ -260,7 +264,6 @@ void sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len
timer_update_outstanding();
dsp->sbleftright = 0;
dsp->sbdacpos = 0;
// pclog("Start 8-bit DMA addr %06X len %04X\n",dma.ac[1]+(dma.page[1]<<16),len);
}
else
{
@@ -274,7 +277,6 @@ void sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len
timer_process();
dsp->sbenable = dsp->sb_16_enable;
timer_update_outstanding();
// pclog("Start 16-bit DMA addr %06X len %04X\n",dma16.ac[1]+(dma16.page[1]<<16),len);
}
}
@@ -282,13 +284,6 @@ void sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int l
{
if (dma8)
{
#ifdef SB_TEST_RECORDING_SAW
switch (dsp->sb_8_format)
{
case 00:case 20:counttest=0x80;break;
case 10:case 30:counttest=0;break;
}
#endif
dsp->sb_8_length = len;
dsp->sb_8_format = format;
dsp->sb_8_autoinit = autoinit;
@@ -299,17 +294,9 @@ void sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int l
timer_process();
dsp->sb_enable_i = dsp->sb_8_enable;
timer_update_outstanding();
// pclog("Start 8-bit input DMA addr %06X len %04X\n",dma.ac[1]+(dma.page[1]<<16),len);
}
else
{
#ifdef SB_TEST_RECORDING_SAW
switch (dsp->sb_16_format)
{
case 00:case 20:counttest=0x8000;break;
case 10:case 30:counttest=0;break;
}
#endif
dsp->sb_16_length = len;
dsp->sb_16_format = format;
dsp->sb_16_autoinit = autoinit;
@@ -320,18 +307,8 @@ void sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int l
timer_process();
dsp->sb_enable_i = dsp->sb_16_enable;
timer_update_outstanding();
// pclog("Start 16-bit input DMA addr %06X len %04X\n",dma.ac[1]+(dma.page[1]<<16),len);
}
memset(dsp->record_buffer,0,sizeof(dsp->record_buffer));
#ifdef SB_DSP_RECORD_DEBUG
if (soundf != 0)
{
fclose(soundf);
soundf=0;
}
#endif
}
int sb_8_read_dma(sb_dsp_t *dsp)
@@ -341,10 +318,6 @@ int sb_8_read_dma(sb_dsp_t *dsp)
void sb_8_write_dma(sb_dsp_t *dsp, uint8_t val)
{
dma_channel_write(dsp->sb_8_dmanum, val);
#ifdef SB_DSP_RECORD_DEBUG
if (!soundf) soundf=fopen("sound_dsp.pcm","wb");
fwrite(&val,1,1,soundf);
#endif
}
int sb_16_read_dma(sb_dsp_t *dsp)
{
@@ -353,10 +326,6 @@ int sb_16_read_dma(sb_dsp_t *dsp)
int sb_16_write_dma(sb_dsp_t *dsp, uint16_t val)
{
int ret = dma_channel_write(dsp->sb_16_dmanum, val);
#ifdef SB_DSP_RECORD_DEBUG
if (!soundf) soundf=fopen("sound_dsp.pcm","wb");
fwrite(&val,2,1,soundf);
#endif
return (ret == DMA_NODATA);
}
@@ -377,7 +346,7 @@ void sb_dsp_setdma16(sb_dsp_t *dsp, int dma)
void sb_exec_command(sb_dsp_t *dsp)
{
int temp,c;
// pclog("sb_exec_command : SB command %02X\n", dsp->sb_command);
sb_dsp_log("sb_exec_command : SB command %02X\n", dsp->sb_command);
switch (dsp->sb_command)
{
case 0x01: /*???*/
@@ -397,7 +366,6 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x17: /*2-bit ADPCM output with reference*/
dsp->sbref = sb_8_read_dma(dsp);
dsp->sbstep = 0;
// pclog("Ref byte 2 %02X\n",sbref);
case 0x16: /*2-bit ADPCM output*/
sb_start_dma(dsp, 1, 0, ADPCM_2, dsp->sb_data[0] + (dsp->sb_data[1] << 8));
dsp->sbdat2 = sb_8_read_dma(dsp);
@@ -459,7 +427,7 @@ void sb_exec_command(sb_dsp_t *dsp)
dsp->sblatcho = dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_data[0]);
temp = 256 - dsp->sb_data[0];
temp = 1000000 / temp;
// pclog("Sample rate - %ihz (%i)\n",temp, dsp->sblatcho);
sb_dsp_log("Sample rate - %ihz (%i)\n",temp, dsp->sblatcho);
if (dsp->sb_freq != temp && dsp->sb_type >= SB16)
recalc_sb16_filter(temp);
dsp->sb_freq = temp;
@@ -468,7 +436,7 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x42: /*Set input sampling rate*/
if (dsp->sb_type < SB16) break;
dsp->sblatcho = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_data[1] + (dsp->sb_data[0] << 8))));
// pclog("Sample rate - %ihz (%i)\n",dsp->sb_data[1]+(dsp->sb_data[0]<<8), dsp->sblatcho);
sb_dsp_log("Sample rate - %ihz (%i)\n",dsp->sb_data[1]+(dsp->sb_data[0]<<8), dsp->sblatcho);
temp = dsp->sb_freq;
dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8);
dsp->sb_timeo = 256LL + dsp->sb_freq;
@@ -483,7 +451,6 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x75: /*4-bit ADPCM output with reference*/
dsp->sbref = sb_8_read_dma(dsp);
dsp->sbstep = 0;
// pclog("Ref byte 4 %02X\n",sbref);
case 0x74: /*4-bit ADPCM output*/
sb_start_dma(dsp, 1, 0, ADPCM_4, dsp->sb_data[0] + (dsp->sb_data[1] << 8));
dsp->sbdat2 = sb_8_read_dma(dsp);
@@ -494,7 +461,6 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x77: /*2.6-bit ADPCM output with reference*/
dsp->sbref = sb_8_read_dma(dsp);
dsp->sbstep = 0;
// pclog("Ref byte 26 %02X\n",sbref);
case 0x76: /*2.6-bit ADPCM output*/
sb_start_dma(dsp, 1, 0, ADPCM_26, dsp->sb_data[0] + (dsp->sb_data[1] << 8));
dsp->sbdat2 = sb_8_read_dma(dsp);
@@ -516,7 +482,6 @@ void sb_exec_command(sb_dsp_t *dsp)
break;
case 0x80: /*Pause DAC*/
dsp->sb_pausetime = dsp->sb_data[0] + (dsp->sb_data[1] << 8);
// pclog("SB pause %04X\n",sb_pausetime);
timer_process();
dsp->sbenable = 1;
timer_update_outstanding();
@@ -540,7 +505,7 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0xA0: /*Set input mode to mono*/
case 0xA8: /*Set input mode to stereo*/
if (dsp->sb_type < SB2 || dsp->sb_type > SBPRO2) break;
//TODO: Implement. 3.xx-only command.
/* TODO: Implement. 3.xx-only command. */
break;
case 0xB0: case 0xB1: case 0xB2: case 0xB3:
case 0xB4: case 0xB5: case 0xB6: case 0xB7: /*16-bit DMA output*/
@@ -632,11 +597,11 @@ void sb_exec_command(sb_dsp_t *dsp)
sb_add_data(dsp, dsp->sb_test);
break;
case 0xF2: /*Trigger 8-bit IRQ*/
// pclog("Trigger IRQ\n");
sb_dsp_log("Trigger IRQ\n");
sb_irq(dsp, 1);
break;
case 0xF3: /*Trigger 16-bit IRQ*/
// pclog("Trigger IRQ\n");
sb_dsp_log("Trigger IRQ\n");
sb_irq(dsp, 0);
break;
case 0xE7: /*???*/
@@ -652,13 +617,10 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x0E: /*ASP set register*/
if (dsp->sb_type < SB16) break;
dsp->sb_asp_regs[dsp->sb_data[0]] = dsp->sb_data[1];
// pclog("ASP write reg %02X %02X\n", sb_data[0], sb_data[1]);
break;
case 0x0F: /*ASP get register*/
if (dsp->sb_type < SB16) break;
// sb_add_data(0);
sb_add_data(dsp, dsp->sb_asp_regs[dsp->sb_data[0]]);
// pclog("ASP read reg %02X %02X\n", sb_data[0], sb_asp_regs[sb_data[0]]);
break;
case 0xF8:
if (dsp->sb_type >= SB16) break;
@@ -673,10 +635,7 @@ void sb_exec_command(sb_dsp_t *dsp)
case 0x04:
case 0x05:
break;
// default:
// fatal("Exec bad SB command %02X\n",sb_command);
/*TODO: Some more data about the DSP registeres
* http://the.earth.li/~tfm/oldpage/sb_dsp.html
* http://www.synchrondata.com/pheaven/www/area19.htm
@@ -697,7 +656,6 @@ void sb_exec_command(sb_dsp_t *dsp)
void sb_write(uint16_t a, uint8_t v, void *priv)
{
sb_dsp_t *dsp = (sb_dsp_t *)priv;
// pclog("sb_write : Write soundblaster %04X %02X %04X:%04X %02X\n",a,v,CS,pc,dsp->sb_command);
switch (a&0xF)
{
case 6: /*Reset*/
@@ -721,7 +679,7 @@ void sb_write(uint16_t a, uint8_t v, void *priv)
timer_update_outstanding();
if (dsp->asp_data_len)
{
// pclog("ASP data %i\n", dsp->asp_data_len);
sb_dsp_log("ASP data %i\n", dsp->asp_data_len);
dsp->asp_data_len--;
if (!dsp->asp_data_len)
sb_add_data(dsp, 0);
@@ -732,8 +690,6 @@ void sb_write(uint16_t a, uint8_t v, void *priv)
dsp->sb_command = v;
if (v == 0x01)
sb_add_data(dsp, 0);
// if (sb_commands[v]==-1)
// fatal("Bad SB command %02X\n",v);
dsp->sb_data_stat++;
}
else
@@ -750,7 +706,6 @@ void sb_write(uint16_t a, uint8_t v, void *priv)
uint8_t sb_read(uint16_t a, void *priv)
{
sb_dsp_t *dsp = (sb_dsp_t *)priv;
// pclog("sb_read : Read soundblaster %04X %04X:%04X\n",a,CS,pc);
switch (a & 0xf)
{
case 0xA: /*Read data*/
@@ -764,7 +719,6 @@ uint8_t sb_read(uint16_t a, void *priv)
dsp->sb_read_rp++;
dsp->sb_read_rp &= 0xFF;
}
// pclog("SB read %02X\n",sbreaddat);
return dsp->sbreaddat;
case 0xC: /*Write data ready*/
if (dsp->sb_8_enable || dsp->sb_type >= SB16)
@@ -823,7 +777,7 @@ void sb_dsp_init(sb_dsp_t *dsp, int type)
void sb_dsp_setaddr(sb_dsp_t *dsp, uint16_t addr)
{
// pclog("sb_dsp_setaddr : %04X\n", addr);
sb_dsp_log("sb_dsp_setaddr : %04X\n", addr);
if (dsp->sb_addr != 0) {
io_removehandler(dsp->sb_addr + 6, 0x0002, sb_read, NULL, NULL, sb_write, NULL, NULL, dsp);
io_removehandler(dsp->sb_addr + 0xa, 0x0006, sb_read, NULL, NULL, sb_write, NULL, NULL, dsp);
@@ -846,13 +800,11 @@ void pollsb(void *p)
int tempi,ref;
dsp->sbcount += dsp->sblatcho;
// pclog("PollSB %i %i %i %i\n",sb_8_enable,sb_8_pause,sb_pausetime,sb_8_output);
if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && dsp->sb_8_output)
{
int data[2];
sb_dsp_update(dsp);
// pclog("Dopoll %i %02X %i\n", sb_8_length, sb_8_format, sblatcho);
switch (dsp->sb_8_format)
{
case 0x00: /*Mono unsigned*/
@@ -1054,13 +1006,11 @@ void pollsb(void *p)
dsp->sbdatr = data[1];
dsp->sb_16_length -= 2;
break;
// default:
// fatal("Unrecognised SB 16-bit format %02X\n",sb_16_format);
}
if (dsp->sb_16_length < 0)
{
// pclog("16DMA over %i\n",dsp->sb_16_autoinit);
sb_dsp_log("16DMA over %i\n",dsp->sb_16_autoinit);
if (dsp->sb_16_autoinit) dsp->sb_16_length = dsp->sb_16_autolen;
else dsp->sb_16_enable = dsp->sbenable = 0;
sb_irq(dsp, 0);
@@ -1073,7 +1023,7 @@ void pollsb(void *p)
{
sb_irq(dsp, 1);
dsp->sbenable = dsp->sb_8_enable;
// pclog("SB pause over\n");
sb_dsp_log("SB pause over\n");
}
}
}
@@ -1083,28 +1033,10 @@ void sb_poll_i(void *p)
sb_dsp_t *dsp = (sb_dsp_t *)p;
int processed=0;
dsp->sb_count_i += dsp->sblatchi;
// pclog("PollSBi %i %i %i %i\n",sb_8_enable,sb_8_pause,sb_pausetime,sb_8_output);
if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && !dsp->sb_8_output)
{
switch (dsp->sb_8_format)
{
#ifdef SB_TEST_RECORDING_SAW
case 0x00: /*Unsigned mono. As the manual says, only the left channel is recorded*/
case 0x10: /*Signed mono. As the manual says, only the left channel is recorded*/
sb_8_write_dma(dsp, counttest);
counttest+=0x10;
counttest&=0xFF;
dsp->sb_8_length--;
break;
case 0x20: /*Unsigned stereo*/
case 0x30: /*Signed stereo*/
sb_8_write_dma(dsp, counttest);
sb_8_write_dma(dsp, counttest);
counttest+=0x10;
counttest&=0xFF;
dsp->sb_8_length -= 2;
break;
#else
case 0x00: /*Mono unsigned As the manual says, only the left channel is recorded*/
sb_8_write_dma(dsp, (dsp->record_buffer[dsp->record_pos_read]>>8) ^0x80);
dsp->sb_8_length--;
@@ -1131,14 +1063,10 @@ void sb_poll_i(void *p)
dsp->record_pos_read+=2;
dsp->record_pos_read&=0xFFFF;
break;
#endif
// default:
// fatal("Unrecognised SB 8-bit input format %02X\n",sb_8_format);
}
if (dsp->sb_8_length < 0)
{
// pclog("Input DMA over %i\n",sb_8_autoinit);
if (dsp->sb_8_autoinit) dsp->sb_8_length = dsp->sb_8_autolen;
else dsp->sb_8_enable = dsp->sb_enable_i = 0;
sb_irq(dsp, 1);
@@ -1149,25 +1077,6 @@ void sb_poll_i(void *p)
{
switch (dsp->sb_16_format)
{
#ifdef SB_TEST_RECORDING_SAW
case 0x00: /*Unsigned mono. As the manual says, only the left channel is recorded*/
case 0x10: /*Signed mono. As the manual says, only the left channel is recorded*/
if (sb_16_write_dma(dsp, counttest))
return;
counttest+=0x1000;
counttest&=0xFFFF;
dsp->sb_16_length--;
break;
case 0x20: /*Unsigned stereo*/
case 0x30: /*Signed stereo*/
if (sb_16_write_dma(dsp, counttest))
return;
sb_16_write_dma(dsp, counttest);
counttest+=0x1000;
counttest&=0xFFFF;
dsp->sb_16_length -= 2;
break;
#else
case 0x00: /*Unsigned mono. As the manual says, only the left channel is recorded*/
if (sb_16_write_dma(dsp, dsp->record_buffer[dsp->record_pos_read]^0x8000))
return;
@@ -1198,21 +1107,17 @@ void sb_poll_i(void *p)
dsp->record_pos_read+=2;
dsp->record_pos_read&=0xFFFF;
break;
#endif
// default:
// fatal("Unrecognised SB 16-bit input format %02X\n",sb_16_format);
}
if (dsp->sb_16_length < 0)
{
// pclog("16iDMA over %i\n",sb_16_autoinit);
if (dsp->sb_16_autoinit) dsp->sb_16_length = dsp->sb_16_autolen;
else dsp->sb_16_enable = dsp->sb_enable_i = 0;
sb_irq(dsp, 0);
}
processed=1;
}
//Assume this is direct mode
/* Assume this is direct mode */
if (!processed)
{
dsp->record_pos_read+=2;
@@ -1233,13 +1138,7 @@ void sb_dsp_update(sb_dsp_t *dsp)
dsp->buffer[dsp->pos*2 + 1] = dsp->sbdatr;
}
}
void sb_dsp_close(sb_dsp_t *dsp)
{
#ifdef SB_DSP_RECORD_DEBUG
if (soundf != 0)
{
fclose(soundf);
soundf=0;
}
#endif
}

7
src/sound/snd_ssi2001.c
View File

@@ -1,8 +1,10 @@
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../io.h"
#include "../device.h"
@@ -61,8 +63,7 @@ void *ssi2001_init(const device_t *info)
{
ssi2001_t *ssi2001 = malloc(sizeof(ssi2001_t));
memset(ssi2001, 0, sizeof(ssi2001_t));
pclog("ssi2001_init\n");
ssi2001->psid = sid_init();
sid_reset(ssi2001->psid);
io_sethandler(0x0280, 0x0020, ssi2001_read, NULL, NULL, ssi2001_write, NULL, NULL, ssi2001);

34
src/sound/sound.c
View File

@@ -8,7 +8,7 @@
*
* Sound emulation core.
*
* Version: @(#)sound.c 1.0.16 2018/03/26
* Version: @(#)sound.c 1.0.17 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -16,11 +16,13 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../device.h"
#include "../timer.h"
@@ -106,6 +108,26 @@ static const SOUND_CARD sound_cards[] =
};
#ifdef ENABLE_SOUND_LOG
int sound_do_log = ENABLE_SOUND_LOG;
#endif
static void
sound_log(const char *fmt, ...)
{
#ifdef ENABLE_SOUND_LOG
va_list ap;
if (sound_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
int sound_card_available(int card)
{
if (sound_cards[card].device)
@@ -370,10 +392,10 @@ void sound_init(void)
sound_cd_event = thread_create_event();
sound_cd_thread_h = thread_create(sound_cd_thread, NULL);
/* pclog("Waiting for CD start event...\n"); */
sound_log("Waiting for CD start event...\n");
thread_wait_event(sound_cd_start_event, -1);
thread_reset_event(sound_cd_start_event);
/* pclog("Done!\n"); */
sound_log("Done!\n");
}
else
cdaudioon = 0;
@@ -493,10 +515,10 @@ void sound_cd_thread_end(void)
if (cdaudioon) {
cdaudioon = 0;
/* pclog("Waiting for CD Audio thread to terminate...\n"); */
sound_log("Waiting for CD Audio thread to terminate...\n");
thread_set_event(sound_cd_event);
thread_wait(sound_cd_thread_h, -1);
/* pclog("CD Audio thread terminated...\n"); */
sound_log("CD Audio thread terminated...\n");
if (sound_cd_event) {
thread_destroy_event(sound_cd_event);

1
src/timer.c
View File

@@ -96,7 +96,6 @@ void timer_update_outstanding(void)
void timer_reset(void)
{
/* pclog("timer_reset\n"); */
timers_present = 0;
timer_latch = timer_count = 0;
}

4
src/video/vid_ati18800.c
View File

@@ -8,7 +8,7 @@
*
* ATI 18800 emulation (VGA Edge-16)
*
* Version: @(#)vid_ati18800.c 1.0.11 2018/04/26
* Version: @(#)vid_ati18800.c 1.0.12 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -80,7 +80,6 @@ static void ati18800_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x1cf:
ati18800->regs[ati18800->index] = val;
/* pclog("ATI 18800 ATI register write %02x %02x\n", ati18800->index, val); */
switch (ati18800->index)
{
case 0xb0:
@@ -161,7 +160,6 @@ static uint8_t ati18800_in(uint16_t addr, void *p)
temp = svga_in(addr, svga);
break;
}
/* if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,cpu_state.pc); */
return temp;
}

43
src/video/vid_ati28800.c
View File

@@ -8,7 +8,7 @@
*
* ATI 28800 emulation (VGA Charger and Korean VGA)
*
* Version: @(#)vid_ati28800.c 1.0.17 2018/04/26
* Version: @(#)vid_ati28800.c 1.0.19 2018/05/20
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -18,11 +18,13 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2018 greatpsycho.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../io.h"
@@ -39,6 +41,7 @@
#define BIOS_ATIKOR_PATH L"roms/video/ati28800/atikorvga.bin"
#define FONT_ATIKOR_PATH L"roms/video/ati28800/ati_ksc5601.rom"
#define BIOS_VGAXL_EVEN_PATH L"roms/video/ati28800/xleven.bin"
#define BIOS_VGAXL_ODD_PATH L"roms/video/ati28800/xlodd.bin"
@@ -73,14 +76,34 @@ typedef struct ati28800_t
} ati28800_t;
#ifdef ENABLE_ATI28800_LOG
int ati28800_do_log = ENABLE_ATI28800_LOG;
#endif
static void
ati28800_log(const char *fmt, ...)
{
#ifdef ENABLE_ATI28800_LOG
va_list ap;
if (ati28800_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
static void ati28800_out(uint16_t addr, uint8_t val, void *p)
{
ati28800_t *ati28800 = (ati28800_t *)p;
svga_t *svga = &ati28800->svga;
uint8_t old;
/* pclog("ati28800_out : %04X %02X %04X:%04X\n", addr, val, CS,pc); */
ati28800_log("ati28800_out : %04X %02X %04X:%04X\n", addr, val, CS, cpu_state.pc);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1))
addr ^= 0x60;
@@ -212,7 +235,7 @@ static uint8_t ati28800_in(uint16_t addr, void *p)
svga_t *svga = &ati28800->svga;
uint8_t temp;
/* if (addr != 0x3da) pclog("ati28800_in : %04X ", addr); */
if (addr != 0x3da) ati28800_log("ati28800_in : %04X ", addr);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;
@@ -261,7 +284,7 @@ static uint8_t ati28800_in(uint16_t addr, void *p)
temp = svga_in(addr, svga);
break;
}
/* if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,cpu_state.pc); */
if (addr != 0x3da) ati28800_log("%02X %04X:%04X\n", temp, CS,cpu_state.pc);
return temp;
}
@@ -272,8 +295,8 @@ uint8_t ati28800k_in(uint16_t addr, void *p)
uint16_t oldaddr = addr;
uint8_t temp = 0xFF;
// if (addr != 0x3da) pclog("ati28800_in : %04X ", addr);
if (addr != 0x3da) ati28800_log("ati28800k_in : %04X ", addr);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;
switch (addr)
@@ -303,7 +326,7 @@ uint8_t ati28800k_in(uint16_t addr, void *p)
temp = ati28800_in(oldaddr, p);
break;
}
if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,cpu_state.pc);
if (addr != 0x3da) ati28800_log("%02X %04X:%04X\n", temp, CS,cpu_state.pc);
return temp;
}
@@ -387,7 +410,7 @@ ati28800k_init(const device_t *info)
ati28800->ksc5601_mode_enabled = 0;
rom_init(&ati28800->bios_rom, BIOS_ATIKOR_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
loadfont(FONT_ATIKOR_PATH, 6);
loadfont(FONT_ATIKOR_PATH, 6);
svga_init(&ati28800->svga, ati28800, ati28800->memory << 10, /*Memory size, default 512KB*/
ati28800k_recalctimings,

264
src/video/vid_ati_mach64.c
View File

@@ -8,7 +8,7 @@
*
* ATi Mach64 graphics card emulation.
*
* Version: @(#)vid_ati_mach64.c 1.0.20 2018/04/26
* Version: @(#)vid_ati_mach64.c 1.0.21 2018/04/29
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -16,12 +16,15 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include "../86box.h"
#include "../cpu/cpu.h"
#include "../machine/machine.h"
#include "../device.h"
#include "../io.h"
@@ -339,6 +342,27 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv);
void mach64_ext_writew(uint32_t addr, uint16_t val, void *priv);
void mach64_ext_writel(uint32_t addr, uint32_t val, void *priv);
#ifdef ENABLE_MACH64_LOG
int mach64_do_log = ENABLE_MACH64_LOG;
#endif
static void
mach64_log(const char *fmt, ...)
{
#ifdef ENABLE_MACH64_LOG
va_list ap;
if (mach64_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
#endif
}
void mach64_out(uint16_t addr, uint8_t val, void *p)
{
mach64_t *mach64 = p;
@@ -505,7 +529,7 @@ void mach64_updatemapping(mach64_t *mach64)
if (!(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))
{
/* pclog("Update mapping - PCI disabled\n"); */
mach64_log("Update mapping - PCI disabled\n");
mem_mapping_disable(&svga->mapping);
mem_mapping_disable(&mach64->linear_mapping);
mem_mapping_disable(&mach64->mmio_mapping);
@@ -647,11 +671,9 @@ static void mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val
(addr & 0x3ff) == 0x113) && !(val & 0x80))
{
mach64_start_fill(mach64);
#ifdef MACH64_DEBUG
pclog("%i %i %i %i %i %08x\n", (mach64->dst_height_width & 0x7ff), (mach64->dst_height_width & 0x7ff0000),
mach64_log("%i %i %i %i %i %08x\n", (mach64->dst_height_width & 0x7ff), (mach64->dst_height_width & 0x7ff0000),
((mach64->dp_src & 7) != SRC_HOST), (((mach64->dp_src >> 8) & 7) != SRC_HOST),
(((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST), mach64->dp_src);
#endif
if ((mach64->dst_height_width & 0x7ff) && (mach64->dst_height_width & 0x7ff0000) &&
((mach64->dp_src & 7) != SRC_HOST) && (((mach64->dp_src >> 8) & 7) != SRC_HOST) &&
(((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST))
@@ -839,13 +861,7 @@ static void mach64_accel_write_fifo_w(mach64_t *mach64, uint32_t addr, uint16_t
break;
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_accel_write_fifo(mach64, addr, val);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_accel_write_fifo(mach64, addr + 1, val >> 8);
break;
}
@@ -871,13 +887,7 @@ static void mach64_accel_write_fifo_l(mach64_t *mach64, uint32_t addr, uint32_t
break;
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_accel_write_fifo_w(mach64, addr, val);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_accel_write_fifo_w(mach64, addr + 2, val >> 16);
break;
}
@@ -990,14 +1000,12 @@ void mach64_start_fill(mach64_t *mach64)
mach64->accel.src_width2 = (mach64->src_height2_width2 >> 16) & 0x7fff;
mach64->accel.src_height2 = mach64->src_height2_width2 & 0x1fff;
#ifdef MACH64_DEBUG
pclog("src %i %i %i %i %08X %08X\n", mach64->accel.src_x_count,
mach64_log("src %i %i %i %i %08X %08X\n", mach64->accel.src_x_count,
mach64->accel.src_y_count,
mach64->accel.src_width1,
mach64->accel.src_height1,
mach64->src_height1_width1,
mach64->src_height2_width2);
#endif
mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8;
mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8;
@@ -1050,9 +1058,6 @@ void mach64_start_fill(mach64_t *mach64)
mach64->accel.sc_top = mach64->sc_top_bottom & 0x7fff;
mach64->accel.sc_bottom = (mach64->sc_top_bottom >> 16) & 0x7fff;
/* mach64->accel.sc_left *= mach64_inc[mach64->accel.dst_pix_width];
mach64->accel.sc_right *= mach64_inc[mach64->accel.dst_pix_width];*/
mach64->accel.dp_frgd_clr = mach64->dp_frgd_clr;
mach64->accel.dp_bkgd_clr = mach64->dp_bkgd_clr;
@@ -1064,9 +1069,8 @@ void mach64_start_fill(mach64_t *mach64)
mach64->accel.poly_draw = 0;
mach64->accel.busy = 1;
#ifdef MACH64_DEBUG
pclog("mach64_start_fill : dst %i, %i src %i, %i size %i, %i src pitch %i offset %X dst pitch %i offset %X scissor %i %i %i %i src_fg %i mix %02X %02X\n", mach64->accel.dst_x_start, mach64->accel.dst_y_start, mach64->accel.src_x_start, mach64->accel.src_y_start, mach64->accel.dst_width, mach64->accel.dst_height, mach64->accel.src_pitch, mach64->accel.src_offset, mach64->accel.dst_pitch, mach64->accel.dst_offset, mach64->accel.sc_left, mach64->accel.sc_right, mach64->accel.sc_top, mach64->accel.sc_bottom, mach64->accel.source_fg, mach64->accel.mix_fg, mach64->accel.mix_bg);
#endif
mach64_log("mach64_start_fill : dst %i, %i src %i, %i size %i, %i src pitch %i offset %X dst pitch %i offset %X scissor %i %i %i %i src_fg %i mix %02X %02X\n", mach64->accel.dst_x_start, mach64->accel.dst_y_start, mach64->accel.src_x_start, mach64->accel.src_y_start, mach64->accel.dst_width, mach64->accel.dst_height, mach64->accel.src_pitch, mach64->accel.src_offset, mach64->accel.dst_pitch, mach64->accel.dst_offset, mach64->accel.sc_left, mach64->accel.sc_right, mach64->accel.sc_top, mach64->accel.sc_bottom, mach64->accel.source_fg, mach64->accel.mix_fg, mach64->accel.mix_bg);
mach64->accel.op = OP_RECT;
}
@@ -1142,9 +1146,8 @@ void mach64_start_line(mach64_t *mach64)
mach64->accel.clr_cmp_src = mach64->clr_cmp_cntl & (1 << 24);
mach64->accel.busy = 1;
#ifdef MACH64_DEBUG
pclog("mach64_start_line\n");
#endif
mach64_log("mach64_start_line\n");
mach64->accel.op = OP_LINE;
}
@@ -1212,9 +1215,7 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
if (!mach64->accel.busy)
{
#ifdef MACH64_DEBUG
pclog("mach64_blit : return as not busy\n");
#endif
mach64_log("mach64_blit : return as not busy\n");
return;
}
switch (mach64->accel.op)
@@ -1399,9 +1400,7 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
if (mach64->accel.dst_height <= 0)
{
/*Blit finished*/
#ifdef MACH64_DEBUG
pclog("mach64 blit finished\n");
#endif
mach64_log("mach64 blit finished\n");
mach64->accel.busy = 0;
if (mach64->dst_cntl & DST_X_TILE)
mach64->dst_y_x = (mach64->dst_y_x & 0xfff) | ((mach64->dst_y_x + (mach64->accel.dst_width << 16)) & 0xfff0000);
@@ -1528,9 +1527,7 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
if (mach64->accel.x_count <= 0)
{
/*Blit finished*/
#ifdef MACH64_DEBUG
pclog("mach64 blit finished\n");
#endif
mach64_log("mach64 blit finished\n");
mach64->accel.busy = 0;
return;
}
@@ -1554,9 +1551,7 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
mach64->accel.dst_y++;
break;
}
#ifdef MACH64_DEBUG
pclog("x %i y %i err %i inc %i dec %i\n", mach64->accel.dst_x, mach64->accel.dst_y, mach64->accel.err, mach64->dst_bres_inc, mach64->dst_bres_dec);
#endif
mach64_log("x %i y %i err %i inc %i dec %i\n", mach64->accel.dst_x, mach64->accel.dst_y, mach64->accel.err, mach64->dst_bres_inc, mach64->dst_bres_dec);
if (mach64->accel.err >= 0)
{
mach64->accel.err += mach64->dst_bres_dec;
@@ -1597,10 +1592,8 @@ void mach64_load_context(mach64_t *mach64)
{
addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) & mach64->vram_mask;
mach64->context_mask = *(uint32_t *)&svga->vram[addr];
#ifdef MACH64_DEBUG
pclog("mach64_load_context %08X from %08X : mask %08X\n", mach64->context_load_cntl, addr, mach64->context_mask);
#endif
mach64_log("mach64_load_context %08X from %08X : mask %08X\n", mach64->context_load_cntl, addr, mach64->context_mask);
if (mach64->context_mask & (1 << 2))
mach64_accel_write_fifo_l(mach64, 0x100, *(uint32_t *)&svga->vram[addr + 0x08]);
if (mach64->context_mask & (1 << 3))
@@ -1675,8 +1668,8 @@ static void pll_write(mach64_t *mach64, uint32_t addr, uint8_t val)
break;
case 2: /*Data*/
mach64->pll_regs[mach64->pll_addr] = val;
/* pclog("pll_write %02x,%02x\n", mach64->pll_addr, val); */
mach64_log("pll_write %02x,%02x\n", mach64->pll_addr, val);
for (c = 0; c < 4; c++)
{
double m = (double)mach64->pll_regs[PLL_REF_DIV];
@@ -1684,9 +1677,9 @@ static void pll_write(mach64_t *mach64, uint32_t addr, uint8_t val)
double r = 14318184.0;
double p = (double)(1 << ((mach64->pll_regs[VCLK_POST_DIV] >> (c*2)) & 3));
/* pclog("PLLfreq %i = %g %g m=%02x n=%02x p=%02x\n", c, (2.0 * r * n) / (m * p), p, mach64->pll_regs[PLL_REF_DIV], mach64->pll_regs[VCLK0_FB_DIV+c], mach64->pll_regs[VCLK_POST_DIV]); */
mach64_log("PLLfreq %i = %g %g m=%02x n=%02x p=%02x\n", c, (2.0 * r * n) / (m * p), p, mach64->pll_regs[PLL_REF_DIV], mach64->pll_regs[VCLK0_FB_DIV+c], mach64->pll_regs[VCLK_POST_DIV]);
mach64->pll_freq[c] = (2.0 * r * n) / (m * p);
/* pclog(" %g\n", mach64->pll_freq[c]); */
mach64_log(" %g\n", mach64->pll_freq[c]);
}
break;
}
@@ -1722,9 +1715,7 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
uint8_t ret;
if (!(addr & 0x400))
{
#ifdef MACH64_DEBUG
pclog("nmach64_ext_readb: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
#endif
mach64_log("nmach64_ext_readb: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
switch (addr & 0x3ff)
{
case 0x00: case 0x01: case 0x02: case 0x03:
@@ -2076,8 +2067,6 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
break;
case 0x338:
/* if (!FIFO_EMPTY)
wake_fifo_thread(mach64);*/
ret = FIFO_EMPTY ? 0 : 1;
break;
@@ -2085,9 +2074,7 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
ret = 0;
break;
}
#ifdef MACH64_DEBUG
if ((addr & 0x3fc) != 0x018) pclog("mach64_ext_readb : addr %08X ret %02X\n", addr, ret);
#endif
if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readb : addr %08X ret %02X\n", addr, ret);
return ret;
}
uint16_t mach64_ext_readw(uint32_t addr, void *p)
@@ -2095,27 +2082,17 @@ uint16_t mach64_ext_readw(uint32_t addr, void *p)
uint16_t ret;
if (!(addr & 0x400))
{
#ifdef MACH64_DEBUG
pclog("nmach64_ext_readw: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
#endif
mach64_log("nmach64_ext_readw: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
ret = 0xffff;
}
else switch (addr & 0x3ff)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret = mach64_ext_readb(addr, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret |= mach64_ext_readb(addr + 1, p) << 8;
break;
}
#ifdef MACH64_DEBUG
if ((addr & 0x3fc) != 0x018) pclog("mach64_ext_readw : addr %08X ret %04X\n", addr, ret);
#endif
if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readw : addr %08X ret %04X\n", addr, ret);
return ret;
}
uint32_t mach64_ext_readl(uint32_t addr, void *p)
@@ -2124,9 +2101,7 @@ uint32_t mach64_ext_readl(uint32_t addr, void *p)
uint32_t ret;
if (!(addr & 0x400))
{
#ifdef MACH64_DEBUG
pclog("nmach64_ext_readl: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
#endif
mach64_log("nmach64_ext_readl: addr=%04x %04x(%08x):%08x\n", addr, CS, cs, cpu_state.pc);
ret = 0xffffffff;
}
else switch (addr & 0x3ff)
@@ -2145,19 +2120,11 @@ uint32_t mach64_ext_readl(uint32_t addr, void *p)
break;
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret = mach64_ext_readw(addr, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret |= mach64_ext_readw(addr + 2, p) << 16;
break;
}
#ifdef MACH64_DEBUG
if ((addr & 0x3fc) != 0x018) pclog("mach64_ext_readl : addr %08X ret %08X\n", addr, ret);
#endif
if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readl : addr %08X ret %08X\n", addr, ret);
return ret;
}
@@ -2165,9 +2132,9 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
svga_t *svga = &mach64->svga;
#ifdef MACH64_DEBUG
pclog("mach64_ext_writeb : addr %08X val %02X %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc);
#endif
mach64_log("mach64_ext_writeb : addr %08X val %02X %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc);
if (!(addr & 0x400))
{
switch (addr & 0x3ff)
@@ -2224,9 +2191,8 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p)
WRITE8(addr, mach64->buf_pitch[1], val);
break;
}
#ifdef MACH64_DEBUG
pclog("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val);
#endif
mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val);
}
else if (addr & 0x300)
{
@@ -2332,27 +2298,19 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p)
case 0xb4:
mach64->bank_w[0] = val * 32768;
#ifdef MACH64_DEBUG
pclog("mach64 : write bank A0000-A7FFF set to %08X\n", mach64->bank_w[0]);
#endif
mach64_log("mach64 : write bank A0000-A7FFF set to %08X\n", mach64->bank_w[0]);
break;
case 0xb5: case 0xb6:
mach64->bank_w[1] = val * 32768;
#ifdef MACH64_DEBUG
pclog("mach64 : write bank A8000-AFFFF set to %08X\n", mach64->bank_w[1]);
#endif
mach64_log("mach64 : write bank A8000-AFFFF set to %08X\n", mach64->bank_w[1]);
break;
case 0xb8:
mach64->bank_r[0] = val * 32768;
#ifdef MACH64_DEBUG
pclog("mach64 : read bank A0000-A7FFF set to %08X\n", mach64->bank_r[0]);
#endif
mach64_log("mach64 : read bank A0000-A7FFF set to %08X\n", mach64->bank_r[0]);
break;
case 0xb9: case 0xba:
mach64->bank_r[1] = val * 32768;
#ifdef MACH64_DEBUG
pclog("mach64 : read bank A8000-AFFFF set to %08X\n", mach64->bank_r[1]);
#endif
mach64_log("mach64 : read bank A8000-AFFFF set to %08X\n", mach64->bank_r[1]);
break;
case 0xc0: case 0xc1: case 0xc2: case 0xc3:
@@ -2389,14 +2347,11 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p)
void mach64_ext_writew(uint32_t addr, uint16_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
pclog("mach64_ext_writew : addr %08X val %04X\n", addr, val);
#endif
mach64_log("mach64_ext_writew : addr %08X val %04X\n", addr, val);
if (!(addr & 0x400))
{
#ifdef MACH64_DEBUG
pclog("nmach64_ext_writew: addr=%04x val=%04x %04x(%08x):%08x\n", addr, val, CS, cs, cpu_state.pc);
#endif
mach64_log("nmach64_ext_writew: addr=%04x val=%04x %04x(%08x):%08x\n", addr, val, CS, cs, cpu_state.pc);
mach64_ext_writeb(addr, val, p);
mach64_ext_writeb(addr + 1, val >> 8, p);
}
@@ -2407,13 +2362,7 @@ void mach64_ext_writew(uint32_t addr, uint16_t val, void *p)
else switch (addr & 0x3fe)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_writeb(addr, val, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_writeb(addr + 1, val >> 8, p);
break;
}
@@ -2421,15 +2370,12 @@ void mach64_ext_writew(uint32_t addr, uint16_t val, void *p)
void mach64_ext_writel(uint32_t addr, uint32_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
if ((addr & 0x3c0) != 0x200)
pclog("mach64_ext_writel : addr %08X val %08X\n", addr, val);
#endif
mach64_log("mach64_ext_writel : addr %08X val %08X\n", addr, val);
if (!(addr & 0x400))
{
#ifdef MACH64_DEBUG
pclog("nmach64_ext_writel: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS, cs, cpu_state.pc);
#endif
mach64_log("nmach64_ext_writel: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS, cs, cpu_state.pc);
mach64_ext_writew(addr, val, p);
mach64_ext_writew(addr + 2, val >> 16, p);
}
@@ -2440,13 +2386,7 @@ void mach64_ext_writel(uint32_t addr, uint32_t val, void *p)
else switch (addr & 0x3fc)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_writew(addr, val, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_writew(addr + 2, val >> 16, p);
break;
}
@@ -2570,9 +2510,7 @@ uint8_t mach64_ext_inb(uint16_t port, void *p)
ret = 0;
break;
}
#ifdef MACH64_DEBUG
pclog("mach64_ext_inb : port %04X ret %02X %04X:%04X\n", port, ret, CS,cpu_state.pc);
#endif
mach64_log("mach64_ext_inb : port %04X ret %02X %04X:%04X\n", port, ret, CS,cpu_state.pc);
return ret;
}
uint16_t mach64_ext_inw(uint16_t port, void *p)
@@ -2581,19 +2519,11 @@ uint16_t mach64_ext_inw(uint16_t port, void *p)
switch (port)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret = mach64_ext_inb(port, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret |= (mach64_ext_inb(port + 1, p) << 8);
break;
}
#ifdef MACH64_DEBUG
pclog("mach64_ext_inw : port %04X ret %04X\n", port, ret);
#endif
mach64_log("mach64_ext_inw : port %04X ret %04X\n", port, ret);
return ret;
}
uint32_t mach64_ext_inl(uint16_t port, void *p)
@@ -2609,28 +2539,18 @@ uint32_t mach64_ext_inl(uint16_t port, void *p)
break;
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret = mach64_ext_inw(port, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
ret |= (mach64_ext_inw(port + 2, p) << 16);
break;
}
#ifdef MACH64_DEBUG
pclog("mach64_ext_inl : port %04X ret %08X\n", port, ret);
#endif
mach64_log("mach64_ext_inl : port %04X ret %08X\n", port, ret);
return ret;
}
void mach64_ext_outb(uint16_t port, uint8_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
pclog("mach64_ext_outb : port %04X val %02X %04X:%04X\n", port, val, CS,cpu_state.pc);
#endif
mach64_log("mach64_ext_outb : port %04X val %02X %04X:%04X\n", port, val, CS,cpu_state.pc);
switch (port)
{
case 0x02ec: case 0x02ed: case 0x02ee: case 0x02ef:
@@ -2732,36 +2652,22 @@ void mach64_ext_outb(uint16_t port, uint8_t val, void *p)
}
void mach64_ext_outw(uint16_t port, uint16_t val, void *p)
{
#ifdef MACH64_DEBUG
pclog("mach64_ext_outw : port %04X val %04X\n", port, val);
#endif
mach64_log("mach64_ext_outw : port %04X val %04X\n", port, val);
switch (port)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_outb(port, val, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_outb(port + 1, val >> 8, p);
break;
}
}
void mach64_ext_outl(uint16_t port, uint32_t val, void *p)
{
/* pclog("mach64_ext_outl : port %04X val %08X\n", port, val); */
mach64_log("mach64_ext_outl : port %04X val %08X\n", port, val);
switch (port)
{
default:
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_outw(port, val, p);
#ifdef MACH64_DEBUG
pclog(" ");
#endif
mach64_ext_outw(port + 2, val >> 16, p);
break;
}
@@ -2773,9 +2679,7 @@ static uint8_t mach64_block_inb(uint16_t port, void *p)
uint8_t ret;
ret = mach64_ext_readb(0x400 | (port & 0x3ff), mach64);
#ifdef MACH64_DEBUG
pclog("mach64_block_inb : port %04X ret %02X %04x:%04x\n", port, ret, CS,cpu_state.pc);
#endif
mach64_log("mach64_block_inb : port %04X ret %02X %04x:%04x\n", port, ret, CS,cpu_state.pc);
return ret;
}
static uint16_t mach64_block_inw(uint16_t port, void *p)
@@ -2784,9 +2688,7 @@ static uint16_t mach64_block_inw(uint16_t port, void *p)
uint16_t ret;
ret = mach64_ext_readw(0x400 | (port & 0x3ff), mach64);
#ifdef MACH64_DEBUG
pclog("mach64_block_inw : port %04X ret %04X\n", port, ret);
#endif
mach64_log("mach64_block_inw : port %04X ret %04X\n", port, ret);
return ret;
}
static uint32_t mach64_block_inl(uint16_t port, void *p)
@@ -2795,9 +2697,7 @@ static uint32_t mach64_block_inl(uint16_t port, void *p)
uint32_t ret;
ret = mach64_ext_readl(0x400 | (port & 0x3ff), mach64);
#ifdef MACH64_DEBUG
pclog("mach64_block_inl : port %04X ret %08X\n", port, ret);
#endif
mach64_log("mach64_block_inl : port %04X ret %08X\n", port, ret);
return ret;
}
@@ -2805,27 +2705,21 @@ static void mach64_block_outb(uint16_t port, uint8_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
pclog("mach64_block_outb : port %04X val %02X\n ", port, val);
#endif
mach64_log("mach64_block_outb : port %04X val %02X\n ", port, val);
mach64_ext_writeb(0x400 | (port & 0x3ff), val, mach64);
}
static void mach64_block_outw(uint16_t port, uint16_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
pclog("mach64_block_outw : port %04X val %04X\n ", port, val);
#endif
mach64_log("mach64_block_outw : port %04X val %04X\n ", port, val);
mach64_ext_writew(0x400 | (port & 0x3ff), val, mach64);
}
static void mach64_block_outl(uint16_t port, uint32_t val, void *p)
{
mach64_t *mach64 = (mach64_t *)p;
#ifdef MACH64_DEBUG
pclog("mach64_block_outl : port %04X val %08X\n ", port, val);
#endif
mach64_log("mach64_block_outl : port %04X val %08X\n ", port, val);
mach64_ext_writel(0x400 | (port & 0x3ff), val, mach64);
}
@@ -3085,7 +2979,7 @@ void mach64_overlay_draw(svga_t *svga, int displine)
break;
default:
/* pclog("Unknown Mach64 scaler format %x\n", mach64->scaler_format); */
mach64_log("Unknown Mach64 scaler format %x\n", mach64->scaler_format);
/*Fill buffer with something recognisably wrong*/
for (x = 0; x < mach64->svga.overlay_latch.xsize; x++)
mach64->overlay_dat[x] = 0xff00ff;
@@ -3361,12 +3255,12 @@ void mach64_pci_write(int func, int addr, uint8_t val, void *p)
if (mach64->pci_regs[0x30] & 0x01)
{
uint32_t addr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24);
/* pclog("Mach64 bios_rom enabled at %08x\n", addr); */
mach64_log("Mach64 bios_rom enabled at %08x\n", addr);
mem_mapping_set_addr(&mach64->bios_rom.mapping, addr, 0x8000);
}
else
{
/* pclog("Mach64 bios_rom disabled\n"); */
mach64_log("Mach64 bios_rom disabled\n");
mem_mapping_disable(&mach64->bios_rom.mapping);
}
return;

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