it's definitely argb + some fixes

This commit is contained in:
starfrost013
2025-03-20 21:35:56 +00:00
parent fea521d3ac
commit 57d725742e
8 changed files with 14 additions and 23 deletions

View File

@@ -100,22 +100,13 @@ typedef struct nv3_class_ctx_switch_method_s
} nv3_class_ctx_switch_method_t;
/* 32-bit BGRA format colour for 2D acceleration */
typedef struct nv3_color_bgra_32_s
{
uint8_t b;
uint8_t g;
uint8_t r;
uint8_t a;
} nv3_color_bgra_32_t;
/* 32-bit ARGB format colour for internal D3D5 stuff */
typedef struct nv3_color_argb_32_s
{
uint8_t a;
uint8_t r;
uint8_t g;
uint8_t b;
uint8_t a;
} nv3_color_argb_32_t;
/* 30-bit colour format for internal PGRAPH use */
@@ -375,7 +366,7 @@ typedef struct nv3_object_class_007
/* In case your points weren't colourful enough */
typedef struct nv3_object_class_008_cpoint_s
{
nv3_color_argb_32_t color; // BGRA-format 32-bit color
nv3_color_argb_32_t color; // argb-format 32-bit color
nv3_position_16_t position; //
} nv3_object_class_008_cpoint_t;
@@ -1083,7 +1074,7 @@ typedef struct nv3_d3d5_alpha_control_s
typedef struct nv3_d3d5_coordinate_s
{
nv3_d3d5_specular_t specular_reflection_parameters;
nv3_color_bgra_32_t color; // YOU HAVE TO FLIP THE ENDIANNESS. NVIDIA??? WHAT???
nv3_color_argb_32_t color; // YOU HAVE TO FLIP THE ENDIANNESS. NVIDIA??? WHAT???
// Seems more plausible for these specifically to be floats.
// Also makes my life easier...

View File

@@ -35,10 +35,9 @@ extern const device_config_t nv3_config[];
#define NV3_LFB_RAMIN_START 0xC00000 // RAMIN mapping start
#define NV3_LFB_MAPPING_SIZE 0x400000 // Size of RAMIN
// DMA channels are basically the number of contexts that the gpu can deal with at once.
// THere are 64 DMA channels grouped into 8 "channels" with 8 "subchannels" each. You can only use one channel at a time. An arbitrary number of 8 objects can be submitted.
// Channel 0 is always taken up by NV drivers.
// Subchannels deal with specific parts of the GPU and are manipulated by the driver to manipulate the gpu.
#define NV3_DMA_CHANNELS 8
#define NV3_DMA_SUBCHANNELS_PER_CHANNEL 8