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More linting in src/video

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This commit is contained in:
Jasmine Iwanek
2023-08-21 20:25:05 -04:00
parent 11a2f5266a
commit 506d548b38
37 changed files with 1154 additions and 480 deletions
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13
src/video/vid_ati_mach64.c
View File

@@ -1192,6 +1192,9 @@ fifo_thread(void *param)
case FIFO_WRITE_DWORD:
mach64_accel_write_fifo_l(mach64, fifo->addr_type & FIFO_ADDR, fifo->val);
break;
default:
break;
}
mach64->fifo_read_idx++;
@@ -1683,6 +1686,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
src_dat = mach64->accel.pattern_clr8x1[dst_x & 7];
break;
}
default:
src_dat = 0;
break;
@@ -2538,7 +2542,7 @@ mach64_ext_readb(uint32_t addr, void *priv)
case 0x110:
case 0x111:
addr += 2;
/*FALLTHROUGH*/
fallthrough;
case 0x114:
case 0x115:
case 0x118:
@@ -2713,7 +2717,7 @@ mach64_ext_readb(uint32_t addr, void *priv)
case 0x2a4:
case 0x2a5:
addr += 2;
/*FALLTHROUGH*/
fallthrough;
case 0x2aa:
case 0x2ab:
mach64_wait_fifo_idle(mach64);
@@ -2730,7 +2734,7 @@ mach64_ext_readb(uint32_t addr, void *priv)
case 0x2b0:
case 0x2b1:
addr += 2;
/*FALLTHROUGH*/
fallthrough;
case 0x2b6:
case 0x2b7:
mach64_wait_fifo_idle(mach64);
@@ -3704,6 +3708,9 @@ mach64_ext_outb(uint16_t port, uint8_t val, void *priv)
WRITE8(port, mach64->config_cntl, val);
mach64_updatemapping(mach64);
break;
default:
break;
}
}
void

66
src/video/vid_cga.c
View File

@@ -35,6 +35,7 @@
#include <86box/video.h>
#include <86box/vid_cga.h>
#include <86box/vid_cga_comp.h>
#include <86box/plat_unused.h>
#define CGA_RGB 0
#define CGA_COMPOSITE 1
@@ -52,9 +53,9 @@ static video_timings_t timing_cga = { .type = VIDEO_ISA, .write_b = 8, .write_w
void cga_recalctimings(cga_t *cga);
void
cga_out(uint16_t addr, uint8_t val, void *p)
cga_out(uint16_t addr, uint8_t val, void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
uint8_t old;
if ((addr >= 0x3d0) && (addr <= 0x3d7))
@@ -91,13 +92,16 @@ cga_out(uint16_t addr, uint8_t val, void *p)
if (old ^ val)
cga_recalctimings(cga);
return;
default:
break;
}
}
uint8_t
cga_in(uint16_t addr, void *p)
cga_in(uint16_t addr, void *priv)
{
cga_t *cga = (cga_t *) p;
const cga_t *cga = (cga_t *) priv;
uint8_t ret = 0xff;
@@ -114,29 +118,32 @@ cga_in(uint16_t addr, void *p)
case 0x3DA:
ret = cga->cgastat;
break;
default:
break;
}
return ret;
}
void
cga_pravetz_out(uint16_t addr, uint8_t val, void *p)
cga_pravetz_out(UNUSED(uint16_t addr), uint8_t val, void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
cga->fontbase = (((unsigned int) val) << 8);
}
uint8_t
cga_pravetz_in(uint16_t addr, void *p)
cga_pravetz_in(UNUSED(uint16_t addr), void *priv)
{
cga_t *cga = (cga_t *) p;
const cga_t *cga = (cga_t *) priv;
return (cga->fontbase >> 8);
}
void
cga_waitstates(void *p)
cga_waitstates(UNUSED(void *priv))
{
int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 };
int ws;
@@ -146,9 +153,9 @@ cga_waitstates(void *p)
}
void
cga_write(uint32_t addr, uint8_t val, void *p)
cga_write(uint32_t addr, uint8_t val, void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
cga->vram[addr & 0x3fff] = val;
if (cga->snow_enabled) {
@@ -160,9 +167,9 @@ cga_write(uint32_t addr, uint8_t val, void *p)
}
uint8_t
cga_read(uint32_t addr, void *p)
cga_read(uint32_t addr, void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
cga_waitstates(cga);
if (cga->snow_enabled) {
@@ -177,7 +184,8 @@ void
cga_recalctimings(cga_t *cga)
{
double disptime;
double _dispontime, _dispofftime;
double _dispontime;
double _dispofftime;
if (cga->cgamode & 1) {
disptime = (double) (cga->crtc[0] + 1);
@@ -194,14 +202,18 @@ cga_recalctimings(cga_t *cga)
}
void
cga_poll(void *p)
cga_poll(void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
uint16_t ca = (cga->crtc[15] | (cga->crtc[14] << 8)) & 0x3fff;
int drawcursor;
int x, c, xs_temp, ys_temp;
int x;
int c;
int xs_temp;
int ys_temp;
int oldvc;
uint8_t chr, attr;
uint8_t chr;
uint8_t attr;
uint8_t border;
uint16_t dat;
int cols[4];
@@ -267,8 +279,8 @@ cga_poll(void *p)
} else if (!(cga->cgamode & 2)) {
for (x = 0; x < cga->crtc[1]; x++) {
if (cga->cgamode & 8) {
chr = cga->vram[((cga->ma << 1) & 0x3fff)];
attr = cga->vram[(((cga->ma << 1) + 1) & 0x3fff)];
chr = cga->vram[(cga->ma << 1) & 0x3fff];
attr = cga->vram[((cga->ma << 1) + 1) & 0x3fff];
} else
chr = attr = 0;
drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron);
@@ -490,11 +502,11 @@ cga_poll(void *p)
}
if (cga->cgadispon)
cga->cgastat &= ~1;
if ((cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1))))
if (cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1)))
cga->con = 1;
if (cga->cgadispon && (cga->cgamode & 1)) {
for (x = 0; x < (cga->crtc[1] << 1); x++)
cga->charbuffer[x] = cga->vram[(((cga->ma << 1) + x) & 0x3fff)];
cga->charbuffer[x] = cga->vram[((cga->ma << 1) + x) & 0x3fff];
}
}
}
@@ -507,7 +519,7 @@ cga_init(cga_t *cga)
}
void *
cga_standalone_init(const device_t *info)
cga_standalone_init(UNUSED(const device_t *info))
{
int display_type;
cga_t *cga = malloc(sizeof(cga_t));
@@ -553,18 +565,18 @@ cga_pravetz_init(const device_t *info)
}
void
cga_close(void *p)
cga_close(void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
free(cga->vram);
free(cga);
}
void
cga_speed_changed(void *p)
cga_speed_changed(void *priv)
{
cga_t *cga = (cga_t *) p;
cga_t *cga = (cga_t *) priv;
cga_recalctimings(cga);
}

3
src/video/vid_cl54xx.c
View File

@@ -3871,7 +3871,8 @@ gd5428_mca_write(int port, uint8_t val, void *priv)
static uint8_t
gd5428_mca_feedb(void *priv)
{
gd54xx_t *gd54xx = (gd54xx_t *) priv;
const gd54xx_t *gd54xx = (gd54xx_t *) priv;
return gd54xx->pos_regs[2] & 0x01;
}

4
src/video/vid_ega.c
View File

@@ -810,7 +810,9 @@ ega_poll(void *priv)
if (ega->vc == ega->vsyncstart) {
ega->dispon = 0;
ega->stat |= 8;
// picint(1 << 2);
#if 0
picint(1 << 2);
#endif
x = ega->hdisp;
if (ega->interlace && !ega->oddeven)

2
src/video/vid_et3000.c
View File

@@ -246,7 +246,7 @@ et3000_init(const device_t *info)
break;
}
rom_init(&dev->bios_rom, (char *) fn,
rom_init(&dev->bios_rom, fn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
dev->svga.bpp = 8;

19
src/video/vid_et4000.c
View File

@@ -367,8 +367,8 @@ et4000k_out(uint16_t addr, uint8_t val, void *priv)
static uint8_t
et4000_kasan_in(uint16_t addr, void *priv)
{
et4000_t *et4000 = (et4000_t *) priv;
uint8_t val = 0xFF;
const et4000_t *et4000 = (et4000_t *) priv;
uint8_t val = 0xFF;
if (addr == 0x258) {
val = et4000->kasan_cfg_index;
@@ -485,8 +485,8 @@ et4000_kasan_out(uint16_t addr, uint8_t val, void *priv)
uint32_t
get_et4000_addr(uint32_t addr, void *priv)
{
svga_t *svga = (svga_t *) priv;
uint32_t nbank;
const svga_t *svga = (svga_t *) priv;
uint32_t nbank;
switch (svga->crtc[0x37] & 0x0B) {
case 0x00:
@@ -545,7 +545,7 @@ get_et4000_addr(uint32_t addr, void *priv)
static void
et4000_recalctimings(svga_t *svga)
{
et4000_t *dev = (et4000_t *) svga->priv;
const et4000_t *dev = (et4000_t *) svga->priv;
svga->ma_latch |= (svga->crtc[0x33] & 3) << 16;
if (svga->crtc[0x35] & 1)
@@ -610,7 +610,7 @@ et4000_recalctimings(svga_t *svga)
static void
et4000_kasan_recalctimings(svga_t *svga)
{
et4000_t *et4000 = (et4000_t *) svga->priv;
const et4000_t *et4000 = (et4000_t *) svga->priv;
et4000_recalctimings(svga);
@@ -626,7 +626,7 @@ et4000_kasan_recalctimings(svga_t *svga)
static uint8_t
et4000_mca_read(int port, void *priv)
{
et4000_t *et4000 = (et4000_t *) priv;
const et4000_t *et4000 = (et4000_t *) priv;
return (et4000->pos_regs[port & 7]);
}
@@ -746,13 +746,16 @@ et4000_init(const device_t *info)
loadfont(KASAN_FONT_ROM_PATH, 6);
fn = KASAN_BIOS_ROM_PATH;
break;
default:
break;
}
dev->svga.ramdac = device_add(&sc1502x_ramdac_device);
dev->vram_mask = dev->vram_size - 1;
rom_init(&dev->bios_rom, (char *) fn,
rom_init(&dev->bios_rom, fn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
dev->svga.translate_address = get_et4000_addr;

88
src/video/vid_et4000w32.c
View File

@@ -210,6 +210,9 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv)
svga->gdcreg[svga->gdcaddr & 15] = val;
et4000w32p_recalcmapping(et4000);
return;
default:
break;
}
break;
case 0x3d4:
@@ -290,6 +293,9 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv)
case 8:
svga->hwcursor.xoff += 32;
break;
default:
break;
}
}
@@ -315,6 +321,9 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv)
add2addr = svga->hwcursor.yoff * ((svga->hwcursor.cur_xsize == 128) ? 32 : 16);
svga->hwcursor.addr += add2addr;
return;
default:
break;
}
svga_out(addr, val, svga);
@@ -408,6 +417,9 @@ et4000w32p_in(uint16_t addr, void *priv)
return (et4000->regs[0xef] & 0x8f) | (et4000->rev << 4) | et4000->vlb;
}
return et4000->regs[et4000->index];
default:
break;
}
return svga_in(addr, svga);
@@ -452,6 +464,9 @@ et4000w32p_recalctimings(svga_t *svga)
case 24:
svga->clock /= 4;
break;
default:
break;
}
}
}
@@ -490,6 +505,9 @@ et4000w32p_recalctimings(svga_t *svga)
break;
svga->hdisp -= 24;
break;
default:
break;
}
}
}
@@ -518,6 +536,9 @@ et4000w32p_recalctimings(svga_t *svga)
svga->hdisp = 640;
}
break;
default:
break;
}
svga->render = svga_render_blank;
@@ -591,8 +612,14 @@ et4000w32p_recalctimings(svga_t *svga)
else
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
break;
default:
break;
}
}
}
@@ -667,6 +694,9 @@ et4000w32p_recalcmapping(et4000w32p_t *et4000)
mem_mapping_set_addr(&et4000->mmu_mapping, 0xa8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
}
@@ -833,6 +863,9 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val)
case 0xaf:
et4000->acl.queued.dmaj = (et4000->acl.queued.dmaj & 0x00FF) | (val << 8);
break;
default:
break;
}
}
@@ -968,9 +1001,15 @@ et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *priv)
case 0x31:
et4000->acl.osr = val;
break;
default:
break;
}
}
break;
default:
break;
}
}
@@ -978,7 +1017,7 @@ static uint8_t
et4000w32p_mmu_read(uint32_t addr, void *priv)
{
et4000w32p_t *et4000 = (et4000w32p_t *) priv;
svga_t *svga = &et4000->svga;
const svga_t *svga = &et4000->svga;
uint8_t temp;
switch (addr & 0x6000) {
@@ -1104,9 +1143,15 @@ et4000w32p_mmu_read(uint32_t addr, void *priv)
return et4000->acl.internal.dest_addr >> 16;
case 0xa3:
return et4000->acl.internal.dest_addr >> 24;
default:
break;
}
return 0xff;
default:
break;
}
return 0xff;
@@ -2339,6 +2384,9 @@ et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32
case 7: /* X- */
et4000w32_decx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000);
break;
default:
break;
}
et4000->acl.internal.error += et4000->acl.internal.dmin;
if (et4000->acl.internal.error > et4000->acl.internal.dmaj) {
@@ -2364,6 +2412,9 @@ et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32
et4000w32_decy(et4000);
et4000->acl.internal.pos_y++;
break;
default:
break;
}
}
if ((et4000->acl.internal.pos_x > et4000->acl.internal.count_x) || (et4000->acl.internal.pos_y > et4000->acl.internal.count_y)) {
@@ -2451,16 +2502,17 @@ et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32
void
et4000w32p_hwcursor_draw(svga_t *svga, int displine)
{
et4000w32p_t *et4000 = (et4000w32p_t *) svga->priv;
int offset;
int xx;
int xx2;
int shift = (et4000->adjust_cursor + 1);
int width = (svga->hwcursor_latch.cur_xsize - svga->hwcursor_latch.xoff);
int pitch = (svga->hwcursor_latch.cur_xsize == 128) ? 32 : 16;
int x_acc = 4;
int minus_width = 0;
uint8_t dat;
const et4000w32p_t *et4000 = (et4000w32p_t *) svga->priv;
int offset;
int xx;
int xx2;
int shift = (et4000->adjust_cursor + 1);
int width = (svga->hwcursor_latch.cur_xsize - svga->hwcursor_latch.xoff);
int pitch = (svga->hwcursor_latch.cur_xsize == 128) ? 32 : 16;
int x_acc = 4;
int minus_width = 0;
uint8_t dat;
offset = svga->hwcursor_latch.xoff;
if ((et4000->type == ET4000W32) && (pitch == 32)) {
@@ -2474,6 +2526,9 @@ et4000w32p_hwcursor_draw(svga_t *svga, int displine)
minus_width = 64;
x_acc = 2;
break;
default:
break;
}
}
@@ -2559,7 +2614,7 @@ et4000w32p_io_set(et4000w32p_t *et4000)
uint8_t
et4000w32p_pci_read(UNUSED(int func), int addr, void *priv)
{
et4000w32p_t *et4000 = (et4000w32p_t *) priv;
const et4000w32p_t *et4000 = (et4000w32p_t *) priv;
addr &= 0xff;
@@ -2607,6 +2662,9 @@ et4000w32p_pci_read(UNUSED(int func), int addr, void *priv)
return 0x00;
case 0x33:
return et4000->pci_regs[0x33] & 0xf0;
default:
break;
}
return 0;
@@ -2658,6 +2716,9 @@ et4000w32p_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
mem_mapping_disable(&et4000->bios_rom.mapping);
}
return;
default:
break;
}
}
@@ -2790,6 +2851,9 @@ et4000w32p_init(const device_t *info)
et4000->svga.clock_gen = device_add(&icd2061_device);
et4000->svga.getclock = icd2061_getclock;
break;
default:
break;
}
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&et4000->bios_rom.mapping);

20
src/video/vid_f82c425.c
View File

@@ -268,6 +268,9 @@ f82c425_out(uint16_t addr, uint8_t val, void *priv)
f82c425_smartmap(f82c425);
f82c425_colormap(f82c425);
break;
default:
break;
}
}
@@ -300,6 +303,9 @@ f82c425_in(uint16_t addr, void *priv)
return f82c425->timing;
case 0xdf:
return f82c425->function;
default:
break;
}
return 0xff;
@@ -317,7 +323,8 @@ f82c425_write(uint32_t addr, uint8_t val, void *priv)
static uint8_t
f82c425_read(uint32_t addr, void *priv)
{
f82c425_t *f82c425 = (f82c425_t *) priv;
const f82c425_t *f82c425 = (f82c425_t *) priv;
cycles -= 4;
return f82c425->vram[addr & 0x3fff];
@@ -391,12 +398,12 @@ f82c425_text_row(f82c425_t *f82c425)
if (f82c425->cga.cgamode & 0x01) {
/* High resolution (80 cols) */
for (c = 0; c < sl; c++) {
((uint32_t *) buffer32->line[f82c425->displine])[(x << 3) + c] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0];
(buffer32->line[f82c425->displine])[(x << 3) + c] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0];
}
} else {
/* Low resolution (40 columns, stretch pixels horizontally) */
for (c = 0; c < sl; c++) {
((uint32_t *) buffer32->line[f82c425->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[f82c425->displine])[(x << 4) + c * 2 + 1] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0];
(buffer32->line[f82c425->displine])[(x << 4) + c * 2] = (buffer32->line[f82c425->displine])[(x << 4) + c * 2 + 1] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0];
}
}
@@ -420,7 +427,7 @@ f82c425_cgaline6(f82c425_t *f82c425)
addr++;
for (uint8_t c = 0; c < 8; c++) {
((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + c] = colormap[dat & 0x80 ? 3 : 0];
(buffer32->line[f82c425->displine])[x * 8 + c] = colormap[dat & 0x80 ? 3 : 0];
dat = dat << 1;
}
@@ -447,7 +454,7 @@ f82c425_cgaline4(f82c425_t *f82c425)
if (!(f82c425->cga.cgamode & 0x08))
pattern = 0;
((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + 2 * c] = ((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + 2 * c + 1] = colormap[pattern & 3];
(buffer32->line[f82c425->displine])[x * 8 + 2 * c] = (buffer32->line[f82c425->displine])[x * 8 + 2 * c + 1] = colormap[pattern & 3];
dat = dat << 2;
}
@@ -506,6 +513,9 @@ f82c425_poll(void *priv)
case 0x01:
f82c425_text_row(f82c425);
break;
default:
break;
}
}
f82c425->displine++;

30
src/video/vid_genius.c
View File

@@ -204,14 +204,17 @@ genius_out(uint16_t addr, uint8_t val, void *priv)
case 0x3d9:
genius->cga_colour = val;
return;
default:
break;
}
}
uint8_t
genius_in(uint16_t addr, void *priv)
{
genius_t *genius = (genius_t *) priv;
uint8_t ret = 0xff;
const genius_t *genius = (genius_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0x3b0:
@@ -253,6 +256,9 @@ genius_in(uint16_t addr, void *priv)
case 0x3da:
ret = genius->cga_stat;
break;
default:
break;
}
return ret;
@@ -295,8 +301,9 @@ genius_write(uint32_t addr, uint8_t val, void *priv)
uint8_t
genius_read(uint32_t addr, void *priv)
{
genius_t *genius = (genius_t *) priv;
uint8_t ret;
const genius_t *genius = (genius_t *) priv;
uint8_t ret;
genius_waitstates();
if (genius->genius_control & 1) {
@@ -364,6 +371,9 @@ genius_lines(genius_t *genius)
case 0x13:
ret = 492; /* 80x41 */
break;
default:
break;
}
return ret;
@@ -379,7 +389,7 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80)
uint8_t attr;
uint8_t sc;
uint8_t ctrl;
uint8_t *crtc;
const uint8_t *crtc;
uint8_t bitmap[2];
int blink;
int c;
@@ -390,7 +400,7 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80)
uint16_t addr;
uint16_t ma = (genius->mda_crtc[13] | (genius->mda_crtc[12] << 8)) & 0x3fff;
uint16_t ca = (genius->mda_crtc[15] | (genius->mda_crtc[14] << 8)) & 0x3fff;
unsigned char *framebuf = genius->vram + 0x10000;
const uint8_t *framebuf = genius->vram + 0x10000;
uint32_t col;
uint32_t dl = genius->displine;
@@ -466,6 +476,9 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80)
case 0x60:
drawcursor = drawcursor && (genius->blink & 32);
break;
default:
break;
}
blink = ((genius->blink & 16) && (ctrl & 0x20) && (attr & 0x80) && !drawcursor);
@@ -721,9 +734,8 @@ genius_poll(void *priv)
}
}
void
*
genius_init(const device_t *info)
void *
genius_init(UNUSED(const device_t *info))
{
genius_t *genius = malloc(sizeof(genius_t));

4
src/video/vid_hercules.c
View File

@@ -152,8 +152,8 @@ hercules_out(uint16_t addr, uint8_t val, void *priv)
static uint8_t
hercules_in(uint16_t addr, void *priv)
{
hercules_t *dev = (hercules_t *) priv;
uint8_t ret = 0xff;
const hercules_t *dev = (hercules_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0x03b0:

2
src/video/vid_herculesplus.c
View File

@@ -286,7 +286,6 @@ draw_char_ram4(herculesplus_t *dev, int x, uint8_t chr, uint8_t attr)
unsigned val;
unsigned ifg;
unsigned ibg;
unsigned cfg;
const uint8_t *fnt;
int elg;
int blk;
@@ -346,7 +345,6 @@ draw_char_ram48(herculesplus_t *dev, int x, uint8_t chr, uint8_t attr)
unsigned val;
unsigned ifg;
unsigned ibg;
unsigned cfg;
const uint8_t *fnt;
int elg;
int blk;

71
src/video/vid_ht216.c
View File

@@ -136,7 +136,7 @@ dword_remap(svga_t *svga, uint32_t in_addr)
static void
ht216_recalc_bank_regs(ht216_t *ht216, int mode)
{
svga_t *svga = &ht216->svga;
const svga_t *svga = &ht216->svga;
if (mode) {
ht216->read_bank_reg[0] = ht216->ht_regs[0xe8];
@@ -382,6 +382,9 @@ ht216_out(uint16_t addr, uint8_t val, void *priv)
svga->fullchange = changeframecount;
svga_recalctimings(svga);
break;
default:
break;
}
return;
}
@@ -459,6 +462,9 @@ ht216_out(uint16_t addr, uint8_t val, void *priv)
ht216_remap(ht216);
}
break;
default:
break;
}
svga_out(addr, val, svga);
@@ -527,6 +533,9 @@ ht216_in(uint16_t addr, void *priv)
ret = svga->latch.b[ht216->bg_plane_sel];
ht216->bg_plane_sel = 0;
break;
default:
break;
}
return ret;
@@ -557,6 +566,9 @@ ht216_in(uint16_t addr, void *priv)
if (svga->crtcreg == 0x1f)
return svga->crtc[0xc] ^ 0xea;
return svga->crtc[svga->crtcreg];
default:
break;
}
return svga_in(addr, svga);
@@ -704,11 +716,11 @@ ht216_recalctimings(svga_t *svga)
static void
ht216_hwcursor_draw(svga_t *svga, int displine)
{
ht216_t *ht216 = (ht216_t *) svga->priv;
int shift = (ht216->adjust_cursor ? 2 : 1);
uint32_t dat[2];
int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff;
int width = (ht216->adjust_cursor ? 16 : 32);
const ht216_t *ht216 = (ht216_t *) svga->priv;
int shift = (ht216->adjust_cursor ? 2 : 1);
uint32_t dat[2];
int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff;
int width = (ht216->adjust_cursor ? 16 : 32);
if (ht216->adjust_cursor)
offset >>= 1;
@@ -721,9 +733,9 @@ ht216_hwcursor_draw(svga_t *svga, int displine)
for (int x = 0; x < width; x++) {
if (!(dat[0] & 0x80000000))
((uint32_t *) buffer32->line[displine])[svga->x_add + offset + x] = 0;
(buffer32->line[displine])[svga->x_add + offset + x] = 0;
if (dat[1] & 0x80000000)
((uint32_t *) buffer32->line[displine])[svga->x_add + offset + x] ^= 0xffffff;
(buffer32->line[displine])[svga->x_add + offset + x] ^= 0xffffff;
dat[0] <<= shift;
dat[1] <<= shift;
@@ -859,6 +871,9 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
for (i = 0; i < count; i++)
fg_data[i] = ht216->fg_latch[i];
break;
default:
break;
}
switch (svga->writemode) {
@@ -920,6 +935,9 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
reset_wm = 1;
break;
default:
break;
}
switch (svga->gdcreg[3] & 0x18) {
@@ -967,6 +985,9 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
}
}
break;
default:
break;
}
if (reset_wm)
@@ -1017,6 +1038,9 @@ ht216_dm_extalu_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t bi
case 0x0c:
input_a = ht216->bg_latch[addr & 7];
break;
default:
break;
}
fg = extalu(ht216->ht_regs[0xce] >> 4, input_a, input_b);
@@ -1104,10 +1128,10 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
01 = Bit mask (3CF:8)
1x = (3C4:F5)
*/
svga_t *svga = &ht216->svga;
int i;
uint8_t bit_mask = 0;
uint8_t rop_select = 0;
const svga_t *svga = &ht216->svga;
int i;
uint8_t bit_mask = 0;
uint8_t rop_select = 0;
cycles -= video_timing_write_b;
@@ -1128,6 +1152,9 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
case 0x30:
rop_select = ht216->ht_regs[0xf5];
break;
default:
break;
}
switch (ht216->ht_regs[0xcd] & HT_REG_CD_BMSKSL) {
case 0x00:
@@ -1140,6 +1167,9 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
case 0x0c:
bit_mask = ht216->ht_regs[0xf5];
break;
default:
break;
}
if (ht216->ht_regs[0xcd] & HT_REG_CD_FP8PCEXP) { /*1->8 bit expansion*/
@@ -1376,9 +1406,9 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
static uint8_t
ht216_read(uint32_t addr, void *priv)
{
ht216_t *ht216 = (ht216_t *) priv;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
ht216_t *ht216 = (ht216_t *) priv;
const svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->read_banks[(addr >> 15) & 1];
@@ -1394,8 +1424,8 @@ ht216_read(uint32_t addr, void *priv)
static uint8_t
ht216_read_linear(uint32_t addr, void *priv)
{
ht216_t *ht216 = (ht216_t *) priv;
svga_t *svga = &ht216->svga;
ht216_t *ht216 = (ht216_t *) priv;
const svga_t *svga = &ht216->svga;
addr -= ht216->linear_base;
if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/
@@ -1408,8 +1438,10 @@ ht216_read_linear(uint32_t addr, void *priv)
static uint8_t
radius_mca_read(int port, void *priv)
{
ht216_t *ht216 = (ht216_t *) priv;
const ht216_t *ht216 = (ht216_t *) priv;
ht216_log("Port %03x MCA read = %02x\n", port, ht216->pos_regs[port & 7]);
return (ht216->pos_regs[port & 7]);
}
@@ -1504,6 +1536,9 @@ void
}
rom_init(&ht216->bios_rom, BIOS_RADIUS_SVGA_MULTIVIEW_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
break;
default:
break;
}
svga->hwcursor.cur_ysize = 32;

4
src/video/vid_icd2061.c
View File

@@ -61,9 +61,9 @@ icd2061_log(const char *fmt, ...)
#endif
void
icd2061_write(void *p, int val)
icd2061_write(void *priv, int val)
{
icd2061_t *icd2061 = (icd2061_t *) p;
icd2061_t *icd2061 = (icd2061_t *) priv;
int nd;
int oc;

32
src/video/vid_im1024.c
View File

@@ -763,15 +763,15 @@ hndl_tsize(pgc_t *pgc)
static void
hndl_twrite(pgc_t *pgc)
{
uint8_t buf[256];
im1024_t *dev = (im1024_t *) pgc;
uint8_t count;
uint8_t mask;
uint8_t *row;
int wb;
int n;
int16_t x0 = pgc->x >> 16;
int16_t y0 = pgc->y >> 16;
uint8_t buf[256];
const im1024_t *dev = (im1024_t *) pgc;
uint8_t count;
uint8_t mask;
const uint8_t *row;
int wb;
int n;
int16_t x0 = pgc->x >> 16;
int16_t y0 = pgc->y >> 16;
if (!pgc_param_byte(pgc, &count))
return;
@@ -811,13 +811,13 @@ hndl_twrite(pgc_t *pgc)
static void
hndl_txt88(pgc_t *pgc)
{
uint8_t buf[256];
uint8_t count;
uint8_t mask;
uint8_t *row;
int16_t x0 = pgc->x >> 16;
int16_t y0 = pgc->y >> 16;
unsigned n;
uint8_t buf[256];
uint8_t count;
uint8_t mask;
const uint8_t *row;
int16_t x0 = pgc->x >> 16;
int16_t y0 = pgc->y >> 16;
unsigned int n;
if (!pgc_param_byte(pgc, &count))
return;

9
src/video/vid_incolor.c
View File

@@ -252,6 +252,9 @@ incolor_out(uint16_t port, uint8_t val, void *priv)
else
mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000);
return;
default:
break;
}
}
@@ -354,6 +357,9 @@ incolor_write(uint32_t addr, uint8_t val, void *priv)
else
w = ((~latch) & vmask);
break;
default:
break;
}
/* w is nonzero to write a 1, zero to write a 0 */
@@ -769,6 +775,9 @@ text_line(incolor_t *dev, uint16_t ca)
case 5: /* 48k RAMfont */
draw_char_ram48(dev, x, chr, attr);
break;
default:
break;
}
++dev->ma;

90
src/video/vid_mga.c
View File

@@ -742,6 +742,9 @@ mystique_out(uint16_t addr, uint8_t val, void *priv)
}
}
break;
default:
break;
}
svga_out(addr, val, svga);
@@ -827,7 +830,7 @@ mystique_vsync_callback(svga_t *svga)
static float
mystique_getclock(int clock, void *priv)
{
mystique_t *mystique = (mystique_t *) priv;
const mystique_t *mystique = (mystique_t *) priv;
if (clock == 0)
return 25175000.0;
@@ -925,6 +928,9 @@ mystique_recalctimings(svga_t *svga)
svga->render = svga_render_32bpp_highres;
svga->bpp = 32;
break;
default:
break;
}
} else {
switch (svga->bpp) {
@@ -943,6 +949,9 @@ mystique_recalctimings(svga_t *svga)
case 32:
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
}
svga->line_compare = mystique_line_compare;
@@ -1004,6 +1013,9 @@ mystique_recalc_mapping(mystique_t *mystique)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
if (svga->gdcreg[6] & 0xc) {
/*64k banks*/
@@ -1021,8 +1033,8 @@ mystique_recalc_mapping(mystique_t *mystique)
static void
mystique_update_irqs(mystique_t *mystique)
{
svga_t *svga = &mystique->svga;
int irq = 0;
const svga_t *svga = &mystique->svga;
int irq = 0;
if ((mystique->status & mystique->ien) & STATUS_SOFTRAPEN)
irq = 1;
@@ -2275,7 +2287,9 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *priv)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 2) * 16)));
}
}
// pclog("SRC1 = 0x%08X\n", val);
#if 0
pclog("SRC1 = 0x%08X\n", val);
#endif
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[1], 32);
}
@@ -2288,7 +2302,9 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *priv)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 4) * 16)));
}
}
// pclog("SRC2 = 0x%08X\n", val);
#if 0
pclog("SRC2 = 0x%08X\n", val);
#endif
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[2], 32);
break;
@@ -2301,7 +2317,9 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *priv)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 6) * 16)));
}
}
// pclog("SRC3 = 0x%08X\n", val);
#if 0
pclog("SRC3 = 0x%08X\n", val);
#endif
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[3], 32);
break;
@@ -2549,7 +2567,7 @@ mystique_accel_iload_write_l(UNUSED(uint32_t addr), uint32_t val, void *priv)
static uint8_t
mystique_readb_linear(uint32_t addr, void *priv)
{
svga_t *svga = (svga_t *) priv;
const svga_t *svga = (svga_t *) priv;
cycles -= video_timing_read_b;
@@ -2754,6 +2772,9 @@ run_dma(mystique_t *mystique)
fatal("DMA_STATE_SEC: mode %i\n", mystique->dma.secaddress & DMA_MODE_MASK);
}
break;
default:
break;
}
}
@@ -2786,6 +2807,9 @@ fifo_thread(void *priv)
case FIFO_WRITE_ILOAD_LONG:
mystique_accel_iload_write_l(fifo->addr_type & FIFO_ADDR, fifo->val, mystique);
break;
default:
break;
}
fifo->addr_type = FIFO_INVALID;
@@ -2922,6 +2946,9 @@ bitop(uint32_t src, uint32_t dst, uint32_t dwgctrl)
return dst | src;
case BOP(0xf):
return ~0;
default:
break;
}
return 0;
@@ -3838,10 +3865,10 @@ blit_iload_iload_high(mystique_t *mystique, uint32_t data, int size)
}
static void
blit_iload_iload_highv(mystique_t *mystique, uint32_t data, int size)
blit_iload_iload_highv(mystique_t *mystique, uint32_t data, UNUSED(int size))
{
uint8_t *src0;
uint8_t *src1;
const uint8_t *src0;
uint8_t *src1;
switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) {
case DWGCTRL_BLTMOD_BUYUV:
@@ -3917,7 +3944,7 @@ z_check(uint16_t z, uint16_t old_z, uint32_t z_mode) // mystique->dwgreg.dwgctrl
}
static void
blit_line(mystique_t *mystique, int closed)
blit_line(mystique_t *mystique, UNUSED(int closed))
{
svga_t *svga = &mystique->svga;
uint32_t src;
@@ -4060,7 +4087,9 @@ blit_line(mystique_t *mystique, int closed)
break;
default:
/* pclog("Unknown atype %03x %08x LINE\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */
#if 0
pclog("Unknown atype %03x %08x LINE\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running);
#endif
break;
}
@@ -4406,8 +4435,8 @@ texture_read(mystique_t *mystique, int *tex_r, int *tex_g, int *tex_b, int *atra
const int t_shift = (20 + 16) - (mystique->dwgreg.texheight & TEXHEIGHT_TH_MASK);
int64_t q = mystique->dwgreg.tmr[8] ? (0x100000000LL / (int64_t) (int32_t) mystique->dwgreg.tmr[8] /*>> 16*/) : 0;
s = (((int64_t) (int32_t) mystique->dwgreg.tmr[6] * q) /*<< 8*/) >> s_shift; /*((16+20)-12);*/
t = (((int64_t) (int32_t) mystique->dwgreg.tmr[7] * q) /*<< 8*/) >> t_shift; /*((16+20)-9);*/
s = ((int64_t) (int32_t) mystique->dwgreg.tmr[6] * q /*<< 8*/) >> s_shift; /*((16+20)-12);*/
t = ((int64_t) (int32_t) mystique->dwgreg.tmr[7] * q /*<< 8*/) >> t_shift; /*((16+20)-9);*/
}
if (mystique->dwgreg.texctl & TEXCTL_CLAMPU) {
@@ -4935,7 +4964,9 @@ blit_bitblt(mystique_t *mystique)
break;
default:
/* pclog("Unknown BITBLT atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */
#if 0
pclog("Unknown BITBLT atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running);
#endif
break;
}
@@ -4949,7 +4980,9 @@ blit_iload(mystique_t *mystique)
case DWGCTRL_ATYPE_RPL:
case DWGCTRL_ATYPE_RSTR:
case DWGCTRL_ATYPE_BLK:
/* pclog("ILOAD BLTMOD DWGCTRL = %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); */
#if 0
pclog("ILOAD BLTMOD DWGCTRL = %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK);
#endif
switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) {
case DWGCTRL_BLTMOD_BFCOL:
case DWGCTRL_BLTMOD_BMONOLEF:
@@ -4961,7 +4994,9 @@ blit_iload(mystique_t *mystique)
mystique->dwgreg.iload_rem_data = 0;
mystique->dwgreg.iload_rem_count = 0;
mystique->busy = 1;
/* pclog("ILOAD busy\n"); */
#if 0
pclog("ILOAD busy\n");
#endif
mystique->dwgreg.words = 0;
break;
@@ -5161,9 +5196,9 @@ mystique_start_blit(mystique_t *mystique)
static void
mystique_hwcursor_draw(svga_t *svga, int displine)
{
mystique_t *mystique = (mystique_t *) svga->priv;
uint64_t dat[2];
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
const mystique_t *mystique = (mystique_t *) svga->priv;
uint64_t dat[2];
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
if (svga->interlace && svga->hwcursor_oddeven)
svga->hwcursor_latch.addr += 16;
@@ -5184,6 +5219,9 @@ mystique_hwcursor_draw(svga_t *svga, int displine)
dat[1] <<= 1;
}
break;
default:
break;
}
if (svga->interlace && !svga->hwcursor_oddeven)
@@ -5335,6 +5373,9 @@ mystique_pci_read(UNUSED(int func), int addr, void *priv)
addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | (addr & 3);
ret = mystique_ctrl_read_b(addr, mystique);
break;
default:
break;
}
return ret;
@@ -5449,9 +5490,14 @@ mystique_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0x4a:
case 0x4b:
addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | (addr & 3);
/* pclog("mystique_ctrl_write_b(%04X, %02X)\n", addr, val); */
#if 0
pclog("mystique_ctrl_write_b(%04X, %02X)\n", addr, val);
#endif
mystique_ctrl_write_b(addr, val, mystique);
break;
default:
break;
}
}
@@ -5459,7 +5505,7 @@ static void *
mystique_init(const device_t *info)
{
mystique_t *mystique = malloc(sizeof(mystique_t));
char *romfn = NULL;
const char *romfn = NULL;
memset(mystique, 0, sizeof(mystique_t));

42
src/video/vid_oak_oti.c
View File

@@ -38,11 +38,11 @@
#define BIOS_077_PATH "roms/video/oti/oti077.vbi"
enum {
OTI_037C,
OTI_067 = 2,
OTI_067_AMA932J,
OTI_067_M300 = 4,
OTI_077 = 5
OTI_037C = 0,
OTI_067 = 2,
OTI_067_AMA932J = 3,
OTI_067_M300 = 4,
OTI_077 = 5
};
typedef struct {
@@ -157,8 +157,8 @@ oti_out(uint16_t addr, uint8_t val, void *priv)
svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff;
switch ((val & 0xc0) >> 6) {
case 0x00: /* 256 kB of memory */
default:
case 0x00: /* 256 kB of memory */
enable = (oti->vram_size >= 256);
if (val & 0x0c)
svga->vram_display_mask = MIN(oti->vram_mask, 0x3ffff);
@@ -192,8 +192,14 @@ oti_out(uint16_t addr, uint8_t val, void *priv)
svga->read_bank = (val & 0xf) * 65536;
svga->write_bank = (val >> 4) * 65536;
break;
default:
break;
}
return;
default:
break;
}
svga_out(addr, val, svga);
@@ -291,6 +297,9 @@ oti_in(uint16_t addr, void *priv)
if (svga->attrregs[0x11] & 0x80)
svga->cgastat |= 0x20;
break;
default:
break;
}
temp = svga->cgastat;
break;
@@ -339,7 +348,7 @@ oti_pos_out(UNUSED(uint16_t addr), uint8_t val, void *priv)
static uint8_t
oti_pos_in(UNUSED(uint16_t addr), void *priv)
{
oti_t *oti = (oti_t *) priv;
const oti_t *oti = (oti_t *) priv;
return (oti->pos);
}
@@ -350,8 +359,8 @@ oti_getclock(int clock)
float ret = 0.0;
switch (clock) {
case 0:
default:
case 0:
ret = 25175000.0;
break;
case 1:
@@ -374,8 +383,8 @@ oti_getclock(int clock)
static void
oti_recalctimings(svga_t *svga)
{
oti_t *oti = (oti_t *) svga->priv;
int clk_sel = ((svga->miscout >> 2) & 3) | ((oti->regs[0x0d] & 0x20) >> 3);
const oti_t *oti = (oti_t *) svga->priv;
int clk_sel = ((svga->miscout >> 2) & 3) | ((oti->regs[0x0d] & 0x20) >> 3);
svga->clock = (cpuclock * (double) (1ULL << 32)) / oti_getclock(clk_sel);
@@ -410,8 +419,8 @@ oti_recalctimings(svga_t *svga)
static void *
oti_init(const device_t *info)
{
oti_t *oti = malloc(sizeof(oti_t));
char *romfn = NULL;
oti_t *oti = malloc(sizeof(oti_t));
const char *romfn = NULL;
memset(oti, 0x00, sizeof(oti_t));
oti->chip_id = info->local;
@@ -423,8 +432,10 @@ oti_init(const device_t *info)
romfn = BIOS_037C_PATH;
oti->vram_size = 256;
oti->regs[0] = 0x08; /* FIXME: The BIOS wants to read this at index 0? This index is undocumented. */
/* io_sethandler(0x03c0, 32,
oti_in, NULL, NULL, oti_out, NULL, NULL, oti); */
#if 0
io_sethandler(0x03c0, 32,
oti_in, NULL, NULL, oti_out, NULL, NULL, oti);
#endif
break;
case OTI_067_AMA932J:
@@ -453,6 +464,9 @@ oti_init(const device_t *info)
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
default:
break;
}
if (romfn != NULL) {

34
src/video/vid_ogc.c
View File

@@ -84,9 +84,10 @@ ogc_out(uint16_t addr, uint8_t val, void *priv)
{
ogc_t *ogc = (ogc_t *) priv;
// if (addr >= 0x3c0 && addr <= 0x3cf) {
// addr = addr + 16;
// }
#if 0
if (addr >= 0x3c0 && addr <= 0x3cf)
addr = addr + 16;
#endif
switch (addr) {
case 0x3d4:
@@ -102,6 +103,9 @@ ogc_out(uint16_t addr, uint8_t val, void *priv)
/* select 1st or 2nd 16k vram block to be used */
ogc->base = (val & 0x08) ? 0x4000 : 0;
break;
default:
break;
}
}
@@ -110,9 +114,10 @@ ogc_in(uint16_t addr, void *priv)
{
ogc_t *ogc = (ogc_t *) priv;
// if (addr >= 0x3c0 && addr <= 0x3cf) {
// addr = addr + 16;
// }
#if 0
if (addr >= 0x3c0 && addr <= 0x3cf)
addr = addr + 16;
#endif
uint8_t ret = 0xff;
@@ -133,8 +138,11 @@ ogc_in(uint16_t addr, void *priv)
ret = ret | 0xe0;
if (ogc->mono_display)
ret = ret | 0x10;
break;
}
break;
default:
break;
}
return ret;
@@ -513,7 +521,7 @@ ogc_poll(void *priv)
if (ogc->cga.cgadispon)
ogc->cga.cgastat &= ~1;
if ((ogc->cga.sc == (ogc->cga.crtc[10] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[10] & 31) >> 1))))
if (ogc->cga.sc == (ogc->cga.crtc[10] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[10] & 31) >> 1)))
ogc->cga.con = 1;
}
/* 80-columns */
@@ -575,7 +583,9 @@ ogc_mdaattr_rebuild(void)
void *
ogc_init(UNUSED(const device_t *info))
{
// int display_type;
#if 0
int display_type;
#endif
ogc_t *ogc = (ogc_t *) malloc(sizeof(ogc_t));
memset(ogc, 0x00, sizeof(ogc_t));
@@ -583,8 +593,10 @@ ogc_init(UNUSED(const device_t *info))
loadfont("roms/video/ogc/ogc graphics board go380 258 pqbq.bin", 1);
/* composite is not working yet */
// display_type = device_get_config_int("display_type");
/* FIXME: composite is not working yet */
#if 0
display_type = device_get_config_int("display_type");
#endif
ogc->cga.composite = 0; // (display_type != CGA_RGB);
ogc->cga.revision = device_get_config_int("composite_type");
ogc->cga.snow_enabled = device_get_config_int("snow_enabled");

26
src/video/vid_paradise.c
View File

@@ -119,6 +119,9 @@ paradise_in(uint16_t addr, void *priv)
case 0x0f:
return (svga->gdcreg[0x0f] & 0x17) | 0x80;
default:
break;
}
break;
@@ -130,6 +133,9 @@ paradise_in(uint16_t addr, void *priv)
if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80)
return 0xff;
return svga->crtc[svga->crtcreg];
default:
break;
}
return svga_in(addr, svga);
}
@@ -198,6 +204,9 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
}
svga->gdcreg[6] = val;
@@ -213,6 +222,9 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
svga->gdcreg[0x0b] = val;
paradise_remap(paradise);
return;
default:
break;
}
break;
@@ -254,6 +266,9 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
mem_mapping_enable(&paradise->svga.mapping);
}
break;
default:
break;
}
svga_out(addr, val, svga);
@@ -262,7 +277,8 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
void
paradise_remap(paradise_t *paradise)
{
svga_t *svga = &paradise->svga;
const svga_t *svga = &paradise->svga;
paradise->check = 0;
if (svga->seqregs[0x11] & 0x80) {
@@ -301,7 +317,7 @@ paradise_remap(paradise_t *paradise)
void
paradise_recalctimings(svga_t *svga)
{
paradise_t *paradise = (paradise_t *) svga->priv;
const paradise_t *paradise = (paradise_t *) svga->priv;
svga->lowres = !(svga->gdcreg[0x0e] & 0x01);
@@ -583,6 +599,9 @@ paradise_init(const device_t *info, uint32_t memsize)
svga->decode_mask = memsize - 1;
svga->ramdac = device_add(&sc11487_ramdac_device); /*Actually a Winbond W82c487-80, probably a clone.*/
break;
default:
break;
}
mem_mapping_set_handler(&svga->mapping, paradise_read, paradise_readw, NULL, paradise_write, paradise_writew, NULL);
@@ -607,6 +626,9 @@ paradise_init(const device_t *info, uint32_t memsize)
svga->crtc[0x36] = '3';
svga->crtc[0x37] = '0';
break;
default:
break;
}
svga->bpp = 8;

59
src/video/vid_pgc.c
View File

@@ -682,7 +682,7 @@ pgc_write_pixel(pgc_t *dev, uint16_t x, uint16_t y, uint8_t ink)
uint8_t
pgc_read_pixel(pgc_t *dev, uint16_t x, uint16_t y)
{
uint8_t *vram;
const uint8_t *vram;
/* Suppress out-of-range reads. */
if (x >= dev->maxw || y >= dev->maxh)
@@ -2196,6 +2196,9 @@ pgc_out(uint16_t addr, uint8_t val, void *priv)
case 0x03d9: /* CRTC Color Select register */
dev->mapram[0x03d9] = val;
break;
default:
break;
}
}
@@ -2203,8 +2206,8 @@ pgc_out(uint16_t addr, uint8_t val, void *priv)
uint8_t
pgc_in(uint16_t addr, void *priv)
{
pgc_t *dev = (pgc_t *) priv;
uint8_t ret = 0xff;
const pgc_t *dev = (pgc_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0x03d0: /* CRTC Index register */
@@ -2233,6 +2236,9 @@ pgc_in(uint16_t addr, void *priv)
case 0x03da: /* CRTC Status register */
ret = dev->mapram[0x03da];
break;
default:
break;
}
pgc_log("PGC: in(%04x) = %02x\n", addr, ret);
@@ -2296,6 +2302,9 @@ pgc_write(uint32_t addr, uint8_t val, void *priv)
case 0x3ff: /* reboot the PGC */
pgc_wake(dev);
break;
default:
break;
}
}
}
@@ -2310,8 +2319,8 @@ pgc_write(uint32_t addr, uint8_t val, void *priv)
uint8_t
pgc_read(uint32_t addr, void *priv)
{
pgc_t *dev = (pgc_t *) priv;
uint8_t ret = 0xff;
const pgc_t *dev = (pgc_t *) priv;
uint8_t ret = 0xff;
if (addr >= 0xc6000 && addr < 0xc6800) {
addr &= 0x7ff;
@@ -2328,17 +2337,17 @@ pgc_read(uint32_t addr, void *priv)
void
pgc_cga_text(pgc_t *dev, int w)
{
uint8_t chr;
uint8_t attr;
int drawcursor = 0;
uint32_t cols[2];
int pitch = (dev->mapram[0x3e9] + 1) * 2;
uint16_t sc = (dev->displine & 0x0f) % pitch;
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
uint16_t ca = (dev->mapram[0x3ef] | (dev->mapram[0x3ee] << 8)) & 0x3fff;
uint8_t *addr;
uint32_t val;
int cw = (w == 80) ? 8 : 16;
uint8_t chr;
uint8_t attr;
int drawcursor = 0;
uint32_t cols[2];
int pitch = (dev->mapram[0x3e9] + 1) * 2;
uint16_t sc = (dev->displine & 0x0f) % pitch;
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
uint16_t ca = (dev->mapram[0x3ef] | (dev->mapram[0x3ee] << 8)) & 0x3fff;
const uint8_t *addr;
uint32_t val;
int cw = (w == 80) ? 8 : 16;
addr = &dev->cga_vram[((ma + ((dev->displine / pitch) * w)) * 2) & 0x3ffe];
ma += (dev->displine / pitch) * w;
@@ -2384,11 +2393,11 @@ pgc_cga_text(pgc_t *dev, int w)
void
pgc_cga_gfx40(pgc_t *dev)
{
uint32_t cols[4];
int col;
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
uint8_t *addr;
uint16_t dat;
uint32_t cols[4];
int col;
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
const uint8_t *addr;
uint16_t dat;
cols[0] = (dev->mapram[0x3d9] & 15) + 16;
col = ((dev->mapram[0x3d9] & 16) ? 8 : 0) + 16;
@@ -2427,10 +2436,10 @@ pgc_cga_gfx40(pgc_t *dev)
void
pgc_cga_gfx80(pgc_t *dev)
{
uint32_t cols[2];
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
uint8_t *addr;
uint16_t dat;
uint32_t cols[2];
uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff;
const uint8_t *addr;
uint16_t dat;
cols[0] = 16;
cols[1] = (dev->mapram[0x3d9] & 15) + 16;

26
src/video/vid_rtg310x.c
View File

@@ -106,6 +106,9 @@ rtg_in(uint16_t addr, void *priv)
case 0x3d7:
return dev->bank3d7;
default:
break;
}
return svga_in(addr, svga);
@@ -140,6 +143,9 @@ rtg_out(uint16_t addr, uint8_t val, void *priv)
case 0x0f:
rtg_recalcbanking(dev);
return;
default:
break;
}
}
break;
@@ -163,6 +169,9 @@ rtg_out(uint16_t addr, uint8_t val, void *priv)
svga->fullchange = changeframecount;
svga_recalctimings(svga);
break;
default:
break;
}
}
@@ -188,6 +197,9 @@ rtg_out(uint16_t addr, uint8_t val, void *priv)
dev->bank3d7 = val;
rtg_recalcbanking(dev);
return;
default:
break;
}
svga_out(addr, val, svga);
@@ -226,6 +238,9 @@ rtg_recalctimings(svga_t *svga)
case 7:
svga->clock = (cpuclock * (double) (1ULL << 32)) / 75000000.0;
break;
default:
break;
}
switch (svga->gdcreg[0x0c] & 3) {
@@ -238,6 +253,9 @@ rtg_recalctimings(svga_t *svga)
case 3:
svga->clock /= 4;
break;
default:
break;
}
if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) {
@@ -281,6 +299,9 @@ rtg_recalctimings(svga_t *svga)
svga->render = svga_render_8bpp_highres;
}
break;
default:
break;
}
}
}
@@ -307,6 +328,9 @@ rtg_init(const device_t *info)
io_sethandler(0x03c0, 32,
rtg_in, NULL, NULL, rtg_out, NULL, NULL, dev);
break;
default:
break;
}
dev->svga.bpp = 8;
@@ -314,7 +338,7 @@ rtg_init(const device_t *info)
dev->vram_mask = dev->vram_size - 1;
rom_init(&dev->bios_rom, (char *) fn,
rom_init(&dev->bios_rom, fn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
return dev;

350
src/video/vid_s3.c
View File

@@ -551,7 +551,7 @@ s3_cpu_dest(s3_t *s3)
static int
s3_enable_fifo(s3_t *s3)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || (s3->chip == S3_TRIO64V) || (s3->chip == S3_TRIO64V2) || (s3->chip == S3_VISION864) || (s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_VISION868))
return 1; /* FIFO always enabled on these chips. */
@@ -562,7 +562,7 @@ s3_enable_fifo(s3_t *s3)
static void
s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
if (s3->accel.cmd & 0x100) {
switch (s3->accel.cmd & 0x600) {
@@ -628,6 +628,9 @@ s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val)
}
}
break;
default:
break;
}
}
}
@@ -694,6 +697,9 @@ s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val)
}
}
break;
default:
break;
}
}
}
@@ -701,7 +707,7 @@ s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val)
static void
s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
switch (port) {
case 0x8148:
@@ -1241,6 +1247,9 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
}
break;
default:
break;
}
}
break;
@@ -1312,7 +1321,11 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
}
}
break;
default:
break;
}
}
break;
case 0xe14a:
@@ -1387,9 +1400,15 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
}
}
break;
default:
break;
}
}
break;
default:
break;
}
}
@@ -1442,7 +1461,7 @@ s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val)
static void
s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
if (s3->packed_mmio) {
int addr_lo = addr & 1;
@@ -1593,6 +1612,9 @@ s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val)
case 0x816e:
WRITE8(addr, s3->accel.pat_fg_color, val);
return;
default:
break;
}
addr |= addr_lo;
}
@@ -1718,15 +1740,15 @@ mmio_byte_write:
static void
s3_accel_write_fifo_w(s3_t *s3, uint32_t addr, uint16_t val)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
if (svga->crtc[0x53] & 0x08) {
if ((addr & 0x1fffe) < 0x8000) {
s3_accel_out_pixtrans_w(s3, val);
} else {
switch (addr & 0x1fffe) {
case 0x83d4:
default:
case 0x83d4:
s3_accel_write_fifo(s3, addr, val);
s3_accel_write_fifo(s3, addr + 1, val >> 8);
break;
@@ -2005,16 +2027,16 @@ s3_hwcursor_convert_addr(svga_t *svga)
static void
s3_hwcursor_draw(svga_t *svga, int displine)
{
s3_t *s3 = (s3_t *) svga->priv;
int shift = 1;
int width = 16;
uint16_t dat[2];
int xx;
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
uint32_t fg;
uint32_t bg;
uint32_t real_addr;
uint32_t remapped_addr;
const s3_t *s3 = (s3_t *) svga->priv;
int shift = 1;
int width = 16;
uint16_t dat[2];
int xx;
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
uint32_t fg;
uint32_t bg;
uint32_t real_addr;
uint32_t remapped_addr;
switch (svga->bpp) {
case 15:
@@ -2334,17 +2356,17 @@ s3_hwcursor_draw(svga_t *svga, int displine)
static void
s3_trio64v_overlay_draw(svga_t *svga, int displine)
{
s3_t *s3 = (s3_t *) svga->priv;
int offset = (s3->streams.sec_x - s3->streams.pri_x) + 1;
int h_acc = s3->streams.dda_horiz_accumulator;
int r[8];
int g[8];
int b[8];
int x_size;
int x_read = 4;
int x_write = 4;
uint32_t *p;
uint8_t *src = &svga->vram[svga->overlay_latch.addr];
const s3_t *s3 = (s3_t *) svga->priv;
int offset = (s3->streams.sec_x - s3->streams.pri_x) + 1;
int h_acc = s3->streams.dda_horiz_accumulator;
int r[8];
int g[8];
int b[8];
int x_size;
int x_read = 4;
int x_write = 4;
uint32_t *p;
uint8_t *src = &svga->vram[svga->overlay_latch.addr];
p = &(buffer32->line[displine][offset + svga->x_add]);
@@ -2451,7 +2473,7 @@ s3_io_remove(s3_t *s3)
static void
s3_io_set_alt(s3_t *s3)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
if (!s3->translate)
return;
@@ -2506,7 +2528,7 @@ s3_io_set_alt(s3_t *s3)
static void
s3_io_set(s3_t *s3)
{
svga_t *svga = &s3->svga;
const svga_t *svga = &s3->svga;
s3_io_remove(s3);
@@ -2594,6 +2616,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
case 0x13:
svga_recalctimings(svga);
return;
default:
break;
}
}
if (svga->seqaddr == 4) /*Chain-4 - update banking*/
@@ -2716,6 +2741,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
case 0xc0:
s3->width = 1280;
break;
default:
break;
}
s3->bpp = (svga->crtc[0x50] >> 4) & 3;
break;
@@ -2813,6 +2841,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
case 2:
s3->hwc_fg_col = (s3->hwc_fg_col & 0x00ffff) | (val << 16);
break;
default:
break;
}
s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3;
break;
@@ -2827,6 +2858,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
case 2:
s3->hwc_bg_col = (s3->hwc_bg_col & 0x00ffff) | (val << 16);
break;
default:
break;
}
s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3;
break;
@@ -2891,6 +2925,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
}
}
break;
default:
break;
}
if (old != val) {
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
@@ -2906,6 +2943,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
}
}
break;
default:
break;
}
svga_out(addr, val, svga);
}
@@ -2956,7 +2996,7 @@ s3_in(uint16_t addr, void *priv)
return bt48x_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
} else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771)))
return ibm_rgb528_ramdac_in(addr, rs2, svga->ramdac, svga);
else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) {
else if (s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968)) {
rs3 = !!(svga->crtc[0x55] & 0x02);
return tvp3026_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
} else if (((s3->chip == S3_86C801) || (s3->chip == S3_86C805)) && (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805))
@@ -2969,7 +3009,6 @@ s3_in(uint16_t addr, void *priv)
return sc1502x_ramdac_in(addr, svga->ramdac, svga);
else
return sdac_ramdac_in(addr, rs2, svga->ramdac, svga);
break;
case 0x3d4:
return svga->crtcreg;
@@ -3028,8 +3067,14 @@ s3_in(uint16_t addr, void *priv)
return (svga->crtc[0x5a] & 0x80);
} else
return svga->crtc[0x6c];
default:
break;
}
return svga->crtc[svga->crtcreg];
default:
break;
}
return svga_in(addr, svga);
}
@@ -3102,6 +3147,9 @@ s3_recalctimings(svga_t *svga)
case 7:
svga->clock /= 2;
break;
default:
break;
}
svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10));
@@ -3202,12 +3250,15 @@ s3_recalctimings(svga_t *svga)
if (svga->vtotal == 1066)
svga->hdisp = 1280;
break;
default:
break;
}
}
}
}
if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL8S_805) {
if (svga->rowoffset == 256 && (((svga->crtc[0x51] & 0x30) == 0x00 && !(svga->crtc[0x43] & 0x04))))
if (svga->rowoffset == 256 && ((svga->crtc[0x51] & 0x30) == 0x00 && !(svga->crtc[0x43] & 0x04)))
svga->rowoffset >>= 1;
}
}
@@ -3279,6 +3330,9 @@ s3_recalctimings(svga_t *svga)
case 480:
svga->hdisp = 640;
break;
default:
break;
}
}
} else {
@@ -3321,11 +3375,17 @@ s3_recalctimings(svga_t *svga)
s3->width = 800;
svga->hdisp = 800;
break;
default:
break;
}
}
}
}
break;
default:
break;
}
} else {
if (!svga->scrblank && svga->attr_palette_enable) {
@@ -3348,8 +3408,8 @@ s3_recalctimings(svga_t *svga)
static void
s3_trio64v_recalctimings(svga_t *svga)
{
s3_t *s3 = (s3_t *) svga->priv;
int clk_sel = (svga->miscout >> 2) & 3;
const s3_t *s3 = (s3_t *) svga->priv;
int clk_sel = (svga->miscout >> 2) & 3;
if (!svga->scrblank && svga->attr_palette_enable) {
if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) {
@@ -3410,6 +3470,9 @@ s3_trio64v_recalctimings(svga_t *svga)
case 32:
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
}
} else /*Streams mode*/
@@ -3454,6 +3517,9 @@ s3_trio64v_recalctimings(svga_t *svga)
case 7: /*XRGB-32 (X.8.8.8)*/
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
}
}
@@ -3478,8 +3544,7 @@ s3_updatemapping(s3_t *s3)
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
} else
switch (svga->gdcreg[6] & 0xc) /*VGA mapping*/
{
switch (svga->gdcreg[6] & 0xc) { /*VGA mapping*/
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
@@ -3496,6 +3561,9 @@ s3_updatemapping(s3_t *s3)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
if (s3->chip >= S3_86C928) {
@@ -3536,6 +3604,9 @@ s3_updatemapping(s3_t *s3)
break;
}
break;
default:
break;
}
s3->linear_base &= ~(s3->linear_size - 1);
if (s3->linear_base == 0xa0000) {
@@ -3584,12 +3655,13 @@ s3_updatemapping(s3_t *s3)
static float
s3_trio64_getclock(int clock, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
float t;
int m;
int n1;
int n2;
const s3_t *s3 = (s3_t *) priv;
const svga_t *svga = &s3->svga;
float t;
int m;
int n1;
int n2;
if (clock == 0)
return 25175000.0;
if (clock == 1)
@@ -3645,6 +3717,9 @@ s3_accel_out(uint16_t port, uint8_t val, void *priv)
if (s3->chip > S3_86C924)
s3_updatemapping(s3);
break;
default:
break;
}
}
}
@@ -4019,6 +4094,9 @@ s3_accel_in(uint16_t port, void *priv)
return s3->accel.setup_md & 0xff;
case 0xa:
return s3->accel.multifunc[0xd] & 0xff;
default:
break;
}
return 0xff;
}
@@ -4053,6 +4131,9 @@ s3_accel_in(uint16_t port, void *priv)
return (s3->accel.setup_md >> 8) & ~0xf000;
case 0xa:
return s3->accel.multifunc[0xd] >> 8;
default:
break;
}
return 0xff;
}
@@ -4168,6 +4249,9 @@ s3_accel_in(uint16_t port, void *priv)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
}
break;
default:
break;
}
}
return s3->accel.pix_trans[0];
@@ -4208,6 +4292,9 @@ s3_accel_in(uint16_t port, void *priv)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3);
}
break;
default:
break;
}
}
return s3->accel.pix_trans[1];
@@ -4244,6 +4331,9 @@ s3_accel_in(uint16_t port, void *priv)
} else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3);
break;
default:
break;
}
}
return s3->accel.pix_trans[3];
@@ -4256,6 +4346,9 @@ s3_accel_in(uint16_t port, void *priv)
if ((s3->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(s3->i2c))
temp |= SERIAL_PORT_SDR;
return temp;
default:
break;
}
return 0xff;
@@ -4264,10 +4357,10 @@ s3_accel_in(uint16_t port, void *priv)
static uint16_t
s3_accel_in_w(uint16_t port, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint16_t temp = 0x0000;
uint16_t *vram_w = (uint16_t *) svga->vram;
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint16_t temp = 0x0000;
const uint16_t *vram_w = (uint16_t *) svga->vram;
if (!s3->enable_8514)
return 0xffff;
@@ -4306,6 +4399,9 @@ s3_accel_in_w(uint16_t port, void *priv)
s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3);
}
break;
default:
break;
}
}
} else {
@@ -4320,10 +4416,10 @@ s3_accel_in_w(uint16_t port, void *priv)
static uint32_t
s3_accel_in_l(UNUSED(uint16_t port), void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint32_t temp = 0x00000000;
uint16_t *vram_w = (uint16_t *) svga->vram;
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint32_t temp = 0x00000000;
const uint16_t *vram_w = (uint16_t *) svga->vram;
if (!s3->enable_8514)
return 0xffffffff;
@@ -4364,6 +4460,9 @@ s3_accel_in_l(UNUSED(uint16_t port), void *priv)
s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3);
}
break;
default:
break;
}
}
@@ -4373,8 +4472,8 @@ s3_accel_in_l(UNUSED(uint16_t port), void *priv)
static void
s3_accel_write(uint32_t addr, uint8_t val, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
s3_t *s3 = (s3_t *) priv;
const svga_t *svga = &s3->svga;
if (!s3->enable_8514)
return;
@@ -4391,8 +4490,8 @@ s3_accel_write(uint32_t addr, uint8_t val, void *priv)
static void
s3_accel_write_w(uint32_t addr, uint16_t val, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
s3_t *s3 = (s3_t *) priv;
const svga_t *svga = &s3->svga;
if (!s3->enable_8514)
return;
@@ -4409,8 +4508,8 @@ s3_accel_write_w(uint32_t addr, uint16_t val, void *priv)
static void
s3_accel_write_l(uint32_t addr, uint32_t val, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
s3_t *s3 = (s3_t *) priv;
const svga_t *svga = &s3->svga;
if (!s3->enable_8514)
return;
@@ -4520,6 +4619,9 @@ s3_accel_read(uint32_t addr, void *priv)
} else
s3_accel_start(2, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3);
break;
default:
break;
}
}
}
@@ -4530,10 +4632,10 @@ s3_accel_read(uint32_t addr, void *priv)
static uint16_t
s3_accel_read_w(uint32_t addr, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint16_t temp = 0x0000;
uint16_t *vram_w = (uint16_t *) svga->vram;
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint16_t temp = 0x0000;
const uint16_t *vram_w = (uint16_t *) svga->vram;
if (!s3->enable_8514)
return 0xffff;
@@ -4581,6 +4683,9 @@ s3_accel_read_w(uint32_t addr, void *priv)
} else
s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3);
break;
default:
break;
}
}
}
@@ -4591,10 +4696,10 @@ s3_accel_read_w(uint32_t addr, void *priv)
static uint32_t
s3_accel_read_l(uint32_t addr, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint32_t temp = 0x00000000;
uint16_t *vram_w = (uint16_t *) svga->vram;
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
uint32_t temp = 0x00000000;
const uint16_t *vram_w = (uint16_t *) svga->vram;
if (!s3->enable_8514)
return 0xffffffff;
@@ -4762,6 +4867,9 @@ s3_accel_read_l(uint32_t addr, void *priv)
s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3);
}
break;
default:
break;
}
}
}
@@ -5756,6 +5864,9 @@ convert_to_rgb32(int idf, int is_yuv, uint32_t val, uint8_t *r, uint8_t *g, uint
dg = (dg / 31.0) * 255.0;
db = (db / 31.0) * 255.0;
break;
default:
break;
}
*r = (uint8_t) round(dr);
@@ -5848,6 +5959,9 @@ convert_from_rgb32(int idf, int odf, int is_yuv, uint32_t *val, uint8_t r, uint8
db = (db / 255.0) * 31.0;
*val = (((uint32_t) round(dr)) << 10) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db));
break;
default:
break;
}
}
@@ -6163,6 +6277,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 0x600:
mix_mask = (s3->chip == S3_TRIO32 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) ? 0x80 : 0x80000000;
break;
default:
break;
}
/*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled.
@@ -6193,6 +6310,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
src_dat = 0;
break;
default:
break;
}
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
@@ -6200,8 +6320,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
if (s3->accel.ssv_draw)
{
if (s3->accel.ssv_draw) {
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
}
}
@@ -6246,6 +6365,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
s3->accel.cx++;
s3->accel.cy++;
break;
default:
break;
}
s3->accel.ssv_len--;
@@ -6292,6 +6414,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
src_dat = 0;
break;
default:
break;
}
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
@@ -6299,7 +6424,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
}
}
@@ -6343,6 +6468,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
s3->accel.cx++;
s3->accel.cy++;
break;
default:
break;
}
s3->accel.sy--;
}
@@ -6375,6 +6503,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
src_dat = 0;
break;
default:
break;
}
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
@@ -6382,7 +6513,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
}
}
@@ -6434,6 +6565,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 0xe0:
s3->accel.cx++;
break;
default:
break;
}
} else {
s3->accel.err_term += s3->accel.desty_axstp;
@@ -6465,6 +6599,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 0xe0:
s3->accel.cy++;
break;
default:
break;
}
s3->accel.sy--;
}
@@ -6541,6 +6678,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
src_dat = 0;
break;
default:
break;
}
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
@@ -6548,8 +6688,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE(s3->accel.dest + s3->accel.cx, dest_dat);
}
}
@@ -6648,6 +6787,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
src_dat = 0; /*Not supported?*/
break;
default:
break;
}
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
@@ -6655,8 +6797,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat);
}
}
@@ -6782,16 +6923,18 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
if (vram_mask && (s3->accel.cmd & 0x10))
src_dat = ((src_dat & rd_mask) == rd_mask);
break;
default:
break;
}
if ((((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2))) {
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
READ(s3->accel.dest + s3->accel.dx, dest_dat);
MIX
if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10))
{
if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10)) {
WRITE(s3->accel.dest + s3->accel.dx, dest_dat);
}
}
@@ -6909,15 +7052,17 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
if (vram_mask)
src_dat = ((src_dat & rd_mask) == rd_mask);
break;
default:
break;
}
if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) {
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
READ(s3->accel.dest + s3->accel.dx, dest_dat);
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE(s3->accel.dest + s3->accel.dx, dest_dat);
}
}
@@ -7008,8 +7153,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
}
}
@@ -7035,13 +7179,12 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) {
src_dat = s3->accel.frgd_color;
if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) {
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat);
}
}
@@ -7116,15 +7259,17 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
if (vram_mask)
src_dat = ((src_dat & rd_mask) == rd_mask);
break;
default:
break;
}
if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) {
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
READ(s3->accel.dest + s3->accel.poly_x, dest_dat);
MIX
if (s3->accel.cmd & 0x10)
{
if (s3->accel.cmd & 0x10) {
WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat);
}
}
@@ -7217,6 +7362,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
READ(s3->accel.src + s3->accel.cx, src_dat);
break;
default:
break;
}
if (s3->accel.ropmix & 0x100) {
@@ -7233,6 +7381,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
READ(s3->accel.pattern + s3->accel.px, pat_dat);
break;
default:
break;
}
} else {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
@@ -7248,10 +7399,13 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
case 3:
READ(s3->accel.pattern + s3->accel.px, pat_dat);
break;
default:
break;
}
}
if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) {
if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) {
READ(s3->accel.dest + s3->accel.dx, dest_dat);
ROPMIX
@@ -7315,14 +7469,17 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
}
}
break;
default:
break;
}
}
static uint8_t
s3_pci_read(UNUSED(int func), int addr, void *priv)
{
s3_t *s3 = (s3_t *) priv;
svga_t *svga = &s3->svga;
const s3_t *s3 = (s3_t *) priv;
const svga_t *svga = &s3->svga;
switch (addr) {
case 0x00:
@@ -7396,9 +7553,11 @@ s3_pci_read(UNUSED(int func), int addr, void *priv)
case 0x3e:
return (s3->chip == S3_TRIO64V2) ? 0x04 : 0x00;
break;
case 0x3f:
return (s3->chip == S3_TRIO64V2) ? 0xff : 0x00;
default:
break;
}
return 0;
}
@@ -7481,6 +7640,9 @@ s3_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0x3c:
s3->int_line = val;
return;
default:
break;
}
}
@@ -7519,6 +7681,9 @@ fifo_thread(void *param)
case FIFO_OUT_DWORD:
s3_accel_out_fifo_l(s3, fifo->addr_type & FIFO_ADDR, fifo->val);
break;
default:
break;
}
s3->fifo_read_idx++;
@@ -7678,6 +7843,9 @@ s3_reset(void *priv)
s3->pci_regs[0x3e] = 4;
s3->pci_regs[0x3f] = 0xff;
break;
default:
break;
}
if (s3->has_bios) {
@@ -7948,7 +8116,7 @@ s3_init(const device_t *info)
s3->has_bios = (bios_fn != NULL);
if (s3->has_bios) {
rom_init(&s3->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&s3->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&s3->bios_rom.mapping);
}

169
src/video/vid_s3_virge.c
View File

@@ -575,6 +575,9 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
case 2:
virge->hwc_fg_col = (virge->hwc_fg_col & 0x00ffff) | (val << 16);
break;
default:
break;
}
virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3;
break;
@@ -589,6 +592,9 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
case 2:
virge->hwc_bg_col = (virge->hwc_bg_col & 0x00ffff) | (val << 16);
break;
default:
break;
}
virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3;
break;
@@ -635,6 +641,9 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
case 0xaa:
i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW));
break;
default:
break;
}
if (old != val) {
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
@@ -650,6 +659,9 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
}
}
break;
default:
break;
}
svga_out(addr, val, svga);
}
@@ -762,7 +774,7 @@ s3_virge_in(uint16_t addr, void *priv)
static void
s3_virge_recalctimings(svga_t *svga)
{
virge_t *virge = (virge_t *) svga->priv;
const virge_t *virge = (virge_t *) svga->priv;
svga->hdisp = svga->hdisp_old;
@@ -839,6 +851,9 @@ s3_virge_recalctimings(svga_t *svga)
case 32:
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
}
svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && (svga->crtc[0x32] & 0x40)) ? 0x3ffff : virge->vram_mask;
@@ -885,6 +900,9 @@ s3_virge_recalctimings(svga_t *svga)
case 7: /*XRGB-32 (X.8.8.8)*/
svga->render = svga_render_32bpp_highres;
break;
default:
break;
}
svga->vram_display_mask = virge->vram_mask;
}
@@ -922,6 +940,9 @@ s3_virge_updatemapping(virge_t *virge)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
virge->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24);
@@ -947,6 +968,9 @@ s3_virge_updatemapping(virge_t *virge)
case 7:
virge->linear_size = 0x800000;
break;
default:
break;
}
virge->linear_base &= ~(virge->linear_size - 1);
s3_virge_log("Linear framebuffer at %08X size %08X, mask = %08x, CRTC58 sel = %02x\n", virge->linear_base, virge->linear_size, virge->vram_mask, svga->crtc[0x58] & 7);
@@ -1006,6 +1030,9 @@ s3_virge_mmio_fifo_write(uint32_t addr, uint8_t val, virge_t *virge)
case 0x859c:
virge->cmd_dma = val;
break;
default:
break;
}
}
}
@@ -1467,6 +1494,9 @@ s3_virge_mmio_fifo_write_l(uint32_t addr, uint32_t val, virge_t *virge)
queue_triangle(virge);
}
break;
default:
break;
}
}
}
@@ -1561,6 +1591,9 @@ s3_virge_mmio_read(uint32_t addr, void *priv)
if ((virge->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(virge->i2c))
ret |= SERIAL_PORT_SDR;
return ret;
default:
break;
}
return 0xff;
}
@@ -1819,6 +1852,9 @@ s3_virge_mmio_write(uint32_t addr, uint8_t val, void *priv)
case 0x83df:
s3_virge_out(addr & 0x3ff, val, virge);
break;
default:
break;
}
}
}
@@ -1981,6 +2017,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
virge->advfunc_cntl = val & 0xff;
s3_virge_updatemapping(virge);
break;
default:
break;
}
}
}
@@ -2047,25 +2086,25 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
static void
s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat)
{
svga_t *svga = &virge->svga;
uint8_t *vram = virge->svga.vram;
uint32_t mono_pattern[64];
int count_mask;
int x_inc = (virge->s3d.cmd_set & CMD_SET_XP) ? 1 : -1;
int y_inc = (virge->s3d.cmd_set & CMD_SET_YP) ? 1 : -1;
int bpp;
int x_mul;
int cpu_dat_shift;
uint32_t *pattern_data;
uint32_t src_fg_clr;
uint32_t src_bg_clr;
uint32_t src_addr;
uint32_t dest_addr;
uint32_t source = 0;
uint32_t dest = 0;
uint32_t pattern;
uint32_t out = 0;
int update;
svga_t *svga = &virge->svga;
uint8_t *vram = virge->svga.vram;
uint32_t mono_pattern[64];
int count_mask;
int x_inc = (virge->s3d.cmd_set & CMD_SET_XP) ? 1 : -1;
int y_inc = (virge->s3d.cmd_set & CMD_SET_YP) ? 1 : -1;
int bpp;
int x_mul;
int cpu_dat_shift;
const uint32_t *pattern_data;
uint32_t src_fg_clr;
uint32_t src_bg_clr;
uint32_t src_addr;
uint32_t dest_addr;
uint32_t source = 0;
uint32_t dest = 0;
uint32_t pattern;
uint32_t out = 0;
int update;
switch (virge->s3d.cmd_set & CMD_SET_FORMAT_MASK) {
case CMD_SET_FORMAT_8:
@@ -2197,6 +2236,9 @@ s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat)
cpu_dat <<= 1;
count--;
break;
default:
break;
}
CLIP(virge->s3d.dest_x, virge->s3d.dest_y);
@@ -2233,6 +2275,9 @@ s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat)
cpu_dat <<= (count - (count & count_mask));
count &= count_mask;
break;
default:
break;
}
if (!virge->s3d.h) {
return;
@@ -2405,6 +2450,9 @@ skip_line:
case CMD_SET_COMMAND_NOP:
break;
default:
break;
}
}
@@ -3036,7 +3084,10 @@ dest_pixel_lit_texture_reflection(s3d_state_t *state)
static void
dest_pixel_lit_texture_modulate(s3d_state_t *state)
{
int r = state->r >> 7, g = state->g >> 7, b = state->b >> 7, a = state->a >> 7;
int r = state->r >> 7;
int g = state->g >> 7;
int b = state->b >> 7;
int a = state->a >> 7;
tex_sample(state);
@@ -3054,7 +3105,7 @@ static void
tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int32_t dx2)
{
svga_t *svga = &virge->svga;
uint8_t *vram = (uint8_t *) svga->vram;
uint8_t *vram = svga->vram;
int x_dir = s3d_tri->tlr ? 1 : -1;
@@ -3248,6 +3299,9 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int
case 7:
src_z = (z >> 16);
break;
default:
break;
}
}
@@ -3266,7 +3320,7 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int
if (s3d_tri->cmd_set & CMD_SET_ABC_ENABLE) {
switch (bpp) {
case 0: /*8 bpp*/
/*Not implemented yet*/
/*TODO: Not implemented yet*/
break;
case 1: /*16 bpp*/
src_col = *(uint16_t *) &vram[dest_addr & virge->vram_mask];
@@ -3276,6 +3330,9 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int
src_col = (*(uint32_t *) &vram[dest_addr & virge->vram_mask]) & 0xffffff;
RGB24_TO_24(src_col, src_r, src_g, src_b);
break;
default:
break;
}
state->dest_rgba.r = ((state->dest_rgba.r * state->dest_rgba.a) + (src_r * (255 - state->dest_rgba.a))) / 255;
@@ -3285,7 +3342,7 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int
switch (bpp) {
case 0: /*8 bpp*/
/*Not implemented yet*/
/*TODO: Not implemented yet*/
break;
case 1: /*16 bpp*/
RGB15(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b, dest_col);
@@ -3299,6 +3356,9 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int
*(uint8_t *) &vram[(dest_addr + 2) & virge->vram_mask] = (dest_col >> 16) & 0xff;
svga->changedvram[(dest_addr & virge->vram_mask) >> 12] = changeframecount;
break;
default:
break;
}
}
@@ -3465,6 +3525,9 @@ s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri)
else
tex_sample = virge->bilinear_enabled ? tex_sample_persp_normal_filter : tex_sample_persp_normal;
break;
default:
break;
}
switch ((s3d_tri->cmd_set >> 5) & 7) {
@@ -3498,13 +3561,13 @@ s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri)
static void
s3_virge_hwcursor_draw(svga_t *svga, int displine)
{
virge_t *virge = (virge_t *) svga->priv;
uint16_t dat[2];
int xx;
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
uint32_t fg;
uint32_t bg;
uint32_t vram_mask = virge->vram_mask;
const virge_t *virge = (virge_t *) svga->priv;
uint16_t dat[2];
int xx;
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
uint32_t fg;
uint32_t bg;
uint32_t vram_mask = virge->vram_mask;
if (svga->interlace && svga->hwcursor_oddeven)
svga->hwcursor_latch.addr += 16;
@@ -3795,17 +3858,17 @@ s3_virge_hwcursor_draw(svga_t *svga, int displine)
static void
s3_virge_overlay_draw(svga_t *svga, int displine)
{
virge_t *virge = (virge_t *) svga->priv;
int offset = (virge->streams.sec_x - virge->streams.pri_x) + 1;
int h_acc = virge->streams.dda_horiz_accumulator;
int r[8];
int g[8];
int b[8];
int x_size;
int x_read = 4;
int x_write = 4;
uint32_t *p;
uint8_t *src = &svga->vram[svga->overlay_latch.addr];
const virge_t *virge = (virge_t *) svga->priv;
int offset = (virge->streams.sec_x - virge->streams.pri_x) + 1;
int h_acc = virge->streams.dda_horiz_accumulator;
int r[8];
int g[8];
int b[8];
int x_size;
int x_read = 4;
int x_write = 4;
uint32_t *p;
uint8_t *src = &svga->vram[svga->overlay_latch.addr];
p = &(buffer32->line[displine][offset + svga->x_add]);
@@ -3839,9 +3902,9 @@ s3_virge_overlay_draw(svga_t *svga, int displine)
static uint8_t
s3_virge_pci_read(UNUSED(int func), int addr, void *priv)
{
virge_t *virge = (virge_t *) priv;
svga_t *svga = &virge->svga;
uint8_t ret = 0;
const virge_t *virge = (virge_t *) priv;
const svga_t *svga = &virge->svga;
uint8_t ret = 0;
switch (addr) {
case 0x00:
@@ -3994,6 +4057,9 @@ s3_virge_pci_read(UNUSED(int func), int addr, void *priv)
case 0xe3:
ret = virge->pci_regs[0xe3];
break;
default:
break;
}
return ret;
}
@@ -4077,6 +4143,9 @@ s3_virge_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0xe2:
virge->pci_regs[0xe2] = val & 0xc0;
return;
default:
break;
}
}
@@ -4162,6 +4231,9 @@ s3_virge_reset(void *priv)
else
virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5);
break;
default:
break;
}
if (virge->local == S3_VIRGE_GX)
virge->svga.crtc[0x36] |= (1 << 2);
@@ -4238,9 +4310,9 @@ s3_virge_init(const device_t *info)
if (bios_fn != NULL) {
if (info->local == S3_VIRGE_GX2)
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&virge->bios_rom, bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
else
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&virge->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
}
mem_mapping_disable(&virge->bios_rom.mapping);
@@ -4388,6 +4460,9 @@ s3_virge_init(const device_t *info)
else
virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5);
break;
default:
break;
}
if (info->local == S3_VIRGE_GX)
virge->svga.crtc[0x36] |= (1 << 2);

4
src/video/vid_sc1502x_ramdac.c
View File

@@ -116,9 +116,9 @@ sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
}
uint8_t
sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga)
sc1502x_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
{
sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) p;
sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) priv;
uint8_t temp = svga_in(addr, svga);
switch (addr) {

54
src/video/vid_sigma.c
View File

@@ -29,6 +29,7 @@
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/video.h>
#include <86box/plat_unused.h>
#define ROM_SIGMA_FONT "roms/video/sigma/sigma400_font.rom"
#define ROM_SIGMA_BIOS "roms/video/sigma/sigma400_bios.rom"
@@ -256,6 +257,9 @@ sigma_out(uint16_t addr, uint8_t val, void *priv)
else
sigma->plane = val & 3;
return;
default:
break;
}
}
@@ -326,6 +330,9 @@ sigma_in(uint16_t addr, void *priv)
result = sigma->fake_stat;
}
break;
default:
break;
}
return result;
@@ -343,9 +350,10 @@ sigma_write(uint32_t addr, uint8_t val, void *priv)
static uint8_t
sigma_read(uint32_t addr, void *priv)
{
sigma_t *sigma = (sigma_t *) priv;
const sigma_t *sigma = (sigma_t *) priv;
cycles -= 4;
return sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)];
}
@@ -364,8 +372,8 @@ sigma_bwrite(uint32_t addr, uint8_t val, void *priv)
static uint8_t
sigma_bread(uint32_t addr, void *priv)
{
sigma_t *sigma = (sigma_t *) priv;
uint8_t result;
const sigma_t *sigma = (sigma_t *) priv;
uint8_t result;
addr &= 0x3FFF;
if (addr >= 0x2000)
@@ -404,13 +412,13 @@ sigma_recalctimings(sigma_t *sigma)
static void
sigma_text80(sigma_t *sigma)
{
uint8_t chr;
uint8_t attr;
uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8));
uint16_t ma = ((sigma->ma & 0x3FFF) << 1);
int drawcursor;
uint32_t cols[4];
uint8_t *vram = sigma->vram + (ma << 1);
uint8_t chr;
uint8_t attr;
uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8));
uint16_t ma = ((sigma->ma & 0x3FFF) << 1);
int drawcursor;
uint32_t cols[4];
const uint8_t *vram = sigma->vram + (ma << 1);
ca = ca << 1;
if (sigma->sigma_ctl & CTL_CURSOR)
@@ -459,13 +467,13 @@ sigma_text80(sigma_t *sigma)
static void
sigma_text40(sigma_t *sigma)
{
uint8_t chr;
uint8_t attr;
uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8));
uint16_t ma = ((sigma->ma & 0x3FFF) << 1);
int drawcursor;
uint32_t cols[4];
uint8_t *vram = sigma->vram + ((ma << 1) & 0x3FFF);
uint8_t chr;
uint8_t attr;
uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8));
uint16_t ma = ((sigma->ma & 0x3FFF) << 1);
int drawcursor;
uint32_t cols[4];
const uint8_t *vram = sigma->vram + ((ma << 1) & 0x3FFF);
ca = ca << 1;
if (sigma->sigma_ctl & CTL_CURSOR)
@@ -508,7 +516,7 @@ sigma_text40(sigma_t *sigma)
static void
sigma_gfx400(sigma_t *sigma)
{
unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 3) * 0x2000];
const uint8_t *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 3) * 0x2000];
uint8_t plane[4];
uint8_t col;
@@ -536,7 +544,7 @@ sigma_gfx400(sigma_t *sigma)
static void
sigma_gfx200(sigma_t *sigma)
{
unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000];
const uint8_t *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000];
uint8_t plane[4];
uint8_t col;
@@ -561,7 +569,7 @@ sigma_gfx200(sigma_t *sigma)
static void
sigma_gfx4col(sigma_t *sigma)
{
unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000];
const uint8_t *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000];
uint8_t plane[4];
uint8_t mask;
uint8_t col;
@@ -772,12 +780,12 @@ sigma_poll(void *priv)
}
}
static void
*
sigma_init(const device_t *info)
static void *
sigma_init(UNUSED(const device_t *info))
{
int bios_addr;
sigma_t *sigma = malloc(sizeof(sigma_t));
memset(sigma, 0, sizeof(sigma_t));
bios_addr = device_get_config_hex20("bios_addr");

39
src/video/vid_stg_ramdac.c
View File

@@ -27,6 +27,7 @@
#include <86box/timer.h>
#include <86box/video.h>
#include <86box/vid_svga.h>
#include <86box/plat_unused.h>
typedef struct stg_ramdac_t {
int magic_count, index;
@@ -45,10 +46,10 @@ stg_ramdac_set_bpp(svga_t *svga, stg_ramdac_t *ramdac)
{
if (ramdac->command & 0x8) {
switch (ramdac->regs[3]) {
default:
case 0:
case 5:
case 7:
default:
svga->bpp = 8;
break;
case 1:
@@ -67,8 +68,8 @@ stg_ramdac_set_bpp(svga_t *svga, stg_ramdac_t *ramdac)
}
} else {
switch (ramdac->command >> 5) {
case 0:
default:
case 0:
svga->bpp = 8;
break;
case 5:
@@ -87,9 +88,9 @@ stg_ramdac_set_bpp(svga_t *svga, stg_ramdac_t *ramdac)
}
void
stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga)
stg_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
{
stg_ramdac_t *ramdac = (stg_ramdac_t *) p;
stg_ramdac_t *ramdac = (stg_ramdac_t *) priv;
int didwrite;
int old;
@@ -125,6 +126,9 @@ stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga)
stg_ramdac_set_bpp(svga, ramdac);
ramdac->index++;
break;
default:
break;
}
didwrite = (ramdac->magic_count >= 4);
ramdac->magic_count = stg_state_write[ramdac->magic_count & 7];
@@ -136,15 +140,18 @@ stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga)
case 0x3c9:
ramdac->magic_count = 0;
break;
default:
break;
}
svga_out(addr, val, svga);
}
uint8_t
stg_ramdac_in(uint16_t addr, void *p, svga_t *svga)
stg_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
{
stg_ramdac_t *ramdac = (stg_ramdac_t *) p;
stg_ramdac_t *ramdac = (stg_ramdac_t *) priv;
uint8_t temp = 0xff;
switch (addr) {
@@ -185,6 +192,9 @@ stg_ramdac_in(uint16_t addr, void *p, svga_t *svga)
}
ramdac->index++;
break;
default:
break;
}
ramdac->magic_count = stg_state_read[(ramdac->command & 0x10) ? 1 : 0][ramdac->magic_count & 7];
return temp;
@@ -193,6 +203,9 @@ stg_ramdac_in(uint16_t addr, void *p, svga_t *svga)
case 0x3c9:
ramdac->magic_count = 0;
break;
default:
break;
}
return svga_in(addr, svga);
@@ -201,12 +214,12 @@ stg_ramdac_in(uint16_t addr, void *p, svga_t *svga)
float
stg_getclock(int clock, void *priv)
{
stg_ramdac_t *ramdac = (stg_ramdac_t *) priv;
float t;
int m;
int n;
int n2;
uint16_t *c;
stg_ramdac_t *ramdac = (stg_ramdac_t *) priv;
float t;
int m;
int n;
int n2;
const uint16_t *c;
if (clock == 0)
return 25175000.0;
@@ -225,7 +238,7 @@ stg_getclock(int clock, void *priv)
}
static void *
stg_ramdac_init(const device_t *info)
stg_ramdac_init(UNUSED(const device_t *info))
{
stg_ramdac_t *ramdac = (stg_ramdac_t *) malloc(sizeof(stg_ramdac_t));
memset(ramdac, 0, sizeof(stg_ramdac_t));

2
src/video/vid_svga.c
View File

@@ -538,7 +538,7 @@ svga_set_ramdac_type(svga_t *svga, int type)
void
svga_recalctimings(svga_t *svga)
{
ibm8514_t *dev = &svga->dev8514;
const ibm8514_t *dev = &svga->dev8514;
double crtcconst;
double _dispontime;
double _dispofftime;

2
src/video/vid_table.c
View File

@@ -430,7 +430,7 @@ video_card_has_config(int card)
return (device_has_config(video_cards[card].device) ? 1 : 0);
}
char *
const char *
video_get_internal_name(int card)
{
return device_get_internal_name(video_cards[card].device);

223
src/video/vid_tgui9440.c
View File

@@ -329,6 +329,9 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
if (!(svga->gdcreg[0xf] & 1))
svga->read_bank = svga->write_bank;
return;
default:
break;
}
break;
@@ -418,6 +421,9 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
case 0x5f:
svga->gdcreg[svga->gdcaddr] = val;
break;
default:
break;
}
break;
case 0x3D4:
@@ -491,6 +497,9 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32);
}
break;
default:
break;
}
if (old != val) {
@@ -529,6 +538,9 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
tgui->clock_m = (tgui->clock_m & ~0x1e) | ((val << 1) & 0x1e);
tgui->clock_k = (val & 0x10) >> 4;
break;
default:
break;
}
svga_out(addr, val, svga);
}
@@ -559,6 +571,9 @@ tgui_in(uint16_t addr, void *priv)
case TGUI_9660:
case TGUI_9680:
return 0xd3; /*TGUI9660XGi*/
default:
break;
}
}
if (svga->seqaddr == 0x0d) {
@@ -620,6 +635,9 @@ tgui_in(uint16_t addr, void *priv)
return tgui->tgui_3d8;
case 0x3d9:
return tgui->tgui_3d9;
default:
break;
}
return svga_in(addr, svga);
}
@@ -627,8 +645,8 @@ tgui_in(uint16_t addr, void *priv)
void
tgui_recalctimings(svga_t *svga)
{
tgui_t *tgui = (tgui_t *) svga->priv;
uint8_t ger22upper = (tgui->accel.ger22 >> 8);
const tgui_t *tgui = (tgui_t *) svga->priv;
uint8_t ger22upper = (tgui->accel.ger22 >> 8);
if (!svga->rowoffset)
svga->rowoffset = 0x100;
@@ -725,6 +743,9 @@ tgui_recalctimings(svga_t *svga)
case 0x0f:
svga->clock = (cpuclock * (double) (1ULL << 32)) / 75000000.0;
break;
default:
break;
}
if (svga->gdcreg[0xf] & 0x08) {
svga->htotal <<= 1;
@@ -752,6 +773,9 @@ tgui_recalctimings(svga_t *svga)
case 640:
svga->rowoffset = 80;
break;
default:
break;
}
}
break;
@@ -777,6 +801,9 @@ tgui_recalctimings(svga_t *svga)
svga->rowoffset <<= 1;
}
break;
default:
break;
}
}
}
@@ -847,6 +874,9 @@ tgui_recalcmapping(tgui_t *tgui)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
}
} else {
@@ -875,6 +905,9 @@ tgui_recalcmapping(tgui_t *tgui)
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
}
@@ -902,14 +935,14 @@ tgui_hwcursor_draw(svga_t *svga, int displine)
if (svga->crtc[0x50] & 0x40) {
if (offset >= svga->hwcursor_latch.x) {
if (dat[0] & 0x80000000)
((uint32_t *) buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0;
(buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0;
}
} else {
if (offset >= svga->hwcursor_latch.x) {
if (!(dat[0] & 0x80000000))
((uint32_t *) buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0;
(buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0;
else if (dat[1] & 0x80000000)
((uint32_t *) buffer32->line[displine])[svga->x_add + offset] ^= 0xffffff;
(buffer32->line[displine])[svga->x_add + offset] ^= 0xffffff;
}
}
offset++;
@@ -923,9 +956,9 @@ tgui_hwcursor_draw(svga_t *svga, int displine)
}
uint8_t
tgui_pci_read(int func, int addr, void *priv)
tgui_pci_read(UNUSED(int func), int addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
const tgui_t *tgui = (tgui_t *) priv;
switch (addr) {
case 0x00:
@@ -985,12 +1018,15 @@ tgui_pci_read(int func, int addr, void *priv)
return tgui->int_line;
case 0x3d:
return PCI_INTA;
default:
break;
}
return 0;
}
void
tgui_pci_write(int func, int addr, uint8_t val, void *priv)
tgui_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
@@ -1056,6 +1092,9 @@ tgui_pci_write(int func, int addr, uint8_t val, void *priv)
case 0x3c:
tgui->int_line = val;
return;
default:
break;
}
}
@@ -1100,13 +1139,13 @@ tgui_ext_read(uint32_t addr, void *priv)
static void
tgui_ext_linear_write(uint32_t addr, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
tgui_t *tgui = (tgui_t *) svga->priv;
int c;
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
uint8_t mask = tgui->ext_gdc_regs[7];
svga_t *svga = (svga_t *) priv;
const tgui_t *tgui = (tgui_t *) svga->priv;
int c;
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
uint8_t mask = tgui->ext_gdc_regs[7];
cycles -= video_timing_write_b;
@@ -1166,13 +1205,13 @@ tgui_ext_linear_write(uint32_t addr, uint8_t val, void *priv)
static void
tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
tgui_t *tgui = (tgui_t *) svga->priv;
int c;
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8];
svga_t *svga = (svga_t *) priv;
const tgui_t *tgui = (tgui_t *) svga->priv;
int c;
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8];
cycles -= video_timing_write_w;
@@ -1236,8 +1275,9 @@ tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *priv)
static void
tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
tgui_t *tgui = (tgui_t *) svga->priv;
svga_t *svga = (svga_t *) priv;
const tgui_t *tgui = (tgui_t *) svga->priv;
cycles -= video_timing_write_l;
addr &= svga->decode_mask;
@@ -1342,21 +1382,21 @@ enum {
static void
tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
{
svga_t *svga = &tgui->svga;
uint32_t *pattern_data;
int x;
int y;
int c;
int d;
uint32_t out;
uint32_t src_dat = 0;
uint32_t dst_dat;
uint32_t pat_dat;
int xdir = (tgui->accel.flags & 0x200) ? -1 : 1;
int ydir = (tgui->accel.flags & 0x100) ? -1 : 1;
uint32_t trans_col = (tgui->accel.flags & TGUI_TRANSREV) ? tgui->accel.fg_col : tgui->accel.bg_col;
uint16_t *vram_w = (uint16_t *) svga->vram;
uint32_t *vram_l = (uint32_t *) svga->vram;
svga_t *svga = &tgui->svga;
const uint32_t *pattern_data;
int x;
int y;
int c;
int d;
uint32_t out;
uint32_t src_dat = 0;
uint32_t dst_dat;
uint32_t pat_dat;
int xdir = (tgui->accel.flags & 0x200) ? -1 : 1;
int ydir = (tgui->accel.flags & 0x100) ? -1 : 1;
uint32_t trans_col = (tgui->accel.flags & TGUI_TRANSREV) ? tgui->accel.fg_col : tgui->accel.bg_col;
uint16_t *vram_w = (uint16_t *) svga->vram;
uint32_t *vram_l = (uint32_t *) svga->vram;
if (tgui->accel.bpp == 0) {
trans_col &= 0xff;
@@ -1412,7 +1452,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
}
// pclog("TGUI accel command = %x, ger22 = %04x, hdisp = %d, dispend = %d, vtotal = %d, rowoffset = %d, svgabpp = %d, interlace = %d, accelbpp = %d, pitch = %d.\n", tgui->accel.command, tgui->accel.ger22, svga->hdisp, svga->dispend, svga->vtotal, svga->rowoffset, svga->bpp, svga->interlace, tgui->accel.bpp, tgui->accel.pitch);
#if 0
pclog("TGUI accel command = %x, ger22 = %04x, hdisp = %d, dispend = %d, vtotal = %d, rowoffset = %d, svgabpp = %d, interlace = %d, accelbpp = %d, pitch = %d.\n", tgui->accel.command, tgui->accel.ger22, svga->hdisp, svga->dispend, svga->vtotal, svga->rowoffset, svga->bpp, svga->interlace, tgui->accel.bpp, tgui->accel.pitch);
#endif
switch (tgui->accel.command) {
case TGUI_BITBLT:
@@ -1702,9 +1744,13 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
}
// pclog("TGUI bres = %04x, err = %d, sizex = %d, sizey = %d, srcx = %d, srcy = %d.\n", tgui->accel.flags & 0x700, err, tgui->accel.size_x, tgui->accel.size_y, cx, tgui->accel.src_y);
#if 0
pclog("TGUI bres = %04x, err = %d, sizex = %d, sizey = %d, srcx = %d, srcy = %d.\n", tgui->accel.flags & 0x700, err, tgui->accel.size_x, tgui->accel.size_y, cx, tgui->accel.src_y);
#endif
while (count-- && (tgui->accel.y <= (tgui->accel.size_y))) {
// READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#if 0
READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#endif
/*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/
if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) {
@@ -1727,7 +1773,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
if (tgui->accel.err >= (tgui->accel.size_y & 0xfff)) {
// pclog("Bres DEC: destx = %d, desty = %d, err = %d, sizey = %d.\n", tgui->accel.src_x, tgui->accel.src_y, tgui->accel.err, tgui->accel.size_y);
#if 0
pclog("Bres DEC: destx = %d, desty = %d, err = %d, sizey = %d.\n", tgui->accel.src_x, tgui->accel.src_y, tgui->accel.err, tgui->accel.size_y);
#endif
if ((tgui->accel.src_x >= 2048) && (tgui->accel.src_x < 4096))
tgui->accel.err -= (4096 - tgui->accel.src_x);
else if ((tgui->accel.src_x >= 4096) && (tgui->accel.src_x < 32768))
@@ -1760,9 +1808,14 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
case 0x400:
tgui->accel.dx++;
break;
default:
break;
}
} else {
// pclog("Bres INC: desty = %d, destx = %d, err = %d, sizey = %d.\n", tgui->accel.src_y, tgui->accel.src_x, tgui->accel.err, tgui->accel.size_y);
#if 0
pclog("Bres INC: desty = %d, destx = %d, err = %d, sizey = %d.\n", tgui->accel.src_y, tgui->accel.src_x, tgui->accel.err, tgui->accel.size_y);
#endif
tgui->accel.err += tgui->accel.src_y;
}
@@ -1792,6 +1845,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
case 0x400:
tgui->accel.dy++;
break;
default:
break;
}
tgui->accel.y++;
@@ -1823,7 +1879,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
while (count-- && (tgui->accel.y <= (tgui->accel.sv_size_y & 0xfff))) {
// READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#if 0
READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#endif
/*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/
if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) {
@@ -1873,6 +1931,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
tgui->accel.dx++;
tgui->accel.dy++;
break;
default:
break;
}
tgui->accel.y++;
@@ -1907,7 +1968,9 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
while (count-- && (tgui->accel.y <= (tgui->accel.size_y & 0xfff))) {
// READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#if 0
READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
#endif
/*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/
if (tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom) {
@@ -1957,11 +2020,17 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
tgui->accel.dx++;
tgui->accel.dy++;
break;
default:
break;
}
tgui->accel.y++;
}
break;
default:
break;
}
}
@@ -1987,12 +2056,15 @@ tgui_accel_out(uint16_t addr, uint8_t val, void *priv)
case 32:
tgui->accel.bpp = 3;
break;
default:
break;
}
break;
case 0x2123:
tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8);
if ((val & 0x80) || (((val & 0xc0) == 0x40)))
if ((val & 0x80) || ((val & 0xc0) == 0x40))
tgui->accel.pitch = svga->rowoffset << 3;
else if (tgui->accel.pitch <= 1024)
tgui->accel.pitch = svga->rowoffset << 3;
@@ -2297,6 +2369,9 @@ tgui_accel_out(uint16_t addr, uint8_t val, void *priv)
case 0x21ff:
tgui->accel.pattern[addr & 0x7f] = val;
break;
default:
break;
}
}
@@ -2333,7 +2408,7 @@ tgui_accel_out_l(uint16_t addr, uint32_t val, void *priv)
static uint8_t
tgui_accel_in(uint16_t addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
const tgui_t *tgui = (tgui_t *) priv;
switch (addr) {
case 0x2120: /*Status*/
@@ -2579,6 +2654,9 @@ tgui_accel_in(uint16_t addr, void *priv)
case 0x21fe:
case 0x21ff:
return tgui->accel.pattern[addr & 0x7f];
default:
break;
}
return 0;
}
@@ -2627,12 +2705,15 @@ tgui_accel_write(uint32_t addr, uint8_t val, void *priv)
case 32:
tgui->accel.bpp = 3;
break;
default:
break;
}
break;
case 0x23:
tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8);
if ((val & 0x80) || (((val & 0xc0) == 0x40)))
if ((val & 0x80) || ((val & 0xc0) == 0x40))
tgui->accel.pitch = svga->rowoffset << 3;
else if (tgui->accel.pitch <= 1024)
tgui->accel.pitch = svga->rowoffset << 3;
@@ -2937,6 +3018,9 @@ tgui_accel_write(uint32_t addr, uint8_t val, void *priv)
case 0xff:
tgui->accel.pattern[addr & 0x7f] = val;
break;
default:
break;
}
}
@@ -2952,8 +3036,8 @@ tgui_accel_write_w(uint32_t addr, uint16_t val, void *priv)
static void
tgui_accel_write_l(uint32_t addr, uint32_t val, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
switch (addr & 0xff) {
case 0x24: /*Long version of Command and ROP together*/
@@ -2980,8 +3064,8 @@ tgui_accel_write_l(uint32_t addr, uint32_t val, void *priv)
static uint8_t
tgui_accel_read(uint32_t addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
if ((svga->crtc[0x36] & 0x03) == 0x02) {
if ((addr & ~0xff) != 0xbff00)
@@ -3235,6 +3319,9 @@ tgui_accel_read(uint32_t addr, void *priv)
case 0xfe:
case 0xff:
return tgui->accel.pattern[addr & 0x7f];
default:
break;
}
return 0xff;
}
@@ -3294,8 +3381,8 @@ tgui_accel_write_fb_l(uint32_t addr, uint32_t val, void *priv)
static void
tgui_mmio_write(uint32_t addr, uint8_t val, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
addr &= 0x0000ffff;
@@ -3310,8 +3397,8 @@ tgui_mmio_write(uint32_t addr, uint8_t val, void *priv)
static void
tgui_mmio_write_w(uint32_t addr, uint16_t val, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
addr &= 0x0000ffff;
@@ -3328,8 +3415,8 @@ tgui_mmio_write_w(uint32_t addr, uint16_t val, void *priv)
static void
tgui_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
addr &= 0x0000ffff;
@@ -3348,8 +3435,8 @@ tgui_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
static uint8_t
tgui_mmio_read(uint32_t addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
uint8_t ret = 0xff;
@@ -3368,9 +3455,9 @@ tgui_mmio_read(uint32_t addr, void *priv)
static uint16_t
tgui_mmio_read_w(uint32_t addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
uint16_t ret = 0xffff;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
uint16_t ret = 0xffff;
addr &= 0x0000ffff;
@@ -3387,9 +3474,9 @@ tgui_mmio_read_w(uint32_t addr, void *priv)
static uint32_t
tgui_mmio_read_l(uint32_t addr, void *priv)
{
tgui_t *tgui = (tgui_t *) priv;
svga_t *svga = &tgui->svga;
uint32_t ret = 0xffffffff;
const tgui_t *tgui = (tgui_t *) priv;
const svga_t *svga = &tgui->svga;
uint32_t ret = 0xffffffff;
addr &= 0x0000ffff;
@@ -3438,7 +3525,7 @@ tgui_init(const device_t *info)
tgui->has_bios = (bios_fn != NULL);
if (tgui->has_bios) {
rom_init(&tgui->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&tgui->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (tgui->pci)
mem_mapping_disable(&tgui->bios_rom.mapping);
}

3
src/video/vid_ti_cf62011.c
View File

@@ -137,6 +137,9 @@ vid_out(uint16_t addr, uint8_t val, void *priv)
case 0x210a:
ti->reg_210a = val;
break;
default:
break;
}
svga_out(addr, val, svga);

4
src/video/vid_tkd8001_ramdac.c
View File

@@ -81,9 +81,9 @@ tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
}
uint8_t
tkd8001_ramdac_in(uint16_t addr, void *p, svga_t *svga)
tkd8001_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
{
tkd8001_ramdac_t *ramdac = (tkd8001_ramdac_t *) p;
tkd8001_ramdac_t *ramdac = (tkd8001_ramdac_t *) priv;
switch (addr) {
case 0x3C6:

29
src/video/vid_tvga.c
View File

@@ -111,6 +111,9 @@ tvga_out(uint16_t addr, uint8_t val, void *priv)
tvga_recalcbanking(tvga);
}
return;
default:
break;
}
break;
@@ -143,6 +146,9 @@ tvga_out(uint16_t addr, uint8_t val, void *priv)
svga->gdcreg[0xf] = val;
tvga_recalcbanking(tvga);
break;
default:
break;
}
break;
case 0x3D4:
@@ -171,6 +177,9 @@ tvga_out(uint16_t addr, uint8_t val, void *priv)
case 0x1e:
svga->vram_display_mask = (val & 0x80) ? tvga->vram_mask : 0x3ffff;
break;
default:
break;
}
return;
case 0x3D8:
@@ -194,6 +203,9 @@ tvga_out(uint16_t addr, uint8_t val, void *priv)
svga_recalctimings(svga);
}
break;
default:
break;
}
svga_out(addr, val, svga);
}
@@ -241,6 +253,9 @@ tvga_in(uint16_t addr, void *priv)
return tvga->tvga_3d8;
case 0x3d9:
return tvga->tvga_3d9;
default:
break;
}
return svga_in(addr, svga);
}
@@ -261,9 +276,9 @@ tvga_recalcbanking(tvga_t *tvga)
void
tvga_recalctimings(svga_t *svga)
{
tvga_t *tvga = (tvga_t *) svga->priv;
int clksel;
int high_res_256 = 0;
const tvga_t *tvga = (tvga_t *) svga->priv;
int clksel;
int high_res_256 = 0;
if (!svga->rowoffset)
svga->rowoffset = 0x100; /*This is the only sensible way I can see this being handled,
@@ -346,6 +361,9 @@ tvga_recalctimings(svga_t *svga)
case 0xf:
svga->clock = (cpuclock * (double) (1ULL << 32)) / 75000000.0;
break;
default:
break;
}
if (tvga->card_id != TVGA8900CLD_ID) {
@@ -378,6 +396,9 @@ tvga_recalctimings(svga_t *svga)
svga->render = svga_render_24bpp_highres;
svga->hdisp /= 3;
break;
default:
break;
}
svga->lowres = 0;
}
@@ -417,7 +438,7 @@ tvga_init(const device_t *info)
return NULL;
}
rom_init(&tvga->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&tvga->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
svga_init(info, &tvga->svga, tvga, tvga->vram_size,
tvga_recalctimings,

2
src/video/vid_voodoo_banshee.c
View File

@@ -3169,7 +3169,7 @@ banshee_init_common(const device_t *info, char *fn, int has_sgram, int type, int
pci_add_card(banshee->agp ? PCI_ADD_AGP : PCI_ADD_VIDEO, banshee_pci_read, banshee_pci_write, banshee, &banshee->pci_slot);
banshee->voodoo = voodoo_2d3d_card_init(voodoo_type);
banshee->voodoo->p = banshee;
banshee->voodoo->priv = banshee;
banshee->voodoo->vram = banshee->svga.vram;
banshee->voodoo->changedvram = banshee->svga.changedvram;
banshee->voodoo->fb_mem = banshee->svga.vram;

2
src/video/vid_voodoo_reg.c
View File

@@ -105,7 +105,7 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *priv)
voodoo_wait_for_render_thread_idle(voodoo);
if (!(val & 1)) {
banshee_set_overlay_addr(voodoo->p, voodoo->leftOverlayBuf);
banshee_set_overlay_addr(voodoo->priv, voodoo->leftOverlayBuf);
thread_wait_mutex(voodoo->swap_mutex);
if (voodoo->swap_count > 0)
voodoo->swap_count--;

61
src/video/vid_wy700.c
View File

@@ -28,6 +28,7 @@
#include <86box/mem.h>
#include <86box/device.h>
#include <86box/video.h>
#include <86box/plat_unused.h>
#define WY700_XSIZE 1280
#define WY700_YSIZE 800
@@ -283,13 +284,17 @@ wy700_out(uint16_t addr, uint8_t val, void *priv)
case 0x3D9:
wy700->cga_colour = val;
return;
default:
break;
}
}
uint8_t
wy700_in(uint16_t addr, void *priv)
{
wy700_t *wy700 = (wy700_t *) priv;
const wy700_t *wy700 = (wy700_t *) priv;
switch (addr) {
case 0x3b0:
case 0x3b2:
@@ -318,6 +323,9 @@ wy700_in(uint16_t addr, void *priv)
return wy700->mda_stat;
case 0x3da:
return wy700->cga_stat;
default:
break;
}
return 0xff;
}
@@ -378,6 +386,9 @@ wy700_checkchanges(wy700_t *wy700)
case 7: /* Enable display */
wy700->enabled = 1;
break;
default:
break;
}
/* A control write with the top bit set selects graphics mode */
if (wy700->wy700_control & 0x80) {
@@ -477,9 +488,9 @@ wy700_write(uint32_t addr, uint8_t val, void *priv)
uint8_t
wy700_read(uint32_t addr, void *priv)
{
wy700_t *wy700 = (wy700_t *) priv;
if (wy700->wy700_mode & 0x80) /* High-res mode. */
{
const wy700_t *wy700 = (wy700_t *) priv;
if (wy700->wy700_mode & 0x80) { /* High-res mode. */
addr &= 0xFFFF;
/* In 800-line modes, bit 0 of the control register sets the high bit of the
* read address. */
@@ -512,21 +523,21 @@ wy700_recalctimings(wy700_t *wy700)
void
wy700_textline(wy700_t *wy700)
{
int w = (wy700->wy700_mode == 0) ? 40 : 80;
int cw = (wy700->wy700_mode == 0) ? 32 : 16;
uint8_t chr;
uint8_t attr;
uint8_t bitmap[2];
uint8_t *fontbase = &fontdatw[0][0];
int blink;
int c;
int drawcursor;
int cursorline;
int mda = 0;
uint16_t addr;
uint8_t sc;
uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff;
uint16_t ca = (wy700->cga_crtc[15] | (wy700->cga_crtc[14] << 8)) & 0x3fff;
int w = (wy700->wy700_mode == 0) ? 40 : 80;
int cw = (wy700->wy700_mode == 0) ? 32 : 16;
uint8_t chr;
uint8_t attr;
uint8_t bitmap[2];
const uint8_t *fontbase = &fontdatw[0][0];
int blink;
int c;
int drawcursor;
int cursorline;
int mda = 0;
uint16_t addr;
uint8_t sc;
uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff;
uint16_t ca = (wy700->cga_crtc[15] | (wy700->cga_crtc[14] << 8)) & 0x3fff;
/* The fake CRTC character height register selects whether MDA or CGA
* attributes are used */
@@ -629,6 +640,9 @@ wy700_cgaline(wy700_t *wy700)
case 3:
ink = 16 + 15;
break;
default:
break;
}
if (!(wy700->enabled) || !(wy700->cga_ctrl & 8))
ink = 16;
@@ -669,6 +683,9 @@ wy700_medresline(wy700_t *wy700)
case 3:
ink = 16 + 15;
break;
default:
break;
}
/* Display disabled? */
if (!(wy700->wy700_mode & 8))
@@ -724,6 +741,9 @@ wy700_hiresline(wy700_t *wy700)
case 3:
ink = 16 + 15;
break;
default:
break;
}
/* Display disabled? */
if (!(wy700->wy700_mode & 8))
@@ -857,10 +877,11 @@ wy700_poll(void *priv)
}
void *
wy700_init(const device_t *info)
wy700_init(UNUSED(const device_t *info))
{
int c;
wy700_t *wy700 = malloc(sizeof(wy700_t));
memset(wy700, 0, sizeof(wy700_t));
video_inform(VIDEO_FLAG_TYPE_CGA, &timing_wy700);

14
src/video/vid_xga.c
View File

@@ -3105,7 +3105,7 @@ xga_init(const device_t *info)
svga_t *svga = svga_get_pri();
xga_t *xga = &svga->xga;
FILE *f;
FILE *fp;
uint8_t *rom = NULL;
xga->ext_mem_addr = device_get_config_hex16("ext_mem_addr");
@@ -3125,18 +3125,18 @@ xga_init(const device_t *info)
xga->linear_endian_reverse = 0;
xga->a5_test = 0;
f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb");
(void) fseek(f, 0L, SEEK_END);
(void) fseek(f, 0L, SEEK_SET);
fp = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb");
(void) fseek(fp, 0L, SEEK_END);
(void) fseek(fp, 0L, SEEK_SET);
rom = malloc(xga->bios_rom.sz);
memset(rom, 0xff, xga->bios_rom.sz);
(void) fread(rom, xga->bios_rom.sz, 1, f);
(void) fclose(f);
(void) !fread(rom, xga->bios_rom.sz, 1, fp);
(void) fclose(fp);
xga->bios_rom.rom = rom;
xga->bios_rom.mask = xga->bios_rom.sz - 1;
if (f != NULL) {
if (fp != NULL) {
free(rom);
}

32
src/video/video.c
View File

@@ -880,29 +880,27 @@ video_monitor_close(int monitor_index)
void
video_init(void)
{
int c;
int d;
uint8_t total[2] = { 0, 1 };
for (c = 0; c < 16; c++) {
for (uint8_t c = 0; c < 16; c++) {
cga_2_table[c] = (total[(c >> 3) & 1] << 0) | (total[(c >> 2) & 1] << 8) | (total[(c >> 1) & 1] << 16) | (total[(c >> 0) & 1] << 24);
}
for (c = 0; c < 64; c++) {
for (uint8_t c = 0; c < 64; c++) {
cgapal[c + 64].r = (((c & 4) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21;
cgapal[c + 64].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21;
cgapal[c + 64].b = (((c & 1) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21;
if ((c & 0x17) == 6)
cgapal[c + 64].g >>= 1;
}
for (c = 0; c < 64; c++) {
for (uint8_t c = 0; c < 64; c++) {
cgapal[c + 128].r = (((c & 4) ? 2 : 0) | ((c & 0x20) ? 1 : 0)) * 21;
cgapal[c + 128].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21;
cgapal[c + 128].b = (((c & 1) ? 2 : 0) | ((c & 0x08) ? 1 : 0)) * 21;
}
for (c = 0; c < 4; c++) {
for (d = 0; d < 4; d++) {
for (uint8_t c = 0; c < 4; c++) {
for (uint8_t d = 0; d < 4; d++) {
edatlookup[c][d] = 0;
if (c & 1)
edatlookup[c][d] |= 1;
@@ -916,23 +914,23 @@ video_init(void)
}
video_6to8 = malloc(4 * 256);
for (c = 0; c < 256; c++)
for (uint16_t c = 0; c < 256; c++)
video_6to8[c] = calc_6to8(c);
video_8togs = malloc(4 * 256);
for (c = 0; c < 256; c++)
for (uint16_t c = 0; c < 256; c++)
video_8togs[c] = c | (c << 16) | (c << 24);
video_8to32 = malloc(4 * 256);
for (c = 0; c < 256; c++)
for (uint16_t c = 0; c < 256; c++)
video_8to32[c] = calc_8to32(c);
video_15to32 = malloc(4 * 65536);
for (c = 0; c < 65536; c++)
for (uint32_t c = 0; c < 65536; c++)
video_15to32[c] = calc_15to32(c & 0x7fff);
video_16to32 = malloc(4 * 65536);
for (c = 0; c < 65536; c++)
for (uint32_t c = 0; c < 65536; c++)
video_16to32[c] = calc_16to32(c);
memset(monitors, 0, sizeof(monitors));
@@ -1098,14 +1096,14 @@ loadfont_common(FILE *f, int format)
void
loadfont_ex(char *s, int format, int offset)
{
FILE *f;
FILE *fp;
f = rom_fopen(s, "rb");
if (f == NULL)
fp = rom_fopen(s, "rb");
if (fp == NULL)
return;
fseek(f, offset, SEEK_SET);
loadfont_common(f, format);
fseek(fp, offset, SEEK_SET);
loadfont_common(fp, format);
}
void