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S3 ViRGE: Move sign bit 1 bit further to the right for K2 scaler registers (#6243)

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* Fix sign position of DDA accumulator registers

* S3 ViRGE: Move sign bit 1 bit further to the right for K1/K2 scaler registers

* K1 scales are 13 bits
This commit is contained in:
Cacodemon345
2025-09-28 01:58:07 +06:00
committed by GitHub
parent 37eb2cb359
commit 4a6327da68
1 changed files with 6 additions and 6 deletions
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12
src/video/vid_s3_virge.c
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@@ -1967,9 +1967,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
if (val & 0x800)
virge->streams.k1_horiz_scale |= ~0x7ff;
virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff;
if ((val >> 16) & 0x800)
virge->streams.k2_horiz_scale |= ~0x7ff;
virge->streams.k2_horiz_scale = (val >> 16) & 0x3ff;
if ((val >> 16) & 0x400)
virge->streams.k2_horiz_scale |= ~0x3ff;
svga_recalctimings(svga);
svga->fullchange = changeframecount;
@@ -2025,9 +2025,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
virge->streams.k1_vert_scale |= ~0x7ff;
break;
case 0x81e4:
virge->streams.k2_vert_scale = val & 0x7ff;
if (val & 0x800)
virge->streams.k2_vert_scale |= ~0x7ff;
virge->streams.k2_vert_scale = val & 0x3ff;
if (val & 0x400)
virge->streams.k2_vert_scale |= ~0x3ff;
break;
case 0x81e8:
virge->streams.dda_vert_accumulator = val & 0x7ff;