mirror of
https://github.com/86Box/86Box.git
synced 2026-02-22 09:35:32 -07:00
Merge remote-tracking branch 'upstream/master' into feature/mtrr
This commit is contained in:
@@ -57,7 +57,7 @@ AppDir:
|
||||
- libqt5gui5 # if QT:BOOL=ON
|
||||
- libqt5widgets5 # if QT:BOOL=ON
|
||||
- libsixel1 # if CLI:BOOL=ON
|
||||
- libslirp0 # if SLIRP_EXTERNAL:BOOL=ON
|
||||
- libslirp0
|
||||
- libsndio7.0 # if OPENAL:BOOL=ON
|
||||
- libvdeplug-dev # -dev also pulls in libvdeplug2. -dev is required to get the proper .so symlink to the library
|
||||
- libx11-6 # if QT:BOOL=ON
|
||||
|
||||
@@ -670,9 +670,6 @@ EOF
|
||||
else
|
||||
echo [-] Not installing dependencies again
|
||||
fi
|
||||
|
||||
# Link against the system libslirp instead of compiling ours.
|
||||
cmake_flags_extra="$cmake_flags_extra -D SLIRP_EXTERNAL=ON"
|
||||
fi
|
||||
|
||||
# Point CMake to the toolchain file.
|
||||
|
||||
4
.github/workflows/cmake.yml
vendored
4
.github/workflows/cmake.yml
vendored
@@ -263,7 +263,7 @@ jobs:
|
||||
build-wrapper-win-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
|
||||
|
||||
- name: Run sonar-scanner
|
||||
# if: 0
|
||||
if: 0
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
|
||||
@@ -445,7 +445,7 @@ jobs:
|
||||
build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
|
||||
|
||||
- name: Run sonar-scanner
|
||||
# if: 0
|
||||
if: 0
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
|
||||
|
||||
@@ -30,10 +30,6 @@ if(NOT DEFINED OPENAL OR OPENAL)
|
||||
list(APPEND VCPKG_MANIFEST_FEATURES "openal")
|
||||
endif()
|
||||
|
||||
if(SLIRP_EXTERNAL)
|
||||
list(APPEND VCPKG_MANIFEST_FEATURES "slirp")
|
||||
endif()
|
||||
|
||||
if(MUNT_EXTERNAL)
|
||||
list(APPEND VCPKG_MANIFEST_FEATURES "munt")
|
||||
endif()
|
||||
|
||||
19
README.md
19
README.md
@@ -1,13 +1,15 @@
|
||||
86Box
|
||||
=====
|
||||
|
||||
[](https://ci.86box.net/job/86Box/)
|
||||
|
||||
**86Box** is a low level x86 emulator that runs older operating systems and software designed for IBM PC systems and compatibles from 1981 through fairly recent system designs based on the PCI bus.
|
||||
|
||||
Features
|
||||
--------
|
||||
|
||||
* Easy to use interface inspired by mainstream hypervisor software
|
||||
* Low level emulation of 8086-based processors up to the Pentium with focus on accuracy
|
||||
* Low level emulation of 8086-based processors up to the Mendocino-era Celeron with focus on accuracy
|
||||
* Great range of customizability of virtual machines
|
||||
* Many available systems, such as the very first IBM PC 5150 from 1981, or the more obscure IBM PS/2 line of systems based on the Micro Channel Architecture
|
||||
* Lots of supported peripherals including video adapters, sound cards, network adapters, hard disk controllers, and SCSI adapters
|
||||
@@ -16,15 +18,17 @@ Features
|
||||
|
||||
Minimum system requirements and recommendations
|
||||
-----------------------------------------------
|
||||
* Intel Core 2 or AMD Athlon 64 processor
|
||||
* Windows version: Windows 7 Service Pack 1, Windows 8.1 or Windows 10
|
||||
|
||||
* Intel Core 2 or AMD Athlon 64 processor or newer
|
||||
* Windows version: Windows 7 Service Pack 1 or later
|
||||
* Linux version: Ubuntu 16.04, Debian 9.0 or other distributions from 2016 onwards
|
||||
* macOS version: macOS High Sierra 10.13
|
||||
* 4 GB of RAM
|
||||
* macOS version: macOS High Sierra 10.13 or newer
|
||||
* 4 GB of RAM or higher
|
||||
|
||||
Performance may vary depending on both host and guest configuration. Most emulation logic is executed in a single thread; therefore, systems with better IPC (instructions per clock) generally should be able to emulate higher clock speeds.
|
||||
|
||||
It is also recommended to use a manager application with 86Box for easier handling of multiple virtual machines.
|
||||
|
||||
* [86Box Manager](https://github.com/86Box/86BoxManager) by [Overdoze](https://github.com/daviunic) (Windows only)
|
||||
* [86Box Manager Lite](https://github.com/insanemal/86box_manager_py) by [Insanemal](https://github.com/insanemal)
|
||||
* [WinBox for 86Box](https://github.com/86Box/WinBox-for-86Box) by Laci bá' (Windows only)
|
||||
@@ -35,10 +39,12 @@ It is also possible to use 86Box on its own with the `--vmpath`/`-P` command lin
|
||||
|
||||
Getting started
|
||||
---------------
|
||||
|
||||
See [our documentation](https://86box.readthedocs.io/en/latest/index.html) for an overview of the emulator's features and user interface.
|
||||
|
||||
Community
|
||||
---------
|
||||
|
||||
We operate an IRC channel and a Discord server for discussing 86Box, its development and anything related to retro computing. We look forward to hearing from you!
|
||||
|
||||
[](https://kiwiirc.com/client/irc.ringoflightning.net/?nick=86box|?#86Box)
|
||||
@@ -47,16 +53,19 @@ We operate an IRC channel and a Discord server for discussing 86Box, its develop
|
||||
|
||||
Contributions
|
||||
---------
|
||||
|
||||
We welcome all contributions to the project, as long as the [contribution guidelines](CONTRIBUTING.md) are followed.
|
||||
|
||||
Licensing
|
||||
---------
|
||||
|
||||
86Box is released under the [GNU General Public License, version 2](https://www.gnu.org/licenses/old-licenses/gpl-2.0.html) or later. For more information, see the `COPYING` file in the root of the repository.
|
||||
|
||||
The emulator can also optionally make use of [munt](https://github.com/munt/munt), [FluidSynth](https://www.fluidsynth.org/), [Ghostscript](https://www.ghostscript.com/) and [Discord Game SDK](https://discord.com/developers/docs/game-sdk/sdk-starter-guide), which are distributed under their respective licenses.
|
||||
|
||||
Donations
|
||||
---------
|
||||
|
||||
We do not charge you for the emulator but donations are still welcome:
|
||||
https://paypal.me/86Box.
|
||||
|
||||
|
||||
2
debian/rules
vendored
2
debian/rules
vendored
@@ -25,7 +25,7 @@ endif
|
||||
dh $@ --buildsystem cmake+ninja
|
||||
|
||||
override_dh_auto_configure:
|
||||
dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR) -DSLIRP_EXTERNAL=on
|
||||
dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR)
|
||||
|
||||
override_dh_auto_test:
|
||||
|
||||
|
||||
32
src/86box.c
32
src/86box.c
@@ -408,18 +408,18 @@ pc_log(const char *fmt, ...)
|
||||
int
|
||||
pc_init(int argc, char *argv[])
|
||||
{
|
||||
char *ppath = NULL;
|
||||
char *rpath = NULL;
|
||||
char *cfg = NULL;
|
||||
char *p;
|
||||
char temp[2048];
|
||||
char *fn[FDD_NUM] = { NULL };
|
||||
char drive = 0;
|
||||
char *temp2 = NULL;
|
||||
struct tm *info;
|
||||
time_t now;
|
||||
int c;
|
||||
int lvmp = 0;
|
||||
char *ppath = NULL;
|
||||
char *rpath = NULL;
|
||||
char *cfg = NULL;
|
||||
char *p;
|
||||
char temp[2048];
|
||||
char *fn[FDD_NUM] = { NULL };
|
||||
char drive = 0;
|
||||
char *temp2 = NULL;
|
||||
const struct tm *info;
|
||||
time_t now;
|
||||
int c;
|
||||
int lvmp = 0;
|
||||
#ifdef ENABLE_NG
|
||||
int ng = 0;
|
||||
#endif
|
||||
@@ -1144,9 +1144,9 @@ pc_reset_hard_init(void)
|
||||
void
|
||||
update_mouse_msg(void)
|
||||
{
|
||||
wchar_t wcpufamily[2048];
|
||||
wchar_t wcpu[2048];
|
||||
wchar_t wmachine[2048];
|
||||
wchar_t wcpufamily[2048];
|
||||
wchar_t wcpu[2048];
|
||||
wchar_t wmachine[2048];
|
||||
wchar_t *wcp;
|
||||
|
||||
mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1);
|
||||
@@ -1185,7 +1185,7 @@ pc_reset_hard(void)
|
||||
}
|
||||
|
||||
void
|
||||
pc_close(thread_t *ptr)
|
||||
pc_close(UNUSED(thread_t *ptr))
|
||||
{
|
||||
/* Wait a while so things can shut down. */
|
||||
plat_delay_ms(200);
|
||||
|
||||
53
src/acpi.c
53
src/acpi.c
@@ -226,10 +226,10 @@ acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv)
|
||||
static uint32_t
|
||||
acpi_reg_read_ali(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
|
||||
addr &= 0x3f;
|
||||
shift16 = (addr & 1) << 3;
|
||||
@@ -294,10 +294,10 @@ acpi_reg_read_ali(int size, uint16_t addr, void *priv)
|
||||
static uint32_t
|
||||
acpi_reg_read_intel(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
|
||||
addr &= 0x3f;
|
||||
shift16 = (addr & 1) << 3;
|
||||
@@ -391,10 +391,10 @@ acpi_reg_read_intel(int size, uint16_t addr, void *priv)
|
||||
static uint32_t
|
||||
acpi_reg_read_via_common(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
|
||||
addr &= 0xff;
|
||||
shift16 = (addr & 1) << 3;
|
||||
@@ -544,10 +544,10 @@ acpi_reg_read_via(int size, uint16_t addr, void *priv)
|
||||
static uint32_t
|
||||
acpi_reg_read_via_596b(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
int shift32;
|
||||
|
||||
addr &= 0x7f;
|
||||
shift16 = (addr & 1) << 3;
|
||||
@@ -610,9 +610,9 @@ acpi_reg_read_smc(int size, uint16_t addr, void *priv)
|
||||
static uint32_t
|
||||
acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint32_t ret = 0x00000000;
|
||||
int shift16;
|
||||
|
||||
addr &= 0x07;
|
||||
shift16 = (addr & 1) << 3;
|
||||
@@ -1189,7 +1189,7 @@ acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
|
||||
static uint32_t
|
||||
acpi_reg_read_common(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (dev->vendor == VEN_ALI)
|
||||
@@ -1209,7 +1209,7 @@ acpi_reg_read_common(int size, uint16_t addr, void *priv)
|
||||
static void
|
||||
acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
|
||||
if (dev->vendor == VEN_ALI)
|
||||
acpi_reg_write_ali(size, addr, val, priv);
|
||||
@@ -1226,7 +1226,7 @@ acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
|
||||
static uint32_t
|
||||
acpi_aux_reg_read_common(int size, uint16_t addr, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (dev->vendor == VEN_SMC)
|
||||
@@ -1238,7 +1238,7 @@ acpi_aux_reg_read_common(int size, uint16_t addr, void *priv)
|
||||
static void
|
||||
acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
|
||||
if (dev->vendor == VEN_SMC)
|
||||
acpi_aux_reg_write_smc(size, addr, val, priv);
|
||||
@@ -1591,8 +1591,8 @@ acpi_apm_out(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
acpi_apm_in(uint16_t port, void *priv)
|
||||
{
|
||||
acpi_t *dev = (acpi_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const acpi_t *dev = (acpi_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
port &= 0x0001;
|
||||
|
||||
@@ -1694,7 +1694,7 @@ acpi_init(const device_t *info)
|
||||
|
||||
dev = (acpi_t *) malloc(sizeof(acpi_t));
|
||||
if (dev == NULL)
|
||||
return (NULL);
|
||||
return NULL;
|
||||
memset(dev, 0x00, sizeof(acpi_t));
|
||||
|
||||
cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock;
|
||||
@@ -1723,6 +1723,7 @@ acpi_init(const device_t *info)
|
||||
dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI;
|
||||
dev->suspend_types[3] = SUS_SUSPEND;
|
||||
dev->suspend_types[5] = SUS_POWER_OFF; /* undocumented, used for S4/S5 by ASUS P5A ACPI table */
|
||||
dev->suspend_types[7] = SUS_POWER_OFF; /* undocumented, used for S5 by Gigabyte GA-5AX ACPI table */
|
||||
break;
|
||||
|
||||
case VEN_VIA:
|
||||
|
||||
@@ -71,8 +71,8 @@ apm_out(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
apm_in(uint16_t port, void *priv)
|
||||
{
|
||||
apm_t *dev = (apm_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const apm_t *dev = (apm_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
port &= 0x0001;
|
||||
|
||||
@@ -102,9 +102,8 @@ apm_close(void *priv)
|
||||
free(dev);
|
||||
}
|
||||
|
||||
static void
|
||||
*
|
||||
apm_init(const device_t *info)
|
||||
static void *
|
||||
apm_init(const device_t *info)
|
||||
{
|
||||
apm_t *dev = (apm_t *) malloc(sizeof(apm_t));
|
||||
memset(dev, 0, sizeof(apm_t));
|
||||
|
||||
@@ -163,7 +163,7 @@ cdrom_interface_get_from_internal_name(char *s)
|
||||
int c = 0;
|
||||
|
||||
while (controllers[c].device != NULL) {
|
||||
if (!strcmp((char *) controllers[c].device->internal_name, s))
|
||||
if (!strcmp(controllers[c].device->internal_name, s))
|
||||
return c;
|
||||
c++;
|
||||
}
|
||||
|
||||
@@ -202,7 +202,7 @@ track_file_close(track_t *trk)
|
||||
static void
|
||||
cdi_clear_tracks(cd_img_t *cdi)
|
||||
{
|
||||
track_file_t *last = NULL;
|
||||
const track_file_t *last = NULL;
|
||||
track_t *cur = NULL;
|
||||
|
||||
if ((cdi->tracks == NULL) || (cdi->tracks_num == 0))
|
||||
@@ -273,7 +273,7 @@ cdi_get_audio_tracks_lba(cd_img_t *cdi, int *st_track, int *end, uint32_t *lead_
|
||||
int
|
||||
cdi_get_audio_track_pre(cd_img_t *cdi, int track)
|
||||
{
|
||||
track_t *trk = &cdi->tracks[track - 1];
|
||||
const track_t *trk = &cdi->tracks[track - 1];
|
||||
|
||||
if ((track < 1) || (track > cdi->tracks_num))
|
||||
return 0;
|
||||
@@ -285,7 +285,7 @@ cdi_get_audio_track_pre(cd_img_t *cdi, int track)
|
||||
int
|
||||
cdi_get_audio_track_info(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, TMSF *start, uint8_t *attr)
|
||||
{
|
||||
track_t *trk = &cdi->tracks[track - 1];
|
||||
const track_t *trk = &cdi->tracks[track - 1];
|
||||
int pos = trk->start + 150;
|
||||
|
||||
if ((track < 1) || (track > cdi->tracks_num))
|
||||
@@ -304,7 +304,7 @@ cdi_get_audio_track_info(cd_img_t *cdi, UNUSED(int end), int track, int *track_n
|
||||
int
|
||||
cdi_get_audio_track_info_lba(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, uint32_t *start, uint8_t *attr)
|
||||
{
|
||||
track_t *trk = &cdi->tracks[track - 1];
|
||||
const track_t *trk = &cdi->tracks[track - 1];
|
||||
|
||||
if ((track < 1) || (track > cdi->tracks_num))
|
||||
return 0;
|
||||
@@ -320,8 +320,8 @@ cdi_get_audio_track_info_lba(cd_img_t *cdi, UNUSED(int end), int track, int *tra
|
||||
int
|
||||
cdi_get_track(cd_img_t *cdi, uint32_t sector)
|
||||
{
|
||||
track_t *cur;
|
||||
track_t *next;
|
||||
const track_t *cur;
|
||||
const track_t *next;
|
||||
|
||||
/* There must be at least two tracks - data and lead out. */
|
||||
if (cdi->tracks_num < 2)
|
||||
@@ -343,8 +343,8 @@ cdi_get_track(cd_img_t *cdi, uint32_t sector)
|
||||
int
|
||||
cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, uint8_t *index, TMSF *rel_pos, TMSF *abs_pos)
|
||||
{
|
||||
int cur_track = cdi_get_track(cdi, sector);
|
||||
track_t *trk;
|
||||
int cur_track = cdi_get_track(cdi, sector);
|
||||
const track_t *trk;
|
||||
|
||||
if (cur_track < 1)
|
||||
return 0;
|
||||
@@ -483,8 +483,8 @@ cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector)
|
||||
int
|
||||
cdi_get_sector_size(cd_img_t *cdi, uint32_t sector)
|
||||
{
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
track_t *trk;
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
const track_t *trk;
|
||||
|
||||
if (track < 0)
|
||||
return 0;
|
||||
@@ -496,8 +496,8 @@ cdi_get_sector_size(cd_img_t *cdi, uint32_t sector)
|
||||
int
|
||||
cdi_is_mode2(cd_img_t *cdi, uint32_t sector)
|
||||
{
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
track_t *trk;
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
const track_t *trk;
|
||||
|
||||
if (track < 0)
|
||||
return 0;
|
||||
@@ -510,8 +510,8 @@ cdi_is_mode2(cd_img_t *cdi, uint32_t sector)
|
||||
int
|
||||
cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector)
|
||||
{
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
track_t *trk;
|
||||
int track = cdi_get_track(cdi, sector) - 1;
|
||||
const track_t *trk;
|
||||
|
||||
if (track < 0)
|
||||
return 0;
|
||||
@@ -652,7 +652,9 @@ cdi_cue_get_buffer(char *str, char **line, int up)
|
||||
done = 1;
|
||||
break;
|
||||
}
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
default:
|
||||
if (up && islower((int) *s))
|
||||
@@ -787,7 +789,7 @@ cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, u
|
||||
*total_pregap += cur_pregap;
|
||||
cur->start += *total_pregap;
|
||||
} else {
|
||||
temp = prev->file->get_length(prev->file) - ((uint64_t) prev->skip);
|
||||
temp = prev->file->get_length(prev->file) - (prev->skip);
|
||||
prev->length = temp / ((uint64_t) prev->sector_size);
|
||||
if ((temp % prev->sector_size) != 0)
|
||||
prev->length++;
|
||||
|
||||
@@ -370,7 +370,7 @@ viso_fill_fn_rr(uint8_t *data, const viso_entry_t *entry, size_t max_len)
|
||||
|
||||
/* Relocate extension if the original name exceeds the maximum length. */
|
||||
if (!S_ISDIR(entry->stats.st_mode)) { /* do this on files only */
|
||||
char *ext = strrchr(entry->basename, '.');
|
||||
const char *ext = strrchr(entry->basename, '.');
|
||||
if (ext > entry->basename) {
|
||||
len = strlen(ext);
|
||||
if (len >= max_len)
|
||||
@@ -401,7 +401,7 @@ viso_fill_fn_joliet(uint8_t *data, const viso_entry_t *entry, size_t max_len) /*
|
||||
|
||||
/* Relocate extension if the original name exceeds the maximum length. */
|
||||
if (!S_ISDIR(entry->stats.st_mode)) { /* do this on files only */
|
||||
wchar_t *ext = wcsrchr(utf8dec, L'.');
|
||||
const wchar_t *ext = wcsrchr(utf8dec, L'.');
|
||||
if (ext > utf8dec) {
|
||||
len = wcslen(ext);
|
||||
if (len > max_len)
|
||||
@@ -725,8 +725,9 @@ viso_read(void *p, uint8_t *buffer, uint64_t seek, size_t count)
|
||||
uint64_t
|
||||
viso_get_length(void *p)
|
||||
{
|
||||
track_file_t *tf = (track_file_t *) p;
|
||||
viso_t *viso = (viso_t *) tf->priv;
|
||||
track_file_t *tf = (track_file_t *) p;
|
||||
const viso_t *viso = (viso_t *) tf->priv;
|
||||
|
||||
return ((uint64_t) viso->all_sectors) * viso->sector_size;
|
||||
}
|
||||
|
||||
@@ -799,18 +800,18 @@ viso_init(const char *dirname, int *error)
|
||||
|
||||
/* Set up directory traversal. */
|
||||
cdrom_image_viso_log("VISO: Traversing directories:\n");
|
||||
viso_entry_t *entry;
|
||||
viso_entry_t *last_entry;
|
||||
viso_entry_t *dir;
|
||||
viso_entry_t *last_dir;
|
||||
viso_entry_t *eltorito_dir = NULL;
|
||||
viso_entry_t *eltorito_entry = NULL;
|
||||
struct dirent *readdir_entry;
|
||||
int len;
|
||||
int eltorito_others_present = 0;
|
||||
size_t dir_path_len;
|
||||
uint64_t eltorito_offset = 0;
|
||||
uint8_t eltorito_type = 0;
|
||||
viso_entry_t *entry;
|
||||
viso_entry_t *last_entry;
|
||||
viso_entry_t *dir;
|
||||
viso_entry_t *last_dir;
|
||||
const viso_entry_t *eltorito_dir = NULL;
|
||||
const viso_entry_t *eltorito_entry = NULL;
|
||||
struct dirent *readdir_entry;
|
||||
int len;
|
||||
int eltorito_others_present = 0;
|
||||
size_t dir_path_len;
|
||||
uint64_t eltorito_offset = 0;
|
||||
uint8_t eltorito_type = 0;
|
||||
|
||||
/* Fill root directory entry. */
|
||||
dir_path_len = strlen(dirname);
|
||||
|
||||
@@ -324,6 +324,9 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
|
||||
break;
|
||||
case 5:
|
||||
dev->readmsf = 0;
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 4:
|
||||
case 3:
|
||||
dev->readmsf |= CD_DCB(val) << ((dev->cmdrd_count - 3) << 3);
|
||||
|
||||
@@ -109,7 +109,7 @@ ct_82c100_ems_out(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ct_82c100_ems_in(uint16_t port, void *priv)
|
||||
{
|
||||
ct_82c100_t *dev = (ct_82c100_t *) priv;
|
||||
const ct_82c100_t *dev = (ct_82c100_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->ems_page_regs[port >> 14];
|
||||
@@ -278,15 +278,15 @@ ct_82c100_in(uint16_t port, void *priv)
|
||||
static uint8_t
|
||||
mem_read_emsb(uint32_t addr, void *priv)
|
||||
{
|
||||
ems_page_t *page = (ems_page_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ems_page_t *page = (ems_page_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
#ifdef ENABLE_CT_82C100_LOG
|
||||
uint32_t old_addr = addr;
|
||||
#endif
|
||||
|
||||
addr = addr - page->virt + page->phys;
|
||||
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ret = ram[addr];
|
||||
|
||||
ct_82c100_log("mem_read_emsb(%08X = %08X): %02X\n", old_addr, addr, ret);
|
||||
@@ -297,7 +297,7 @@ mem_read_emsb(uint32_t addr, void *priv)
|
||||
static uint16_t
|
||||
mem_read_emsw(uint32_t addr, void *priv)
|
||||
{
|
||||
ems_page_t *page = (ems_page_t *) priv;
|
||||
const ems_page_t *page = (ems_page_t *) priv;
|
||||
uint16_t ret = 0xffff;
|
||||
#ifdef ENABLE_CT_82C100_LOG
|
||||
uint32_t old_addr = addr;
|
||||
@@ -305,7 +305,7 @@ mem_read_emsw(uint32_t addr, void *priv)
|
||||
|
||||
addr = addr - page->virt + page->phys;
|
||||
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ret = *(uint16_t *) &ram[addr];
|
||||
|
||||
ct_82c100_log("mem_read_emsw(%08X = %08X): %04X\n", old_addr, addr, ret);
|
||||
@@ -316,14 +316,14 @@ mem_read_emsw(uint32_t addr, void *priv)
|
||||
static void
|
||||
mem_write_emsb(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ems_page_t *page = (ems_page_t *) priv;
|
||||
const ems_page_t *page = (ems_page_t *) priv;
|
||||
#ifdef ENABLE_CT_82C100_LOG
|
||||
uint32_t old_addr = addr;
|
||||
#endif
|
||||
|
||||
addr = addr - page->virt + page->phys;
|
||||
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ram[addr] = val;
|
||||
|
||||
ct_82c100_log("mem_write_emsb(%08X = %08X, %02X)\n", old_addr, addr, val);
|
||||
@@ -332,14 +332,14 @@ mem_write_emsb(uint32_t addr, uint8_t val, void *priv)
|
||||
static void
|
||||
mem_write_emsw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
ems_page_t *page = (ems_page_t *) priv;
|
||||
const ems_page_t *page = (ems_page_t *) priv;
|
||||
#ifdef ENABLE_CT_82C100_LOG
|
||||
uint32_t old_addr = addr;
|
||||
#endif
|
||||
|
||||
addr = addr - page->virt + page->phys;
|
||||
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
*(uint16_t *) &ram[addr] = val;
|
||||
|
||||
ct_82c100_log("mem_write_emsw(%08X = %08X, %04X)\n", old_addr, addr, val);
|
||||
|
||||
@@ -168,7 +168,7 @@ acc2168_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
acc2168_read(uint16_t addr, void *priv)
|
||||
{
|
||||
acc2168_t *dev = (acc2168_t *) priv;
|
||||
const acc2168_t *dev = (acc2168_t *) priv;
|
||||
|
||||
return (addr == 0xf3) ? dev->regs[dev->reg_idx] : dev->reg_idx;
|
||||
}
|
||||
|
||||
@@ -280,8 +280,8 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1429_read(uint16_t addr, void *priv)
|
||||
{
|
||||
ali1429_t *dev = (ali1429_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1429_t *dev = (ali1429_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a))
|
||||
ret = dev->regs[dev->index];
|
||||
|
||||
@@ -166,8 +166,8 @@ ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1435_pci_read(int func, int addr, void *priv)
|
||||
{
|
||||
ali1435_t *dev = (ali1435_t *) priv;
|
||||
uint8_t ret;
|
||||
const ali1435_t *dev = (ali1435_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
ret = 0xff;
|
||||
|
||||
@@ -233,8 +233,8 @@ ali1435_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1435_read(uint16_t addr, void *priv)
|
||||
{
|
||||
ali1435_t *dev = (ali1435_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1435_t *dev = (ali1435_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if ((addr == 0x23) && (dev->index < 0x10))
|
||||
ret = dev->regs[dev->index];
|
||||
|
||||
@@ -213,7 +213,7 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
|
||||
ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t old;
|
||||
uint8_t irq;
|
||||
const uint8_t irq_array[16] = { 0, 3, 4, 7, 0, 0, 0, 0, 9, 10, 5, 6, 11, 12, 14, 15 };
|
||||
const uint8_t irq_array[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15 };
|
||||
|
||||
switch (addr) {
|
||||
case 0x22:
|
||||
@@ -408,8 +408,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1489_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1489_t *dev = (ali1489_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x23:
|
||||
@@ -456,8 +456,8 @@ ali1489_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1489_pci_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->pci_conf[addr];
|
||||
ali1489_log("M1489-PCI: dev->pci_conf[%02x] (%02x)\n", addr, ret);
|
||||
@@ -560,8 +560,8 @@ ali1489_ide_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1489_ide_read(uint16_t addr, void *priv)
|
||||
{
|
||||
ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1489_t *dev = (ali1489_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (addr) {
|
||||
case 0xf4:
|
||||
|
||||
@@ -303,8 +303,8 @@ ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1531_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
ali1531_t *dev = (ali1531_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1531_t *dev = (ali1531_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->pci_conf[addr];
|
||||
|
||||
|
||||
@@ -560,8 +560,8 @@ ali1541_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1541_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
ali1541_t *dev = (ali1541_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1541_t *dev = (ali1541_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->pci_conf[addr];
|
||||
|
||||
|
||||
@@ -895,7 +895,7 @@ ali5229_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali5229_read(int func, int addr, void *priv)
|
||||
{
|
||||
ali1543_t *dev = (ali1543_t *) priv;
|
||||
const ali1543_t *dev = (ali1543_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (dev->ide_dev_enable && (func == 0)) {
|
||||
@@ -983,7 +983,7 @@ ali5237_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali5237_read(int func, int addr, void *priv)
|
||||
{
|
||||
ali1543_t *dev = (ali1543_t *) priv;
|
||||
const ali1543_t *dev = (ali1543_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (dev->usb_dev_enable && (func == 0))
|
||||
@@ -1474,7 +1474,7 @@ ali7101_read(int func, int addr, void *priv)
|
||||
static void
|
||||
ali5237_usb_update_interrupt(usb_t* usb, void *priv)
|
||||
{
|
||||
ali1543_t *dev = (ali1543_t *) priv;
|
||||
const ali1543_t *dev = (ali1543_t *) priv;
|
||||
|
||||
if (usb->irq_level)
|
||||
pci_set_mirq(4, !!(dev->pci_conf[0x74] & 0x10));
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
#include <86box/io.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/pci.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <86box/smram.h>
|
||||
#include <86box/spd.h>
|
||||
@@ -108,7 +109,9 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
|
||||
switch (val & 0x30) {
|
||||
case 0x10: /* Open. */
|
||||
access_normal = ACCESS_SMRAM_RX;
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 0x30: /* Protect. */
|
||||
access_smm |= ACCESS_SMRAM_R;
|
||||
break;
|
||||
@@ -121,7 +124,9 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
|
||||
switch (val & 0x30) {
|
||||
case 0x10: /* Open. */
|
||||
access_normal |= ACCESS_SMRAM_W;
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 0x30: /* Protect. */
|
||||
access_smm |= ACCESS_SMRAM_W;
|
||||
break;
|
||||
@@ -579,8 +584,8 @@ ali1621_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali1621_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
ali1621_t *dev = (ali1621_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ali1621_t *dev = (ali1621_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->pci_conf[addr];
|
||||
|
||||
|
||||
@@ -33,6 +33,7 @@
|
||||
#include <86box/hdc.h>
|
||||
#include <86box/hdc_ide.h>
|
||||
#include <86box/chipset.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
|
||||
typedef struct ali6117_t {
|
||||
uint32_t local;
|
||||
@@ -233,7 +234,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
|
||||
|
||||
case 0x12:
|
||||
val &= 0xf7;
|
||||
/* FALL-THROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
@@ -388,7 +391,7 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ali6117_reg_read(uint16_t addr, void *priv)
|
||||
{
|
||||
ali6117_t *dev = (ali6117_t *) priv;
|
||||
const ali6117_t *dev = (ali6117_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (addr == 0x22)
|
||||
|
||||
@@ -148,7 +148,7 @@ cs4031_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
cs4031_read(uint16_t addr, void *priv)
|
||||
{
|
||||
cs4031_t *dev = (cs4031_t *) priv;
|
||||
const cs4031_t *dev = (cs4031_t *) priv;
|
||||
|
||||
return (addr == 0x23) ? dev->regs[dev->index] : 0xff;
|
||||
}
|
||||
|
||||
@@ -81,8 +81,8 @@ rethink_shadow_mappings(cs8230_t *cs8230)
|
||||
static uint8_t
|
||||
cs8230_read(uint16_t port, void *priv)
|
||||
{
|
||||
cs8230_t *cs8230 = (cs8230_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const cs8230_t *cs8230 = (cs8230_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (port & 1) {
|
||||
switch (cs8230->idx) {
|
||||
|
||||
@@ -121,7 +121,7 @@ et6000_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
et6000_read(uint16_t addr, void *priv)
|
||||
{
|
||||
et6000_t *dev = (et6000_t *) priv;
|
||||
const et6000_t *dev = (et6000_t *) priv;
|
||||
|
||||
return ((addr == 0x23) && (INDEX >= 0) && (INDEX <= 5)) ? dev->regs[INDEX] : 0xff;
|
||||
}
|
||||
|
||||
@@ -145,9 +145,9 @@ gc100_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
gc100_read(uint16_t port, void *priv)
|
||||
{
|
||||
gc100_t *dev = (gc100_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint16_t addr = port & 0xf;
|
||||
const gc100_t *dev = (gc100_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint16_t addr = port & 0xf;
|
||||
|
||||
ret = dev->reg[addr];
|
||||
|
||||
|
||||
@@ -165,7 +165,7 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
|
||||
static void
|
||||
hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
|
||||
{
|
||||
if (base_addr < ((uint32_t) mem_size << 10))
|
||||
if (base_addr < (mem_size << 10))
|
||||
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr);
|
||||
else
|
||||
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
|
||||
@@ -197,7 +197,7 @@ hl_ems_update(headland_t *dev, uint8_t mar)
|
||||
dev->ems_mr[mar & 0x3f].virt_base = virt_addr;
|
||||
if (indx < 24)
|
||||
mem_mapping_disable(&dev->upper_mapping[indx]);
|
||||
if (virt_addr < ((uint32_t) mem_size << 10))
|
||||
if (virt_addr < (mem_size << 10))
|
||||
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr);
|
||||
else
|
||||
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
|
||||
@@ -244,7 +244,7 @@ memmap_state_update(headland_t *dev)
|
||||
|
||||
for (uint8_t i = 0; i < 24; i++) {
|
||||
addr = get_addr(dev, 0x40000 + (i << 14), NULL);
|
||||
mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
|
||||
mem_mapping_set_exec(&dev->upper_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL);
|
||||
}
|
||||
|
||||
memmap_state_default(dev, ht_romcs);
|
||||
@@ -513,7 +513,7 @@ mem_read_b(uint32_t addr, void *priv)
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ret = ram[addr];
|
||||
|
||||
return ret;
|
||||
@@ -527,7 +527,7 @@ mem_read_w(uint32_t addr, void *priv)
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ret = *(uint16_t *) &ram[addr];
|
||||
|
||||
return ret;
|
||||
@@ -541,7 +541,7 @@ mem_read_l(uint32_t addr, void *priv)
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ret = *(uint32_t *) &ram[addr];
|
||||
|
||||
return ret;
|
||||
@@ -554,7 +554,7 @@ mem_write_b(uint32_t addr, uint8_t val, void *priv)
|
||||
headland_t *dev = mr->headland;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
ram[addr] = val;
|
||||
}
|
||||
|
||||
@@ -565,7 +565,7 @@ mem_write_w(uint32_t addr, uint16_t val, void *priv)
|
||||
headland_t *dev = mr->headland;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
*(uint16_t *) &ram[addr] = val;
|
||||
}
|
||||
|
||||
@@ -576,7 +576,7 @@ mem_write_l(uint32_t addr, uint32_t val, void *priv)
|
||||
headland_t *dev = mr->headland;
|
||||
|
||||
addr = get_addr(dev, addr, mr);
|
||||
if (addr < ((uint32_t) mem_size << 10))
|
||||
if (addr < (mem_size << 10))
|
||||
*(uint32_t *) &ram[addr] = val;
|
||||
}
|
||||
|
||||
|
||||
@@ -327,8 +327,8 @@ ims8849_pci_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ims8849_pci_read(int func, int addr, void *priv)
|
||||
{
|
||||
ims8848_t *dev = (ims8848_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ims8848_t *dev = (ims8848_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0)
|
||||
ret = dev->pci_conf[addr];
|
||||
|
||||
@@ -118,7 +118,7 @@ i420ex_smram_handler_phase0(void)
|
||||
static void
|
||||
i420ex_smram_handler_phase1(i420ex_t *dev)
|
||||
{
|
||||
uint8_t *regs = (uint8_t *) dev->regs;
|
||||
const uint8_t *regs = (uint8_t *) dev->regs;
|
||||
|
||||
uint32_t host_base = 0x000a0000;
|
||||
uint32_t ram_base = 0x000a0000;
|
||||
@@ -165,15 +165,14 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
|
||||
static void
|
||||
i420ex_drb_recalc(i420ex_t *dev)
|
||||
{
|
||||
int i;
|
||||
uint32_t boundary;
|
||||
|
||||
for (i = 4; i >= 0; i--)
|
||||
for (int8_t i = 4; i >= 0; i--)
|
||||
row_disable(i);
|
||||
|
||||
for (i = 0; i <= 4; i++) {
|
||||
boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
|
||||
row_set_boundary(i, boundary);
|
||||
for (uint8_t i = 0; i <= 4; i++) {
|
||||
boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
|
||||
row_set_boundary(i, boundary);
|
||||
}
|
||||
|
||||
flushmmucache();
|
||||
@@ -398,8 +397,8 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
i420ex_read(int func, int addr, void *priv)
|
||||
{
|
||||
i420ex_t *dev = (i420ex_t *) priv;
|
||||
uint8_t ret;
|
||||
const i420ex_t *dev = (i420ex_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
ret = 0xff;
|
||||
|
||||
|
||||
@@ -118,10 +118,10 @@ static void
|
||||
i4x0_smram_handler_phase1(i4x0_t *dev)
|
||||
{
|
||||
|
||||
uint8_t *regs = (uint8_t *) dev->regs;
|
||||
uint32_t tom = (mem_size << 10);
|
||||
uint8_t *reg = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]);
|
||||
uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]);
|
||||
const uint8_t *regs = (uint8_t *) dev->regs;
|
||||
uint32_t tom = (mem_size << 10);
|
||||
const uint8_t *reg = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]);
|
||||
const uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]);
|
||||
|
||||
uint32_t s;
|
||||
uint32_t base[2] = { 0x000a0000, 0x00000000 };
|
||||
@@ -228,7 +228,7 @@ i4x0_mask_bar(uint8_t *regs, void *agpgart)
|
||||
static uint8_t
|
||||
pm2_cntrl_read(UNUSED(uint16_t addr), void *priv)
|
||||
{
|
||||
i4x0_t *dev = (i4x0_t *) priv;
|
||||
const i4x0_t *dev = (i4x0_t *) priv;
|
||||
|
||||
return dev->pm2_cntrl & 0x01;
|
||||
}
|
||||
@@ -1068,6 +1068,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
|
||||
case INTEL_440ZX:
|
||||
case INTEL_440GX:
|
||||
regs[addr] = val;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -1077,6 +1079,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
|
||||
case INTEL_440BX:
|
||||
case INTEL_440ZX:
|
||||
regs[0x77] = val & 0x03;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -1505,9 +1509,9 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
i4x0_read(int func, int addr, void *priv)
|
||||
{
|
||||
i4x0_t *dev = (i4x0_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint8_t *regs = (uint8_t *) dev->regs;
|
||||
i4x0_t *dev = (i4x0_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const uint8_t *regs = (uint8_t *) dev->regs;
|
||||
|
||||
if (func == 0) {
|
||||
ret = regs[addr];
|
||||
|
||||
@@ -153,7 +153,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
|
||||
static uint16_t
|
||||
intel_82335_read(uint16_t addr, void *priv)
|
||||
{
|
||||
intel_82335_t *dev = (intel_82335_t *) priv;
|
||||
const intel_82335_t *dev = (intel_82335_t *) priv;
|
||||
|
||||
intel_82335_log("Register %02x: Read %04x\n", addr, dev->regs[addr]);
|
||||
|
||||
|
||||
@@ -90,9 +90,9 @@ i450kx_map(i450kx_t *dev, int bus, uint32_t addr, uint32_t size, int state)
|
||||
static void
|
||||
i450kx_smram_recalc(i450kx_t *dev, int bus)
|
||||
{
|
||||
uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
|
||||
uint32_t addr;
|
||||
uint32_t size;
|
||||
const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
|
||||
uint32_t addr;
|
||||
uint32_t size;
|
||||
|
||||
smram_disable(dev->smram[bus]);
|
||||
|
||||
@@ -112,7 +112,7 @@ i450kx_smram_recalc(i450kx_t *dev, int bus)
|
||||
static void
|
||||
i450kx_vid_buf_recalc(i450kx_t *dev, int bus)
|
||||
{
|
||||
uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
|
||||
const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
|
||||
|
||||
#if 0
|
||||
// int state = (regs[0x58] & 0x02) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_DISABLED | MEM_WRITE_DISABLED);
|
||||
@@ -374,7 +374,7 @@ pb_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
pb_read(int func, int addr, void *priv)
|
||||
{
|
||||
i450kx_t *dev = (i450kx_t *) priv;
|
||||
const i450kx_t *dev = (i450kx_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0)
|
||||
@@ -601,7 +601,7 @@ mc_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
mc_read(int func, int addr, void *priv)
|
||||
{
|
||||
i450kx_t *dev = (i450kx_t *) priv;
|
||||
const i450kx_t *dev = (i450kx_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0)
|
||||
|
||||
@@ -289,7 +289,7 @@ piix_trap_io(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNU
|
||||
static void
|
||||
piix_trap_io_ide(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
|
||||
{
|
||||
piix_io_trap_t *trap = (piix_io_trap_t *) priv;
|
||||
const piix_io_trap_t *trap = (piix_io_trap_t *) priv;
|
||||
|
||||
/* IDE traps are per drive, not per channel. */
|
||||
if (ide_drives[trap->dev_id]->selected)
|
||||
@@ -327,10 +327,10 @@ piix_trap_update_devctl(piix_t *dev, uint8_t trap_id, uint8_t dev_id,
|
||||
static void
|
||||
piix_trap_update(void *priv)
|
||||
{
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
uint8_t trap_id = 0;
|
||||
uint8_t *fregs = dev->regs[3];
|
||||
uint16_t temp;
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
uint8_t trap_id = 0;
|
||||
const uint8_t *fregs = dev->regs[3];
|
||||
uint16_t temp;
|
||||
|
||||
piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x1f0, 8);
|
||||
piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x3f6, 1);
|
||||
@@ -1166,9 +1166,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
piix_read(int func, int addr, void *priv)
|
||||
{
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint8_t *fregs;
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const uint8_t *fregs;
|
||||
|
||||
if ((dev->type == 3) && (func == 2) && (dev->max_func == 1) && (addr >= 0x40))
|
||||
ret = 0x00;
|
||||
@@ -1202,8 +1202,8 @@ board_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
board_read(uint16_t port, void *priv)
|
||||
{
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
uint8_t ret = 0x64;
|
||||
const piix_t *dev = (piix_t *) priv;
|
||||
uint8_t ret = 0x64;
|
||||
|
||||
if (port == 0x0078)
|
||||
ret = dev->board_config[0];
|
||||
@@ -1446,7 +1446,7 @@ piix_fast_off_count(void *priv)
|
||||
static void
|
||||
piix_usb_update_interrupt(usb_t* usb, void *priv)
|
||||
{
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
const piix_t *dev = (piix_t *) priv;
|
||||
|
||||
if (usb->irq_level)
|
||||
pci_set_irq(dev->pci_slot, PCI_INTD);
|
||||
@@ -1457,7 +1457,7 @@ piix_usb_update_interrupt(usb_t* usb, void *priv)
|
||||
static void
|
||||
piix_reset(void *priv)
|
||||
{
|
||||
piix_t *dev = (piix_t *) priv;
|
||||
const piix_t *dev = (piix_t *) priv;
|
||||
|
||||
if (dev->type > 3) {
|
||||
piix_write(3, 0x04, 0x00, priv);
|
||||
|
||||
@@ -324,8 +324,8 @@ sio_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sio_read(int func, int addr, void *priv)
|
||||
{
|
||||
sio_t *dev = (sio_t *) priv;
|
||||
uint8_t ret;
|
||||
const sio_t *dev = (sio_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
ret = 0xff;
|
||||
|
||||
@@ -452,7 +452,7 @@ sio_fast_off_count(void *priv)
|
||||
static void
|
||||
sio_reset(void *priv)
|
||||
{
|
||||
sio_t *dev = (sio_t *) priv;
|
||||
const sio_t *dev = (sio_t *) priv;
|
||||
|
||||
/* Disable the PIC mouse latch. */
|
||||
sio_write(0, 0x4d, 0x40, priv);
|
||||
|
||||
@@ -349,9 +349,9 @@ ems_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ems_read(uint16_t port, void *priv)
|
||||
{
|
||||
neat_t *dev = (neat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int vpage;
|
||||
const neat_t *dev = (neat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int vpage;
|
||||
|
||||
/* Get the viewport page number. */
|
||||
vpage = (port / EMS_PGSIZE);
|
||||
@@ -637,8 +637,8 @@ neat_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
neat_read(uint16_t port, void *priv)
|
||||
{
|
||||
neat_t *dev = (neat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const neat_t *dev = (neat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (port) {
|
||||
case 0x22:
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include <86box/io.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <86box/chipset.h>
|
||||
|
||||
@@ -66,7 +67,7 @@ typedef struct opti283_t {
|
||||
static uint8_t
|
||||
opti283_read_remapped_ram(uint32_t addr, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
return mem_read_ram((addr - dev->virt) + dev->phys, priv);
|
||||
}
|
||||
@@ -74,7 +75,7 @@ opti283_read_remapped_ram(uint32_t addr, void *priv)
|
||||
static uint16_t
|
||||
opti283_read_remapped_ramw(uint32_t addr, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
return mem_read_ramw((addr - dev->virt) + dev->phys, priv);
|
||||
}
|
||||
@@ -82,7 +83,7 @@ opti283_read_remapped_ramw(uint32_t addr, void *priv)
|
||||
static uint32_t
|
||||
opti283_read_remapped_raml(uint32_t addr, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
return mem_read_raml((addr - dev->virt) + dev->phys, priv);
|
||||
}
|
||||
@@ -90,7 +91,7 @@ opti283_read_remapped_raml(uint32_t addr, void *priv)
|
||||
static void
|
||||
opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
mem_write_ram((addr - dev->virt) + dev->phys, val, priv);
|
||||
}
|
||||
@@ -98,7 +99,7 @@ opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv)
|
||||
static void
|
||||
opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
mem_write_ramw((addr - dev->virt) + dev->phys, val, priv);
|
||||
}
|
||||
@@ -106,7 +107,7 @@ opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv)
|
||||
static void
|
||||
opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
const mem_remapping_t *dev = (mem_remapping_t *) priv;
|
||||
|
||||
mem_write_raml((addr - dev->virt) + dev->phys, val, priv);
|
||||
}
|
||||
@@ -228,7 +229,9 @@ opti283_write(uint16_t addr, uint8_t val, void *priv)
|
||||
|
||||
case 0x14:
|
||||
reset_on_hlt = !!(val & 0x40);
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
@@ -249,8 +252,8 @@ opti283_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti283_read(uint16_t addr, void *priv)
|
||||
{
|
||||
opti283_t *dev = (opti283_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const opti283_t *dev = (opti283_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (addr == 0x24)
|
||||
ret = dev->regs[dev->index];
|
||||
|
||||
@@ -122,7 +122,7 @@ opti291_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti291_read(uint16_t addr, void *priv)
|
||||
{
|
||||
opti291_t *dev = (opti291_t *) priv;
|
||||
const opti291_t *dev = (opti291_t *) priv;
|
||||
|
||||
return (addr == 0x24) ? dev->regs[dev->index] : 0xff;
|
||||
}
|
||||
|
||||
@@ -178,8 +178,8 @@ opti391_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti391_read(uint16_t addr, void *priv)
|
||||
{
|
||||
opti391_t *dev = (opti391_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const opti391_t *dev = (opti391_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (addr == 0x24)
|
||||
ret = dev->regs[dev->index];
|
||||
|
||||
@@ -157,8 +157,8 @@ opti495_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti495_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
opti495_t *dev = (opti495_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const opti495_t *dev = (opti495_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x22:
|
||||
|
||||
@@ -156,7 +156,7 @@ opti5x7_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti5x7_read(uint16_t addr, void *priv)
|
||||
{
|
||||
opti5x7_t *dev = (opti5x7_t *) priv;
|
||||
const opti5x7_t *dev = (opti5x7_t *) priv;
|
||||
|
||||
return (addr == 0x24) ? dev->regs[dev->idx] : 0xff;
|
||||
}
|
||||
|
||||
@@ -336,8 +336,8 @@ opti822_pci_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti822_pci_read(int func, int addr, void *priv)
|
||||
{
|
||||
opti822_t *dev = (opti822_t *) priv;
|
||||
uint8_t ret;
|
||||
const opti822_t *dev = (opti822_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
ret = 0xff;
|
||||
|
||||
|
||||
@@ -204,8 +204,8 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
opti895_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
opti895_t *dev = (opti895_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const opti895_t *dev = (opti895_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x23:
|
||||
|
||||
@@ -152,12 +152,12 @@ static const struct {
|
||||
static uint8_t
|
||||
ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -183,12 +183,12 @@ ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv)
|
||||
static void
|
||||
ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -216,12 +216,12 @@ ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ram_mirrored_interleaved_read(uint32_t addr, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -247,12 +247,12 @@ ram_mirrored_interleaved_read(uint32_t addr, void *priv)
|
||||
static void
|
||||
ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -278,12 +278,12 @@ ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ram_mirrored_read(uint32_t addr, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -297,12 +297,12 @@ ram_mirrored_read(uint32_t addr, void *priv)
|
||||
static void
|
||||
ram_mirrored_write(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
const ram_struct_t *rs = (ram_struct_t *) priv;
|
||||
const scamp_t *dev = rs->parent;
|
||||
int bank = rs->bank;
|
||||
int byte;
|
||||
int row;
|
||||
int column;
|
||||
|
||||
addr -= dev->ram_virt_base[bank];
|
||||
byte = addr & 1;
|
||||
@@ -574,9 +574,9 @@ recalc_sltptr(scamp_t *dev)
|
||||
static uint8_t
|
||||
scamp_ems_read(uint32_t addr, void *priv)
|
||||
{
|
||||
ems_struct_t *ems = (ems_struct_t *) priv;
|
||||
scamp_t *dev = ems->parent;
|
||||
int segment = ems->segment;
|
||||
const ems_struct_t *ems = (ems_struct_t *) priv;
|
||||
const scamp_t *dev = ems->parent;
|
||||
int segment = ems->segment;
|
||||
|
||||
addr = (addr & 0x3fff) | dev->mappings[segment];
|
||||
return ram[addr];
|
||||
@@ -585,9 +585,9 @@ scamp_ems_read(uint32_t addr, void *priv)
|
||||
static void
|
||||
scamp_ems_write(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ems_struct_t *ems = (ems_struct_t *) priv;
|
||||
scamp_t *dev = ems->parent;
|
||||
int segment = ems->segment;
|
||||
const ems_struct_t *ems = (ems_struct_t *) priv;
|
||||
const scamp_t *dev = ems->parent;
|
||||
int segment = ems->segment;
|
||||
|
||||
addr = (addr & 0x3fff) | dev->mappings[segment];
|
||||
ram[addr] = val;
|
||||
|
||||
@@ -1204,9 +1204,9 @@ scat_out(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
scat_in(uint16_t port, void *priv)
|
||||
{
|
||||
scat_t *dev = (scat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint8_t indx;
|
||||
const scat_t *dev = (scat_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint8_t indx;
|
||||
|
||||
switch (port) {
|
||||
case 0x23:
|
||||
|
||||
@@ -348,7 +348,8 @@ sis_5511_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_5511_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
const sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
|
||||
sis_5511_log("SiS 5511: dev->pci_conf[%02x] (%02x) POST %02x\n", addr, dev->pci_conf[addr], inb(0x80));
|
||||
return dev->pci_conf[addr];
|
||||
}
|
||||
@@ -554,7 +555,7 @@ sis_5513_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_5513_read(int func, int addr, void *priv)
|
||||
{
|
||||
sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
const sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
|
||||
sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80));
|
||||
if ((func >= 0) && (func <= 1))
|
||||
@@ -624,7 +625,7 @@ sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_5513_isa_read(uint16_t addr, void *priv)
|
||||
{
|
||||
sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
const sis_5511_t *dev = (sis_5511_t *) priv;
|
||||
|
||||
if (addr == 0x23) {
|
||||
sis_5511_log("SiS 5513-ISA: dev->regs[%02x] (%02x) POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80));
|
||||
|
||||
@@ -340,7 +340,8 @@ memory_pci_bridge_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
memory_pci_bridge_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
const sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
|
||||
sis_5571_log("SiS5571: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]);
|
||||
return dev->pci_conf[addr];
|
||||
}
|
||||
@@ -638,6 +639,7 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
|
||||
break;
|
||||
}
|
||||
sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
@@ -647,7 +649,7 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
pci_isa_bridge_read(int func, int addr, void *priv)
|
||||
{
|
||||
sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
const sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
|
||||
switch (func) {
|
||||
case 0:
|
||||
@@ -668,7 +670,7 @@ pci_isa_bridge_read(int func, int addr, void *priv)
|
||||
static void
|
||||
sis_5571_usb_update_interrupt(usb_t* usb, void* priv)
|
||||
{
|
||||
sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
const sis_5571_t *dev = (sis_5571_t *) priv;
|
||||
|
||||
if (dev->pci_conf_sb[0][0x68] & 0x80) {
|
||||
/* TODO: Is the normal PCI interrupt inhibited when USB IRQ remapping is enabled? */
|
||||
|
||||
@@ -115,8 +115,8 @@ sis_85c497_isa_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_85c497_isa_read(uint16_t port, void *priv)
|
||||
{
|
||||
sis_85c496_t *dev = (sis_85c496_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const sis_85c496_t *dev = (sis_85c496_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (port == 0x23)
|
||||
ret = dev->regs[dev->cur_reg];
|
||||
@@ -505,8 +505,8 @@ sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_85c49x_pci_read(UNUSED(int func), int addr, void *priv)
|
||||
{
|
||||
sis_85c496_t *dev = (sis_85c496_t *) priv;
|
||||
uint8_t ret = dev->pci_conf[addr];
|
||||
const sis_85c496_t *dev = (sis_85c496_t *) priv;
|
||||
uint8_t ret = dev->pci_conf[addr];
|
||||
|
||||
switch (addr) {
|
||||
case 0xa0:
|
||||
@@ -673,7 +673,7 @@ static void
|
||||
timer_add(&dev->rmsmiblk_timer, sis_85c496_rmsmiblk_count, dev, 0);
|
||||
|
||||
#ifndef USE_DRB_HACK
|
||||
row_device.local = 7 | (1 << 8) | (0x02 << 16) | (7 << 24);
|
||||
row_device.local = 7 | (1 << 8) | (0x02 << 16) | (8 << 24);
|
||||
device_add((const device_t *) &row_device);
|
||||
#endif
|
||||
|
||||
|
||||
@@ -228,8 +228,8 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_85c50x_read(int func, int addr, void *priv)
|
||||
{
|
||||
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0x00)
|
||||
ret = dev->pci_conf[addr];
|
||||
@@ -283,8 +283,8 @@ sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_85c50x_sb_read(int func, int addr, void *priv)
|
||||
{
|
||||
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0x00)
|
||||
ret = dev->pci_conf_sb[addr];
|
||||
@@ -338,8 +338,8 @@ sis_85c50x_isa_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
sis_85c50x_isa_read(uint16_t addr, void *priv)
|
||||
{
|
||||
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const sis_85c50x_t *dev = (sis_85c50x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (addr) {
|
||||
case 0x22:
|
||||
|
||||
@@ -166,8 +166,8 @@ stpc_host_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_host_read(uint16_t addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (addr == dev->host_base)
|
||||
ret = dev->host_offset;
|
||||
@@ -196,8 +196,8 @@ stpc_localbus_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_localbus_read(uint16_t addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (addr == dev->localbus_base)
|
||||
ret = dev->localbus_offset;
|
||||
@@ -260,8 +260,8 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_nb_read(int func, int addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (func > 0)
|
||||
ret = 0xff;
|
||||
@@ -445,8 +445,8 @@ stpc_ide_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_ide_read(int func, int addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (func > 0)
|
||||
ret = 0xff;
|
||||
@@ -507,8 +507,8 @@ stpc_isab_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_isab_read(int func, int addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if ((func == 1) && (dev->local != STPC_ATLAS))
|
||||
ret = stpc_ide_read(0, addr, priv);
|
||||
@@ -571,8 +571,8 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_usb_read(int func, int addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (func > 0)
|
||||
ret = 0xff;
|
||||
@@ -614,7 +614,8 @@ stpc_remap_localbus(stpc_t *dev, uint16_t localbus_base)
|
||||
static uint8_t
|
||||
stpc_serial_handlers(uint8_t val)
|
||||
{
|
||||
stpc_serial_t *dev = device_get_priv(&stpc_serial_device);
|
||||
const stpc_serial_t *dev = device_get_priv(&stpc_serial_device);
|
||||
|
||||
if (!dev) {
|
||||
stpc_log("STPC: Not remapping UARTs, disabled by strap (raw %02X)\n", val);
|
||||
return 0;
|
||||
@@ -744,8 +745,8 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
stpc_reg_read(uint16_t addr, void *priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (addr == 0x22)
|
||||
ret = dev->reg_offset;
|
||||
@@ -895,7 +896,7 @@ stpc_setup(stpc_t *dev)
|
||||
static void
|
||||
stpc_usb_update_interrupt(usb_t* usb, void* priv)
|
||||
{
|
||||
stpc_t *dev = (stpc_t *) priv;
|
||||
const stpc_t *dev = (stpc_t *) priv;
|
||||
|
||||
if (usb->irq_level)
|
||||
pci_set_irq(dev->usb_slot, PCI_INTA);
|
||||
|
||||
@@ -202,7 +202,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
|
||||
case 0x56:
|
||||
dev->pci_conf_sb[func][addr] = val;
|
||||
|
||||
switch (val & 2) {
|
||||
switch (val & 3) {
|
||||
case 0:
|
||||
cpu_set_isa_pci_div(3);
|
||||
break;
|
||||
@@ -289,8 +289,8 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
umc_8886_read(int func, int addr, void *priv)
|
||||
{
|
||||
umc_8886_t *dev = (umc_8886_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const umc_8886_t *dev = (umc_8886_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func <= dev->max_func)
|
||||
ret = dev->pci_conf_sb[func][addr];
|
||||
|
||||
@@ -333,8 +333,8 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
hb4_read(int func, int addr, void *priv)
|
||||
{
|
||||
hb4_t *dev = (hb4_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const hb4_t *dev = (hb4_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func == 0)
|
||||
ret = dev->pci_conf[addr];
|
||||
|
||||
@@ -671,8 +671,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
via_apollo_read(int func, int addr, void *priv)
|
||||
{
|
||||
via_apollo_t *dev = (via_apollo_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const via_apollo_t *dev = (via_apollo_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (func) {
|
||||
case 0:
|
||||
|
||||
@@ -41,6 +41,7 @@
|
||||
#include <86box/ddma.h>
|
||||
#include <86box/pci.h>
|
||||
#include <86box/pic.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <86box/port_92.h>
|
||||
#include <86box/hdc.h>
|
||||
@@ -750,8 +751,8 @@ pipc_codec_handlers(pipc_t *dev, uint8_t modem)
|
||||
static uint8_t
|
||||
pipc_fmnmi_read(uint16_t addr, void *priv)
|
||||
{
|
||||
pipc_t *dev = (pipc_t *) priv;
|
||||
uint8_t ret = dev->fmnmi_regs[addr & 0x03];
|
||||
const pipc_t *dev = (pipc_t *) priv;
|
||||
uint8_t ret = dev->fmnmi_regs[addr & 0x03];
|
||||
|
||||
pipc_log("PIPC: fmnmi_read(%02X) = %02X\n", addr & 0x03, ret);
|
||||
|
||||
@@ -786,7 +787,7 @@ pipc_fmnmi_handlers(pipc_t *dev, uint8_t modem)
|
||||
static uint8_t
|
||||
pipc_fm_read(uint16_t addr, void *priv)
|
||||
{
|
||||
pipc_t *dev = (pipc_t *) priv;
|
||||
const pipc_t *dev = (pipc_t *) priv;
|
||||
#ifdef VIA_PIPC_FM_EMULATION
|
||||
uint8_t ret = ((addr & 0x03) == 0x00) ? dev->fmnmi_status : 0x00;
|
||||
#else
|
||||
@@ -1474,7 +1475,9 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
|
||||
case 0xd2:
|
||||
if (dev->local == VIA_PIPC_686B)
|
||||
smbus_piix4_setclock(dev->smbus, (val & 0x04) ? 65536 : 16384);
|
||||
/* fall-through */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0x90:
|
||||
case 0x91:
|
||||
|
||||
@@ -296,8 +296,8 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
vt82c49x_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
vt82c49x_t *dev = (vt82c49x_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const vt82c49x_t *dev = (vt82c49x_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0xa9:
|
||||
|
||||
@@ -126,8 +126,8 @@ vt82c505_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
vt82c505_read(int func, int addr, void *priv)
|
||||
{
|
||||
vt82c505_t *dev = (vt82c505_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const vt82c505_t *dev = (vt82c505_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if (func != 0)
|
||||
return ret;
|
||||
@@ -151,8 +151,8 @@ vt82c505_out(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
vt82c505_in(uint16_t addr, void *priv)
|
||||
{
|
||||
vt82c505_t *dev = (vt82c505_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const vt82c505_t *dev = (vt82c505_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f))
|
||||
ret = vt82c505_read(0, dev->index, priv);
|
||||
|
||||
@@ -137,8 +137,8 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
vl82c480_read(uint16_t addr, void *priv)
|
||||
{
|
||||
vl82c480_t *dev = (vl82c480_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const vl82c480_t *dev = (vl82c480_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (addr) {
|
||||
case 0xec:
|
||||
|
||||
@@ -368,7 +368,8 @@ wd76c10_write(uint16_t addr, uint16_t val, void *priv)
|
||||
static uint16_t
|
||||
wd76c10_read(uint16_t addr, void *priv)
|
||||
{
|
||||
wd76c10_t *dev = (wd76c10_t *) priv;
|
||||
const wd76c10_t *dev = (wd76c10_t *) priv;
|
||||
|
||||
wd76c10_log("WD76C10: R dev->regs[%04x]\n", addr);
|
||||
switch (addr) {
|
||||
case 0x1072:
|
||||
|
||||
30
src/config.c
30
src/config.c
@@ -228,7 +228,7 @@ load_monitor(int monitor_index)
|
||||
ini_section_t cat;
|
||||
char name[512];
|
||||
char temp[512];
|
||||
char *p = NULL;
|
||||
const char *p = NULL;
|
||||
|
||||
sprintf(name, "Monitor #%i", monitor_index + 1);
|
||||
sprintf(temp, "%i, %i, %i, %i", cx, cy, cw, ch);
|
||||
@@ -256,7 +256,7 @@ load_machine(void)
|
||||
{
|
||||
ini_section_t cat = ini_find_section(config, "Machine");
|
||||
char *p;
|
||||
char *migrate_from = NULL;
|
||||
const char *migrate_from = NULL;
|
||||
int c;
|
||||
int i;
|
||||
int j;
|
||||
@@ -448,7 +448,7 @@ load_machine(void)
|
||||
cpu_f = cpu_get_family(legacy_table_entry->family);
|
||||
if (cpu_f) {
|
||||
/* Save the new values. */
|
||||
ini_section_set_string(cat, "cpu_family", (char *) legacy_table_entry->family);
|
||||
ini_section_set_string(cat, "cpu_family", legacy_table_entry->family);
|
||||
ini_section_set_int(cat, "cpu_speed", legacy_table_entry->rspeed);
|
||||
ini_section_set_double(cat, "cpu_multi", legacy_table_entry->multi);
|
||||
}
|
||||
@@ -500,7 +500,7 @@ load_machine(void)
|
||||
|
||||
cpu_waitstates = ini_section_get_int(cat, "cpu_waitstates", 0);
|
||||
|
||||
p = (char *) ini_section_get_string(cat, "fpu_type", "none");
|
||||
p = ini_section_get_string(cat, "fpu_type", "none");
|
||||
fpu_type = fpu_get_type(cpu_f, cpu, p);
|
||||
|
||||
mem_size = ini_section_get_int(cat, "mem_size", 64);
|
||||
@@ -911,7 +911,7 @@ load_ports(void)
|
||||
lpt_ports[c].enabled = !!ini_section_get_int(cat, temp, (c == 0) ? 1 : 0);
|
||||
|
||||
sprintf(temp, "lpt%d_device", c + 1);
|
||||
p = (char *) ini_section_get_string(cat, temp, "none");
|
||||
p = ini_section_get_string(cat, temp, "none");
|
||||
lpt_ports[c].device = lpt_device_get_from_internal_name(p);
|
||||
}
|
||||
|
||||
@@ -1557,7 +1557,7 @@ load_other_removable_devices(void)
|
||||
ini_section_t cat = ini_find_section(config, "Other removable devices");
|
||||
char temp[512];
|
||||
char tmp2[512];
|
||||
char *p;
|
||||
const char *p;
|
||||
char s[512];
|
||||
unsigned int board = 0;
|
||||
unsigned int dev = 0;
|
||||
@@ -2017,7 +2017,7 @@ save_general(void)
|
||||
char temp[512];
|
||||
char buffer[512] = { 0 };
|
||||
|
||||
char *va_name;
|
||||
const char *va_name = NULL;
|
||||
|
||||
ini_section_set_int(cat, "vid_resize", vid_resize);
|
||||
if (vid_resize == 0)
|
||||
@@ -2216,7 +2216,7 @@ static void
|
||||
save_machine(void)
|
||||
{
|
||||
ini_section_t cat = ini_find_or_create_section(config, "Machine");
|
||||
char *p;
|
||||
const char *p;
|
||||
int c;
|
||||
int i = 0;
|
||||
int legacy_mfg;
|
||||
@@ -2226,7 +2226,7 @@ save_machine(void)
|
||||
p = machine_get_internal_name();
|
||||
ini_section_set_string(cat, "machine", p);
|
||||
|
||||
ini_section_set_string(cat, "cpu_family", (char *) cpu_f->internal_name);
|
||||
ini_section_set_string(cat, "cpu_family", cpu_f->internal_name);
|
||||
ini_section_set_int(cat, "cpu_speed", cpu_f->cpus[cpu].rspeed);
|
||||
ini_section_set_double(cat, "cpu_multi", cpu_f->cpus[cpu].multi);
|
||||
if (cpu_override)
|
||||
@@ -2247,14 +2247,14 @@ save_machine(void)
|
||||
}
|
||||
if (cpu_legacy_table[c].machine) {
|
||||
/* Look for a corresponding CPU entry. */
|
||||
cpu_legacy_table_t *legacy_table_entry;
|
||||
const cpu_legacy_table_t *legacy_table_entry;
|
||||
for (legacy_mfg = 0; legacy_mfg < 4; legacy_mfg++) {
|
||||
if (!cpu_legacy_table[c].tables[legacy_mfg])
|
||||
continue;
|
||||
|
||||
i = 0;
|
||||
while (cpu_legacy_table[c].tables[legacy_mfg][i].family) {
|
||||
legacy_table_entry = (cpu_legacy_table_t *) &cpu_legacy_table[c].tables[legacy_mfg][i];
|
||||
legacy_table_entry = &cpu_legacy_table[c].tables[legacy_mfg][i];
|
||||
|
||||
/* Match the family name, speed and multiplier. */
|
||||
if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) {
|
||||
@@ -2294,7 +2294,7 @@ save_machine(void)
|
||||
if (fpu_type == 0)
|
||||
ini_section_delete_var(cat, "fpu_type");
|
||||
else
|
||||
ini_section_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type));
|
||||
ini_section_set_string(cat, "fpu_type", fpu_get_internal_name(cpu_f, cpu, fpu_type));
|
||||
|
||||
// Write the mem_size explicitly to the setttings in order to help managers to display it without having the actual machine table
|
||||
ini_section_delete_var(cat, "mem_size");
|
||||
@@ -2613,7 +2613,7 @@ save_ports(void)
|
||||
ini_section_delete_var(cat, temp);
|
||||
else
|
||||
ini_section_set_string(cat, temp,
|
||||
(char *) lpt_device_get_internal_name(lpt_ports[c].device));
|
||||
lpt_device_get_internal_name(lpt_ports[c].device));
|
||||
}
|
||||
|
||||
ini_delete_section_if_empty(config, cat);
|
||||
@@ -2738,7 +2738,7 @@ save_other_peripherals(void)
|
||||
ini_section_delete_var(cat, temp);
|
||||
else
|
||||
ini_section_set_string(cat, temp,
|
||||
(char *) isamem_get_internal_name(isamem_type[c]));
|
||||
isamem_get_internal_name(isamem_type[c]));
|
||||
}
|
||||
|
||||
if (isartc_type == 0)
|
||||
@@ -2836,7 +2836,7 @@ save_hard_disks(void)
|
||||
if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE && hdd[c].bus != HDD_BUS_ESDI))
|
||||
ini_section_delete_var(cat, temp);
|
||||
else
|
||||
ini_section_set_string(cat, temp, (char *) hdd_preset_get_internal_name(hdd[c].speed_preset));
|
||||
ini_section_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset));
|
||||
}
|
||||
|
||||
ini_delete_section_if_empty(config, cat);
|
||||
|
||||
@@ -223,10 +223,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
|
||||
static int
|
||||
opVPCEXT(uint32_t fetchdat)
|
||||
{
|
||||
uint8_t b1, b2;
|
||||
uint8_t b1;
|
||||
uint8_t b2;
|
||||
uint16_t cent;
|
||||
time_t now;
|
||||
struct tm *tm;
|
||||
struct tm *tm = NULL;
|
||||
|
||||
if (!is_vpc) /* only emulate this on Virtual PC machines */
|
||||
return ILLEGAL(fetchdat);
|
||||
|
||||
@@ -133,13 +133,13 @@ enum {
|
||||
# define LOOKUP_INV -1
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
typedef struct fpu_t {
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
const int type;
|
||||
} FPU;
|
||||
|
||||
typedef struct {
|
||||
typedef struct cpu_t {
|
||||
const char *name;
|
||||
uint64_t cpu_type;
|
||||
const FPU *fpus;
|
||||
|
||||
@@ -51,8 +51,10 @@ opSETALC(uint32_t fetchdat)
|
||||
static int
|
||||
opF6_a16(uint32_t fetchdat)
|
||||
{
|
||||
int tempws, tempws2 = 0;
|
||||
uint16_t tempw, src16;
|
||||
int tempws = 0;
|
||||
int tempws2 = 0;
|
||||
uint16_t tempw = 0;
|
||||
uint16_t src16;
|
||||
uint8_t src, dst;
|
||||
int8_t temps;
|
||||
|
||||
@@ -167,8 +169,10 @@ opF6_a16(uint32_t fetchdat)
|
||||
static int
|
||||
opF6_a32(uint32_t fetchdat)
|
||||
{
|
||||
int tempws, tempws2 = 0;
|
||||
uint16_t tempw, src16;
|
||||
int tempws = 0;
|
||||
int tempws2 = 0;
|
||||
uint16_t tempw = 0;
|
||||
uint16_t src16;
|
||||
uint8_t src, dst;
|
||||
int8_t temps;
|
||||
|
||||
@@ -282,10 +286,13 @@ opF6_a32(uint32_t fetchdat)
|
||||
static int
|
||||
opF7_w_a16(uint32_t fetchdat)
|
||||
{
|
||||
uint32_t templ, templ2 = 0;
|
||||
int tempws, tempws2 = 0;
|
||||
uint32_t templ;
|
||||
uint32_t templ2 = 0;
|
||||
int tempws;
|
||||
int tempws2 = 0;
|
||||
int16_t temps16;
|
||||
uint16_t src, dst;
|
||||
uint16_t src;
|
||||
uint16_t dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
if (cpu_mod != 3)
|
||||
@@ -392,8 +399,10 @@ opF7_w_a16(uint32_t fetchdat)
|
||||
static int
|
||||
opF7_w_a32(uint32_t fetchdat)
|
||||
{
|
||||
uint32_t templ, templ2 = 0;
|
||||
int tempws, tempws2 = 1;
|
||||
uint32_t templ;
|
||||
uint32_t templ2 = 0;
|
||||
int tempws;
|
||||
int tempws2 = 1;
|
||||
int16_t temps16;
|
||||
uint16_t src, dst;
|
||||
|
||||
|
||||
@@ -481,6 +481,8 @@ typedef union {
|
||||
# define FP_TAG_VALID_N cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64
|
||||
#endif
|
||||
|
||||
#include "softfloat/softfloat-specialize.h"
|
||||
|
||||
#include "x87_ops_sf_arith.h"
|
||||
#include "x87_ops_sf_compare.h"
|
||||
#include "x87_ops_sf_const.h"
|
||||
|
||||
16
src/ddma.c
16
src/ddma.c
@@ -57,10 +57,10 @@ ddma_log(const char *fmt, ...)
|
||||
static uint8_t
|
||||
ddma_reg_read(uint16_t addr, void *priv)
|
||||
{
|
||||
ddma_channel_t *dev = (ddma_channel_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int ch = dev->channel;
|
||||
int dmab = (ch >= 4) ? 0xc0 : 0x00;
|
||||
const ddma_channel_t *dev = (ddma_channel_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int ch = dev->channel;
|
||||
uint8_t dmab = (ch >= 4) ? 0xc0 : 0x00;
|
||||
|
||||
switch (addr & 0x0f) {
|
||||
case 0x00:
|
||||
@@ -92,10 +92,10 @@ ddma_reg_read(uint16_t addr, void *priv)
|
||||
static void
|
||||
ddma_reg_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ddma_channel_t *dev = (ddma_channel_t *) priv;
|
||||
int ch = dev->channel;
|
||||
int page_regs[4] = { 7, 3, 1, 2 };
|
||||
int dmab = (ch >= 4) ? 0xc0 : 0x00;
|
||||
const ddma_channel_t *dev = (ddma_channel_t *) priv;
|
||||
int ch = dev->channel;
|
||||
uint8_t page_regs[4] = { 7, 3, 1, 2 };
|
||||
uint8_t dmab = (ch >= 4) ? 0xc0 : 0x00;
|
||||
|
||||
switch (addr & 0x0f) {
|
||||
case 0x00:
|
||||
|
||||
42
src/device.c
42
src/device.c
@@ -90,8 +90,8 @@ device_init(void)
|
||||
void
|
||||
device_set_context(device_context_t *c, const device_t *dev, int inst)
|
||||
{
|
||||
void *sec;
|
||||
void *single_sec;
|
||||
const void *sec;
|
||||
void *single_sec;
|
||||
|
||||
memset(c, 0, sizeof(device_context_t));
|
||||
c->dev = dev;
|
||||
@@ -143,7 +143,7 @@ device_add_common(const device_t *dev, const device_t *cd, void *p, void *params
|
||||
int c;
|
||||
|
||||
for (c = 0; c < 256; c++) {
|
||||
if (!inst && (devices[c] == (device_t *) dev)) {
|
||||
if (!inst && (devices[c] == dev)) {
|
||||
device_log("DEVICE: device already exists!\n");
|
||||
return (NULL);
|
||||
}
|
||||
@@ -343,23 +343,23 @@ device_get_priv(const device_t *dev)
|
||||
int
|
||||
device_available(const device_t *dev)
|
||||
{
|
||||
device_config_t *config = NULL;
|
||||
device_config_bios_t *bios = NULL;
|
||||
int roms_present = 0;
|
||||
int i = 0;
|
||||
const device_config_t *config = NULL;
|
||||
const device_config_bios_t *bios = NULL;
|
||||
int roms_present = 0;
|
||||
int i = 0;
|
||||
|
||||
if (dev != NULL) {
|
||||
config = (device_config_t *) dev->config;
|
||||
config = dev->config;
|
||||
if (config != NULL) {
|
||||
while (config->type != -1) {
|
||||
if (config->type == CONFIG_BIOS) {
|
||||
bios = (device_config_bios_t *) config->bios;
|
||||
bios = (const device_config_bios_t *) config->bios;
|
||||
|
||||
/* Go through the ROM's in the device configuration. */
|
||||
while (bios->files_no != 0) {
|
||||
i = 0;
|
||||
for (int bf = 0; bf < bios->files_no; bf++)
|
||||
i += !!rom_present((char *) bios->files[bf]);
|
||||
i += !!rom_present(bios->files[bf]);
|
||||
if (i == bios->files_no)
|
||||
roms_present++;
|
||||
bios++;
|
||||
@@ -385,15 +385,15 @@ device_available(const device_t *dev)
|
||||
const char *
|
||||
device_get_bios_file(const device_t *dev, const char *internal_name, int file_no)
|
||||
{
|
||||
device_config_t *config = NULL;
|
||||
device_config_bios_t *bios = NULL;
|
||||
const device_config_t *config = NULL;
|
||||
const device_config_bios_t *bios = NULL;
|
||||
|
||||
if (dev != NULL) {
|
||||
config = (device_config_t *) dev->config;
|
||||
config = dev->config;
|
||||
if (config != NULL) {
|
||||
while (config->type != -1) {
|
||||
if (config->type == CONFIG_BIOS) {
|
||||
bios = (device_config_bios_t *) config->bios;
|
||||
bios = config->bios;
|
||||
|
||||
/* Go through the ROM's in the device configuration. */
|
||||
while (bios->files_no != 0) {
|
||||
@@ -418,8 +418,8 @@ device_get_bios_file(const device_t *dev, const char *internal_name, int file_no
|
||||
int
|
||||
device_has_config(const device_t *dev)
|
||||
{
|
||||
int c = 0;
|
||||
device_config_t *config;
|
||||
int c = 0;
|
||||
const device_config_t *config;
|
||||
|
||||
if (dev == NULL)
|
||||
return 0;
|
||||
@@ -427,7 +427,7 @@ device_has_config(const device_t *dev)
|
||||
if (dev->config == NULL)
|
||||
return 0;
|
||||
|
||||
config = (device_config_t *) dev->config;
|
||||
config = dev->config;
|
||||
|
||||
while (config->type != -1) {
|
||||
if (config->type != CONFIG_MAC)
|
||||
@@ -472,10 +472,10 @@ device_register_pci_slot(const device_t *dev, int device, int type, int inta, in
|
||||
void
|
||||
device_get_name(const device_t *dev, int bus, char *name)
|
||||
{
|
||||
char *sbus = NULL;
|
||||
char *fbus;
|
||||
char *tname;
|
||||
char pbus[8] = { 0 };
|
||||
const char *sbus = NULL;
|
||||
const char *fbus;
|
||||
char *tname;
|
||||
char pbus[8] = { 0 };
|
||||
|
||||
if (dev == NULL)
|
||||
return;
|
||||
|
||||
@@ -61,7 +61,7 @@ cartridge_log(const char *fmt, ...)
|
||||
static uint8_t
|
||||
cart_read(uint32_t addr, void *priv)
|
||||
{
|
||||
cart_t *dev = (cart_t *) priv;
|
||||
const cart_t *dev = (cart_t *) priv;
|
||||
|
||||
return dev->buf[addr - dev->base];
|
||||
}
|
||||
|
||||
@@ -421,8 +421,8 @@ lm78_i2c_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv)
|
||||
uint8_t
|
||||
lm78_as99127f_read(void *priv, uint8_t reg)
|
||||
{
|
||||
lm78_t *dev = (lm78_t *) priv;
|
||||
uint8_t ret = dev->as99127f.regs[1][reg & 0x7f];
|
||||
const lm78_t *dev = (lm78_t *) priv;
|
||||
uint8_t ret = dev->as99127f.regs[1][reg & 0x7f];
|
||||
|
||||
lm78_log("LM78: read(%02X, AS99127F) = %02X\n", reg, ret);
|
||||
|
||||
|
||||
@@ -48,8 +48,8 @@ static void vt82c686_reset(vt82c686_t *dev, uint8_t initialization);
|
||||
static uint8_t
|
||||
vt82c686_read(uint16_t addr, void *priv)
|
||||
{
|
||||
vt82c686_t *dev = (vt82c686_t *) priv;
|
||||
uint8_t ret;
|
||||
const vt82c686_t *dev = (vt82c686_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
addr -= dev->io_base;
|
||||
|
||||
|
||||
@@ -205,9 +205,9 @@ i2c_handler(int set, void *bus_handle, uint8_t base, int size,
|
||||
uint8_t
|
||||
i2c_start(void *bus_handle, uint8_t addr, uint8_t read)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
uint8_t ret = 0;
|
||||
const i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
|
||||
if (!bus)
|
||||
return ret;
|
||||
@@ -230,9 +230,9 @@ i2c_start(void *bus_handle, uint8_t addr, uint8_t read)
|
||||
uint8_t
|
||||
i2c_read(void *bus_handle, uint8_t addr)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
uint8_t ret = 0;
|
||||
const i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
|
||||
if (!bus)
|
||||
return ret;
|
||||
@@ -256,9 +256,9 @@ i2c_read(void *bus_handle, uint8_t addr)
|
||||
uint8_t
|
||||
i2c_write(void *bus_handle, uint8_t addr, uint8_t data)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
i2c_t *p;
|
||||
i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
uint8_t ret = 0;
|
||||
i2c_t *p;
|
||||
const i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
|
||||
if (!bus)
|
||||
return ret;
|
||||
@@ -281,8 +281,8 @@ i2c_write(void *bus_handle, uint8_t addr, uint8_t data)
|
||||
void
|
||||
i2c_stop(void *bus_handle, uint8_t addr)
|
||||
{
|
||||
i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
const i2c_bus_t *bus = (i2c_bus_t *) bus_handle;
|
||||
i2c_t *p;
|
||||
|
||||
if (!bus)
|
||||
return;
|
||||
|
||||
@@ -171,14 +171,16 @@ i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda)
|
||||
uint8_t
|
||||
i2c_gpio_get_scl(void *dev_handle)
|
||||
{
|
||||
i2c_gpio_t *dev = (i2c_gpio_t *) dev_handle;
|
||||
const i2c_gpio_t *dev = (i2c_gpio_t *) dev_handle;
|
||||
|
||||
return dev->prev_scl;
|
||||
}
|
||||
|
||||
uint8_t
|
||||
i2c_gpio_get_sda(void *dev_handle)
|
||||
{
|
||||
i2c_gpio_t *dev = (i2c_gpio_t *) dev_handle;
|
||||
const i2c_gpio_t *dev = (i2c_gpio_t *) dev_handle;
|
||||
|
||||
i2c_gpio_log(3, "I2C GPIO %s: read myscl=%d mysda=%d slavesda=%d\n", dev->bus_name, dev->prev_scl, dev->prev_sda, dev->slave_sda);
|
||||
return dev->prev_sda && dev->slave_sda;
|
||||
}
|
||||
|
||||
@@ -45,8 +45,8 @@ ibm_5161_out(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
ibm_5161_in(uint16_t port, void *priv)
|
||||
{
|
||||
ibm_5161_t *dev = (ibm_5161_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const ibm_5161_t *dev = (ibm_5161_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->regs[port & 0x0007];
|
||||
|
||||
|
||||
@@ -288,9 +288,9 @@ ems_writew(uint32_t addr, uint16_t val, void *priv)
|
||||
static uint8_t
|
||||
ems_read(uint16_t port, void *priv)
|
||||
{
|
||||
memdev_t *dev = (memdev_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int vpage;
|
||||
const memdev_t *dev = (memdev_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
int vpage;
|
||||
|
||||
/* Get the viewport page number. */
|
||||
vpage = (port / EMS_PGSIZE);
|
||||
|
||||
@@ -259,7 +259,8 @@ isapnp_reset_ld_regs(isapnp_device_t *ld)
|
||||
static uint8_t
|
||||
isapnp_read_rangecheck(UNUSED(uint16_t addr), void *priv)
|
||||
{
|
||||
isapnp_device_t *dev = (isapnp_device_t *) priv;
|
||||
const isapnp_device_t *dev = (isapnp_device_t *) priv;
|
||||
|
||||
return (dev->regs[0x31] & 0x01) ? 0x55 : 0xaa;
|
||||
}
|
||||
|
||||
|
||||
@@ -191,11 +191,11 @@ mm67_chkalrm(nvr_t *nvr, int8_t addr)
|
||||
static void
|
||||
mm67_tick(nvr_t *nvr)
|
||||
{
|
||||
rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
uint8_t *regs = nvr->regs;
|
||||
int mon;
|
||||
int year;
|
||||
int f = 0;
|
||||
const rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
uint8_t *regs = nvr->regs;
|
||||
int mon;
|
||||
int year;
|
||||
int f = 0;
|
||||
|
||||
/* Update and set interrupt if needed. */
|
||||
regs[MM67_SEC] = RTC_BCDINC(nvr->regs[MM67_SEC], 1);
|
||||
@@ -295,8 +295,8 @@ mm67_tick(nvr_t *nvr)
|
||||
static void
|
||||
mm67_time_get(nvr_t *nvr, struct tm *tm)
|
||||
{
|
||||
rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
uint8_t *regs = nvr->regs;
|
||||
const rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
const uint8_t *regs = nvr->regs;
|
||||
|
||||
/* NVR is in BCD data mode. */
|
||||
tm->tm_sec = RTC_DCB(regs[MM67_SEC]);
|
||||
@@ -325,9 +325,9 @@ mm67_time_get(nvr_t *nvr, struct tm *tm)
|
||||
static void
|
||||
mm67_time_set(nvr_t *nvr, struct tm *tm)
|
||||
{
|
||||
rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
uint8_t *regs = nvr->regs;
|
||||
int year;
|
||||
const rtcdev_t *dev = (rtcdev_t *) nvr->data;
|
||||
uint8_t *regs = nvr->regs;
|
||||
int year;
|
||||
|
||||
/* NVR is in BCD data mode. */
|
||||
regs[MM67_SEC] = RTC_BCD(tm->tm_sec);
|
||||
@@ -608,9 +608,6 @@ isartc_close(void *priv)
|
||||
io_removehandler(dev->base_addr, dev->base_addrsz,
|
||||
dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev);
|
||||
|
||||
if (dev->nvr.fn != NULL)
|
||||
free(dev->nvr.fn);
|
||||
|
||||
free(dev);
|
||||
}
|
||||
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include <86box/io.h>
|
||||
#include <86box/pic.h>
|
||||
#include <86box/pit.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <86box/ppi.h>
|
||||
#include <86box/mem.h>
|
||||
@@ -463,7 +464,9 @@ kbc_at_poll_at(atkbc_t *dev)
|
||||
case STATE_KBC_AMI_OUT:
|
||||
if (dev->status & STAT_OFULL)
|
||||
break;
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case STATE_MAIN_IBF:
|
||||
default:
|
||||
at_main_ibf:
|
||||
@@ -586,7 +589,9 @@ kbc_at_poll_ps2(atkbc_t *dev)
|
||||
case STATE_KBC_AMI_OUT:
|
||||
if (dev->status & STAT_OFULL)
|
||||
break;
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case STATE_MAIN_IBF:
|
||||
default:
|
||||
ps2_main_ibf:
|
||||
@@ -1027,6 +1032,9 @@ write64_generic(void *priv, uint8_t val)
|
||||
kbc_at_log("ATkbc: pulse %01X\n", val & 0x0f);
|
||||
pulse_output(dev, val & 0x0f);
|
||||
return 0;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
kbc_at_log("ATkbc: bad command %02X\n", val);
|
||||
@@ -1328,12 +1336,13 @@ write64_siemens(void *priv, uint8_t val)
|
||||
static uint8_t
|
||||
write60_quadtel(void *priv, UNUSED(uint8_t val))
|
||||
{
|
||||
atkbc_t *dev = (atkbc_t *) priv;
|
||||
const atkbc_t *dev = (atkbc_t *) priv;
|
||||
|
||||
switch (dev->command) {
|
||||
case 0xcf: /*??? - sent by MegaPC BIOS*/
|
||||
kbc_at_log("ATkbc: ??? - sent by MegaPC BIOS\n");
|
||||
return 0;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -1392,7 +1401,7 @@ write64_quadtel(void *priv, uint8_t val)
|
||||
static uint8_t
|
||||
write60_toshiba(void *priv, uint8_t val)
|
||||
{
|
||||
atkbc_t *dev = (atkbc_t *) priv;
|
||||
const atkbc_t *dev = (atkbc_t *) priv;
|
||||
|
||||
switch (dev->command) {
|
||||
case 0xb6: /* T3100e - set color/mono switch */
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#include <86box/snd_speaker.h>
|
||||
#include <86box/video.h>
|
||||
#include <86box/keyboard.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
|
||||
#ifdef ENABLE_KBC_AT_DEV_LOG
|
||||
int kbc_at_dev_do_log = ENABLE_KBC_AT_DEV_LOG;
|
||||
@@ -135,7 +136,9 @@ kbc_at_dev_poll(void *priv)
|
||||
dev->port->wantcmd = 0;
|
||||
break;
|
||||
}
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case DEV_STATE_MAIN_WANT_IN:
|
||||
/* Output command response and then return to main loop #2. */
|
||||
if ((dev->port->out_new == -1) && (dev->cmd_queue_start != dev->cmd_queue_end)) {
|
||||
|
||||
@@ -87,8 +87,8 @@ fake_shift_needed(uint16_t scan)
|
||||
void
|
||||
key_process(uint16_t scan, int down)
|
||||
{
|
||||
scancode *codes = scan_table;
|
||||
int c;
|
||||
const scancode *codes = scan_table;
|
||||
int c;
|
||||
|
||||
if (!codes)
|
||||
return;
|
||||
@@ -222,7 +222,7 @@ keyboard_input(int down, uint16_t scan)
|
||||
static uint8_t
|
||||
keyboard_do_break(uint16_t scan)
|
||||
{
|
||||
scancode *codes = scan_table;
|
||||
const scancode *codes = scan_table;
|
||||
|
||||
/* TODO: The keyboard controller needs to report the AT flag to us here. */
|
||||
if (is286 && ((keyboard_mode & 3) == 3)) {
|
||||
@@ -266,7 +266,7 @@ keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl)
|
||||
void
|
||||
keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl)
|
||||
{
|
||||
scancode *codes = scan_table;
|
||||
const scancode *codes = scan_table;
|
||||
|
||||
int i;
|
||||
|
||||
@@ -320,7 +320,7 @@ keyboard_isfsenter(void)
|
||||
}
|
||||
|
||||
int
|
||||
keyboard_isfsenter_down(void)
|
||||
keyboard_isfsenter_up(void)
|
||||
{
|
||||
return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x049] && !recv_key[0x149]);
|
||||
}
|
||||
@@ -333,7 +333,7 @@ keyboard_isfsexit(void)
|
||||
}
|
||||
|
||||
int
|
||||
keyboard_isfsexit_down(void)
|
||||
keyboard_isfsexit_up(void)
|
||||
{
|
||||
return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x051] && !recv_key[0x151]);
|
||||
}
|
||||
|
||||
@@ -594,8 +594,8 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
kbd_read(uint16_t port, void *priv)
|
||||
{
|
||||
xtkbd_t *kbd = (xtkbd_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const xtkbd_t *kbd = (xtkbd_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
switch (port) {
|
||||
case 0x60: /* Keyboard Data Register (aka Port A) */
|
||||
|
||||
@@ -226,7 +226,6 @@ lt_read(uint16_t port, void *priv)
|
||||
return (dev->control_val | 0x0F) & ~IRQ_MASK;
|
||||
else
|
||||
return 0xff;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
@@ -26,6 +26,7 @@
|
||||
#include <86box/timer.h>
|
||||
#include <86box/serial.h>
|
||||
#include <86box/mouse.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
#define SERMOUSE_PORT 0 /* attach to Serial0 */
|
||||
@@ -507,7 +508,9 @@ sermouse_command_timer(void *priv)
|
||||
break;
|
||||
case PHASE_ACK:
|
||||
serial_write_fifo(dev->serial, 0x06);
|
||||
/* FALLTHROUGH */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case PHASE_BAUD_RATE:
|
||||
sermouse_command_phase_idle(dev);
|
||||
sermouse_timer_on(dev, dev->report_period, 1);
|
||||
@@ -645,7 +648,9 @@ ltsermouse_write(UNUSED(struct serial_s *serial), void *priv, uint8_t data)
|
||||
switch (data) {
|
||||
default:
|
||||
mouse_serial_log("Serial mouse: Invalid period %02X, using 1200 bps\n", data);
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 0x6E:
|
||||
dev->transmit_period = sermouse_transmit_period(dev, 1200, -1);
|
||||
break;
|
||||
|
||||
@@ -363,8 +363,8 @@ pci_bridge_write(int func, int addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
pci_bridge_read(int func, int addr, void *priv)
|
||||
{
|
||||
pci_bridge_t *dev = (pci_bridge_t *) priv;
|
||||
uint8_t ret;
|
||||
const pci_bridge_t *dev = (pci_bridge_t *) priv;
|
||||
uint8_t ret;
|
||||
|
||||
if (func > 0)
|
||||
ret = 0xff;
|
||||
|
||||
@@ -78,7 +78,8 @@ phoenix_486_jumper_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
phoenix_486_jumper_read(UNUSED(uint16_t addr), void *priv)
|
||||
{
|
||||
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
|
||||
const phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
|
||||
|
||||
phoenix_486_jumper_log("Phoenix 486 Jumper: Read %02x\n", dev->jumper);
|
||||
return dev->jumper;
|
||||
}
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
#include <86box/timer.h>
|
||||
#include <86box/i2c.h>
|
||||
#include <86box/smbus.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
|
||||
#ifdef ENABLE_SMBUS_ALI7101_LOG
|
||||
int smbus_ali7101_do_log = ENABLE_SMBUS_ALI7101_LOG;
|
||||
@@ -193,7 +194,9 @@ smbus_ali7101_write(uint16_t addr, uint8_t val, void *priv)
|
||||
case 0x4: /* block R/W */
|
||||
timer_bytes++; /* count the SMBus length byte now */
|
||||
|
||||
/* fall-through */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
default: /* unknown */
|
||||
dev->next_stat = 0x20; /* raise DEV_ERR */
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#include <86box/timer.h>
|
||||
#include <86box/i2c.h>
|
||||
#include <86box/smbus.h>
|
||||
#include <86box/plat_fallthrough.h>
|
||||
|
||||
#ifdef ENABLE_SMBUS_PIIX4_LOG
|
||||
int smbus_piix4_do_log = ENABLE_SMBUS_PIIX4_LOG;
|
||||
@@ -195,7 +196,9 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
|
||||
timer_bytes++;
|
||||
}
|
||||
|
||||
/* fall-through */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0xc: /* I2C process call */
|
||||
if (!read) { /* word write (only when writing) */
|
||||
@@ -214,7 +217,9 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
|
||||
case 0x5: /* block R/W */
|
||||
timer_bytes++; /* count the SMBus length byte now */
|
||||
|
||||
/* fall-through */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0xd: /* I2C block R/W */
|
||||
i2c_write(i2c_smbus, smbus_addr, dev->cmd);
|
||||
@@ -247,7 +252,9 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
|
||||
i2c_write(i2c_smbus, smbus_addr, dev->cmd);
|
||||
timer_bytes++;
|
||||
|
||||
/* fall-through */
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0xe: /* I2C with 7-bit address */
|
||||
if (!read) { /* word write (only when writing) */
|
||||
|
||||
@@ -173,13 +173,13 @@ esdi_get_xfer_time(UNUSED(esdi_t *esdi), int size)
|
||||
static int
|
||||
get_sector(esdi_t *esdi, off64_t *addr)
|
||||
{
|
||||
drive_t *drive = &esdi->drives[esdi->drive_sel];
|
||||
int heads = drive->cfg_hpc;
|
||||
int sectors = drive->cfg_spt;
|
||||
int c;
|
||||
int h;
|
||||
int s;
|
||||
int sector;
|
||||
const drive_t *drive = &esdi->drives[esdi->drive_sel];
|
||||
int heads = drive->cfg_hpc;
|
||||
int sectors = drive->cfg_spt;
|
||||
int c;
|
||||
int h;
|
||||
int s;
|
||||
int sector;
|
||||
|
||||
if (esdi->head > heads) {
|
||||
esdi_at_log("esdi_get_sector: past end of configured heads\n");
|
||||
@@ -338,7 +338,9 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
esdi->command &= ~0x03;
|
||||
if (val & 0x02)
|
||||
fatal("Read with ECC\n");
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case 0xa0:
|
||||
esdi->status = STAT_BUSY;
|
||||
@@ -397,7 +399,9 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
default:
|
||||
esdi_at_log("WD1007: bad command %02X\n", val);
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case 0xe8: /*???*/
|
||||
esdi->status = STAT_BUSY;
|
||||
esdi_set_callback(esdi, 200 * HDC_TIME);
|
||||
@@ -878,8 +882,8 @@ wd1007vse1_init(UNUSED(const device_t *info))
|
||||
static void
|
||||
wd1007vse1_close(void *priv)
|
||||
{
|
||||
esdi_t *esdi = (esdi_t *) priv;
|
||||
drive_t *drive;
|
||||
esdi_t *esdi = (esdi_t *) priv;
|
||||
const drive_t *drive;
|
||||
|
||||
for (uint8_t d = 0; d < 2; d++) {
|
||||
drive = &esdi->drives[d];
|
||||
|
||||
@@ -352,10 +352,10 @@ complete_command_status(esdi_t *dev)
|
||||
static void
|
||||
esdi_callback(void *priv)
|
||||
{
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
drive_t *drive;
|
||||
int val;
|
||||
double cmd_time = 0.0;
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
const drive_t *drive;
|
||||
int val;
|
||||
double cmd_time = 0.0;
|
||||
|
||||
esdi_mca_set_callback(dev, 0);
|
||||
|
||||
@@ -1059,7 +1059,7 @@ esdi_writew(uint16_t port, uint16_t val, void *priv)
|
||||
static uint8_t
|
||||
esdi_mca_read(int port, void *priv)
|
||||
{
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
const esdi_t *dev = (esdi_t *) priv;
|
||||
|
||||
esdi_mca_log("ESDI: mcard(%04x)\n", port);
|
||||
|
||||
@@ -1132,7 +1132,7 @@ esdi_mca_write(int port, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
esdi_mca_feedb(void *priv)
|
||||
{
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
const esdi_t *dev = (esdi_t *) priv;
|
||||
|
||||
return (dev->pos_regs[2] & 1);
|
||||
}
|
||||
@@ -1210,8 +1210,8 @@ esdi_init(UNUSED(const device_t *info))
|
||||
static void
|
||||
esdi_close(void *priv)
|
||||
{
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
drive_t *drive;
|
||||
esdi_t *dev = (esdi_t *) priv;
|
||||
const drive_t *drive;
|
||||
|
||||
dev->drives[0].present = dev->drives[1].present = 0;
|
||||
|
||||
|
||||
@@ -597,13 +597,13 @@ ide_hd_identify(ide_t *ide)
|
||||
static void
|
||||
ide_identify(ide_t *ide)
|
||||
{
|
||||
int d;
|
||||
int i;
|
||||
int max_pio;
|
||||
int max_sdma;
|
||||
int max_mdma;
|
||||
int max_udma;
|
||||
ide_t *ide_other = ide_drives[ide->channel ^ 1];
|
||||
int d;
|
||||
int i;
|
||||
int max_pio;
|
||||
int max_sdma;
|
||||
int max_mdma;
|
||||
int max_udma;
|
||||
const ide_t *ide_other = ide_drives[ide->channel ^ 1];
|
||||
|
||||
ide_log("IDE IDENTIFY or IDENTIFY PACKET DEVICE on board %i (channel %i)\n", ide->board, ide->channel);
|
||||
|
||||
@@ -1114,8 +1114,8 @@ ide_atapi_packet_read(ide_t *ide, int length)
|
||||
{
|
||||
scsi_common_t *dev = ide->sc;
|
||||
|
||||
uint16_t *bufferw;
|
||||
uint32_t *bufferl;
|
||||
const uint16_t *bufferw;
|
||||
const uint32_t *bufferl;
|
||||
|
||||
uint32_t temp = 0;
|
||||
|
||||
@@ -1311,7 +1311,7 @@ ide_writew(uint16_t addr, uint16_t val, void *priv)
|
||||
static void
|
||||
ide_writel(uint16_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
ide_board_t *dev = (ide_board_t *) priv;
|
||||
const ide_board_t *dev = (ide_board_t *) priv;
|
||||
|
||||
ide_t *ide;
|
||||
int ch;
|
||||
@@ -1655,7 +1655,9 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
|
||||
disabled, the Read Multiple operation is rejected with an Aborted Com-
|
||||
mand error. */
|
||||
ide->blockcount = 0;
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case WIN_READ:
|
||||
case WIN_READ_NORETRY:
|
||||
@@ -1704,7 +1706,9 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
|
||||
/* Turn on the activity indicator *here* so that it gets turned on
|
||||
less times. */
|
||||
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1);
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case WIN_WRITE:
|
||||
case WIN_WRITE_NORETRY:
|
||||
@@ -1843,6 +1847,9 @@ ide_bad_command:
|
||||
return;
|
||||
}
|
||||
return;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1864,9 +1871,9 @@ ide_read_data(ide_t *ide, int length)
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t *idebufferb = (uint8_t *) ide->buffer;
|
||||
uint16_t *idebufferw = ide->buffer;
|
||||
uint32_t *idebufferl = (uint32_t *) ide->buffer;
|
||||
const uint8_t *idebufferb = (uint8_t *) ide->buffer;
|
||||
const uint16_t *idebufferw = ide->buffer;
|
||||
const uint32_t *idebufferl = (uint32_t *) ide->buffer;
|
||||
|
||||
if (ide->command == WIN_PACKETCMD) {
|
||||
ide->pos = 0;
|
||||
@@ -1946,7 +1953,7 @@ ide_status(ide_t *ide, ide_t *ide_other, int ch)
|
||||
uint8_t
|
||||
ide_readb(uint16_t addr, void *priv)
|
||||
{
|
||||
ide_board_t *dev = (ide_board_t *) priv;
|
||||
const ide_board_t *dev = (ide_board_t *) priv;
|
||||
|
||||
int ch;
|
||||
int absent = 0;
|
||||
@@ -2062,6 +2069,9 @@ ide_readb(uint16_t addr, void *priv)
|
||||
ide_irq_lower(ide);
|
||||
temp = ide_status(ide, ide_drives[ch ^ 1], ch);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
ide_log("ide_readb(%04X, %08X) = %02X\n", addr, priv, temp);
|
||||
@@ -2073,7 +2083,7 @@ ide_read_alt_status(UNUSED(uint16_t addr), void *priv)
|
||||
{
|
||||
uint8_t temp = 0xff;
|
||||
|
||||
ide_board_t *dev = (ide_board_t *) priv;
|
||||
const ide_board_t *dev = (ide_board_t *) priv;
|
||||
|
||||
ide_t *ide;
|
||||
int ch;
|
||||
@@ -2094,7 +2104,7 @@ ide_readw(uint16_t addr, void *priv)
|
||||
{
|
||||
uint16_t temp = 0xffff;
|
||||
|
||||
ide_board_t *dev = (ide_board_t *) priv;
|
||||
const ide_board_t *dev = (ide_board_t *) priv;
|
||||
|
||||
ide_t *ide;
|
||||
int ch;
|
||||
@@ -2124,7 +2134,7 @@ ide_readl(uint16_t addr, void *priv)
|
||||
uint16_t temp2;
|
||||
uint32_t temp = 0xffffffff;
|
||||
|
||||
ide_board_t *dev = (ide_board_t *) priv;
|
||||
const ide_board_t *dev = (ide_board_t *) priv;
|
||||
|
||||
ide_t *ide;
|
||||
int ch;
|
||||
@@ -2620,11 +2630,11 @@ id_not_found:
|
||||
uint8_t
|
||||
ide_read_ali_75(void)
|
||||
{
|
||||
ide_t *ide0;
|
||||
ide_t *ide1;
|
||||
int ch0;
|
||||
int ch1;
|
||||
uint8_t ret = 0x00;
|
||||
const ide_t *ide0;
|
||||
const ide_t *ide1;
|
||||
int ch0;
|
||||
int ch1;
|
||||
uint8_t ret = 0x00;
|
||||
|
||||
ch0 = ide_boards[0]->cur_dev;
|
||||
ch1 = ide_boards[1]->cur_dev;
|
||||
@@ -2646,11 +2656,11 @@ ide_read_ali_75(void)
|
||||
uint8_t
|
||||
ide_read_ali_76(void)
|
||||
{
|
||||
ide_t *ide0;
|
||||
ide_t *ide1;
|
||||
int ch0;
|
||||
int ch1;
|
||||
uint8_t ret = 0x00;
|
||||
const ide_t *ide0;
|
||||
const ide_t *ide1;
|
||||
int ch0;
|
||||
int ch1;
|
||||
uint8_t ret = 0x00;
|
||||
|
||||
ch0 = ide_boards[0]->cur_dev;
|
||||
ch1 = ide_boards[1]->cur_dev;
|
||||
|
||||
@@ -41,7 +41,7 @@ typedef struct cmd640_t {
|
||||
uint8_t vlb_idx;
|
||||
uint8_t id;
|
||||
uint8_t in_cfg;
|
||||
uint8_t single_channel;
|
||||
uint8_t channels;
|
||||
uint8_t pci, regs[256];
|
||||
uint32_t local;
|
||||
int slot;
|
||||
@@ -89,6 +89,10 @@ cmd640_set_irq(int channel, void *priv)
|
||||
}
|
||||
|
||||
channel &= 0x01;
|
||||
|
||||
if (!(dev->channels & (1 << channel)))
|
||||
return;
|
||||
|
||||
if (irq) {
|
||||
if (dev->irq_mode[channel] == 1)
|
||||
pci_set_irq(dev->slot, dev->irq_pin);
|
||||
@@ -108,40 +112,41 @@ cmd640_ide_handlers(cmd640_t *dev)
|
||||
uint16_t main;
|
||||
uint16_t side;
|
||||
|
||||
ide_pri_disable();
|
||||
if (dev->channels & 0x01) {
|
||||
ide_pri_disable();
|
||||
|
||||
if ((dev->regs[0x09] & 0x01) && (dev->regs[0x50] & 0x40)) {
|
||||
main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8);
|
||||
side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2;
|
||||
} else {
|
||||
main = 0x1f0;
|
||||
side = 0x3f6;
|
||||
if ((dev->regs[0x09] & 0x01) && (dev->regs[0x50] & 0x40)) {
|
||||
main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8);
|
||||
side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2;
|
||||
} else {
|
||||
main = 0x1f0;
|
||||
side = 0x3f6;
|
||||
}
|
||||
|
||||
ide_set_base(0, main);
|
||||
ide_set_side(0, side);
|
||||
|
||||
if (dev->regs[0x04] & 0x01)
|
||||
ide_pri_enable();
|
||||
}
|
||||
|
||||
ide_set_base(0, main);
|
||||
ide_set_side(0, side);
|
||||
if (dev->channels & 0x02) {
|
||||
ide_sec_disable();
|
||||
|
||||
if (dev->regs[0x04] & 0x01)
|
||||
ide_pri_enable();
|
||||
if ((dev->regs[0x09] & 0x04) && (dev->regs[0x50] & 0x40)) {
|
||||
main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8);
|
||||
side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2;
|
||||
} else {
|
||||
main = 0x170;
|
||||
side = 0x376;
|
||||
}
|
||||
|
||||
if (dev->single_channel)
|
||||
return;
|
||||
ide_set_base(1, main);
|
||||
ide_set_side(1, side);
|
||||
|
||||
ide_sec_disable();
|
||||
|
||||
if ((dev->regs[0x09] & 0x04) && (dev->regs[0x50] & 0x40)) {
|
||||
main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8);
|
||||
side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2;
|
||||
} else {
|
||||
main = 0x170;
|
||||
side = 0x376;
|
||||
if ((dev->regs[0x04] & 0x01) && (dev->regs[0x51] & 0x08))
|
||||
ide_sec_enable();
|
||||
}
|
||||
|
||||
ide_set_base(1, main);
|
||||
ide_set_side(1, side);
|
||||
|
||||
if ((dev->regs[0x04] & 0x01) && (dev->regs[0x51] & 0x08))
|
||||
ide_sec_enable();
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -368,22 +373,49 @@ cmd640_reset(void *priv)
|
||||
{
|
||||
cmd640_t *dev = (cmd640_t *) priv;
|
||||
int i = 0;
|
||||
int min_channel;
|
||||
int max_channel;
|
||||
|
||||
switch (dev->channels) {
|
||||
default:
|
||||
case 0x00:
|
||||
min_channel = max_channel = 0;
|
||||
break;
|
||||
case 0x01:
|
||||
min_channel = 0;
|
||||
max_channel = 1;
|
||||
break;
|
||||
case 0x02:
|
||||
min_channel = 2;
|
||||
max_channel = 3;
|
||||
break;
|
||||
case 0x03:
|
||||
min_channel = 0;
|
||||
max_channel = 3;
|
||||
break;
|
||||
}
|
||||
|
||||
for (i = 0; i < CDROM_NUM; i++) {
|
||||
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv)
|
||||
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel >= min_channel) &&
|
||||
(cdrom[i].ide_channel <= max_channel) && cdrom[i].priv)
|
||||
scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
|
||||
}
|
||||
for (i = 0; i < ZIP_NUM; i++) {
|
||||
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv)
|
||||
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel >= min_channel) &&
|
||||
(zip_drives[i].ide_channel <= max_channel) && zip_drives[i].priv)
|
||||
zip_reset((scsi_common_t *) zip_drives[i].priv);
|
||||
}
|
||||
for (i = 0; i < MO_NUM; i++) {
|
||||
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv)
|
||||
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel >= min_channel) &&
|
||||
(mo_drives[i].ide_channel <= max_channel) && mo_drives[i].priv)
|
||||
mo_reset((scsi_common_t *) mo_drives[i].priv);
|
||||
}
|
||||
|
||||
cmd640_set_irq(0x00, priv);
|
||||
cmd640_set_irq(0x01, priv);
|
||||
if (dev->channels & 0x01)
|
||||
cmd640_set_irq(0x00, priv);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
cmd640_set_irq(0x01, priv);
|
||||
|
||||
memset(dev->regs, 0x00, sizeof(dev->regs));
|
||||
|
||||
@@ -429,6 +461,8 @@ cmd640_reset(void *priv)
|
||||
dev->irq_pin = PCI_INTA;
|
||||
dev->irq_line = 14;
|
||||
} else {
|
||||
dev->regs[0x04] = 0x01; /* To make sure the two channels get enabled. */
|
||||
|
||||
if ((dev->local & 0xffff) == 0x0078)
|
||||
dev->regs[0x50] |= 0x20; /* 0 = 178h, 17Ch; 1 = 078h, 07Ch */
|
||||
|
||||
@@ -461,18 +495,26 @@ cmd640_init(const device_t *info)
|
||||
dev->pci = !!(info->flags & DEVICE_PCI);
|
||||
dev->local = info->local;
|
||||
|
||||
dev->channels = ((info->local & 0x60000) >> 17) & 0x03;
|
||||
|
||||
if (info->flags & DEVICE_PCI) {
|
||||
device_add(&ide_pci_2ch_device);
|
||||
|
||||
dev->slot = pci_add_card(PCI_ADD_IDE, cmd640_pci_read, cmd640_pci_write, dev);
|
||||
|
||||
ide_set_bus_master(0, NULL, cmd640_set_irq, dev);
|
||||
ide_set_bus_master(1, NULL, cmd640_set_irq, dev);
|
||||
if (dev->channels & 0x01)
|
||||
ide_set_bus_master(0, NULL, cmd640_set_irq, dev);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
ide_set_bus_master(1, NULL, cmd640_set_irq, dev);
|
||||
|
||||
/* The CMD PCI-0640B IDE controller has no DMA capability,
|
||||
so set our devices IDE devices to force ATA-3 (no DMA). */
|
||||
ide_board_set_force_ata3(0, 1);
|
||||
ide_board_set_force_ata3(1, 1);
|
||||
if (dev->channels & 0x01)
|
||||
ide_board_set_force_ata3(0, 1);
|
||||
|
||||
if (dev->channels & 0x02)
|
||||
ide_board_set_force_ata3(1, 1);
|
||||
|
||||
#if 0
|
||||
ide_pri_disable();
|
||||
@@ -486,8 +528,6 @@ cmd640_init(const device_t *info)
|
||||
dev);
|
||||
}
|
||||
|
||||
dev->single_channel = !!(info->local & 0x20000);
|
||||
|
||||
next_id++;
|
||||
|
||||
cmd640_reset(dev);
|
||||
@@ -499,7 +539,7 @@ const device_t ide_cmd640_vlb_device = {
|
||||
.name = "CMD PCI-0640B VLB",
|
||||
.internal_name = "ide_cmd640_vlb",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x0078,
|
||||
.local = 0x60078,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
@@ -513,7 +553,63 @@ const device_t ide_cmd640_vlb_178_device = {
|
||||
.name = "CMD PCI-0640B VLB (Port 178h)",
|
||||
.internal_name = "ide_cmd640_vlb_178",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x0178,
|
||||
.local = 0x60178,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_cmd640_vlb_pri_device = {
|
||||
.name = "CMD PCI-0640B VLB",
|
||||
.internal_name = "ide_cmd640_vlb",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x20078,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_cmd640_vlb_pri_178_device = {
|
||||
.name = "CMD PCI-0640B VLB (Port 178h)",
|
||||
.internal_name = "ide_cmd640_vlb_178",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x20178,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_cmd640_vlb_sec_device = {
|
||||
.name = "CMD PCI-0640B VLB",
|
||||
.internal_name = "ide_cmd640_vlb",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x40078,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_cmd640_vlb_sec_178_device = {
|
||||
.name = "CMD PCI-0640B VLB (Port 178h)",
|
||||
.internal_name = "ide_cmd640_vlb_178",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 0x40178,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
@@ -527,7 +623,7 @@ const device_t ide_cmd640_pci_device = {
|
||||
.name = "CMD PCI-0640B PCI",
|
||||
.internal_name = "ide_cmd640_pci",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = 0x0a,
|
||||
.local = 0x6000a,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
@@ -541,7 +637,7 @@ const device_t ide_cmd640_pci_legacy_only_device = {
|
||||
.name = "CMD PCI-0640B PCI (Legacy Mode Only)",
|
||||
.internal_name = "ide_cmd640_pci_legacy_only",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = 0x00,
|
||||
.local = 0x60000,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
@@ -564,3 +660,17 @@ const device_t ide_cmd640_pci_single_channel_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_cmd640_pci_single_channel_sec_device = {
|
||||
.name = "CMD PCI-0640B PCI",
|
||||
.internal_name = "ide_cmd640_pci_single_channel_sec",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = 0x4000a,
|
||||
.init = cmd640_init,
|
||||
.close = cmd640_close,
|
||||
.reset = cmd640_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
@@ -90,7 +90,7 @@ cmd646_set_irq(int channel, void *priv)
|
||||
static int
|
||||
cmd646_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv)
|
||||
{
|
||||
cmd646_t *dev = (cmd646_t *) priv;
|
||||
const cmd646_t *dev = (cmd646_t *) priv;
|
||||
|
||||
return sff_bus_master_dma(channel, data, transfer_length, out, dev->bm[channel & 0x01]);
|
||||
}
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
typedef struct opti611_t {
|
||||
uint8_t is_sec;
|
||||
uint8_t tries;
|
||||
uint8_t in_cfg;
|
||||
uint8_t cfg_locked;
|
||||
@@ -92,8 +93,8 @@ opti611_cfg_writel(uint16_t addr, uint32_t val, void *priv)
|
||||
static uint8_t
|
||||
opti611_cfg_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
opti611_t *dev = (opti611_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
const opti611_t *dev = (opti611_t *) priv;
|
||||
|
||||
addr &= 0x0007;
|
||||
|
||||
@@ -254,28 +255,54 @@ opti611_ide_readl(uint16_t addr, void *priv)
|
||||
static void
|
||||
opti611_ide_handler(opti611_t *dev)
|
||||
{
|
||||
ide_pri_disable();
|
||||
io_removehandler(0x01f0, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
io_removehandler(0x01f0, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
if (dev->is_sec) {
|
||||
ide_sec_disable();
|
||||
io_removehandler(0x0170, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
io_removehandler(0x0170, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
|
||||
if (dev->in_cfg && !dev->cfg_locked) {
|
||||
io_sethandler(0x01f0, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
if (dev->in_cfg && !dev->cfg_locked) {
|
||||
io_sethandler(0x0170, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
} else {
|
||||
if (dev->regs[0x03] & 0x01)
|
||||
ide_sec_enable();
|
||||
io_sethandler(0x0170, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
}
|
||||
} else {
|
||||
if (dev->regs[0x03] & 0x01)
|
||||
ide_pri_enable();
|
||||
io_sethandler(0x01f0, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
ide_pri_disable();
|
||||
io_removehandler(0x01f0, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
io_removehandler(0x01f0, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
|
||||
if (dev->in_cfg && !dev->cfg_locked) {
|
||||
io_sethandler(0x01f0, 0x0007,
|
||||
opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl,
|
||||
opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel,
|
||||
dev);
|
||||
} else {
|
||||
if (dev->regs[0x03] & 0x01)
|
||||
ide_pri_enable();
|
||||
io_sethandler(0x01f0, 0x0007,
|
||||
opti611_ide_read, opti611_ide_readw, opti611_ide_readl,
|
||||
opti611_ide_write, opti611_ide_writew, opti611_ide_writel,
|
||||
dev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -293,6 +320,8 @@ opti611_init(UNUSED(const device_t *info))
|
||||
opti611_t *dev = (opti611_t *) malloc(sizeof(opti611_t));
|
||||
memset(dev, 0, sizeof(opti611_t));
|
||||
|
||||
dev->is_sec = info->local;
|
||||
|
||||
dev->regs[0x12] = 0x80;
|
||||
dev->regs[0x03] = 0x01;
|
||||
dev->regs[0x05] = 0x20;
|
||||
@@ -317,3 +346,17 @@ const device_t ide_opti611_vlb_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ide_opti611_vlb_sec_device = {
|
||||
.name = "OPTi 82C611/82C611A VLB (Secondary)",
|
||||
.internal_name = "ide_opti611_vlb",
|
||||
.flags = DEVICE_VLB,
|
||||
.local = 1,
|
||||
.init = opti611_init,
|
||||
.close = opti611_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
@@ -222,7 +222,7 @@ sff_bus_master_writel(uint16_t port, uint32_t val, void *priv)
|
||||
uint8_t
|
||||
sff_bus_master_read(uint16_t port, void *priv)
|
||||
{
|
||||
sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
const sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
@@ -261,7 +261,7 @@ sff_bus_master_read(uint16_t port, void *priv)
|
||||
static uint16_t
|
||||
sff_bus_master_readw(uint16_t port, void *priv)
|
||||
{
|
||||
sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
const sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
@@ -290,7 +290,7 @@ sff_bus_master_readw(uint16_t port, void *priv)
|
||||
static uint32_t
|
||||
sff_bus_master_readl(uint16_t port, void *priv)
|
||||
{
|
||||
sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
const sff8038i_t *dev = (sff8038i_t *) priv;
|
||||
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
|
||||
@@ -171,7 +171,7 @@ irq_update(mfm_t *mfm)
|
||||
static int
|
||||
get_sector(mfm_t *mfm, off64_t *addr)
|
||||
{
|
||||
drive_t *drive = &mfm->drives[mfm->drvsel];
|
||||
const drive_t *drive = &mfm->drives[mfm->drvsel];
|
||||
|
||||
/* FIXME: See if this is even needed - if the code is present, IBM AT
|
||||
diagnostics v2.07 will error with: ERROR 152 - SYSTEM BOARD. */
|
||||
@@ -734,7 +734,7 @@ mfm_close(void *priv)
|
||||
mfm_t *mfm = (mfm_t *) priv;
|
||||
|
||||
for (uint8_t d = 0; d < 2; d++) {
|
||||
drive_t *drive = &mfm->drives[d];
|
||||
const drive_t *drive = &mfm->drives[d];
|
||||
|
||||
hdd_image_close(drive->hdd_num);
|
||||
}
|
||||
|
||||
@@ -623,6 +623,10 @@ st506_callback(void *priv)
|
||||
st506_complete(dev);
|
||||
break;
|
||||
}
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case CMD_FORMAT_TRACK:
|
||||
case CMD_FORMAT_BAD_TRACK:
|
||||
switch (dev->state) {
|
||||
@@ -1377,10 +1381,10 @@ mem_write(uint32_t addr, uint8_t val, void *priv)
|
||||
static uint8_t
|
||||
mem_read(uint32_t addr, void *priv)
|
||||
{
|
||||
hdc_t *dev = (hdc_t *) priv;
|
||||
uint32_t ptr;
|
||||
uint32_t mask = 0;
|
||||
uint8_t ret = 0xff;
|
||||
const hdc_t *dev = (hdc_t *) priv;
|
||||
uint32_t ptr;
|
||||
uint32_t mask = 0;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
/* Ignore accesses to anything below the configured address,
|
||||
needed because of the emulator's 4k mapping granularity. */
|
||||
@@ -1529,8 +1533,8 @@ loadhd(hdc_t *dev, int c, int d, UNUSED(const char *fn))
|
||||
static void
|
||||
set_switches(hdc_t *dev, hd_type_t *hdt, int num)
|
||||
{
|
||||
drive_t *drive;
|
||||
int e;
|
||||
const drive_t *drive;
|
||||
int e;
|
||||
|
||||
dev->switches = 0x00;
|
||||
|
||||
@@ -1604,7 +1608,9 @@ st506_init(const device_t *info)
|
||||
|
||||
case ST506_XT_TYPE_ST11R: /* Seagate ST-11R (RLL) */
|
||||
dev->spt = RLL_SECTORS;
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case ST506_XT_TYPE_ST11M: /* Seagate ST-11M (MFM) */
|
||||
dev->nr_err = ERR_NOT_AVAILABLE;
|
||||
@@ -1778,8 +1784,8 @@ st506_init(const device_t *info)
|
||||
static void
|
||||
st506_close(void *priv)
|
||||
{
|
||||
hdc_t *dev = (hdc_t *) priv;
|
||||
drive_t *drive;
|
||||
hdc_t *dev = (hdc_t *) priv;
|
||||
const drive_t *drive;
|
||||
|
||||
for (uint8_t d = 0; d < MFM_NUM; d++) {
|
||||
drive = &dev->drives[d];
|
||||
|
||||
@@ -509,7 +509,9 @@ hdc_callback(void *priv)
|
||||
|
||||
case CMD_READ_VERIFY:
|
||||
no_data = 1;
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case CMD_READ_SECTORS:
|
||||
if (!drive->present) {
|
||||
@@ -534,7 +536,9 @@ hdc_callback(void *priv)
|
||||
dev->buf_len = 512;
|
||||
|
||||
dev->state = STATE_SEND;
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case STATE_SEND:
|
||||
/* Activate the status icon. */
|
||||
@@ -642,7 +646,9 @@ do_send:
|
||||
dev->buf_len = 512;
|
||||
|
||||
dev->state = STATE_RECV;
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
case STATE_RECV:
|
||||
/* Activate the status icon. */
|
||||
@@ -1098,8 +1104,8 @@ xta_init(const device_t *info)
|
||||
static void
|
||||
xta_close(void *priv)
|
||||
{
|
||||
hdc_t *dev = (hdc_t *) priv;
|
||||
drive_t *drive;
|
||||
hdc_t *dev = (hdc_t *) priv;
|
||||
const drive_t *drive;
|
||||
|
||||
/* Remove the I/O handler. */
|
||||
io_removehandler(dev->base, 4,
|
||||
|
||||
@@ -160,7 +160,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_
|
||||
if (!hdd->speed_preset)
|
||||
return HDD_OVERHEAD_TIME;
|
||||
|
||||
hdd_zone_t *zone = NULL;
|
||||
const hdd_zone_t *zone = NULL;
|
||||
if (hdd->num_zones <= 0) {
|
||||
fatal("hdd_seek_get_time(): hdd->num_zones < 0)\n");
|
||||
return 0.0;
|
||||
@@ -486,7 +486,7 @@ hdd_preset_apply(int hdd_id)
|
||||
if (hd->speed_preset >= hdd_preset_get_num())
|
||||
hd->speed_preset = 0;
|
||||
|
||||
hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset];
|
||||
const hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset];
|
||||
|
||||
hd->cache.num_segments = preset->rcache_num_seg;
|
||||
hd->cache.segment_size = preset->rcache_seg_size;
|
||||
|
||||
@@ -450,7 +450,7 @@ retry_vhd:
|
||||
else
|
||||
fatal("hdd_image_load(): VHD: Error opening VHD file '%s': %s\n", fn, mvhd_strerr(vhd_error));
|
||||
} else if (vhd_error == MVHD_ERR_TIMESTAMP) {
|
||||
fatal("hdd_image_load(): VHD: Parent/child timestamp mismatch for VHD file '%s'\n", fn);
|
||||
pclog("hdd_image_load(): VHD: Parent/child timestamp mismatch for VHD file '%s'\n", fn);
|
||||
}
|
||||
|
||||
hdd[id].tracks = hdd_images[id].vhd->footer.geom.cyl;
|
||||
|
||||
@@ -655,7 +655,9 @@ mo_update_request_length(mo_t *dev, int len, int block_len)
|
||||
break;
|
||||
}
|
||||
}
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
default:
|
||||
dev->packet_len = len;
|
||||
break;
|
||||
@@ -1342,7 +1344,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
|
||||
mo_invalid_field(dev);
|
||||
return;
|
||||
}
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case GPCMD_SCSI_RESERVE:
|
||||
case GPCMD_SCSI_RELEASE:
|
||||
case GPCMD_TEST_UNIT_READY:
|
||||
@@ -2051,7 +2055,7 @@ mo_do_identify(ide_t *ide, int ide_has_dma)
|
||||
{
|
||||
char model[40];
|
||||
|
||||
mo_t *mo = (mo_t *) ide->sc;
|
||||
const mo_t *mo = (mo_t *) ide->sc;
|
||||
|
||||
memset(model, 0, 40);
|
||||
|
||||
|
||||
@@ -821,7 +821,10 @@ zip_update_request_length(zip_t *dev, int len, int block_len)
|
||||
break;
|
||||
}
|
||||
}
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
|
||||
default:
|
||||
dev->packet_len = len;
|
||||
break;
|
||||
@@ -1408,7 +1411,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
|
||||
zip_invalid_field(dev);
|
||||
return;
|
||||
}
|
||||
/*FALLTHROUGH*/
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case GPCMD_SCSI_RESERVE:
|
||||
case GPCMD_SCSI_RELEASE:
|
||||
case GPCMD_TEST_UNIT_READY:
|
||||
@@ -1571,6 +1576,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
|
||||
zip_command_complete(dev);
|
||||
break;
|
||||
}
|
||||
#ifdef FALLTHROUGH_ANNOTATION
|
||||
[[fallthrough]];
|
||||
#endif
|
||||
case GPCMD_WRITE_6:
|
||||
case GPCMD_WRITE_10:
|
||||
case GPCMD_WRITE_AND_VERIFY_10:
|
||||
@@ -2280,7 +2288,7 @@ zip_250_identify(ide_t *ide, int ide_has_dma)
|
||||
static void
|
||||
zip_identify(ide_t *ide, int ide_has_dma)
|
||||
{
|
||||
zip_t *zip;
|
||||
const zip_t *zip;
|
||||
|
||||
zip = (zip_t *) ide->sc;
|
||||
|
||||
|
||||
18
src/dma.c
18
src/dma.c
@@ -118,7 +118,7 @@ dma_sg_next_addr(dma_t *dev)
|
||||
dev->eot = dev->count >> 31;
|
||||
dev->count &= 0xfffe;
|
||||
dev->cb = (uint16_t) dev->count;
|
||||
dev->cc = (int) dev->count;
|
||||
dev->cc = dev->count;
|
||||
if (!dev->count)
|
||||
dev->count = 65536;
|
||||
if (ts == 2)
|
||||
@@ -133,9 +133,7 @@ dma_sg_next_addr(dma_t *dev)
|
||||
static void
|
||||
dma_block_transfer(int channel)
|
||||
{
|
||||
int bit16;
|
||||
|
||||
bit16 = (channel >= 4);
|
||||
int bit16 = (channel >= 4);
|
||||
|
||||
if (dma_advanced)
|
||||
bit16 = !!(dma_transfer_size(&(dma[channel])) == 2);
|
||||
@@ -300,7 +298,7 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv)
|
||||
static uint8_t
|
||||
dma_sg_read(uint16_t port, void *priv)
|
||||
{
|
||||
dma_t *dev = (dma_t *) priv;
|
||||
const dma_t *dev = (dma_t *) priv;
|
||||
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
@@ -348,7 +346,7 @@ dma_sg_read(uint16_t port, void *priv)
|
||||
static uint16_t
|
||||
dma_sg_readw(uint16_t port, void *priv)
|
||||
{
|
||||
dma_t *dev = (dma_t *) priv;
|
||||
const dma_t *dev = (dma_t *) priv;
|
||||
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
@@ -382,7 +380,7 @@ dma_sg_readw(uint16_t port, void *priv)
|
||||
static uint32_t
|
||||
dma_sg_readl(uint16_t port, void *priv)
|
||||
{
|
||||
dma_t *dev = (dma_t *) priv;
|
||||
const dma_t *dev = (dma_t *) priv;
|
||||
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
@@ -596,7 +594,7 @@ dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
|
||||
static uint8_t
|
||||
dma_ps2_read(uint16_t addr, UNUSED(void *priv))
|
||||
{
|
||||
dma_t *dma_c = &dma[dma_ps2.xfr_channel];
|
||||
const dma_t *dma_c = &dma[dma_ps2.xfr_channel];
|
||||
uint8_t temp = 0xff;
|
||||
|
||||
switch (addr) {
|
||||
@@ -1280,7 +1278,7 @@ dma_sg(uint8_t *data, int transfer_length, int out, void *priv)
|
||||
uint8_t
|
||||
_dma_read(uint32_t addr, dma_t *dma_c)
|
||||
{
|
||||
uint8_t temp;
|
||||
uint8_t temp = 0;
|
||||
|
||||
if (dma_advanced) {
|
||||
if (dma_c->sg_status & 1)
|
||||
@@ -1296,7 +1294,7 @@ _dma_read(uint32_t addr, dma_t *dma_c)
|
||||
static uint16_t
|
||||
_dma_readw(uint32_t addr, dma_t *dma_c)
|
||||
{
|
||||
uint16_t temp;
|
||||
uint16_t temp = 0;
|
||||
|
||||
if (dma_advanced) {
|
||||
if (dma_c->sg_status & 1)
|
||||
|
||||
@@ -84,7 +84,7 @@ fifo8_pop(Fifo8 *fifo)
|
||||
const uint8_t *
|
||||
fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num)
|
||||
{
|
||||
uint8_t *ret;
|
||||
const uint8_t *ret;
|
||||
|
||||
assert(max > 0 && max <= fifo->num);
|
||||
*num = MIN(fifo->capacity - fifo->head, max);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user