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Fix subchannel free detection.

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This commit is contained in:
starfrost013
2025-02-10 02:32:02 +00:00
parent 087aaf4ba4
commit 35cb8a4cf2
5 changed files with 102 additions and 9 deletions
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96
doc/nvidia_notes/nv3 driver init status_2025-02-10.txt Normal file
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@@ -0,0 +1,96 @@
nv3_disp:
0x10fe -> DrvBitBlt
0x19be -> DrvCopyBits
0x597c -> DrvCreateDeviceBitmap
0x5a6e -> DrvDeleteDeviceBitmap
0x60b8 -> DrvTextOut
0x6248 -> DrvDestroyFont
0x64b8 -> DrvRealizeBrush
0x6a46 -> DrvDitherColor
0x797a -> DrvGetDirectDrawInfo
0x7b14 -> DrvEnableDirectDraw
0x7b70 -> DrvDisableDirectDraw
0x817c -> DrvPaint
0x81c2 -> DrvResetPDEV
0x82dc -> DrvEnableDriver
0x8312 -> DrvEnablePDEV
0x83ee -> DrvDisablePDEV
0x840a -> DrvCompletePDEV
0x8418 -> DrvSynchronise
0x845a -> DrvEnableSurface
0x851a -> DrvDisableSurface
0x8554 -> DrvAssertMode
0x8690 -> DrvGetModes
0xe59a -> DrvEscape
0xf3ee -> DrvFillPath
0xf3f6 -> DrvStrokePath
0xfa08 -> DrvLineTo
0x12fee -> DrvSetPalette
0x132a4 -> DrvMovePointer
0x13d20 -> DrvSetPointerShape
0x13dea -> DrvStretchBlt
0x147f2 -> DrvSetPixelFormat
0x1483c -> DrvDescribePixelFormat
0x1495a -> DrvClipChanged
0x255b8 -> DrvSwapBuffers
DrvEnableDriver SUCCESS
DrvEnablePDEV SUCCESS 23:28 09/02/2025
Check for cjCaps >= 0x130 && cjDevInfo >= 0x12C SUCCESS 23:31 09/02/2025
EngAllocMem call SUCCESS 23:38 09/02/2025
CreateOglGlobalMemory call SUCCESS 23:40 09/02/2025
bInitializeModeFields call SUCCESS 23:41 09/02/2025
bInitializePalette call SUCCESS 23:42 09/02/2025
EngDeviceIoControl IOCTL 0x232020 (CHECK mini) SUCCESS
EngDeviceIoControl IOCTL 0x232044 (CHECK mini) SUCCESS (eax=0)
DrvCompletePDEV SUCCESS 23:52 09/02/2025
DrvEnableSurface
bEnableHardware call
EngCreateSemaphore call #1 csCrtc SUCCESS 00:55 10/02/2025
EngCreateSemaphore call #2 csFifo SUCCESS 00:57 10/02/2025
EngDeviceIoControl IOCTL 0x230460 SUCCESS 00:57 10/02/2025
EngDeviceIoControl IOCTL 0x230458 SUCCESS 00:57 10/02/2025
NvAllocRoot SUCCESS 01:03 10/02/2025
NvAllocDevice SUCCESS 01:04 10/02/2025
NV3/NV4 architecture check SUCCESS 01:14 10/02/2025
bAssertModeHardware call (bEnable=1) FAILURE - HANG/LOOP
EngDeviceIoControl IOCTL 0x23040C] FAILURE 01:27 10/02/2025
nv3_mini NVStartIO ioctlcode=0x23040C
NVSetMode
NV3SetMode SUCCESS 01:53 10/02/2025
RmUnloadState SUCCESS 01:48 10/02/2025
VBESetModeEx SUCCESS 01:51 10/02/2025
NV_OEMEnableExtensions SUCCESS 01:52 10/02/2025
UpdateArbitrationSettings SUCCESS 01:52 10/02/2025
RmLoadState SUCCESS 01:53 10/02/2025
NV3EnableCursor SUCCESS 01:54 10/02/2025
NV3WaitUntilFinished SUCCESS Passing 02:23 10/02/2025
EngDeviceIoControl IOCTL 0x230408
EngDeviceIoControl IOCTL 0x232024
NvAllocHardware
bCreateStdPatches(?)
CHECK - NV4
vDestroyStdPatches(?)
NV3_WaitForOneVerticalRefresh
EngDeviceIoControl IOCTL 0x230410
SET UP CORRECT FUNCTION POINTERS
_heap_init call
bEnableOffscreenHeap call
bEnablePointer call
bEnableText call
bEnablePalette call
bEnableDirectDraw call
EngCreateBitmap call
EngAssociateBitmap call
DrvDisableSurface: ONLY IN THE CASE OF FAILURE

4
doc/nvidia_notes/nv3 driver status_CURRENT.txt
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@@ -1,4 +0,0 @@
Failure condition:
Failed check, causes fifoService call in fifo service init in RM, FifoState STATE_LOAD
CHECK NVSTARTIO! DEBUG TOMORROW

2
src/include/86box/nv/vid_nv3.h
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@@ -1431,7 +1431,7 @@ void nv3_pfifo_cache1_push(uint32_t addr, uint32_t val);
void nv3_pfifo_cache1_pull();
uint32_t nv3_pfifo_cache1_normal2gray(uint32_t val);
uint32_t nv3_pfifo_cache1_gray2normal(uint32_t val);
bool nv3_pfifo_cache1_is_free();
uint32_t nv3_pfifo_cache1_num_free_spaces();
// NV3 PFB
void nv3_pfb_init();

7
src/video/nv/nv3/subsystems/nv3_pfifo.c
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@@ -185,7 +185,7 @@ uint32_t nv3_pfifo_read(uint32_t address)
// Check if Cache1 (0x7C bytes in size depending on gpu?) is full
// Based on how the drivers do it
if (!nv3_pfifo_cache1_is_free())
if (!nv3_pfifo_cache1_num_free_spaces())
ret |= 1 << NV3_PFIFO_CACHE1_STATUS_FULL;
if (nv3->pfifo.runout_put != nv3->pfifo.runout_get)
@@ -605,7 +605,7 @@ void nv3_pfifo_cache1_push(uint32_t addr, uint32_t val)
new_address |= (nv3_runout_reason_cache_ran_out << NV3_PFIFO_RUNOUT_RAMIN_ERR);
}
if (!nv3_pfifo_cache1_is_free())
if (!nv3_pfifo_cache1_num_free_spaces())
{
oh_shit = true;
oh_shit_reason = nv3_runout_reason_free_count_overrun;
@@ -718,7 +718,8 @@ void nv3_pfifo_cache1_pull()
//Todo: finish it
}
bool nv3_pfifo_cache1_is_free()
// THIS IS PER SUBCHANNEL!
uint32_t nv3_pfifo_cache1_num_free_spaces()
{
// convert to gray code
uint32_t real_get_address = nv3_pfifo_cache1_normal2gray(nv3->pfifo.cache1_settings.get_address);

2
src/video/nv/nv3/subsystems/nv3_user.c
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@@ -40,7 +40,7 @@ uint32_t nv3_user_read(uint32_t address)
switch (method_offset)
{
case NV3_GENERIC_METHOD_IS_PFIFO_FREE:
return nv3_pfifo_cache1_is_free();
return nv3_pfifo_cache1_num_free_spaces();
}