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PCI graphics cards now correctly use PCI timings instead of VLB timings.

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This commit is contained in:
OBattler
2020-05-06 00:23:07 +02:00
parent cf0a7dd3dc
commit 3027422e88
21 changed files with 232 additions and 91 deletions
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2
src/include/86box/vid_svga.h
View File

@@ -143,7 +143,7 @@ typedef struct svga_t
} svga_t;
extern int svga_init(svga_t *svga, void *p, int memsize,
extern int svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
void (*recalctimings_ex)(struct svga_t *svga),
uint8_t (*video_in) (uint16_t addr, void *p),
void (*video_out)(uint16_t addr, uint8_t val, void *p),

3
src/include/86box/video.h
View File

@@ -47,7 +47,8 @@ extern "C" {
enum {
VIDEO_ISA = 0,
VIDEO_MCA,
VIDEO_BUS
VIDEO_BUS,
VIDEO_PCI
};
#define VIDEO_FLAG_TYPE_CGA 0

4
src/video/vid_ati18800.c
View File

@@ -212,13 +212,13 @@ static void *ati18800_init(const device_t *info)
};
if (info->local == ATI18800_EDGE16) {
svga_init(&ati18800->svga, ati18800, 1 << 18, /*256kb*/
svga_init(info, &ati18800->svga, ati18800, 1 << 18, /*256kb*/
ati18800_recalctimings,
ati18800_in, ati18800_out,
NULL,
NULL);
} else {
svga_init(&ati18800->svga, ati18800, 1 << 19, /*512kb*/
svga_init(info, &ati18800->svga, ati18800, 1 << 19, /*512kb*/
ati18800_recalctimings,
ati18800_in, ati18800_out,
NULL,

4
src/video/vid_ati28800.c
View File

@@ -482,7 +482,7 @@ ati28800k_init(const device_t *info)
rom_init(&ati28800->bios_rom, BIOS_ATIKOR_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
loadfont(FONT_ATIKOR_PATH, 6);
svga_init(&ati28800->svga, ati28800, ati28800->memory << 10, /*Memory size, default 512KB*/
svga_init(info, &ati28800->svga, ati28800, ati28800->memory << 10, /*Memory size, default 512KB*/
ati28800k_recalctimings,
ati28800k_in, ati28800k_out,
NULL,
@@ -543,7 +543,7 @@ ati28800_init(const device_t *info)
break;
}
svga_init(&ati28800->svga, ati28800, ati28800->memory << 10, /*default: 512kb*/
svga_init(info, &ati28800->svga, ati28800, ati28800->memory << 10, /*default: 512kb*/
ati28800_recalctimings,
ati28800_in, ati28800_out,
NULL,

54
src/video/vid_ati_mach64.c
View File

@@ -92,7 +92,8 @@ typedef struct mach64_t
uint8_t regs[256];
int index;
int type, pci;
int type, pci,
bit32;
uint8_t pci_regs[256];
uint8_t int_line;
@@ -252,7 +253,8 @@ typedef struct mach64_t
} mach64_t;
static video_timings_t timing_mach64_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10};
static video_timings_t timing_mach64_vlb_pci = {VIDEO_BUS, 2, 2, 1, 20, 20, 21};
static video_timings_t timing_mach64_vlb = {VIDEO_BUS, 2, 2, 1, 20, 20, 21};
static video_timings_t timing_mach64_pci = {VIDEO_PCI, 2, 2, 1, 20, 20, 21};
enum
{
@@ -540,26 +542,38 @@ void mach64_updatemapping(mach64_t *mach64)
switch (svga->gdcreg[6] & 0xc)
{
case 0x0: /*128k at A0000*/
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel);
if (mach64->bit32)
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel);
else
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, NULL, mach64_write, mach64_writew, NULL);
mem_mapping_set_p(&mach64->svga.mapping, mach64);
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
mem_mapping_enable(&mach64->mmio_mapping);
svga->banked_mask = 0xffff;
break;
case 0x4: /*64k at A0000*/
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel);
if (mach64->bit32)
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel);
else
mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, NULL, mach64_write, mach64_writew, NULL);
mem_mapping_set_p(&mach64->svga.mapping, mach64);
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
if (mach64->bit32)
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
else
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, NULL, svga_write, svga_writew, NULL);
mem_mapping_set_p(&mach64->svga.mapping, svga);
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
svga->banked_mask = 0x7fff;
break;
case 0xC: /*32k at B8000*/
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
if (mach64->bit32)
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
else
mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, NULL, svga_write, svga_writew, NULL);
mem_mapping_set_p(&mach64->svga.mapping, svga);
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
@@ -3266,7 +3280,7 @@ static void *mach64_common_init(const device_t *info)
mach64->vram_size = device_get_config_int("memory");
mach64->vram_mask = (mach64->vram_size << 20) - 1;
svga_init(&mach64->svga, mach64, mach64->vram_size << 20,
svga_init(info, &mach64->svga, mach64, mach64->vram_size << 20,
mach64_recalctimings,
mach64_in, mach64_out,
NULL,
@@ -3275,10 +3289,19 @@ static void *mach64_common_init(const device_t *info)
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&mach64->bios_rom.mapping);
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mach64->bit32 = (info->flags & DEVICE_PCI) || (info->flags & DEVICE_VLB);
if (mach64->bit32) {
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
} else {
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, NULL, svga_write_linear, svga_writew_linear, NULL, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, NULL, mach64_ext_writeb, mach64_ext_writew, NULL, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, NULL, mach64_ext_writeb, mach64_ext_writew, NULL, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, NULL, mach64_ext_writeb, mach64_ext_writew, NULL, NULL, MEM_MAPPING_EXTERNAL, mach64);
}
mem_mapping_disable(&mach64->mmio_mapping);
mach64_io_set(mach64);
@@ -3313,8 +3336,10 @@ static void *mach64gx_init(const device_t *info)
if (info->flags & DEVICE_ISA)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_isa);
else if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb_pci);
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb);
mach64->type = MACH64_GX;
mach64->pci = !!(info->flags & DEVICE_PCI);
@@ -3343,7 +3368,10 @@ static void *mach64vt2_init(const device_t *info)
mach64_t *mach64 = mach64_common_init(info);
svga_t *svga = &mach64->svga;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb_pci);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb);
mach64->type = MACH64_VT2;
mach64->pci = 1;

45
src/video/vid_cl54xx.c
View File

@@ -147,7 +147,8 @@ typedef struct gd54xx_t
svga_t svga;
int has_bios, rev;
int has_bios, rev,
bit32;
rom_t bios_rom;
uint32_t vram_size;
@@ -207,7 +208,8 @@ typedef struct gd54xx_t
static video_timings_t timing_gd54xx_isa = {VIDEO_ISA, 3, 3, 6, 8, 8, 12};
static video_timings_t timing_gd54xx_vlb_pci = {VIDEO_BUS, 4, 4, 8, 10, 10, 20};
static video_timings_t timing_gd54xx_vlb = {VIDEO_BUS, 4, 4, 8, 10, 10, 20};
static video_timings_t timing_gd54xx_pci = {VIDEO_PCI, 4, 4, 8, 10, 10, 20};
static void
@@ -2955,6 +2957,7 @@ static void
gd54xx->pci = !!(info->flags & DEVICE_PCI);
gd54xx->vlb = !!(info->flags & DEVICE_VLB);
gd54xx->mca = !!(info->flags & DEVICE_MCA);
gd54xx->bit32 = gd54xx->pci || gd54xx->vlb;
gd54xx->rev = 0;
gd54xx->has_bios = 1;
@@ -3051,35 +3054,53 @@ static void
if (romfn)
rom_init(&gd54xx->bios_rom, romfn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_ISA)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_isa);
else if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_vlb_pci);
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_vlb);
svga_init(&gd54xx->svga, gd54xx, gd54xx->vram_size,
svga_init(info, &gd54xx->svga, gd54xx, gd54xx->vram_size,
gd54xx_recalctimings, gd54xx_in, gd54xx_out,
gd54xx_hwcursor_draw, NULL);
svga->ven_write = gd54xx_write_modes45;
if (vram <= 1)
svga->decode_mask = gd54xx->vram_mask;
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel);
mem_mapping_set_p(&svga->mapping, gd54xx);
mem_mapping_add(&gd54xx->mmio_mapping, 0, 0,
if (gd54xx->bit32) {
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel);
mem_mapping_add(&gd54xx->mmio_mapping, 0, 0,
gd543x_mmio_read, gd543x_mmio_readw, gd543x_mmio_readl,
gd543x_mmio_writeb, gd543x_mmio_writew, gd543x_mmio_writel,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
mem_mapping_disable(&gd54xx->mmio_mapping);
mem_mapping_add(&gd54xx->linear_mapping, 0, 0,
mem_mapping_add(&gd54xx->linear_mapping, 0, 0,
gd54xx_readb_linear, gd54xx_readw_linear, gd54xx_readl_linear,
gd54xx_writeb_linear, gd54xx_writew_linear, gd54xx_writel_linear,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
mem_mapping_disable(&gd54xx->linear_mapping);
mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0,
mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0,
gd5436_aperture2_readb, gd5436_aperture2_readw, gd5436_aperture2_readl,
gd5436_aperture2_writeb, gd5436_aperture2_writew, gd5436_aperture2_writel,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
} else {
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, NULL, gd54xx_write, gd54xx_writew, NULL);
mem_mapping_add(&gd54xx->mmio_mapping, 0, 0,
gd543x_mmio_read, gd543x_mmio_readw, NULL,
gd543x_mmio_writeb, gd543x_mmio_writew, NULL,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
mem_mapping_add(&gd54xx->linear_mapping, 0, 0,
gd54xx_readb_linear, gd54xx_readw_linear, NULL,
gd54xx_writeb_linear, gd54xx_writew_linear, NULL,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0,
gd5436_aperture2_readb, gd5436_aperture2_readw, NULL,
gd5436_aperture2_writeb, gd5436_aperture2_writew, NULL,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
}
mem_mapping_set_p(&svga->mapping, gd54xx);
mem_mapping_disable(&gd54xx->mmio_mapping);
mem_mapping_disable(&gd54xx->linear_mapping);
mem_mapping_disable(&gd54xx->aperture2_mapping);
io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx);

6
src/video/vid_et4000.c
View File

@@ -495,7 +495,7 @@ et4000_init(const device_t *info)
case 0: /* ISA ET4000AX */
dev->vram_size = device_get_config_int("memory") << 10;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa);
svga_init(&dev->svga, dev, dev->vram_size,
svga_init(info, &dev->svga, dev, dev->vram_size,
et4000_recalctimings, et4000_in, et4000_out,
NULL, NULL);
io_sethandler(0x03c0, 32,
@@ -505,7 +505,7 @@ et4000_init(const device_t *info)
case 1: /* MCA ET4000AX */
dev->vram_size = 1024 << 10;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_mca);
svga_init(&dev->svga, dev, dev->vram_size,
svga_init(info, &dev->svga, dev, dev->vram_size,
et4000_recalctimings, et4000_in, et4000_out,
NULL, NULL);
io_sethandler(0x03c0, 32,
@@ -522,7 +522,7 @@ et4000_init(const device_t *info)
dev->port_32cb_val = 0;
dev->svga.ksc5601_sbyte_mask = 0x80;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa);
svga_init(&dev->svga, dev, dev->vram_size,
svga_init(info, &dev->svga, dev, dev->vram_size,
et4000_recalctimings, et4000k_in, et4000k_out,
NULL, NULL);
io_sethandler(0x03c0, 32,

10
src/video/vid_et4000w32.c
View File

@@ -141,7 +141,8 @@ typedef struct et4000w32p_t
uint32_t key;
} et4000w32p_t;
static video_timings_t timing_et4000w32 = {VIDEO_BUS, 4, 4, 4, 10, 10, 10};
static video_timings_t timing_et4000w32_vlb = {VIDEO_BUS, 4, 4, 4, 10, 10, 10};
static video_timings_t timing_et4000w32_pci = {VIDEO_PCI, 4, 4, 4, 10, 10, 10};
void et4000w32p_recalcmapping(et4000w32p_t *et4000);
@@ -1286,9 +1287,12 @@ void *et4000w32p_init(const device_t *info)
et4000->interleaved = (vram_size == 2) ? 1 : 0;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_vlb);
svga_init(&et4000->svga, et4000, vram_size << 20,
svga_init(info, &et4000->svga, et4000, vram_size << 20,
et4000w32p_recalctimings,
et4000w32p_in, et4000w32p_out,
et4000w32p_hwcursor_draw,

21
src/video/vid_ht216.c
View File

@@ -93,7 +93,8 @@ uint8_t ht216_in(uint16_t addr, void *p);
#define BIOS_G2_GC205_PATH L"roms/video/video7/BIOS.BIN"
#define BIOS_VIDEO7_VGA_1024I_PATH L"roms/video/video7/Video Seven VGA 1024i - BIOS - v2.19 - 435-0062-05 - U17 - 27C256.BIN"
static video_timings_t timing_v7vga = {VIDEO_ISA, 5, 5, 9, 20, 20, 30};
static video_timings_t timing_v7vga_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10};
static video_timings_t timing_v7vga_vlb = {VIDEO_ISA, 5, 5, 9, 20, 20, 30};
#ifdef ENABLE_HT216_LOG
@@ -1034,9 +1035,12 @@ void
else if (has_rom == 2)
rom_init(&ht216->bios_rom, BIOS_G2_GC205_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga);
if (info->flags & DEVICE_VLB)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_vlb);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_isa);
svga_init(&ht216->svga, ht216, mem_size,
svga_init(info, &ht216->svga, ht216, mem_size,
ht216_recalctimings,
ht216_in, ht216_out,
ht216_hwcursor_draw,
@@ -1045,9 +1049,14 @@ void
ht216->vram_mask = mem_size - 1;
svga->decode_mask = mem_size - 1;
mem_mapping_set_handler(&ht216->svga.mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, ht216_writel);
if (info->flags & DEVICE_VLB) {
mem_mapping_set_handler(&ht216->svga.mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, ht216_writel);
mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, ht216_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &ht216->svga);
} else {
mem_mapping_set_handler(&ht216->svga.mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, NULL);
mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, NULL, NULL, MEM_MAPPING_EXTERNAL, &ht216->svga);
}
mem_mapping_set_p(&ht216->svga.mapping, ht216);
mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, ht216_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &ht216->svga);
svga->bpp = 8;
svga->miscout = 1;
@@ -1180,7 +1189,7 @@ const device_t v7_vga_1024i_device =
const device_t ht216_32_pb410a_device =
{
"Headland HT216-32 (Packard Bell PB410A)",
DEVICE_ISA,
DEVICE_VLB,
0x7861, /*HT216-32*/
ht216_pb410a_init,
ht216_close,

4
src/video/vid_mga.c
View File

@@ -605,7 +605,7 @@ static const uint8_t trans_masks[16][16] =
static int8_t dither5[256][2][2];
static int8_t dither6[256][2][2];
static video_timings_t timing_matrox_mystique = {VIDEO_BUS, 4, 4, 4, 10, 10, 10};
static video_timings_t timing_matrox_mystique = {VIDEO_PCI, 4, 4, 4, 10, 10, 10};
static void mystique_start_blit(mystique_t *mystique);
@@ -4931,7 +4931,7 @@ mystique_init(const device_t *info)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_mystique);
svga_init(&mystique->svga, mystique, mystique->vram_size << 20,
svga_init(info, &mystique->svga, mystique, mystique->vram_size << 20,
mystique_recalctimings,
mystique_in, mystique_out,
mystique_hwcursor_draw,

2
src/video/vid_oak_oti.c
View File

@@ -380,7 +380,7 @@ oti_init(const device_t *info)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_oti);
svga_init(&oti->svga, oti, oti->vram_size << 10,
svga_init(info, &oti->svga, oti, oti->vram_size << 10,
oti_recalctimings, oti_in, oti_out, NULL, NULL);
io_sethandler(0x03c0, 32,

6
src/video/vid_paradise.c
View File

@@ -298,21 +298,21 @@ void *paradise_init(const device_t *info, uint32_t memsize)
switch(info->local) {
case PVGA1A:
svga_init(&paradise->svga, paradise, memsize, /*256kb*/
svga_init(info, &paradise->svga, paradise, memsize, /*256kb*/
NULL,
paradise_in, paradise_out,
NULL,
NULL);
break;
case WD90C11:
svga_init(&paradise->svga, paradise, 1 << 19, /*512kb*/
svga_init(info, &paradise->svga, paradise, 1 << 19, /*512kb*/
paradise_recalctimings,
paradise_in, paradise_out,
NULL,
NULL);
break;
case WD90C30:
svga_init(&paradise->svga, paradise, memsize,
svga_init(info, &paradise->svga, paradise, memsize,
paradise_recalctimings,
paradise_in, paradise_out,
NULL,

86
src/video/vid_s3.c
View File

@@ -77,11 +77,16 @@ enum
static video_timings_t timing_s3_86c911 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_86c801 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_86c805 = {VIDEO_BUS, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_stealth64 = {VIDEO_BUS, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_vision864 = {VIDEO_BUS, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_vision964 = {VIDEO_BUS, 2, 2, 4, 20, 20, 35};
static video_timings_t timing_s3_trio32 = {VIDEO_BUS, 4, 3, 5, 26, 26, 42};
static video_timings_t timing_s3_trio64 = {VIDEO_BUS, 3, 2, 4, 25, 25, 40};
static video_timings_t timing_s3_stealth64_vlb = {VIDEO_BUS, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_stealth64_pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_vision864_vlb = {VIDEO_BUS, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_vision864_pci = {VIDEO_PCI, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_vision964_vlb = {VIDEO_BUS, 2, 2, 4, 20, 20, 35};
static video_timings_t timing_s3_vision964_pci = {VIDEO_PCI, 2, 2, 4, 20, 20, 35};
static video_timings_t timing_s3_trio32_vlb = {VIDEO_BUS, 4, 3, 5, 26, 26, 42};
static video_timings_t timing_s3_trio32_pci = {VIDEO_PCI, 4, 3, 5, 26, 26, 42};
static video_timings_t timing_s3_trio64_vlb = {VIDEO_BUS, 3, 2, 4, 25, 25, 40};
static video_timings_t timing_s3_trio64_pci = {VIDEO_PCI, 3, 2, 4, 25, 25, 40};
enum
{
@@ -3304,42 +3309,66 @@ static void *s3_init(const device_t *info)
case S3_PARADISE_BAHAMAS64:
bios_fn = ROM_PARADISE_BAHAMAS64;
chip = S3_VISION864;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb);
break;
case S3_PHOENIX_VISION864:
bios_fn = ROM_PHOENIX_VISION864;
chip = S3_VISION864;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb);
break;
case S3_DIAMOND_STEALTH64_964:
bios_fn = ROM_DIAMOND_STEALTH64_964;
chip = S3_VISION964;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_vlb);
break;
case S3_PHOENIX_TRIO32:
bios_fn = ROM_PHOENIX_TRIO32;
chip = S3_TRIO32;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_vlb);
break;
case S3_PHOENIX_TRIO64:
bios_fn = ROM_PHOENIX_TRIO64;
chip = S3_TRIO64;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb);
break;
case S3_PHOENIX_TRIO64_ONBOARD:
bios_fn = NULL;
chip = S3_TRIO64;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb);
break;
case S3_DIAMOND_STEALTH64_764:
bios_fn = ROM_DIAMOND_STEALTH64_764;
chip = S3_TRIO64;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_vlb);
break;
case S3_NUMBER9_9FX:
bios_fn = ROM_NUMBER9_9FX;
chip = S3_TRIO64;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb);
break;
default:
free(s3);
@@ -3366,24 +3395,35 @@ static void *s3_init(const device_t *info)
s3->pci = !!(info->flags & DEVICE_PCI);
s3->vlb = !!(info->flags & DEVICE_VLB);
mem_mapping_add(&s3->linear_mapping, 0, 0,
svga_read_linear, svga_readw_linear, svga_readl_linear,
svga_write_linear, svga_writew_linear, svga_writel_linear,
NULL, MEM_MAPPING_EXTERNAL, &s3->svga);
mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000,
s3_accel_read, s3_accel_read_w, s3_accel_read_l,
s3_accel_write, s3_accel_write_w, s3_accel_write_l,
NULL, MEM_MAPPING_EXTERNAL, s3);
if (s3->pci || s3->vlb) {
mem_mapping_add(&s3->linear_mapping, 0, 0,
svga_read_linear, svga_readw_linear, svga_readl_linear,
svga_write_linear, svga_writew_linear, svga_writel_linear,
NULL, MEM_MAPPING_EXTERNAL, &s3->svga);
mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000,
s3_accel_read, s3_accel_read_w, s3_accel_read_l,
s3_accel_write, s3_accel_write_w, s3_accel_write_l,
NULL, MEM_MAPPING_EXTERNAL, s3);
} else {
mem_mapping_add(&s3->linear_mapping, 0, 0,
svga_read_linear, svga_readw_linear, NULL,
svga_write_linear, svga_writew_linear, NULL,
NULL, MEM_MAPPING_EXTERNAL, &s3->svga);
mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000,
s3_accel_read, s3_accel_read_w, NULL,
s3_accel_write, s3_accel_write_w, NULL,
NULL, MEM_MAPPING_EXTERNAL, s3);
}
mem_mapping_disable(&s3->mmio_mapping);
if (chip == S3_VISION964)
svga_init(&s3->svga, s3, vram_size,
svga_init(info, &s3->svga, s3, vram_size,
s3_recalctimings,
s3_in, s3_out,
NULL,
NULL);
else
svga_init(&s3->svga, s3, vram_size,
svga_init(info, &s3->svga, s3, vram_size,
s3_recalctimings,
s3_in, s3_out,
s3_hwcursor_draw,

26
src/video/vid_s3_virge.c
View File

@@ -272,9 +272,12 @@ typedef struct virge_t
uint8_t subsys_stat, subsys_cntl;
} virge_t;
static video_timings_t timing_diamond_stealth3d_2000 = {VIDEO_BUS, 2, 2, 3, 28, 28, 45};
static video_timings_t timing_diamond_stealth3d_3000 = {VIDEO_BUS, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_virge_dx = {VIDEO_BUS, 2, 2, 3, 28, 28, 45};
static video_timings_t timing_diamond_stealth3d_2000_vlb = {VIDEO_BUS, 2, 2, 3, 28, 28, 45};
static video_timings_t timing_diamond_stealth3d_2000_pci = {VIDEO_PCI, 2, 2, 3, 28, 28, 45};
static video_timings_t timing_diamond_stealth3d_3000_vlb = {VIDEO_BUS, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_diamond_stealth3d_3000_pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_virge_dx_vlb = {VIDEO_BUS, 2, 2, 3, 28, 28, 45};
static video_timings_t timing_virge_dx_pci = {VIDEO_PCI, 2, 2, 3, 28, 28, 45};
static __inline void wake_fifo_thread(virge_t *virge)
{
@@ -3902,7 +3905,7 @@ static void *s3_virge_init(const device_t *info)
return NULL;
}
svga_init(&virge->svga, virge, virge->memory_size << 20,
svga_init(info, &virge->svga, virge, virge->memory_size << 20,
s3_virge_recalctimings,
s3_virge_in, s3_virge_out,
s3_virge_hwcursor_draw,
@@ -3978,20 +3981,29 @@ static void *s3_virge_init(const device_t *info)
virge->virge_id_high = 0x56;
virge->virge_id_low = 0x31;
virge->chip = S3_VIRGE;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000_vlb);
break;
case S3_DIAMOND_STEALTH3D_3000:
virge->virge_id_high = 0x88;
virge->virge_id_low = 0x3d;
virge->chip = S3_VIRGEVX;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_3000);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_3000_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_3000_vlb);
break;
default:
virge->svga.crtc[0x6c] = 0x01;
virge->virge_id_high = 0x8a;
virge->virge_id_low = 0x01;
virge->chip = S3_VIRGEDX;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_virge_dx);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_virge_dx_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_virge_dx_vlb);
break;
}

23
src/video/vid_svga.c
View File

@@ -27,6 +27,7 @@
#include <wchar.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/device.h>
#include <86box/machine.h>
#include <86box/timer.h>
#include <86box/io.h>
@@ -861,7 +862,7 @@ svga_poll(void *p)
int
svga_init(svga_t *svga, void *p, int memsize,
svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
void (*recalctimings_ex)(struct svga_t *svga),
uint8_t (*video_in) (uint16_t addr, void *p),
void (*video_out)(uint16_t addr, uint8_t val, void *p),
@@ -911,10 +912,22 @@ svga_init(svga_t *svga, void *p, int memsize,
svga->dac_hwcursor.xsize = svga->dac_hwcursor.ysize = 32;
svga->dac_hwcursor.yoff = 32;
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000,
svga_read, svga_readw, svga_readl,
svga_write, svga_writew, svga_writel,
NULL, MEM_MAPPING_EXTERNAL, svga);
if ((info->flags & DEVICE_PCI) || (info->flags & DEVICE_VLB)) {
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000,
svga_read, svga_readw, svga_readl,
svga_write, svga_writew, svga_writel,
NULL, MEM_MAPPING_EXTERNAL, svga);
} else if ((info->flags & DEVICE_ISA) && (info->flags & DEVICE_AT)) {
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000,
svga_read, svga_readw, NULL,
svga_write, svga_writew, NULL,
NULL, MEM_MAPPING_EXTERNAL, svga);
} else {
mem_mapping_add(&svga->mapping, 0xa0000, 0x20000,
svga_read, NULL, NULL,
svga_write, NULL, NULL,
NULL, MEM_MAPPING_EXTERNAL, svga);
}
timer_add(&svga->timer, svga_poll, svga, 1);

1
src/video/vid_svga_render.c
View File

@@ -21,6 +21,7 @@
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/timer.h>
#include <86box/video.h>

10
src/video/vid_tgui9440.c
View File

@@ -210,7 +210,8 @@ typedef struct tgui_t
volatile int write_blitter;
} tgui_t;
video_timings_t timing_tgui = {VIDEO_BUS, 4, 8, 16, 4, 8, 16};
video_timings_t timing_tgui_vlb = {VIDEO_BUS, 4, 8, 16, 4, 8, 16};
video_timings_t timing_tgui_pci = {VIDEO_PCI, 4, 8, 16, 4, 8, 16};
void tgui_recalcmapping(tgui_t *tgui);
@@ -1663,9 +1664,12 @@ static void *tgui_init(const device_t *info)
rom_init(&tgui->bios_rom, (wchar_t *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui);
if (info->flags & DEVICE_PCI)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_pci);
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_vlb);
svga_init(&tgui->svga, tgui, tgui->vram_size,
svga_init(info, &tgui->svga, tgui, tgui->vram_size,
tgui_recalctimings,
tgui_in, tgui_out,
tgui_hwcursor_draw,

2
src/video/vid_ti_cf62011.c
View File

@@ -248,7 +248,7 @@ vid_init(const device_t *info)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ti_cf62011);
svga_init(&ti->svga, ti,
svga_init(info, &ti->svga, ti,
ti->vram_size<<10,
NULL, vid_in, vid_out, NULL, NULL);

2
src/video/vid_tvga.c
View File

@@ -327,7 +327,7 @@ static void *tvga_init(const device_t *info)
rom_init(&tvga->bios_rom, (wchar_t *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
svga_init(&tvga->svga, tvga, tvga->vram_size,
svga_init(info, &tvga->svga, tvga, tvga->vram_size,
tvga_recalctimings,
tvga_in, tvga_out,
NULL,

4
src/video/vid_vga.c
View File

@@ -115,7 +115,7 @@ static void *vga_init(const device_t *info)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_vga);
svga_init(&vga->svga, vga, 1 << 18, /*256kb*/
svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/
NULL,
vga_in, vga_out,
NULL,
@@ -141,7 +141,7 @@ void *ps1vga_init(const device_t *info)
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ps1_svga_isa);
svga_init(&vga->svga, vga, 1 << 18, /*256kb*/
svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/
NULL,
vga_in, vga_out,
NULL,

8
src/video/video.c
View File

@@ -60,6 +60,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/rom.h>
@@ -642,6 +643,13 @@ video_update_timing(void)
video_timing_write_b = ISA_CYCLES(vid_timings->write_b);
video_timing_write_w = ISA_CYCLES(vid_timings->write_w);
video_timing_write_l = ISA_CYCLES(vid_timings->write_l);
} else if (vid_timings->type == VIDEO_PCI) {
video_timing_read_b = (int)(pci_timing * vid_timings->read_b);
video_timing_read_w = (int)(pci_timing * vid_timings->read_w);
video_timing_read_l = (int)(pci_timing * vid_timings->read_l);
video_timing_write_b = (int)(pci_timing * vid_timings->write_b);
video_timing_write_w = (int)(pci_timing * vid_timings->write_w);
video_timing_write_l = (int)(pci_timing * vid_timings->write_l);
} else {
video_timing_read_b = (int)(bus_timing * vid_timings->read_b);
video_timing_read_w = (int)(bus_timing * vid_timings->read_w);