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Merge branch 'master' into pc98x1

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This commit is contained in:
TC1995
2025-03-07 13:56:35 +01:00
parent 97e62c41da 02df55185f
commit 2e3eaf1a1e
84 changed files with 4664 additions and 685 deletions
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8
CMakeLists.txt
View File

@@ -132,13 +132,18 @@ option(RTMIDI "RtMidi"
option(FLUIDSYNTH "FluidSynth" ON)
option(MUNT "MUNT" ON)
option(VNC "VNC renderer" OFF)
option(NEW_DYNAREC "Use the PCem v15 (\"new\") dynamic recompiler" OFF)
option(MINITRACE "Enable Chrome tracing using the modified minitrace library" OFF)
option(GDBSTUB "Enable GDB stub server for debugging" OFF)
option(DEV_BRANCH "Development branch" OFF)
option(DISCORD "Discord Rich Presence support" ON)
option(DEBUGREGS486 "Enable debug register opeartion on 486+ CPUs" OFF)
if((ARCH STREQUAL "arm64") OR (ARCH STREQUAL "arm"))
set(NEW_DYNAREC ON)
else()
option(NEW_DYNAREC "Use the PCem v15 (\"new\") dynamic recompiler" OFF)
endif()
if(WIN32)
set(QT ON)
option(CPPTHREADS "C++11 threads" OFF)
@@ -158,7 +163,6 @@ endif()
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
cmake_dependent_option(AN430TX "Intel AN430TX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CDROM_MITSUMI "Mitsumi CDROM" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
cmake_dependent_option(G100 "Matrox Productiva G100" ON "DEV_BRANCH" OFF)
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)

1
src/86box.c
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@@ -213,6 +213,7 @@ int do_auto_pause = 0; /* (C) Auto-pa
int hook_enabled = 1; /* (C) Keyboard hook is enabled */
int test_mode = 0; /* (C) Test mode */
char uuid[MAX_UUID_LEN] = { '\0' }; /* (C) UUID or machine identifier */
int sound_muted = 0; /* (C) Is sound muted? */
int other_ide_present = 0; /* IDE controllers from non-IDE cards are
present */

1
src/CMakeLists.txt
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@@ -223,7 +223,6 @@ elseif(APPLE AND NOT QT)
COMPONENT Runtime)
endif()
# Install the PDB file on Windows builds
if(MSVC)
# CMake fully supports PDB files on MSVC-compatible compilers

1
src/chipset/ali1531.c
View File

@@ -22,6 +22,7 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/device.h>

1
src/chipset/ali1541.c
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@@ -22,6 +22,7 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/device.h>

1
src/chipset/ali1543.c
View File

@@ -22,6 +22,7 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/device.h>
#include <86box/io.h>

1
src/chipset/ali6117.c
View File

@@ -26,6 +26,7 @@
#include <86box/io.h>
#include <86box/pci.h>
#include <86box/pic.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/device.h>

1
src/chipset/gc100.c
View File

@@ -27,6 +27,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/nmi.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/mem.h>

1
src/chipset/sis_5511_h2p.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/mem.h>

1
src/chipset/sis_5513_p2i.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>

1
src/chipset/sis_5571_h2p.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/mem.h>

1
src/chipset/sis_5581_h2p.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/mem.h>

1
src/chipset/sis_5591_h2p.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/mem.h>

1
src/chipset/sis_5600_h2p.c
View File

@@ -22,6 +22,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/mem.h>

1
src/chipset/sis_85c50x.c
View File

@@ -24,6 +24,7 @@
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/apm.h>
#include <86box/machine.h>

20
src/codegen_new/codegen_backend_x86-64.c
View File

@@ -315,13 +315,19 @@ codegen_backend_init(void)
# endif
host_x86_CALL(block, (void *) x86gpf);
codegen_exit_rout = &codeblock[block_current].data[block_pos];
#ifdef _WIN64
host_x86_ADD64_REG_IMM(block, REG_RSP, 0x38);
#else
host_x86_ADD64_REG_IMM(block, REG_RSP, 0x48);
#endif
host_x86_POP(block, REG_R15);
host_x86_POP(block, REG_R14);
host_x86_POP(block, REG_R13);
host_x86_POP(block, REG_R12);
#ifdef _WIN64
host_x86_POP(block, REG_RDI);
host_x86_POP(block, REG_RSI);
#endif
host_x86_POP(block, REG_RBP);
host_x86_POP(block, REG_RDX);
host_x86_RET(block);
@@ -346,13 +352,19 @@ codegen_backend_prologue(codeblock_t *block)
block_pos = BLOCK_START; /*Entry code*/
host_x86_PUSH(block, REG_RBX);
host_x86_PUSH(block, REG_RBP);
#ifdef _WIN64
host_x86_PUSH(block, REG_RSI);
host_x86_PUSH(block, REG_RDI);
#endif
host_x86_PUSH(block, REG_R12);
host_x86_PUSH(block, REG_R13);
host_x86_PUSH(block, REG_R14);
host_x86_PUSH(block, REG_R15);
#ifdef _WIN64
host_x86_SUB64_REG_IMM(block, REG_RSP, 0x38);
#else
host_x86_SUB64_REG_IMM(block, REG_RSP, 0x48);
#endif
host_x86_MOV64_REG_IMM(block, REG_RBP, ((uintptr_t) &cpu_state) + 128);
if (block->flags & CODEBLOCK_HAS_FPU) {
host_x86_MOV32_REG_ABS(block, REG_EAX, &cpu_state.TOP);
@@ -360,19 +372,25 @@ codegen_backend_prologue(codeblock_t *block)
host_x86_MOV32_BASE_OFFSET_REG(block, REG_RSP, IREG_TOP_diff_stack_offset, REG_EAX);
}
if (block->flags & CODEBLOCK_NO_IMMEDIATES)
host_x86_MOV64_REG_IMM(block, REG_R12, (uintptr_t) ram);
host_x86_MOV64_REG_IMM(block, REG_R12, ((uintptr_t) ram) + 2147483648ULL);
}
void
codegen_backend_epilogue(codeblock_t *block)
{
#ifdef _WIN64
host_x86_ADD64_REG_IMM(block, REG_RSP, 0x38);
#else
host_x86_ADD64_REG_IMM(block, REG_RSP, 0x48);
#endif
host_x86_POP(block, REG_R15);
host_x86_POP(block, REG_R14);
host_x86_POP(block, REG_R13);
host_x86_POP(block, REG_R12);
#ifdef _WIN64
host_x86_POP(block, REG_RDI);
host_x86_POP(block, REG_RSI);
#endif
host_x86_POP(block, REG_RBP);
host_x86_POP(block, REG_RDX);
host_x86_RET(block);

2
src/codegen_new/codegen_backend_x86-64_defs.h
View File

@@ -1,5 +1,5 @@
/*RBP = cpu_state + 128
R12 = ram (if block->flags & CODEBLOCK_NO_IMMEDIATES)*/
R12 = ram + 2147483648 (if block->flags & CODEBLOCK_NO_IMMEDIATES)*/
#define REG_AX 0
#define REG_CX 1
#define REG_DX 2

111
src/codegen_new/codegen_backend_x86-64_ops.c
View File

@@ -505,10 +505,15 @@ host_x86_MOV8_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte3(block, 0xc6, 0x45, offset); /*MOVB offset[RBP], imm_data*/
codegen_addbyte(block, imm_data);
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 7);
codegen_addbyte2(block, 0xc6, 0x85); /*MOVB offset[RBP], imm_data*/
codegen_addlong(block, offset);
codegen_addbyte(block, imm_data);
} else {
if ((uintptr_t) p >> 32)
fatal("host_x86_MOV8_ABS_IMM - out of range %p\n", p);
@@ -523,10 +528,15 @@ host_x86_MOV16_ABS_IMM(codeblock_t *block, void *p, uint16_t imm_data)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 6);
codegen_addbyte4(block, 0x66, 0xc7, 0x45, offset); /*MOV offset[RBP], imm_data*/
codegen_addword(block, imm_data);
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 8);
codegen_addbyte3(block, 0x66, 0xc7, 0x85); /*MOV offset[RBP], imm_data*/
codegen_addlong(block, offset);
codegen_addword(block, imm_data);
} else {
if ((uintptr_t) p >> 32)
fatal("host_x86_MOV32_ABS_IMM - out of range %p\n", p);
@@ -541,10 +551,15 @@ host_x86_MOV32_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 7);
codegen_addbyte3(block, 0xc7, 0x45, offset); /*MOV offset[RBP], imm_data*/
codegen_addlong(block, imm_data);
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 10);
codegen_addbyte2(block, 0xc7, 0x85); /*MOV offset[RBP], imm_data*/
codegen_addlong(block, offset);
codegen_addlong(block, imm_data);
} else {
if ((uintptr_t) p >> 32)
fatal("host_x86_MOV32_ABS_IMM - out of range %p\n", p);
@@ -563,9 +578,13 @@ host_x86_MOV8_ABS_REG(codeblock_t *block, void *p, int src_reg)
if (src_reg & 8)
fatal("host_x86_MOV8_ABS_REG - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x88, 0x45 | ((src_reg & 7) << 3), offset); /*MOVB offset[RBP], src_reg*/
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 6);
codegen_addbyte2(block, 0x88, 0x85 | ((src_reg & 7) << 3)); /*MOVB offset[RBP], src_reg*/
codegen_addlong(block, offset);
} else {
if ((uintptr_t) p >> 32)
fatal("host_x86_MOV8_ABS_REG - out of range %p\n", p);
@@ -583,7 +602,7 @@ host_x86_MOV16_ABS_REG(codeblock_t *block, void *p, int src_reg)
if (src_reg & 8)
fatal("host_x86_MOV16_ABS_REG - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x66, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
} else if (offset < (1ULL << 32)) {
@@ -603,7 +622,7 @@ host_x86_MOV32_ABS_REG(codeblock_t *block, void *p, int src_reg)
if (src_reg & 8)
fatal("host_x86_MOV32_ABS_REG - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
} else if (offset < (1ULL << 32)) {
@@ -627,9 +646,13 @@ host_x86_MOV64_ABS_REG(codeblock_t *block, void *p, int src_reg)
if (src_reg & 8)
fatal("host_x86_MOV64_ABS_REG - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x48, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 7);
codegen_addbyte3(block, 0x48, 0x89, 0x85 | ((src_reg & 7) << 3)); /*MOV offset[RBP], src_reg*/
codegen_addlong(block, offset);
} else {
if ((uintptr_t) p >> 32)
fatal("host_x86_MOV64_ABS_REG - out of range %p\n", p);
@@ -683,19 +706,19 @@ void
host_x86_MOV8_REG_ABS(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
if (dst_reg & 8)
fatal("host_x86_MOV8_REG_ABS reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x8a, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 6);
codegen_addbyte2(block, 0x8a, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
codegen_addlong(block, offset);
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
codegen_alloc_bytes(block, 8);
codegen_addbyte4(block, 0x41, 0x8a, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOV dst_reg, ram_offset[R12]*/
codegen_addlong(block, ram_offset);
@@ -707,19 +730,19 @@ void
host_x86_MOV16_REG_ABS(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
if (dst_reg & 8)
fatal("host_x86_MOV16_REG_ABS reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x66, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 7);
codegen_addbyte3(block, 0x66, 0x8b, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
codegen_addlong(block, offset);
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
codegen_alloc_bytes(block, 9);
codegen_addbyte4(block, 0x66, 0x41, 0x8b, 0x84 | ((dst_reg & 7) << 3)); /*MOV dst_reg, ram_offset[R12]*/
codegen_addbyte(block, 0x24);
@@ -737,19 +760,19 @@ void
host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
if (dst_reg & 8)
fatal("host_x86_MOV32_REG_ABS reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
} else if (offset < (1ULL << 32)) {
codegen_alloc_bytes(block, 6);
codegen_addbyte2(block, 0x8b, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
codegen_addlong(block, offset);
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
codegen_alloc_bytes(block, 8);
codegen_addbyte4(block, 0x41, 0x8b, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOV dst_reg, ram_offset[R12]*/
codegen_addlong(block, ram_offset);
@@ -769,7 +792,7 @@ host_x86_MOV64_REG_ABS(codeblock_t *block, int dst_reg, void *p)
if (dst_reg & 8)
fatal("host_x86_MOV64_REG_ABS reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x48, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
} else if (offset < (1ULL << 32)) {
@@ -822,14 +845,14 @@ host_x86_MOV16_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, in
if ((dst_reg & 8) || (base_reg & 8))
fatal("host_x86_MOV16_REG_BASE_OFFSET reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 5);
codegen_addbyte(block, 0x66);
codegen_addbyte(block, 0x66); /* MOV dst_reg, [RSP + offset] */
codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
} else {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x66, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
codegen_addbyte4(block, 0x66, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset); /* MOV dst_reg, [base_reg + offset] */
}
} else
fatal("MOV16_REG_BASE_OFFSET - offset %i\n", offset);
@@ -840,13 +863,13 @@ host_x86_MOV32_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, in
if ((dst_reg & 8) || (base_reg & 8))
fatal("host_x86_MOV32_REG_BASE_OFFSET reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset); /* MOV dst_reg, [RSP + offset] */
} else {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
codegen_addbyte3(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset); /* MOV dst_reg, [base_reg + offset] */
}
} else
fatal("MOV32_REG_BASE_OFFSET - offset %i\n", offset);
@@ -857,14 +880,14 @@ host_x86_MOV64_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, in
if ((dst_reg & 8) || (base_reg & 8))
fatal("host_x86_MOV64_REG_BASE_OFFSET reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 5);
codegen_addbyte(block, 0x48);
codegen_addbyte(block, 0x48); /* MOV dst_reg, [RSP + offset] */
codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
} else {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x48, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
codegen_addbyte4(block, 0x48, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset); /* MOV dst_reg, [base_reg + offset] */
}
} else
fatal("MOV32_REG_BASE_OFFSET - offset %i\n", offset);
@@ -876,13 +899,13 @@ host_x86_MOV32_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int
if ((src_reg & 8) || (base_reg & 8))
fatal("host_x86_MOV32_BASE_OFFSET_REG reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 4);
codegen_alloc_bytes(block, 4); /* MOV [RSP + offset], src_reg*/
codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
} else {
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
codegen_addbyte3(block, 0x89, 0x40 | base_reg | (src_reg << 3), offset); /* MOV [base_reg + offset], src_reg*/
}
} else
fatal("MOV32_BASE_OFFSET_REG - offset %i\n", offset);
@@ -893,14 +916,14 @@ host_x86_MOV64_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int
if ((src_reg & 8) || (base_reg & 8))
fatal("host_x86_MOV64_BASE_OFFSET_REG reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 5);
codegen_addbyte(block, 0x48);
codegen_addbyte(block, 0x48); /* MOV [RSP + offset], src_reg*/
codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
} else {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x48, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
codegen_addbyte4(block, 0x48, 0x89, 0x40 | base_reg | (src_reg << 3), offset); /* MOV [base_reg + offset], src_reg*/
}
} else
fatal("MOV64_BASE_OFFSET_REG - offset %i\n", offset);
@@ -912,14 +935,14 @@ host_x86_MOV32_BASE_OFFSET_IMM(codeblock_t *block, int base_reg, int offset, uin
if (base_reg & 8)
fatal("host_x86_MOV32_BASE_OFFSET_IMM reg & 8\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (base_reg == REG_RSP) {
codegen_alloc_bytes(block, 8);
codegen_addbyte4(block, 0xc7, 0x40 | base_reg, 0x24, offset);
codegen_addbyte4(block, 0xc7, 0x40 | base_reg, 0x24, offset); /* MOV [RSP + offset], imm_data */
codegen_addlong(block, imm_data);
} else {
codegen_alloc_bytes(block, 7);
codegen_addbyte3(block, 0xc7, 0x40 | base_reg, offset);
codegen_addbyte3(block, 0xc7, 0x40 | base_reg, offset); /* MOV [base_reg + offset], src_reg*/
codegen_addlong(block, imm_data);
}
} else
@@ -1084,16 +1107,16 @@ void
host_x86_MOVZX_REG_ABS_16_8(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
if (dst_reg & 8)
fatal("host_x86_MOVZX_REG_ABS_16_8 - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 5);
codegen_addbyte(block, 0x66);
codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
codegen_alloc_bytes(block, 10);
codegen_addbyte2(block, 0x66, 0x41);
codegen_addbyte4(block, 0x0f, 0xb6, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOVZX dst_reg, ram_offset[R12]*/
@@ -1111,14 +1134,14 @@ void
host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
#if 0
if (dst_reg & 8)
fatal("host_x86_MOVZX_REG_ABS_32_8 - bad reg\n");
#endif
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
if (dst_reg & 8) {
codegen_alloc_bytes(block, 5);
codegen_addbyte(block, 0x44);
@@ -1127,7 +1150,7 @@ host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p)
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
}
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
if (dst_reg & 8)
fatal("host_x86_MOVZX_REG_ABS_32_8 - bad reg\n");
@@ -1150,15 +1173,15 @@ void
host_x86_MOVZX_REG_ABS_32_16(codeblock_t *block, int dst_reg, void *p)
{
int64_t offset = (uintptr_t) p - (((uintptr_t) &cpu_state) + 128);
int64_t ram_offset = (uintptr_t) p - (uintptr_t) ram;
int64_t ram_offset = (uintptr_t) p - (((uintptr_t) ram) + 2147483648ULL);
if (dst_reg & 8)
fatal("host_x86_MOVZX_REG_ABS_32_16 - bad reg\n");
if (offset >= -128 && offset < 127) {
if (offset >= -128 && offset <= 127) {
codegen_alloc_bytes(block, 4);
codegen_addbyte4(block, 0x0f, 0xb7, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
} else if ((ram_offset < (1ULL << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
} else if ((ram_offset >= -2147483648LL) && (ram_offset <= 2147483647LL) && (block->flags & CODEBLOCK_NO_IMMEDIATES)) {
codegen_alloc_bytes(block, 9);
codegen_addbyte(block, 0x41);
codegen_addbyte4(block, 0x0f, 0xb7, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOVZX dst_reg, ram_offset[R12]*/

5
src/config.c
View File

@@ -168,6 +168,7 @@ load_general(void)
kbd_req_capture = ini_section_get_int(cat, "kbd_req_capture", 0);
hide_status_bar = ini_section_get_int(cat, "hide_status_bar", 0);
hide_tool_bar = ini_section_get_int(cat, "hide_tool_bar", 0);
sound_muted = ini_section_get_int(cat, "sound_muted", 0);
confirm_reset = ini_section_get_int(cat, "confirm_reset", 1);
confirm_exit = ini_section_get_int(cat, "confirm_exit", 1);
@@ -1846,6 +1847,10 @@ save_general(void)
const char *va_name;
ini_section_set_int(cat, "sound_muted", sound_muted);
if (sound_muted == 0)
ini_section_delete_var(cat, "sound_muted");
ini_section_set_int(cat, "vid_resize", vid_resize);
if (vid_resize == 0)
ini_section_delete_var(cat, "vid_resize");

3
src/cpu/386_dynarec_ops.c
View File

@@ -1,6 +1,7 @@
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <math.h>

117
src/cpu/386_ops.h
View File

@@ -206,6 +206,7 @@ extern void x386_dynarec_log(const char *fmt, ...);
# include "x86_ops_mmx_mov.h"
# include "x86_ops_mmx_pack.h"
# include "x86_ops_mmx_shift.h"
# include "x86_ops_mmx_emmi.h"
#endif
#include "x86_ops_mov.h"
#ifdef OPS_286_386
@@ -859,12 +860,12 @@ const OpFn OP_TABLE(c486_0f)[1024] = {
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
@@ -1384,7 +1385,6 @@ const OpFn OP_TABLE(pentium_0f)[1024] = {
// clang-format on
};
# ifdef USE_CYRIX_6X86
const OpFn OP_TABLE(c6x86_0f)[1024] = {
// clang-format off
/*16-bit data, 16-bit addr*/
@@ -1392,7 +1392,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1414,7 +1414,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1436,7 +1436,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1458,7 +1458,99 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
// clang-format on
};
const OpFn OP_TABLE(c6x86l_0f)[1024] = {
// clang-format off
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ opMOV_b_r_a16, opMOV_w_r_a16, opMOV_r_b_a16, opMOV_r_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
/*32-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ opMOV_b_r_a16, opMOV_l_r_a16, opMOV_r_b_a16, opMOV_r_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*16-bit data, 32-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ opMOV_b_r_a32, opMOV_w_r_a32, opMOV_r_b_a32, opMOV_r_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*32-bit data, 32-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ opMOV_b_r_a32, opMOV_l_r_a32, opMOV_r_b_a32, opMOV_r_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1476,7 +1568,6 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
// clang-format on
};
# endif /* USE_CYRIX_6X86 */
const OpFn OP_TABLE(pentiummmx_0f)[1024] = {
// clang-format off
@@ -1754,7 +1845,6 @@ const OpFn OP_TABLE(k62_0f)[1024] = {
// clang-format on
};
# ifdef USE_CYRIX_6X86
const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
// clang-format off
/*16-bit data, 16-bit addr*/
@@ -1765,7 +1855,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ opPAVEB_a16, opPADDSIW_a16, opPMAGW_a16, ILLEGAL, opPDISTIB_a16, opPSUBSIW_a16, ILLEGAL, ILLEGAL, opPMVZB_a16, opPMULHRWC_a16, opPMVNZB_a16, opPMVLZB_a16, opPMVGEZB_a16, opPMULHRIW_a16, opPMACHRIW_a16, ILLEGAL,
/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
@@ -1787,7 +1877,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ opPAVEB_a16, opPADDSIW_a16, opPMAGW_a16, ILLEGAL, opPDISTIB_a16, opPSUBSIW_a16, ILLEGAL, ILLEGAL, opPMVZB_a16, opPMULHRWC_a16, opPMVNZB_a16, opPMVLZB_a16, opPMVGEZB_a16, opPMULHRIW_a16, opPMACHRIW_a16, ILLEGAL,
/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
@@ -1809,7 +1899,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ opPAVEB_a32, opPADDSIW_a32, opPMAGW_a32, ILLEGAL, opPDISTIB_a32, opPSUBSIW_a32, ILLEGAL, ILLEGAL, opPMVZB_a32, opPMULHRWC_a32, opPMVNZB_a32, opPMVLZB_a32, opPMVGEZB_a32, opPMULHRIW_a32, opPMACHRIW_a32, ILLEGAL,
/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
@@ -1831,7 +1921,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*50*/ opPAVEB_a32, opPADDSIW_a32, opPMAGW_a32, ILLEGAL, opPDISTIB_a32, opPSUBSIW_a32, ILLEGAL, ILLEGAL, opPMVZB_a32, opPMULHRWC_a32, opPMVNZB_a32, opPMVLZB_a32, opPMVGEZB_a32, opPMULHRIW_a32, opPMACHRIW_a32, ILLEGAL,
/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
@@ -1846,7 +1936,6 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
// clang-format on
};
# endif /* USE_CYRIX_6X86 */
const OpFn OP_TABLE(pentiumpro_0f)[1024] = {
// clang-format off

10
src/cpu/CMakeLists.txt
View File

@@ -42,20 +42,12 @@ endif()
endif()
if(CYRIX_6X86)
target_compile_definitions(cpu PRIVATE USE_CYRIX_6X86)
if(DYNAREC)
add_library(ct686 OBJECT codegen_timing_686.c)
target_link_libraries(86Box ct686)
endif()
endif()
if(DYNAREC)
target_sources(cpu PRIVATE 386_dynarec_ops.c)
add_library(cgt OBJECT
codegen_timing_486.c
codegen_timing_686.c
codegen_timing_common.c
codegen_timing_k6.c
codegen_timing_pentium.c

67
src/cpu/cpu.c
View File

@@ -280,13 +280,14 @@ uint8_t do_translate2 = 0;
void (*cpu_exec)(int32_t cycs);
static uint8_t ccr0;
static uint8_t ccr1;
static uint8_t ccr2;
static uint8_t ccr3;
static uint8_t ccr4;
static uint8_t ccr5;
static uint8_t ccr6;
uint8_t ccr0;
uint8_t ccr1;
uint8_t ccr2;
uint8_t ccr3;
uint8_t ccr4;
uint8_t ccr5;
uint8_t ccr6;
uint8_t ccr7;
static int cyrix_addr;
@@ -558,7 +559,8 @@ cpu_set(void)
cpu_busspeed = cpu_s->rspeed;
cpu_multi = (int) ceil(cpu_s->multi);
cpu_dmulti = cpu_s->multi;
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = 0;
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
ccr4 = 0x85;
cpu_update_waitstates();
@@ -1419,7 +1421,6 @@ cpu_set(void)
#endif /* USE_DYNAREC */
break;
#ifdef USE_CYRIX_6X86
case CPU_Cx6x86:
case CPU_Cx6x86L:
case CPU_CxGX1:
@@ -1443,19 +1444,27 @@ cpu_set(void)
}
# endif /* USE_DYNAREC */
if (fpu_softfloat) {
x86_opcodes_d9_a16 = ops_sf_fpu_cyrix_d9_a16;
x86_opcodes_d9_a32 = ops_sf_fpu_cyrix_d9_a32;
x86_opcodes_da_a16 = ops_sf_fpu_686_da_a16;
x86_opcodes_da_a32 = ops_sf_fpu_686_da_a32;
x86_opcodes_db_a16 = ops_sf_fpu_686_db_a16;
x86_opcodes_db_a32 = ops_sf_fpu_686_db_a32;
x86_opcodes_df_a16 = ops_sf_fpu_686_df_a16;
x86_opcodes_df_a32 = ops_sf_fpu_686_df_a32;
x86_opcodes_db_a16 = ops_sf_fpu_cyrix_686_db_a16;
x86_opcodes_db_a32 = ops_sf_fpu_cyrix_686_db_a32;
x86_opcodes_dd_a16 = ops_sf_fpu_cyrix_dd_a16;
x86_opcodes_dd_a32 = ops_sf_fpu_cyrix_dd_a32;
x86_opcodes_df_a16 = ops_sf_fpu_cyrix_686_df_a16;
x86_opcodes_df_a32 = ops_sf_fpu_cyrix_686_df_a32;
} else {
x86_opcodes_d9_a16 = ops_fpu_cyrix_d9_a16;
x86_opcodes_d9_a32 = ops_fpu_cyrix_d9_a32;
x86_opcodes_da_a16 = ops_fpu_686_da_a16;
x86_opcodes_da_a32 = ops_fpu_686_da_a32;
x86_opcodes_db_a16 = ops_fpu_686_db_a16;
x86_opcodes_db_a32 = ops_fpu_686_db_a32;
x86_opcodes_df_a16 = ops_fpu_686_df_a16;
x86_opcodes_df_a32 = ops_fpu_686_df_a32;
x86_opcodes_db_a16 = ops_fpu_cyrix_686_db_a16;
x86_opcodes_db_a32 = ops_fpu_cyrix_686_db_a32;
x86_opcodes_dd_a16 = ops_fpu_cyrix_dd_a16;
x86_opcodes_dd_a32 = ops_fpu_cyrix_dd_a32;
x86_opcodes_df_a16 = ops_fpu_cyrix_686_df_a16;
x86_opcodes_df_a32 = ops_fpu_cyrix_686_df_a32;
}
}
@@ -1463,22 +1472,16 @@ cpu_set(void)
if (cpu_s->cpu_type == CPU_Cx6x86MX)
x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f);
else if (cpu_s->cpu_type == CPU_Cx6x86L)
x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f);
x86_setopcodes(ops_386, ops_c6x86l_0f, dynarec_ops_386, dynarec_ops_c6x86l_0f);
else
x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f);
# if 0
x86_setopcodes(ops_386, ops_c6x86_0f, dynarec_ops_386, dynarec_ops_c6x86_0f);
# endif
# else
if (cpu_s->cpu_type == CPU_Cx6x86MX)
x86_setopcodes(ops_386, ops_c6x86mx_0f);
else if (cpu_s->cpu_type == CPU_Cx6x86L)
x86_setopcodes(ops_386, ops_pentium_0f);
x86_setopcodes(ops_386, ops_c6x86l_0f);
else
x86_setopcodes(ops_386, ops_c6x86mx_0f);
# if 0
x86_setopcodes(ops_386, ops_c6x86_0f);
# endif
# endif /* USE_DYNAREC */
timing_rr = 1; /* register dest - register src */
@@ -1538,7 +1541,6 @@ cpu_set(void)
else if (CPU_Cx6x86)
CPUID = 0; /* Disabled on powerup by default */
break;
#endif /* USE_CYRIX_6X86 */
#ifdef USE_AMD_K5
case CPU_K5:
@@ -2383,7 +2385,6 @@ cpu_CPUID(void)
EAX = EBX = ECX = EDX = 0;
break;
#ifdef USE_CYRIX_6X86
case CPU_Cx6x86:
if (!EAX) {
EAX = 0x00000001;
@@ -2444,7 +2445,6 @@ cpu_CPUID(void)
} else
EAX = EBX = ECX = EDX = 0;
break;
#endif /* USE_CYRIX_6X86 */
case CPU_PENTIUMPRO:
if (!EAX) {
@@ -3121,7 +3121,6 @@ pentium_invalid_rdmsr:
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
break;
#ifdef USE_CYRIX_6X86
case CPU_Cx6x86:
case CPU_Cx6x86L:
case CPU_CxGX1:
@@ -3161,7 +3160,6 @@ pentium_invalid_rdmsr:
}
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
break;
#endif /* USE_CYRIX_6X86 */
case CPU_PENTIUMPRO:
case CPU_PENTIUM2:
@@ -3942,7 +3940,6 @@ pentium_invalid_wrmsr:
}
break;
#ifdef USE_CYRIX_6X86
case CPU_Cx6x86:
case CPU_Cx6x86L:
case CPU_CxGX1:
@@ -3976,7 +3973,6 @@ pentium_invalid_wrmsr:
break;
}
break;
#endif /* USE_CYRIX_6X86 */
case CPU_PENTIUMPRO:
case CPU_PENTIUM2:
@@ -4280,14 +4276,12 @@ cpu_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
case 0xe8: /* CCR4 */
if ((ccr3 & 0xf0) == 0x10) {
ccr4 = val;
#ifdef USE_CYRIX_6X86
if (cpu_s->cpu_type >= CPU_Cx6x86) {
if (val & 0x80)
CPUID = cpu_s->cpuid_model;
else
CPUID = 0;
}
#endif /* USE_CYRIX_6X86 */
}
break;
case 0xe9: /* CCR5 */
@@ -4298,6 +4292,9 @@ cpu_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
if ((ccr3 & 0xf0) == 0x10)
ccr6 = val;
break;
case 0xeb: /* CCR7 */
ccr7 = val & 5;
break;
}
}
@@ -4326,6 +4323,8 @@ cpu_read(uint16_t addr, UNUSED(void *priv))
return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff;
case 0xea:
return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff;
case 0xeb:
return ccr7;
case 0xfe:
return cpu_s->cyrix_id & 0xff;
case 0xff:

60
src/cpu/cpu.h
View File

@@ -87,30 +87,32 @@ enum {
enum {
CPU_PKG_8088 = (1 << 0),
CPU_PKG_8088_EUROPC = (1 << 1),
CPU_PKG_8086 = (1 << 2),
CPU_PKG_8086_MAZOVIA = (1 << 3),
CPU_PKG_188 = (1 << 4),
CPU_PKG_186 = (1 << 5),
CPU_PKG_286 = (1 << 6),
CPU_PKG_386SX = (1 << 7),
CPU_PKG_386DX = (1 << 8),
CPU_PKG_386DX_DESKPRO386 = (1 << 9),
CPU_PKG_M6117 = (1 << 10),
CPU_PKG_386SLC_IBM = (1 << 11),
CPU_PKG_486SLC = (1 << 12),
CPU_PKG_486SLC_IBM = (1 << 13),
CPU_PKG_486BL = (1 << 14),
CPU_PKG_486DLC = (1 << 15),
CPU_PKG_SOCKET1 = (1 << 16),
CPU_PKG_SOCKET3 = (1 << 17),
CPU_PKG_SOCKET3_PC330 = (1 << 18),
CPU_PKG_STPC = (1 << 19),
CPU_PKG_SOCKET4 = (1 << 20),
CPU_PKG_SOCKET5_7 = (1 << 21),
CPU_PKG_SOCKET8 = (1 << 22),
CPU_PKG_SLOT1 = (1 << 23),
CPU_PKG_SLOT2 = (1 << 24),
CPU_PKG_SOCKET370 = (1 << 25)
CPU_PKG_8088_VTECH = (1 << 2),
CPU_PKG_8086 = (1 << 3),
CPU_PKG_8086_MAZOVIA = (1 << 4),
CPU_PKG_8086_VTECH = (1 << 5),
CPU_PKG_188 = (1 << 6),
CPU_PKG_186 = (1 << 7),
CPU_PKG_286 = (1 << 8),
CPU_PKG_386SX = (1 << 9),
CPU_PKG_386DX = (1 << 10),
CPU_PKG_386DX_DESKPRO386 = (1 << 11),
CPU_PKG_M6117 = (1 << 12),
CPU_PKG_386SLC_IBM = (1 << 13),
CPU_PKG_486SLC = (1 << 14),
CPU_PKG_486SLC_IBM = (1 << 15),
CPU_PKG_486BL = (1 << 16),
CPU_PKG_486DLC = (1 << 17),
CPU_PKG_SOCKET1 = (1 << 18),
CPU_PKG_SOCKET3 = (1 << 19),
CPU_PKG_SOCKET3_PC330 = (1 << 20),
CPU_PKG_STPC = (1 << 21),
CPU_PKG_SOCKET4 = (1 << 22),
CPU_PKG_SOCKET5_7 = (1 << 23),
CPU_PKG_SOCKET8 = (1 << 24),
CPU_PKG_SLOT1 = (1 << 25),
CPU_PKG_SLOT2 = (1 << 26),
CPU_PKG_SOCKET370 = (1 << 27)
};
#define CPU_SUPPORTS_DYNAREC 1
@@ -587,6 +589,16 @@ extern uint32_t _tr[8];
extern uint32_t cache_index;
extern uint8_t _cache[2048];
/* For the Cyrix 6x86(MX) */
extern uint8_t ccr0;
extern uint8_t ccr1;
extern uint8_t ccr2;
extern uint8_t ccr3;
extern uint8_t ccr4;
extern uint8_t ccr5;
extern uint8_t ccr6;
extern uint8_t ccr7;
/*Segments -
_cs,_ds,_es,_ss are the segment structures
CS,DS,ES,SS is the 16-bit data

89
src/cpu/cpu_table.c
View File

@@ -262,6 +262,50 @@ const cpu_family_t cpu_families[] = {
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_8088_VTECH,
.manufacturer = "Intel",
.name = "8088",
.internal_name = "8088_vtech",
.cpus = (const CPU[]) {
{
.name = "4.77",
.cpu_type = CPU_8088,
.fpus = fpus_8088,
.rspeed = 4772728,
.multi = 1,
.voltage = 5000,
.edx_reset = 0,
.cpuid_model = 0,
.cyrix_id = 0,
.cpu_flags = 0,
.mem_read_cycles = 0,
.mem_write_cycles = 0,
.cache_read_cycles = 0,
.cache_write_cycles = 0,
.atclk_div = 1
},
{
.name = "10",
.cpu_type = CPU_8088,
.fpus = fpus_8088,
.rspeed = 10000000,
.multi = 1,
.voltage = 5000,
.edx_reset = 0,
.cpuid_model = 0,
.cyrix_id = 0,
.cpu_flags = 0,
.mem_read_cycles = 0,
.mem_write_cycles = 0,
.cache_read_cycles = 0,
.cache_write_cycles = 0,
.atclk_div = 1
},
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_8086,
.manufacturer = "Intel",
@@ -399,6 +443,49 @@ const cpu_family_t cpu_families[] = {
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_8086_VTECH,
.manufacturer = "Intel",
.name = "8086",
.internal_name = "8086_vtech",
.cpus = (const CPU[]) {
{
.name = "4.77",
.cpu_type = CPU_8086,
.fpus = fpus_8088,
.rspeed = 4772728,
.multi = 1,
.voltage = 5000,
.edx_reset = 0,
.cpuid_model = 0,
.cyrix_id = 0,
.cpu_flags = 0,
.mem_read_cycles = 0,
.mem_write_cycles = 0,
.cache_read_cycles = 0,
.cache_write_cycles = 0,
.atclk_div = 1
},
{
.name = "10",
.cpu_type = CPU_8086,
.fpus = fpus_8088,
.rspeed = 10000000,
.multi = 1,
.voltage = 5000,
.edx_reset = 0,
.cpuid_model = 0,
.cyrix_id = 0,
.cpu_flags = 0,
.mem_read_cycles = 0,
.mem_write_cycles = 0,
.cache_read_cycles = 0,
.cache_write_cycles = 0,
.atclk_div = 1
},
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_188,
.manufacturer = "Intel",
@@ -6008,7 +6095,6 @@ const cpu_family_t cpu_families[] = {
{ .name = "", 0 }
}
},
#ifdef USE_CYRIX_6X86
{
.package = CPU_PKG_SOCKET5_7,
.manufacturer = "Cyrix",
@@ -6368,7 +6454,6 @@ const cpu_family_t cpu_families[] = {
{ .name = "", 0 }
}
},
#endif /* USE_CYRIX_6X86 */
{
.package = CPU_PKG_SOCKET8,
.manufacturer = "Intel",

6
src/cpu/x86.c
View File

@@ -272,6 +272,12 @@ reset_common(int hard)
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
msw = 0;
new_ne = 0;
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
ccr4 = 0x85;
cyrix.arr[3].base = 0x30000;
cyrix.arr[3].size = 65536;
if (hascache)
cr0 = 1 << 30;
else

24
src/cpu/x86_ops.h
View File

@@ -90,10 +90,9 @@ extern const OpFn dynarec_ops_winchip2_0f[1024];
extern const OpFn dynarec_ops_pentium_0f[1024];
extern const OpFn dynarec_ops_pentiummmx_0f[1024];
# ifdef USE_CYRIX_6X86
extern const OpFn dynarec_ops_c6x86_0f[1024];
extern const OpFn dynarec_ops_c6x86l_0f[1024];
extern const OpFn dynarec_ops_c6x86mx_0f[1024];
# endif /* USE_CYRIX_6X86 */
extern const OpFn dynarec_ops_k6_0f[1024];
extern const OpFn dynarec_ops_k62_0f[1024];
@@ -232,10 +231,9 @@ extern const OpFn ops_winchip2_0f[1024];
extern const OpFn ops_pentium_0f[1024];
extern const OpFn ops_pentiummmx_0f[1024];
#ifdef USE_CYRIX_6X86
extern const OpFn ops_c6x86_0f[1024];
extern const OpFn ops_c6x86l_0f[1024];
extern const OpFn ops_c6x86mx_0f[1024];
#endif /* USE_CYRIX_6X86 */
extern const OpFn ops_k6_0f[1024];
extern const OpFn ops_k62_0f[1024];
@@ -263,14 +261,20 @@ extern const OpFn ops_sf_fpu_d8_a16[32];
extern const OpFn ops_sf_fpu_d8_a32[32];
extern const OpFn ops_sf_fpu_d9_a16[256];
extern const OpFn ops_sf_fpu_d9_a32[256];
extern const OpFn ops_sf_fpu_cyrix_d9_a16[256];
extern const OpFn ops_sf_fpu_cyrix_d9_a32[256];
extern const OpFn ops_sf_fpu_da_a16[256];
extern const OpFn ops_sf_fpu_da_a32[256];
extern const OpFn ops_sf_fpu_db_a16[256];
extern const OpFn ops_sf_fpu_db_a32[256];
extern const OpFn ops_sf_fpu_cyrix_686_db_a16[256];
extern const OpFn ops_sf_fpu_cyrix_686_db_a32[256];
extern const OpFn ops_sf_fpu_dc_a16[32];
extern const OpFn ops_sf_fpu_dc_a32[32];
extern const OpFn ops_sf_fpu_dd_a16[256];
extern const OpFn ops_sf_fpu_dd_a32[256];
extern const OpFn ops_sf_fpu_cyrix_dd_a16[256];
extern const OpFn ops_sf_fpu_cyrix_dd_a32[256];
extern const OpFn ops_sf_fpu_de_a16[256];
extern const OpFn ops_sf_fpu_de_a32[256];
extern const OpFn ops_sf_fpu_df_a16[256];
@@ -295,6 +299,8 @@ extern const OpFn ops_fpu_d8_a16[32];
extern const OpFn ops_fpu_d8_a32[32];
extern const OpFn ops_fpu_d9_a16[256];
extern const OpFn ops_fpu_d9_a32[256];
extern const OpFn ops_fpu_cyrix_d9_a16[256];
extern const OpFn ops_fpu_cyrix_d9_a32[256];
extern const OpFn ops_fpu_da_a16[256];
extern const OpFn ops_fpu_da_a32[256];
extern const OpFn ops_fpu_db_a16[256];
@@ -303,6 +309,8 @@ extern const OpFn ops_fpu_dc_a16[32];
extern const OpFn ops_fpu_dc_a32[32];
extern const OpFn ops_fpu_dd_a16[256];
extern const OpFn ops_fpu_dd_a32[256];
extern const OpFn ops_fpu_cyrix_dd_a16[256];
extern const OpFn ops_fpu_cyrix_dd_a32[256];
extern const OpFn ops_fpu_de_a16[256];
extern const OpFn ops_fpu_de_a32[256];
extern const OpFn ops_fpu_df_a16[256];
@@ -314,15 +322,23 @@ extern const OpFn ops_sf_fpu_686_da_a16[256];
extern const OpFn ops_sf_fpu_686_da_a32[256];
extern const OpFn ops_sf_fpu_686_db_a16[256];
extern const OpFn ops_sf_fpu_686_db_a32[256];
extern const OpFn ops_sf_fpu_cyrix_686_db_a16[256];
extern const OpFn ops_sf_fpu_cyrix_686_db_a32[256];
extern const OpFn ops_sf_fpu_686_df_a16[256];
extern const OpFn ops_sf_fpu_686_df_a32[256];
extern const OpFn ops_sf_fpu_cyrix_686_df_a16[256];
extern const OpFn ops_sf_fpu_cyrix_686_df_a32[256];
extern const OpFn ops_fpu_686_da_a16[256];
extern const OpFn ops_fpu_686_da_a32[256];
extern const OpFn ops_fpu_686_db_a16[256];
extern const OpFn ops_fpu_686_db_a32[256];
extern const OpFn ops_fpu_cyrix_686_db_a16[256];
extern const OpFn ops_fpu_cyrix_686_db_a32[256];
extern const OpFn ops_fpu_686_df_a16[256];
extern const OpFn ops_fpu_686_df_a32[256];
extern const OpFn ops_fpu_cyrix_686_df_a16[256];
extern const OpFn ops_fpu_cyrix_686_df_a32[256];
extern const OpFn ops_REPE[1024];
extern const OpFn ops_REPNE[1024];

807
src/cpu/x86_ops_mmx_emmi.h Normal file
View File

@@ -0,0 +1,807 @@
/* Notes: "src2" means "first operand" */
static int
opPMULHRWC_a16(UNUSED(uint32_t fetchdat))
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULHRWC_a32(UNUSED(uint32_t fetchdat))
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULHRIW_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->w[0] = (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] = (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] = (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] = (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPMULHRIW_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->w[0] = (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] = (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] = (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] = (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPDISTIB_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] + abs(src2.b[0] - src.b[0]));
dst->b[1] = USATB(dst->b[1] + abs(src2.b[1] - src.b[1]));
dst->b[2] = USATB(dst->b[2] + abs(src2.b[2] - src.b[2]));
dst->b[3] = USATB(dst->b[3] + abs(src2.b[3] - src.b[3]));
dst->b[4] = USATB(dst->b[4] + abs(src2.b[4] - src.b[4]));
dst->b[5] = USATB(dst->b[5] + abs(src2.b[5] - src.b[5]));
dst->b[6] = USATB(dst->b[6] + abs(src2.b[6] - src.b[6]));
dst->b[7] = USATB(dst->b[7] + abs(src2.b[7] - src.b[7]));
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPDISTIB_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] + abs(src2.b[0] - src.b[0]));
dst->b[1] = USATB(dst->b[1] + abs(src2.b[1] - src.b[1]));
dst->b[2] = USATB(dst->b[2] + abs(src2.b[2] - src.b[2]));
dst->b[3] = USATB(dst->b[3] + abs(src2.b[3] - src.b[3]));
dst->b[4] = USATB(dst->b[4] + abs(src2.b[4] - src.b[4]));
dst->b[5] = USATB(dst->b[5] + abs(src2.b[5] - src.b[5]));
dst->b[6] = USATB(dst->b[6] + abs(src2.b[6] - src.b[6]));
dst->b[7] = USATB(dst->b[7] + abs(src2.b[7] - src.b[7]));
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPMACHRIW_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->w[0] += (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] += (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] += (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] += (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPMACHRIW_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->w[0] += (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
dst->w[1] += (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
dst->w[2] += (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
dst->w[3] += (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPADDSIW_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->sw[0] = SSATW(src2.sw[0] + src.sw[0]);
dst->sw[1] = SSATW(src2.sw[1] + src.sw[1]);
dst->sw[2] = SSATW(src2.sw[2] + src.sw[2]);
dst->sw[3] = SSATW(src2.sw[3] + src.sw[3]);
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPADDSIW_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->sw[0] = SSATW(src2.sw[0] + src.sw[0]);
dst->sw[1] = SSATW(src2.sw[1] + src.sw[1]);
dst->sw[2] = SSATW(src2.sw[2] + src.sw[2]);
dst->sw[3] = SSATW(src2.sw[3] + src.sw[3]);
MMX_SETEXP(cpu_reg ^ 1);
return 0;
}
static int
opPSUBSIW_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->sw[0] = SSATW(src2.sw[0] - src.sw[0]);
dst->sw[1] = SSATW(src2.sw[1] - src.sw[1]);
dst->sw[2] = SSATW(src2.sw[2] - src.sw[2]);
dst->sw[3] = SSATW(src2.sw[3] - src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBSIW_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
src2 = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_reg ^ 1);
MMX_GETSRC();
dst->sw[0] = SSATW(src2.sw[0] - src.sw[0]);
dst->sw[1] = SSATW(src2.sw[1] - src.sw[1]);
dst->sw[2] = SSATW(src2.sw[2] - src.sw[2]);
dst->sw[3] = SSATW(src2.sw[3] - src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPAVEB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->b[0] + src.b[0]) >> 1;
dst->b[1] = (dst->b[1] + src.b[1]) >> 1;
dst->b[2] = (dst->b[2] + src.b[2]) >> 1;
dst->b[3] = (dst->b[3] + src.b[3]) >> 1;
dst->b[4] = (dst->b[4] + src.b[4]) >> 1;
dst->b[5] = (dst->b[5] + src.b[5]) >> 1;
dst->b[6] = (dst->b[6] + src.b[6]) >> 1;
dst->b[7] = (dst->b[7] + src.b[7]) >> 1;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPAVEB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->b[0] + src.b[0]) >> 1;
dst->b[1] = (dst->b[1] + src.b[1]) >> 1;
dst->b[2] = (dst->b[2] + src.b[2]) >> 1;
dst->b[3] = (dst->b[3] + src.b[3]) >> 1;
dst->b[4] = (dst->b[4] + src.b[4]) >> 1;
dst->b[5] = (dst->b[5] + src.b[5]) >> 1;
dst->b[6] = (dst->b[6] + src.b[6]) >> 1;
dst->b[7] = (dst->b[7] + src.b[7]) >> 1;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMAGW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (abs(src.sw[0]) > abs(dst->sw[0])) dst->sw[0] = src.sw[0];
if (abs(src.sw[1]) > abs(dst->sw[1])) dst->sw[1] = src.sw[1];
if (abs(src.sw[2]) > abs(dst->sw[2])) dst->sw[2] = src.sw[2];
if (abs(src.sw[3]) > abs(dst->sw[3])) dst->sw[3] = src.sw[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMAGW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (abs(src.sw[0]) > abs(dst->sw[0])) dst->sw[0] = src.sw[0];
if (abs(src.sw[1]) > abs(dst->sw[1])) dst->sw[1] = src.sw[1];
if (abs(src.sw[2]) > abs(dst->sw[2])) dst->sw[2] = src.sw[2];
if (abs(src.sw[3]) > abs(dst->sw[3])) dst->sw[3] = src.sw[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVZB_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.b[0] == 0) dst->b[0] = src.b[0];
if (src2.b[1] == 0) dst->b[1] = src.b[1];
if (src2.b[2] == 0) dst->b[2] = src.b[2];
if (src2.b[3] == 0) dst->b[3] = src.b[3];
if (src2.b[4] == 0) dst->b[4] = src.b[4];
if (src2.b[5] == 0) dst->b[5] = src.b[5];
if (src2.b[6] == 0) dst->b[6] = src.b[6];
if (src2.b[7] == 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVZB_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.b[0] == 0) dst->b[0] = src.b[0];
if (src2.b[1] == 0) dst->b[1] = src.b[1];
if (src2.b[2] == 0) dst->b[2] = src.b[2];
if (src2.b[3] == 0) dst->b[3] = src.b[3];
if (src2.b[4] == 0) dst->b[4] = src.b[4];
if (src2.b[5] == 0) dst->b[5] = src.b[5];
if (src2.b[6] == 0) dst->b[6] = src.b[6];
if (src2.b[7] == 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVNZB_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.b[0] != 0) dst->b[0] = src.b[0];
if (src2.b[1] != 0) dst->b[1] = src.b[1];
if (src2.b[2] != 0) dst->b[2] = src.b[2];
if (src2.b[3] != 0) dst->b[3] = src.b[3];
if (src2.b[4] != 0) dst->b[4] = src.b[4];
if (src2.b[5] != 0) dst->b[5] = src.b[5];
if (src2.b[6] != 0) dst->b[6] = src.b[6];
if (src2.b[7] != 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVNZB_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.b[0] != 0) dst->b[0] = src.b[0];
if (src2.b[1] != 0) dst->b[1] = src.b[1];
if (src2.b[2] != 0) dst->b[2] = src.b[2];
if (src2.b[3] != 0) dst->b[3] = src.b[3];
if (src2.b[4] != 0) dst->b[4] = src.b[4];
if (src2.b[5] != 0) dst->b[5] = src.b[5];
if (src2.b[6] != 0) dst->b[6] = src.b[6];
if (src2.b[7] != 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVLZB_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.sb[0] < 0) dst->b[0] = src.b[0];
if (src2.sb[1] < 0) dst->b[1] = src.b[1];
if (src2.sb[2] < 0) dst->b[2] = src.b[2];
if (src2.sb[3] < 0) dst->b[3] = src.b[3];
if (src2.sb[4] < 0) dst->b[4] = src.b[4];
if (src2.sb[5] < 0) dst->b[5] = src.b[5];
if (src2.sb[6] < 0) dst->b[6] = src.b[6];
if (src2.sb[7] < 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVLZB_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.sb[0] < 0) dst->b[0] = src.b[0];
if (src2.sb[1] < 0) dst->b[1] = src.b[1];
if (src2.sb[2] < 0) dst->b[2] = src.b[2];
if (src2.sb[3] < 0) dst->b[3] = src.b[3];
if (src2.sb[4] < 0) dst->b[4] = src.b[4];
if (src2.sb[5] < 0) dst->b[5] = src.b[5];
if (src2.sb[6] < 0) dst->b[6] = src.b[6];
if (src2.sb[7] < 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVGEZB_a16(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_16(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.sb[0] >= 0) dst->b[0] = src.b[0];
if (src2.sb[1] >= 0) dst->b[1] = src.b[1];
if (src2.sb[2] >= 0) dst->b[2] = src.b[2];
if (src2.sb[3] >= 0) dst->b[3] = src.b[3];
if (src2.sb[4] >= 0) dst->b[4] = src.b[4];
if (src2.sb[5] >= 0) dst->b[5] = src.b[5];
if (src2.sb[6] >= 0) dst->b[6] = src.b[6];
if (src2.sb[7] >= 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMVGEZB_a32(uint32_t fetchdat)
{
MMX_REG src, src2;
MMX_REG *dst;
if (!(ccr7 & 1)) {
x86illegal();
return 1;
}
MMX_ENTER();
fetch_ea_32(fetchdat);
if (cpu_mod == 3) {
x86illegal();
return 1;
}
dst = MMX_GETREGP(cpu_reg);
src2 = MMX_GETREG(cpu_reg ^ 1);
MMX_GETSRC();
if (src2.sb[0] >= 0) dst->b[0] = src.b[0];
if (src2.sb[1] >= 0) dst->b[1] = src.b[1];
if (src2.sb[2] >= 0) dst->b[2] = src.b[2];
if (src2.sb[3] >= 0) dst->b[3] = src.b[3];
if (src2.sb[4] >= 0) dst->b[4] = src.b[4];
if (src2.sb[5] >= 0) dst->b[5] = src.b[5];
if (src2.sb[6] >= 0) dst->b[6] = src.b[6];
if (src2.sb[7] >= 0) dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}

2
src/cpu/x86_ops_mmx_mov.h
View File

@@ -110,7 +110,6 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
return 0;
}
#ifdef USE_CYRIX_6X86
/*Cyrix maps both MOVD and SMINT to the same opcode*/
static int
opMOVD_mm_l_a16_cx(uint32_t fetchdat)
@@ -170,7 +169,6 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
return 0;
}
#endif /* USE_CYRIX_6X86 */
static int
opMOVQ_q_mm_a16(uint32_t fetchdat)

664
src/cpu/x87_ops.h
View File

@@ -241,6 +241,24 @@ x87_fround32_64(double b)
return (int64_t) x87_fround32(b);
}
static __inline int64_t
x87_fround_nearest(double b)
{
double da, dc;
int64_t a, c;
da = floor(b);
dc = floor(b + 1.0);
a = (int64_t) da;
c = (int64_t) dc;
if ((b - a) < (c - b))
return a;
else if ((b - a) > (c - b))
return c;
else
return (a & 1) ? c : a;
}
static __inline int64_t
x87_fround(double b)
{
@@ -1267,6 +1285,86 @@ const OpFn OP_TABLE(sf_fpu_d9_a32)[256] = {
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_d9_a16)[256] = {
// clang-format off
/*0x00*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
/*0x08*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x10*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
/*0x18*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
/*0x20*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
/*0x28*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
/*0x30*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
/*0x38*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
/*0x40*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
/*0x48*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x50*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
/*0x58*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
/*0x60*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
/*0x68*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
/*0x70*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
/*0x78*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
/*0x80*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
/*0x88*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x90*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
/*0x98*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
/*0xa0*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
/*0xa8*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
/*0xb0*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
/*0xb8*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
/*0xc0*/ sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti,
/*0xc8*/ sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
/*0xd0*/ sf_FNOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0xd8*/ sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, /*Invalid*/
/*0xe0*/ sf_FCHS, sf_FABS, ILLEGAL_a16, ILLEGAL_a16, sf_FTST, sf_FXAM, sf_FTSTP, ILLEGAL_a16,
/*0xe8*/ sf_FLD1, sf_FLDL2T, sf_FLDL2E, sf_FLDPI, sf_FLDEG2, sf_FLDLN2, sf_FLDZ, ILLEGAL_a16,
/*0xf0*/ sf_F2XM1, sf_FYL2X, sf_FPTAN, sf_FPATAN, sf_FXTRACT, sf_FPREM1, sf_FDECSTP, sf_FINCSTP,
/*0xf8*/ sf_FPREM, sf_FYL2XP1, sf_FSQRT, sf_FSINCOS, sf_FRNDINT, sf_FSCALE, sf_FSIN, sf_FCOS,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_d9_a32)[256] = {
// clang-format off
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti,
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
sf_FNOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, /*Invalid*/
sf_FCHS, sf_FABS, ILLEGAL_a32, ILLEGAL_a32, sf_FTST, sf_FXAM, sf_FTSTP, ILLEGAL_a32,
sf_FLD1, sf_FLDL2T, sf_FLDL2E, sf_FLDPI, sf_FLDEG2, sf_FLDLN2, sf_FLDZ, ILLEGAL_a32,
sf_F2XM1, sf_FYL2X, sf_FPTAN, sf_FPATAN, sf_FXTRACT, sf_FPREM1, sf_FDECSTP, sf_FINCSTP,
sf_FPREM, sf_FYL2XP1, sf_FSQRT, sf_FSINCOS, sf_FRNDINT, sf_FSCALE, sf_FSIN, sf_FCOS,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_287_da_a16)[256] = {
// clang-format off
sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16,
@@ -1750,6 +1848,87 @@ const OpFn OP_TABLE(sf_fpu_686_db_a32)[256] = {
};
# endif
# ifndef OPS_286_386
const OpFn OP_TABLE(sf_fpu_cyrix_686_db_a16)[256] = {
// clang-format off
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB,
sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE,
sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE,
sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU,
sf_FNOP, sf_FNOP, sf_FNCLEX, sf_FNINIT, sf_FNOP, sf_FNOP, ILLEGAL_a16, ILLEGAL_a16,
sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj,
sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRINT2, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_686_db_a32)[256] = {
// clang-format off
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB,
sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE,
sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE,
sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU,
sf_FNOP, sf_FNOP, sf_FNCLEX, sf_FNINIT, sf_FNOP, sf_FNOP, ILLEGAL_a32, ILLEGAL_a32,
sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj,
sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRINT2, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
# endif
const OpFn OP_TABLE(sf_fpu_287_dc_a16)[32] = {
// clang-format off
sf_FADDd_a16, sf_FMULd_a16, sf_FCOMd_a16, sf_FCOMPd_a16, sf_FSUBd_a16, sf_FSUBRd_a16, sf_FDIVd_a16, sf_FDIVRd_a16,
@@ -1946,6 +2125,86 @@ const OpFn OP_TABLE(sf_fpu_dd_a32)[256] = {
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_dd_a16)[256] = {
// clang-format off
/*0x00*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
/*0x08*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x10*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
/*0x18*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
/*0x20*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
/*0x28*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x30*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
/*0x38*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
/*0x40*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
/*0x48*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x50*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
/*0x58*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
/*0x60*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
/*0x68*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x70*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
/*0x78*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
/*0x80*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
/*0x88*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0x90*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
/*0x98*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
/*0xa0*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
/*0xa8*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0xb0*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
/*0xb8*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
/*0xc0*/ sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti,
/*0xc8*/ sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
/*0xd0*/ sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti,
/*0xd8*/ sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
/*0xe0*/ sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti,
/*0xe8*/ sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti,
/*0xf0*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
/*0xf8*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRICHOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_dd_a32)[256] = {
// clang-format off
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti,
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti,
sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRICHOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_287_de_a16)[256] = {
// clang-format off
sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16,
@@ -2348,6 +2607,88 @@ const OpFn OP_TABLE(sf_fpu_686_df_a32)[256] = {
};
# endif
# ifndef OPS_286_386
const OpFn OP_TABLE(sf_fpu_cyrix_686_df_a16)[256] = {
// clang-format off
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti,
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
sf_FNSTSW_AX, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj,
sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRINEAR, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(sf_fpu_cyrix_686_df_a32)[256] = {
// clang-format off
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti,
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
sf_FNSTSW_AX, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj,
sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRINEAR, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
# endif
const OpFn OP_TABLE(fpu_d8_a16)[32] = {
// clang-format off
opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16,
@@ -2526,6 +2867,86 @@ const OpFn OP_TABLE(fpu_d9_a32)[256] = {
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_d9_a16)[256] = {
// clang-format off
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFNOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, /*Invalid*/
opFCHS, opFABS, ILLEGAL_a16, ILLEGAL_a16, opFTST, opFXAM, opFTSTP, ILLEGAL_a16,
opFLD1, opFLDL2T, opFLDL2E, opFLDPI, opFLDEG2, opFLDLN2, opFLDZ, ILLEGAL_a16,
opF2XM1, opFYL2X, opFPTAN, opFPATAN, opFXTRACT, opFPREM1, opFDECSTP, opFINCSTP,
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_d9_a32)[256] = {
// clang-format off
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFNOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, /*Invalid*/
opFCHS, opFABS, ILLEGAL_a32, ILLEGAL_a32, opFTST, opFXAM, opFTSTP, ILLEGAL_a32,
opFLD1, opFLDL2T, opFLDL2E, opFLDPI, opFLDEG2, opFLDLN2, opFLDZ, ILLEGAL_a32,
opF2XM1, opFYL2X, opFPTAN, opFPATAN, opFXTRACT, opFPREM1, opFDECSTP, opFINCSTP,
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
// clang-format on
};
const OpFn OP_TABLE(fpu_287_da_a16)[256] = {
// clang-format off
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
@@ -3009,6 +3430,87 @@ const OpFn OP_TABLE(fpu_686_db_a32)[256] = {
};
# endif
# ifndef OPS_286_386
const OpFn OP_TABLE(fpu_cyrix_686_db_a16)[256] = {
// clang-format off
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB,
opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE,
opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE,
opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU,
opFNOP, opFNOP, opFCLEX, opFINIT, opFNOP, opFNOP, ILLEGAL_a16, ILLEGAL_a16,
opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI,
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRINT2, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_686_db_a32)[256] = {
// clang-format off
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB,
opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE,
opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE,
opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU,
opFNOP, opFNOP, opFCLEX, opFINIT, opFNOP, opFNOP, ILLEGAL_a32, ILLEGAL_a32,
opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI,
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRINT2, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
# endif
const OpFn OP_TABLE(fpu_287_dc_a16)[32] = {
// clang-format off
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
@@ -3205,6 +3707,86 @@ const OpFn OP_TABLE(fpu_dd_a32)[256] = {
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_dd_a16)[256] = {
// clang-format off
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFST, opFST, opFST, opFST, opFST, opFST, opFST, opFST,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM,
opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRICHOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_dd_a32)[256] = {
// clang-format off
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFST, opFST, opFST, opFST, opFST, opFST, opFST, opFST,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM,
opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRICHOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
const OpFn OP_TABLE(fpu_287_de_a16)[256] = {
// clang-format off
opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16,
@@ -3607,6 +4189,88 @@ const OpFn OP_TABLE(fpu_686_df_a32)[256] = {
};
# endif
# ifndef OPS_286_386
const OpFn OP_TABLE(fpu_cyrix_686_df_a16)[256] = {
// clang-format off
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFSTSW_AX, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP,
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRINEAR, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
// clang-format on
};
const OpFn OP_TABLE(fpu_cyrix_686_df_a32)[256] = {
// clang-format off
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP,
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
opFSTSW_AX, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP,
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRINEAR, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
// clang-format on
};
# endif
const OpFn OP_TABLE(nofpu_a16)[256] = {
// clang-format off
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,

81
src/cpu/x87_ops_misc.h
View File

@@ -554,6 +554,24 @@ opFTST(UNUSED(uint32_t fetchdat))
return 0;
}
#ifndef FPU_8087
static int
opFTSTP(UNUSED(uint32_t fetchdat))
{
FP_ENTER();
cpu_state.pc++;
cpu_state.npxs &= ~(FPU_SW_C0 | FPU_SW_C2 | FPU_SW_C3);
if (ST(0) == 0.0)
cpu_state.npxs |= FPU_SW_C3;
else if (ST(0) < 0.0)
cpu_state.npxs |= FPU_SW_C0;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ftst) : (x87_concurrency.ftst * cpu_multi));
return 0;
}
#endif
static int
opFXAM(UNUSED(uint32_t fetchdat))
{
@@ -838,6 +856,69 @@ opFRNDINT(UNUSED(uint32_t fetchdat))
return 0;
}
#ifndef FPU_8087
#ifndef OPS_286_386
static int
opFRINT2(UNUSED(uint32_t fetchdat))
{
double dst0, st0, integral, frac;
int prevRound;
FP_ENTER();
cpu_state.pc++;
prevRound = fegetround();
fesetround(FE_TONEAREST);
st0 = ST(0);
frac = modf(st0, &integral);
if (frac == 0.5 || frac == -0.5) {
dst0 = (st0 < 0) ? floor(st0) : ceil(st0);
} else {
dst0 = round(st0);
}
fesetround(prevRound);
ST(0) = (double) dst0;
FP_TAG_VALID;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
static int
opFRINEAR(UNUSED(uint32_t fetchdat))
{
int prevRound;
FP_ENTER();
cpu_state.pc++;
prevRound = fegetround();
fesetround(FE_TONEAREST);
ST(0) = (double) x87_fround_nearest(ST(0));
fesetround(prevRound);
FP_TAG_VALID;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
#endif
static int
opFRICHOP(UNUSED(uint32_t fetchdat))
{
int prevRound;
FP_ENTER();
cpu_state.pc++;
prevRound = fegetround();
fesetround(FE_TONEAREST);
ST(0) = (double) ((int64_t)(ST(0)));
fesetround(prevRound);
FP_TAG_VALID;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
#endif
static int
opFSCALE(UNUSED(uint32_t fetchdat))
{

85
src/cpu/x87_ops_sf_arith.h
View File

@@ -800,3 +800,88 @@ next_ins:
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
#ifndef FPU_8087
#ifndef OPS_286_386
static int
sf_FRINT2(uint32_t fetchdat)
{
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_near_maxMag, true, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
static int
sf_FRINEAR(uint32_t fetchdat)
{
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_near_even, true, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
#endif
static int
sf_FRICHOP(uint32_t fetchdat)
{
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_to_zero, true, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
#endif

28
src/cpu/x87_ops_sf_compare.h
View File

@@ -459,6 +459,34 @@ sf_FTST(uint32_t fetchdat)
return 0;
}
#ifndef FPU_8087
static int
sf_FTSTP(uint32_t fetchdat)
{
const floatx80 Const_Z = packFloatx80(0, 0x0000, 0);
struct softfloat_status_t status;
int rc;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_exception(fetchdat, FPU_EX_Stack_Underflow, 0);
setcc(FPU_SW_C0 | FPU_SW_C2 | FPU_SW_C3);
} else {
status = i387cw_to_softfloat_status_word(i387_get_control_word());
rc = extF80_compare_normal(FPU_read_regi(0), Const_Z, &status);
setcc(FPU_status_word_flags_fpu_compare(rc));
FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0);
FPU_pop();
}
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ftst) : (x87_concurrency.ftst * cpu_multi));
return 0;
}
#endif
static int
sf_FXAM(UNUSED(uint32_t fetchdat))
{

1
src/device/cartridge.c
View File

@@ -22,6 +22,7 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/plat.h>
#include <86box/ui.h>

14
src/device/keyboard.c
View File

@@ -332,6 +332,20 @@ keyboard_input(int down, uint16_t scan)
}
}
void
keyboard_all_up(void)
{
for (unsigned short i = 0; i < 0x200; i++) {
if (recv_key_ui[i]) {
recv_key_ui[i] = 0;
}
if (recv_key[i]) {
recv_key[i] = 0;
key_process(i, 0);
}
}
}
static uint8_t
keyboard_do_break(uint16_t scan)
{

2
src/device/keyboard_at.c
View File

@@ -2526,7 +2526,7 @@ static const scancode scancode_set82[512] = {
{ .mk = {0xe0, 0x17, 0 }, .brk = { 0xe0, 0xF0, 0x17, 0 } }, /* 15a */
{ .mk = { 0x67, 0 }, .brk = { 0xf0, 0x67, 0 } }, /* 15b 0x33 LGUI->Muhenkan (in emulator only) */
{ .mk = { 0x64, 0 }, .brk = { 0xf0, 0x64, 0 } }, /* 15c 0x35 RGUI->Henkan (in emulator only) */
{ .mk = {0xe0, 0x11, 0 }, .brk = { 0xe0, 0xf0, 0x11, 0 } }, /* 15d 0x36 APPLICATION->Kana (in emulator
{ .mk = {0xe0, 0x11, 0 }, .brk = { 0xe0, 0xf0, 0x11, 0 } }, /* 15d 0x36 APPLICATION->Kana (in emulator only) */
{ .mk = {0xe0, 0x37, 0 }, .brk = { 0xe0, 0xF0, 0x37, 0 } }, /* 15e */
{ .mk = {0xe0, 0x3F, 0 }, .brk = { 0xe0, 0xF0, 0x3F, 0 } }, /* 15f */
{ .mk = { 0 }, .brk = { 0 } }, /* 160 */

1
src/device/keyboard_xt.c
View File

@@ -29,6 +29,7 @@
#include <wchar.h>
#include <86box/86box.h>
#include <86box/device.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/fdd.h>
#include <86box/machine.h>

1
src/device/serial.c
View File

@@ -27,6 +27,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/machine.h>
#include <86box/io.h>

1
src/include/86box/86box.h
View File

@@ -158,6 +158,7 @@ extern int other_scsi_present; /* SCSI controllers from non-SCSI ca
extern int hard_reset_pending;
extern int fixed_size_x;
extern int fixed_size_y;
extern int sound_muted; /* (C) Is sound muted? */
extern int do_auto_pause; /* (C) Auto-pause the emulator on focus loss */
extern int auto_paused;
extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */

1
src/include/86box/keyboard.h
View File

@@ -269,6 +269,7 @@ extern void keyboard_poll_host(void);
extern void keyboard_process(void);
extern uint16_t keyboard_convert(int ch);
extern void keyboard_input(int down, uint16_t scan);
extern void keyboard_all_up(void);
extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl);
extern uint8_t keyboard_get_shift(void);
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl);

2
src/include/86box/timer.h
View File

@@ -1,7 +1,7 @@
#ifndef _TIMER_H_
#define _TIMER_H_
#include "cpu.h"
extern uint64_t tsc;
/* Maximum period, currently 1 second. */
#define MAX_USEC64 1000000ULL

2
src/include/86box/vid_8514a.h
View File

@@ -213,7 +213,7 @@ typedef struct ibm8514_t {
int vdisp2;
int disp_cntl;
int interlace;
uint8_t subsys_cntl;
uint16_t subsys_cntl;
uint8_t subsys_stat;
atomic_int fifo_idx;

2
src/include/86box/video.h
View File

@@ -69,6 +69,8 @@ enum {
#define VIDEO_FLAG_TYPE_NONE 5
#define VIDEO_FLAG_TYPE_MASK 7
#define VIDEO_FLAG_TYPE_SECONDARY VIDEO_FLAG_TYPE_SPECIAL
typedef struct video_timings_t {
int type;
int write_b;

2
src/machine/m_at_286_386sx.c
View File

@@ -742,7 +742,7 @@ machine_at_acer100t_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acer100t/acer386.bin",
ret = bios_load_linear("roms/machines/acer100t/acer386.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)

1
src/machine/m_at_socket5.c
View File

@@ -29,6 +29,7 @@
#include <86box/fdc_ext.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/fdd.h>
#include <86box/fdc.h>

1
src/machine/m_xt_olivetti.c
View File

@@ -30,6 +30,7 @@
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/pic.h>

1
src/machine/m_xt_philips.c
View File

@@ -23,6 +23,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/nmi.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/mem.h>

1
src/mem/sst_flash.c
View File

@@ -25,6 +25,7 @@
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/machine.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/nvr.h>
#include <86box/plat.h>

BIN
src/qt/icons/sound_mute.ico Normal file
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After

Width:  |  Height:  |  Size: 9.4 KiB

49
src/qt/qt_machinestatus.cpp
View File

@@ -19,9 +19,6 @@
#include "qt_machinestatus.hpp"
extern "C" {
#define EMU_CPU_H // superhack - don't want timer.h to include cpu.h here, and some combo is preventing a compile
extern uint64_t tsc;
#include <86box/hdd.h>
#include <86box/timer.h>
#include <86box/86box.h>
@@ -42,6 +39,7 @@ extern uint64_t tsc;
#include <86box/network.h>
#include <86box/ui.h>
#include <86box/machine_status.h>
#include <86box/config.h>
};
#include <QIcon>
@@ -92,7 +90,7 @@ struct Pixmaps {
PixmapSetEmptyActive mo;
PixmapSetActive hd;
PixmapSetEmptyActive net;
QPixmap sound;
QPixmap sound, soundMuted;
};
struct StateActive {
@@ -218,6 +216,7 @@ struct MachineStatus::States {
pixmaps.hd.load("/hard_disk%1.ico");
pixmaps.net.load("/network%1.ico");
pixmaps.sound = ProgSettings::loadIcon("/sound.ico").pixmap(pixmap_size);
pixmaps.soundMuted = ProgSettings::loadIcon("/sound_mute.ico").pixmap(pixmap_size);
cartridge[0].pixmaps = &pixmaps.cartridge;
cartridge[1].pixmaps = &pixmaps.cartridge;
@@ -259,12 +258,20 @@ MachineStatus::MachineStatus(QObject *parent)
, refreshTimer(new QTimer(this))
{
d = std::make_unique<MachineStatus::States>(this);
muteUnmuteAction = nullptr;
soundMenu = nullptr;
connect(refreshTimer, &QTimer::timeout, this, &MachineStatus::refreshIcons);
refreshTimer->start(75);
}
MachineStatus::~MachineStatus() = default;
void
MachineStatus::setSoundGainAction(QAction* action)
{
soundGainAction = action;
}
bool
MachineStatus::hasCassette()
{
@@ -497,6 +504,28 @@ MachineStatus::refresh(QStatusBar *sbar)
}
sbar->removeWidget(d->sound.get());
if (!muteUnmuteAction) {
muteUnmuteAction = new QAction;
connect(muteUnmuteAction, &QAction::triggered, this, [this]() {
sound_muted ^= 1;
config_save();
if (d->sound)
d->sound->setPixmap(sound_muted ? d->pixmaps.soundMuted : d->pixmaps.sound);
muteUnmuteAction->setText(sound_muted ? tr("&Unmute") : tr("&Mute"));
});
}
if (!soundMenu) {
soundMenu = new QMenu((QWidget*)parent());
soundMenu->addAction(muteUnmuteAction);
soundMenu->addSeparator();
soundMenu->addAction(soundGainAction);
muteUnmuteAction->setParent(soundMenu);
}
if (cassette_enable) {
d->cassette.label = std::make_unique<ClickableLabel>();
d->cassette.setEmpty(QString(cassette_fname).isEmpty());
@@ -665,12 +694,14 @@ MachineStatus::refresh(QStatusBar *sbar)
}
d->sound = std::make_unique<ClickableLabel>();
d->sound->setPixmap(d->pixmaps.sound);
connect(d->sound.get(), &ClickableLabel::doubleClicked, d->sound.get(), [](QPoint pos) {
SoundGain gain(main_window);
gain.exec();
d->sound->setPixmap(sound_muted ? d->pixmaps.soundMuted : d->pixmaps.sound);
if (muteUnmuteAction)
muteUnmuteAction->setText(sound_muted ? tr("&Unmute") : tr("&Mute"));
connect(d->sound.get(), &ClickableLabel::clicked, this, [this](QPoint pos) {
this->soundMenu->popup(pos - QPoint(0, this->soundMenu->sizeHint().height()));
});
d->sound->setToolTip(tr("Sound"));
sbar->addWidget(d->sound.get());
d->text = std::make_unique<QLabel>();

6
src/qt/qt_machinestatus.hpp
View File

@@ -1,6 +1,8 @@
#ifndef QT_MACHINESTATUS_HPP
#define QT_MACHINESTATUS_HPP
#include <QAction>
#include <QMenu>
#include <QWidget>
#include <QLabel>
#include <QMouseEvent>
@@ -71,6 +73,7 @@ public:
QString getMessage();
void clearActivity();
void setSoundGainAction(QAction* action);
public slots:
void refresh(QStatusBar *sbar);
void message(const QString &msg);
@@ -82,6 +85,9 @@ private:
struct States;
std::unique_ptr<States> d;
QTimer *refreshTimer;
QAction *soundGainAction;
QAction *muteUnmuteAction;
QMenu *soundMenu;
};
#endif // QT_MACHINESTATUS_HPP

116
src/qt/qt_main.cpp
View File

@@ -86,6 +86,7 @@ extern MainWindow *main_window;
extern "C" {
#include <86box/keyboard.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/nvr.h>
extern int qt_nvr_save(void);
@@ -211,8 +212,121 @@ emu_LowLevelKeyboardProc(int nCode, WPARAM wParam, LPARAM lParam)
(GetForegroundWindow() == ((HWND) secondaryRenderer->winId())));
}
if ((nCode < 0) || (nCode != HC_ACTION) || !is_over_window)
bool skip = ((nCode < 0) || (nCode != HC_ACTION) || !is_over_window);
if (skip)
return CallNextHookEx(NULL, nCode, wParam, lParam);
/* USB keyboards send a scancode of 0x00 for multimedia keys. */
if (lpKdhs->scanCode == 0x00) {
/* Handle USB keyboard multimedia keys where possible.
Only a handful of keys can be handled via Virtual Key
detection; rest can't be reliably detected. */
DWORD vkCode = lpKdhs->vkCode;
bool up = !!(lpKdhs->flags & LLKHF_UP);
ret = CallNextHookEx(NULL, nCode, wParam, lParam);;
switch (vkCode)
{
case VK_MEDIA_PLAY_PAUSE:
{
win_keyboard_handle(0x22, up, 1, 0);
break;
}
case VK_MEDIA_STOP:
{
win_keyboard_handle(0x24, up, 1, 0);
break;
}
case VK_VOLUME_UP:
{
win_keyboard_handle(0x30, up, 1, 0);
break;
}
case VK_VOLUME_DOWN:
{
win_keyboard_handle(0x2E, up, 1, 0);
break;
}
case VK_VOLUME_MUTE:
{
win_keyboard_handle(0x20, up, 1, 0);
break;
}
case VK_MEDIA_NEXT_TRACK:
{
win_keyboard_handle(0x19, up, 1, 0);
break;
}
case VK_MEDIA_PREV_TRACK:
{
win_keyboard_handle(0x10, up, 1, 0);
break;
}
case VK_LAUNCH_MEDIA_SELECT:
{
win_keyboard_handle(0x6D, up, 1, 0);
break;
}
case VK_LAUNCH_MAIL:
{
win_keyboard_handle(0x6C, up, 1, 0);
break;
}
case VK_LAUNCH_APP1:
{
win_keyboard_handle(0x6B, up, 1, 0);
break;
}
case VK_LAUNCH_APP2:
{
win_keyboard_handle(0x21, up, 1, 0);
break;
}
case VK_BROWSER_BACK:
{
win_keyboard_handle(0x6A, up, 1, 0);
break;
}
case VK_BROWSER_FORWARD:
{
win_keyboard_handle(0x69, up, 1, 0);
break;
}
case VK_BROWSER_STOP:
{
win_keyboard_handle(0x68, up, 1, 0);
break;
}
case VK_BROWSER_HOME:
{
win_keyboard_handle(0x32, up, 1, 0);
break;
}
case VK_BROWSER_SEARCH:
{
win_keyboard_handle(0x65, up, 1, 0);
break;
}
case VK_BROWSER_REFRESH:
{
win_keyboard_handle(0x67, up, 1, 0);
break;
}
case VK_BROWSER_FAVORITES:
{
win_keyboard_handle(0x66, up, 1, 0);
break;
}
case VK_HELP:
{
win_keyboard_handle(0x3b, up, 1, 0);
break;
}
}
return ret;
}
else if ((lpKdhs->scanCode == 0x01) && (lpKdhs->flags & LLKHF_ALTDOWN) &&
!(lpKdhs->flags & (LLKHF_UP | LLKHF_EXTENDED)))
ret = TRUE;

25
src/qt/qt_mainwindow.cpp
View File

@@ -48,11 +48,10 @@ extern "C" {
#include <86box/machine.h>
#include <86box/vid_ega.h>
#include <86box/version.h>
#if 0
#include <86box/acpi.h> /* Requires timer.h include, which conflicts with Qt headers */
#endif
extern atomic_int acpi_pwrbut_pressed;
extern int acpi_enabled;
#include <86box/timer.h>
#include <86box/apm.h>
#include <86box/nvr.h>
#include <86box/acpi.h>
#ifdef USE_VNC
# include <86box/vnc.h>
@@ -179,8 +178,12 @@ MainWindow::MainWindow(QWidget *parent)
extern MainWindow *main_window;
main_window = this;
ui->setupUi(this);
status->setSoundGainAction(ui->actionSound_gain);
ui->stackedWidget->setMouseTracking(true);
statusBar()->setVisible(!hide_status_bar);
#ifdef Q_OS_WINDOWS
util::setWin11RoundedCorners(this->winId(), (hide_status_bar ? false : true));
#endif
statusBar()->setStyleSheet("QStatusBar::item {border: None; } QStatusBar QLabel { margin-right: 2px; margin-bottom: 1px; }");
this->centralWidget()->setStyleSheet("background-color: black;");
ui->toolBar->setVisible(!hide_tool_bar);
@@ -262,8 +265,10 @@ MainWindow::MainWindow(QWidget *parent)
ui->stackedWidget->mouse_capture_func(this->windowHandle());
} else {
this->releaseKeyboard();
if (ui->stackedWidget->mouse_uncapture_func)
if (ui->stackedWidget->mouse_uncapture_func) {
ui->stackedWidget->mouse_uncapture_func();
}
ui->stackedWidget->unsetCursor();
}
});
@@ -277,6 +282,8 @@ MainWindow::MainWindow(QWidget *parent)
if (mouse_capture)
emit setMouseCapture(false);
keyboard_all_up();
if (do_auto_pause && !dopause) {
auto_paused = 1;
plat_pause(1);
@@ -795,6 +802,9 @@ MainWindow::initRendererMonitorSlot(int monitor_index)
if (vid_resize == 2)
secondaryRenderer->setFixedSize(fixed_size_x, fixed_size_y);
secondaryRenderer->setWindowIcon(this->windowIcon());
#ifdef Q_OS_WINDOWS
util::setWin11RoundedCorners(secondaryRenderer->winId(), false);
#endif
if (show_second_monitors) {
secondaryRenderer->show();
if (window_remember) {
@@ -1829,6 +1839,9 @@ MainWindow::on_actionHide_status_bar_triggered()
hide_status_bar ^= 1;
ui->actionHide_status_bar->setChecked(hide_status_bar);
statusBar()->setVisible(!hide_status_bar);
#ifdef Q_OS_WINDOWS
util::setWin11RoundedCorners(main_window->winId(), (hide_status_bar ? false : true));
#endif
if (vid_resize >= 2) {
setFixedSize(fixed_size_x, fixed_size_y + menuBar()->height() + (hide_status_bar ? 0 : statusBar()->height()) + (hide_tool_bar ? 0 : ui->toolBar->height()));
} else {

2
src/qt/qt_rendererstack.cpp
View File

@@ -155,7 +155,7 @@ RendererStack::mouseReleaseEvent(QMouseEvent *event)
}
if (mouse_capture && (event->button() == Qt::MiddleButton) && (mouse_get_buttons() < 3)) {
plat_mouse_capture(0);
this->setCursor(Qt::ArrowCursor);
this->unsetCursor();
isMouseDown &= ~1;
return;
}

2
src/qt/qt_settings.cpp
View File

@@ -153,6 +153,8 @@ Settings::Settings(QWidget *parent)
&SettingsSound::onCurrentMachineChanged);
connect(machine, &SettingsMachine::currentMachineChanged, network,
&SettingsNetwork::onCurrentMachineChanged);
connect(machine, &SettingsMachine::currentMachineChanged, ports,
&SettingsPorts::onCurrentMachineChanged);
connect(machine, &SettingsMachine::currentMachineChanged, storageControllers,
&SettingsStorageControllers::onCurrentMachineChanged);
connect(machine, &SettingsMachine::currentMachineChanged, otherPeripherals,

6
src/qt/qt_settingsdisplay.cpp
View File

@@ -220,9 +220,9 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index)
int secondaryFlags = video_card_get_flags(c);
if (video_card_available(c)
&& device_is_valid(video_dev, machineId)
&& !((secondaryFlags == primaryFlags) && (secondaryFlags != VIDEO_FLAG_TYPE_SPECIAL))
&& !(((primaryFlags == VIDEO_FLAG_TYPE_8514) || (primaryFlags == VIDEO_FLAG_TYPE_XGA)) && (secondaryFlags != VIDEO_FLAG_TYPE_MDA) && (secondaryFlags != VIDEO_FLAG_TYPE_SPECIAL))
&& !((primaryFlags != VIDEO_FLAG_TYPE_MDA) && (primaryFlags != VIDEO_FLAG_TYPE_SPECIAL) && ((secondaryFlags == VIDEO_FLAG_TYPE_8514) || (secondaryFlags == VIDEO_FLAG_TYPE_XGA)))) {
&& !((secondaryFlags == primaryFlags) && (secondaryFlags != VIDEO_FLAG_TYPE_SECONDARY))
&& !(((primaryFlags == VIDEO_FLAG_TYPE_8514) || (primaryFlags == VIDEO_FLAG_TYPE_XGA)) && (secondaryFlags != VIDEO_FLAG_TYPE_MDA) && (secondaryFlags != VIDEO_FLAG_TYPE_SECONDARY))
&& !((primaryFlags != VIDEO_FLAG_TYPE_MDA) && (primaryFlags != VIDEO_FLAG_TYPE_SECONDARY) && ((secondaryFlags == VIDEO_FLAG_TYPE_8514) || (secondaryFlags == VIDEO_FLAG_TYPE_XGA)))) {
ui->comboBoxVideoSecondary->addItem(name, c);
if (c == curVideoCard_2)
ui->comboBoxVideoSecondary->setCurrentIndex(ui->comboBoxVideoSecondary->count() - 1);

6
src/qt/qt_settingsmachine.cpp
View File

@@ -32,13 +32,9 @@ extern "C" {
#include <86box/config.h>
#include <86box/device.h>
#include <86box/machine.h>
#include <86box/nvr.h>
}
// from nvr.h, which we can't import into CPP code
#define TIME_SYNC_DISABLED 0
#define TIME_SYNC_ENABLED 1
#define TIME_SYNC_UTC 2
#include "qt_deviceconfig.hpp"
#include "qt_models_common.hpp"

230
src/qt/qt_settingsports.cpp
View File

@@ -38,51 +38,7 @@ SettingsPorts::SettingsPorts(QWidget *parent)
, ui(new Ui::SettingsPorts)
{
ui->setupUi(this);
for (int i = 0; i < PARALLEL_MAX; i++) {
auto *cbox = findChild<QComboBox *>(QString("comboBoxLpt%1").arg(i + 1));
auto *model = cbox->model();
int c = 0;
int selectedRow = 0;
while (true) {
const char *lptName = lpt_device_get_name(c);
if (lptName == nullptr) {
break;
}
Models::AddEntry(model, tr(lptName), c);
if (c == lpt_ports[i].device) {
selectedRow = c;
}
c++;
}
cbox->setCurrentIndex(selectedRow);
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxParallel%1").arg(i + 1));
if (checkBox != NULL)
checkBox->setChecked(lpt_ports[i].enabled > 0);
if (cbox != NULL)
cbox->setEnabled(lpt_ports[i].enabled > 0);
}
for (int i = 0; i < SERIAL_MAX; i++) {
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxSerial%1").arg(i + 1));
auto *checkBoxPass = findChild<QCheckBox *>(QString("checkBoxSerialPassThru%1").arg(i + 1));
if (checkBox != NULL)
checkBox->setChecked(com_ports[i].enabled > 0);
if (checkBoxPass != NULL)
checkBoxPass->setChecked(serial_passthrough_enabled[i]);
}
ui->pushButtonSerialPassThru1->setEnabled(serial_passthrough_enabled[0]);
ui->pushButtonSerialPassThru2->setEnabled(serial_passthrough_enabled[1]);
ui->pushButtonSerialPassThru3->setEnabled(serial_passthrough_enabled[2]);
ui->pushButtonSerialPassThru4->setEnabled(serial_passthrough_enabled[3]);
#if 0
ui->pushButtonSerialPassThru5->setEnabled(serial_passthrough_enabled[4]);
ui->pushButtonSerialPassThru6->setEnabled(serial_passthrough_enabled[5]);
ui->pushButtonSerialPassThru7->setEnabled(serial_passthrough_enabled[6]);
#endif
onCurrentMachineChanged(machine);
}
SettingsPorts::~SettingsPorts()
@@ -112,6 +68,51 @@ SettingsPorts::save()
}
}
void
SettingsPorts::onCurrentMachineChanged(int machineId)
{
this->machineId = machineId;
for (int i = 0; i < PARALLEL_MAX; i++) {
auto *cbox = findChild<QComboBox *>(QString("comboBoxLpt%1").arg(i + 1));
auto *model = cbox->model();
int c = 0;
int selectedRow = 0;
while (true) {
const char *lptName = lpt_device_get_name(c);
if (lptName == nullptr) {
break;
}
Models::AddEntry(model, tr(lptName), c);
if (c == lpt_ports[i].device) {
selectedRow = c;
}
c++;
}
cbox->setCurrentIndex(selectedRow);
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxParallel%1").arg(i + 1));
if (checkBox != NULL)
checkBox->setChecked(lpt_ports[i].enabled > 0);
if (cbox != NULL)
cbox->setEnabled(lpt_ports[i].enabled > 0);
}
for (int i = 0; i < SERIAL_MAX; i++) {
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxSerial%1").arg(i + 1));
auto *checkBoxPass = findChild<QCheckBox *>(QString("checkBoxSerialPassThru%1").arg(i + 1));
auto *buttonPass = findChild<QPushButton *>(QString("pushButtonSerialPassThru%1").arg(i + 1));
if (checkBox != NULL)
checkBox->setChecked(com_ports[i].enabled > 0);
if (checkBoxPass != NULL) {
checkBoxPass->setEnabled(com_ports[i].enabled > 0);
checkBoxPass->setChecked(serial_passthrough_enabled[i]);
buttonPass->setEnabled((com_ports[i].enabled > 0) && serial_passthrough_enabled[i]);
}
}
}
void
SettingsPorts::on_checkBoxParallel1_stateChanged(int state)
{
@@ -136,6 +137,101 @@ SettingsPorts::on_checkBoxParallel4_stateChanged(int state)
ui->comboBoxLpt4->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerial1_stateChanged(int state)
{
ui->checkBoxSerialPassThru1->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru1->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru1->isChecked());
}
void
SettingsPorts::on_checkBoxSerial2_stateChanged(int state)
{
ui->checkBoxSerialPassThru2->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru2->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru2->isChecked());
}
void
SettingsPorts::on_checkBoxSerial3_stateChanged(int state)
{
ui->checkBoxSerialPassThru3->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru3->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru3->isChecked());
}
void
SettingsPorts::on_checkBoxSerial4_stateChanged(int state)
{
ui->checkBoxSerialPassThru4->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru4->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru4->isChecked());
}
#if 0
void
SettingsPorts::on_checkBoxSerial5_stateChanged(int state)
{
ui->checkBoxSerialPassThru5->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru5->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru5->isChecked());
}
void
SettingsPorts::on_checkBoxSerial6_stateChanged(int state)
{
ui->checkBoxSerialPassThru6->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru6->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru6->isChecked());
}
void
SettingsPorts::on_checkBoxSerial7_stateChanged(int state)
{
ui->checkBoxSerialPassThru7->setEnabled(state == Qt::Checked);
ui->pushButtonSerialPassThru7->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru7->isChecked());
}
#endif
void
SettingsPorts::on_checkBoxSerialPassThru1_stateChanged(int state)
{
ui->pushButtonSerialPassThru1->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru2_stateChanged(int state)
{
ui->pushButtonSerialPassThru2->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru3_stateChanged(int state)
{
ui->pushButtonSerialPassThru3->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru4_stateChanged(int state)
{
ui->pushButtonSerialPassThru4->setEnabled(state == Qt::Checked);
}
#if 0
void
SettingsPorts::on_checkBoxSerialPassThru5_stateChanged(int state)
{
ui->pushButtonSerialPassThru5->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru6_stateChanged(int state)
{
ui->pushButtonSerialPassThru6->setEnabled(state == Qt::Checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru7_stateChanged(int state)
{
ui->pushButtonSerialPassThru7->setEnabled(state == Qt::Checked);
}
#endif
void
SettingsPorts::on_pushButtonSerialPassThru1_clicked()
{
@@ -179,47 +275,3 @@ SettingsPorts::on_pushButtonSerialPassThru7_clicked()
DeviceConfig::ConfigureDevice(&serial_passthrough_device, 7, qobject_cast<Settings *>(Settings::settings));
}
#endif
void
SettingsPorts::on_checkBoxSerialPassThru1_clicked(bool checked)
{
ui->pushButtonSerialPassThru1->setEnabled(checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru2_clicked(bool checked)
{
ui->pushButtonSerialPassThru2->setEnabled(checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru3_clicked(bool checked)
{
ui->pushButtonSerialPassThru3->setEnabled(checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru4_clicked(bool checked)
{
ui->pushButtonSerialPassThru4->setEnabled(checked);
}
#if 0
void
SettingsPorts::on_checkBoxSerialPassThru5_clicked(bool checked)
{
ui->pushButtonSerialPassThru5->setEnabled(checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru6_clicked(bool checked)
{
ui->pushButtonSerialPassThru6->setEnabled(checked);
}
void
SettingsPorts::on_checkBoxSerialPassThru7_clicked(bool checked)
{
ui->pushButtonSerialPassThru7->setEnabled(checked);
}
#endif

55
src/qt/qt_settingsports.hpp
View File

@@ -16,36 +16,47 @@ public:
void save();
#if 0
private slots:
void on_checkBoxSerialPassThru7_clicked(bool checked);
void on_checkBoxSerialPassThru6_clicked(bool checked);
void on_checkBoxSerialPassThru5_clicked(bool checked);
#endif
void on_checkBoxSerialPassThru4_clicked(bool checked);
void on_checkBoxSerialPassThru3_clicked(bool checked);
void on_checkBoxSerialPassThru2_clicked(bool checked);
void on_checkBoxSerialPassThru1_clicked(bool checked);
public slots:
void onCurrentMachineChanged(int machineId);
private slots:
void on_checkBoxParallel1_stateChanged(int state);
void on_checkBoxParallel2_stateChanged(int state);
void on_checkBoxParallel3_stateChanged(int state);
void on_checkBoxParallel4_stateChanged(int state);
void on_checkBoxSerial1_stateChanged(int state);
void on_checkBoxSerial2_stateChanged(int state);
void on_checkBoxSerial3_stateChanged(int state);
void on_checkBoxSerial4_stateChanged(int state);
#if 0
void on_pushButtonSerialPassThru7_clicked();
void on_pushButtonSerialPassThru6_clicked();
void on_pushButtonSerialPassThru5_clicked();
void on_checkBoxSerial5_stateChanged(int state);
void on_checkBoxSerial6_stateChanged(int state);
void on_checkBoxSerial7_stateChanged(int state);
#endif
void on_pushButtonSerialPassThru4_clicked();
void on_pushButtonSerialPassThru3_clicked();
void on_pushButtonSerialPassThru2_clicked();
void on_checkBoxSerialPassThru1_stateChanged(int state);
void on_checkBoxSerialPassThru2_stateChanged(int state);
void on_checkBoxSerialPassThru3_stateChanged(int state);
void on_checkBoxSerialPassThru4_stateChanged(int state);
#if 0
void on_checkBoxSerialPassThru5_stateChanged(int state);
void on_checkBoxSerialPassThru6_stateChanged(int state);
void on_checkBoxSerialPassThru7_stateChanged(int state);
#endif
void on_pushButtonSerialPassThru1_clicked();
private slots:
void on_checkBoxParallel4_stateChanged(int arg1);
void on_checkBoxParallel3_stateChanged(int arg1);
void on_checkBoxParallel2_stateChanged(int arg1);
void on_checkBoxParallel1_stateChanged(int arg1);
void on_pushButtonSerialPassThru2_clicked();
void on_pushButtonSerialPassThru3_clicked();
void on_pushButtonSerialPassThru4_clicked();
#if 0
void on_pushButtonSerialPassThru5_clicked();
void on_pushButtonSerialPassThru6_clicked();
void on_pushButtonSerialPassThru7_clicked();
#endif
private:
Ui::SettingsPorts *ui;
int machineId = 0;
};
#endif // QT_SETTINGSPORTS_HPP

22
src/qt/qt_util.cpp
View File

@@ -26,6 +26,19 @@
#include <QUuid>
#include "qt_util.hpp"
#ifdef Q_OS_WINDOWS
# include <dwmapi.h>
# ifndef DWMWA_WINDOW_CORNER_PREFERENCE
# define DWMWA_WINDOW_CORNER_PREFERENCE 33
# endif
# ifndef DWMWCP_DEFAULT
# define DWMWCP_DEFAULT 0
# endif
# ifndef DWMWCP_DONOTROUND
# define DWMWCP_DONOTROUND 1
# endif
#endif
extern "C" {
#include <86box/86box.h>
#include <86box/config.h>
@@ -48,6 +61,15 @@ screenOfWidget(QWidget *widget)
#endif
}
#ifdef Q_OS_WINDOWS
void
setWin11RoundedCorners(WId hwnd, bool enable)
{
auto cornerPreference = (enable ? DWMWCP_DEFAULT : DWMWCP_DONOTROUND);
DwmSetWindowAttribute((HWND) hwnd, DWMWA_WINDOW_CORNER_PREFERENCE, (LPCVOID) &cornerPreference, sizeof(cornerPreference));
}
#endif
QString
DlgFilter(std::initializer_list<QString> extensions, bool last)
{

3
src/qt/qt_util.hpp
View File

@@ -13,6 +13,9 @@ static constexpr auto UUID_MIN_LENGTH = 36;
QString DlgFilter(std::initializer_list<QString> extensions, bool last = false);
/* Returns screen the widget is on */
QScreen *screenOfWidget(QWidget *widget);
#ifdef Q_OS_WINDOWS
void setWin11RoundedCorners(WId hwnd, bool enable);
#endif
QString currentUuid();
void storeCurrentUuid();
bool compareUuid();

1
src/qt_resources.qrc
View File

@@ -43,6 +43,7 @@
<file>qt/icons/other_removable_devices.ico</file>
<file>qt/icons/ports.ico</file>
<file>qt/icons/sound.ico</file>
<file>qt/icons/sound_mute.ico</file>
<file>qt/icons/storage_controllers.ico</file>
<file>qt/icons/zip.ico</file>
<file>qt/icons/zip_active.ico</file>

1
src/scsi/scsi_t128.c
View File

@@ -29,6 +29,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/pic.h>

2
src/sound/openal.c
View File

@@ -278,7 +278,7 @@ givealbuffer_common(const void *buf, const uint8_t src, const int size, const in
alGetSourcei(source[src], AL_BUFFERS_PROCESSED, &processed);
if (processed >= 1) {
const double gain = pow(10.0, (double) sound_gain / 20.0);
const double gain = sound_muted ? 0.0 : pow(10.0, (double) sound_gain / 20.0);
alListenerf(AL_GAIN, (float) gain);
alSourceUnqueueBuffers(source[src], 1, &buffer);

6
src/sound/snd_audiopci.c
View File

@@ -39,6 +39,7 @@
#include <86box/pci.h>
#include <86box/snd_ac97.h>
#include <86box/sound.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/plat_unused.h>
#include <86box/snd_akm4531.h>
@@ -489,7 +490,10 @@ es137x_reset(void *priv)
/* Serial Interface Control Register, Address 20H
Addressable as byte, word, longword */
dev->si_cr = 0xff800000;
if (dev->type == AUDIOPCI_ES1370)
dev->si_cr = 0x00000000;
else
dev->si_cr = 0xff800000;
/* DAC1 Channel Sample Count Register, Address 24H
Addressable as word, longword */

1
src/sound/snd_gus.c
View File

@@ -15,6 +15,7 @@
#include <86box/nmi.h>
#include <86box/pic.h>
#include <86box/sound.h>
#include "cpu.h"
#include <86box/timer.h>
#ifdef USE_GUSMAX
# include <86box/snd_ad1848.h>

1
src/sound/snd_opl_esfm.c
View File

@@ -32,6 +32,7 @@
#include <86box/86box.h>
#include <86box/sound.h>
#include <86box/device.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/snd_opl.h>
#include <86box/plat_unused.h>

1
src/sound/snd_opl_nuked.c
View File

@@ -46,6 +46,7 @@
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/sound.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/device.h>
#include <86box/snd_opl.h>

1
src/sound/snd_sb.c
View File

@@ -39,6 +39,7 @@
#include <86box/pic.h>
#include <86box/rom.h>
#include <86box/sound.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/snd_sb.h>
#include <86box/plat_unused.h>

2
src/sound/xaudio2.c
View File

@@ -245,7 +245,7 @@ givealbuffer_common(const void *buf, IXAudio2SourceVoice *sourcevoice, const siz
if (!initialized)
return;
(void) IXAudio2MasteringVoice_SetVolume(mastervoice, pow(10.0, (double) sound_gain / 20.0),
(void) IXAudio2MasteringVoice_SetVolume(mastervoice, sound_muted ? 0.0 : pow(10.0, (double) sound_gain / 20.0),
XAUDIO2_COMMIT_NOW);
XAUDIO2_BUFFER buffer = { 0 };
buffer.Flags = 0;

1
src/timer.c
View File

@@ -3,6 +3,7 @@
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/nv/vid_nv_rivatimer.h>

1
src/unix/unix.c
View File

@@ -38,6 +38,7 @@
#include <86box/device.h>
#include <86box/gameport.h>
#include <86box/unix_sdl.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/nvr.h>
#include <86box/version.h>

71
src/video/vid_8514a.c
View File

@@ -715,27 +715,13 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len)
break;
case 0x42e8:
if (val & 0x01)
dev->subsys_stat &= ~0x01;
if (val & 0x02)
dev->subsys_stat &= ~0x02;
if (val & 0x04)
dev->subsys_stat &= ~0x04;
if (val & 0x08)
dev->subsys_stat &= ~0x08;
ibm8514_log("VBLANK stat=%02x, val=%02x.\n", dev->subsys_stat, val);
dev->subsys_cntl = (dev->subsys_cntl & 0xff00) | val;
dev->subsys_stat &= ~val;
break;
case 0x42e9:
dev->subsys_cntl = val;
if (val & 0x01)
dev->subsys_stat |= 0x01;
if (val & 0x02)
dev->subsys_stat |= 0x02;
if (val & 0x04)
dev->subsys_stat |= 0x04;
if (val & 0x08)
dev->subsys_stat |= 0x08;
if ((val & 0xc0) == 0xc0) {
dev->subsys_cntl = (dev->subsys_cntl & 0xff) | (val << 8);
if ((val & 0xc0) == 0x80) {
dev->fifo_idx = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
@@ -882,10 +868,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
switch (port) {
case 0x2e8:
if (dev->vc == dev->v_syncstart)
if (dev->vc == dev->dispend)
temp |= 0x02;
ibm8514_log("0x2E8 read: Display Status=%02x.\n", temp);
ibm8514_log("Read: Display Status1=%02x.\n", temp);
break;
case 0x6e8:
@@ -910,21 +896,25 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
case 0x42e8:
case 0x42e9:
if (dev->vc == dev->v_syncstart)
dev->subsys_stat |= 0x01;
if ((dev->subsys_cntl & 0x01) && !(dev->subsys_stat & 0x01) && (dev->vc == dev->dispend))
temp |= 0x01;
if (cmd == 6) {
if ((dev->accel.dx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r_ibm) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b_ibm))
dev->subsys_stat |= 0x02;
temp |= 0x02;
} else {
if ((dev->accel.cx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r_ibm) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b_ibm))
dev->subsys_stat |= 0x02;
temp |= 0x02;
}
if (!dev->fifo_idx) {
@@ -932,9 +922,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
temp |= 0x08;
}
if (port & 1)
if (port & 1) {
temp = dev->vram_512k_8514 ? 0x00 : 0x80;
else {
temp |= (dev->subsys_cntl >> 8);
} else {
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
temp |= 0x20;
}
@@ -1155,6 +1146,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -1250,6 +1242,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -1385,6 +1378,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
@@ -1543,6 +1537,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (ibm8514_cpu_dest(svga)) {
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
} else
@@ -1634,6 +1629,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
@@ -1832,6 +1828,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -1989,6 +1986,7 @@ skip_vector_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
@@ -2150,6 +2148,7 @@ skip_nibble_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2232,6 +2231,7 @@ skip_nibble_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2313,6 +2313,7 @@ skip_nibble_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2424,6 +2425,7 @@ skip_nibble_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2546,6 +2548,7 @@ skip_nibble_rect_write:
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2650,9 +2653,10 @@ skip_nibble_rect_write:
dev->accel.cx = CLAMP(dev->accel.cx, clip_l, clip_r);
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx < clip_r) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -2811,6 +2815,7 @@ skip_nibble_rect_write:
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (pixcntl == 3) {
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
@@ -2978,6 +2983,7 @@ skip_nibble_bitblt_write:
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -3075,6 +3081,7 @@ skip_nibble_bitblt_write:
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
@@ -3174,6 +3181,7 @@ skip_nibble_bitblt_write:
(dx <= (((uint64_t)clip_r) * 3)) &&
(dev->accel.dy >= (clip_t << 1)) &&
(dev->accel.dy <= (clip_b << 1))) {
dev->subsys_stat |= 0x02;
READ(dev->accel.src + cx, src_dat);
READ(dev->accel.dest + dx, dest_dat);
@@ -3196,6 +3204,7 @@ skip_nibble_bitblt_write:
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (pixcntl == 3) {
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
@@ -3704,6 +3713,8 @@ ibm8514_poll(void *priv)
dev->vc &= 0xfff;
if (dev->vc == dev->dispend) {
dev->subsys_stat |= 0x01;
ibm8514_log("VBLANK irq.\n");
dev->dispon = 0;
for (x = 0; x < ((dev->vram_mask + 1) >> 12); x++) {

18
src/video/vid_ati68860_ramdac.c
View File

@@ -70,20 +70,19 @@ void
ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
{
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
switch (addr) {
case 0:
svga_out((dev && dev->on) ? 0x2ec : 0x3c8, val, svga);
svga_out(0x3c8, val, svga);
break;
case 1:
svga_out((dev && dev->on) ? 0x2ed : 0x3c9, val, svga);
svga_out(0x3c9, val, svga);
break;
case 2:
svga_out((dev && dev->on) ? 0x2ea : 0x3c6, val, svga);
svga_out(0x3c6, val, svga);
break;
case 3:
svga_out((dev && dev->on) ? 0x2eb : 0x3c7, val, svga);
svga_out(0x3c7, val, svga);
break;
default:
ramdac->regs[addr & 0xf] = val;
@@ -176,21 +175,20 @@ uint8_t
ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
{
const ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t temp = 0;
switch (addr) {
case 0:
temp = svga_in((dev && dev->on) ? 0x2ec : 0x3c8, svga);
temp = svga_in(0x3c8, svga);
break;
case 1:
temp = svga_in((dev && dev->on) ? 0x2ed : 0x3c9, svga);
temp = svga_in(0x3c9, svga);
break;
case 2:
temp = svga_in((dev && dev->on) ? 0x2ea : 0x3c6, svga);
temp = svga_in(0x3c6, svga);
break;
case 3:
temp = svga_in((dev && dev->on) ? 0x2eb : 0x3c7, svga);
temp = svga_in(0x3c7, svga);
break;
case 4:
case 8:

1
src/video/vid_ati_mach64.c
View File

@@ -28,6 +28,7 @@
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/pci.h>
#include <86box/rom.h>

89
src/video/vid_ati_mach8.c
View File

@@ -27,6 +27,7 @@
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/mca.h>
#include <86box/pci.h>
@@ -437,6 +438,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
src_dat = dev->accel.bkgd_color;
@@ -660,6 +662,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
src_dat = dev->accel.bkgd_color;
@@ -1066,6 +1069,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
if (mach->accel.dp_config & 0x02) {
READ(dev->accel.src + dev->accel.cx, poly_src);
poly_src = ((poly_src & rd_mask) == rd_mask);
@@ -1307,6 +1311,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
@@ -1440,6 +1445,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
mach->accel.clip_overrun = 0;
if (mach->accel.linedraw_opt & 0x02) {
if (dev->bpp) {
@@ -1598,6 +1604,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
@@ -1732,6 +1739,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
dev->subsys_stat |= 0x02;
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
@@ -2027,6 +2035,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= 0x02;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
src_dat = dev->accel.bkgd_color;
@@ -2332,6 +2341,7 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
case 0x2ed:
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
mach_log("8514/A RS2=%d, RS3=%d, addr=%03x.\n", rs2, rs3, addr);
if ((dev->local & 0xff) >= 0x02) {
if (mach->regs[0xb0] & 0x20) { /*ATI extended 8514/A mode.*/
mach_log("Extended 8514/A mode.\n");
@@ -2340,10 +2350,14 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
svga_recalctimings(svga);
mach32_updatemapping(mach, svga);
}
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
if (dev->on)
svga_out(addr, val, svga);
else {
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
}
} else
svga_out(addr, val, svga);
return;
@@ -2354,6 +2368,7 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
case 0x3C9:
rs2 = !!(mach->regs[0xa0] & 0x20);
rs3 = !!(mach->regs[0xa0] & 0x40);
mach_log("VGA RS2=%d, RS3=%d, addr=%03x.\n", rs2, rs3, addr);
if ((dev->local & 0xff) >= 0x02) {
if (svga->attrregs[0x10] & 0x40) {
mach_log("VGA mode.\n");
@@ -2362,10 +2377,14 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
svga_recalctimings(svga);
mach32_updatemapping(mach, svga);
}
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
if (dev->on)
svga_out(addr, val, svga);
else {
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
}
} else
svga_out(addr, val, svga);
return;
@@ -2480,10 +2499,14 @@ mach_in(uint16_t addr, void *priv)
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
if ((dev->local & 0xff) >= 0x02) {
if (mach->pci_bus && !mach->ramdac_type)
temp = ati68860_ramdac_in((addr & 3) | (rs2 << 2) | (rs3 << 3), svga->ramdac, svga);
else
temp = ati68875_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
if (dev->on)
temp = svga_in(addr, svga);
else {
if (mach->pci_bus && !mach->ramdac_type)
temp = ati68860_ramdac_in((addr & 3) | (rs2 << 2) | (rs3 << 3), svga->ramdac, svga);
else
temp = ati68875_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
}
} else
temp = svga_in(addr, svga);
break;
@@ -3406,7 +3429,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
static void
mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8514_t *dev)
{
if (port != 0x42e8 && port != 0x42e9)
if (port == 0x42e8 || port == 0x42e9)
mach_log("[%04X:%08X]: Port CALL OUT=%04x, val=%02x.\n", CS, cpu_state.pc, port, val);
switch (port) {
@@ -3421,7 +3444,7 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8
break;
case 0x42e9:
ibm8514_accel_out(port, val, svga, 2);
if ((val & 0xc0) == 0xc0) {
if ((val & 0xc0) == 0x80) {
dev->ext_fifo_idx = 0;
mach->force_busy = 0;
}
@@ -3512,6 +3535,11 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8
svga_recalctimings(svga);
break;
case 0x46e8:
case 0x46e9:
mach_log("0x%04x write: VGA subsystem enable add-on=%02x.\n", port, val);
break;
case 0x4ae8:
dev->accel.advfunc_cntl = val;
dev->on = dev->accel.advfunc_cntl & 0x01;
@@ -4200,6 +4228,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
switch (port) {
case 0x2e8:
case 0x2e9:
case 0x6e8:
case 0x22e8:
case 0x26e8:
@@ -4211,18 +4240,22 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
case 0x42e8:
case 0x42e9:
if (dev->vc == dev->v_syncstart)
if ((dev->subsys_cntl & 0x01) && !(dev->subsys_stat & 0x01) && (dev->vc == dev->dispend))
temp |= 0x01;
if (mach->accel.cmd_type == -1) {
if (cmd == 6) {
if ((dev->accel.dx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r_ibm) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b_ibm))
temp |= 0x02;
} else {
if ((dev->accel.cx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r_ibm) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b_ibm))
@@ -4233,7 +4266,9 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
case 1:
case 2:
case 5:
if ((dev->accel.dx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b))
@@ -4241,7 +4276,9 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
break;
case 3:
case 4:
if ((dev->accel.cx >= clip_l) &&
if ((dev->subsys_cntl & 0x02) &&
!(dev->subsys_stat & 0x02) &&
(dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b))
@@ -4256,16 +4293,17 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
if ((!dev->force_busy && !dev->force_busy2) || !mach->force_busy)
temp |= 0x08;
}
if (port & 1)
if (port & 1) {
temp = dev->vram_512k_8514 ? 0x00 : 0x80;
else {
temp |= (dev->subsys_cntl >> 8);
} else {
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
if (mach->accel.ext_ge_config & 0x08)
temp |= ((mach->accel.ext_ge_config & 0x07) << 4);
else
temp |= 0x20;
}
mach_log("0x%04x read: Subsystem Status=%02x.\n", port, temp);
mach_log("0x%04x read: Subsystem Status=%02x, monitoralias=%02x.\n", port, temp, mach->accel.ext_ge_config & 0x07);
break;
/*ATI Mach8/32 specific registers*/
@@ -4402,7 +4440,8 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
default:
break;
}
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
if (port == 0x2ee8 || port == 0x2ee9 || port == 0x42e8 || port == 0x42e9)
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
return temp;
}
@@ -5418,6 +5457,10 @@ mach32_updatemapping(mach_t *mach, svga_t *svga)
mem_mapping_set_handler(&svga->mapping, mach32_read, mach32_readw, mach32_readl, mach32_write, mach32_writew, mach32_writel);
mem_mapping_set_p(&svga->mapping, mach);
} else {
if (!dev->on) {
memset(dev->vram, 0, dev->vram_size);
memset(dev->changedvram, 0, (dev->vram_size >> 12) + 1);
}
mach_log("IBM compatible banked mapping.\n");
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
mem_mapping_set_p(&svga->mapping, svga);

1
src/video/vid_chips_69000.c
View File

@@ -27,6 +27,7 @@
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/device.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/video.h>
#include <86box/vid_svga.h>

4
src/video/vid_mga.c
View File

@@ -23,6 +23,7 @@
#include <stdatomic.h>
#include <86box/86box.h>
#include <86box/io.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/mem.h>
#include <86box/pci.h>
@@ -4677,6 +4678,7 @@ blit_trap(mystique_t *mystique)
int err_l = (int32_t)mystique->dwgreg.ar[1];
int err_r = (int32_t)mystique->dwgreg.ar[4];
const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT;
bool transc = !!(mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC);
switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) {
case DWGCTRL_ATYPE_BLK:
@@ -4699,6 +4701,7 @@ blit_trap(mystique_t *mystique)
int pattern = mystique->dwgreg.pattern[yoff][xoff];
uint32_t dst;
if (!transc || (transc && pattern))
switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) {
case MACCESS_PWIDTH_8:
svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = (pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xff;
@@ -4770,6 +4773,7 @@ blit_trap(mystique_t *mystique)
uint32_t dst;
uint32_t old_dst;
if (!transc || (transc && pattern))
switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) {
case MACCESS_PWIDTH_8:
dst = svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask];

1
src/video/vid_nga.c
View File

@@ -30,6 +30,7 @@
#include <86box/io.h>
#include <86box/video.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/mem.h>
#include <86box/pit.h>

1
src/video/vid_ogc.c
View File

@@ -31,6 +31,7 @@
#include <86box/io.h>
#include <86box/video.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/mem.h>
#include <86box/pit.h>

758
src/video/vid_ps55da2.c
View File

File diff suppressed because it is too large Load Diff

831
src/video/vid_s3_virge.c
View File

@@ -338,6 +338,7 @@ typedef struct virge_t {
event_t * fifo_not_full_event;
atomic_int virge_busy;
atomic_uint irq_pending;
uint8_t subsys_stat;
uint8_t subsys_cntl;
@@ -375,6 +376,8 @@ typedef struct virge_t {
int pci;
int is_agp;
pc_timer_t irq_timer;
} virge_t;
static __inline void
@@ -471,6 +474,19 @@ s3_virge_update_irqs(virge_t *virge)
pci_clear_irq(virge->pci_slot, PCI_INTA, &virge->irq_state);
}
static void
s3_virge_update_irq_timer(void* priv)
{
virge_t *virge = (virge_t *) priv;
if (virge->irq_pending) {
virge->irq_pending--;
s3_virge_update_irqs(virge);
}
timer_on_auto(&virge->irq_timer, 100.);
}
static void
s3_virge_out(uint16_t addr, uint8_t val, void *priv)
{
@@ -1101,6 +1117,8 @@ static void
s3_virge_vblank_start(svga_t *svga) {
virge_t *virge = (virge_t *) svga->priv;
if (virge->irq_pending)
virge->irq_pending--;
virge->subsys_stat |= INT_VSY;
s3_virge_update_irqs(virge);
}
@@ -1784,18 +1802,18 @@ fifo_thread(void *param)
virge->fifo_read_idx++;
fifo->addr_type = FIFO_INVALID;
if (FIFO_ENTRIES > 0xe000)
thread_set_event(virge->fifo_not_full_event);
if (FIFO_ENTRIES > 0xe000)
thread_set_event(virge->fifo_not_full_event);
end_time = plat_timer_read();
virge_time += end_time - start_time;
}
virge->virge_busy = 0;
virge->subsys_stat |= (INT_FIFO_EMP | INT_3DF_EMP);
if (virge->cmd_dma)
virge->subsys_stat |= (INT_HOST_DONE | INT_CMD_DONE);
end_time = plat_timer_read();
virge_time += end_time - start_time;
}
virge->virge_busy = 0;
virge->subsys_stat |= (INT_FIFO_EMP | INT_3DF_EMP);
if (virge->cmd_dma)
virge->subsys_stat |= (INT_HOST_DONE | INT_CMD_DONE);
s3_virge_update_irqs(virge);
virge->irq_pending++;
}
}
@@ -2175,19 +2193,781 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
} \
} while (0)
#define MIX() \
do { \
int c; \
for (c = 0; c < 24; c++) { \
int d = (dest & (1 << c)) ? 1 : 0; \
if (source & (1 << c)) \
d |= 2; \
if (pattern & (1 << c)) \
d |= 4; \
if (virge->s3d.rop & (1 << d)) \
out |= (1 << c); \
} \
} while (0)
#define ROPMIX(R, D, P, S, out) \
{ \
switch (R) { \
case 0x00: \
out = 0; \
break; \
case 0x01: \
out = ~(D | (P | S)); \
break; \
case 0x02: \
out = D & ~(P | S); \
break; \
case 0x03: \
out = ~(P | S); \
break; \
case 0x04: \
out = S & ~(D | P); \
break; \
case 0x05: \
out = ~(D | P); \
break; \
case 0x06: \
out = ~(P | ~(D ^ S)); \
break; \
case 0x07: \
out = ~(P | (D & S)); \
break; \
case 0x08: \
out = S & (D & ~P); \
break; \
case 0x09: \
out = ~(P | (D ^ S)); \
break; \
case 0x0a: \
out = D & ~P; \
break; \
case 0x0b: \
out = ~(P | (S & ~D)); \
break; \
case 0x0c: \
out = S & ~P; \
break; \
case 0x0d: \
out = ~(P | (D & ~S)); \
break; \
case 0x0e: \
out = ~(P | ~(D | S)); \
break; \
case 0x0f: \
out = ~P; \
break; \
case 0x10: \
out = P & ~(D | S); \
break; \
case 0x11: \
out = ~(D | S); \
break; \
case 0x12: \
out = ~(S | ~(D ^ P)); \
break; \
case 0x13: \
out = ~(S | (D & P)); \
break; \
case 0x14: \
out = ~(D | ~(P ^ S)); \
break; \
case 0x15: \
out = ~(D | (P & S)); \
break; \
case 0x16: \
out = P ^ (S ^ (D & ~(P & S))); \
break; \
case 0x17: \
out = ~(S ^ ((S ^ P) & (D ^ S))); \
break; \
case 0x18: \
out = (S ^ P) & (P ^ D); \
break; \
case 0x19: \
out = ~(S ^ (D & ~(P & S))); \
break; \
case 0x1a: \
out = P ^ (D | (S & P)); \
break; \
case 0x1b: \
out = ~(S ^ (D & (P ^ S))); \
break; \
case 0x1c: \
out = P ^ (S | (D & P)); \
break; \
case 0x1d: \
out = ~(D ^ (S & (P ^ D))); \
break; \
case 0x1e: \
out = P ^ (D | S); \
break; \
case 0x1f: \
out = ~(P & (D | S)); \
break; \
case 0x20: \
out = D & (P & ~S); \
break; \
case 0x21: \
out = ~(S | (D ^ P)); \
break; \
case 0x22: \
out = D & ~S; \
break; \
case 0x23: \
out = ~(S | (P & ~D)); \
break; \
case 0x24: \
out = (S ^ P) & (D ^ S); \
break; \
case 0x25: \
out = ~(P ^ (D & ~(S & P))); \
break; \
case 0x26: \
out = S ^ (D | (P & S)); \
break; \
case 0x27: \
out = S ^ (D | ~(P ^ S)); \
break; \
case 0x28: \
out = D & (P ^ S); \
break; \
case 0x29: \
out = ~(P ^ (S ^ (D | (P & S)))); \
break; \
case 0x2a: \
out = D & ~(P & S); \
break; \
case 0x2b: \
out = ~(S ^ ((S ^ P) & (P ^ D))); \
break; \
case 0x2c: \
out = S ^ (P & (D | S)); \
break; \
case 0x2d: \
out = P ^ (S | ~D); \
break; \
case 0x2e: \
out = P ^ (S | (D ^ P)); \
break; \
case 0x2f: \
out = ~(P & (S | ~D)); \
break; \
case 0x30: \
out = P & ~S; \
break; \
case 0x31: \
out = ~(S | (D & ~P)); \
break; \
case 0x32: \
out = S ^ (D | (P | S)); \
break; \
case 0x33: \
out = ~S; \
break; \
case 0x34: \
out = S ^ (P | (D & S)); \
break; \
case 0x35: \
out = S ^ (P | ~(D ^ S)); \
break; \
case 0x36: \
out = S ^ (D | P); \
break; \
case 0x37: \
out = ~(S & (D | P)); \
break; \
case 0x38: \
out = P ^ (S & (D | P)); \
break; \
case 0x39: \
out = S ^ (P | ~D); \
break; \
case 0x3a: \
out = S ^ (P | (D ^ S)); \
break; \
case 0x3b: \
out = ~(S & (P | ~D)); \
break; \
case 0x3c: \
out = P ^ S; \
break; \
case 0x3d: \
out = S ^ (P | ~(D | S)); \
break; \
case 0x3e: \
out = S ^ (P | (D & ~S)); \
break; \
case 0x3f: \
out = ~(P & S); \
break; \
case 0x40: \
out = P & (S & ~D); \
break; \
case 0x41: \
out = ~(D | (P ^ S)); \
break; \
case 0x42: \
out = (S ^ D) & (P ^ D); \
break; \
case 0x43: \
out = ~(S ^ (P & ~(D & S))); \
break; \
case 0x44: \
out = S & ~D; \
break; \
case 0x45: \
out = ~(D | (P & ~S)); \
break; \
case 0x46: \
out = D ^ (S | (P & D)); \
break; \
case 0x47: \
out = ~(P ^ (S & (D ^ P))); \
break; \
case 0x48: \
out = S & (D ^ P); \
break; \
case 0x49: \
out = ~(P ^ (D ^ (S | (P & D)))); \
break; \
case 0x4a: \
out = D ^ (P & (S | D)); \
break; \
case 0x4b: \
out = P ^ (D | ~S); \
break; \
case 0x4c: \
out = S & ~(D & P); \
break; \
case 0x4d: \
out = ~(S ^ ((S ^ P) | (D ^ S))); \
break; \
case 0x4e: \
out = P ^ (D | (S ^ P)); \
break; \
case 0x4f: \
out = ~(P & (D | ~S)); \
break; \
case 0x50: \
out = P & ~D; \
break; \
case 0x51: \
out = ~(D | (S & ~P)); \
break; \
case 0x52: \
out = D ^ (P | (S & D)); \
break; \
case 0x53: \
out = ~(S ^ (P & (D ^ S))); \
break; \
case 0x54: \
out = ~(D | ~(P | S)); \
break; \
case 0x55: \
out = ~D; \
break; \
case 0x56: \
out = D ^ (P | S); \
break; \
case 0x57: \
out = ~(D & (P | S)); \
break; \
case 0x58: \
out = P ^ (D & (S | P)); \
break; \
case 0x59: \
out = D ^ (P | ~S); \
break; \
case 0x5a: \
out = D ^ P; \
break; \
case 0x5b: \
out = D ^ (P | ~(S | D)); \
break; \
case 0x5c: \
out = D ^ (P | (S ^ D)); \
break; \
case 0x5d: \
out = ~(D & (P | ~S)); \
break; \
case 0x5e: \
out = D ^ (P | (S & ~D)); \
break; \
case 0x5f: \
out = ~(D & P); \
break; \
case 0x60: \
out = P & (D ^ S); \
break; \
case 0x61: \
out = ~(D ^ (S ^ (P | (D & S)))); \
break; \
case 0x62: \
out = D ^ (S & (P | D)); \
break; \
case 0x63: \
out = S ^ (D | ~P); \
break; \
case 0x64: \
out = S ^ (D & (P | S)); \
break; \
case 0x65: \
out = D ^ (S | ~P); \
break; \
case 0x66: \
out = D ^ S; \
break; \
case 0x67: \
out = S ^ (D | ~(P | S)); \
break; \
case 0x68: \
out = ~(D ^ (S ^ (P | ~(D | S)))); \
break; \
case 0x69: \
out = ~(P ^ (D ^ S)); \
break; \
case 0x6a: \
out = D ^ (P & S); \
break; \
case 0x6b: \
out = ~(P ^ (S ^ (D & (P | S)))); \
break; \
case 0x6c: \
out = S ^ (D & P); \
break; \
case 0x6d: \
out = ~(P ^ (D ^ (S & (P | D)))); \
break; \
case 0x6e: \
out = S ^ (D & (P | ~S)); \
break; \
case 0x6f: \
out = ~(P & ~(D ^ S)); \
break; \
case 0x70: \
out = P & ~(D & S); \
break; \
case 0x71: \
out = ~(S ^ ((S ^ D) & (P ^ D))); \
break; \
case 0x72: \
out = S ^ (D | (P ^ S)); \
break; \
case 0x73: \
out = ~(S & (D | ~P)); \
break; \
case 0x74: \
out = D ^ (S | (P ^ D)); \
break; \
case 0x75: \
out = ~(D & (S | ~P)); \
break; \
case 0x76: \
out = S ^ (D | (P & ~S)); \
break; \
case 0x77: \
out = ~(D & S); \
break; \
case 0x78: \
out = P ^ (D & S); \
break; \
case 0x79: \
out = ~(D ^ (S ^ (P & (D | S)))); \
break; \
case 0x7a: \
out = D ^ (P & (S | ~D)); \
break; \
case 0x7b: \
out = ~(S & ~(D ^ P)); \
break; \
case 0x7c: \
out = S ^ (P & (D | ~S)); \
break; \
case 0x7d: \
out = ~(D & ~(P ^ S)); \
break; \
case 0x7e: \
out = (S ^ P) | (D ^ S); \
break; \
case 0x7f: \
out = ~(D & (P & S)); \
break; \
case 0x80: \
out = D & (P & S); \
break; \
case 0x81: \
out = ~((S ^ P) | (D ^ S)); \
break; \
case 0x82: \
out = D & ~(P ^ S); \
break; \
case 0x83: \
out = ~(S ^ (P & (D | ~S))); \
break; \
case 0x84: \
out = S & ~(D ^ P); \
break; \
case 0x85: \
out = ~(P ^ (D & (S | ~P))); \
break; \
case 0x86: \
out = D ^ (S ^ (P & (D | S))); \
break; \
case 0x87: \
out = ~(P ^ (D & S)); \
break; \
case 0x88: \
out = D & S; \
break; \
case 0x89: \
out = ~(S ^ (D | (P & ~S))); \
break; \
case 0x8a: \
out = D & (S | ~P); \
break; \
case 0x8b: \
out = ~(D ^ (S | (P ^ D))); \
break; \
case 0x8c: \
out = S & (D | ~P); \
break; \
case 0x8d: \
out = ~(S ^ (D | (P ^ S))); \
break; \
case 0x8e: \
out = S ^ ((S ^ D) & (P ^ D)); \
break; \
case 0x8f: \
out = ~(P & ~(D & S)); \
break; \
case 0x90: \
out = P & ~(D ^ S); \
break; \
case 0x91: \
out = ~(S ^ (D & (P | ~S))); \
break; \
case 0x92: \
out = D ^ (P ^ (S & (D | P))); \
break; \
case 0x93: \
out = ~(S ^ (P & D)); \
break; \
case 0x94: \
out = P ^ (S ^ (D & (P | S))); \
break; \
case 0x95: \
out = ~(D ^ (P & S)); \
break; \
case 0x96: \
out = D ^ (P ^ S); \
break; \
case 0x97: \
out = P ^ (S ^ (D | ~(P | S))); \
break; \
case 0x98: \
out = ~(S ^ (D | ~(P | S))); \
break; \
case 0x99: \
out = ~(D ^ S); \
break; \
case 0x9a: \
out = D ^ (P & ~S); \
break; \
case 0x9b: \
out = ~(S ^ (D & (P | S))); \
break; \
case 0x9c: \
out = S ^ (P & ~D); \
break; \
case 0x9d: \
out = ~(D ^ (S & (P | D))); \
break; \
case 0x9e: \
out = D ^ (S ^ (P | (D & S))); \
break; \
case 0x9f: \
out = ~(P & (D ^ S)); \
break; \
case 0xa0: \
out = D & P; \
break; \
case 0xa1: \
out = ~(P ^ (D | (S & ~P))); \
break; \
case 0xa2: \
out = D & (P | ~S); \
break; \
case 0xa3: \
out = ~(D ^ (P | (S ^ D))); \
break; \
case 0xa4: \
out = ~(P ^ (D | ~(S | P))); \
break; \
case 0xa5: \
out = ~(P ^ D); \
break; \
case 0xa6: \
out = D ^ (S & ~P); \
break; \
case 0xa7: \
out = ~(P ^ (D & (S | P))); \
break; \
case 0xa8: \
out = D & (P | S); \
break; \
case 0xa9: \
out = ~(D ^ (P | S)); \
break; \
case 0xaa: \
out = D; \
break; \
case 0xab: \
out = D | ~(P | S); \
break; \
case 0xac: \
out = S ^ (P & (D ^ S)); \
break; \
case 0xad: \
out = ~(D ^ (P | (S & D))); \
break; \
case 0xae: \
out = D | (S & ~P); \
break; \
case 0xaf: \
out = D | ~P; \
break; \
case 0xb0: \
out = P & (D | ~S); \
break; \
case 0xb1: \
out = ~(P ^ (D | (S ^ P))); \
break; \
case 0xb2: \
out = S ^ ((S ^ P) | (D ^ S)); \
break; \
case 0xb3: \
out = ~(S & ~(D & P)); \
break; \
case 0xb4: \
out = P ^ (S & ~D); \
break; \
case 0xb5: \
out = ~(D ^ (P & (S | D))); \
break; \
case 0xb6: \
out = D ^ (P ^ (S | (D & P))); \
break; \
case 0xb7: \
out = ~(S & (D ^ P)); \
break; \
case 0xb8: \
out = P ^ (S & (D ^ P)); \
break; \
case 0xb9: \
out = ~(D ^ (S | (P & D))); \
break; \
case 0xba: \
out = D | (P & ~S); \
break; \
case 0xbb: \
out = D | ~S; \
break; \
case 0xbc: \
out = S ^ (P & ~(D & S)); \
break; \
case 0xbd: \
out = ~((S ^ D) & (P ^ D)); \
break; \
case 0xbe: \
out = D | (P ^ S); \
break; \
case 0xbf: \
out = D | ~(P & S); \
break; \
case 0xc0: \
out = P & S; \
break; \
case 0xc1: \
out = ~(S ^ (P | (D & ~S))); \
break; \
case 0xc2: \
out = ~(S ^ (P | ~(D | S))); \
break; \
case 0xc3: \
out = ~(P ^ S); \
break; \
case 0xc4: \
out = S & (P | ~D); \
break; \
case 0xc5: \
out = ~(S ^ (P | (D ^ S))); \
break; \
case 0xc6: \
out = S ^ (D & ~P); \
break; \
case 0xc7: \
out = ~(P ^ (S & (D | P))); \
break; \
case 0xc8: \
out = S & (D | P); \
break; \
case 0xc9: \
out = ~(S ^ (P | D)); \
break; \
case 0xca: \
out = D ^ (P & (S ^ D)); \
break; \
case 0xcb: \
out = ~(S ^ (P | (D & S))); \
break; \
case 0xcc: \
out = S; \
break; \
case 0xcd: \
out = S | ~(D | P); \
break; \
case 0xce: \
out = S | (D & ~P); \
break; \
case 0xcf: \
out = S | ~P; \
break; \
case 0xd0: \
out = P & (S | ~D); \
break; \
case 0xd1: \
out = ~(P ^ (S | (D ^ P))); \
break; \
case 0xd2: \
out = P ^ (D & ~S); \
break; \
case 0xd3: \
out = ~(S ^ (P & (D | S))); \
break; \
case 0xd4: \
out = S ^ ((S ^ P) & (P ^ D)); \
break; \
case 0xd5: \
out = ~(D & ~(P & S)); \
break; \
case 0xd6: \
out = P ^ (S ^ (D | (P & S))); \
break; \
case 0xd7: \
out = ~(D & (P ^ S)); \
break; \
case 0xd8: \
out = P ^ (D & (S ^ P)); \
break; \
case 0xd9: \
out = ~(S ^ (D | (P & S))); \
break; \
case 0xda: \
out = D ^ (P & ~(S & D)); \
break; \
case 0xdb: \
out = ~((S ^ P) & (D ^ S)); \
break; \
case 0xdc: \
out = S | (P & ~D); \
break; \
case 0xdd: \
out = S | ~D; \
break; \
case 0xde: \
out = S | (D ^ P); \
break; \
case 0xdf: \
out = S | ~(D & P); \
break; \
case 0xe0: \
out = P & (D | S); \
break; \
case 0xe1: \
out = ~(P ^ (D | S)); \
break; \
case 0xe2: \
out = D ^ (S & (P ^ D)); \
break; \
case 0xe3: \
out = ~(P ^ (S | (D & P))); \
break; \
case 0xe4: \
out = S ^ (D & (P ^ S)); \
break; \
case 0xe5: \
out = ~(P ^ (D | (S & P))); \
break; \
case 0xe6: \
out = S ^ (D & ~(P & S)); \
break; \
case 0xe7: \
out = ~((S ^ P) & (P ^ D)); \
break; \
case 0xe8: \
out = S ^ ((S ^ P) & (D ^ S)); \
break; \
case 0xe9: \
out = ~(D ^ (S ^ (P & ~(D & S)))); \
break; \
case 0xea: \
out = D | (P & S); \
break; \
case 0xeb: \
out = D | ~(P ^ S); \
break; \
case 0xec: \
out = S | (D & P); \
break; \
case 0xed: \
out = S | ~(D ^ P); \
break; \
case 0xee: \
out = D | S; \
break; \
case 0xef: \
out = S | (D | ~P); \
break; \
case 0xf0: \
out = P; \
break; \
case 0xf1: \
out = P | ~(D | S); \
break; \
case 0xf2: \
out = P | (D & ~S); \
break; \
case 0xf3: \
out = P | ~S; \
break; \
case 0xf4: \
out = P | (S & ~D); \
break; \
case 0xf5: \
out = P | ~D; \
break; \
case 0xf6: \
out = P | (D ^ S); \
break; \
case 0xf7: \
out = P | ~(D & S); \
break; \
case 0xf8: \
out = P | (D & S); \
break; \
case 0xf9: \
out = P | ~(D ^ S); \
break; \
case 0xfa: \
out = D | P; \
break; \
case 0xfb: \
out = D | (P | ~S); \
break; \
case 0xfc: \
out = P | S; \
break; \
case 0xfd: \
out = P | (S | ~D); \
break; \
case 0xfe: \
out = D | (P | S); \
break; \
case 0xff: \
out = ~0; \
break; \
} \
}
#define MIX() do { ROPMIX(virge->s3d.rop & 0xFF, dest, pattern, source, out); out &= 0xFFFFFF; } while (0)
#define WRITE(addr, val) \
do { \
@@ -3642,7 +4422,7 @@ render_thread(void *param)
}
virge->s3d_busy = 0;
virge->subsys_stat |= INT_S3D_DONE;
s3_virge_update_irqs(virge);
virge->irq_pending++;
}
}
@@ -4300,6 +5080,7 @@ s3_virge_disable_handlers(virge_t *dev)
reset_state->svga.timer = dev->svga.timer;
reset_state->svga.timer8514 = dev->svga.timer8514;
reset_state->irq_timer = dev->irq_timer;
}
static void
@@ -4571,6 +5352,8 @@ s3_virge_init(const device_t *info)
virge->fifo_not_full_event = thread_create_event();
virge->fifo_thread = thread_create(fifo_thread, virge);
timer_add(&virge->irq_timer, s3_virge_update_irq_timer, virge, 1);
virge->local = info->local;
*reset_state = *virge;

6
src/video/vid_table.c
View File

@@ -141,10 +141,10 @@ video_cards[] = {
{ .device = &chips_69000_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &gd5430_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &gd5434_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &gd5436_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
{ .device = &gd5436_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
{ .device = &gd5440_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &gd5446_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
{ .device = &gd5446_stb_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
{ .device = &gd5446_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
{ .device = &gd5446_stb_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
{ .device = &gd5480_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &et4000w32p_videomagic_revb_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
{ .device = &et4000w32p_revc_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },

792
src/video/vid_tgui9440.c
View File

@@ -1457,18 +1457,784 @@ enum {
else \
dat = vram_l[(addr) & (tgui->vram_mask >> 2)];
#define MIX() \
do { \
out = 0; \
for (c = 0; c < 32; c++) { \
d = (dst_dat & (1 << c)) ? 1 : 0; \
if (src_dat & (1 << c)) \
d |= 2; \
if (pat_dat & (1 << c)) \
d |= 4; \
if (tgui->accel.rop & (1 << d)) \
out |= (1 << c); \
} \
#define ROPMIX(R, D, P, S, out) \
{ \
switch (R) { \
case 0x00: \
out = 0; \
break; \
case 0x01: \
out = ~(D | (P | S)); \
break; \
case 0x02: \
out = D & ~(P | S); \
break; \
case 0x03: \
out = ~(P | S); \
break; \
case 0x04: \
out = S & ~(D | P); \
break; \
case 0x05: \
out = ~(D | P); \
break; \
case 0x06: \
out = ~(P | ~(D ^ S)); \
break; \
case 0x07: \
out = ~(P | (D & S)); \
break; \
case 0x08: \
out = S & (D & ~P); \
break; \
case 0x09: \
out = ~(P | (D ^ S)); \
break; \
case 0x0a: \
out = D & ~P; \
break; \
case 0x0b: \
out = ~(P | (S & ~D)); \
break; \
case 0x0c: \
out = S & ~P; \
break; \
case 0x0d: \
out = ~(P | (D & ~S)); \
break; \
case 0x0e: \
out = ~(P | ~(D | S)); \
break; \
case 0x0f: \
out = ~P; \
break; \
case 0x10: \
out = P & ~(D | S); \
break; \
case 0x11: \
out = ~(D | S); \
break; \
case 0x12: \
out = ~(S | ~(D ^ P)); \
break; \
case 0x13: \
out = ~(S | (D & P)); \
break; \
case 0x14: \
out = ~(D | ~(P ^ S)); \
break; \
case 0x15: \
out = ~(D | (P & S)); \
break; \
case 0x16: \
out = P ^ (S ^ (D & ~(P & S))); \
break; \
case 0x17: \
out = ~(S ^ ((S ^ P) & (D ^ S))); \
break; \
case 0x18: \
out = (S ^ P) & (P ^ D); \
break; \
case 0x19: \
out = ~(S ^ (D & ~(P & S))); \
break; \
case 0x1a: \
out = P ^ (D | (S & P)); \
break; \
case 0x1b: \
out = ~(S ^ (D & (P ^ S))); \
break; \
case 0x1c: \
out = P ^ (S | (D & P)); \
break; \
case 0x1d: \
out = ~(D ^ (S & (P ^ D))); \
break; \
case 0x1e: \
out = P ^ (D | S); \
break; \
case 0x1f: \
out = ~(P & (D | S)); \
break; \
case 0x20: \
out = D & (P & ~S); \
break; \
case 0x21: \
out = ~(S | (D ^ P)); \
break; \
case 0x22: \
out = D & ~S; \
break; \
case 0x23: \
out = ~(S | (P & ~D)); \
break; \
case 0x24: \
out = (S ^ P) & (D ^ S); \
break; \
case 0x25: \
out = ~(P ^ (D & ~(S & P))); \
break; \
case 0x26: \
out = S ^ (D | (P & S)); \
break; \
case 0x27: \
out = S ^ (D | ~(P ^ S)); \
break; \
case 0x28: \
out = D & (P ^ S); \
break; \
case 0x29: \
out = ~(P ^ (S ^ (D | (P & S)))); \
break; \
case 0x2a: \
out = D & ~(P & S); \
break; \
case 0x2b: \
out = ~(S ^ ((S ^ P) & (P ^ D))); \
break; \
case 0x2c: \
out = S ^ (P & (D | S)); \
break; \
case 0x2d: \
out = P ^ (S | ~D); \
break; \
case 0x2e: \
out = P ^ (S | (D ^ P)); \
break; \
case 0x2f: \
out = ~(P & (S | ~D)); \
break; \
case 0x30: \
out = P & ~S; \
break; \
case 0x31: \
out = ~(S | (D & ~P)); \
break; \
case 0x32: \
out = S ^ (D | (P | S)); \
break; \
case 0x33: \
out = ~S; \
break; \
case 0x34: \
out = S ^ (P | (D & S)); \
break; \
case 0x35: \
out = S ^ (P | ~(D ^ S)); \
break; \
case 0x36: \
out = S ^ (D | P); \
break; \
case 0x37: \
out = ~(S & (D | P)); \
break; \
case 0x38: \
out = P ^ (S & (D | P)); \
break; \
case 0x39: \
out = S ^ (P | ~D); \
break; \
case 0x3a: \
out = S ^ (P | (D ^ S)); \
break; \
case 0x3b: \
out = ~(S & (P | ~D)); \
break; \
case 0x3c: \
out = P ^ S; \
break; \
case 0x3d: \
out = S ^ (P | ~(D | S)); \
break; \
case 0x3e: \
out = S ^ (P | (D & ~S)); \
break; \
case 0x3f: \
out = ~(P & S); \
break; \
case 0x40: \
out = P & (S & ~D); \
break; \
case 0x41: \
out = ~(D | (P ^ S)); \
break; \
case 0x42: \
out = (S ^ D) & (P ^ D); \
break; \
case 0x43: \
out = ~(S ^ (P & ~(D & S))); \
break; \
case 0x44: \
out = S & ~D; \
break; \
case 0x45: \
out = ~(D | (P & ~S)); \
break; \
case 0x46: \
out = D ^ (S | (P & D)); \
break; \
case 0x47: \
out = ~(P ^ (S & (D ^ P))); \
break; \
case 0x48: \
out = S & (D ^ P); \
break; \
case 0x49: \
out = ~(P ^ (D ^ (S | (P & D)))); \
break; \
case 0x4a: \
out = D ^ (P & (S | D)); \
break; \
case 0x4b: \
out = P ^ (D | ~S); \
break; \
case 0x4c: \
out = S & ~(D & P); \
break; \
case 0x4d: \
out = ~(S ^ ((S ^ P) | (D ^ S))); \
break; \
case 0x4e: \
out = P ^ (D | (S ^ P)); \
break; \
case 0x4f: \
out = ~(P & (D | ~S)); \
break; \
case 0x50: \
out = P & ~D; \
break; \
case 0x51: \
out = ~(D | (S & ~P)); \
break; \
case 0x52: \
out = D ^ (P | (S & D)); \
break; \
case 0x53: \
out = ~(S ^ (P & (D ^ S))); \
break; \
case 0x54: \
out = ~(D | ~(P | S)); \
break; \
case 0x55: \
out = ~D; \
break; \
case 0x56: \
out = D ^ (P | S); \
break; \
case 0x57: \
out = ~(D & (P | S)); \
break; \
case 0x58: \
out = P ^ (D & (S | P)); \
break; \
case 0x59: \
out = D ^ (P | ~S); \
break; \
case 0x5a: \
out = D ^ P; \
break; \
case 0x5b: \
out = D ^ (P | ~(S | D)); \
break; \
case 0x5c: \
out = D ^ (P | (S ^ D)); \
break; \
case 0x5d: \
out = ~(D & (P | ~S)); \
break; \
case 0x5e: \
out = D ^ (P | (S & ~D)); \
break; \
case 0x5f: \
out = ~(D & P); \
break; \
case 0x60: \
out = P & (D ^ S); \
break; \
case 0x61: \
out = ~(D ^ (S ^ (P | (D & S)))); \
break; \
case 0x62: \
out = D ^ (S & (P | D)); \
break; \
case 0x63: \
out = S ^ (D | ~P); \
break; \
case 0x64: \
out = S ^ (D & (P | S)); \
break; \
case 0x65: \
out = D ^ (S | ~P); \
break; \
case 0x66: \
out = D ^ S; \
break; \
case 0x67: \
out = S ^ (D | ~(P | S)); \
break; \
case 0x68: \
out = ~(D ^ (S ^ (P | ~(D | S)))); \
break; \
case 0x69: \
out = ~(P ^ (D ^ S)); \
break; \
case 0x6a: \
out = D ^ (P & S); \
break; \
case 0x6b: \
out = ~(P ^ (S ^ (D & (P | S)))); \
break; \
case 0x6c: \
out = S ^ (D & P); \
break; \
case 0x6d: \
out = ~(P ^ (D ^ (S & (P | D)))); \
break; \
case 0x6e: \
out = S ^ (D & (P | ~S)); \
break; \
case 0x6f: \
out = ~(P & ~(D ^ S)); \
break; \
case 0x70: \
out = P & ~(D & S); \
break; \
case 0x71: \
out = ~(S ^ ((S ^ D) & (P ^ D))); \
break; \
case 0x72: \
out = S ^ (D | (P ^ S)); \
break; \
case 0x73: \
out = ~(S & (D | ~P)); \
break; \
case 0x74: \
out = D ^ (S | (P ^ D)); \
break; \
case 0x75: \
out = ~(D & (S | ~P)); \
break; \
case 0x76: \
out = S ^ (D | (P & ~S)); \
break; \
case 0x77: \
out = ~(D & S); \
break; \
case 0x78: \
out = P ^ (D & S); \
break; \
case 0x79: \
out = ~(D ^ (S ^ (P & (D | S)))); \
break; \
case 0x7a: \
out = D ^ (P & (S | ~D)); \
break; \
case 0x7b: \
out = ~(S & ~(D ^ P)); \
break; \
case 0x7c: \
out = S ^ (P & (D | ~S)); \
break; \
case 0x7d: \
out = ~(D & ~(P ^ S)); \
break; \
case 0x7e: \
out = (S ^ P) | (D ^ S); \
break; \
case 0x7f: \
out = ~(D & (P & S)); \
break; \
case 0x80: \
out = D & (P & S); \
break; \
case 0x81: \
out = ~((S ^ P) | (D ^ S)); \
break; \
case 0x82: \
out = D & ~(P ^ S); \
break; \
case 0x83: \
out = ~(S ^ (P & (D | ~S))); \
break; \
case 0x84: \
out = S & ~(D ^ P); \
break; \
case 0x85: \
out = ~(P ^ (D & (S | ~P))); \
break; \
case 0x86: \
out = D ^ (S ^ (P & (D | S))); \
break; \
case 0x87: \
out = ~(P ^ (D & S)); \
break; \
case 0x88: \
out = D & S; \
break; \
case 0x89: \
out = ~(S ^ (D | (P & ~S))); \
break; \
case 0x8a: \
out = D & (S | ~P); \
break; \
case 0x8b: \
out = ~(D ^ (S | (P ^ D))); \
break; \
case 0x8c: \
out = S & (D | ~P); \
break; \
case 0x8d: \
out = ~(S ^ (D | (P ^ S))); \
break; \
case 0x8e: \
out = S ^ ((S ^ D) & (P ^ D)); \
break; \
case 0x8f: \
out = ~(P & ~(D & S)); \
break; \
case 0x90: \
out = P & ~(D ^ S); \
break; \
case 0x91: \
out = ~(S ^ (D & (P | ~S))); \
break; \
case 0x92: \
out = D ^ (P ^ (S & (D | P))); \
break; \
case 0x93: \
out = ~(S ^ (P & D)); \
break; \
case 0x94: \
out = P ^ (S ^ (D & (P | S))); \
break; \
case 0x95: \
out = ~(D ^ (P & S)); \
break; \
case 0x96: \
out = D ^ (P ^ S); \
break; \
case 0x97: \
out = P ^ (S ^ (D | ~(P | S))); \
break; \
case 0x98: \
out = ~(S ^ (D | ~(P | S))); \
break; \
case 0x99: \
out = ~(D ^ S); \
break; \
case 0x9a: \
out = D ^ (P & ~S); \
break; \
case 0x9b: \
out = ~(S ^ (D & (P | S))); \
break; \
case 0x9c: \
out = S ^ (P & ~D); \
break; \
case 0x9d: \
out = ~(D ^ (S & (P | D))); \
break; \
case 0x9e: \
out = D ^ (S ^ (P | (D & S))); \
break; \
case 0x9f: \
out = ~(P & (D ^ S)); \
break; \
case 0xa0: \
out = D & P; \
break; \
case 0xa1: \
out = ~(P ^ (D | (S & ~P))); \
break; \
case 0xa2: \
out = D & (P | ~S); \
break; \
case 0xa3: \
out = ~(D ^ (P | (S ^ D))); \
break; \
case 0xa4: \
out = ~(P ^ (D | ~(S | P))); \
break; \
case 0xa5: \
out = ~(P ^ D); \
break; \
case 0xa6: \
out = D ^ (S & ~P); \
break; \
case 0xa7: \
out = ~(P ^ (D & (S | P))); \
break; \
case 0xa8: \
out = D & (P | S); \
break; \
case 0xa9: \
out = ~(D ^ (P | S)); \
break; \
case 0xaa: \
out = D; \
break; \
case 0xab: \
out = D | ~(P | S); \
break; \
case 0xac: \
out = S ^ (P & (D ^ S)); \
break; \
case 0xad: \
out = ~(D ^ (P | (S & D))); \
break; \
case 0xae: \
out = D | (S & ~P); \
break; \
case 0xaf: \
out = D | ~P; \
break; \
case 0xb0: \
out = P & (D | ~S); \
break; \
case 0xb1: \
out = ~(P ^ (D | (S ^ P))); \
break; \
case 0xb2: \
out = S ^ ((S ^ P) | (D ^ S)); \
break; \
case 0xb3: \
out = ~(S & ~(D & P)); \
break; \
case 0xb4: \
out = P ^ (S & ~D); \
break; \
case 0xb5: \
out = ~(D ^ (P & (S | D))); \
break; \
case 0xb6: \
out = D ^ (P ^ (S | (D & P))); \
break; \
case 0xb7: \
out = ~(S & (D ^ P)); \
break; \
case 0xb8: \
out = P ^ (S & (D ^ P)); \
break; \
case 0xb9: \
out = ~(D ^ (S | (P & D))); \
break; \
case 0xba: \
out = D | (P & ~S); \
break; \
case 0xbb: \
out = D | ~S; \
break; \
case 0xbc: \
out = S ^ (P & ~(D & S)); \
break; \
case 0xbd: \
out = ~((S ^ D) & (P ^ D)); \
break; \
case 0xbe: \
out = D | (P ^ S); \
break; \
case 0xbf: \
out = D | ~(P & S); \
break; \
case 0xc0: \
out = P & S; \
break; \
case 0xc1: \
out = ~(S ^ (P | (D & ~S))); \
break; \
case 0xc2: \
out = ~(S ^ (P | ~(D | S))); \
break; \
case 0xc3: \
out = ~(P ^ S); \
break; \
case 0xc4: \
out = S & (P | ~D); \
break; \
case 0xc5: \
out = ~(S ^ (P | (D ^ S))); \
break; \
case 0xc6: \
out = S ^ (D & ~P); \
break; \
case 0xc7: \
out = ~(P ^ (S & (D | P))); \
break; \
case 0xc8: \
out = S & (D | P); \
break; \
case 0xc9: \
out = ~(S ^ (P | D)); \
break; \
case 0xca: \
out = D ^ (P & (S ^ D)); \
break; \
case 0xcb: \
out = ~(S ^ (P | (D & S))); \
break; \
case 0xcc: \
out = S; \
break; \
case 0xcd: \
out = S | ~(D | P); \
break; \
case 0xce: \
out = S | (D & ~P); \
break; \
case 0xcf: \
out = S | ~P; \
break; \
case 0xd0: \
out = P & (S | ~D); \
break; \
case 0xd1: \
out = ~(P ^ (S | (D ^ P))); \
break; \
case 0xd2: \
out = P ^ (D & ~S); \
break; \
case 0xd3: \
out = ~(S ^ (P & (D | S))); \
break; \
case 0xd4: \
out = S ^ ((S ^ P) & (P ^ D)); \
break; \
case 0xd5: \
out = ~(D & ~(P & S)); \
break; \
case 0xd6: \
out = P ^ (S ^ (D | (P & S))); \
break; \
case 0xd7: \
out = ~(D & (P ^ S)); \
break; \
case 0xd8: \
out = P ^ (D & (S ^ P)); \
break; \
case 0xd9: \
out = ~(S ^ (D | (P & S))); \
break; \
case 0xda: \
out = D ^ (P & ~(S & D)); \
break; \
case 0xdb: \
out = ~((S ^ P) & (D ^ S)); \
break; \
case 0xdc: \
out = S | (P & ~D); \
break; \
case 0xdd: \
out = S | ~D; \
break; \
case 0xde: \
out = S | (D ^ P); \
break; \
case 0xdf: \
out = S | ~(D & P); \
break; \
case 0xe0: \
out = P & (D | S); \
break; \
case 0xe1: \
out = ~(P ^ (D | S)); \
break; \
case 0xe2: \
out = D ^ (S & (P ^ D)); \
break; \
case 0xe3: \
out = ~(P ^ (S | (D & P))); \
break; \
case 0xe4: \
out = S ^ (D & (P ^ S)); \
break; \
case 0xe5: \
out = ~(P ^ (D | (S & P))); \
break; \
case 0xe6: \
out = S ^ (D & ~(P & S)); \
break; \
case 0xe7: \
out = ~((S ^ P) & (P ^ D)); \
break; \
case 0xe8: \
out = S ^ ((S ^ P) & (D ^ S)); \
break; \
case 0xe9: \
out = ~(D ^ (S ^ (P & ~(D & S)))); \
break; \
case 0xea: \
out = D | (P & S); \
break; \
case 0xeb: \
out = D | ~(P ^ S); \
break; \
case 0xec: \
out = S | (D & P); \
break; \
case 0xed: \
out = S | ~(D ^ P); \
break; \
case 0xee: \
out = D | S; \
break; \
case 0xef: \
out = S | (D | ~P); \
break; \
case 0xf0: \
out = P; \
break; \
case 0xf1: \
out = P | ~(D | S); \
break; \
case 0xf2: \
out = P | (D & ~S); \
break; \
case 0xf3: \
out = P | ~S; \
break; \
case 0xf4: \
out = P | (S & ~D); \
break; \
case 0xf5: \
out = P | ~D; \
break; \
case 0xf6: \
out = P | (D ^ S); \
break; \
case 0xf7: \
out = P | ~(D & S); \
break; \
case 0xf8: \
out = P | (D & S); \
break; \
case 0xf9: \
out = P | ~(D ^ S); \
break; \
case 0xfa: \
out = D | P; \
break; \
case 0xfb: \
out = D | (P | ~S); \
break; \
case 0xfc: \
out = P | S; \
break; \
case 0xfd: \
out = P | (S | ~D); \
break; \
case 0xfe: \
out = D | (P | S); \
break; \
case 0xff: \
out = ~0; \
break; \
} \
}
#define MIX() \
do { \
out = 0; \
ROPMIX(tgui->accel.rop, dst_dat, pat_dat, src_dat, out); \
} while (0)
#define WRITE(addr, dat) \
@@ -1490,8 +2256,6 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
const uint32_t *pattern_data;
int x;
int y;
int c;
int d;
uint32_t out;
uint32_t src_dat = 0;
uint32_t dst_dat;