mirror of
https://github.com/86Box/86Box.git
synced 2026-02-21 17:15:32 -07:00
Merge remote-tracking branch 'upstream/master' into feature/ich2
This commit is contained in:
@@ -151,6 +151,7 @@ endif()
|
||||
# ------ ----------- ---- --------- ---------
|
||||
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(AN430TX "Intel AN430TX" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(CDROM_MITSUMI "Mitsumi CDROM" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(G100 "Matrox Productiva G100" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
|
||||
@@ -163,6 +164,7 @@ cmake_dependent_option(OPEN_AT "OpenAT"
|
||||
cmake_dependent_option(OPL4ML "OPL4-ML daughterboard" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(PCL "Generic PCL5e Printer" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(WACOM "Wacom Input Devices" ON "DEV_BRANCH" OFF)
|
||||
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
|
||||
|
||||
# Ditto but for Qt
|
||||
|
||||
@@ -53,10 +53,14 @@ We operate an IRC channel and a Discord server for discussing 86Box, its develop
|
||||
[](https://discord.gg/QXK9XTv)
|
||||
|
||||
Contributions
|
||||
---------
|
||||
-------------
|
||||
|
||||
We welcome all contributions to the project, as long as the [contribution guidelines](CONTRIBUTING.md) are followed.
|
||||
|
||||
Building
|
||||
---------
|
||||
For instructions on how to build 86Box from source, see the [build guide](https://86box.readthedocs.io/en/latest/dev/buildguide.html).
|
||||
|
||||
Licensing
|
||||
---------
|
||||
|
||||
|
||||
@@ -27,11 +27,9 @@ if(CMAKE_SYSTEM_NAME MATCHES "Linux")
|
||||
add_compile_definitions(_FILE_OFFSET_BITS=64 _LARGEFILE_SOURCE=1 _LARGEFILE64_SOURCE=1)
|
||||
endif()
|
||||
|
||||
if(PCL)
|
||||
target_compile_definitions(86Box PRIVATE USE_PCL)
|
||||
endif()
|
||||
|
||||
if(CPPTHREADS)
|
||||
if(WIN32)
|
||||
target_sources(86Box PRIVATE qt/win_thread.c)
|
||||
else()
|
||||
target_sources(86Box PRIVATE thread.cpp)
|
||||
endif()
|
||||
|
||||
@@ -52,10 +50,6 @@ if(DYNAREC)
|
||||
add_compile_definitions(USE_DYNAREC)
|
||||
endif()
|
||||
|
||||
if(DEV_BRANCH)
|
||||
add_compile_definitions(DEV_BRANCH)
|
||||
endif()
|
||||
|
||||
if(DISCORD)
|
||||
add_compile_definitions(DISCORD)
|
||||
target_sources(86Box PRIVATE discord.c)
|
||||
@@ -147,8 +141,10 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR}/include)
|
||||
include_directories(include)
|
||||
if(NEW_DYNAREC)
|
||||
include_directories(cpu codegen_new)
|
||||
else()
|
||||
elseif(DYNAREC)
|
||||
include_directories(cpu codegen)
|
||||
else()
|
||||
include_directories(cpu)
|
||||
endif()
|
||||
|
||||
add_subdirectory(cdrom)
|
||||
@@ -157,7 +153,7 @@ add_subdirectory(chipset)
|
||||
add_subdirectory(cpu)
|
||||
if(NEW_DYNAREC)
|
||||
add_subdirectory(codegen_new)
|
||||
else()
|
||||
elseif(DYNAREC)
|
||||
add_subdirectory(codegen)
|
||||
endif()
|
||||
|
||||
|
||||
@@ -17,8 +17,14 @@ find_package(PkgConfig REQUIRED)
|
||||
|
||||
pkg_check_modules(SNDFILE REQUIRED IMPORTED_TARGET sndfile)
|
||||
|
||||
add_library(cdrom OBJECT cdrom.c cdrom_image_backend.c cdrom_image_viso.c cdrom_image.c cdrom_ioctl.c cdrom_mitsumi.c)
|
||||
add_library(cdrom OBJECT cdrom.c cdrom_image_backend.c cdrom_image_viso.c cdrom_image.c cdrom_ioctl.c)
|
||||
target_link_libraries(86Box PkgConfig::SNDFILE)
|
||||
|
||||
if(CDROM_MITSUMI)
|
||||
target_compile_definitions(cdrom PRIVATE USE_CDROM_MITSUMI)
|
||||
target_sources(cdrom PRIVATE cdrom_mitsumi.c)
|
||||
endif()
|
||||
|
||||
if (WIN32)
|
||||
# MSYS2
|
||||
target_link_libraries(86Box -static ${SNDFILE_STATIC_LIBRARIES})
|
||||
|
||||
@@ -170,25 +170,23 @@ cleanup_error:
|
||||
static int
|
||||
bin_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count)
|
||||
{
|
||||
track_file_t *tf;
|
||||
|
||||
cdrom_image_backend_log("CDROM: binary_read(%08lx, pos=%" PRIu64 " count=%lu)\n",
|
||||
tf->fp, seek, count);
|
||||
track_file_t *tf = NULL;
|
||||
|
||||
if ((tf = (track_file_t *) priv)->fp == NULL)
|
||||
return 0;
|
||||
|
||||
cdrom_image_backend_log("CDROM: binary_read(%08lx, pos=%" PRIu64 " count=%lu)\n",
|
||||
tf->fp, seek, count);
|
||||
|
||||
if (fseeko64(tf->fp, seek, SEEK_SET) == -1) {
|
||||
#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG
|
||||
cdrom_image_backend_log("CDROM: binary_read failed during seek!\n");
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (fread(buffer, count, 1, tf->fp) != 1) {
|
||||
#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG
|
||||
cdrom_image_backend_log("CDROM: binary_read failed during read!\n");
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -207,9 +205,7 @@ bin_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count)
|
||||
static uint64_t
|
||||
bin_get_length(void *priv)
|
||||
{
|
||||
track_file_t *tf;
|
||||
|
||||
cdrom_image_backend_log("CDROM: binary_length(%08lx)\n", tf->fp);
|
||||
track_file_t *tf = NULL;
|
||||
|
||||
if ((tf = (track_file_t *) priv)->fp == NULL)
|
||||
return 0;
|
||||
@@ -1159,10 +1155,9 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile)
|
||||
trk.file = audio_init(filename, &error);
|
||||
}
|
||||
if (error) {
|
||||
#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG
|
||||
cdrom_image_backend_log("CUE: cannot open file '%s' in cue sheet!\n",
|
||||
filename);
|
||||
#endif
|
||||
|
||||
if (trk.file != NULL) {
|
||||
trk.file->close(trk.file);
|
||||
trk.file = NULL;
|
||||
@@ -1177,9 +1172,8 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile)
|
||||
/* Ignored commands. */
|
||||
success = 1;
|
||||
} else {
|
||||
#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG
|
||||
cdrom_image_backend_log("CUE: unsupported command '%s' in cue sheet!\n", command);
|
||||
#endif
|
||||
|
||||
success = 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -21,7 +21,7 @@ add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali14
|
||||
sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c sis_5581.c sis_5591.c sis_5600.c
|
||||
sis_5511_h2p.c sis_5571_h2p.c sis_5581_h2p.c sis_5591_h2p.c sis_5600_h2p.c
|
||||
sis_5513_p2i.c sis_5513_ide.c sis_5572_usb.c sis_5595_pmu.c sis_55xx.c via_vt82c49x.c
|
||||
via_vt82c505.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c
|
||||
via_vt82c505.c gc100.c stpc.c
|
||||
umc_8886.c umc_hb4.c umc_8890.c via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
|
||||
|
||||
if(OLIVETTI)
|
||||
|
||||
@@ -107,8 +107,8 @@ sis_85c50x_shadow_recalc(sis_85c50x_t *dev)
|
||||
if (dev->states[8 + i] != state) {
|
||||
mem_set_mem_state_both(base, 0x00004000, state);
|
||||
sis_85c50x_log("%05X-%05X: R%c, W%c\n", base, base + 0x3fff,
|
||||
(dev->pci_conf[0x543 & (0x80 >> i)) ?
|
||||
((dev->pci_conf[0x54] & 0x40) ? 'I' : 'D') : 'E',
|
||||
(dev->pci_conf[0x54] & (0x80 >> i)) ?
|
||||
((dev->pci_conf[0x53] & 0x40) ? 'I' : 'D') : 'E',
|
||||
(dev->pci_conf[0x54] & (0x80 >> i)) ?
|
||||
((dev->pci_conf[0x53] & 0x20) ? 'P' : 'I') : 'E');
|
||||
dev->states[8 + i] = state;
|
||||
|
||||
@@ -311,6 +311,7 @@ extern codegen_timing_t codegen_timing_686;
|
||||
extern codegen_timing_t codegen_timing_486;
|
||||
extern codegen_timing_t codegen_timing_winchip;
|
||||
extern codegen_timing_t codegen_timing_winchip2;
|
||||
extern codegen_timing_t codegen_timing_k5;
|
||||
extern codegen_timing_t codegen_timing_k6;
|
||||
extern codegen_timing_t codegen_timing_p6;
|
||||
|
||||
|
||||
@@ -341,6 +341,7 @@ extern codegen_timing_t codegen_timing_686;
|
||||
extern codegen_timing_t codegen_timing_486;
|
||||
extern codegen_timing_t codegen_timing_winchip;
|
||||
extern codegen_timing_t codegen_timing_winchip2;
|
||||
extern codegen_timing_t codegen_timing_k5;
|
||||
extern codegen_timing_t codegen_timing_k6;
|
||||
extern codegen_timing_t codegen_timing_p6;
|
||||
|
||||
|
||||
@@ -279,7 +279,7 @@ exec386_2386(int32_t cycs)
|
||||
if (!cpu_state.abrt) {
|
||||
#ifdef ENABLE_386_LOG
|
||||
if (in_smm)
|
||||
x386_2386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat);
|
||||
x386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat);
|
||||
#endif
|
||||
opcode = fetchdat & 0xFF;
|
||||
fetchdat >>= 8;
|
||||
|
||||
@@ -1384,7 +1384,7 @@ const OpFn OP_TABLE(pentium_0f)[1024] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
# if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
# ifdef USE_CYRIX_6X86
|
||||
const OpFn OP_TABLE(c6x86_0f)[1024] = {
|
||||
// clang-format off
|
||||
/*16-bit data, 16-bit addr*/
|
||||
@@ -1476,7 +1476,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
const OpFn OP_TABLE(pentiummmx_0f)[1024] = {
|
||||
// clang-format off
|
||||
@@ -1754,7 +1754,7 @@ const OpFn OP_TABLE(k62_0f)[1024] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
# if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
# ifdef USE_CYRIX_6X86
|
||||
const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
// clang-format off
|
||||
/*16-bit data, 16-bit addr*/
|
||||
@@ -1846,7 +1846,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
const OpFn OP_TABLE(pentiumpro_0f)[1024] = {
|
||||
// clang-format off
|
||||
|
||||
@@ -130,10 +130,10 @@ typedef int (*OpFn)(uint32_t fetchdat);
|
||||
static int tempc_fpu = 0;
|
||||
|
||||
#ifdef ENABLE_808X_LOG
|
||||
#if 0
|
||||
void dumpregs(int);
|
||||
|
||||
#endif
|
||||
int x808x_do_log = ENABLE_808X_LOG;
|
||||
int indump = 0;
|
||||
|
||||
static void
|
||||
x808x_log(const char *fmt, ...)
|
||||
|
||||
@@ -19,14 +19,22 @@ add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c
|
||||
|
||||
if(AMD_K5)
|
||||
target_compile_definitions(cpu PRIVATE USE_AMD_K5)
|
||||
|
||||
if(DYNAREC)
|
||||
add_library(ctk5 OBJECT codegen_timing_k5.c)
|
||||
target_link_libraries(86Box ctk5)
|
||||
endif()
|
||||
|
||||
endif()
|
||||
|
||||
if(CYRIX_6X86)
|
||||
target_compile_definitions(cpu PRIVATE USE_CYRIX_6X86)
|
||||
|
||||
if(DYNAREC)
|
||||
add_library(ct686 OBJECT codegen_timing_686.c)
|
||||
target_link_libraries(86Box ct686)
|
||||
endif()
|
||||
endif()
|
||||
|
||||
if(DYNAREC)
|
||||
target_sources(cpu PRIVATE 386_dynarec_ops.c)
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
#define CYCLES(c) (int *) c
|
||||
#define CYCLES2(c16, c32) (int *) ((-1 & ~0xffff) | c16 | (c32 << 8))
|
||||
|
||||
static int *opcode_timings[256] = {
|
||||
static int *opcode_timings_486[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), NULL,
|
||||
/*10*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3),
|
||||
@@ -42,7 +42,7 @@ static int *opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_mod3[256] = {
|
||||
static int *opcode_timings_486_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), NULL,
|
||||
/*10*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3),
|
||||
@@ -66,7 +66,7 @@ static int *opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_0f[256] = {
|
||||
static int *opcode_timings_486_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -89,7 +89,7 @@ static int *opcode_timings_0f[256] = {
|
||||
/*f0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL,
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_0f_mod3[256] = {
|
||||
static int *opcode_timings_486_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -113,65 +113,65 @@ static int *opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_shift[8] = {
|
||||
static int *opcode_timings_486_shift[8] = {
|
||||
// clang-format off
|
||||
CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7)
|
||||
};
|
||||
static int *opcode_timings_shift_mod3[8] = {
|
||||
static int *opcode_timings_486_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_f6[8] = {
|
||||
static int *opcode_timings_486_f6[8] = {
|
||||
// clang-format off
|
||||
&timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f6_mod3[8] = {
|
||||
static int *opcode_timings_486_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f7[8] = {
|
||||
static int *opcode_timings_486_f7[8] = {
|
||||
// clang-format off
|
||||
&timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f7_mod3[8] = {
|
||||
static int *opcode_timings_486_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
};
|
||||
static int *opcode_timings_ff[8] = {
|
||||
static int *opcode_timings_486_ff[8] = {
|
||||
// clang-format off
|
||||
&timing_mm, &timing_mm, CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), NULL
|
||||
};
|
||||
static int *opcode_timings_ff_mod3[8] = {
|
||||
static int *opcode_timings_486_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, &timing_rr, CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_d8[8] = {
|
||||
static int *opcode_timings_486_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_d8_mod3[8] = {
|
||||
static int *opcode_timings_486_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP FSUB FSUBR FDIV FDIVR*/
|
||||
CYCLES(8), CYCLES(16), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_d9[8] = {
|
||||
static int *opcode_timings_486_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs FLDENV FLDCW FSTENV FSTCW*/
|
||||
CYCLES(3), NULL, CYCLES(7), CYCLES(7), CYCLES(34), CYCLES(4), CYCLES(67), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_d9_mod3[64] = {
|
||||
static int *opcode_timings_486_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4),
|
||||
@@ -192,25 +192,25 @@ static int *opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_da[8] = {
|
||||
static int *opcode_timings_486_da[8] = {
|
||||
// clang-format off
|
||||
/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_da_mod3[8] = {
|
||||
static int *opcode_timings_486_da_mod3[8] = {
|
||||
// clang-format off
|
||||
NULL, NULL, NULL, NULL, NULL, CYCLES(5), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_db[8] = {
|
||||
static int *opcode_timings_486_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil FLDe FSTPe*/
|
||||
CYCLES(9), NULL, CYCLES(28), CYCLES(28), NULL, CYCLES(5), NULL, CYCLES(6)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_db_mod3[64] = {
|
||||
static int *opcode_timings_486_db_mod3[64] = {
|
||||
// clang-format off
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -224,74 +224,74 @@ static int *opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_dc[8] = {
|
||||
static int *opcode_timings_486_dc[8] = {
|
||||
// clang-format off
|
||||
/* opFADDd_a16 opFMULd_a16 opFCOMd_a16 opFCOMPd_a16 opFSUBd_a16 opFSUBRd_a16 opFDIVd_a16 opFDIVRd_a16*/
|
||||
CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_dc_mod3[8] = {
|
||||
static int *opcode_timings_486_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr opFSUBRr opFSUBr opFDIVRr opFDIVr*/
|
||||
CYCLES(8), CYCLES(16), NULL, NULL, CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_dd[8] = {
|
||||
static int *opcode_timings_486_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd FRSTOR FSAVE FSTSW*/
|
||||
CYCLES(3), NULL, CYCLES(8), CYCLES(8), CYCLES(131), NULL, CYCLES(154), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_dd_mod3[8] = {
|
||||
static int *opcode_timings_486_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP FUCOM FUCOMP*/
|
||||
CYCLES(3), NULL, CYCLES(3), CYCLES(3), CYCLES(4), CYCLES(4), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_de[8] = {
|
||||
static int *opcode_timings_486_de[8] = {
|
||||
// clang-format off
|
||||
/* FADDiw FMULiw FCOMiw FCOMPiw FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_de_mod3[8] = {
|
||||
static int *opcode_timings_486_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOMPP FSUB FSUBR FDIV FDIVR*/
|
||||
CYCLES(8), CYCLES(16), NULL, CYCLES(5), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_df[8] = {
|
||||
static int *opcode_timings_486_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw FILDiq FBSTP FISTPiq*/
|
||||
CYCLES(13), NULL, CYCLES(29), CYCLES(29), NULL, CYCLES(10), CYCLES(172), CYCLES(28)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_df_mod3[8] = {
|
||||
static int *opcode_timings_486_df_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFREE FST FSTP FUCOM FUCOMP*/
|
||||
CYCLES(3), NULL, CYCLES(3), CYCLES(3), CYCLES(4), CYCLES(4), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_8x[8] = {
|
||||
static int *opcode_timings_486_8x[8] = {
|
||||
// clang-format off
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_8x_mod3[8] = {
|
||||
static int *opcode_timings_486_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_81[8] = {
|
||||
static int *opcode_timings_486_81[8] = {
|
||||
// clang-format off
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_81_mod3[8] = {
|
||||
static int *opcode_timings_486_81_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
// clang-format on
|
||||
@@ -330,7 +330,7 @@ codegen_timing_486_start(void)
|
||||
void
|
||||
codegen_timing_486_prefix(uint8_t prefix, uint32_t fetchdat)
|
||||
{
|
||||
timing_count += COUNT(opcode_timings[prefix], 0);
|
||||
timing_count += COUNT(opcode_timings_486[prefix], 0);
|
||||
last_prefix = prefix;
|
||||
}
|
||||
|
||||
@@ -344,47 +344,47 @@ codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(u
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
timings = mod3 ? opcode_timings_486_0f_mod3 : opcode_timings_486_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
timings = mod3 ? opcode_timings_486_d8_mod3 : opcode_timings_486_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
timings = mod3 ? opcode_timings_486_d9_mod3 : opcode_timings_486_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
timings = mod3 ? opcode_timings_486_da_mod3 : opcode_timings_486_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
timings = mod3 ? opcode_timings_486_db_mod3 : opcode_timings_486_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
timings = mod3 ? opcode_timings_486_dc_mod3 : opcode_timings_486_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
timings = mod3 ? opcode_timings_486_dd_mod3 : opcode_timings_486_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
timings = mod3 ? opcode_timings_486_de_mod3 : opcode_timings_486_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
timings = mod3 ? opcode_timings_486_df_mod3 : opcode_timings_486_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -394,12 +394,12 @@ codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(u
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
timings = mod3 ? opcode_timings_486_8x_mod3 : opcode_timings_486_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
|
||||
timings = mod3 ? opcode_timings_486_81_mod3 : opcode_timings_486_81;
|
||||
deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -410,29 +410,29 @@ codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(u
|
||||
case 0xd1:
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_486_shift_mod3 : opcode_timings_486_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
timings = mod3 ? opcode_timings_486_f6_mod3 : opcode_timings_486_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
timings = mod3 ? opcode_timings_486_f7_mod3 : opcode_timings_486_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
timings = mod3 ? opcode_timings_486_ff_mod3 : opcode_timings_486_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
timings = mod3 ? opcode_timings_486_mod3 : opcode_timings_486;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -65,7 +65,7 @@ static uint32_t prev_fetchdat;
|
||||
static uint32_t last_regmask_modified;
|
||||
static uint32_t regmask_modified;
|
||||
|
||||
static uint32_t opcode_timings[256] = {
|
||||
static uint32_t opcode_timings_686[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
|
||||
@@ -202,7 +202,7 @@ static uint32_t opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_mod3[256] = {
|
||||
static uint32_t opcode_timings_686_mod3[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
|
||||
@@ -340,7 +340,7 @@ static uint32_t opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_0f[256] = {
|
||||
static uint32_t opcode_timings_686_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
|
||||
INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
|
||||
@@ -423,7 +423,7 @@ static uint32_t opcode_timings_0f[256] = {
|
||||
PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_0f_mod3[256] = {
|
||||
static uint32_t opcode_timings_686_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
|
||||
INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
|
||||
@@ -506,44 +506,44 @@ static uint32_t opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_shift[8] = {
|
||||
static uint32_t opcode_timings_686_shift[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(4),
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(4),
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_imm[8] = {
|
||||
static uint32_t opcode_timings_686_shift_imm[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES(8), PAIR_XY | CYCLES(9),
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_imm_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_shift_imm_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(4),
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_cl[8] = {
|
||||
static uint32_t opcode_timings_686_shift_cl[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(8), PAIR_XY | CYCLES(9),
|
||||
PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_cl_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_shift_cl_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(8), PAIR_XY | CYCLES(9),
|
||||
PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_f6[8] = {
|
||||
static uint32_t opcode_timings_686_f6[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_XY | CYCLES_RM, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
|
||||
@@ -551,7 +551,7 @@ static uint32_t opcode_timings_f6[8] = {
|
||||
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(18), PAIR_NP | CYCLES(18)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f6_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
|
||||
@@ -559,7 +559,7 @@ static uint32_t opcode_timings_f6_mod3[8] = {
|
||||
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(18), PAIR_NP | CYCLES(18)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f7[8] = {
|
||||
static uint32_t opcode_timings_686_f7[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
|
||||
@@ -567,7 +567,7 @@ static uint32_t opcode_timings_f7[8] = {
|
||||
PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(19,27), PAIR_NP | CYCLES_MULTI(22,30)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f7_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
|
||||
@@ -575,7 +575,7 @@ static uint32_t opcode_timings_f7_mod3[8] = {
|
||||
PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(19,27), PAIR_NP | CYCLES_MULTI(22,30)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_ff[8] = {
|
||||
static uint32_t opcode_timings_686_ff[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_X_BRANCH | CYCLES(3), PAIR_NP | CYCLES(5),
|
||||
@@ -583,7 +583,7 @@ static uint32_t opcode_timings_ff[8] = {
|
||||
PAIR_X_BRANCH | CYCLES(3), PAIR_NP | CYCLES(5), PAIR_XY | CYCLES(1), INVALID
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_ff_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_X_BRANCH | CYCLES(1), PAIR_XY | CYCLES(5),
|
||||
@@ -592,7 +592,7 @@ static uint32_t opcode_timings_ff_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_d8[8] = {
|
||||
static uint32_t opcode_timings_686_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDs FMULs FCOMs FCOMPs*/
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(6), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4),
|
||||
@@ -600,7 +600,7 @@ static uint32_t opcode_timings_d8[8] = {
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), PAIR_X | CYCLES(34), PAIR_X | CYCLES(34)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_d8_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP*/
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(6), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4),
|
||||
@@ -609,7 +609,7 @@ static uint32_t opcode_timings_d8_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_d9[8] = {
|
||||
static uint32_t opcode_timings_686_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs*/
|
||||
PAIR_X | CYCLES(2), INVALID, PAIR_X | CYCLES(2), PAIR_X | CYCLES(2),
|
||||
@@ -617,7 +617,7 @@ static uint32_t opcode_timings_d9[8] = {
|
||||
PAIR_X | CYCLES(30), PAIR_X | CYCLES(4), PAIR_X | CYCLES(24), PAIR_X | CYCLES(5)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_d9_mod3[64] = {
|
||||
static uint32_t opcode_timings_686_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
PAIR_X | CYCLES(2), PAIR_X | CYCLES(2), PAIR_X | CYCLES(2), PAIR_X | CYCLES(2),
|
||||
@@ -650,7 +650,7 @@ static uint32_t opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_da[8] = {
|
||||
static uint32_t opcode_timings_686_da[8] = {
|
||||
// clang-format off
|
||||
/* FIADDl FIMULl FICOMl FICOMPl*/
|
||||
PAIR_X | CYCLES(12), PAIR_X | CYCLES(11), PAIR_X | CYCLES(10), PAIR_X | CYCLES(10),
|
||||
@@ -658,14 +658,14 @@ static uint32_t opcode_timings_da[8] = {
|
||||
PAIR_X | CYCLES(29), PAIR_X | CYCLES(27), PAIR_X | CYCLES(38), PAIR_X | CYCLES(48)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_da_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_da_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4),
|
||||
INVALID, PAIR_X | CYCLES(5), INVALID, INVALID
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_db[8] = {
|
||||
static uint32_t opcode_timings_686_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil*/
|
||||
PAIR_X | CYCLES(2), INVALID, PAIR_X | CYCLES(2), PAIR_X | CYCLES(2),
|
||||
@@ -673,7 +673,7 @@ static uint32_t opcode_timings_db[8] = {
|
||||
INVALID, PAIR_X | CYCLES(2), INVALID, PAIR_X | CYCLES(2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_db_mod3[64] = {
|
||||
static uint32_t opcode_timings_686_db_mod3[64] = {
|
||||
// clang-format off
|
||||
PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4),
|
||||
PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4), PAIR_X | CYCLES(4),
|
||||
@@ -703,7 +703,7 @@ static uint32_t opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_dc[8] = {
|
||||
static uint32_t opcode_timings_686_dc[8] = {
|
||||
// clang-format off
|
||||
/* FADDd FMULd FCOMd FCOMPd*/
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), PAIR_X | CYCLES(7),
|
||||
@@ -711,7 +711,7 @@ static uint32_t opcode_timings_dc[8] = {
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), PAIR_X | CYCLES(34), PAIR_X | CYCLES(34)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_dc_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr*/
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), INVALID, INVALID,
|
||||
@@ -720,7 +720,7 @@ static uint32_t opcode_timings_dc_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_dd[8] = {
|
||||
static uint32_t opcode_timings_686_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd*/
|
||||
PAIR_X | CYCLES(2), INVALID, PAIR_X | CYCLES(2), PAIR_X | CYCLES(2),
|
||||
@@ -728,7 +728,7 @@ static uint32_t opcode_timings_dd[8] = {
|
||||
PAIR_X | CYCLES(72), INVALID, PAIR_X | CYCLES(67), PAIR_X | CYCLES(2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_dd_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP*/
|
||||
PAIR_X | CYCLES(3), INVALID, PAIR_X | CYCLES(2), PAIR_X | CYCLES(2),
|
||||
@@ -737,14 +737,14 @@ static uint32_t opcode_timings_dd_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_de[8] = {
|
||||
static uint32_t opcode_timings_686_de[8] = {
|
||||
// clang-format off
|
||||
/* FIADDw FIMULw FICOMw FICOMPw*/
|
||||
PAIR_X | CYCLES(12), PAIR_X | CYCLES(11), PAIR_X | CYCLES(10), PAIR_X | CYCLES(10),
|
||||
/* FISUBw FISUBRw FIDIVw FIDIVRw*/
|
||||
PAIR_X | CYCLES(27), PAIR_X | CYCLES(27), PAIR_X | CYCLES(38), PAIR_X | CYCLES(38)
|
||||
};
|
||||
static uint32_t opcode_timings_de_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOMPP*/
|
||||
PAIR_X | CYCLES(7), PAIR_X | CYCLES(7), INVALID, PAIR_X | CYCLES(7),
|
||||
@@ -753,7 +753,7 @@ static uint32_t opcode_timings_de_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_df[8] = {
|
||||
static uint32_t opcode_timings_686_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw*/
|
||||
PAIR_X | CYCLES(8), INVALID, PAIR_X | CYCLES(10), PAIR_X | CYCLES(13),
|
||||
@@ -761,7 +761,7 @@ static uint32_t opcode_timings_df[8] = {
|
||||
INVALID, PAIR_X | CYCLES(8), PAIR_X | CYCLES(63), PAIR_X | CYCLES(13)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_df_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_df_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FSTSW AX*/
|
||||
@@ -769,25 +769,25 @@ static uint32_t opcode_timings_df_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_8x[8] = {
|
||||
static uint32_t opcode_timings_686_8x[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_8x_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_81[8] = {
|
||||
static uint32_t opcode_timings_686_81[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
|
||||
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_81_mod3[8] = {
|
||||
static uint32_t opcode_timings_686_81_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
|
||||
PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG
|
||||
@@ -874,47 +874,47 @@ codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(u
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
timings = mod3 ? opcode_timings_686_0f_mod3 : opcode_timings_686_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
timings = mod3 ? opcode_timings_686_d8_mod3 : opcode_timings_686_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
timings = mod3 ? opcode_timings_686_d9_mod3 : opcode_timings_686_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
timings = mod3 ? opcode_timings_686_da_mod3 : opcode_timings_686_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
timings = mod3 ? opcode_timings_686_db_mod3 : opcode_timings_686_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
timings = mod3 ? opcode_timings_686_dc_mod3 : opcode_timings_686_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
timings = mod3 ? opcode_timings_686_dd_mod3 : opcode_timings_686_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
timings = mod3 ? opcode_timings_686_de_mod3 : opcode_timings_686_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
timings = mod3 ? opcode_timings_686_df_mod3 : opcode_timings_686_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -924,55 +924,55 @@ codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(u
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
timings = mod3 ? opcode_timings_686_8x_mod3 : opcode_timings_686_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
|
||||
timings = mod3 ? opcode_timings_686_81_mod3 : opcode_timings_686_81;
|
||||
deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xc0:
|
||||
case 0xc1:
|
||||
timings = mod3 ? opcode_timings_shift_imm_mod3 : opcode_timings_shift_imm;
|
||||
timings = mod3 ? opcode_timings_686_shift_imm_mod3 : opcode_timings_686_shift_imm;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xd0:
|
||||
case 0xd1:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_686_shift_mod3 : opcode_timings_686_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
timings = mod3 ? opcode_timings_shift_cl_mod3 : opcode_timings_shift_cl;
|
||||
timings = mod3 ? opcode_timings_686_shift_cl_mod3 : opcode_timings_686_shift_cl;
|
||||
deps = mod3 ? opcode_deps_shift_cl_mod3 : opcode_deps_shift_cl;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
timings = mod3 ? opcode_timings_686_f6_mod3 : opcode_timings_686_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
timings = mod3 ? opcode_timings_686_f7_mod3 : opcode_timings_686_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
timings = mod3 ? opcode_timings_686_ff_mod3 : opcode_timings_686_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
timings = mod3 ? opcode_timings_686_mod3 : opcode_timings_686;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
2232
src/cpu/codegen_timing_k5.c
Normal file
2232
src/cpu/codegen_timing_k5.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -1,5 +1,5 @@
|
||||
/*Most of the vector instructions here are a total guess.
|
||||
Some of the timings are based on http://http://web.archive.org/web/20181122095446/http://users.atw.hu/instlatx64/AuthenticAMD0000562_K6_InstLatX86.txt*/
|
||||
Some of the timings are based on https://web.archive.org/web/20181122095446/http://users.atw.hu/instlatx64/AuthenticAMD0000562_K6_InstLatX86.txt*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
@@ -759,7 +759,7 @@ static const risc86_instruction_t vector_wbinvd_op = {
|
||||
|
||||
#define INVALID NULL
|
||||
|
||||
static const risc86_instruction_t *opcode_timings[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
|
||||
@@ -896,7 +896,7 @@ static const risc86_instruction_t *opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_mod3[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_mod3[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ &alux_op, &alu_op, &alux_op, &alu_op,
|
||||
@@ -1033,7 +1033,7 @@ static const risc86_instruction_t *opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_0f[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
|
||||
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
|
||||
@@ -1116,7 +1116,7 @@ static const risc86_instruction_t *opcode_timings_0f[256] = {
|
||||
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_0f_mod3[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
|
||||
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
|
||||
@@ -1200,7 +1200,7 @@ static const risc86_instruction_t *opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_0f0f[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_0f0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -1283,7 +1283,7 @@ static const risc86_instruction_t *opcode_timings_0f0f[256] = {
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_0f0f_mod3[256] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_0f0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -1367,57 +1367,57 @@ static const risc86_instruction_t *opcode_timings_0f0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_shift[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_shift[8] = {
|
||||
// clang-format off
|
||||
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
|
||||
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_shift_b[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_shift_b[8] = {
|
||||
// clang-format off
|
||||
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
|
||||
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_shift_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
&vector_alu1_op, &vector_alu1_op, &vector_alu1_op, &vector_alu1_op,
|
||||
&alu_op, &alu_op, &alu_op, &alu_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_shift_b_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_shift_b_mod3[8] = {
|
||||
// clang-format off
|
||||
&vector_alux1_op, &vector_alux1_op, &vector_alux1_op, &vector_alux1_op,
|
||||
&alux_op, &alux_op, &alux_op, &alux_op
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_80[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_80[8] = {
|
||||
// clang-format off
|
||||
&alux_store_op, &alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
|
||||
&alux_store_op, &alux_store_op, &alux_store_op, &alux_store_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_80_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_80_mod3[8] = {
|
||||
// clang-format off
|
||||
&alux_op, &alux_op, &alux_store_op, &alux_store_op,
|
||||
&alux_op, &alux_op, &alux_op, &alux_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_8x[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_8x[8] = {
|
||||
// clang-format off
|
||||
&alu_store_op, &alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
|
||||
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_8x_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
&alu_op, &alu_op, &alu_store_op, &alu_store_op,
|
||||
&alu_op, &alu_op, &alu_op, &alu_op,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_f6[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_f6[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_mem_imm_b_op, INVALID, &vector_alux_store_op, &vector_alux_store_op,
|
||||
@@ -1425,7 +1425,7 @@ static const risc86_instruction_t *opcode_timings_f6[8] = {
|
||||
&vector_mul_mem_op, &vector_mul_mem_op, &vector_div16_mem_op, &vector_div16_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_f6_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_reg_b_op, INVALID, &alux_op, &alux_op,
|
||||
@@ -1433,7 +1433,7 @@ static const risc86_instruction_t *opcode_timings_f6_mod3[8] = {
|
||||
&vector_mul_op, &vector_mul_op, &vector_div16_op, &vector_div16_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_f7[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_f7[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_mem_imm_op, INVALID, &vector_alu_store_op, &vector_alu_store_op,
|
||||
@@ -1441,7 +1441,7 @@ static const risc86_instruction_t *opcode_timings_f7[8] = {
|
||||
&vector_mul64_mem_op, &vector_mul64_mem_op, &vector_div32_mem_op, &vector_div32_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_f7_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_reg_op, INVALID, &alu_op, &alu_op,
|
||||
@@ -1449,7 +1449,7 @@ static const risc86_instruction_t *opcode_timings_f7_mod3[8] = {
|
||||
&vector_mul64_op, &vector_mul64_op, &vector_div32_op, &vector_div32_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_ff[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_ff[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
&alu_store_op, &alu_store_op, &store_op, &vector_call_far_op,
|
||||
@@ -1457,7 +1457,7 @@ static const risc86_instruction_t *opcode_timings_ff[8] = {
|
||||
&branch_op, &vector_jmp_far_op, &push_mem_op, INVALID
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_ff_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
&vector_alu1_op, &vector_alu1_op, &store_op, &vector_call_far_op,
|
||||
@@ -1466,7 +1466,7 @@ static const risc86_instruction_t *opcode_timings_ff_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_d8[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDs FMULs FCOMs FCOMPs*/
|
||||
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
|
||||
@@ -1474,7 +1474,7 @@ static const risc86_instruction_t *opcode_timings_d8[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_d8_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP*/
|
||||
&float_op, &float_op, &float_op, &float_op,
|
||||
@@ -1483,7 +1483,7 @@ static const risc86_instruction_t *opcode_timings_d8_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_d9[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1491,7 +1491,7 @@ static const risc86_instruction_t *opcode_timings_d9[8] = {
|
||||
&vector_float_l_op, &vector_fldcw_op, &vector_float_l_op, &vector_float_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_d9_mod3[64] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
&float_op, &float_op, &float_op, &float_op,
|
||||
@@ -1524,7 +1524,7 @@ static const risc86_instruction_t *opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_da[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_da[8] = {
|
||||
// clang-format off
|
||||
/* FIADDl FIMULl FICOMl FICOMPl*/
|
||||
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
|
||||
@@ -1532,7 +1532,7 @@ static const risc86_instruction_t *opcode_timings_da[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_da_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_da_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FCOMPP*/
|
||||
@@ -1540,7 +1540,7 @@ static const risc86_instruction_t *opcode_timings_da_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_db[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1548,7 +1548,7 @@ static const risc86_instruction_t *opcode_timings_db[8] = {
|
||||
INVALID, &vector_flde_op, INVALID, &vector_fste_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_db_mod3[64] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_db_mod3[64] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -1578,7 +1578,7 @@ static const risc86_instruction_t *opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_dc[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_dc[8] = {
|
||||
// clang-format off
|
||||
/* FADDd FMULd FCOMd FCOMPd*/
|
||||
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
|
||||
@@ -1586,7 +1586,7 @@ static const risc86_instruction_t *opcode_timings_dc[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_dc_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr*/
|
||||
&float_op, &float_op, INVALID, INVALID,
|
||||
@@ -1595,7 +1595,7 @@ static const risc86_instruction_t *opcode_timings_dc_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_dd[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1603,7 +1603,7 @@ static const risc86_instruction_t *opcode_timings_dd[8] = {
|
||||
&vector_float_l_op, INVALID, &vector_float_l_op, &vector_float_l_op
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_dd_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP*/
|
||||
&float_op, INVALID, &float_op, &float_op,
|
||||
@@ -1612,7 +1612,7 @@ static const risc86_instruction_t *opcode_timings_dd_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_de[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_de[8] = {
|
||||
// clang-format off
|
||||
/* FIADDw FIMULw FICOMw FICOMPw*/
|
||||
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
|
||||
@@ -1620,7 +1620,7 @@ static const risc86_instruction_t *opcode_timings_de[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_de_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADDP FMULP FCOMPP*/
|
||||
&float_op, &float_op, INVALID, &float_op,
|
||||
@@ -1629,7 +1629,7 @@ static const risc86_instruction_t *opcode_timings_de_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const risc86_instruction_t *opcode_timings_df[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1637,7 +1637,7 @@ static const risc86_instruction_t *opcode_timings_df[8] = {
|
||||
INVALID, &load_float_op, &vector_float_l_op, &fstore_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const risc86_instruction_t *opcode_timings_df_mod3[8] = {
|
||||
static const risc86_instruction_t *opcode_timings_k6_df_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FSTSW AX*/
|
||||
@@ -1769,7 +1769,7 @@ static int fpu_st_timestamp[8];
|
||||
static int last_uop_timestamp = 0;
|
||||
|
||||
void
|
||||
decode_flush(void)
|
||||
decode_flush_k6(void)
|
||||
{
|
||||
int uop_timestamp = 0;
|
||||
|
||||
@@ -1908,7 +1908,7 @@ decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetc
|
||||
}
|
||||
decode_buffer.nr_uops += ins->nr_uops;
|
||||
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
} else {
|
||||
decode_buffer.nr_uops = ins->nr_uops;
|
||||
decode_buffer.uops[0] = &ins->uop[0];
|
||||
@@ -1922,7 +1922,7 @@ decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetc
|
||||
|
||||
case DECODE_LONG:
|
||||
if (decode_buffer.nr_uops)
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
|
||||
decode_buffer.nr_uops = ins->nr_uops;
|
||||
for (c = 0; c < ins->nr_uops; c++) {
|
||||
@@ -1932,12 +1932,12 @@ decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetc
|
||||
else
|
||||
decode_buffer.earliest_start[c] = -1;
|
||||
}
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
break;
|
||||
|
||||
case DECODE_VECTOR:
|
||||
if (decode_buffer.nr_uops)
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
|
||||
decode_timestamp++;
|
||||
d = 0;
|
||||
@@ -1953,12 +1953,12 @@ decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetc
|
||||
if (d == 4) {
|
||||
d = 0;
|
||||
decode_buffer.nr_uops = 4;
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
}
|
||||
}
|
||||
if (d) {
|
||||
decode_buffer.nr_uops = d;
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
}
|
||||
break;
|
||||
}
|
||||
@@ -2094,51 +2094,51 @@ codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t
|
||||
|
||||
opcode = fastreadb(cs + opcode_pc);
|
||||
|
||||
ins_table = mod3 ? opcode_timings_0f0f_mod3 : opcode_timings_0f0f;
|
||||
ins_table = mod3 ? opcode_timings_k6_0f0f_mod3 : opcode_timings_k6_0f0f;
|
||||
deps = mod3 ? opcode_deps_0f0f_mod3 : opcode_deps_0f0f;
|
||||
} else {
|
||||
ins_table = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
ins_table = mod3 ? opcode_timings_k6_0f_mod3 : opcode_timings_k6_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
ins_table = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
ins_table = mod3 ? opcode_timings_k6_d8_mod3 : opcode_timings_k6_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
ins_table = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
ins_table = mod3 ? opcode_timings_k6_d9_mod3 : opcode_timings_k6_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
ins_table = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
ins_table = mod3 ? opcode_timings_k6_da_mod3 : opcode_timings_k6_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
ins_table = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
ins_table = mod3 ? opcode_timings_k6_db_mod3 : opcode_timings_k6_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
ins_table = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
ins_table = mod3 ? opcode_timings_k6_dc_mod3 : opcode_timings_k6_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
ins_table = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
ins_table = mod3 ? opcode_timings_k6_dd_mod3 : opcode_timings_k6_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
ins_table = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
ins_table = mod3 ? opcode_timings_k6_de_mod3 : opcode_timings_k6_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
ins_table = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
ins_table = mod3 ? opcode_timings_k6_df_mod3 : opcode_timings_k6_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -2147,13 +2147,13 @@ codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t
|
||||
switch (opcode) {
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
ins_table = mod3 ? opcode_timings_80_mod3 : opcode_timings_80;
|
||||
ins_table = mod3 ? opcode_timings_k6_80_mod3 : opcode_timings_k6_80;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
case 0x83:
|
||||
ins_table = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
ins_table = mod3 ? opcode_timings_k6_8x_mod3 : opcode_timings_k6_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -2161,7 +2161,7 @@ codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t
|
||||
case 0xc0:
|
||||
case 0xd0:
|
||||
case 0xd2:
|
||||
ins_table = mod3 ? opcode_timings_shift_b_mod3 : opcode_timings_shift_b;
|
||||
ins_table = mod3 ? opcode_timings_k6_shift_b_mod3 : opcode_timings_k6_shift_b;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -2169,29 +2169,29 @@ codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t
|
||||
case 0xc1:
|
||||
case 0xd1:
|
||||
case 0xd3:
|
||||
ins_table = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
ins_table = mod3 ? opcode_timings_k6_shift_mod3 : opcode_timings_k6_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
ins_table = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
ins_table = mod3 ? opcode_timings_k6_f6_mod3 : opcode_timings_k6_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
ins_table = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
ins_table = mod3 ? opcode_timings_k6_f7_mod3 : opcode_timings_k6_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
ins_table = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
ins_table = mod3 ? opcode_timings_k6_ff_mod3 : opcode_timings_k6_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
ins_table = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
ins_table = mod3 ? opcode_timings_k6_mod3 : opcode_timings_k6;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
@@ -2209,7 +2209,7 @@ codegen_timing_k6_block_end(void)
|
||||
{
|
||||
if (decode_buffer.nr_uops) {
|
||||
int old_last_complete_timestamp = last_complete_timestamp;
|
||||
decode_flush();
|
||||
decode_flush_k6();
|
||||
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -787,7 +787,7 @@ static const macro_op_t wbinvd_op = {
|
||||
};
|
||||
#define INVALID NULL
|
||||
|
||||
static const macro_op_t *opcode_timings[256] = {
|
||||
static const macro_op_t *opcode_timings_p6[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ &alup0_store_op, &alu_store_op, &load_alup0_op, &load_alu_op,
|
||||
@@ -924,7 +924,7 @@ static const macro_op_t *opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_mod3[256] = {
|
||||
static const macro_op_t *opcode_timings_p6_mod3[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ &alup0_op, &alu_op, &alup0_op, &alu_op,
|
||||
@@ -1062,7 +1062,7 @@ static const macro_op_t *opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_0f[256] = {
|
||||
static const macro_op_t *opcode_timings_p6_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
|
||||
INVALID, &alu6_op, &alu6_op, INVALID,
|
||||
@@ -1145,7 +1145,7 @@ static const macro_op_t *opcode_timings_0f[256] = {
|
||||
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_0f_mod3[256] = {
|
||||
static const macro_op_t *opcode_timings_p6_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
|
||||
INVALID, &alu6_op, &alu6_op, INVALID,
|
||||
@@ -1228,58 +1228,58 @@ static const macro_op_t *opcode_timings_0f_mod3[256] = {
|
||||
&mmx_op, &mmx_op, &mmx_op, INVALID,
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_shift[8] =
|
||||
static const macro_op_t *opcode_timings_p6_shift[8] =
|
||||
{
|
||||
// clang-format off
|
||||
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
|
||||
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_shift_b[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_shift_b[8] = {
|
||||
// clang-format off
|
||||
&alup0_store_op, &alup0_store_op, &alup0_store_op, &alup0_store_op,
|
||||
&alup0_store_op, &alup0_store_op, &alup0_store_op, &alup0_store_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_shift_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
&complex_alu1_op, &complex_alu1_op, &complex_alu1_op, &complex_alu1_op,
|
||||
&alu_op, &alu_op, &alu_op, &alu_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_shift_b_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_shift_b_mod3[8] = {
|
||||
// clang-format off
|
||||
&complex_alup0_1_op, &complex_alup0_1_op, &complex_alup0_1_op, &complex_alup0_1_op,
|
||||
&alup0_op, &alup0_op, &alup0_op, &alup0_op
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_80[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_80[8] = {
|
||||
// clang-format off
|
||||
&alup0_store_op, &alup0_store_op, &alup0_store_op, &alup0_store_op,
|
||||
&alup0_store_op, &alup0_store_op, &alup0_store_op, &alup0_store_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_80_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_80_mod3[8] = {
|
||||
// clang-format off
|
||||
&alup0_op, &alup0_op, &alup0_store_op, &alup0_store_op,
|
||||
&alup0_op, &alup0_op, &alup0_op, &alup0_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_8x[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_8x[8] = {
|
||||
// clang-format off
|
||||
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
|
||||
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_8x_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
&alu_op, &alu_op, &alu_store_op, &alu_store_op,
|
||||
&alu_op, &alu_op, &alu_op, &alu_op,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_f6[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_f6[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_mem_imm_b_op, INVALID, &alup0_store_op, &alup0_store_op,
|
||||
@@ -1287,7 +1287,7 @@ static const macro_op_t *opcode_timings_f6[8] = {
|
||||
&mul_mem_op, &mul_mem_op, &div16_mem_op, &div16_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_f6_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_reg_b_op, INVALID, &alup0_op, &alup0_op,
|
||||
@@ -1295,7 +1295,7 @@ static const macro_op_t *opcode_timings_f6_mod3[8] = {
|
||||
&mul_op, &mul_op, &div16_op, &div16_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_f7[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_f7[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_mem_imm_op, INVALID, &alu_store_op, &alu_store_op,
|
||||
@@ -1303,7 +1303,7 @@ static const macro_op_t *opcode_timings_f7[8] = {
|
||||
&mul64_mem_op, &mul64_mem_op, &div32_mem_op, &div32_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_f7_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
&test_reg_op, INVALID, &alu_op, &alu_op,
|
||||
@@ -1311,7 +1311,7 @@ static const macro_op_t *opcode_timings_f7_mod3[8] = {
|
||||
&mul64_op, &mul64_op, &div32_op, &div32_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_ff[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_ff[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
&alu_store_op, &alu_store_op, &store_op, &call_far_op,
|
||||
@@ -1319,7 +1319,7 @@ static const macro_op_t *opcode_timings_ff[8] = {
|
||||
&branch_op, &jmp_far_op, &push_mem_op, INVALID
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_ff_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
&complex_alu1_op, &complex_alu1_op, &store_op, &call_far_op,
|
||||
@@ -1328,7 +1328,7 @@ static const macro_op_t *opcode_timings_ff_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_d8[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDs FMULs FCOMs FCOMPs*/
|
||||
&load_fadd_op, &load_fmul_op, &load_float_op, &load_float_op,
|
||||
@@ -1336,7 +1336,7 @@ static const macro_op_t *opcode_timings_d8[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_d8_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP*/
|
||||
&fadd_op, &fmul_op, &float_op, &float_op,
|
||||
@@ -1345,7 +1345,7 @@ static const macro_op_t *opcode_timings_d8_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_d9[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1353,7 +1353,7 @@ static const macro_op_t *opcode_timings_d9[8] = {
|
||||
&complex_float_l_op, &fldcw_op, &complex_float_l_op, &complex_float_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_d9_mod3[64] = {
|
||||
static const macro_op_t *opcode_timings_p6_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
&float_op, &float_op, &float_op, &float_op,
|
||||
@@ -1386,7 +1386,7 @@ static const macro_op_t *opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_da[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_da[8] = {
|
||||
// clang-format off
|
||||
/* FIADDl FIMULl FICOMl FICOMPl*/
|
||||
&load_fadd_op, &load_fmul_op, &load_float_op, &load_float_op,
|
||||
@@ -1394,7 +1394,7 @@ static const macro_op_t *opcode_timings_da[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_da_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_da_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FCOMPP*/
|
||||
@@ -1402,7 +1402,7 @@ static const macro_op_t *opcode_timings_da_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_db[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1410,7 +1410,7 @@ static const macro_op_t *opcode_timings_db[8] = {
|
||||
INVALID, &flde_op, INVALID, &fste_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_db_mod3[64] = {
|
||||
static const macro_op_t *opcode_timings_p6_db_mod3[64] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -1440,7 +1440,7 @@ static const macro_op_t *opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_dc[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_dc[8] = {
|
||||
// clang-format off
|
||||
/* FADDd FMULd FCOMd FCOMPd*/
|
||||
&load_fadd_op, &load_fmul_op, &load_float_op, &load_float_op,
|
||||
@@ -1448,7 +1448,7 @@ static const macro_op_t *opcode_timings_dc[8] = {
|
||||
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_dc_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr*/
|
||||
&fadd_op, &fmul_op, INVALID, INVALID,
|
||||
@@ -1457,7 +1457,7 @@ static const macro_op_t *opcode_timings_dc_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_dd[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1465,7 +1465,7 @@ static const macro_op_t *opcode_timings_dd[8] = {
|
||||
&complex_float_l_op, INVALID, &complex_float_l_op, &complex_float_l_op
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_dd_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP*/
|
||||
&float_op, INVALID, &float_op, &float_op,
|
||||
@@ -1474,7 +1474,7 @@ static const macro_op_t *opcode_timings_dd_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_de[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_de[8] = {
|
||||
// clang-format off
|
||||
/* FIADDw FIMULw FICOMw FICOMPw*/
|
||||
&load_fiadd_op, &load_fiadd_op, &load_fiadd_op, &load_fiadd_op,
|
||||
@@ -1482,7 +1482,7 @@ static const macro_op_t *opcode_timings_de[8] = {
|
||||
&load_fiadd_op, &load_fiadd_op, &load_fiadd_op, &load_fiadd_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_de_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADDP FMULP FCOMPP*/
|
||||
&fadd_op, &fmul_op, INVALID, &float_op,
|
||||
@@ -1491,7 +1491,7 @@ static const macro_op_t *opcode_timings_de_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static const macro_op_t *opcode_timings_df[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw*/
|
||||
&load_float_op, INVALID, &fstore_op, &fstore_op,
|
||||
@@ -1499,7 +1499,7 @@ static const macro_op_t *opcode_timings_df[8] = {
|
||||
INVALID, &load_float_op, &complex_float_l_op, &fstore_op,
|
||||
// clang-format on
|
||||
};
|
||||
static const macro_op_t *opcode_timings_df_mod3[8] = {
|
||||
static const macro_op_t *opcode_timings_p6_df_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FSTSW AX*/
|
||||
@@ -1865,47 +1865,47 @@ codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(ui
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
ins_table = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
ins_table = mod3 ? opcode_timings_p6_0f_mod3 : opcode_timings_p6_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
ins_table = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
ins_table = mod3 ? opcode_timings_p6_d8_mod3 : opcode_timings_p6_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
ins_table = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
ins_table = mod3 ? opcode_timings_p6_d9_mod3 : opcode_timings_p6_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
ins_table = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
ins_table = mod3 ? opcode_timings_p6_da_mod3 : opcode_timings_p6_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
ins_table = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
ins_table = mod3 ? opcode_timings_p6_db_mod3 : opcode_timings_p6_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
ins_table = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
ins_table = mod3 ? opcode_timings_p6_dc_mod3 : opcode_timings_p6_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
ins_table = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
ins_table = mod3 ? opcode_timings_p6_dd_mod3 : opcode_timings_p6_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
ins_table = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
ins_table = mod3 ? opcode_timings_p6_de_mod3 : opcode_timings_p6_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
ins_table = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
ins_table = mod3 ? opcode_timings_p6_df_mod3 : opcode_timings_p6_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -1914,13 +1914,13 @@ codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(ui
|
||||
switch (opcode) {
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
ins_table = mod3 ? opcode_timings_80_mod3 : opcode_timings_80;
|
||||
ins_table = mod3 ? opcode_timings_p6_80_mod3 : opcode_timings_p6_80;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
case 0x83:
|
||||
ins_table = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
ins_table = mod3 ? opcode_timings_p6_8x_mod3 : opcode_timings_p6_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -1928,7 +1928,7 @@ codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(ui
|
||||
case 0xc0:
|
||||
case 0xd0:
|
||||
case 0xd2:
|
||||
ins_table = mod3 ? opcode_timings_shift_b_mod3 : opcode_timings_shift_b;
|
||||
ins_table = mod3 ? opcode_timings_p6_shift_b_mod3 : opcode_timings_p6_shift_b;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -1936,29 +1936,29 @@ codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUSED(ui
|
||||
case 0xc1:
|
||||
case 0xd1:
|
||||
case 0xd3:
|
||||
ins_table = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
ins_table = mod3 ? opcode_timings_p6_shift_mod3 : opcode_timings_p6_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
ins_table = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
ins_table = mod3 ? opcode_timings_p6_f6_mod3 : opcode_timings_p6_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
ins_table = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
ins_table = mod3 ? opcode_timings_p6_f7_mod3 : opcode_timings_p6_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
ins_table = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
ins_table = mod3 ? opcode_timings_p6_ff_mod3 : opcode_timings_p6_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
ins_table = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
ins_table = mod3 ? opcode_timings_p6_mod3 : opcode_timings_p6;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -110,7 +110,7 @@ static uint32_t addr_regmask;
|
||||
static int fpu_latency;
|
||||
static int fpu_st_latency[8];
|
||||
|
||||
static uint64_t opcode_timings[256] = {
|
||||
static uint64_t opcode_timings_p6[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
|
||||
@@ -247,7 +247,7 @@ static uint64_t opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_mod3[256] = {
|
||||
static uint64_t opcode_timings_p6_mod3[256] = {
|
||||
// clang-format off
|
||||
/* ADD ADD ADD ADD*/
|
||||
/*00*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
|
||||
@@ -385,7 +385,7 @@ static uint64_t opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_0f[256] = {
|
||||
static uint64_t opcode_timings_p6_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
|
||||
INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
|
||||
@@ -468,7 +468,7 @@ static uint64_t opcode_timings_0f[256] = {
|
||||
PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_0f_mod3[256] = {
|
||||
static uint64_t opcode_timings_p6_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
|
||||
INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
|
||||
@@ -552,20 +552,20 @@ static uint64_t opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_shift[8] = {
|
||||
static uint64_t opcode_timings_p6_shift[8] = {
|
||||
// clang-format off
|
||||
PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW,
|
||||
PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW,
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_shift_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
|
||||
PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_f6[8] = {
|
||||
static uint64_t opcode_timings_p6_f6[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_UV | CYCLES_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
|
||||
@@ -573,7 +573,7 @@ static uint64_t opcode_timings_f6[8] = {
|
||||
PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(17), PAIR_NP | CYCLES(22)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_f6_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
|
||||
@@ -581,7 +581,7 @@ static uint64_t opcode_timings_f6_mod3[8] = {
|
||||
PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(17), PAIR_NP | CYCLES(22)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_f7[8] = {
|
||||
static uint64_t opcode_timings_p6_f7[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_UV | CYCLES_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
|
||||
@@ -589,7 +589,7 @@ static uint64_t opcode_timings_f7[8] = {
|
||||
PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_f7_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
/* TST NOT NEG*/
|
||||
PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
|
||||
@@ -597,7 +597,7 @@ static uint64_t opcode_timings_f7_mod3[8] = {
|
||||
PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_ff[8] = {
|
||||
static uint64_t opcode_timings_p6_ff[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
|
||||
@@ -605,7 +605,7 @@ static uint64_t opcode_timings_ff[8] = {
|
||||
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(0), PAIR_NP | CYCLES(2), INVALID
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_ff_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
/* INC DEC CALL CALL far*/
|
||||
PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
|
||||
@@ -614,7 +614,7 @@ static uint64_t opcode_timings_ff_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_d8[8] = {
|
||||
static uint64_t opcode_timings_p6_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDs FMULs FCOMs FCOMPs*/
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
|
||||
@@ -622,7 +622,7 @@ static uint64_t opcode_timings_d8[8] = {
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_d8_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP*/
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
|
||||
@@ -631,7 +631,7 @@ static uint64_t opcode_timings_d8_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_d9[8] = {
|
||||
static uint64_t opcode_timings_p6_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs*/
|
||||
PAIR_FX | FPU_CYCLES(1,0,0), INVALID, PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(2,0,0),
|
||||
@@ -639,7 +639,7 @@ static uint64_t opcode_timings_d9[8] = {
|
||||
PAIR_NP | FPU_CYCLES(32,0,0), PAIR_NP | FPU_CYCLES(8,0,0), PAIR_NP | FPU_CYCLES(48,0,0), PAIR_NP | FPU_CYCLES(2,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_d9_mod3[64] = {
|
||||
static uint64_t opcode_timings_p6_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
|
||||
@@ -672,7 +672,7 @@ static uint64_t opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_da[8] = {
|
||||
static uint64_t opcode_timings_p6_da[8] = {
|
||||
// clang-format off
|
||||
/* FIADDl FIMULl FICOMl FICOMPl*/
|
||||
PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(4,0,0), PAIR_NP | FPU_CYCLES(4,0,0),
|
||||
@@ -680,7 +680,7 @@ static uint64_t opcode_timings_da[8] = {
|
||||
PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(42,38,2), PAIR_NP | FPU_CYCLES(42,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_da_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_da_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FCOMPP*/
|
||||
@@ -688,7 +688,7 @@ static uint64_t opcode_timings_da_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_db[8] = {
|
||||
static uint64_t opcode_timings_p6_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil*/
|
||||
PAIR_NP | FPU_CYCLES(3,2,2), INVALID, PAIR_NP | FPU_CYCLES(6,0,0), PAIR_NP | FPU_CYCLES(6,0,0),
|
||||
@@ -696,7 +696,7 @@ static uint64_t opcode_timings_db[8] = {
|
||||
INVALID, PAIR_NP | FPU_CYCLES(3,0,0), INVALID, PAIR_NP | FPU_CYCLES(3,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_db_mod3[64] = {
|
||||
static uint64_t opcode_timings_p6_db_mod3[64] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -726,7 +726,7 @@ static uint64_t opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_dc[8] = {
|
||||
static uint64_t opcode_timings_p6_dc[8] = {
|
||||
// clang-format off
|
||||
/* FADDd FMULd FCOMd FCOMPd*/
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
|
||||
@@ -734,7 +734,7 @@ static uint64_t opcode_timings_dc[8] = {
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_dc_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr*/
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), INVALID, INVALID,
|
||||
@@ -743,7 +743,7 @@ static uint64_t opcode_timings_dc_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_dd[8] = {
|
||||
static uint64_t opcode_timings_p6_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd*/
|
||||
PAIR_FX | FPU_CYCLES(1,0,0), INVALID, PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(2,0,0),
|
||||
@@ -751,7 +751,7 @@ static uint64_t opcode_timings_dd[8] = {
|
||||
PAIR_NP | FPU_CYCLES(70,0,0), INVALID, PAIR_NP | FPU_CYCLES(127,0,0), PAIR_NP | FPU_CYCLES(6,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_dd_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP*/
|
||||
PAIR_NP | FPU_CYCLES(2,0,0), INVALID, PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0),
|
||||
@@ -760,7 +760,7 @@ static uint64_t opcode_timings_dd_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_de[8] = {
|
||||
static uint64_t opcode_timings_p6_de[8] = {
|
||||
// clang-format off
|
||||
/* FIADDw FIMULw FICOMw FICOMPw*/
|
||||
PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(4,0,0), PAIR_NP | FPU_CYCLES(4,0,0),
|
||||
@@ -768,7 +768,7 @@ static uint64_t opcode_timings_de[8] = {
|
||||
PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(42,38,2), PAIR_NP | FPU_CYCLES(42,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_de_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADDP FMULP FCOMPP*/
|
||||
PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), INVALID, PAIR_FX | FPU_CYCLES(1,0,0),
|
||||
@@ -777,7 +777,7 @@ static uint64_t opcode_timings_de_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_df[8] = {
|
||||
static uint64_t opcode_timings_p6_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw*/
|
||||
PAIR_NP | FPU_CYCLES(3,2,2), INVALID, PAIR_NP | FPU_CYCLES(6,0,0), PAIR_NP | FPU_CYCLES(6,0,0),
|
||||
@@ -785,7 +785,7 @@ static uint64_t opcode_timings_df[8] = {
|
||||
INVALID, PAIR_NP | FPU_CYCLES(3,2,2), PAIR_NP | FPU_CYCLES(148,0,0), PAIR_NP | FPU_CYCLES(6,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_df_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_df_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FSTSW AX*/
|
||||
@@ -793,25 +793,25 @@ static uint64_t opcode_timings_df_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint64_t opcode_timings_81[8] = {
|
||||
static uint64_t opcode_timings_p6_81[8] = {
|
||||
// clang-format off
|
||||
PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632,
|
||||
PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RM | CYCLES_IMM1632
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_81_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_81_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
|
||||
PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_8x[8] = {
|
||||
static uint64_t opcode_timings_p6_8x[8] = {
|
||||
// clang-format off
|
||||
PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8,
|
||||
PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RM | CYCLES_IMM8
|
||||
// clang-format on
|
||||
};
|
||||
static uint64_t opcode_timings_8x_mod3[8] = {
|
||||
static uint64_t opcode_timings_p6_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
|
||||
PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG
|
||||
@@ -1097,47 +1097,47 @@ codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
timings = mod3 ? opcode_timings_p6_0f_mod3 : opcode_timings_p6_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
timings = mod3 ? opcode_timings_p6_d8_mod3 : opcode_timings_p6_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
timings = mod3 ? opcode_timings_p6_d9_mod3 : opcode_timings_p6_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
timings = mod3 ? opcode_timings_p6_da_mod3 : opcode_timings_p6_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
timings = mod3 ? opcode_timings_p6_db_mod3 : opcode_timings_p6_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
timings = mod3 ? opcode_timings_p6_dc_mod3 : opcode_timings_p6_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
timings = mod3 ? opcode_timings_p6_dd_mod3 : opcode_timings_p6_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
timings = mod3 ? opcode_timings_p6_de_mod3 : opcode_timings_p6_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
timings = mod3 ? opcode_timings_p6_df_mod3 : opcode_timings_p6_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -1147,12 +1147,12 @@ codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
timings = mod3 ? opcode_timings_p6_8x_mod3 : opcode_timings_p6_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
|
||||
timings = mod3 ? opcode_timings_p6_81_mod3 : opcode_timings_p6_81;
|
||||
deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -1161,36 +1161,36 @@ codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
case 0xc1:
|
||||
case 0xd0:
|
||||
case 0xd1:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_p6_shift_mod3 : opcode_timings_p6_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_p6_shift_mod3 : opcode_timings_p6_shift;
|
||||
deps = mod3 ? opcode_deps_shift_cl_mod3 : opcode_deps_shift_cl;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
timings = mod3 ? opcode_timings_p6_f6_mod3 : opcode_timings_p6_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
timings = mod3 ? opcode_timings_p6_f7_mod3 : opcode_timings_p6_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
timings = mod3 ? opcode_timings_p6_ff_mod3 : opcode_timings_p6_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
timings = mod3 ? opcode_timings_p6_mod3 : opcode_timings_p6;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
#define CYCLES(c) (int *) c
|
||||
#define CYCLES2(c16, c32) (int *) ((-1 & ~0xffff) | c16 | (c32 << 8))
|
||||
|
||||
static int *opcode_timings[256] = {
|
||||
static int *opcode_timings_winchip[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), NULL,
|
||||
/*10*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3),
|
||||
@@ -42,7 +42,7 @@ static int *opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_mod3[256] = {
|
||||
static int *opcode_timings_winchip_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), NULL,
|
||||
/*10*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3),
|
||||
@@ -66,7 +66,7 @@ static int *opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_0f[256] = {
|
||||
static int *opcode_timings_winchip_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -89,7 +89,7 @@ static int *opcode_timings_0f[256] = {
|
||||
/*f0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL,
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_0f_mod3[256] = {
|
||||
static int *opcode_timings_winchip_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -113,68 +113,68 @@ static int *opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_shift[8] = {
|
||||
static int *opcode_timings_winchip_shift[8] = {
|
||||
// clang-format off
|
||||
CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_shift_mod3[8] = {
|
||||
static int *opcode_timings_winchip_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_f6[8] = {
|
||||
static int *opcode_timings_winchip_f6[8] = {
|
||||
// clang-format off
|
||||
&timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f6_mod3[8] = {
|
||||
static int *opcode_timings_winchip_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f7[8] = {
|
||||
static int *opcode_timings_winchip_f7[8] = {
|
||||
// clang-format off
|
||||
&timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_f7_mod3[8] = {
|
||||
static int *opcode_timings_winchip_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_ff[8] = {
|
||||
static int *opcode_timings_winchip_ff[8] = {
|
||||
// clang-format off
|
||||
&timing_mm, &timing_mm, CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), NULL
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_ff_mod3[8] = {
|
||||
static int *opcode_timings_winchip_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
&timing_rr, &timing_rr, CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_d8[8] = {
|
||||
static int *opcode_timings_winchip_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(10), CYCLES(12), CYCLES(9), CYCLES(9), CYCLES(10), CYCLES(10), CYCLES(78), CYCLES(78)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_d8_mod3[8] = {
|
||||
static int *opcode_timings_winchip_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP FSUB FSUBR FDIV FDIVR*/
|
||||
CYCLES(4), CYCLES(6), CYCLES(3), CYCLES(3), CYCLES(4), CYCLES(4), CYCLES(72), CYCLES(72)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_d9[8] = {
|
||||
static int *opcode_timings_winchip_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs FLDENV FLDCW FSTENV FSTCW*/
|
||||
CYCLES(2), NULL, CYCLES(7), CYCLES(7), CYCLES(34), CYCLES(4), CYCLES(67), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_d9_mod3[64] = {
|
||||
static int *opcode_timings_winchip_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
|
||||
@@ -195,25 +195,25 @@ static int *opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_da[8] = {
|
||||
static int *opcode_timings_winchip_da[8] = {
|
||||
// clang-format off
|
||||
/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(10), CYCLES(12), CYCLES(9), CYCLES(9), CYCLES(10), CYCLES(10), CYCLES(78), CYCLES(78)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_da_mod3[8] = {
|
||||
static int *opcode_timings_winchip_da_mod3[8] = {
|
||||
// clang-format off
|
||||
NULL, NULL, NULL, NULL, NULL, CYCLES(5), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_db[8] = {
|
||||
static int *opcode_timings_winchip_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil FLDe FSTPe*/
|
||||
CYCLES(6), NULL, CYCLES(7), CYCLES(7), NULL, CYCLES(8), NULL, CYCLES(8)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_db_mod3[64] = {
|
||||
static int *opcode_timings_winchip_db_mod3[64] = {
|
||||
// clang-format off
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
@@ -227,71 +227,71 @@ static int *opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_dc[8] = {
|
||||
static int *opcode_timings_winchip_dc[8] = {
|
||||
// clang-format off
|
||||
/* opFADDd_a16 opFMULd_a16 opFCOMd_a16 opFCOMPd_a16 opFSUBd_a16 opFSUBRd_a16 opFDIVd_a16 opFDIVRd_a16*/
|
||||
CYCLES(6), CYCLES(8), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(74), CYCLES(74)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_dc_mod3[8] = {
|
||||
static int *opcode_timings_winchip_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr opFSUBRr opFSUBr opFDIVRr opFDIVr*/
|
||||
CYCLES(4), CYCLES(6), NULL, NULL, CYCLES(4), CYCLES(4), CYCLES(72), CYCLES(72)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_dd[8] = {
|
||||
static int *opcode_timings_winchip_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd FRSTOR FSAVE FSTSW*/
|
||||
CYCLES(2), NULL, CYCLES(8), CYCLES(8), CYCLES(131), NULL, CYCLES(154), CYCLES(5)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_dd_mod3[8] = {
|
||||
static int *opcode_timings_winchip_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP FUCOM FUCOMP*/
|
||||
CYCLES(3), NULL, CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(3), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_de[8] = {
|
||||
static int *opcode_timings_winchip_de[8] = {
|
||||
// clang-format off
|
||||
/* FADDiw FMULiw FCOMiw FCOMPiw FSUBil FSUBRil FDIVil FDIVRil*/
|
||||
CYCLES(10), CYCLES(12), CYCLES(9), CYCLES(9), CYCLES(10), CYCLES(10), CYCLES(78), CYCLES(78)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_de_mod3[8] = {
|
||||
static int *opcode_timings_winchip_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOMPP FSUB FSUBR FDIV FDIVR*/
|
||||
CYCLES(4), CYCLES(6), NULL, CYCLES(3), CYCLES(4), CYCLES(4), CYCLES(72), CYCLES(72)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_df[8] = {
|
||||
static int *opcode_timings_winchip_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw FILDiq FBSTP FISTPiq*/
|
||||
CYCLES(6), NULL, CYCLES(7), CYCLES(7), NULL, CYCLES(8), CYCLES(172), CYCLES(8)
|
||||
// clang-format on
|
||||
};
|
||||
static int *opcode_timings_df_mod3[8] = {
|
||||
static int *opcode_timings_winchip_df_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFREE FST FSTP FUCOM FUCOMP*/
|
||||
CYCLES(3), NULL, CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(3), NULL, NULL
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static int *opcode_timings_8x[8] = {
|
||||
static int *opcode_timings_winchip_8x[8] = {
|
||||
// clang-format off
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
};
|
||||
static int *opcode_timings_8x_mod3[8] =
|
||||
static int *opcode_timings_winchip_8x_mod3[8] =
|
||||
{
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
};
|
||||
static int *opcode_timings_81[8] =
|
||||
static int *opcode_timings_winchip_81[8] =
|
||||
{
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
};
|
||||
static int *opcode_timings_81_mod3[8] =
|
||||
static int *opcode_timings_winchip_81_mod3[8] =
|
||||
{
|
||||
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
|
||||
// clang-format on
|
||||
@@ -330,7 +330,7 @@ codegen_timing_winchip_start(void)
|
||||
void
|
||||
codegen_timing_winchip_prefix(uint8_t prefix, uint32_t fetchdat)
|
||||
{
|
||||
timing_count += COUNT(opcode_timings[prefix], 0);
|
||||
timing_count += COUNT(opcode_timings_winchip[prefix], 0);
|
||||
last_prefix = prefix;
|
||||
}
|
||||
|
||||
@@ -344,47 +344,47 @@ codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
timings = mod3 ? opcode_timings_winchip_0f_mod3 : opcode_timings_winchip_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
timings = mod3 ? opcode_timings_winchip_d8_mod3 : opcode_timings_winchip_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
timings = mod3 ? opcode_timings_winchip_d9_mod3 : opcode_timings_winchip_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
timings = mod3 ? opcode_timings_winchip_da_mod3 : opcode_timings_winchip_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
timings = mod3 ? opcode_timings_winchip_db_mod3 : opcode_timings_winchip_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
timings = mod3 ? opcode_timings_winchip_dc_mod3 : opcode_timings_winchip_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
timings = mod3 ? opcode_timings_winchip_dd_mod3 : opcode_timings_winchip_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
timings = mod3 ? opcode_timings_winchip_de_mod3 : opcode_timings_winchip_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
timings = mod3 ? opcode_timings_winchip_df_mod3 : opcode_timings_winchip_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -394,12 +394,12 @@ codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
timings = mod3 ? opcode_timings_winchip_8x_mod3 : opcode_timings_winchip_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
|
||||
timings = mod3 ? opcode_timings_winchip_81_mod3 : opcode_timings_winchip_81;
|
||||
deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -410,29 +410,29 @@ codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNUS
|
||||
case 0xd1:
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_winchip_shift_mod3 : opcode_timings_winchip_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
timings = mod3 ? opcode_timings_winchip_f6_mod3 : opcode_timings_winchip_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
timings = mod3 ? opcode_timings_winchip_f7_mod3 : opcode_timings_winchip_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
timings = mod3 ? opcode_timings_winchip_ff_mod3 : opcode_timings_winchip_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
timings = mod3 ? opcode_timings_winchip_mod3 : opcode_timings_winchip;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -63,7 +63,7 @@
|
||||
|
||||
#define INVALID 0
|
||||
|
||||
static uint32_t opcode_timings[256] = {
|
||||
static uint32_t opcode_timings_winchip2[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
|
||||
/*10*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
|
||||
@@ -87,7 +87,7 @@ static uint32_t opcode_timings[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_mod3[256] = {
|
||||
static uint32_t opcode_timings_winchip2_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
|
||||
/*10*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
|
||||
@@ -111,7 +111,7 @@ static uint32_t opcode_timings_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_0f[256] = {
|
||||
static uint32_t opcode_timings_winchip2_0f[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
|
||||
/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -134,7 +134,7 @@ static uint32_t opcode_timings_0f[256] = {
|
||||
/*f0*/ INVALID, CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), INVALID, CYCLES_MMX_MUL(2), INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID,
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_0f_mod3[256] = {
|
||||
static uint32_t opcode_timings_winchip2_0f_mod3[256] = {
|
||||
// clang-format off
|
||||
/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
|
||||
/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -158,49 +158,49 @@ static uint32_t opcode_timings_0f_mod3[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_shift[8] = {
|
||||
static uint32_t opcode_timings_winchip2_shift[8] = {
|
||||
// clang-format off
|
||||
CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_shift_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_shift_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3)
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_f6[8] = {
|
||||
static uint32_t opcode_timings_winchip2_f6[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f6_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_f6_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f7[8] = {
|
||||
static uint32_t opcode_timings_winchip2_f7[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_f7_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_f7_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_ff[8] = {
|
||||
static uint32_t opcode_timings_winchip2_ff[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), CYCLES(2), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_ff_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_ff_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_d8[8] = {
|
||||
static uint32_t opcode_timings_winchip2_d8[8] = {
|
||||
// clang-format off
|
||||
/* FADDs FMULs FCOMs FCOMPs*/
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
|
||||
@@ -208,7 +208,7 @@ static uint32_t opcode_timings_d8[8] = {
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_d8_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_d8_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADD FMUL FCOM FCOMP*/
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
|
||||
@@ -217,7 +217,7 @@ static uint32_t opcode_timings_d8_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_d9[8] = {
|
||||
static uint32_t opcode_timings_winchip2_d9[8] = {
|
||||
// clang-format off
|
||||
/* FLDs FSTs FSTPs*/
|
||||
FPU_CYCLES(1,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
|
||||
@@ -225,7 +225,7 @@ static uint32_t opcode_timings_d9[8] = {
|
||||
FPU_CYCLES(32,0,0), FPU_CYCLES(8,0,0), FPU_CYCLES(48,0,0), FPU_CYCLES(2,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_d9_mod3[64] = {
|
||||
static uint32_t opcode_timings_winchip2_d9_mod3[64] = {
|
||||
// clang-format off
|
||||
/*FLD*/
|
||||
FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
|
||||
@@ -258,7 +258,7 @@ static uint32_t opcode_timings_d9_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_da[8] = {
|
||||
static uint32_t opcode_timings_winchip2_da[8] = {
|
||||
// clang-format off
|
||||
/* FIADDl FIMULl FICOMl FICOMPl*/
|
||||
FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
|
||||
@@ -266,7 +266,7 @@ static uint32_t opcode_timings_da[8] = {
|
||||
FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_da_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_da_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FCOMPP*/
|
||||
@@ -274,7 +274,7 @@ static uint32_t opcode_timings_da_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_db[8] = {
|
||||
static uint32_t opcode_timings_winchip2_db[8] = {
|
||||
// clang-format off
|
||||
/* FLDil FSTil FSTPil*/
|
||||
FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
|
||||
@@ -282,7 +282,7 @@ static uint32_t opcode_timings_db[8] = {
|
||||
INVALID, FPU_CYCLES(3,0,0), INVALID, FPU_CYCLES(3,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_db_mod3[64] = {
|
||||
static uint32_t opcode_timings_winchip2_db_mod3[64] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
@@ -312,7 +312,7 @@ static uint32_t opcode_timings_db_mod3[64] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_dc[8] = {
|
||||
static uint32_t opcode_timings_winchip2_dc[8] = {
|
||||
// clang-format off
|
||||
/* FADDd FMULd FCOMd FCOMPd*/
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
|
||||
@@ -320,7 +320,7 @@ static uint32_t opcode_timings_dc[8] = {
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_dc_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_dc_mod3[8] = {
|
||||
// clang-format off
|
||||
/* opFADDr opFMULr*/
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2),INVALID, INVALID,
|
||||
@@ -329,7 +329,7 @@ static uint32_t opcode_timings_dc_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_dd[8] = {
|
||||
static uint32_t opcode_timings_winchip2_dd[8] = {
|
||||
// clang-format off
|
||||
/* FLDd FSTd FSTPd*/
|
||||
FPU_CYCLES(1,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
|
||||
@@ -337,7 +337,7 @@ static uint32_t opcode_timings_dd[8] = {
|
||||
FPU_CYCLES(70,0,0), INVALID, FPU_CYCLES(127,0,0), FPU_CYCLES(6,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_dd_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_dd_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FFFREE FST FSTP*/
|
||||
FPU_CYCLES(2,0,0), INVALID, FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
|
||||
@@ -346,7 +346,7 @@ static uint32_t opcode_timings_dd_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_de[8] = {
|
||||
static uint32_t opcode_timings_winchip2_de[8] = {
|
||||
// clang-format off
|
||||
/* FIADDw FIMULw FICOMw FICOMPw*/
|
||||
FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
|
||||
@@ -354,7 +354,7 @@ static uint32_t opcode_timings_de[8] = {
|
||||
FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_de_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_de_mod3[8] = {
|
||||
// clang-format off
|
||||
/* FADDP FMULP FCOMPP*/
|
||||
FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(1,0,0),
|
||||
@@ -363,7 +363,7 @@ static uint32_t opcode_timings_de_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_df[8] = {
|
||||
static uint32_t opcode_timings_winchip2_df[8] = {
|
||||
// clang-format off
|
||||
/* FILDiw FISTiw FISTPiw*/
|
||||
FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
|
||||
@@ -371,7 +371,7 @@ static uint32_t opcode_timings_df[8] = {
|
||||
INVALID, FPU_CYCLES(3,2,2), FPU_CYCLES(148,0,0), FPU_CYCLES(6,0,0)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_df_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_df_mod3[8] = {
|
||||
// clang-format off
|
||||
INVALID, INVALID, INVALID, INVALID,
|
||||
/* FSTSW AX*/
|
||||
@@ -379,22 +379,22 @@ static uint32_t opcode_timings_df_mod3[8] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static uint32_t opcode_timings_8x[8] = {
|
||||
static uint32_t opcode_timings_winchip2_8x[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_8x_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_8x_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_81[8] = {
|
||||
static uint32_t opcode_timings_winchip2_81[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
|
||||
// clang-format on
|
||||
};
|
||||
static uint32_t opcode_timings_81_mod3[8] = {
|
||||
static uint32_t opcode_timings_winchip2_81_mod3[8] = {
|
||||
// clang-format off
|
||||
CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
|
||||
// clang-format on
|
||||
@@ -613,47 +613,47 @@ codegen_timing_winchip2_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNU
|
||||
|
||||
switch (last_prefix) {
|
||||
case 0x0f:
|
||||
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
|
||||
timings = mod3 ? opcode_timings_winchip2_0f_mod3 : opcode_timings_winchip2_0f;
|
||||
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
|
||||
break;
|
||||
|
||||
case 0xd8:
|
||||
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
|
||||
timings = mod3 ? opcode_timings_winchip2_d8_mod3 : opcode_timings_winchip2_d8;
|
||||
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xd9:
|
||||
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
|
||||
timings = mod3 ? opcode_timings_winchip2_d9_mod3 : opcode_timings_winchip2_d9;
|
||||
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xda:
|
||||
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
|
||||
timings = mod3 ? opcode_timings_winchip2_da_mod3 : opcode_timings_winchip2_da;
|
||||
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdb:
|
||||
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
|
||||
timings = mod3 ? opcode_timings_winchip2_db_mod3 : opcode_timings_winchip2_db;
|
||||
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
|
||||
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdc:
|
||||
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
|
||||
timings = mod3 ? opcode_timings_winchip2_dc_mod3 : opcode_timings_winchip2_dc;
|
||||
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdd:
|
||||
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
|
||||
timings = mod3 ? opcode_timings_winchip2_dd_mod3 : opcode_timings_winchip2_dd;
|
||||
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xde:
|
||||
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
|
||||
timings = mod3 ? opcode_timings_winchip2_de_mod3 : opcode_timings_winchip2_de;
|
||||
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
case 0xdf:
|
||||
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
|
||||
timings = mod3 ? opcode_timings_winchip2_df_mod3 : opcode_timings_winchip2_df;
|
||||
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
|
||||
opcode = (opcode >> 3) & 7;
|
||||
break;
|
||||
@@ -663,12 +663,12 @@ codegen_timing_winchip2_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNU
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
|
||||
timings = mod3 ? opcode_timings_winchip2_8x_mod3 : opcode_timings_winchip2_8x;
|
||||
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0x81:
|
||||
timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
|
||||
timings = mod3 ? opcode_timings_winchip2_81_mod3 : opcode_timings_winchip2_81;
|
||||
deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
@@ -679,29 +679,29 @@ codegen_timing_winchip2_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, UNU
|
||||
case 0xd1:
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
|
||||
timings = mod3 ? opcode_timings_winchip2_shift_mod3 : opcode_timings_winchip2_shift;
|
||||
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
case 0xf6:
|
||||
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
|
||||
timings = mod3 ? opcode_timings_winchip2_f6_mod3 : opcode_timings_winchip2_f6;
|
||||
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xf7:
|
||||
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
|
||||
timings = mod3 ? opcode_timings_winchip2_f7_mod3 : opcode_timings_winchip2_f7;
|
||||
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
case 0xff:
|
||||
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
|
||||
timings = mod3 ? opcode_timings_winchip2_ff_mod3 : opcode_timings_winchip2_ff;
|
||||
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
|
||||
opcode = (fetchdat >> 3) & 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
|
||||
timings = mod3 ? opcode_timings_winchip2_mod3 : opcode_timings_winchip2;
|
||||
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
|
||||
break;
|
||||
}
|
||||
|
||||
120
src/cpu/cpu.c
120
src/cpu/cpu.c
@@ -47,7 +47,7 @@
|
||||
|
||||
#ifdef USE_DYNAREC
|
||||
# include "codegen.h"
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
#include "x87_timings.h"
|
||||
|
||||
#define CCR1_USE_SMI (1 << 1)
|
||||
@@ -119,7 +119,7 @@ const OpFn *x86_dynarec_opcodes_df_a32;
|
||||
const OpFn *x86_dynarec_opcodes_REPE;
|
||||
const OpFn *x86_dynarec_opcodes_REPNE;
|
||||
const OpFn *x86_dynarec_opcodes_3DNOW;
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
const OpFn *x86_opcodes;
|
||||
const OpFn *x86_opcodes_0f;
|
||||
@@ -504,7 +504,7 @@ cpu_set(void)
|
||||
|
||||
#ifdef USE_ACYCS
|
||||
acycs = 0;
|
||||
#endif
|
||||
#endif /* USE_ACYCS */
|
||||
|
||||
soft_reset_pci = 0;
|
||||
cpu_init = 0;
|
||||
@@ -576,7 +576,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_386_0f, dynarec_ops_386, dynarec_ops_386_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_386_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_386, ops_2386_386_0f);
|
||||
x86_opcodes_REPE = ops_REPE;
|
||||
x86_opcodes_REPNE = ops_REPNE;
|
||||
@@ -587,7 +587,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_REPE = dynarec_ops_REPE;
|
||||
x86_dynarec_opcodes_REPNE = dynarec_ops_REPNE;
|
||||
x86_dynarec_opcodes_3DNOW = dynarec_ops_3DNOW;
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
if (hasfpu) {
|
||||
#ifdef USE_DYNAREC
|
||||
@@ -626,7 +626,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_df_a32;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d8_a16 = ops_sf_fpu_d8_a16;
|
||||
x86_opcodes_d8_a32 = ops_sf_fpu_d8_a32;
|
||||
@@ -714,7 +714,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_nofpu_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_nofpu_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_nofpu_a32;
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_opcodes_d8_a16 = ops_nofpu_a16;
|
||||
x86_opcodes_d8_a32 = ops_nofpu_a32;
|
||||
x86_opcodes_d9_a16 = ops_nofpu_a16;
|
||||
@@ -752,7 +752,7 @@ cpu_set(void)
|
||||
|
||||
#ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_486);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
memset(&msr, 0, sizeof(msr));
|
||||
|
||||
@@ -774,7 +774,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_186, ops_186_0f, dynarec_ops_186, dynarec_ops_186_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_186, ops_186_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_186, ops_2386_186_0f);
|
||||
break;
|
||||
|
||||
@@ -783,7 +783,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_286, ops_286_0f, dynarec_ops_286, dynarec_ops_286_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_286, ops_286_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_286, ops_2386_286_0f);
|
||||
|
||||
if (fpu_type == FPU_287) {
|
||||
@@ -819,7 +819,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d9_a16 = ops_sf_fpu_287_d9_a16;
|
||||
x86_opcodes_d9_a32 = ops_sf_fpu_287_d9_a32;
|
||||
@@ -921,7 +921,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_ibm486_0f, dynarec_ops_386, dynarec_ops_ibm486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_ibm486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_386, ops_2386_ibm486_0f);
|
||||
cpu_features = CPU_FEATURE_MSR;
|
||||
fallthrough;
|
||||
@@ -961,7 +961,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d9_a16 = ops_sf_fpu_287_d9_a16;
|
||||
x86_opcodes_d9_a32 = ops_sf_fpu_287_d9_a32;
|
||||
@@ -1067,7 +1067,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_386, ops_2386_486_0f);
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1107,7 +1107,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_386, ops_2386_486_0f);
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1160,7 +1160,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
x86_setopcodes_2386(ops_2386_386, ops_2386_486_0f);
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1209,7 +1209,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_stpc_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_c486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 3; /* register dest - memory src */
|
||||
@@ -1252,7 +1252,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_c486_0f, dynarec_ops_386, dynarec_ops_c486_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_c486_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 1; /* register dest - memory src */
|
||||
@@ -1301,7 +1301,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_winchip2_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_winchip_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 2; /* register dest - memory src */
|
||||
@@ -1350,7 +1350,7 @@ cpu_set(void)
|
||||
codegen_timing_set(&codegen_timing_winchip2);
|
||||
else
|
||||
codegen_timing_set(&codegen_timing_winchip);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
case CPU_P24T:
|
||||
@@ -1366,7 +1366,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_pentiummmx_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_pentium_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 2; /* register dest - memory src */
|
||||
@@ -1409,10 +1409,10 @@ cpu_set(void)
|
||||
cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
|
||||
#ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_pentium);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -1434,7 +1434,7 @@ cpu_set(void)
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
|
||||
}
|
||||
# endif
|
||||
# endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_da_a16 = ops_sf_fpu_686_da_a16;
|
||||
x86_opcodes_da_a32 = ops_sf_fpu_686_da_a32;
|
||||
@@ -1472,7 +1472,7 @@ cpu_set(void)
|
||||
# if 0
|
||||
x86_setopcodes(ops_386, ops_c6x86_0f);
|
||||
# endif
|
||||
# endif
|
||||
# endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 1; /* register dest - memory src */
|
||||
@@ -1524,19 +1524,19 @@ cpu_set(void)
|
||||
|
||||
# ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_686);
|
||||
# endif
|
||||
# endif /* USE_DYNAREC */
|
||||
|
||||
if ((cpu_s->cpu_type == CPU_Cx6x86L) || (cpu_s->cpu_type == CPU_Cx6x86MX))
|
||||
ccr4 = 0x80;
|
||||
else if (CPU_Cx6x86)
|
||||
CPUID = 0; /* Disabled on powerup by default */
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
case CPU_5K86:
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
case CPU_K6:
|
||||
case CPU_K6_2:
|
||||
case CPU_K6_2C:
|
||||
@@ -1546,7 +1546,7 @@ cpu_set(void)
|
||||
#ifdef USE_DYNAREC
|
||||
if (cpu_s->cpu_type >= CPU_K6_2)
|
||||
x86_setopcodes(ops_386, ops_k62_0f, dynarec_ops_386, dynarec_ops_k62_0f);
|
||||
# if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
# ifdef USE_AMD_K5
|
||||
else if (cpu_s->cpu_type == CPU_K6)
|
||||
x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f);
|
||||
else
|
||||
@@ -1554,11 +1554,11 @@ cpu_set(void)
|
||||
# else
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f);
|
||||
# endif
|
||||
# endif /* USE_AMD_K5 */
|
||||
#else
|
||||
if (cpu_s->cpu_type >= CPU_K6_2)
|
||||
x86_setopcodes(ops_386, ops_k62_0f);
|
||||
# if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
# ifdef USE_AMD_K5
|
||||
else if (cpu_s->cpu_type == CPU_K6)
|
||||
x86_setopcodes(ops_386, ops_k6_0f);
|
||||
else
|
||||
@@ -1566,14 +1566,14 @@ cpu_set(void)
|
||||
# else
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_k6_0f);
|
||||
# endif
|
||||
#endif
|
||||
# endif /* USE_AMD_K5 */
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) {
|
||||
x86_opcodes_3DNOW = ops_3DNOWE;
|
||||
#ifdef USE_DYNAREC
|
||||
x86_dynarec_opcodes_3DNOW = dynarec_ops_3DNOWE;
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
}
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1613,7 +1613,7 @@ cpu_set(void)
|
||||
cpu_features |= CPU_FEATURE_3DNOW;
|
||||
if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P))
|
||||
cpu_features |= CPU_FEATURE_3DNOWE;
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE;
|
||||
if (cpu_s->cpu_type >= CPU_K6) {
|
||||
cpu_CR4_mask |= (CR4_VME | CR4_PVI | CR4_PSE);
|
||||
@@ -1629,11 +1629,11 @@ cpu_set(void)
|
||||
cpu_CR4_mask |= CR4_PCE;
|
||||
else if (cpu_s->cpu_type >= CPU_K6_2C)
|
||||
cpu_CR4_mask |= CR4_PGE;
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
|
||||
#ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_k6);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
@@ -1668,7 +1668,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_pentium2d_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_pentium2_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_da_a16 = ops_sf_fpu_686_da_a16;
|
||||
x86_opcodes_da_a32 = ops_sf_fpu_686_da_a32;
|
||||
@@ -1726,7 +1726,7 @@ cpu_set(void)
|
||||
|
||||
#ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_p6);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
case CPU_CYRIX3S:
|
||||
@@ -1734,7 +1734,7 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
|
||||
#else
|
||||
x86_setopcodes(ops_386, ops_winchip2_0f);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
timing_rm = 2; /* register dest - memory src */
|
||||
timing_mr = 2; /* memory dest - register src */
|
||||
@@ -1774,7 +1774,7 @@ cpu_set(void)
|
||||
|
||||
#ifdef USE_DYNAREC
|
||||
codegen_timing_set(&codegen_timing_winchip);
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -1812,7 +1812,7 @@ cpu_set(void)
|
||||
cpu_exec = exec386_dynarec;
|
||||
cpu_use_exec = 1;
|
||||
} else
|
||||
#endif
|
||||
#endif /* defined(USE_DYNAREC) && !defined(USE_GDBSTUB) */
|
||||
/* Use exec386 for CPU_IBM486SLC because it can reach 100 MHz. */
|
||||
if ((cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL) ||
|
||||
cpu_iscyrix || (cpu_s->cpu_type > CPU_486DLC) || cpu_override_interpreter) {
|
||||
@@ -2065,7 +2065,7 @@ cpu_CPUID(void)
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
if (!EAX) {
|
||||
EAX = 0x00000001;
|
||||
@@ -2123,7 +2123,7 @@ cpu_CPUID(void)
|
||||
break;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
|
||||
case CPU_K6:
|
||||
switch (EAX) {
|
||||
@@ -2354,7 +2354,7 @@ cpu_CPUID(void)
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
if (!EAX) {
|
||||
EAX = 0x00000001;
|
||||
@@ -2410,7 +2410,7 @@ cpu_CPUID(void)
|
||||
} else
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
if (!EAX) {
|
||||
@@ -2565,10 +2565,10 @@ cpu_ven_reset(void)
|
||||
msr.amd_psor = (cpu_s->cpu_type >= CPU_K6_3) ? 0x008cULL : 0x018cULL;
|
||||
fallthrough;
|
||||
case CPU_K6_2:
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
case CPU_5K86:
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
case CPU_K6:
|
||||
msr.amd_efer = (cpu_s->cpu_type >= CPU_K6_2C) ? 2ULL : 0ULL;
|
||||
break;
|
||||
@@ -2789,10 +2789,10 @@ cpu_RDMSR(void)
|
||||
}
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
case CPU_5K86:
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
case CPU_K6:
|
||||
case CPU_K6_2:
|
||||
case CPU_K6_2C:
|
||||
@@ -3075,7 +3075,7 @@ pentium_invalid_rdmsr:
|
||||
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -3115,7 +3115,7 @@ pentium_invalid_rdmsr:
|
||||
}
|
||||
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
case CPU_PENTIUM2:
|
||||
@@ -3654,10 +3654,10 @@ cpu_WRMSR(void)
|
||||
}
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
case CPU_5K86:
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
case CPU_K6:
|
||||
case CPU_K6_2:
|
||||
case CPU_K6_2C:
|
||||
@@ -3918,7 +3918,7 @@ pentium_invalid_wrmsr:
|
||||
}
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -3952,7 +3952,7 @@ pentium_invalid_wrmsr:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
case CPU_PENTIUM2:
|
||||
@@ -4277,14 +4277,14 @@ cpu_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
|
||||
case 0xe8: /* CCR4 */
|
||||
if ((ccr3 & 0xf0) == 0x10) {
|
||||
ccr4 = val;
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
if (cpu_s->cpu_type >= CPU_Cx6x86) {
|
||||
if (val & 0x80)
|
||||
CPUID = cpu_s->cpuid_model;
|
||||
else
|
||||
CPUID = 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
}
|
||||
break;
|
||||
case 0xe9: /* CCR5 */
|
||||
@@ -4358,7 +4358,7 @@ x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f)
|
||||
x86_opcodes = opcodes;
|
||||
x86_opcodes_0f = opcodes_0f;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_DYNAREC */
|
||||
|
||||
void
|
||||
x86_setopcodes_2386(const OpFn *opcodes, const OpFn *opcodes_0f)
|
||||
|
||||
@@ -4474,7 +4474,7 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
|
||||
#ifdef USE_AMD_K5
|
||||
{
|
||||
.package = CPU_PKG_SOCKET5_7,
|
||||
.manufacturer = "AMD",
|
||||
@@ -4629,7 +4629,7 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#endif
|
||||
#endif /* USE_AMD_K5 */
|
||||
{
|
||||
.package = CPU_PKG_SOCKET5_7,
|
||||
.manufacturer = "AMD",
|
||||
@@ -5982,7 +5982,7 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
{
|
||||
.package = CPU_PKG_SOCKET5_7,
|
||||
.manufacturer = "Cyrix",
|
||||
@@ -6342,7 +6342,7 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
{
|
||||
.package = CPU_PKG_SOCKET8,
|
||||
.manufacturer = "Intel",
|
||||
|
||||
@@ -83,7 +83,9 @@ int fpu_cycles = 0;
|
||||
int in_lock = 0;
|
||||
|
||||
#ifdef ENABLE_X86_LOG
|
||||
#if 0
|
||||
void dumpregs(int);
|
||||
#endif
|
||||
|
||||
int x86_do_log = ENABLE_X86_LOG;
|
||||
int indump = 0;
|
||||
@@ -93,13 +95,14 @@ x86_log(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
if (x808x_do_log) {
|
||||
if (x86_do_log) {
|
||||
va_start(ap, fmt);
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
void
|
||||
dumpregs(int force)
|
||||
{
|
||||
@@ -144,6 +147,7 @@ dumpregs(int force)
|
||||
x87_dumpregs();
|
||||
indump = 0;
|
||||
}
|
||||
#endif
|
||||
#else
|
||||
# define x86_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
@@ -90,10 +90,10 @@ extern const OpFn dynarec_ops_winchip2_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentium_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentiummmx_0f[1024];
|
||||
|
||||
# if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
# ifdef USE_CYRIX_6X86
|
||||
extern const OpFn dynarec_ops_c6x86_0f[1024];
|
||||
extern const OpFn dynarec_ops_c6x86mx_0f[1024];
|
||||
# endif
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
extern const OpFn dynarec_ops_k6_0f[1024];
|
||||
extern const OpFn dynarec_ops_k62_0f[1024];
|
||||
@@ -232,10 +232,10 @@ extern const OpFn ops_winchip2_0f[1024];
|
||||
extern const OpFn ops_pentium_0f[1024];
|
||||
extern const OpFn ops_pentiummmx_0f[1024];
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
extern const OpFn ops_c6x86_0f[1024];
|
||||
extern const OpFn ops_c6x86mx_0f[1024];
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
extern const OpFn ops_k6_0f[1024];
|
||||
extern const OpFn ops_k62_0f[1024];
|
||||
|
||||
@@ -110,7 +110,7 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
|
||||
#ifdef USE_CYRIX_6X86
|
||||
/*Cyrix maps both MOVD and SMINT to the same opcode*/
|
||||
static int
|
||||
opMOVD_mm_l_a16_cx(uint32_t fetchdat)
|
||||
@@ -170,7 +170,7 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
static int
|
||||
opMOVQ_q_mm_a16(uint32_t fetchdat)
|
||||
|
||||
@@ -26,22 +26,22 @@ uint32_t x87_op_off;
|
||||
uint16_t x87_pc_seg;
|
||||
uint16_t x87_op_seg;
|
||||
|
||||
#ifdef ENABLE_FPU_LOG
|
||||
int fpu_do_log = ENABLE_FPU_LOG;
|
||||
#ifdef ENABLE_FPU_X87_LOG
|
||||
int fpu_x87_do_log = ENABLE_FPU_X87_LOG;
|
||||
|
||||
void
|
||||
fpu_log(const char *fmt, ...)
|
||||
fpu_x87_log(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
if (fpu_do_log) {
|
||||
if (fpu_x87_do_log) {
|
||||
va_start(ap, fmt);
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
}
|
||||
#else
|
||||
# define fpu_log(fmt, ...)
|
||||
# define fpu_x87_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
#ifdef USE_NEW_DYNAREC
|
||||
@@ -546,17 +546,17 @@ unpack_FPU_TW(uint16_t tag_byte)
|
||||
return (twd >> 2);
|
||||
}
|
||||
|
||||
#ifdef ENABLE_808X_LOG
|
||||
#ifdef ENABLE_FPU_X87_LOG
|
||||
void
|
||||
x87_dumpregs(void)
|
||||
{
|
||||
if (cpu_state.ismmx) {
|
||||
fpu_log("MM0=%016llX\tMM1=%016llX\tMM2=%016llX\tMM3=%016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q);
|
||||
fpu_log("MM4=%016llX\tMM5=%016llX\tMM6=%016llX\tMM7=%016llX\n", cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q);
|
||||
fpu_x87_log("MM0=%016llX\tMM1=%016llX\tMM2=%016llX\tMM3=%016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q);
|
||||
fpu_x87_log("MM4=%016llX\tMM5=%016llX\tMM6=%016llX\tMM7=%016llX\n", cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q);
|
||||
} else {
|
||||
fpu_log("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n", cpu_state.ST[cpu_state.TOP], cpu_state.ST[(cpu_state.TOP + 1) & 7], cpu_state.ST[(cpu_state.TOP + 2) & 7], cpu_state.ST[(cpu_state.TOP + 3) & 7]);
|
||||
fpu_log("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n", cpu_state.ST[(cpu_state.TOP + 4) & 7], cpu_state.ST[(cpu_state.TOP + 5) & 7], cpu_state.ST[(cpu_state.TOP + 6) & 7], cpu_state.ST[(cpu_state.TOP + 7) & 7]);
|
||||
fpu_x87_log("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n", cpu_state.ST[cpu_state.TOP], cpu_state.ST[(cpu_state.TOP + 1) & 7], cpu_state.ST[(cpu_state.TOP + 2) & 7], cpu_state.ST[(cpu_state.TOP + 3) & 7]);
|
||||
fpu_x87_log("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n", cpu_state.ST[(cpu_state.TOP + 4) & 7], cpu_state.ST[(cpu_state.TOP + 5) & 7], cpu_state.ST[(cpu_state.TOP + 6) & 7], cpu_state.ST[(cpu_state.TOP + 7) & 7]);
|
||||
}
|
||||
fpu_log("Status = %04X Control = %04X Tag = %04X\n", cpu_state.npxs, cpu_state.npxc, x87_gettag());
|
||||
fpu_x87_log("Status = %04X Control = %04X Tag = %04X\n", cpu_state.npxs, cpu_state.npxc, x87_gettag());
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -47,3 +47,12 @@ endif()
|
||||
if(LASERXT)
|
||||
target_compile_definitions(dev PRIVATE USE_LASERXT)
|
||||
endif()
|
||||
|
||||
if(PCL)
|
||||
target_compile_definitions(dev PRIVATE USE_PCL)
|
||||
endif()
|
||||
|
||||
if(WACOM)
|
||||
target_compile_definitions(dev PRIVATE USE_WACOM)
|
||||
target_sources(dev PRIVATE mouse_wacom_tablet.c)
|
||||
endif()
|
||||
|
||||
@@ -1699,7 +1699,7 @@ static const device_t brxt_device = {
|
||||
.config = brxt_config
|
||||
};
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_BRAT)
|
||||
#ifdef USE_ISAMEM_BRAT
|
||||
static const device_config_t brat_config[] = {
|
||||
// clang-format off
|
||||
{
|
||||
@@ -1804,7 +1804,7 @@ static const device_t brat_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = brat_config
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_ISAMEM_BRAT */
|
||||
|
||||
static const device_config_t lotech_config[] = {
|
||||
// clang-format off
|
||||
@@ -1871,7 +1871,7 @@ static const device_t lotech_device = {
|
||||
.config = lotech_config
|
||||
};
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_RAMPAGE)
|
||||
#ifdef USE_ISAMEM_RAMPAGE
|
||||
// TODO: Dual Paging support
|
||||
// TODO: Conventional memory suppport
|
||||
static const device_config_t rampage_config[] = {
|
||||
@@ -1939,9 +1939,9 @@ static const device_t rampage_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = rampage_config
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_ISAMEM_RAMPAGE */
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_IAB)
|
||||
#ifdef USE_ISAMEM_IAB
|
||||
static const device_config_t iab_config[] = {
|
||||
// clang-format off
|
||||
{
|
||||
@@ -2038,7 +2038,7 @@ static const device_t iab_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = iab_config
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_ISAMEM_IAB */
|
||||
|
||||
static const struct {
|
||||
const device_t *dev;
|
||||
@@ -2063,15 +2063,15 @@ static const struct {
|
||||
{ &ev159_device },
|
||||
{ &ev165a_device },
|
||||
{ &brxt_device },
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_BRAT)
|
||||
#ifdef USE_ISAMEM_BRAT
|
||||
{ &brat_device },
|
||||
#endif
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_RAMPAGE)
|
||||
#endif /* USE_ISAMEM_BRAT */
|
||||
#ifdef USE_ISAMEM_RAMPAGE
|
||||
{ &rampage_device },
|
||||
#endif
|
||||
#if defined(DEV_BRANCH) && defined(USE_ISAMEM_IAB)
|
||||
#endif /* USE_ISAMEM_RAMPAGE */
|
||||
#ifdef USE_ISAMEM_IAB
|
||||
{ &iab_device },
|
||||
#endif
|
||||
#endif /* USE_ISAMEM_IAB */
|
||||
{ &lotech_device },
|
||||
{ NULL }
|
||||
// clang-format on
|
||||
|
||||
@@ -25,6 +25,7 @@
|
||||
#include <86box/86box.h>
|
||||
#include <86box/machine.h>
|
||||
#include <86box/keyboard.h>
|
||||
#include <86box/plat.h>
|
||||
|
||||
#include "cpu.h"
|
||||
|
||||
@@ -50,7 +51,8 @@ uint16_t key_uncapture_2 = 0x14f; /* End */
|
||||
|
||||
void (*keyboard_send)(uint16_t val);
|
||||
|
||||
static int recv_key[512]; /* keyboard input buffer */
|
||||
static int recv_key[512] = { 0 }; /* keyboard input buffer */
|
||||
static int recv_key_ui[512] = { 0 }; /* keyboard input buffer */
|
||||
static int oldkey[512];
|
||||
#if 0
|
||||
static int keydelay[512];
|
||||
@@ -238,16 +240,13 @@ keyboard_input(int down, uint16_t scan)
|
||||
}
|
||||
}
|
||||
|
||||
/* NOTE: Shouldn't this be some sort of bit shift? An array of 8 unsigned 64-bit integers
|
||||
should be enough. */
|
||||
#if 0
|
||||
recv_key[scan >> 6] |= ((uint64_t) down << ((uint64_t) scan & 0x3fLL));
|
||||
#endif
|
||||
|
||||
/* pclog("Received scan code: %03X (%s)\n", scan & 0x1ff, down ? "down" : "up"); */
|
||||
recv_key[scan & 0x1ff] = down;
|
||||
recv_key_ui[scan & 0x1ff] = down;
|
||||
|
||||
key_process(scan & 0x1ff, down);
|
||||
if (mouse_capture || !kbd_req_capture || video_fullscreen) {
|
||||
recv_key[scan & 0x1ff] = down;
|
||||
key_process(scan & 0x1ff, down);
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
@@ -343,30 +342,36 @@ keyboard_recv(uint16_t key)
|
||||
return recv_key[key];
|
||||
}
|
||||
|
||||
int
|
||||
keyboard_recv_ui(uint16_t key)
|
||||
{
|
||||
return recv_key_ui[key];
|
||||
}
|
||||
|
||||
/* Do we have Control-Alt-PgDn in the keyboard buffer? */
|
||||
int
|
||||
keyboard_isfsenter(void)
|
||||
{
|
||||
return ((recv_key[0x01d] || recv_key[0x11d]) && (recv_key[0x038] || recv_key[0x138]) && (recv_key[0x049] || recv_key[0x149]));
|
||||
return ((recv_key_ui[0x01d] || recv_key_ui[0x11d]) && (recv_key_ui[0x038] || recv_key_ui[0x138]) && (recv_key_ui[0x049] || recv_key_ui[0x149]));
|
||||
}
|
||||
|
||||
int
|
||||
keyboard_isfsenter_up(void)
|
||||
{
|
||||
return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x049] && !recv_key[0x149]);
|
||||
return (!recv_key_ui[0x01d] && !recv_key_ui[0x11d] && !recv_key_ui[0x038] && !recv_key_ui[0x138] && !recv_key_ui[0x049] && !recv_key_ui[0x149]);
|
||||
}
|
||||
|
||||
/* Do we have Control-Alt-PgDn in the keyboard buffer? */
|
||||
int
|
||||
keyboard_isfsexit(void)
|
||||
{
|
||||
return ((recv_key[0x01d] || recv_key[0x11d]) && (recv_key[0x038] || recv_key[0x138]) && (recv_key[0x051] || recv_key[0x151]));
|
||||
return ((recv_key_ui[0x01d] || recv_key_ui[0x11d]) && (recv_key_ui[0x038] || recv_key_ui[0x138]) && (recv_key_ui[0x051] || recv_key_ui[0x151]));
|
||||
}
|
||||
|
||||
int
|
||||
keyboard_isfsexit_up(void)
|
||||
{
|
||||
return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x051] && !recv_key[0x151]);
|
||||
return (!recv_key_ui[0x01d] && !recv_key_ui[0x11d] && !recv_key_ui[0x038] && !recv_key_ui[0x138] && !recv_key_ui[0x051] && !recv_key_ui[0x151]);
|
||||
}
|
||||
|
||||
/* Do we have the mouse uncapture combination in the keyboard buffer? */
|
||||
@@ -374,10 +379,10 @@ int
|
||||
keyboard_ismsexit(void)
|
||||
{
|
||||
if ((key_prefix_2_1 != 0x000) || (key_prefix_2_2 != 0x000))
|
||||
return ((recv_key[key_prefix_1_1] || recv_key[key_prefix_1_2]) &&
|
||||
(recv_key[key_prefix_2_1] || recv_key[key_prefix_2_2]) &&
|
||||
(recv_key[key_uncapture_1] || recv_key[key_uncapture_2]));
|
||||
return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) &&
|
||||
(recv_key_ui[key_prefix_2_1] || recv_key_ui[key_prefix_2_2]) &&
|
||||
(recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2]));
|
||||
else
|
||||
return ((recv_key[key_prefix_1_1] || recv_key[key_prefix_1_2]) &&
|
||||
(recv_key[key_uncapture_1] || recv_key[key_uncapture_2]));
|
||||
return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) &&
|
||||
(recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2]));
|
||||
}
|
||||
|
||||
@@ -2102,6 +2102,7 @@ keyboard_at_write(void *priv)
|
||||
/* TODO: This is supposed to resend multiple bytes after some commands. */
|
||||
case 0xfe: /* resend last scan code */
|
||||
keyboard_at_log("%s: resend last scan code\n", dev->name);
|
||||
kbc_at_dev_queue_add(dev, 0xfa, 0);
|
||||
kbc_at_dev_queue_add(dev, dev->last_scan_code, 0);
|
||||
break;
|
||||
|
||||
|
||||
@@ -928,11 +928,11 @@ kbd_read(uint16_t port, void *priv)
|
||||
else {
|
||||
/* LaserXT = Always 512k RAM;
|
||||
LaserXT/3 = Bit 0: set = 512k, clear = 256k. */
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
#ifdef USE_LASERXT
|
||||
if (kbd->type == KBD_TYPE_VTECH)
|
||||
ret = ((mem_size == 512) ? 0x0d : 0x0c) | (hasfpu ? 0x02 : 0x00);
|
||||
else
|
||||
#endif
|
||||
#endif /* USE_LASERXT */
|
||||
ret = (kbd->pd & 0x0d) | (hasfpu ? 0x02 : 0x00);
|
||||
}
|
||||
}
|
||||
@@ -1292,7 +1292,7 @@ const device_t keyboard_xt_t1x00_device = {
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
#ifdef USE_LASERXT
|
||||
const device_t keyboard_xt_lxt3_device = {
|
||||
.name = "VTech Laser XT3 Keyboard",
|
||||
.internal_name = "keyboard_xt_lxt3",
|
||||
@@ -1306,7 +1306,7 @@ const device_t keyboard_xt_lxt3_device = {
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_LASERXT */
|
||||
|
||||
const device_t keyboard_xt_olivetti_device = {
|
||||
.name = "Olivetti XT Keyboard",
|
||||
|
||||
@@ -98,7 +98,7 @@ static mouse_t mouse_devices[] = {
|
||||
{ &mouse_wacom_device },
|
||||
{ &mouse_wacom_artpad_device },
|
||||
#endif
|
||||
{ &mouse_mtouch_device },
|
||||
{ &mouse_mtouch_device },
|
||||
{ NULL }
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
@@ -148,7 +148,7 @@ smbus_sis5595_read_data(void *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
smbus_sis5595_log("SMBus SIS5595: read(%02X) = %02x\n", addr, ret);
|
||||
smbus_sis5595_log("SMBus SIS5595: read(%02X) = %02x\n", dev->addr, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -171,7 +171,7 @@ smbus_sis5595_write_data(void *priv, uint8_t val)
|
||||
uint16_t prev_stat;
|
||||
uint16_t timer_bytes = 0;
|
||||
|
||||
smbus_sis5595_log("SMBus SIS5595: write(%02X, %02X)\n", addr, val);
|
||||
smbus_sis5595_log("SMBus SIS5595: write(%02X, %02X)\n", dev->addr, val);
|
||||
|
||||
prev_stat = dev->next_stat;
|
||||
dev->next_stat = 0x0000;
|
||||
|
||||
@@ -83,7 +83,7 @@ ali5213_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
ali5213_t *dev = (ali5213_t *) priv;
|
||||
|
||||
ali5213_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
|
||||
ali5213_log("[%04X:%08X] [W] %02X = %02X\n", CS, cpu_state.pc, addr, val);
|
||||
|
||||
switch (addr) {
|
||||
case 0xf4: /* Usually it writes 30h here */
|
||||
@@ -179,7 +179,7 @@ ali5213_read(uint16_t addr, void *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
|
||||
ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, addr, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -79,7 +79,7 @@ um8673f_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
um8673f_t *dev = (um8673f_t *) priv;
|
||||
|
||||
um8673f_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
|
||||
um8673f_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, addr, val, dev->tries);
|
||||
|
||||
switch (addr) {
|
||||
case 0x108:
|
||||
@@ -140,7 +140,7 @@ um8673f_read(uint16_t addr, void *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
um8673f_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
|
||||
um8673f_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, addr, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -59,7 +59,7 @@ w83769f_log(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
if (cmd640_do_log) {
|
||||
if (w83769f_do_log) {
|
||||
va_start(ap, fmt);
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
|
||||
88
src/fifo8.c
88
src/fifo8.c
@@ -21,14 +21,19 @@
|
||||
#include <86box/86box.h>
|
||||
#include <86box/fifo8.h>
|
||||
|
||||
void
|
||||
fifo8_reset(Fifo8 *fifo)
|
||||
{
|
||||
fifo->num = 0;
|
||||
fifo->head = 0;
|
||||
}
|
||||
|
||||
void
|
||||
fifo8_create(Fifo8 *fifo, uint32_t capacity)
|
||||
{
|
||||
fifo->data = (uint8_t *) malloc(capacity);
|
||||
memset(fifo->data, 0, capacity);
|
||||
fifo->data = (uint8_t *) calloc(1, capacity);
|
||||
fifo->capacity = capacity;
|
||||
fifo->head = 0;
|
||||
fifo->num = 0;
|
||||
fifo8_reset(fifo);
|
||||
}
|
||||
|
||||
void
|
||||
@@ -54,7 +59,7 @@ fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num)
|
||||
uint32_t start;
|
||||
uint32_t avail;
|
||||
|
||||
assert(fifo->num + num <= fifo->capacity);
|
||||
assert((fifo->num + num) <= fifo->capacity);
|
||||
|
||||
start = (fifo->head + fifo->num) % fifo->capacity;
|
||||
|
||||
@@ -81,25 +86,72 @@ fifo8_pop(Fifo8 *fifo)
|
||||
return ret;
|
||||
}
|
||||
|
||||
const uint8_t *
|
||||
fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num)
|
||||
static const uint8_t
|
||||
*fifo8_peekpop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr, int do_pop)
|
||||
{
|
||||
const uint8_t *ret;
|
||||
uint8_t *ret;
|
||||
uint32_t num;
|
||||
|
||||
assert((max > 0) && (max <= fifo->num));
|
||||
num = MIN(fifo->capacity - fifo->head, max);
|
||||
ret = &fifo->data[fifo->head];
|
||||
|
||||
if (do_pop) {
|
||||
fifo->head += num;
|
||||
fifo->head %= fifo->capacity;
|
||||
fifo->num -= num;
|
||||
}
|
||||
if (numptr)
|
||||
*numptr = num;
|
||||
|
||||
assert(max > 0 && max <= fifo->num);
|
||||
*num = MIN(fifo->capacity - fifo->head, max);
|
||||
ret = &fifo->data[fifo->head];
|
||||
fifo->head += *num;
|
||||
fifo->head %= fifo->capacity;
|
||||
fifo->num -= *num;
|
||||
return ret;
|
||||
}
|
||||
|
||||
void
|
||||
fifo8_reset(Fifo8 *fifo)
|
||||
const uint8_t
|
||||
*fifo8_peek_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
|
||||
{
|
||||
fifo->num = 0;
|
||||
fifo->head = 0;
|
||||
return fifo8_peekpop_buf(fifo, max, numptr, 0);
|
||||
}
|
||||
|
||||
const uint8_t
|
||||
*fifo8_pop_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
|
||||
{
|
||||
return fifo8_peekpop_buf(fifo, max, numptr, 1);
|
||||
}
|
||||
|
||||
uint32_t
|
||||
fifo8_pop_buf(Fifo8 *fifo, uint8_t *dest, uint32_t destlen)
|
||||
{
|
||||
const uint8_t *buf;
|
||||
uint32_t n1, n2 = 0;
|
||||
uint32_t len;
|
||||
|
||||
if (destlen == 0)
|
||||
return 0;
|
||||
|
||||
len = destlen;
|
||||
buf = fifo8_pop_bufptr(fifo, len, &n1);
|
||||
if (dest)
|
||||
memcpy(dest, buf, n1);
|
||||
|
||||
/* Add FIFO wraparound if needed */
|
||||
len -= n1;
|
||||
len = MIN(len, fifo8_num_used(fifo));
|
||||
if (len) {
|
||||
buf = fifo8_pop_bufptr(fifo, len, &n2);
|
||||
if (dest) {
|
||||
memcpy(&dest[n1], buf, n2);
|
||||
}
|
||||
}
|
||||
|
||||
return n1 + n2;
|
||||
}
|
||||
|
||||
void
|
||||
fifo8_drop(Fifo8 *fifo, uint32_t len)
|
||||
{
|
||||
len -= fifo8_pop_buf(fifo, NULL, len);
|
||||
assert(len == 0);
|
||||
}
|
||||
|
||||
int
|
||||
|
||||
@@ -1635,6 +1635,8 @@ fdc_callback(void *priv)
|
||||
return;
|
||||
}
|
||||
if (fdd_get_head(real_drive(fdc, fdc->drive)) == 0) {
|
||||
fdc->sector = 1;
|
||||
fdc->head |= 1;
|
||||
fdd_set_head(real_drive(fdc, fdc->drive), 1);
|
||||
if (!fdd_is_double_sided(real_drive(fdc, fdc->drive))) {
|
||||
fdc_noidam(fdc);
|
||||
|
||||
@@ -11,10 +11,11 @@
|
||||
*
|
||||
*
|
||||
* Authors: Jasmine Iwanek, <jasmine@iwanek.co.uk>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2022 Jasmine Iwanek.
|
||||
* Copyright 2022-2024 Jasmine Iwanek.
|
||||
* Copyright 2024 Miran Grca.
|
||||
*/
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
@@ -103,10 +104,10 @@ monster_fdc_close(void *priv)
|
||||
monster_fdc_t *dev = (monster_fdc_t *) priv;
|
||||
|
||||
if (dev->nvr_path[0] != 0x00) {
|
||||
FILE *f = nvr_fopen(dev->nvr_path, "wb");
|
||||
if (f != NULL) {
|
||||
fwrite(dev->bios_rom.rom, 1, 0x2000, f);
|
||||
fclose(f);
|
||||
FILE *fp = nvr_fopen(dev->nvr_path, "wb");
|
||||
if (fp != NULL) {
|
||||
fwrite(dev->bios_rom.rom, 1, 0x2000, fp);
|
||||
fclose(fp);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -144,10 +145,10 @@ monster_fdc_init(UNUSED(const device_t *info))
|
||||
if (rom_writes_enabled) {
|
||||
mem_mapping_set_write_handler(&dev->bios_rom.mapping, rom_write, rom_writew, rom_writel);
|
||||
sprintf(dev->nvr_path, "monster_fdc_%i.nvr", device_get_instance());
|
||||
FILE *f = nvr_fopen(dev->nvr_path, "rb");
|
||||
if (f != NULL) {
|
||||
fread(dev->bios_rom.rom, 1, 0x2000, f);
|
||||
fclose(f);
|
||||
FILE *fp = nvr_fopen(dev->nvr_path, "rb");
|
||||
if (fp != NULL) {
|
||||
(void) !fread(dev->bios_rom.rom, 1, 0x2000, fp);
|
||||
fclose(fp);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -40,6 +40,7 @@
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include "x86seg.h"
|
||||
#include "x87_sf.h"
|
||||
#include "x87.h"
|
||||
#include "x87_ops_conv.h"
|
||||
#include <86box/io.h>
|
||||
|
||||
@@ -199,7 +199,7 @@ extern const device_t nec_mate_unk_device;
|
||||
extern const device_t phoenix_486_jumper_device;
|
||||
extern const device_t phoenix_486_jumper_pci_device;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
|
||||
#ifdef USE_OLIVETTI
|
||||
extern const device_t olivetti_eva_device;
|
||||
#endif
|
||||
#endif /* USE_OLIVETTI */
|
||||
#endif /*EMU_CHIPSET_H*/
|
||||
|
||||
@@ -69,28 +69,80 @@ extern uint8_t fifo8_pop(Fifo8 *fifo);
|
||||
/**
|
||||
* fifo8_pop_buf:
|
||||
* @fifo: FIFO to pop from
|
||||
* @max: maximum number of bytes to pop
|
||||
* @num: actual number of returned bytes
|
||||
* @dest: the buffer to write the data into (can be NULL)
|
||||
* @destlen: size of @dest and maximum number of bytes to pop
|
||||
*
|
||||
* Pop a number of elements from the FIFO up to a maximum of max. The buffer
|
||||
* Pop a number of elements from the FIFO up to a maximum of @destlen.
|
||||
* The popped data is copied into the @dest buffer.
|
||||
* Care is taken when the data wraps around in the ring buffer.
|
||||
*
|
||||
* Returns: number of bytes popped.
|
||||
*/
|
||||
extern uint32_t fifo8_pop_buf(Fifo8 *fifo, uint8_t *dest, uint32_t destlen);
|
||||
|
||||
/**
|
||||
* fifo8_pop_bufptr:
|
||||
* @fifo: FIFO to pop from
|
||||
* @max: maximum number of bytes to pop
|
||||
* @numptr: pointer filled with number of bytes returned (can be NULL)
|
||||
*
|
||||
* New code should prefer to use fifo8_pop_buf() instead of fifo8_pop_bufptr().
|
||||
*
|
||||
* Pop a number of elements from the FIFO up to a maximum of @max. The buffer
|
||||
* containing the popped data is returned. This buffer points directly into
|
||||
* the FIFO backing store and data is invalidated once any of the fifo8_* APIs
|
||||
* are called on the FIFO.
|
||||
* the internal FIFO backing store and data (without checking for overflow!)
|
||||
* and is invalidated once any of the fifo8_* APIs are called on the FIFO.
|
||||
*
|
||||
* The function may return fewer bytes than requested when the data wraps
|
||||
* around in the ring buffer; in this case only a contiguous part of the data
|
||||
* is returned.
|
||||
*
|
||||
* The number of valid bytes returned is populated in *num; will always return
|
||||
* at least 1 byte. max must not be 0 or greater than the number of bytes in
|
||||
* the FIFO.
|
||||
* The number of valid bytes returned is populated in *@numptr; will always
|
||||
* return at least 1 byte. max must not be 0 or greater than the number of
|
||||
* bytes in the FIFO.
|
||||
*
|
||||
* Clients are responsible for checking the availability of requested data
|
||||
* using fifo8_num_used().
|
||||
*
|
||||
* Returns: A pointer to popped data.
|
||||
*/
|
||||
extern const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num);
|
||||
extern const uint8_t *fifo8_pop_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr);
|
||||
|
||||
/**
|
||||
* fifo8_peek_bufptr: read upto max bytes from the fifo
|
||||
* @fifo: FIFO to read from
|
||||
* @max: maximum number of bytes to peek
|
||||
* @numptr: pointer filled with number of bytes returned (can be NULL)
|
||||
*
|
||||
* Peek into a number of elements from the FIFO up to a maximum of @max.
|
||||
* The buffer containing the data peeked into is returned. This buffer points
|
||||
* directly into the FIFO backing store. Since data is invalidated once any
|
||||
* of the fifo8_* APIs are called on the FIFO, it is the caller responsibility
|
||||
* to access it before doing further API calls.
|
||||
*
|
||||
* The function may return fewer bytes than requested when the data wraps
|
||||
* around in the ring buffer; in this case only a contiguous part of the data
|
||||
* is returned.
|
||||
*
|
||||
* The number of valid bytes returned is populated in *@numptr; will always
|
||||
* return at least 1 byte. max must not be 0 or greater than the number of
|
||||
* bytes in the FIFO.
|
||||
*
|
||||
* Clients are responsible for checking the availability of requested data
|
||||
* using fifo8_num_used().
|
||||
*
|
||||
* Returns: A pointer to peekable data.
|
||||
*/
|
||||
extern const uint8_t *fifo8_peek_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr);
|
||||
|
||||
/**
|
||||
* fifo8_drop:
|
||||
* @fifo: FIFO to drop bytes
|
||||
* @len: number of bytes to drop
|
||||
*
|
||||
* Drop (consume) bytes from a FIFO.
|
||||
*/
|
||||
extern void fifo8_drop(Fifo8 *fifo, uint32_t len);
|
||||
|
||||
/**
|
||||
* fifo8_reset:
|
||||
|
||||
@@ -222,9 +222,9 @@ extern const device_t keyboard_xt86_device;
|
||||
extern const device_t keyboard_xt_compaq_device;
|
||||
extern const device_t keyboard_xt_t1x00_device;
|
||||
extern const device_t keyboard_tandy_device;
|
||||
# if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
# ifdef USE_LASERXT
|
||||
extern const device_t keyboard_xt_lxt3_device;
|
||||
# endif /*defined(DEV_BRANCH) && defined(USE_LASERXT) */
|
||||
# endif /* USE_LASERXT */
|
||||
extern const device_t keyboard_xt_olivetti_device;
|
||||
extern const device_t keyboard_xt_zenith_device;
|
||||
extern const device_t keyboard_xt_hyundai_device;
|
||||
@@ -272,6 +272,7 @@ extern uint8_t keyboard_get_shift(void);
|
||||
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl);
|
||||
extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl);
|
||||
extern int keyboard_recv(uint16_t key);
|
||||
extern int keyboard_recv_ui(uint16_t key);
|
||||
extern int keyboard_isfsenter(void);
|
||||
extern int keyboard_isfsenter_up(void);
|
||||
extern int keyboard_isfsexit(void);
|
||||
|
||||
@@ -438,9 +438,9 @@ extern int machine_at_ibmxt286_init(const machine_t *);
|
||||
extern int machine_at_siemens_init(const machine_t *); // Siemens PCD-2L. N82330 discrete machine. It segfaults in some places
|
||||
|
||||
extern int machine_at_wellamerastar_init(const machine_t *); // Wells American A*Star with custom award BIOS
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
|
||||
#ifdef USE_OPEN_AT
|
||||
extern int machine_at_openat_init(const machine_t *);
|
||||
#endif
|
||||
#endif /* USE_OPEN_AT */
|
||||
|
||||
/* m_at_286_386sx.c */
|
||||
extern int machine_at_tg286m_init(const machine_t *);
|
||||
@@ -469,9 +469,9 @@ extern int machine_at_deskmaster286_init(const machine_t *);
|
||||
extern int machine_at_pc8_init(const machine_t *);
|
||||
extern int machine_at_3302_init(const machine_t *);
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
|
||||
#ifdef USE_OLIVETTI
|
||||
extern int machine_at_m290_init(const machine_t *);
|
||||
#endif
|
||||
#endif /* USE_OLIVETTI */
|
||||
|
||||
extern int machine_at_shuttle386sx_init(const machine_t *);
|
||||
extern int machine_at_adi386sx_init(const machine_t *);
|
||||
@@ -727,9 +727,9 @@ extern int machine_at_i430vx_init(const machine_t *);
|
||||
extern int machine_at_ma23c_init(const machine_t *);
|
||||
extern int machine_at_nupro592_init(const machine_t *);
|
||||
extern int machine_at_tx97_init(const machine_t *);
|
||||
#if defined(DEV_BRANCH) && defined(USE_AN430TX)
|
||||
#ifdef USE_AN430TX
|
||||
extern int machine_at_an430tx_init(const machine_t *);
|
||||
#endif
|
||||
#endif /* USE_AN430TX */
|
||||
extern int machine_at_ym430tx_init(const machine_t *);
|
||||
extern int machine_at_thunderbolt_init(const machine_t *);
|
||||
extern int machine_at_mb540n_init(const machine_t *);
|
||||
@@ -896,7 +896,7 @@ extern int machine_ps2_model_70_type4_init(const machine_t *);
|
||||
|
||||
/* m_tandy.c */
|
||||
extern int tandy1k_eeprom_read(void);
|
||||
extern int machine_tandy_init(const machine_t *);
|
||||
extern int machine_tandy1000sx_init(const machine_t *);
|
||||
extern int machine_tandy1000hx_init(const machine_t *);
|
||||
extern int machine_tandy1000sl2_init(const machine_t *);
|
||||
|
||||
@@ -947,10 +947,10 @@ extern int machine_xt_compaq_deskpro_init(const machine_t *);
|
||||
extern int machine_xt_compaq_portable_init(const machine_t *);
|
||||
|
||||
/* m_xt_laserxt.c */
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
#ifdef USE_LASERXT
|
||||
extern int machine_xt_laserxt_init(const machine_t *);
|
||||
extern int machine_xt_lxt3_init(const machine_t *);
|
||||
#endif
|
||||
#endif /* USE_LASERXT */
|
||||
|
||||
/* m_xt_philips.c */
|
||||
extern int machine_xt_p3105_init(const machine_t *);
|
||||
|
||||
@@ -104,18 +104,18 @@ extern void midi_in_sysex(uint8_t *buffer, uint32_t len);
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t rtmidi_output_device;
|
||||
extern const device_t rtmidi_input_device;
|
||||
# if defined(DEV_BRANCH) && defined(USE_OPL4ML)
|
||||
# ifdef USE_OPL4ML
|
||||
extern const device_t opl4_midi_device;
|
||||
# endif
|
||||
# endif /* USE_OPL4ML */
|
||||
# ifdef USE_FLUIDSYNTH
|
||||
extern const device_t fluidsynth_device;
|
||||
# endif
|
||||
# endif /* USE_FLUIDSYNTH */
|
||||
# ifdef USE_MUNT
|
||||
extern const device_t mt32_old_device;
|
||||
extern const device_t mt32_new_device;
|
||||
extern const device_t cm32l_device;
|
||||
extern const device_t cm32ln_device;
|
||||
# endif
|
||||
# endif /* USE_MUNT */
|
||||
#endif
|
||||
|
||||
#endif /*EMU_SOUND_MIDI_H*/
|
||||
|
||||
@@ -71,8 +71,10 @@ extern const device_t mouse_mssystems_device;
|
||||
extern const device_t mouse_msserial_device;
|
||||
extern const device_t mouse_ltserial_device;
|
||||
extern const device_t mouse_ps2_device;
|
||||
# ifdef USE_WACOM
|
||||
extern const device_t mouse_wacom_device;
|
||||
extern const device_t mouse_wacom_artpad_device;
|
||||
# endif
|
||||
extern const device_t mouse_mtouch_device;
|
||||
#endif
|
||||
|
||||
|
||||
@@ -19,6 +19,8 @@
|
||||
#ifndef EMU_PIT_H
|
||||
#define EMU_PIT_H
|
||||
|
||||
#define NUM_COUNTERS 3
|
||||
|
||||
typedef struct ctr_t {
|
||||
uint8_t m;
|
||||
uint8_t ctrl;
|
||||
@@ -68,7 +70,7 @@ typedef struct PIT {
|
||||
int clock;
|
||||
pc_timer_t callback_timer;
|
||||
|
||||
ctr_t counters[3];
|
||||
ctr_t counters[NUM_COUNTERS];
|
||||
|
||||
uint8_t ctrl;
|
||||
|
||||
|
||||
@@ -68,7 +68,7 @@ typedef struct ctrf_t {
|
||||
|
||||
typedef struct pitf_t {
|
||||
int flags;
|
||||
ctrf_t counters[3];
|
||||
ctrf_t counters[NUM_COUNTERS];
|
||||
|
||||
uint8_t ctrl;
|
||||
|
||||
|
||||
@@ -25,6 +25,7 @@
|
||||
#ifndef SCSI_PCSCSI_H
|
||||
#define SCSI_PCSCSI_H
|
||||
|
||||
extern const device_t am53c974_pci_device;
|
||||
extern const device_t dc390_pci_device;
|
||||
extern const device_t ncr53c90a_mca_device;
|
||||
|
||||
|
||||
@@ -83,9 +83,9 @@ extern const device_t prime3b_ide_device;
|
||||
extern const device_t prime3c_device;
|
||||
extern const device_t prime3c_ide_device;
|
||||
extern const device_t ps1_m2133_sio;
|
||||
#if defined(DEV_BRANCH) && defined(USE_SIO_DETECT)
|
||||
#ifdef USE_SIO_DETECT
|
||||
extern const device_t sio_detect_device;
|
||||
#endif
|
||||
#endif /* USE_SIO_DETECT */
|
||||
extern const device_t um8663af_device;
|
||||
extern const device_t um8663af_ide_device;
|
||||
extern const device_t um8663af_sec_device;
|
||||
|
||||
@@ -20,6 +20,9 @@ typedef struct sn76489_t {
|
||||
int freqhi[4];
|
||||
int vol[4];
|
||||
uint32_t shift;
|
||||
uint32_t white_noise_tap_1;
|
||||
uint32_t white_noise_tap_2;
|
||||
uint32_t feedback_mask;
|
||||
uint8_t noise;
|
||||
int lasttone;
|
||||
uint8_t firstdat;
|
||||
|
||||
@@ -87,6 +87,7 @@ typedef struct svga_t {
|
||||
int dac_b;
|
||||
int vtotal;
|
||||
int dispend;
|
||||
int vdisp;
|
||||
int vsyncstart;
|
||||
int split;
|
||||
int vblankstart;
|
||||
|
||||
@@ -330,9 +330,9 @@ extern const device_t ati28800k_device;
|
||||
extern const device_t ati28800k_spc4620p_device;
|
||||
extern const device_t ati28800k_spc6033p_device;
|
||||
extern const device_t compaq_ati28800_device;
|
||||
# if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
# ifdef USE_XL24
|
||||
extern const device_t ati28800_wonderxl24_device;
|
||||
# endif
|
||||
# endif /* USE_XL24 */
|
||||
|
||||
/* Bochs */
|
||||
extern const device_t bochs_svga_device;
|
||||
@@ -448,7 +448,7 @@ extern const device_t mystique_220_device;
|
||||
extern const device_t millennium_ii_device;
|
||||
#ifdef USE_G100
|
||||
extern const device_t productiva_g100_device;
|
||||
#endif
|
||||
#endif /* USE_G100 */
|
||||
|
||||
/* Oak OTI-0x7 */
|
||||
extern const device_t oti037c_device;
|
||||
|
||||
@@ -275,7 +275,7 @@ machine_at_wellamerastar_init(const machine_t *model)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
|
||||
#ifdef USE_OPEN_AT
|
||||
int
|
||||
machine_at_openat_init(const machine_t *model)
|
||||
{
|
||||
@@ -291,4 +291,4 @@ machine_at_openat_init(const machine_t *model)
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_OPEN_AT */
|
||||
|
||||
@@ -965,7 +965,7 @@ machine_at_pc916sx_init(const machine_t *model)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
|
||||
#ifdef USE_OLIVETTI
|
||||
int
|
||||
machine_at_m290_init(const machine_t *model)
|
||||
{
|
||||
@@ -988,4 +988,4 @@ machine_at_m290_init(const machine_t *model)
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_OLIVETTI */
|
||||
|
||||
@@ -935,7 +935,7 @@ machine_at_tx97_init(const machine_t *model)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_AN430TX)
|
||||
#ifdef USE_AN430TX
|
||||
int
|
||||
machine_at_an430tx_init(const machine_t *model)
|
||||
{
|
||||
@@ -979,7 +979,7 @@ machine_at_an430tx_init(const machine_t *model)
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_AN430TX */
|
||||
|
||||
int
|
||||
machine_at_ym430tx_init(const machine_t *model)
|
||||
|
||||
@@ -52,6 +52,7 @@ enum {
|
||||
|
||||
enum {
|
||||
TYPE_TANDY = 0,
|
||||
TYPE_TANDY1000SX,
|
||||
TYPE_TANDY1000HX,
|
||||
TYPE_TANDY1000SL2
|
||||
};
|
||||
@@ -129,6 +130,7 @@ typedef struct tandy_t {
|
||||
|
||||
uint32_t base;
|
||||
uint32_t mask;
|
||||
int is_hx;
|
||||
int is_sl2;
|
||||
|
||||
t1kvid_t *vid;
|
||||
@@ -715,13 +717,8 @@ recalc_timings(tandy_t *dev)
|
||||
double _dispofftime;
|
||||
double disptime;
|
||||
|
||||
if (vid->mode & 1) {
|
||||
disptime = vid->crtc[0] + 1;
|
||||
_dispontime = vid->crtc[1];
|
||||
} else {
|
||||
disptime = (vid->crtc[0] + 1) << 1;
|
||||
_dispontime = vid->crtc[1] << 1;
|
||||
}
|
||||
disptime = vid->crtc[0] + 1;
|
||||
_dispontime = vid->crtc[1];
|
||||
|
||||
_dispofftime = disptime - _dispontime;
|
||||
_dispontime *= CGACONST;
|
||||
@@ -984,10 +981,10 @@ vid_poll(void *priv)
|
||||
for (x = 0; x < vid->crtc[1]; x++) {
|
||||
dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1];
|
||||
vid->ma++;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = buffer32->line[vid->displine << 1][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = buffer32->line[vid->displine << 1][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = buffer32->line[vid->displine << 1][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = buffer32->line[vid->displine << 1][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = vid->array[(dat & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = buffer32->line[vid->displine << 1][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = vid->array[((dat >> 12) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = buffer32->line[vid->displine << 1][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = vid->array[((dat >> 8) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = buffer32->line[vid->displine << 1][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = vid->array[((dat >> 4) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = buffer32->line[vid->displine << 1][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = vid->array[(dat & vid->array[1] & 0x0f) + 16] + 16;
|
||||
}
|
||||
} else if (vid->array[3] & 0x10) { /*160x200x16*/
|
||||
for (x = 0; x < vid->crtc[1]; x++) {
|
||||
@@ -997,10 +994,10 @@ vid_poll(void *priv)
|
||||
dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1];
|
||||
}
|
||||
vid->ma++;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = buffer32->line[vid->displine << 1][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = buffer32->line[vid->displine << 1][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = buffer32->line[vid->displine << 1][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = buffer32->line[vid->displine << 1][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = buffer32->line[vid->displine << 1][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = buffer32->line[vid->displine << 1][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = buffer32->line[vid->displine << 1][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = buffer32->line[vid->displine << 1][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = buffer32->line[vid->displine << 1][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = buffer32->line[vid->displine << 1][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = buffer32->line[vid->displine << 1][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = buffer32->line[vid->displine << 1][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = vid->array[(dat & vid->array[1]) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = buffer32->line[vid->displine << 1][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = buffer32->line[vid->displine << 1][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = buffer32->line[vid->displine << 1][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = vid->array[((dat >> 12) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = buffer32->line[vid->displine << 1][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = buffer32->line[vid->displine << 1][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = buffer32->line[vid->displine << 1][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = vid->array[((dat >> 8) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = buffer32->line[vid->displine << 1][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = buffer32->line[vid->displine << 1][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = buffer32->line[vid->displine << 1][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = vid->array[((dat >> 4) & vid->array[1] & 0x0f) + 16] + 16;
|
||||
buffer32->line[vid->displine << 1][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = buffer32->line[vid->displine << 1][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = buffer32->line[vid->displine << 1][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = buffer32->line[vid->displine << 1][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = vid->array[(dat & vid->array[1] & 0x0f) + 16] + 16;
|
||||
}
|
||||
} else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/
|
||||
for (x = 0; x < vid->crtc[1]; x++) {
|
||||
@@ -1576,12 +1573,12 @@ tandy_write(uint16_t addr, uint8_t val, void *priv)
|
||||
|
||||
switch (addr) {
|
||||
case 0x00a0:
|
||||
if (val & 0x10) {
|
||||
if (dev->is_hx && (val & 0x10)) {
|
||||
dev->base = (mem_size - 256) * 1024;
|
||||
dev->mask = 0x3ffff;
|
||||
mem_mapping_set_addr(&ram_low_mapping, 0, dev->base);
|
||||
mem_mapping_set_addr(&dev->ram_mapping,
|
||||
((val >> 1) & 7) * 128 * 1024, 0x40000);
|
||||
(((val >> 1) & 7) - 1) * 128 * 1024, 0x40000);
|
||||
} else {
|
||||
dev->base = (mem_size - 128) * 1024;
|
||||
dev->mask = 0x1ffff;
|
||||
@@ -1589,6 +1586,22 @@ tandy_write(uint16_t addr, uint8_t val, void *priv)
|
||||
mem_mapping_set_addr(&dev->ram_mapping,
|
||||
((val >> 1) & 7) * 128 * 1024, 0x20000);
|
||||
}
|
||||
if (dev->is_hx) {
|
||||
io_removehandler(0x03d0, 16,
|
||||
vid_in, NULL, NULL, vid_out, NULL, NULL, dev);
|
||||
if (val & 0x01)
|
||||
mem_mapping_disable(&dev->vid->mapping);
|
||||
else {
|
||||
io_sethandler(0x03d0, 16,
|
||||
vid_in, NULL, NULL, vid_out, NULL, NULL, dev);
|
||||
mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000);
|
||||
}
|
||||
} else {
|
||||
if (val & 0x01)
|
||||
mem_mapping_set_addr(&dev->vid->mapping, 0xc0000, 0x10000);
|
||||
else
|
||||
mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000);
|
||||
}
|
||||
dev->ram_bank = val;
|
||||
break;
|
||||
|
||||
@@ -1718,8 +1731,7 @@ machine_tandy1k_init(const machine_t *model, int type)
|
||||
{
|
||||
tandy_t *dev;
|
||||
|
||||
dev = malloc(sizeof(tandy_t));
|
||||
memset(dev, 0x00, sizeof(tandy_t));
|
||||
dev = calloc(1, sizeof(tandy_t));
|
||||
|
||||
machine_common_init(model);
|
||||
|
||||
@@ -1745,15 +1757,17 @@ machine_tandy1k_init(const machine_t *model, int type)
|
||||
|
||||
switch (type) {
|
||||
case TYPE_TANDY:
|
||||
case TYPE_TANDY1000SX:
|
||||
keyboard_set_table(scancode_tandy);
|
||||
io_sethandler(0x00a0, 1,
|
||||
tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev);
|
||||
vid_init(dev);
|
||||
device_add_ex(&vid_device, dev);
|
||||
device_add(&sn76489_device);
|
||||
device_add((type == TYPE_TANDY1000SX) ? &ncr8496_device : &sn76489_device);
|
||||
break;
|
||||
|
||||
case TYPE_TANDY1000HX:
|
||||
dev->is_hx = 1;
|
||||
keyboard_set_table(scancode_tandy);
|
||||
io_sethandler(0x00a0, 1,
|
||||
tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev);
|
||||
@@ -1790,7 +1804,7 @@ tandy1k_eeprom_read(void)
|
||||
}
|
||||
|
||||
int
|
||||
machine_tandy_init(const machine_t *model)
|
||||
machine_tandy1000sx_init(const machine_t *model)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@@ -1800,7 +1814,7 @@ machine_tandy_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_tandy1k_init(model, TYPE_TANDY);
|
||||
machine_tandy1k_init(model, TYPE_TANDY1000SX);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1505,7 +1505,7 @@ const machine_t machines[] = {
|
||||
.internal_name = "tandy",
|
||||
.type = MACHINE_TYPE_8088,
|
||||
.chipset = MACHINE_CHIPSET_PROPRIETARY,
|
||||
.init = machine_tandy_init,
|
||||
.init = machine_tandy1000sx_init,
|
||||
.p1_handler = NULL,
|
||||
.gpio_handler = NULL,
|
||||
.available_flag = MACHINE_AVAILABLE,
|
||||
@@ -1523,7 +1523,7 @@ const machine_t machines[] = {
|
||||
.bus_flags = MACHINE_PC,
|
||||
.flags = MACHINE_VIDEO_FIXED,
|
||||
.ram = {
|
||||
.min = 128,
|
||||
.min = 384,
|
||||
.max = 640,
|
||||
.step = 128
|
||||
},
|
||||
@@ -1562,7 +1562,7 @@ const machine_t machines[] = {
|
||||
.bus_flags = MACHINE_PC,
|
||||
.flags = MACHINE_VIDEO_FIXED,
|
||||
.ram = {
|
||||
.min = 384,
|
||||
.min = 256,
|
||||
.max = 640,
|
||||
.step = 128
|
||||
},
|
||||
@@ -1656,7 +1656,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
#ifdef USE_LASERXT
|
||||
{
|
||||
.name = "[8088] VTech Laser Turbo XT",
|
||||
.internal_name = "ltxt",
|
||||
@@ -1696,7 +1696,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#endif /* defined(DEV_BRANCH) && defined(USE_LASERXT) */
|
||||
#endif /* USE_LASERXT */
|
||||
/* Has a standard PS/2 KBC (so, use IBM PS/2 Type 1). */
|
||||
{
|
||||
.name = "[8088] Xi8088",
|
||||
@@ -2521,7 +2521,7 @@ const machine_t machines[] = {
|
||||
.net_device = NULL
|
||||
},
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
#ifdef USE_LASERXT
|
||||
{
|
||||
.name = "[8086] VTech Laser XT3",
|
||||
.internal_name = "lxt3",
|
||||
@@ -2561,7 +2561,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#endif /* defined(DEV_BRANCH) && defined(USE_LASERXT) */
|
||||
#endif /* USE_LASERXT */
|
||||
|
||||
/* 286 AT machines */
|
||||
/* Has IBM AT KBC firmware. */
|
||||
@@ -3005,7 +3005,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
|
||||
#ifdef USE_OLIVETTI
|
||||
/* Has Olivetti KBC firmware. */
|
||||
{
|
||||
.name = "[ISA] Olivetti M290",
|
||||
@@ -3046,8 +3046,8 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#endif /* defined(DEV_BRANCH) && defined(USE_OLIVETTI) */
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
|
||||
#endif /* USE_OLIVETTI */
|
||||
#ifdef USE_OPEN_AT
|
||||
/* Has IBM AT KBC firmware. */
|
||||
{
|
||||
.name = "[ISA] OpenAT",
|
||||
@@ -3088,7 +3088,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#endif /* defined(DEV_BRANCH) && defined(USE_OPEN_AT) */
|
||||
#endif /* USE_OPEN_AT */
|
||||
/* Has IBM AT KBC firmware. */
|
||||
{
|
||||
.name = "[ISA] Phoenix IBM AT",
|
||||
@@ -12107,11 +12107,9 @@ const machine_t machines[] = {
|
||||
.ram = {
|
||||
.min = 8192,
|
||||
.max = 262144,
|
||||
.max = 786432,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0xff,
|
||||
.gpio = 0xffffffff,
|
||||
@@ -12286,7 +12284,7 @@ const machine_t machines[] = {
|
||||
.snd_device = &cs4236b_device,
|
||||
.net_device = &pcnet_am79c973_onboard_device
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_AN430TX)
|
||||
#ifdef USE_AN430TX
|
||||
/* This has the Phoenix MultiKey KBC firmware. */
|
||||
{
|
||||
.name = "[i430TX] Intel AN430TX",
|
||||
@@ -12327,7 +12325,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
#endif /* defined(DEV_BRANCH) && defined(USE_AN430TX) */
|
||||
#endif /* USE_AN430TX */
|
||||
/* This has the AMIKey KBC firmware, which is an updated 'F' type. */
|
||||
{
|
||||
.name = "[i430TX] Intel YM430TX",
|
||||
|
||||
@@ -396,7 +396,7 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len)
|
||||
} else {
|
||||
endbytes = (dev->page_stop - dev->curr_page) * 256;
|
||||
memcpy(startptr + sizeof(pkthdr), buf, endbytes - sizeof(pkthdr));
|
||||
startptr = &dev->mem[((dev->tx_page_start * 256) - dev->mem_start) & dev->mem_wrap];
|
||||
startptr = &dev->mem[((dev->page_start * 256) - dev->mem_start) & dev->mem_wrap];
|
||||
memcpy(startptr, buf + endbytes - sizeof(pkthdr), io_len - endbytes + 8);
|
||||
}
|
||||
dev->curr_page = nextpage;
|
||||
|
||||
@@ -22,13 +22,14 @@
|
||||
* Copyright 2011-2023 Benjamin Poirier.
|
||||
* Copyright 2023 Cacodemon345.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include <time.h>
|
||||
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include <86box/timer.h>
|
||||
#include <86box/pci.h>
|
||||
|
||||
@@ -452,7 +452,9 @@ tulip_copy_rx_bytes(TULIPState *s, struct tulip_descriptor *desc)
|
||||
static bool
|
||||
tulip_filter_address(TULIPState *s, const uint8_t *addr)
|
||||
{
|
||||
#ifdef BLOCK_BROADCAST
|
||||
static const char broadcast[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
||||
#endif
|
||||
bool ret = false;
|
||||
|
||||
for (uint8_t i = 0; i < 16 && ret == false; i++) {
|
||||
@@ -461,9 +463,15 @@ tulip_filter_address(TULIPState *s, const uint8_t *addr)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
Do not block broadcast packets - needed for connections to the guest
|
||||
to succeed when using SLiRP.
|
||||
*/
|
||||
#ifdef BLOCK_BROADCAST
|
||||
if (!memcmp(addr, broadcast, ETH_ALEN)) {
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (s->csr[6] & (CSR6_PR | CSR6_RA)) {
|
||||
/* Promiscuous mode enabled */
|
||||
@@ -488,7 +496,7 @@ tulip_receive(void *priv, uint8_t *buf, int size)
|
||||
{
|
||||
struct tulip_descriptor desc;
|
||||
TULIPState *s = (TULIPState *) priv;
|
||||
|
||||
int first = 1;
|
||||
|
||||
if (size < 14 || size > sizeof(s->rx_frame) - 4
|
||||
|| s->rx_frame_len || tulip_rx_stopped(s))
|
||||
@@ -506,7 +514,11 @@ tulip_receive(void *priv, uint8_t *buf, int size)
|
||||
if (!(desc.status & RDES0_OWN)) {
|
||||
s->csr[5] |= CSR5_RU;
|
||||
tulip_update_int(s);
|
||||
return s->rx_frame_size - s->rx_frame_len;
|
||||
if (first)
|
||||
/* Stop at the very beginning, tell the host 0 bytes have been received. */
|
||||
return 0;
|
||||
else
|
||||
return (s->rx_frame_size - s->rx_frame_len) % s->rx_frame_size;
|
||||
}
|
||||
desc.status = 0;
|
||||
|
||||
@@ -527,6 +539,7 @@ tulip_receive(void *priv, uint8_t *buf, int size)
|
||||
}
|
||||
tulip_desc_write(s, s->current_rx_desc, &desc);
|
||||
tulip_next_rx_descriptor(s, &desc);
|
||||
first = 0;
|
||||
} while (s->rx_frame_len);
|
||||
|
||||
return 1;
|
||||
|
||||
@@ -526,7 +526,7 @@ pit_timer_over(void *priv)
|
||||
|
||||
dev->clock ^= 1;
|
||||
|
||||
for (uint8_t i = 0; i < 3; i++)
|
||||
for (uint8_t i = 0; i < NUM_COUNTERS; i++)
|
||||
pit_ctr_set_clock_common(&dev->counters[i], dev->clock, dev);
|
||||
|
||||
timer_advance_u64(&dev->callback_timer, dev->pit_const >> 1ULL);
|
||||
@@ -874,7 +874,7 @@ pit_device_reset(pit_t *dev)
|
||||
{
|
||||
dev->clock = 0;
|
||||
|
||||
for (uint8_t i = 0; i < 3; i++)
|
||||
for (uint8_t i = 0; i < NUM_COUNTERS; i++)
|
||||
ctr_reset(&dev->counters[i]);
|
||||
}
|
||||
|
||||
@@ -885,7 +885,7 @@ pit_reset(pit_t *dev)
|
||||
|
||||
dev->clock = 0;
|
||||
|
||||
for (uint8_t i = 0; i < 3; i++)
|
||||
for (uint8_t i = 0; i < NUM_COUNTERS; i++)
|
||||
ctr_reset(&dev->counters[i]);
|
||||
|
||||
/* Disable speaker gate. */
|
||||
|
||||
@@ -47,22 +47,22 @@
|
||||
#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */
|
||||
#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */
|
||||
|
||||
#ifdef ENABLE_PIT_LOG
|
||||
int pit_do_log = ENABLE_PIT_LOG;
|
||||
#ifdef ENABLE_PIT_FAST_LOG
|
||||
int pit_fast_do_log = ENABLE_PIT_FAST_LOG;
|
||||
|
||||
static void
|
||||
pit_log(const char *fmt, ...)
|
||||
pit_fast_log(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
if (pit_do_log) {
|
||||
if (pit_fast_do_log) {
|
||||
va_start(ap, fmt);
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
}
|
||||
#else
|
||||
# define pit_log(fmt, ...)
|
||||
# define pit_fast_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
static void
|
||||
@@ -420,7 +420,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
|
||||
int t = (addr & 3);
|
||||
ctrf_t *ctr;
|
||||
|
||||
pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv);
|
||||
pit_fast_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv);
|
||||
|
||||
cycles -= ISA_CYCLES(8);
|
||||
|
||||
@@ -438,7 +438,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
|
||||
pitf_ctr_latch_count(&dev->counters[1]);
|
||||
if (val & 8)
|
||||
pitf_ctr_latch_count(&dev->counters[2]);
|
||||
pit_log("PIT %i: Initiated readback command\n", t);
|
||||
pit_fast_log("PIT %i: Initiated readback command\n", t);
|
||||
}
|
||||
if (!(val & 0x10)) {
|
||||
if (val & 2)
|
||||
@@ -456,7 +456,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
|
||||
if (!(dev->ctrl & 0x30)) {
|
||||
pitf_ctr_latch_count(ctr);
|
||||
dev->ctrl |= 0x30;
|
||||
pit_log("PIT %i: Initiated latched read, %i bytes latched\n",
|
||||
pit_fast_log("PIT %i: Initiated latched read, %i bytes latched\n",
|
||||
t, ctr->latched);
|
||||
} else {
|
||||
ctr->ctrl = val;
|
||||
@@ -476,7 +476,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
|
||||
pitf_ctr_set_out(ctr, 1, dev);
|
||||
ctr->disabled = 1;
|
||||
|
||||
pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out);
|
||||
pit_fast_log("PIT %i: M = %i, RM/WM = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->out);
|
||||
}
|
||||
ctr->thit = 0;
|
||||
}
|
||||
@@ -619,7 +619,7 @@ pitf_read(uint16_t addr, void *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret);
|
||||
pit_fast_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -670,7 +670,7 @@ pitf_reset(pitf_t *dev)
|
||||
{
|
||||
memset(dev, 0, sizeof(pitf_t));
|
||||
|
||||
for (uint8_t i = 0; i < 3; i++)
|
||||
for (uint8_t i = 0; i < NUM_COUNTERS; i++)
|
||||
ctr_reset(&dev->counters[i]);
|
||||
|
||||
/* Disable speaker gate. */
|
||||
@@ -683,7 +683,7 @@ pitf_set_pit_const(void *data, uint64_t pit_const)
|
||||
pitf_t *pit = (pitf_t *) data;
|
||||
ctrf_t *ctr;
|
||||
|
||||
for (uint8_t i = 0; i < 3; i++) {
|
||||
for (uint8_t i = 0; i < NUM_COUNTERS; i++) {
|
||||
ctr = &pit->counters[i];
|
||||
ctr->pit_const = pit_const;
|
||||
}
|
||||
@@ -728,7 +728,7 @@ pitf_init(const device_t *info)
|
||||
dev->flags = info->local;
|
||||
|
||||
if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) {
|
||||
for (int i = 0; i < 3; i++) {
|
||||
for (int i = 0; i < NUM_COUNTERS; i++) {
|
||||
ctrf_t *ctr = &dev->counters[i];
|
||||
ctr->priv = dev;
|
||||
timer_add(&ctr->timer, pitf_timer_over, (void *) ctr, 0);
|
||||
|
||||
@@ -190,6 +190,10 @@ if(RTMIDI)
|
||||
target_compile_definitions(ui PRIVATE USE_RTMIDI)
|
||||
endif()
|
||||
|
||||
if(WACOM)
|
||||
target_compile_definitions(ui PRIVATE USE_WACOM)
|
||||
endif()
|
||||
|
||||
if(WIN32)
|
||||
enable_language(RC)
|
||||
target_sources(86Box PUBLIC 86Box-qt.rc)
|
||||
|
||||
@@ -998,7 +998,7 @@ MainWindow::processKeyboardInput(bool down, uint32_t keycode)
|
||||
case 0x10b: /* Microsoft scroll up normal */
|
||||
case 0x180 ... 0x1ff: /* E0 break codes (including Microsoft scroll down normal) */
|
||||
/* This key uses a break code as make. Send it manually, only on press. */
|
||||
if (down) {
|
||||
if (down && (mouse_capture || !kbd_req_capture || video_fullscreen)) {
|
||||
if (keycode & 0x100)
|
||||
keyboard_send(0xe0);
|
||||
keyboard_send(keycode & 0xff);
|
||||
@@ -1011,7 +1011,7 @@ MainWindow::processKeyboardInput(bool down, uint32_t keycode)
|
||||
break;
|
||||
|
||||
case 0x137: /* Print Screen */
|
||||
if (keyboard_recv(0x38) || keyboard_recv(0x138)) { /* Alt+ */
|
||||
if (keyboard_recv_ui(0x38) || keyboard_recv_ui(0x138)) { /* Alt+ */
|
||||
keycode = 0x54;
|
||||
} else if (down) {
|
||||
keyboard_input(down, 0x12a);
|
||||
@@ -1022,7 +1022,7 @@ MainWindow::processKeyboardInput(bool down, uint32_t keycode)
|
||||
break;
|
||||
|
||||
case 0x145: /* Pause */
|
||||
if (keyboard_recv(0x1d) || keyboard_recv(0x11d)) { /* Ctrl+ */
|
||||
if (keyboard_recv_ui(0x1d) || keyboard_recv_ui(0x11d)) { /* Ctrl+ */
|
||||
keycode = 0x146;
|
||||
} else {
|
||||
keyboard_input(down, 0xe11d);
|
||||
@@ -1196,6 +1196,8 @@ MainWindow::on_actionFullscreen_triggered()
|
||||
ui->stackedWidget->setFixedSize(QWIDGETSIZE_MAX, QWIDGETSIZE_MAX);
|
||||
showFullScreen();
|
||||
}
|
||||
fs_on_signal = false;
|
||||
fs_off_signal = false;
|
||||
ui->stackedWidget->onResize(width(), height());
|
||||
}
|
||||
|
||||
@@ -1218,7 +1220,7 @@ MainWindow::getTitle(wchar_t *title)
|
||||
bool
|
||||
MainWindow::eventFilter(QObject *receiver, QEvent *event)
|
||||
{
|
||||
if (!dopause && (mouse_capture || !kbd_req_capture)) {
|
||||
if (!dopause) {
|
||||
if (event->type() == QEvent::Shortcut) {
|
||||
auto shortcutEvent = (QShortcutEvent *) event;
|
||||
if (shortcutEvent->key() == ui->actionExit->shortcut()) {
|
||||
@@ -1299,7 +1301,7 @@ MainWindow::showMessage_(int flags, const QString &header, const QString &messag
|
||||
void
|
||||
MainWindow::keyPressEvent(QKeyEvent *event)
|
||||
{
|
||||
if (send_keyboard_input && !(kbd_req_capture && !mouse_capture)) {
|
||||
if (send_keyboard_input) {
|
||||
#ifdef Q_OS_MACOS
|
||||
processMacKeyboardInput(true, event);
|
||||
#else
|
||||
@@ -1312,10 +1314,10 @@ MainWindow::keyPressEvent(QKeyEvent *event)
|
||||
if (keyboard_ismsexit())
|
||||
plat_mouse_capture(0);
|
||||
|
||||
if ((video_fullscreen > 0) && (keyboard_recv(0x1D) || keyboard_recv(0x11D))) {
|
||||
if (keyboard_recv(0x57))
|
||||
if ((video_fullscreen > 0) && (keyboard_recv_ui(0x1D) || keyboard_recv_ui(0x11D))) {
|
||||
if (keyboard_recv_ui(0x57))
|
||||
ui->actionTake_screenshot->trigger();
|
||||
else if (keyboard_recv(0x58))
|
||||
else if (keyboard_recv_ui(0x58))
|
||||
pc_send_cad();
|
||||
}
|
||||
|
||||
@@ -1338,7 +1340,7 @@ void
|
||||
MainWindow::keyReleaseEvent(QKeyEvent *event)
|
||||
{
|
||||
if (event->key() == Qt::Key_Pause) {
|
||||
if (keyboard_recv(0x38) && keyboard_recv(0x138)) {
|
||||
if (keyboard_recv_ui(0x38) && keyboard_recv_ui(0x138)) {
|
||||
plat_pause(dopause ^ 1);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -373,6 +373,9 @@
|
||||
<property name="text">
|
||||
<string>&Fullscreen</string>
|
||||
</property>
|
||||
<property name="shortcut">
|
||||
<string>Ctrl+Alt+PgUp</string>
|
||||
</property>
|
||||
</action>
|
||||
<action name="actionSoftware_Renderer">
|
||||
<property name="checkable">
|
||||
|
||||
@@ -176,9 +176,6 @@ WindowsRawInputFilter::keyboard_handle(PRAWINPUT raw)
|
||||
RAWKEYBOARD rawKB = raw->data.keyboard;
|
||||
scancode = rawKB.MakeCode;
|
||||
|
||||
if (kbd_req_capture && !mouse_capture)
|
||||
return;
|
||||
|
||||
/* If it's not a scan code that starts with 0xE1 */
|
||||
if ((rawKB.Flags & RI_KEY_E1)) {
|
||||
if (rawKB.MakeCode == 0x1D) {
|
||||
|
||||
179
src/qt/win_thread.c
Normal file
179
src/qt/win_thread.c
Normal file
@@ -0,0 +1,179 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Implement threads and mutexes for the Win32 platform.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2017-2018 Fred N. van Kempen.
|
||||
*/
|
||||
#define UNICODE
|
||||
#define BITMAP WINDOWS_BITMAP
|
||||
#include <windows.h>
|
||||
#include <windowsx.h>
|
||||
#include <process.h>
|
||||
#undef BITMAP
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <wchar.h>
|
||||
#include <86box/86box.h>
|
||||
#include <86box/plat.h>
|
||||
#include <86box/thread.h>
|
||||
|
||||
typedef struct {
|
||||
HANDLE handle;
|
||||
} win_event_t;
|
||||
|
||||
/* For compatibility with thread.h, but Win32 does not allow named threads. */
|
||||
thread_t *
|
||||
thread_create_named(void (*func)(void *param), void *param, UNUSED(const char *name))
|
||||
{
|
||||
uintptr_t bt = _beginthread(func, 0, param);
|
||||
return ((thread_t *) bt);
|
||||
}
|
||||
|
||||
int
|
||||
thread_test_mutex(thread_t *arg)
|
||||
{
|
||||
if (arg == NULL)
|
||||
return (0);
|
||||
|
||||
return (WaitForSingleObject(arg, 0) == WAIT_OBJECT_0) ? 1 : 0;
|
||||
}
|
||||
|
||||
int
|
||||
thread_wait(thread_t *arg)
|
||||
{
|
||||
if (arg == NULL)
|
||||
return (0);
|
||||
|
||||
if (WaitForSingleObject(arg, INFINITE))
|
||||
return (1);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
event_t *
|
||||
thread_create_event(void)
|
||||
{
|
||||
win_event_t *ev = malloc(sizeof(win_event_t));
|
||||
|
||||
ev->handle = CreateEvent(NULL, FALSE, FALSE, NULL);
|
||||
|
||||
return ((event_t *) ev);
|
||||
}
|
||||
|
||||
void
|
||||
thread_set_event(event_t *arg)
|
||||
{
|
||||
win_event_t *ev = (win_event_t *) arg;
|
||||
|
||||
if (arg == NULL)
|
||||
return;
|
||||
|
||||
SetEvent(ev->handle);
|
||||
}
|
||||
|
||||
void
|
||||
thread_reset_event(event_t *arg)
|
||||
{
|
||||
win_event_t *ev = (win_event_t *) arg;
|
||||
|
||||
if (arg == NULL)
|
||||
return;
|
||||
|
||||
ResetEvent(ev->handle);
|
||||
}
|
||||
|
||||
int
|
||||
thread_wait_event(event_t *arg, int timeout)
|
||||
{
|
||||
win_event_t *ev = (win_event_t *) arg;
|
||||
|
||||
if (arg == NULL)
|
||||
return (0);
|
||||
|
||||
if (ev->handle == NULL)
|
||||
return (0);
|
||||
|
||||
if (timeout == -1)
|
||||
timeout = INFINITE;
|
||||
|
||||
if (WaitForSingleObject(ev->handle, timeout))
|
||||
return (1);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
thread_destroy_event(event_t *arg)
|
||||
{
|
||||
win_event_t *ev = (win_event_t *) arg;
|
||||
|
||||
if (arg == NULL)
|
||||
return;
|
||||
|
||||
CloseHandle(ev->handle);
|
||||
|
||||
free(ev);
|
||||
}
|
||||
|
||||
mutex_t *
|
||||
thread_create_mutex(void)
|
||||
{
|
||||
mutex_t *mutex = malloc(sizeof(CRITICAL_SECTION));
|
||||
|
||||
InitializeCriticalSection(mutex);
|
||||
|
||||
return mutex;
|
||||
}
|
||||
|
||||
int
|
||||
thread_wait_mutex(mutex_t *mutex)
|
||||
{
|
||||
if (mutex == NULL)
|
||||
return (0);
|
||||
|
||||
LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex;
|
||||
|
||||
EnterCriticalSection(critsec);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int
|
||||
thread_release_mutex(mutex_t *mutex)
|
||||
{
|
||||
if (mutex == NULL)
|
||||
return (0);
|
||||
|
||||
LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex;
|
||||
|
||||
LeaveCriticalSection(critsec);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void
|
||||
thread_close_mutex(mutex_t *mutex)
|
||||
{
|
||||
if (mutex == NULL)
|
||||
return;
|
||||
|
||||
LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex;
|
||||
|
||||
DeleteCriticalSection(critsec);
|
||||
|
||||
free(critsec);
|
||||
}
|
||||
@@ -82,6 +82,7 @@ static SCSI_CARD scsi_cards[] = {
|
||||
{ &ncr53c825a_pci_device, },
|
||||
{ &ncr53c860_pci_device, },
|
||||
{ &ncr53c875_pci_device, },
|
||||
{ &am53c974_pci_device, },
|
||||
{ &dc390_pci_device, },
|
||||
{ &buslogic_445s_device, },
|
||||
{ &buslogic_445c_device, },
|
||||
|
||||
@@ -1724,9 +1724,6 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt
|
||||
that condition. */
|
||||
dev->unit_attention = 0;
|
||||
}
|
||||
|
||||
/* Clear the sense stuff as per the spec. */
|
||||
scsi_cdrom_sense_clear(dev, GPCMD_REQUEST_SENSE);
|
||||
}
|
||||
|
||||
void
|
||||
@@ -1841,6 +1838,10 @@ scsi_cdrom_command(scsi_common_t *sc, uint8_t *cdb)
|
||||
return;
|
||||
|
||||
begin:
|
||||
if (cdb[0] != GPCMD_REQUEST_SENSE) {
|
||||
/* Clear the sense stuff as per the spec. */
|
||||
scsi_cdrom_sense_clear(dev, cdb[0]);
|
||||
}
|
||||
switch (cdb[0]) {
|
||||
case GPCMD_TEST_UNIT_READY:
|
||||
scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS);
|
||||
@@ -3231,9 +3232,6 @@ begin:
|
||||
if (dev->drv->bus_type == CDROM_BUS_SCSI) {
|
||||
dev->buffer[3] = 0x02;
|
||||
switch (dev->drv->type) {
|
||||
case CDROM_TYPE_86BOX_100:
|
||||
dev->buffer[2] = 0x05; /*SCSI-2 compliant*/
|
||||
break;
|
||||
case CDROM_TYPE_CHINON_CDS431_H42:
|
||||
case CDROM_TYPE_DEC_RRD45_0436:
|
||||
case CDROM_TYPE_MATSHITA_501_10b:
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -76,19 +76,19 @@ static const MIDI_OUT_DEVICE devices[] = {
|
||||
{ &device_none },
|
||||
#ifdef USE_FLUIDSYNTH
|
||||
{ &fluidsynth_device },
|
||||
#endif
|
||||
#endif /* USE_FLUIDSYNTH */
|
||||
#ifdef USE_MUNT
|
||||
{ &mt32_old_device },
|
||||
{ &mt32_new_device },
|
||||
{ &cm32l_device },
|
||||
{ &cm32ln_device },
|
||||
#endif
|
||||
#endif /*USE_MUNT */
|
||||
#ifdef USE_RTMIDI
|
||||
{ &rtmidi_output_device },
|
||||
#endif
|
||||
#if defined(DEV_BRANCH) && defined(USE_OPL4ML)
|
||||
#endif /* USE_RTMIDI */
|
||||
#ifdef USE_OPL4ML
|
||||
{ &opl4_midi_device },
|
||||
#endif
|
||||
#endif /* USE_OPL4ML */
|
||||
{ NULL }
|
||||
// clang-format on
|
||||
};
|
||||
@@ -98,7 +98,7 @@ static const MIDI_IN_DEVICE midi_in_devices[] = {
|
||||
{ &device_none },
|
||||
#ifdef USE_RTMIDI
|
||||
{ &rtmidi_input_device },
|
||||
#endif
|
||||
#endif /* USE_RTMIDI */
|
||||
{ NULL }
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
@@ -752,7 +752,7 @@ cs423x_init(const device_t *info)
|
||||
|
||||
FILE *fp = rom_fopen(PNP_ROM_CS4236B, "rb");
|
||||
if (fp) {
|
||||
fread(&(dev->eeprom_data[23]), 1, 8201, fp);
|
||||
(void) !fread(&(dev->eeprom_data[23]), 1, 8201, fp);
|
||||
fclose(fp);
|
||||
}
|
||||
|
||||
|
||||
@@ -16,9 +16,9 @@
|
||||
#include <86box/pic.h>
|
||||
#include <86box/sound.h>
|
||||
#include <86box/timer.h>
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
# include <86box/snd_ad1848.h>
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
#include <86box/plat_fallthrough.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
@@ -144,11 +144,11 @@ typedef struct gus_t {
|
||||
|
||||
uint8_t usrr;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
uint8_t max_ctrl;
|
||||
|
||||
ad1848_t ad1848;
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
} gus_t;
|
||||
|
||||
static int gus_gf1_irqs[8] = { -1, 2, 5, 3, 7, 11, 12, 15 };
|
||||
@@ -256,9 +256,9 @@ writegus(uint16_t addr, uint8_t val, void *priv)
|
||||
int d;
|
||||
int old;
|
||||
uint16_t port;
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
uint16_t csioport;
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
|
||||
if ((addr == 0x388) || (addr == 0x389))
|
||||
port = addr;
|
||||
@@ -606,10 +606,10 @@ writegus(uint16_t addr, uint8_t val, void *priv)
|
||||
gus->irq_midi = gus->irq;
|
||||
} else
|
||||
gus->irq_midi = gus_midi_irqs[(val >> 3) & 7];
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX)
|
||||
ad1848_setirq(&gus->ad1848, gus->irq);
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
|
||||
gus->sb_nmi = val & 0x80;
|
||||
} else {
|
||||
@@ -622,10 +622,10 @@ writegus(uint16_t addr, uint8_t val, void *priv)
|
||||
gus->dma2 = gus->dma;
|
||||
} else
|
||||
gus->dma2 = gus_dmas[(val >> 3) & 7];
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX)
|
||||
ad1848_setdma(&gus->ad1848, gus->dma2);
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
@@ -683,7 +683,7 @@ writegus(uint16_t addr, uint8_t val, void *priv)
|
||||
break;
|
||||
case 0x306:
|
||||
case 0x706:
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX) {
|
||||
if (gus->dma >= 4)
|
||||
val |= 0x10;
|
||||
@@ -703,7 +703,7 @@ writegus(uint16_t addr, uint8_t val, void *priv)
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -755,11 +755,11 @@ readgus(uint16_t addr, void *priv)
|
||||
return val;
|
||||
|
||||
case 0x20F:
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX)
|
||||
val = 0x02;
|
||||
else
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
val = 0x00;
|
||||
break;
|
||||
|
||||
@@ -878,11 +878,11 @@ readgus(uint16_t addr, void *priv)
|
||||
break;
|
||||
case 0x306:
|
||||
case 0x706:
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX)
|
||||
val = 0x0a; /* GUS MAX */
|
||||
else
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
val = 0xff; /*Pre 3.7 - no mixer*/
|
||||
break;
|
||||
|
||||
@@ -939,7 +939,7 @@ readgus(uint16_t addr, void *priv)
|
||||
gus->ad_status &= ~0x01;
|
||||
#ifdef OLD_NMI_BEHAVIOR
|
||||
nmi = 0;
|
||||
#endif
|
||||
#endif /* OLD_NMI_BEHAVIOR */
|
||||
fallthrough;
|
||||
case 0x389:
|
||||
val = gus->ad_data;
|
||||
@@ -1182,24 +1182,24 @@ gus_get_buffer(int32_t *buffer, int len, void *priv)
|
||||
{
|
||||
gus_t *gus = (gus_t *) priv;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if ((gus->type == GUS_MAX) && (gus->max_ctrl))
|
||||
ad1848_update(&gus->ad1848);
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
gus_update(gus);
|
||||
|
||||
for (int c = 0; c < len * 2; c++) {
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if ((gus->type == GUS_MAX) && (gus->max_ctrl))
|
||||
buffer[c] += (int32_t) (gus->ad1848.buffer[c] / 2);
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
buffer[c] += (int32_t) gus->buffer[c & 1][c >> 1];
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if ((gus->type == GUS_MAX) && (gus->max_ctrl))
|
||||
gus->ad1848.pos = 0;
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
gus->pos = 0;
|
||||
}
|
||||
|
||||
@@ -1332,9 +1332,9 @@ gus_reset(void *priv)
|
||||
|
||||
gus->usrr = 0;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
gus->max_ctrl = 0;
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
|
||||
gus->irq_state = 0;
|
||||
gus->midi_irq_state = 0;
|
||||
@@ -1383,7 +1383,7 @@ gus_init(UNUSED(const device_t *info))
|
||||
io_sethandler(0x0506 + gus->base, 0x0001, readgus, NULL, NULL, writegus, NULL, NULL, gus);
|
||||
io_sethandler(0x0388, 0x0002, readgus, NULL, NULL, writegus, NULL, NULL, gus);
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if (gus->type == GUS_MAX) {
|
||||
ad1848_init(&gus->ad1848, AD1848_TYPE_CS4231);
|
||||
ad1848_setirq(&gus->ad1848, 5);
|
||||
@@ -1391,7 +1391,7 @@ gus_init(UNUSED(const device_t *info))
|
||||
io_sethandler(0x10C + gus->base, 4,
|
||||
ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &gus->ad1848);
|
||||
}
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
|
||||
timer_add(&gus->samp_timer, gus_poll_wave, gus, 1);
|
||||
timer_add(&gus->timer_1, gus_poll_timer_1, gus, 1);
|
||||
@@ -1424,10 +1424,10 @@ gus_speed_changed(void *priv)
|
||||
else
|
||||
gus->samp_latch = (uint64_t) (TIMER_USEC * (1000000.0 / gusfreqs[gus->voices - 14]));
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
if ((gus->type == GUS_MAX) && (gus->max_ctrl))
|
||||
ad1848_speed_changed(&gus->ad1848);
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
}
|
||||
|
||||
static const device_config_t gus_config[] = {
|
||||
@@ -1445,12 +1445,12 @@ static const device_config_t gus_config[] = {
|
||||
.description = "Classic",
|
||||
.value = GUS_CLASSIC
|
||||
},
|
||||
#if defined(DEV_BRANCH) && defined(USE_GUSMAX)
|
||||
#ifdef USE_GUSMAX
|
||||
{
|
||||
.description = "MAX",
|
||||
.value = GUS_MAX
|
||||
},
|
||||
#endif
|
||||
#endif /*USE_GUSMAX */
|
||||
{ NULL }
|
||||
},
|
||||
},
|
||||
|
||||
@@ -342,11 +342,15 @@ MPU401_Reset(mpu_t *mpu)
|
||||
static uint8_t
|
||||
MPU401_ReadStatus(mpu_t *mpu)
|
||||
{
|
||||
uint8_t ret = 0x3f;
|
||||
uint8_t ret = 0x00;
|
||||
|
||||
if (mpu->state.cmd_pending)
|
||||
ret |= STATUS_OUTPUT_NOT_READY;
|
||||
ret = STATUS_OUTPUT_NOT_READY;
|
||||
if (!mpu->queue_used)
|
||||
ret |= STATUS_INPUT_NOT_READY;
|
||||
ret = STATUS_INPUT_NOT_READY;
|
||||
|
||||
ret |= 0x3f;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -378,15 +382,6 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val)
|
||||
if ((val != 0xff) && (mpu->mode == M_UART))
|
||||
return;
|
||||
|
||||
if (mpu->state.reset) {
|
||||
if (mpu->state.cmd_pending || (val != 0xff)) {
|
||||
mpu->state.cmd_pending = val + 1;
|
||||
return;
|
||||
}
|
||||
timer_disable(&mpu->mpu401_reset_callback);
|
||||
mpu->state.reset = 0;
|
||||
}
|
||||
|
||||
/* In Intelligent mode, UART-only variants of the MPU-401 only support commands 0x3F and 0xFF. */
|
||||
if (!mpu->intelligent && (val != 0x3f) && (val != 0xff))
|
||||
return;
|
||||
|
||||
@@ -3190,7 +3190,8 @@ sb_16_init(UNUSED(const device_t *info))
|
||||
if (mpu_addr) {
|
||||
sb->mpu = (mpu_t *) malloc(sizeof(mpu_t));
|
||||
memset(sb->mpu, 0, sizeof(mpu_t));
|
||||
mpu401_init(sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq"), M_UART, device_get_config_int("receive_input401"));
|
||||
mpu401_init(sb->mpu, device_get_config_hex16("base401"), 0, M_UART,
|
||||
device_get_config_int("receive_input401"));
|
||||
} else
|
||||
sb->mpu = NULL;
|
||||
sb_dsp_set_mpu(&sb->dsp, sb->mpu);
|
||||
@@ -3534,7 +3535,8 @@ sb_awe32_init(UNUSED(const device_t *info))
|
||||
if (mpu_addr) {
|
||||
sb->mpu = (mpu_t *) malloc(sizeof(mpu_t));
|
||||
memset(sb->mpu, 0, sizeof(mpu_t));
|
||||
mpu401_init(sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq"), M_UART, device_get_config_int("receive_input401"));
|
||||
mpu401_init(sb->mpu, device_get_config_hex16("base401"), 0, M_UART,
|
||||
device_get_config_int("receive_input401"));
|
||||
} else
|
||||
sb->mpu = NULL;
|
||||
sb_dsp_set_mpu(&sb->dsp, sb->mpu);
|
||||
@@ -4051,7 +4053,7 @@ static const device_config_t sb_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4161,7 +4163,7 @@ static const device_config_t sb15_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4290,7 +4292,7 @@ static const device_config_t sb2_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4356,7 +4358,7 @@ static const device_config_t sb_mcv_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4446,7 +4448,7 @@ static const device_config_t sb_pro_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4457,7 +4459,7 @@ static const device_config_t sb_pro_config[] = {
|
||||
static const device_config_t sb_pro_mcv_config[] = {
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4610,7 +4612,7 @@ static const device_config_t sb_16_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4635,7 +4637,7 @@ static const device_config_t sb_16_pnp_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4692,7 +4694,7 @@ static const device_config_t sb_32_pnp_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4912,7 +4914,7 @@ static const device_config_t sb_awe32_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -4969,7 +4971,7 @@ static const device_config_t sb_awe32_pnp_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5046,7 +5048,7 @@ static const device_config_t sb_awe64_value_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5119,7 +5121,7 @@ static const device_config_t sb_awe64_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5184,7 +5186,7 @@ static const device_config_t sb_awe64_gold_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5314,7 +5316,7 @@ static const device_config_t ess_688_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5445,7 +5447,7 @@ static const device_config_t ess_1688_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5464,7 +5466,7 @@ static const device_config_t ess_1688_config[] = {
|
||||
static const device_config_t ess_688_pnp_config[] = {
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
@@ -5483,7 +5485,7 @@ static const device_config_t ess_1688_pnp_config[] = {
|
||||
},
|
||||
{
|
||||
.name = "receive_input",
|
||||
.description = "Receive input (SB MIDI)",
|
||||
.description = "Receive input (DSP MIDI)",
|
||||
.type = CONFIG_BINARY,
|
||||
.default_string = "",
|
||||
.default_int = 1
|
||||
|
||||
@@ -21,7 +21,15 @@ static float volslog[16] = {
|
||||
7.51785f, 9.46440f, 11.9194f, 15.0000f
|
||||
};
|
||||
|
||||
void
|
||||
static int
|
||||
sn76489_check_tap_2(sn76489_t *sn76489)
|
||||
{
|
||||
int ret = ((sn76489->shift >> sn76489->white_noise_tap_2) & 1);
|
||||
|
||||
return (sn76489->type == SN76496) ? ret : !ret;
|
||||
}
|
||||
|
||||
static void
|
||||
sn76489_update(sn76489_t *sn76489)
|
||||
{
|
||||
for (; sn76489->pos < sound_pos_global; sn76489->pos++) {
|
||||
@@ -42,24 +50,28 @@ sn76489_update(sn76489_t *sn76489)
|
||||
result += (((sn76489->shift & 1) ^ 1) * 127 * volslog[sn76489->vol[0]] * 2);
|
||||
|
||||
sn76489->count[0] -= (512 * sn76489->psgconst);
|
||||
while (sn76489->count[0] < 0 && sn76489->latch[0]) {
|
||||
while ((sn76489->count[0] < 0) && sn76489->latch[0]) {
|
||||
sn76489->count[0] += (sn76489->latch[0] * 4);
|
||||
if (!(sn76489->noise & 4)) {
|
||||
if (sn76489->shift & 1)
|
||||
sn76489->shift |= 0x8000;
|
||||
sn76489->shift >>= 1;
|
||||
if ((sn76489->shift >> sn76489->white_noise_tap_1) & 1) {
|
||||
sn76489->shift >>= 1;
|
||||
sn76489->shift |= sn76489->feedback_mask;
|
||||
} else
|
||||
sn76489->shift >>= 1;
|
||||
} else {
|
||||
if ((sn76489->shift & 1) ^ ((sn76489->shift >> 1) & 1))
|
||||
sn76489->shift |= 0x8000;
|
||||
sn76489->shift >>= 1;
|
||||
if (((sn76489->shift >> sn76489->white_noise_tap_1) & 1) ^ sn76489_check_tap_2(sn76489)) {
|
||||
sn76489->shift >>= 1;
|
||||
sn76489->shift |= sn76489->feedback_mask;
|
||||
} else
|
||||
sn76489->shift >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
sn76489->buffer[sn76489->pos] = result;
|
||||
sn76489->buffer[sn76489->pos] = (sn76489->type == NCR8496) ? -result : result;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
sn76489_get_buffer(int32_t *buffer, int len, void *priv)
|
||||
{
|
||||
sn76489_t *sn76489 = (sn76489_t *) priv;
|
||||
@@ -74,7 +86,7 @@ sn76489_get_buffer(int32_t *buffer, int len, void *priv)
|
||||
sn76489->pos = 0;
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
sn76489_write(UNUSED(uint16_t addr), uint8_t data, void *priv)
|
||||
{
|
||||
sn76489_t *sn76489 = (sn76489_t *) priv;
|
||||
@@ -125,15 +137,13 @@ sn76489_write(UNUSED(uint16_t addr), uint8_t data, void *priv)
|
||||
sn76489->vol[1] = 0xf - data;
|
||||
break;
|
||||
case 0x60:
|
||||
if ((data & 4) != (sn76489->noise & 4) || sn76489->type == SN76496)
|
||||
sn76489->shift = 0x4000;
|
||||
if (((data & 4) != (sn76489->noise & 4)) || (sn76489->type == SN76496))
|
||||
sn76489->shift = sn76489->feedback_mask;
|
||||
sn76489->noise = data & 0xf;
|
||||
if ((data & 3) == 3)
|
||||
sn76489->latch[0] = sn76489->latch[1];
|
||||
else
|
||||
sn76489->latch[0] = 0x400 << (data & 3);
|
||||
if (!sn76489->extra_divide)
|
||||
sn76489->latch[0] &= 0x3ff;
|
||||
if (!sn76489->latch[0])
|
||||
sn76489->latch[0] = (sn76489->extra_divide ? 2048 : 1024) << 6;
|
||||
break;
|
||||
@@ -146,22 +156,24 @@ sn76489_write(UNUSED(uint16_t addr), uint8_t data, void *priv)
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
/* NCR8496 ignores writes to registers 1, 3, 5, 6 and 7 with bit 7 clear. */
|
||||
if ((sn76489->type != SN76496) && ((sn76489->firstdat & 0x10) || ((sn76489->firstdat & 0x70) == 0x60)))
|
||||
return;
|
||||
|
||||
if ((sn76489->firstdat & 0x70) == 0x60 && (sn76489->type == SN76496)) {
|
||||
if ((data & 4) != (sn76489->noise & 4) || sn76489->type == SN76496)
|
||||
sn76489->shift = 0x4000;
|
||||
if (sn76489->type == SN76496)
|
||||
sn76489->shift = sn76489->feedback_mask;
|
||||
sn76489->noise = data & 0xf;
|
||||
if ((data & 3) == 3)
|
||||
sn76489->latch[0] = sn76489->latch[1];
|
||||
else
|
||||
sn76489->latch[0] = 0x400 << (data & 3);
|
||||
if (!sn76489->latch[0])
|
||||
sn76489->latch[0] = 1024 << 6;
|
||||
sn76489->latch[0] = (sn76489->extra_divide ? 2048 : 1024) << 6;
|
||||
} else if ((sn76489->firstdat & 0x70) != 0x60) {
|
||||
if (sn76489->extra_divide)
|
||||
sn76489->freqhi[sn76489->lasttone] = data & 0x7F;
|
||||
else
|
||||
sn76489->freqhi[sn76489->lasttone] = data & 0x3F;
|
||||
freq = sn76489->freqlo[sn76489->lasttone] | (sn76489->freqhi[sn76489->lasttone] << 4);
|
||||
sn76489->freqhi[sn76489->lasttone] = data & 0x7F;
|
||||
freq = sn76489->freqlo[sn76489->lasttone] |
|
||||
(sn76489->freqhi[sn76489->lasttone] << 4);
|
||||
if (!sn76489->extra_divide)
|
||||
freq &= 0x3ff;
|
||||
if (!freq)
|
||||
@@ -190,6 +202,16 @@ sn76489_init(sn76489_t *sn76489, uint16_t base, uint16_t size, int type, int fre
|
||||
{
|
||||
sound_add_handler(sn76489_get_buffer, sn76489);
|
||||
|
||||
if (type == SN76496) {
|
||||
sn76489->white_noise_tap_1 = 0;
|
||||
sn76489->white_noise_tap_2 = 1;
|
||||
sn76489->feedback_mask = 0x4000;
|
||||
} else {
|
||||
sn76489->white_noise_tap_1 = 1;
|
||||
sn76489->white_noise_tap_2 = 5;
|
||||
sn76489->feedback_mask = 0x8000;
|
||||
}
|
||||
|
||||
sn76489->latch[0] = sn76489->latch[1] = sn76489->latch[2] = sn76489->latch[3] = 0x3FF << 6;
|
||||
sn76489->vol[0] = 0;
|
||||
sn76489->vol[1] = sn76489->vol[2] = sn76489->vol[3] = 8;
|
||||
@@ -200,7 +222,7 @@ sn76489_init(sn76489_t *sn76489, uint16_t base, uint16_t size, int type, int fre
|
||||
sn76489->count[2] = (rand() & 0x3FF) << 6;
|
||||
sn76489->count[3] = (rand() & 0x3FF) << 6;
|
||||
sn76489->noise = 3;
|
||||
sn76489->shift = 0x4000;
|
||||
sn76489->shift = sn76489->feedback_mask;
|
||||
sn76489->type = type;
|
||||
sn76489->psgconst = (((double) freq / 64.0) / (double) FREQ_48000);
|
||||
|
||||
|
||||
@@ -205,7 +205,7 @@ plat_cdrom_read_sector(uint8_t *buffer, int raw, uint32_t sector)
|
||||
/* Cooked */
|
||||
}
|
||||
plat_cdrom_close();
|
||||
dummy_cdrom_ioctl_log("ReadSector status=%d, sector=%d, size=%" PRId64 ".\n", status, sector, (long long) size);
|
||||
dummy_cdrom_ioctl_log("ReadSector sector=%d.\n", sector);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -37,9 +37,9 @@
|
||||
#include <86box/vid_svga_render.h>
|
||||
|
||||
#define VGAWONDERXL 1
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
# define VGAWONDERXL24 2
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
#define BIOS_ATIKOR_PATH "roms/video/ati28800/atikorvga.bin"
|
||||
#define BIOS_ATIKOR_4620P_PATH_L "roms/machines/spc4620p/31005h.u8"
|
||||
@@ -52,10 +52,10 @@
|
||||
#define BIOS_VGAXL_EVEN_PATH "roms/video/ati28800/xleven.bin"
|
||||
#define BIOS_VGAXL_ODD_PATH "roms/video/ati28800/xlodd.bin"
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
# define BIOS_XL24_EVEN_PATH "roms/video/ati28800/112-14318-102.bin"
|
||||
# define BIOS_XL24_ODD_PATH "roms/video/ati28800/112-14319-102.bin"
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
#define BIOS_ROM_PATH "roms/video/ati28800/bios.bin"
|
||||
#define BIOS_VGAXL_ROM_PATH "roms/video/ati28800/ATI_VGAWonder_XL.bin"
|
||||
@@ -609,7 +609,7 @@ ati28800_init(const device_t *info)
|
||||
ati28800->svga.ramdac = device_add(&sc11486_ramdac_device);
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
case VGAWONDERXL24:
|
||||
ati28800->id = 6;
|
||||
rom_init_interleaved(&ati28800->bios_rom,
|
||||
@@ -618,7 +618,7 @@ ati28800_init(const device_t *info)
|
||||
0xc0000, 0x10000, 0xffff,
|
||||
0, MEM_MAPPING_EXTERNAL);
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
default:
|
||||
ati28800->id = 5;
|
||||
@@ -653,11 +653,11 @@ ati28800_init(const device_t *info)
|
||||
ati_eeprom_load(&ati28800->eeprom, "ati28800xl.nvr", 0);
|
||||
break;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
case VGAWONDERXL24:
|
||||
ati_eeprom_load(&ati28800->eeprom, "ati28800xl24.nvr", 0);
|
||||
break;
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
default:
|
||||
ati_eeprom_load(&ati28800->eeprom, "ati28800.nvr", 0);
|
||||
@@ -685,13 +685,13 @@ compaq_ati28800_available(void)
|
||||
return (rom_present(BIOS_VGAXL_ROM_PATH));
|
||||
}
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
static int
|
||||
ati28800_wonderxl24_available(void)
|
||||
{
|
||||
return (rom_present(BIOS_XL24_EVEN_PATH) && rom_present(BIOS_XL24_ODD_PATH));
|
||||
}
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
static void
|
||||
ati28800_close(void *priv)
|
||||
@@ -749,7 +749,7 @@ static const device_config_t ati28800_config[] = {
|
||||
}
|
||||
};
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
static const device_config_t ati28800_wonderxl_config[] = {
|
||||
{
|
||||
.name = "memory",
|
||||
@@ -778,7 +778,7 @@ static const device_config_t ati28800_wonderxl_config[] = {
|
||||
.type = CONFIG_END
|
||||
}
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
// clang-format on
|
||||
|
||||
const device_t ati28800_device = {
|
||||
@@ -851,7 +851,7 @@ const device_t compaq_ati28800_device = {
|
||||
.config = ati28800_config
|
||||
};
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
const device_t ati28800_wonderxl24_device = {
|
||||
.name = "ATI-28800 (VGA Wonder XL24)",
|
||||
.internal_name = "ati28800w",
|
||||
@@ -865,4 +865,4 @@ const device_t ati28800_wonderxl24_device = {
|
||||
.force_redraw = ati28800_force_redraw,
|
||||
.config = ati28800_wonderxl_config
|
||||
};
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
|
||||
@@ -54,11 +54,18 @@ enum {
|
||||
EGA_TSENG
|
||||
};
|
||||
|
||||
enum {
|
||||
EGA_TYPE_IBM = 0,
|
||||
EGA_TYPE_OTHER = 1,
|
||||
EGA_TYPE_COMPAQ = 2
|
||||
};
|
||||
|
||||
static video_timings_t timing_ega = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 };
|
||||
static uint8_t ega_rotate[8][256];
|
||||
static int active = 0;
|
||||
static uint32_t pallook16[256];
|
||||
static uint32_t pallook64[256];
|
||||
static int ega_type = 0;
|
||||
static int ega_type = EGA_TYPE_IBM;
|
||||
static int old_overscan_color = 0;
|
||||
|
||||
/* 3C2 controls default mode on EGA. On VGA, it determines monitor type (mono or colour):
|
||||
@@ -149,6 +156,25 @@ ega_out(uint16_t addr, uint8_t val, void *priv)
|
||||
if (!(val & 1))
|
||||
io_sethandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega);
|
||||
ega_recalctimings(ega);
|
||||
if ((ega_type == EGA_TYPE_COMPAQ) && !(val & 0x02))
|
||||
mem_mapping_disable(&ega->mapping);
|
||||
else switch (ega->gdcreg[6] & 0xc) {
|
||||
case 0x0: /*128k at A0000*/
|
||||
mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x20000);
|
||||
break;
|
||||
case 0x4: /*64k at A0000*/
|
||||
mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x10000);
|
||||
break;
|
||||
case 0x8: /*32k at B0000*/
|
||||
mem_mapping_set_addr(&ega->mapping, 0xb0000, 0x08000);
|
||||
break;
|
||||
case 0xC: /*32k at B8000*/
|
||||
mem_mapping_set_addr(&ega->mapping, 0xb8000, 0x08000);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x3c4:
|
||||
ega->seqaddr = val;
|
||||
@@ -180,7 +206,7 @@ ega_out(uint16_t addr, uint8_t val, void *priv)
|
||||
}
|
||||
break;
|
||||
case 0x3c6:
|
||||
if (ega_type == 2)
|
||||
if (ega_type == EGA_TYPE_COMPAQ)
|
||||
ega->ctl_mode = val;
|
||||
break;
|
||||
case 0x3ce:
|
||||
@@ -201,7 +227,9 @@ ega_out(uint16_t addr, uint8_t val, void *priv)
|
||||
ega->chain2_read = val & 0x10;
|
||||
break;
|
||||
case 6:
|
||||
switch (val & 0xc) {
|
||||
if ((ega_type == EGA_TYPE_COMPAQ) && !(ega->miscout & 0x02))
|
||||
mem_mapping_disable(&ega->mapping);
|
||||
else switch (val & 0xc) {
|
||||
case 0x0: /*128k at A0000*/
|
||||
mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x20000);
|
||||
break;
|
||||
@@ -295,47 +323,47 @@ ega_in(uint16_t addr, void *priv)
|
||||
break;
|
||||
|
||||
case 0x3c0:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->attraddr | ega->attr_palette_enable;
|
||||
break;
|
||||
case 0x3c1:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->attrregs[ega->attraddr];
|
||||
break;
|
||||
case 0x3c2:
|
||||
ret = (egaswitches & (8 >> egaswitchread)) ? 0x10 : 0x00;
|
||||
break;
|
||||
case 0x3c4:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->seqaddr;
|
||||
break;
|
||||
case 0x3c5:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->seqregs[ega->seqaddr & 0xf];
|
||||
break;
|
||||
case 0x3c6:
|
||||
if (ega_type == 2)
|
||||
if (ega_type == EGA_TYPE_COMPAQ)
|
||||
ret = ega->ctl_mode;
|
||||
break;
|
||||
case 0x3c8:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = 2;
|
||||
break;
|
||||
case 0x3cc:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->miscout;
|
||||
break;
|
||||
case 0x3ce:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->gdcaddr;
|
||||
break;
|
||||
case 0x3cf:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->gdcreg[ega->gdcaddr & 0xf];
|
||||
break;
|
||||
case 0x3d0:
|
||||
case 0x3d4:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->crtcreg;
|
||||
break;
|
||||
case 0x3d1:
|
||||
@@ -349,28 +377,28 @@ ega_in(uint16_t addr, void *priv)
|
||||
break;
|
||||
|
||||
case 0x10:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->crtc[ega->crtcreg];
|
||||
else
|
||||
ret = ega->light_pen >> 8;
|
||||
break;
|
||||
|
||||
case 0x11:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->crtc[ega->crtcreg];
|
||||
else
|
||||
ret = ega->light_pen & 0xff;
|
||||
break;
|
||||
|
||||
default:
|
||||
if (ega_type == 1)
|
||||
if (ega_type == EGA_TYPE_OTHER)
|
||||
ret = ega->crtc[ega->crtcreg];
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x3da:
|
||||
ega->attrff = 0;
|
||||
if (ega_type == 2) {
|
||||
if (ega_type == EGA_TYPE_COMPAQ) {
|
||||
ret = ega->stat & 0xcf;
|
||||
switch ((ega->attrregs[0x12] >> 4) & 0x03) {
|
||||
case 0x00:
|
||||
@@ -466,7 +494,7 @@ ega_recalctimings(ega_t *ega)
|
||||
ega->linedbl = ega->crtc[9] & 0x80;
|
||||
ega->rowcount = ega->crtc[9] & 0x1f;
|
||||
|
||||
if (ega_type == 2) {
|
||||
if (ega_type == EGA_TYPE_COMPAQ) {
|
||||
color = (ega->miscout & 1);
|
||||
clksel = ((ega->miscout & 0xc) >> 2);
|
||||
|
||||
@@ -587,9 +615,16 @@ ega_recalctimings(ega_t *ega)
|
||||
if (ega->dispofftime < TIMER_USEC)
|
||||
ega->dispofftime = TIMER_USEC;
|
||||
|
||||
ega->dot_time = (uint64_t) (ega->dot_clock);
|
||||
if (ega->dot_time < TIMER_USEC)
|
||||
ega->dot_time = TIMER_USEC;
|
||||
if (ega_type == EGA_TYPE_COMPAQ) {
|
||||
ega->dot_time = (uint64_t) (ega->dot_clock);
|
||||
if (ega->dot_time < TIMER_USEC)
|
||||
ega->dot_time = TIMER_USEC;
|
||||
timer_disable(&ega->dot_timer);
|
||||
timer_set_delay_u64(&ega->dot_timer, ega->dot_time);
|
||||
ega->cca = 0;
|
||||
active = 1;
|
||||
ega->dot = 0;
|
||||
}
|
||||
|
||||
ega_recalc_remap_func(ega);
|
||||
}
|
||||
@@ -616,14 +651,13 @@ ega_dot_poll(void *priv)
|
||||
uint32_t addr;
|
||||
int drawcursor;
|
||||
uint32_t charaddr;
|
||||
static int fg;
|
||||
static int bg;
|
||||
static uint32_t dat;
|
||||
static int fg = 0;
|
||||
static int bg = 0;
|
||||
static uint32_t dat = 0x00000000;
|
||||
static int cclock = 0;
|
||||
static int disptime;
|
||||
static int _dispontime;
|
||||
static int _dispofftime;
|
||||
static int cclock = 0;
|
||||
static int active = 0;
|
||||
|
||||
if (ega->seqregs[1] & 8) {
|
||||
disptime = ((ega->crtc[0] + 2) << 1);
|
||||
@@ -1278,6 +1312,10 @@ ega_read(uint32_t addr, void *priv)
|
||||
temp4 &= (ega->colournocare & 8) ? 0xff : 0;
|
||||
return ~(temp | temp2 | temp3 | temp4);
|
||||
}
|
||||
|
||||
if ((ega_type == EGA_TYPE_COMPAQ) && (ega->gdcreg[4] & 0x04))
|
||||
return 0xff;
|
||||
|
||||
return ega->vram[addr | readplane];
|
||||
}
|
||||
|
||||
@@ -1392,7 +1430,7 @@ ega_init(ega_t *ega, int monitor_type, int is_mono)
|
||||
ega->crtc[6] = 255;
|
||||
|
||||
timer_add(&ega->timer, ega_poll, ega, 1);
|
||||
if (ega_type == 2)
|
||||
if (ega_type == EGA_TYPE_COMPAQ)
|
||||
timer_add(&ega->dot_timer, ega_dot_poll, ega, 1);
|
||||
}
|
||||
|
||||
@@ -1412,11 +1450,11 @@ ega_standalone_init(const device_t *info)
|
||||
ega->y_add = 14;
|
||||
|
||||
if ((info->local == EGA_IBM) || (info->local == EGA_ISKRA) || (info->local == EGA_TSENG))
|
||||
ega_type = 0;
|
||||
ega_type = EGA_TYPE_IBM;
|
||||
else if (info->local == EGA_COMPAQ)
|
||||
ega_type = 2;
|
||||
ega_type = EGA_TYPE_COMPAQ;
|
||||
else
|
||||
ega_type = 1;
|
||||
ega_type = EGA_TYPE_OTHER;
|
||||
|
||||
ega->actual_type = info->local;
|
||||
ega->chipset = 0;
|
||||
@@ -1466,6 +1504,8 @@ ega_standalone_init(const device_t *info)
|
||||
ega->vrammask = ega->vram_limit - 1;
|
||||
|
||||
mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, ega);
|
||||
if (ega_type == EGA_TYPE_COMPAQ)
|
||||
mem_mapping_disable(&ega->mapping);
|
||||
io_sethandler(0x03c0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega);
|
||||
|
||||
if (ega->chipset) {
|
||||
|
||||
@@ -201,7 +201,8 @@ ega_render_graphics(ega_t *ega)
|
||||
const bool crtcreset = ((ega->crtc[0x17] & 0x80) == 0);
|
||||
const bool seq9dot = ((ega->seqregs[1] & 1) == 0);
|
||||
const bool seqoddeven = ((ega->seqregs[1] & 4) != 0);
|
||||
const uint8_t blinkmask = (attrblink && blinked ? 0x8 : 0x0);
|
||||
const uint8_t blinkmask = (attrblink ? 0x8 : 0x0);
|
||||
const uint8_t blinkval = (attrblink && blinked ? 0x8 : 0x0);
|
||||
uint32_t *p = &buffer32->line[ega->displine + ega->y_add][ega->x_add];
|
||||
const int dwshift = doublewidth ? 1 : 0;
|
||||
const int dotwidth = 1 << dwshift;
|
||||
@@ -254,8 +255,14 @@ ega_render_graphics(ega_t *ega)
|
||||
uint8_t dat = (edatlookup[(edat[0] >> inshift) & 3][(edat[1] >> inshift) & 3])
|
||||
| (edatlookup[(edat[2] >> inshift) & 3][(edat[3] >> inshift) & 3] << 2);
|
||||
// FIXME: Confirm blink behaviour is actually XOR on real hardware
|
||||
uint32_t p0 = ega->pallook[ega->egapal[((dat >> 4) & ega->plane_mask) ^ blinkmask]];
|
||||
uint32_t p1 = ega->pallook[ega->egapal[(dat & ega->plane_mask) ^ blinkmask]];
|
||||
uint32_t c0 = (dat >> 4) & 0xF;
|
||||
uint32_t c1 = dat & 0xF;
|
||||
c0 = ((c0 & ega->plane_mask & ~blinkmask) |
|
||||
((c0 | ~ega->plane_mask) & blinkmask & blinkval)) ^ blinkmask;
|
||||
c1 = ((c1 & ega->plane_mask & ~blinkmask) |
|
||||
((c1 | ~ega->plane_mask) & blinkmask & blinkval)) ^ blinkmask;
|
||||
uint32_t p0 = ega->pallook[ega->egapal[c0]];
|
||||
uint32_t p1 = ega->pallook[ega->egapal[c1]];
|
||||
for (int subx = 0; subx < dotwidth; subx++)
|
||||
p[outoffs + subx] = p0;
|
||||
for (int subx = 0; subx < dotwidth; subx++)
|
||||
|
||||
@@ -3233,6 +3233,8 @@ s3_recalctimings(svga_t *svga)
|
||||
svga->hdisp = svga->hdisp_old;
|
||||
svga->ma_latch |= (s3->ma_ext << 16);
|
||||
|
||||
svga->lowres = (!!(svga->attrregs[0x10] & 0x40) && !(svga->crtc[0x3a] & 0x10));
|
||||
|
||||
if (s3->chip >= S3_86C928) {
|
||||
if (svga->crtc[0x5d] & 0x01)
|
||||
svga->htotal |= 0x100;
|
||||
@@ -3246,8 +3248,8 @@ s3_recalctimings(svga_t *svga)
|
||||
svga->dispend |= 0x400;
|
||||
if (svga->crtc[0x5e] & 0x04)
|
||||
svga->vblankstart |= 0x400;
|
||||
else
|
||||
svga->vblankstart = svga->dispend;
|
||||
else if ((svga->crtc[0x3a] & 0x10) && !svga->lowres)
|
||||
svga->vblankstart = svga->dispend; /*Applies only to Enhanced modes*/
|
||||
if (svga->crtc[0x5e] & 0x10)
|
||||
svga->vsyncstart |= 0x400;
|
||||
if (svga->crtc[0x5e] & 0x40)
|
||||
@@ -3294,8 +3296,6 @@ s3_recalctimings(svga_t *svga)
|
||||
break;
|
||||
}
|
||||
|
||||
svga->lowres = (!!(svga->attrregs[0x10] & 0x40) && !(svga->crtc[0x3a] & 0x10));
|
||||
|
||||
if (s3->chip != S3_86C801)
|
||||
mask |= 0x01;
|
||||
switch (svga->crtc[0x50] & mask) {
|
||||
@@ -3965,6 +3965,17 @@ s3_recalctimings(svga_t *svga)
|
||||
svga->dots_per_clock = (svga->dots_per_clock << 1) / 3;
|
||||
break;
|
||||
|
||||
case S3_VISION968:
|
||||
switch (s3->card_type) {
|
||||
case S3_MIROVIDEO40SV_ERGO_968:
|
||||
svga->hdisp = (svga->hdisp / 3) << 2;
|
||||
svga->dots_per_clock = (svga->hdisp / 3) << 2;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case S3_TRIO64:
|
||||
case S3_TRIO32:
|
||||
svga->hdisp /= 3;
|
||||
@@ -4140,6 +4151,9 @@ s3_recalctimings(svga_t *svga)
|
||||
if (svga->crtc[0x31] & 0x08) {
|
||||
svga->vram_display_mask = s3->vram_mask;
|
||||
if (svga->bpp == 8) {
|
||||
if (!(svga->crtc[0x5e] & 0x04))
|
||||
svga->vblankstart = svga->dispend; /*Applies only to Enhanced modes*/
|
||||
|
||||
/*Enhanced 4bpp mode, just like the 8bpp mode per the spec. */
|
||||
svga->render = svga_render_8bpp_highres;
|
||||
svga->rowoffset <<= 1;
|
||||
@@ -9916,8 +9930,14 @@ s3_init(const device_t *info)
|
||||
s3->width = 1024;
|
||||
|
||||
svga->ramdac = device_add(&sc11483_ramdac_device);
|
||||
svga->clock_gen = device_add(&av9194_device);
|
||||
svga->getclock = av9194_getclock;
|
||||
if (s3->card_type == S3_ORCHID_86C911) {
|
||||
svga->clock_gen = device_add(&av9194_device);
|
||||
svga->getclock = av9194_getclock;
|
||||
} else {
|
||||
/* DCS2824-0 = Diamond ICD2061A-compatible. */
|
||||
svga->clock_gen = device_add(&icd2061_device);
|
||||
svga->getclock = icd2061_getclock;
|
||||
}
|
||||
break;
|
||||
|
||||
case S3_AMI_86C924:
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -687,7 +687,7 @@ svga_recalctimings(svga_t *svga)
|
||||
} else if ((svga->gdcreg[5] & 0x60) == 0x20) {
|
||||
if (svga->seqregs[1] & 8) { /*Low res (320)*/
|
||||
svga->render = svga_render_2bpp_lowres;
|
||||
pclog("2 bpp low res\n");
|
||||
svga_log("2 bpp low res\n");
|
||||
} else
|
||||
svga->render = svga_render_2bpp_highres;
|
||||
} else {
|
||||
@@ -859,8 +859,10 @@ svga_recalctimings(svga_t *svga)
|
||||
svga->y_add = (svga->monitor->mon_overscan_y >> 1);
|
||||
svga->x_add = (svga->monitor->mon_overscan_x >> 1);
|
||||
|
||||
if (svga->vblankstart < svga->dispend)
|
||||
if (svga->vblankstart < svga->dispend) {
|
||||
svga_log("DISPEND > VBLANKSTART.\n");
|
||||
svga->dispend = svga->vblankstart;
|
||||
}
|
||||
|
||||
crtcconst = svga->clock * svga->char_width;
|
||||
if (ibm8514_active && (svga->dev8514 != NULL)) {
|
||||
@@ -1222,9 +1224,11 @@ svga_poll(void *priv)
|
||||
if (!svga->override) {
|
||||
if (svga->vertical_linedbl) {
|
||||
wy = (svga->lastline - svga->firstline) << 1;
|
||||
svga->vdisp = wy + 1;
|
||||
svga_doblit(wx, wy, svga);
|
||||
} else {
|
||||
wy = svga->lastline - svga->firstline;
|
||||
svga->vdisp = wy + 1;
|
||||
svga_doblit(wx, wy, svga);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -178,14 +178,14 @@ svga_render_text_40(svga_t *svga)
|
||||
charaddr = svga->charseta + (chr * 128);
|
||||
|
||||
if (drawcursor) {
|
||||
bg = svga->pallook[svga->egapal[attr & 15]];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
bg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
} else {
|
||||
fg = svga->pallook[svga->egapal[attr & 15]];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
fg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
|
||||
if (attr & 0x80 && svga->attrregs[0x10] & 8) {
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7]];
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7] & svga->dac_mask];
|
||||
if (svga->blink & 16)
|
||||
fg = bg;
|
||||
}
|
||||
@@ -256,13 +256,13 @@ svga_render_text_80(svga_t *svga)
|
||||
charaddr = svga->charseta + (chr * 128);
|
||||
|
||||
if (drawcursor) {
|
||||
bg = svga->pallook[svga->egapal[attr & 15]];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
bg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
} else {
|
||||
fg = svga->pallook[svga->egapal[attr & 15]];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
fg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
if (attr & 0x80 && svga->attrregs[0x10] & 8) {
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7]];
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7] & svga->dac_mask];
|
||||
if (svga->blink & 16)
|
||||
fg = bg;
|
||||
}
|
||||
@@ -323,13 +323,13 @@ svga_render_text_80_ksc5601(svga_t *svga)
|
||||
attr = svga->vram[addr + 1];
|
||||
|
||||
if (drawcursor) {
|
||||
bg = svga->pallook[svga->egapal[attr & 15]];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
bg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
} else {
|
||||
fg = svga->pallook[svga->egapal[attr & 15]];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
fg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
if (attr & 0x80 && svga->attrregs[0x10] & 8) {
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7]];
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7] & svga->dac_mask];
|
||||
if (svga->blink & 16)
|
||||
fg = bg;
|
||||
}
|
||||
@@ -378,13 +378,13 @@ svga_render_text_80_ksc5601(svga_t *svga)
|
||||
attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask];
|
||||
|
||||
if (drawcursor) {
|
||||
bg = svga->pallook[svga->egapal[attr & 15]];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
bg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
fg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
} else {
|
||||
fg = svga->pallook[svga->egapal[attr & 15]];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4]];
|
||||
fg = svga->pallook[svga->egapal[attr & 15] & svga->dac_mask];
|
||||
bg = svga->pallook[svga->egapal[attr >> 4] & svga->dac_mask];
|
||||
if (attr & 0x80 && svga->attrregs[0x10] & 8) {
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7]];
|
||||
bg = svga->pallook[svga->egapal[(attr >> 4) & 7] & svga->dac_mask];
|
||||
if (svga->blink & 16)
|
||||
fg = bg;
|
||||
}
|
||||
@@ -468,14 +468,14 @@ svga_render_2bpp_s3_lowres(svga_t *svga)
|
||||
else
|
||||
svga->ma += 4;
|
||||
svga->ma &= svga->vram_mask;
|
||||
p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]];
|
||||
p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]];
|
||||
p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]];
|
||||
p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]];
|
||||
p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]];
|
||||
p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]];
|
||||
p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]];
|
||||
p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]];
|
||||
p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3] & svga->dac_mask];
|
||||
p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3] & svga->dac_mask];
|
||||
p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3] & svga->dac_mask];
|
||||
p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3] & svga->dac_mask];
|
||||
p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3] & svga->dac_mask];
|
||||
p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3] & svga->dac_mask];
|
||||
p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3] & svga->dac_mask];
|
||||
p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3] & svga->dac_mask];
|
||||
p += 16;
|
||||
}
|
||||
}
|
||||
@@ -501,14 +501,14 @@ svga_render_2bpp_s3_lowres(svga_t *svga)
|
||||
|
||||
svga->ma &= svga->vram_mask;
|
||||
|
||||
p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]];
|
||||
p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]];
|
||||
p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]];
|
||||
p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]];
|
||||
p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]];
|
||||
p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]];
|
||||
p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]];
|
||||
p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]];
|
||||
p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3] & svga->dac_mask];
|
||||
p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3] & svga->dac_mask];
|
||||
p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3] & svga->dac_mask];
|
||||
p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3] & svga->dac_mask];
|
||||
p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3] & svga->dac_mask];
|
||||
p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3] & svga->dac_mask];
|
||||
p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3] & svga->dac_mask];
|
||||
p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3] & svga->dac_mask];
|
||||
|
||||
p += 16;
|
||||
}
|
||||
@@ -566,14 +566,14 @@ svga_render_2bpp_s3_highres(svga_t *svga)
|
||||
else
|
||||
svga->ma += 4;
|
||||
svga->ma &= svga->vram_mask;
|
||||
p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]];
|
||||
p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]];
|
||||
p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]];
|
||||
p[3] = svga->pallook[svga->egapal[dat[0] & 3]];
|
||||
p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]];
|
||||
p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]];
|
||||
p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]];
|
||||
p[7] = svga->pallook[svga->egapal[dat[1] & 3]];
|
||||
p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3] & svga->dac_mask];
|
||||
p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3] & svga->dac_mask];
|
||||
p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3] & svga->dac_mask];
|
||||
p[3] = svga->pallook[svga->egapal[dat[0] & 3] & svga->dac_mask];
|
||||
p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3] & svga->dac_mask];
|
||||
p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3] & svga->dac_mask];
|
||||
p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3] & svga->dac_mask];
|
||||
p[7] = svga->pallook[svga->egapal[dat[1] & 3] & svga->dac_mask];
|
||||
p += 8;
|
||||
}
|
||||
}
|
||||
@@ -599,14 +599,14 @@ svga_render_2bpp_s3_highres(svga_t *svga)
|
||||
|
||||
svga->ma &= svga->vram_mask;
|
||||
|
||||
p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]];
|
||||
p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]];
|
||||
p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]];
|
||||
p[3] = svga->pallook[svga->egapal[dat[0] & 3]];
|
||||
p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]];
|
||||
p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]];
|
||||
p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]];
|
||||
p[7] = svga->pallook[svga->egapal[dat[1] & 3]];
|
||||
p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3] & svga->dac_mask];
|
||||
p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3] & svga->dac_mask];
|
||||
p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3] & svga->dac_mask];
|
||||
p[3] = svga->pallook[svga->egapal[dat[0] & 3] & svga->dac_mask];
|
||||
p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3] & svga->dac_mask];
|
||||
p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3] & svga->dac_mask];
|
||||
p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3] & svga->dac_mask];
|
||||
p[7] = svga->pallook[svga->egapal[dat[1] & 3] & svga->dac_mask];
|
||||
|
||||
p += 8;
|
||||
}
|
||||
@@ -652,17 +652,17 @@ svga_render_2bpp_headland_highres(svga_t *svga)
|
||||
svga->ma &= svga->vram_mask;
|
||||
|
||||
dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2);
|
||||
p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
|
||||
p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
|
||||
p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask] & svga->dac_mask];
|
||||
p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask] & svga->dac_mask];
|
||||
dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2);
|
||||
p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
|
||||
p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
|
||||
p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask] & svga->dac_mask];
|
||||
p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask] & svga->dac_mask];
|
||||
dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2);
|
||||
p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
|
||||
p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
|
||||
p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask] & svga->dac_mask];
|
||||
p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask] & svga->dac_mask];
|
||||
dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2);
|
||||
p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
|
||||
p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
|
||||
p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask] & svga->dac_mask];
|
||||
p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask] & svga->dac_mask];
|
||||
|
||||
p += 8;
|
||||
}
|
||||
@@ -868,8 +868,8 @@ svga_render_indexed_gfx(svga_t *svga, bool highres, bool combine8bits)
|
||||
}
|
||||
} else if (combine8bits) {
|
||||
if (svga->packed_4bpp) {
|
||||
uint32_t p0 = svga->map8[c0];
|
||||
uint32_t p1 = svga->map8[c1];
|
||||
uint32_t p0 = svga->map8[c0 & svga->dac_mask];
|
||||
uint32_t p1 = svga->map8[c1 & svga->dac_mask];
|
||||
const int outoffs = i << dwshift;
|
||||
for (int subx = 0; subx < dotwidth; subx++)
|
||||
p[outoffs + subx] = p0;
|
||||
@@ -877,14 +877,14 @@ svga_render_indexed_gfx(svga_t *svga, bool highres, bool combine8bits)
|
||||
p[outoffs + subx + dotwidth] = p1;
|
||||
} else {
|
||||
uint32_t ccombined = (c0 << 4) | c1;
|
||||
uint32_t p0 = svga->map8[ccombined];
|
||||
uint32_t p0 = svga->map8[ccombined & svga->dac_mask];
|
||||
const int outoffs = (i >> 1) << dwshift;
|
||||
for (int subx = 0; subx < dotwidth; subx++)
|
||||
p[outoffs + subx] = p0;
|
||||
}
|
||||
} else {
|
||||
uint32_t p0 = svga->pallook[svga->egapal[c0]];
|
||||
uint32_t p1 = svga->pallook[svga->egapal[c1]];
|
||||
uint32_t p0 = svga->pallook[svga->egapal[c0] & svga->dac_mask];
|
||||
uint32_t p1 = svga->pallook[svga->egapal[c1] & svga->dac_mask];
|
||||
const int outoffs = i << dwshift;
|
||||
for (int subx = 0; subx < dotwidth; subx++)
|
||||
p[outoffs + subx] = p0;
|
||||
@@ -934,16 +934,16 @@ svga_render_8bpp_clone_highres(svga_t *svga)
|
||||
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) {
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]);
|
||||
p[4] = svga->map8[dat & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[4] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 8;
|
||||
p += 8;
|
||||
@@ -963,16 +963,16 @@ svga_render_8bpp_clone_highres(svga_t *svga)
|
||||
if (!svga->remap_required) {
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) {
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]);
|
||||
p[4] = svga->map8[dat & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[4] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 8;
|
||||
p += 8;
|
||||
@@ -981,10 +981,10 @@ svga_render_8bpp_clone_highres(svga_t *svga)
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 4) {
|
||||
addr = svga->remap_func(svga, svga->ma);
|
||||
dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 4;
|
||||
p += 4;
|
||||
@@ -1043,10 +1043,10 @@ svga_render_8bpp_lowres(svga_t *svga)
|
||||
if (!svga->remap_required) {
|
||||
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) {
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
p[0] = p[1] = svga->map8[dat & 0xff];
|
||||
p[2] = p[3] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[4] = p[5] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[6] = p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = p[1] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[2] = p[3] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[4] = p[5] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[6] = p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 4;
|
||||
p += 8;
|
||||
@@ -1055,10 +1055,10 @@ svga_render_8bpp_lowres(svga_t *svga)
|
||||
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) {
|
||||
addr = svga->remap_func(svga, svga->ma);
|
||||
dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]);
|
||||
p[0] = p[1] = svga->map8[dat & 0xff];
|
||||
p[2] = p[3] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[4] = p[5] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[6] = p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = p[1] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[2] = p[3] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[4] = p[5] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[6] = p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 4;
|
||||
p += 8;
|
||||
@@ -1091,16 +1091,16 @@ svga_render_8bpp_highres(svga_t *svga)
|
||||
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) {
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]);
|
||||
p[4] = svga->map8[dat & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[4] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 8;
|
||||
p += 8;
|
||||
@@ -1120,16 +1120,16 @@ svga_render_8bpp_highres(svga_t *svga)
|
||||
if (!svga->remap_required) {
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) {
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]);
|
||||
p[4] = svga->map8[dat & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[4] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[5] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[6] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[7] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 8;
|
||||
p += 8;
|
||||
@@ -1138,10 +1138,10 @@ svga_render_8bpp_highres(svga_t *svga)
|
||||
for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 4) {
|
||||
addr = svga->remap_func(svga, svga->ma);
|
||||
dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
p[1] = svga->map8[(dat >> 8) & svga->dac_mask & 0xff];
|
||||
p[2] = svga->map8[(dat >> 16) & svga->dac_mask & 0xff];
|
||||
p[3] = svga->map8[(dat >> 24) & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 4;
|
||||
p += 4;
|
||||
@@ -1173,19 +1173,19 @@ svga_render_8bpp_tseng_lowres(svga_t *svga)
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[0] = p[1] = svga->map8[dat & 0xff];
|
||||
p[0] = p[1] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[2] = p[3] = svga->map8[dat & 0xff];
|
||||
p[2] = p[3] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[4] = p[5] = svga->map8[dat & 0xff];
|
||||
p[4] = p[5] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[6] = p[7] = svga->map8[dat & 0xff];
|
||||
p[6] = p[7] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 4;
|
||||
p += 8;
|
||||
@@ -1214,36 +1214,36 @@ svga_render_8bpp_tseng_highres(svga_t *svga)
|
||||
dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]);
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[0] = svga->map8[dat & 0xff];
|
||||
p[0] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[1] = svga->map8[dat & 0xff];
|
||||
p[1] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[2] = svga->map8[dat & 0xff];
|
||||
p[2] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[3] = svga->map8[dat & 0xff];
|
||||
p[3] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
|
||||
dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]);
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[4] = svga->map8[dat & 0xff];
|
||||
p[4] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[5] = svga->map8[dat & 0xff];
|
||||
p[5] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[6] = svga->map8[dat & 0xff];
|
||||
p[6] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
dat >>= 8;
|
||||
if (svga->attrregs[0x10] & 0x80)
|
||||
dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4);
|
||||
p[7] = svga->map8[dat & 0xff];
|
||||
p[7] = svga->map8[dat & svga->dac_mask & 0xff];
|
||||
|
||||
svga->ma += 8;
|
||||
p += 8;
|
||||
|
||||
@@ -60,9 +60,9 @@ video_cards[] = {
|
||||
{ &ati18800_vga88_device },
|
||||
{ &ati28800_device },
|
||||
{ &compaq_ati28800_device },
|
||||
#if defined(DEV_BRANCH) && defined(USE_XL24)
|
||||
#ifdef USE_XL24
|
||||
{ &ati28800_wonderxl24_device },
|
||||
#endif
|
||||
#endif /* USE_XL24 */
|
||||
{ &ati18800_device },
|
||||
{ &ati18800_wonder_device },
|
||||
{ &cga_device },
|
||||
@@ -236,7 +236,7 @@ video_cards[] = {
|
||||
{ &s3_trio3d2x_agp_device },
|
||||
#ifdef USE_G100
|
||||
{ &productiva_g100_device, VIDEO_FLAG_TYPE_SPECIAL },
|
||||
#endif
|
||||
#endif /*USE_G100 */
|
||||
{ &velocity_100_agp_device },
|
||||
{ &velocity_200_agp_device },
|
||||
{ &voodoo_3_1000_agp_device },
|
||||
|
||||
@@ -145,12 +145,11 @@ typedef struct tgui_t {
|
||||
uint32_t pattern_32[8 * 8];
|
||||
} accel;
|
||||
|
||||
uint8_t ext_gdc_regs[16]; /*TGUI9400CXi only*/
|
||||
uint8_t copy_latch[16];
|
||||
uint8_t copy_latch[16]; /*TGUI9400CXi only*/
|
||||
|
||||
uint8_t tgui_3d8, tgui_3d9;
|
||||
int oldmode;
|
||||
uint8_t oldctrl1, newctrl1;
|
||||
uint8_t oldctrl1;
|
||||
uint8_t oldctrl2, newctrl2;
|
||||
uint8_t oldgr0e, newgr0e;
|
||||
|
||||
@@ -160,6 +159,7 @@ typedef struct tgui_t {
|
||||
|
||||
int ramdac_state;
|
||||
uint8_t ramdac_ctrl;
|
||||
uint8_t alt_clock;
|
||||
|
||||
int clock_m, clock_n, clock_k;
|
||||
|
||||
@@ -212,9 +212,6 @@ static void tgui_ext_writel(uint32_t addr, uint32_t val, void *priv);
|
||||
static __inline uint32_t
|
||||
dword_remap(svga_t *svga, uint32_t in_addr)
|
||||
{
|
||||
if (svga->packed_chain4)
|
||||
return in_addr;
|
||||
|
||||
return ((in_addr << 2) & 0x3fff0) | ((in_addr >> 14) & 0xc) | (in_addr & ~0x3fffc);
|
||||
}
|
||||
|
||||
@@ -297,7 +294,7 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
tgui_t *tgui = (tgui_t *) priv;
|
||||
svga_t *svga = &tgui->svga;
|
||||
uint8_t old;
|
||||
uint8_t old, o;
|
||||
|
||||
if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1))
|
||||
addr ^= 0x60;
|
||||
@@ -331,6 +328,15 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga->read_bank = svga->write_bank;
|
||||
return;
|
||||
|
||||
case 0x5a:
|
||||
case 0x5b:
|
||||
case 0x5c:
|
||||
case 0x5d:
|
||||
case 0x5e:
|
||||
case 0x5f:
|
||||
svga->seqregs[svga->seqaddr] = val;
|
||||
return;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -344,20 +350,7 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
if (tgui->ramdac_state == 4) {
|
||||
tgui->ramdac_state = 0;
|
||||
tgui->ramdac_ctrl = val;
|
||||
switch ((tgui->ramdac_ctrl >> 4) & 0x0f) {
|
||||
case 1:
|
||||
svga->bpp = 15;
|
||||
break;
|
||||
case 3:
|
||||
svga->bpp = 16;
|
||||
break;
|
||||
case 0x0d:
|
||||
svga->bpp = (tgui->type >= TGUI_9660) ? 32 : 24;
|
||||
break;
|
||||
default:
|
||||
svga->bpp = 8;
|
||||
break;
|
||||
}
|
||||
//pclog("TGUI ramdac ctrl=%02x.\n", (tgui->ramdac_ctrl >> 4) & 0x0f);
|
||||
svga_recalctimings(svga);
|
||||
return;
|
||||
}
|
||||
@@ -374,30 +367,35 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
break;
|
||||
|
||||
case 0x3CF:
|
||||
if (svga->gdcaddr == 0x23) {
|
||||
svga->dpms = !!(val & 0x03);
|
||||
svga_recalctimings(svga);
|
||||
}
|
||||
if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32) {
|
||||
old = tgui->ext_gdc_regs[svga->gdcaddr & 15];
|
||||
tgui->ext_gdc_regs[svga->gdcaddr & 15] = val;
|
||||
if (svga->gdcaddr == 16)
|
||||
tgui_recalcmapping(tgui);
|
||||
return;
|
||||
}
|
||||
o = svga->gdcreg[svga->gdcaddr];
|
||||
switch (svga->gdcaddr) {
|
||||
case 0x6:
|
||||
case 2:
|
||||
svga->colourcompare = val;
|
||||
break;
|
||||
case 4:
|
||||
svga->readplane = val & 3;
|
||||
break;
|
||||
case 5:
|
||||
svga->writemode = val & 3;
|
||||
svga->readmode = val & 8;
|
||||
svga->chain2_read = val & 0x10;
|
||||
break;
|
||||
case 6:
|
||||
if (svga->gdcreg[6] != val) {
|
||||
svga->gdcreg[6] = val;
|
||||
tgui_recalcmapping(tgui);
|
||||
}
|
||||
return;
|
||||
break;
|
||||
case 7:
|
||||
svga->colournocare = val;
|
||||
break;
|
||||
|
||||
case 0x0e:
|
||||
svga->gdcreg[0xe] = val ^ 2;
|
||||
if ((svga->gdcreg[0xf] & 1) == 1)
|
||||
svga->read_bank = (svga->gdcreg[0xe]) * 65536;
|
||||
break;
|
||||
|
||||
case 0x0f:
|
||||
if (val & 1)
|
||||
svga->read_bank = (svga->gdcreg[0xe]) * 65536;
|
||||
@@ -414,6 +412,12 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga->write_bank = (svga->seqregs[0xe]) * 65536;
|
||||
break;
|
||||
|
||||
case 0x23:
|
||||
svga->dpms = !!(val & 0x03);
|
||||
svga_recalctimings(svga);
|
||||
break;
|
||||
|
||||
case 0x2f:
|
||||
case 0x5a:
|
||||
case 0x5b:
|
||||
case 0x5c:
|
||||
@@ -426,11 +430,36 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
svga->gdcreg[svga->gdcaddr] = val;
|
||||
|
||||
if (tgui->type == TGUI_9400CXI) {
|
||||
if ((svga->gdcaddr >= 0x10) && (svga->gdcaddr <= 0x1f)) {
|
||||
tgui_recalcmapping(tgui);
|
||||
return;
|
||||
}
|
||||
}
|
||||
svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only);
|
||||
if (((svga->gdcaddr == 5) && ((val ^ o) & 0x70)) || ((svga->gdcaddr == 6) && ((val ^ o) & 1)))
|
||||
svga_recalctimings(svga);
|
||||
return;
|
||||
case 0x3D4:
|
||||
svga->crtcreg = val;
|
||||
return;
|
||||
case 0x3D5:
|
||||
if (!(svga->seqregs[0x0e] & 0x80) && !tgui->oldmode) {
|
||||
switch (svga->crtcreg) {
|
||||
case 0x21:
|
||||
case 0x29:
|
||||
case 0x2a:
|
||||
case 0x38:
|
||||
case 0x39:
|
||||
case 0x3b:
|
||||
case 0x3c:
|
||||
return;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
|
||||
return;
|
||||
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
|
||||
@@ -482,8 +511,12 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga->hwcursor.y = (svga->crtc[0x42] | (svga->crtc[0x43] << 8)) & 0x7ff;
|
||||
|
||||
if ((tgui->accel.ger22 & 0xff) == 8) {
|
||||
if (svga->bpp != 24)
|
||||
if (svga->bpp != 24) {
|
||||
svga->hwcursor.x <<= 1;
|
||||
svga_recalctimings(svga);
|
||||
if ((svga->vdisp == 1022) && svga->interlace)
|
||||
svga->hwcursor.x >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
svga->hwcursor.xoff = svga->crtc[0x46] & 0x3f;
|
||||
@@ -531,6 +564,10 @@ tgui_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga->read_bank = (val & 0x3f) * 65536;
|
||||
return;
|
||||
|
||||
case 0x3DB:
|
||||
tgui->alt_clock = val & 0xe3;
|
||||
return;
|
||||
|
||||
case 0x43c8:
|
||||
tgui->clock_n = val & 0x7f;
|
||||
tgui->clock_m = (tgui->clock_m & ~1) | (val >> 7);
|
||||
@@ -591,6 +628,8 @@ tgui_in(uint16_t addr, void *priv)
|
||||
return tgui->oldctrl1 | 0x88;
|
||||
return svga->seqregs[0x0e];
|
||||
}
|
||||
if ((svga->seqaddr >= 0x5a) && (svga->seqaddr <= 0x5f))
|
||||
return svga->seqregs[svga->seqaddr];
|
||||
break;
|
||||
|
||||
case 0x3C6:
|
||||
@@ -610,10 +649,10 @@ tgui_in(uint16_t addr, void *priv)
|
||||
break;
|
||||
|
||||
case 0x3CF:
|
||||
if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32)
|
||||
return tgui->ext_gdc_regs[svga->gdcaddr & 15];
|
||||
if (svga->gdcaddr >= 0x5a && svga->gdcaddr <= 0x5f)
|
||||
return svga->gdcreg[svga->gdcaddr];
|
||||
if (svga->gdcaddr == 0x2f)
|
||||
return svga->gdcreg[svga->gdcaddr];
|
||||
break;
|
||||
case 0x3D4:
|
||||
return svga->crtcreg;
|
||||
@@ -636,6 +675,8 @@ tgui_in(uint16_t addr, void *priv)
|
||||
return tgui->tgui_3d8;
|
||||
case 0x3d9:
|
||||
return tgui->tgui_3d9;
|
||||
case 0x3db:
|
||||
return tgui->alt_clock;
|
||||
|
||||
default:
|
||||
break;
|
||||
@@ -650,28 +691,49 @@ tgui_recalctimings(svga_t *svga)
|
||||
uint8_t ger22lower = (tgui->accel.ger22 & 0xff);
|
||||
uint8_t ger22upper = (tgui->accel.ger22 >> 8);
|
||||
|
||||
if (!svga->rowoffset)
|
||||
svga->rowoffset = 0x100;
|
||||
|
||||
if (svga->crtc[0x29] & 0x10)
|
||||
svga->rowoffset |= 0x100;
|
||||
if (tgui->type >= TGUI_9440) {
|
||||
if ((svga->crtc[0x38] & 0x19) == 0x09)
|
||||
svga->bpp = 32;
|
||||
else {
|
||||
switch ((tgui->ramdac_ctrl >> 4) & 0x0f) {
|
||||
case 0x01:
|
||||
svga->bpp = 15;
|
||||
break;
|
||||
case 0x03:
|
||||
svga->bpp = 16;
|
||||
break;
|
||||
case 0x0d:
|
||||
svga->bpp = 24;
|
||||
break;
|
||||
default:
|
||||
svga->bpp = 8;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if ((tgui->type >= TGUI_9440) && (svga->bpp >= 24))
|
||||
svga->hdisp = (svga->crtc[1] + 1) * 8;
|
||||
svga->hdisp = (svga->crtc[1] + 1) << 3;
|
||||
|
||||
if (((svga->crtc[0x29] & 0x30) && (svga->bpp >= 15)) || !svga->rowoffset)
|
||||
svga->rowoffset |= 0x100;
|
||||
|
||||
//pclog("BPP=%d, DataWidth=%02x, CRTC29 bit 4-5=%02x, pixbusmode=%02x, rowoffset=%02x, doublerowoffset=%x.\n", svga->bpp, svga->crtc[0x2a] & 0x40, svga->crtc[0x29] & 0x30, svga->crtc[0x38], svga->rowoffset, svga->gdcreg[0x2f] & 4);
|
||||
|
||||
if ((svga->crtc[0x1e] & 0xA0) == 0xA0)
|
||||
svga->ma_latch |= 0x10000;
|
||||
if ((svga->crtc[0x27] & 0x01) == 0x01)
|
||||
if (svga->crtc[0x27] & 0x01)
|
||||
svga->ma_latch |= 0x20000;
|
||||
if ((svga->crtc[0x27] & 0x02) == 0x02)
|
||||
if (svga->crtc[0x27] & 0x02)
|
||||
svga->ma_latch |= 0x40000;
|
||||
if ((svga->crtc[0x27] & 0x04) == 0x04)
|
||||
if (svga->crtc[0x27] & 0x04)
|
||||
svga->ma_latch |= 0x80000;
|
||||
|
||||
if (svga->crtc[0x27] & 0x08)
|
||||
svga->split |= 0x400;
|
||||
if (svga->crtc[0x27] & 0x10)
|
||||
svga->dispend |= 0x400;
|
||||
|
||||
if (svga->crtc[0x27] & 0x20)
|
||||
svga->vsyncstart |= 0x400;
|
||||
if (svga->crtc[0x27] & 0x40)
|
||||
@@ -684,15 +746,18 @@ tgui_recalctimings(svga_t *svga)
|
||||
svga->lowres = 0;
|
||||
}
|
||||
|
||||
svga->interlace = !!(svga->crtc[0x1e] & 4);
|
||||
if (svga->interlace && (tgui->type < TGUI_9440))
|
||||
svga->rowoffset >>= 1;
|
||||
|
||||
if (svga->vdisp == 1020)
|
||||
svga->vdisp += 2;
|
||||
|
||||
if ((tgui->oldctrl2 & 0x10) || (svga->crtc[0x2a] & 0x40))
|
||||
svga->ma_latch <<= 1;
|
||||
|
||||
svga->lowres = !(svga->crtc[0x2a] & 0x40);
|
||||
|
||||
svga->interlace = !!(svga->crtc[0x1e] & 4);
|
||||
if (svga->interlace && (tgui->type < TGUI_9440))
|
||||
svga->rowoffset >>= 1;
|
||||
|
||||
if (tgui->type >= TGUI_9440) {
|
||||
if (svga->miscout & 8)
|
||||
svga->clock = (cpuclock * (double) (1ULL << 32)) / (((tgui->clock_n + 8) * 14318180.0) / ((tgui->clock_m + 2) * (1 << tgui->clock_k)));
|
||||
@@ -749,6 +814,7 @@ tgui_recalctimings(svga_t *svga)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (svga->gdcreg[0xf] & 0x08) {
|
||||
svga->htotal <<= 1;
|
||||
svga->hdisp <<= 1;
|
||||
@@ -760,7 +826,24 @@ tgui_recalctimings(svga_t *svga)
|
||||
switch (svga->bpp) {
|
||||
case 8:
|
||||
svga->render = svga_render_8bpp_highres;
|
||||
if (svga->vdisp == 1022) {
|
||||
if (svga->interlace)
|
||||
svga->dispend++;
|
||||
else
|
||||
svga->dispend += 2;
|
||||
}
|
||||
if (tgui->type >= TGUI_9660) {
|
||||
switch (svga->vdisp) {
|
||||
case 1024:
|
||||
case 1200:
|
||||
svga->htotal <<= 1;
|
||||
svga->hdisp <<= 1;
|
||||
svga->hdisp_time <<= 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#if OLD_CODE
|
||||
if (svga->dispend == ((1024 >> 1) - 2))
|
||||
svga->dispend += 2;
|
||||
if (svga->dispend == (1024 >> 1))
|
||||
@@ -773,6 +856,7 @@ tgui_recalctimings(svga_t *svga)
|
||||
else if (!svga->interlace && (svga->dispend == 768))
|
||||
svga->hdisp <<= 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ger22upper & 0x80) {
|
||||
svga->htotal <<= 1;
|
||||
@@ -782,7 +866,7 @@ tgui_recalctimings(svga_t *svga)
|
||||
switch (svga->hdisp) {
|
||||
case 640:
|
||||
if (!ger22lower)
|
||||
svga->rowoffset = 80;
|
||||
svga->rowoffset = 0x50;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -806,11 +890,10 @@ tgui_recalctimings(svga_t *svga)
|
||||
svga->hdisp = (svga->hdisp << 1) / 3;
|
||||
break;
|
||||
case 32:
|
||||
if (svga->rowoffset == 0x100)
|
||||
svga->rowoffset <<= 1;
|
||||
|
||||
svga->render = svga_render_32bpp_highres;
|
||||
if (tgui->type >= TGUI_9660) {
|
||||
if (!ger22upper)
|
||||
svga->rowoffset <<= 1;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -825,14 +908,14 @@ tgui_recalcmapping(tgui_t *tgui)
|
||||
svga_t *svga = &tgui->svga;
|
||||
|
||||
if (tgui->type == TGUI_9400CXI) {
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) {
|
||||
if (svga->gdcreg[0x10] & EXT_CTRL_LATCH_COPY) {
|
||||
mem_mapping_set_handler(&tgui->linear_mapping,
|
||||
tgui_ext_linear_read, NULL, NULL,
|
||||
tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel);
|
||||
mem_mapping_set_handler(&svga->mapping,
|
||||
tgui_ext_read, NULL, NULL,
|
||||
tgui_ext_write, tgui_ext_writew, tgui_ext_writel);
|
||||
} else if (tgui->ext_gdc_regs[0] & EXT_CTRL_MONO_EXPANSION) {
|
||||
} else if (svga->gdcreg[0x10] & EXT_CTRL_MONO_EXPANSION) {
|
||||
mem_mapping_set_handler(&tgui->linear_mapping,
|
||||
svga_read_linear, svga_readw_linear, svga_readl_linear,
|
||||
tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel);
|
||||
@@ -928,7 +1011,7 @@ tgui_recalcmapping(tgui_t *tgui)
|
||||
}
|
||||
|
||||
if (tgui->type >= TGUI_9440) {
|
||||
if ((tgui->mmio_base != 0x00000000) && (svga->crtc[0x39] & 1))
|
||||
if ((tgui->mmio_base != 0x00000000) && (svga->crtc[0x39] & 0x01))
|
||||
mem_mapping_set_addr(&tgui->mmio_mapping, tgui->mmio_base, 0x10000);
|
||||
else
|
||||
mem_mapping_disable(&tgui->mmio_mapping);
|
||||
@@ -939,7 +1022,7 @@ static void
|
||||
tgui_hwcursor_draw(svga_t *svga, int displine)
|
||||
{
|
||||
uint32_t dat[2];
|
||||
int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff;
|
||||
int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff;
|
||||
int pitch = (svga->hwcursor_latch.cur_xsize == 64) ? 16 : 8;
|
||||
|
||||
if (svga->interlace && svga->hwcursor_oddeven)
|
||||
@@ -1121,26 +1204,24 @@ tgui_ext_linear_read(uint32_t addr, void *priv)
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
tgui_t *tgui = (tgui_t *) svga->priv;
|
||||
|
||||
cycles -= video_timing_read_b;
|
||||
cycles -= svga->monitor->mon_video_timing_read_b;
|
||||
|
||||
addr &= svga->decode_mask;
|
||||
if (addr >= svga->vram_max)
|
||||
return 0xff;
|
||||
|
||||
addr &= svga->vram_mask;
|
||||
addr &= (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) ? ~0x0f : ~0x07;
|
||||
addr = dword_remap(svga, addr);
|
||||
addr &= ~0x0f;
|
||||
addr = dword_remap(svga, addr);
|
||||
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) {
|
||||
for (int c = 0; c < 16; c++) {
|
||||
tgui->copy_latch[c] = svga->vram[addr];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
return svga->vram[addr];
|
||||
for (int i = 0; i < 16; i++) {
|
||||
tgui->copy_latch[i] = svga->vram[addr];
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
}
|
||||
|
||||
return svga_read_linear(addr, svga);
|
||||
addr &= svga->vram_mask;
|
||||
|
||||
return svga->vram[addr];
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
@@ -1158,65 +1239,77 @@ tgui_ext_linear_write(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
const tgui_t *tgui = (tgui_t *) svga->priv;
|
||||
int c;
|
||||
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
|
||||
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
|
||||
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
|
||||
uint8_t mask = tgui->ext_gdc_regs[7];
|
||||
int bpp = (svga->gdcreg[0x10] & EXT_CTRL_16BIT);
|
||||
uint8_t fg[2] = { svga->gdcreg[0x14], svga->gdcreg[0x15] };
|
||||
uint8_t bg[2] = { svga->gdcreg[0x11], svga->gdcreg[0x12] };
|
||||
|
||||
cycles -= video_timing_write_b;
|
||||
cycles -= svga->monitor->mon_video_timing_write_b;
|
||||
|
||||
addr &= svga->decode_mask;
|
||||
if (addr >= svga->vram_max)
|
||||
return;
|
||||
addr &= svga->vram_mask;
|
||||
addr &= (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) ? ~0x0f : ~0x07;
|
||||
|
||||
addr = dword_remap(svga, addr);
|
||||
addr &= svga->vram_mask;
|
||||
addr &= (svga->gdcreg[0x10] & EXT_CTRL_LATCH_COPY) ? ~0x0f : ~0x07;
|
||||
addr = dword_remap(svga, addr);
|
||||
|
||||
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
|
||||
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) {
|
||||
for (c = 0; c < 16; c++) {
|
||||
svga->vram[addr] = tgui->copy_latch[c];
|
||||
addr += ((c & 3) == 3) ? 13 : 1;
|
||||
if (svga->gdcreg[0x10] & EXT_CTRL_LATCH_COPY) {
|
||||
for (int i = 0; i < 8; i++) {
|
||||
if (val & (0x80 >> i))
|
||||
svga->vram[addr] = tgui->copy_latch[i];
|
||||
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else if (tgui->ext_gdc_regs[0] & (EXT_CTRL_MONO_EXPANSION | EXT_CTRL_MONO_TRANSPARENT)) {
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_MONO_TRANSPARENT) {
|
||||
} else {
|
||||
if (svga->gdcreg[0x10] & EXT_CTRL_MONO_TRANSPARENT) {
|
||||
if (bpp) {
|
||||
for (c = 7; c >= 0; c--) {
|
||||
if ((val & mask) & (1 << c))
|
||||
svga->vram[addr] = fg[(c & 1) ^ 1];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
if (val & (0x80 >> i))
|
||||
svga->vram[addr] = fg[i & 1];
|
||||
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else {
|
||||
for (c = 7; c >= 0; c--) {
|
||||
if ((val & mask) & (1 << c))
|
||||
svga->vram[addr] = tgui->ext_gdc_regs[4];
|
||||
addr += (c == 4) ? 13 : 1;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
if (val & (0x80 >> i))
|
||||
svga->vram[addr] = fg[0];
|
||||
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (bpp) {
|
||||
for (c = 7; c >= 0; c--) {
|
||||
if (mask & (1 << c))
|
||||
svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
if (val & (0x80 >> i)) {
|
||||
if (svga->gdcreg[0x17] & (0x80 >> i))
|
||||
svga->vram[addr] = fg[i & 1];
|
||||
} else {
|
||||
if (svga->gdcreg[0x17] & (0x80 >> i))
|
||||
svga->vram[addr] = bg[i & 1];
|
||||
}
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else {
|
||||
for (c = 7; c >= 0; c--) {
|
||||
if (mask & (1 << c))
|
||||
svga->vram[addr] = (val & (1 << c)) ? tgui->ext_gdc_regs[4] : tgui->ext_gdc_regs[1];
|
||||
addr += (c == 4) ? 13 : 1;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
if (val & (0x80 >> i)) {
|
||||
if (svga->gdcreg[0x17] & (0x80 >> i))
|
||||
svga->vram[addr] = fg[0];
|
||||
} else {
|
||||
if (svga->gdcreg[0x17] & (0x80 >> i))
|
||||
svga->vram[addr] = bg[0];
|
||||
}
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
} else
|
||||
svga_write_linear(addr, val, svga);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -1224,94 +1317,85 @@ tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
const tgui_t *tgui = (tgui_t *) svga->priv;
|
||||
int c;
|
||||
int bpp = (tgui->ext_gdc_regs[0] & EXT_CTRL_16BIT);
|
||||
uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] };
|
||||
uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] };
|
||||
uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8];
|
||||
int bpp = (svga->gdcreg[0x10] & EXT_CTRL_16BIT);
|
||||
uint8_t fg[2] = { svga->gdcreg[0x14], svga->gdcreg[0x15] };
|
||||
uint8_t bg[2] = { svga->gdcreg[0x11], svga->gdcreg[0x12] };
|
||||
uint16_t mask = svga->gdcreg[0x18] | (svga->gdcreg[0x17] << 8);
|
||||
|
||||
cycles -= video_timing_write_w;
|
||||
cycles -= svga->monitor->mon_video_timing_write_w;
|
||||
|
||||
addr &= svga->decode_mask;
|
||||
if (addr >= svga->vram_max)
|
||||
return;
|
||||
|
||||
addr &= svga->vram_mask;
|
||||
addr &= (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) ? ~0x0f : ~0x07;
|
||||
addr &= ~0x0f;
|
||||
addr = dword_remap(svga, addr);
|
||||
|
||||
addr = dword_remap(svga, addr);
|
||||
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
|
||||
|
||||
val = (val >> 8) | (val << 8);
|
||||
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) {
|
||||
for (c = 0; c < 16; c++) {
|
||||
svga->vram[addr] = tgui->copy_latch[c];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
if (svga->gdcreg[0x10] & EXT_CTRL_LATCH_COPY) {
|
||||
for (int i = 0; i < 16; i++) {
|
||||
if (val & (0x8000 >> i))
|
||||
svga->vram[addr] = tgui->copy_latch[i];
|
||||
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else if (tgui->ext_gdc_regs[0] & (EXT_CTRL_MONO_EXPANSION | EXT_CTRL_MONO_TRANSPARENT)) {
|
||||
if (tgui->ext_gdc_regs[0] & EXT_CTRL_MONO_TRANSPARENT) {
|
||||
} else {
|
||||
if (svga->gdcreg[0x10] & EXT_CTRL_MONO_TRANSPARENT) {
|
||||
if (bpp) {
|
||||
for (c = 15; c >= 0; c--) {
|
||||
if ((val & mask) & (1 << c))
|
||||
svga->vram[addr] = fg[(c & 1) ^ 1];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
for (int i = 0; i < 16; i++) {
|
||||
if (val & (0x8000 >> i))
|
||||
svga->vram[addr] = fg[i & 1];
|
||||
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else {
|
||||
for (c = 15; c >= 0; c--) {
|
||||
if ((val & mask) & (1 << c))
|
||||
svga->vram[addr] = tgui->ext_gdc_regs[4];
|
||||
for (int i = 0; i < 16; i++) {
|
||||
if (val & (0x8000 >> i))
|
||||
svga->vram[addr] = fg[0];
|
||||
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (bpp) {
|
||||
for (c = 15; c >= 0; c--) {
|
||||
if (mask & (1 << c))
|
||||
svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1];
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
for (int i = 0; i < 16; i++) {
|
||||
if (val & (0x8000 >> i)) {
|
||||
if (mask & (0x8000 >> i))
|
||||
svga->vram[addr] = fg[i & 1];
|
||||
} else {
|
||||
if (mask & (0x8000 >> i))
|
||||
svga->vram[addr] = bg[i & 1];
|
||||
}
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
} else {
|
||||
for (c = 15; c >= 0; c--) {
|
||||
if (mask & (1 << c))
|
||||
svga->vram[addr] = (val & (1 << c)) ? tgui->ext_gdc_regs[4] : tgui->ext_gdc_regs[1];
|
||||
|
||||
addr += (c & 3) ? 1 : 13;
|
||||
for (int i = 0; i < 16; i++) {
|
||||
if (val & (0x8000 >> i)) {
|
||||
if (mask & (0x8000 >> i))
|
||||
svga->vram[addr] = fg[0];
|
||||
} else {
|
||||
if (mask & (0x8000 >> i))
|
||||
svga->vram[addr] = bg[0];
|
||||
}
|
||||
addr += ((i & 3) == 3) ? 0x0d : 0x01;
|
||||
addr &= svga->vram_mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
} else
|
||||
svga_writew_linear(addr, val, svga);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
const tgui_t *tgui = (tgui_t *) svga->priv;
|
||||
|
||||
cycles -= video_timing_write_l;
|
||||
|
||||
addr &= svga->decode_mask;
|
||||
if (addr >= svga->vram_max)
|
||||
return;
|
||||
addr &= svga->vram_mask;
|
||||
addr &= (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) ? ~0x0f : ~0x07;
|
||||
|
||||
addr = dword_remap(svga, addr);
|
||||
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
|
||||
|
||||
if (tgui->ext_gdc_regs[0] & (EXT_CTRL_MONO_EXPANSION | EXT_CTRL_MONO_TRANSPARENT | EXT_CTRL_LATCH_COPY)) {
|
||||
tgui_ext_linear_writew(addr, val & 0xffff, priv);
|
||||
tgui_ext_linear_writew(addr + 2, val >> 16, priv);
|
||||
} else {
|
||||
svga_writel_linear(addr, val, svga);
|
||||
}
|
||||
tgui_ext_linear_writew(addr, val, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -1484,6 +1568,8 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
|
||||
case 32:
|
||||
tgui->accel.pitch <<= 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#if 0
|
||||
pclog("TGUI accel command = %x, ger22 = %04x, hdisp = %d, dispend = %d, vtotal = %d, rowoffset = %d, svgabpp = %d, interlace = %d, accelbpp = %d, pitch = %d.\n", tgui->accel.command, tgui->accel.ger22, svga->hdisp, svga->dispend, svga->vtotal, svga->rowoffset, svga->bpp, svga->interlace, tgui->accel.bpp, tgui->accel.pitch);
|
||||
@@ -3213,7 +3299,6 @@ tgui_init(const device_t *info)
|
||||
|
||||
if (tgui->type >= TGUI_9440) {
|
||||
svga->packed_chain4 = 1;
|
||||
|
||||
tgui->i2c = i2c_gpio_init("ddc_tgui");
|
||||
tgui->ddc = ddc_init(i2c_gpio_get_bus(tgui->i2c));
|
||||
}
|
||||
|
||||
@@ -516,7 +516,7 @@ tvp3026_recalctimings(void *priv, svga_t *svga)
|
||||
|
||||
svga->interlace = !!(ramdac->ccr & 0x40);
|
||||
/* TODO: Figure out gamma correction for 15/16 bpp color. */
|
||||
svga->lut_map = !!(svga->bpp >= 15 && (ramdac->true_color & 0xf0) != 0x00);
|
||||
svga->lut_map = !!((svga->bpp >= 15 && (svga->bpp != 24)) && (ramdac->true_color & 0xf0) != 0x00);
|
||||
|
||||
if (!(ramdac->clock_sel & 0x70)) {
|
||||
if (ramdac->mcr != 0x98) {
|
||||
|
||||
@@ -513,7 +513,7 @@ banshee_render_16bpp_tiled(svga_t *svga)
|
||||
if (addr >= svga->vram_max)
|
||||
return;
|
||||
|
||||
for (int x = 0; x <= svga->hdisp; x += 64) {
|
||||
for (int x = 0; x < svga->hdisp; x += 64) {
|
||||
if (svga->hwcursor_on || svga->overlay_on)
|
||||
svga->changedvram[addr >> 12] = 2;
|
||||
if (svga->changedvram[addr >> 12] || svga->fullchange) {
|
||||
|
||||
Reference in New Issue
Block a user