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Merge branch 'master' of ssh://github.com/86Box/86Box into cleanup30

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This commit is contained in:
RichardG867
2022-01-31 17:09:28 -03:00
parent 5ca274f37f b764f828b3
commit 27589cbbc5
90 changed files with 3416 additions and 1419 deletions
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220
.github/workflows/cmake.yml vendored
View File

@@ -22,7 +22,7 @@ on:
- "!**/Makefile*"
jobs:
mingw:
msys2:
name: MSYS2 ${{ matrix.build.name }} build (${{ matrix.environment.msystem }})
runs-on: windows-latest
@@ -35,15 +35,30 @@ jobs:
fail-fast: false
matrix:
build:
- name: Regular
- name: Regular ODR
slug: -ODR
preset: regular
target: install/strip
- name: Debug
- name: Debug ODR
slug: -ODR-Debug
preset: debug
target: install
- name: Dev
- name: Dev ODR
slug: -ODR-Dev
preset: experimental
target: install
- name: Regular NDR
slug: -NDR
preset: regularndr
target: install/strip
- name: Debug NDR
slug: -NDR-Debug
preset: debugndr
target: install
- name: Dev NDR
slug: -NDR-Dev
preset: experimentalndr
target: install
environment:
- msystem: MINGW32
prefix: mingw-w64-i686
@@ -51,6 +66,8 @@ jobs:
prefix: mingw-w64-x86_64
- msystem: UCRT64
prefix: mingw-w64-ucrt-x86_64
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
- msystem: CLANG64
prefix: mingw-w64-clang-x86_64
@@ -83,71 +100,155 @@ jobs:
run: cmake --build build --target ${{ matrix.build.target }}
- uses: actions/upload-artifact@v2
with:
name: '86Box-${{ matrix.build.name }}-MSYS2-${{ matrix.environment.msystem }}-${{ github.sha }}'
name: '86Box${{ matrix.build.slug }}-MSYS2-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
path: build/artifacts/**
vs2019:
name: VS2019 ${{ matrix.build.name }} ${{ matrix.target-arch }} build (${{ matrix.toolset }})
llvm-windows:
name: "Windows vcpkg/LLVM (${{ matrix.build.name }} ${{ matrix.target.name }})"
runs-on: windows-latest
runs-on: windows-2022
env:
VCPKG_BINARY_SOURCES: 'clear;nuget,GitHub,readwrite'
strategy:
fail-fast: false
matrix:
build:
- name: Debug
- name: Regular ODR
slug: -ODR
type: Release
dev-build: off
new-dynarec: off
strip: --strip
- name: Debug ODR
slug: -ODR-Debug
type: Debug
dev-build: off
new-dynarec: off
- name: Dev ODR
slug: -ODR-Dev
type: Debug
dev-build: on
new-dynarec: off
- name: Regular NDR
slug: -NDR
type: Release
strip: --strip
dev-build: off
new-dynarec: on
- name: Debug NDR
slug: -NDR-Debug
type: Debug
dev-build: off
new-dynarec: on
- name: Dev NDR
slug: -NDR-Dev
type: Debug
- name: Dev
dev-build: on
new-dynarec: on
type: Debug
target-arch: ['Win32', 'x64', 'ARM64']
toolset: ['clangcl']
target:
- name: x86
triplet: x86-windows-static
toolchain: cmake/llvm-win32-i686.cmake
vcvars: x64_x86
- name: x64
triplet: x64-windows-static
toolchain: cmake/llvm-win32-x86_64.cmake
vcvars: x64
- name: ARM64
triplet: arm64-windows-static
toolchain: cmake/llvm-win32-aarch64.cmake
vcvars: x64_arm64
exclude:
- target-arch: 'ARM64'
build:
new-dynarec: off
- build:
new-dynarec: off
target:
name: ARM64
steps:
- uses: actions/checkout@v2
- uses: actions/cache@v2
with:
path: build/vcpkg_installed
key: vcpkg-${{ hashFiles('vcpkg.json') }}-${{ matrix.target-arch }}
- name: Download Ninja
run: >
Invoke-WebRequest https://github.com/ninja-build/ninja/releases/download/v1.10.2/ninja-win.zip -OutFile ninja-win.zip &&
Expand-Archive ninja-win.zip -DestinationPath .
- name: Setup NuGet Credentials
run: >
& (C:/vcpkg/vcpkg fetch nuget | tail -n 2)
sources add
-source "https://nuget.pkg.github.com/86Box/index.json"
-storepasswordincleartext
-name "GitHub"
-username "86Box"
-password "${{ secrets.GITHUB_TOKEN }}"
- name: vcpkg package restore
if: false
run: vcpkg install freetype libpng openal-soft sdl2 rtmidi --triplet ${{ matrix.target.triplet }}
- name: Configure CMake
run: >-
cmake -S . -B build
-G "Visual Studio 16 2019" -A ${{ matrix.target-arch }} -T ${{ matrix.toolset }}
-D CMAKE_TOOLCHAIN_FILE=C:\vcpkg\scripts\buildsystems\vcpkg.cmake
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D DEV_BRANCH=${{ matrix.build.dev-build }}
run: >
call "C:/Program Files/Microsoft Visual Studio/2022/Enterprise/VC/Auxiliary/Build/vcvarsall.bat" ${{ matrix.target.vcvars }}
set PATH=C:/Program Files/LLVM/bin;%PATH%
cmake -S . -B build -G Ninja -D CMAKE_BUILD_TYPE=${{ matrix.build.type }}
-D NEW_DYNAREC=${{ matrix.build.new-dynarec }}
-D VNC=OFF
-D CMAKE_TOOLCHAIN_FILE=C:/vcpkg/scripts/buildsystems/vcpkg.cmake
-D VCPKG_CHAINLOAD_TOOLCHAIN_FILE=${{ github.workspace }}/${{ matrix.target.toolchain }}
-D VCPKG_TARGET_TRIPLET=${{ matrix.target.triplet }}
shell: cmd
- name: Build
run: cmake --build build --config ${{ matrix.build.type }} --target install
run: |
call "C:/Program Files/Microsoft Visual Studio/2022/Enterprise/VC/Auxiliary/Build/vcvarsall.bat" ${{ matrix.target.vcvars }}
cmake --build build
shell: cmd
- name: Generate package
run: cmake --install build --prefix ./build/artifacts ${{ matrix.build.strip }}
- uses: actions/upload-artifact@v2
with:
name: '86Box-${{ matrix.build.name }}-VS2019-${{ matrix.target-arch }}-${{ matrix.toolset }}-${{ github.sha }}'
name: '86Box${{ matrix.build.slug }}-Windows-LLVM-${{ matrix.target.name }}-gha${{ github.run_number }}'
path: build/artifacts/**
linux:
name: "Linux GCC 11"
name: "Linux GCC 11 (${{ matrix.build.name }} x86_64)"
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
build:
- name: Debug
- name: Regular ODR
slug: -ODR
type: Release
dev-build: off
new-dynarec: off
strip: --strip
- name: Debug ODR
slug: -ODR-Debug
type: Debug
dev-build: off
new-dynarec: off
- name: Dev ODR
slug: -ODR-Dev
type: Debug
dev-build: on
new-dynarec: off
- name: Regular NDR
slug: -NDR
type: Release
strip: --strip
dev-build: off
new-dynarec: on
- name: Debug NDR
slug: -NDR-Debug
type: Debug
dev-build: off
new-dynarec: on
- name: Dev NDR
slug: -NDR-Dev
type: Debug
- name: Dev
dev-build: on
new-dynarec: on
type: Debug
steps:
- uses: actions/checkout@v2
@@ -163,24 +264,55 @@ jobs:
-D CMAKE_BUILD_TYPE=${{ matrix.build.type }}
-D CMAKE_C_COMPILER=gcc-11 -D CMAKE_CXX_COMPILER=g++-11
- name: Build
run: cmake --build build --target install
run: cmake --build build
- name: Generate package
run: cmake --install build --prefix ./build/artifacts ${{ matrix.build.strip }}
- uses: actions/upload-artifact@v2
with:
name: '86Box${{ matrix.build.slug }}-Linux-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**
macos:
name: "macOS 11"
macos11:
name: "macOS 11 (${{ matrix.build.name }} x86_64)"
runs-on: macos-11
strategy:
fail-fast: false
matrix:
build:
- name: Debug
- name: Regular ODR
slug: -ODR
type: Release
dev-build: off
new-dynarec: off
strip: --strip
- name: Debug ODR
slug: -ODR-Debug
type: Debug
dev-build: off
new-dynarec: off
- name: Dev ODR
slug: -ODR-Dev
type: Debug
dev-build: on
new-dynarec: off
- name: Regular NDR
slug: -NDR
type: Release
strip: --strip
dev-build: off
new-dynarec: on
- name: Debug NDR
slug: -NDR-Debug
type: Debug
dev-build: off
new-dynarec: on
- name: Dev NDR
slug: -NDR-Dev
type: Debug
- name: Dev
dev-build: on
new-dynarec: on
type: Debug
steps:
- uses: actions/checkout@v2
@@ -189,10 +321,16 @@ jobs:
- name: Configure CMake
run: >-
cmake -S . -B build
-D CMAKE_INSTALL_PREFIX=./build/artifacts
--toolchain cmake/flags-gcc-x86_64.cmake
-D DEV_BRANCH=${{ matrix.build.dev-build }}
-D NEW_DYNAREC=${{ matrix.build.new-dynarec }}
-D VNC=OFF
-D CMAKE_BUILD_TYPE=${{ matrix.build.type }}
- name: Build
run: cmake --build build --target install
run: cmake --build build
- name: Generate package
run: cmake --install build --prefix ./build/artifacts ${{ matrix.build.strip }}
- uses: actions/upload-artifact@v2
with:
name: '86Box${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**

35
CMakeLists.txt
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@@ -100,8 +100,8 @@ set(CMAKE_CXX_STANDARD 11)
# Option Description Def.
# ------ ----------- ----
option(RELEASE "Release build" OFF)
option(USB "USB support" OFF)
option(DYNAREC "Dynamic recompiler" ON)
option(OPENAL "OpenAL" ON)
option(FLUIDSYNTH "FluidSynth" ON)
option(MUNT "MUNT" ON)
option(VRAMDUMP "Video RAM dumping" OFF)
@@ -113,21 +113,24 @@ option(DEV_BRANCH "Development branch"
# Development branch features
#
# Option Description Def. Condition Otherwise
# ------ ----------- ---- --------- ---------
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(MGA "Matrox Mystique graphics adapters" ON "DEV_BRANCH" OFF)
cmake_dependent_option(NO_SIO "Machines without emulated Super I/O chips" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(PAS16 "Pro Audio Spectrum 16" OFF "DEV_BRANCH" OFF)
cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF)
cmake_dependent_option(VGAWONDER "ATI VGA Wonder (ATI-18800)" ON "DEV_BRANCH" OFF)
cmake_dependent_option(VNC "VNC renderer" OFF "DEV_BRANCH" OFF)
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
# Option Description Def. Condition Otherwise
# ------ ----------- ---- --------- ---------
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(MGA "Matrox Mystique graphics adapters" ON "DEV_BRANCH" OFF)
cmake_dependent_option(NO_SIO "Machines without emulated Super I/O chips" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(PAS16 "Pro Audio Spectrum 16" OFF "DEV_BRANCH" OFF)
cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF)
cmake_dependent_option(VGAWONDER "ATI VGA Wonder (ATI-18800)" ON "DEV_BRANCH" OFF)
cmake_dependent_option(VNC "VNC renderer" OFF "DEV_BRANCH" OFF)
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_IAB "Intel Above Board" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_BRAT "BocaRAM/AT" ON "DEV_BRANCH" OFF)
# Determine the build type
set(RELEASE_BUILD OFF)

48
CMakePresets.json
View File

@@ -34,6 +34,18 @@
"NEW_DYNAREC": "OFF"
}
},
{
"name": "regularndr",
"inherits": [
"flags-base"
],
"generator": "Ninja",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release",
"DEV_BRANCH": "OFF",
"NEW_DYNAREC": "ON"
}
},
{
"name": "optimized",
"inherits": [
@@ -46,6 +58,18 @@
"NEW_DYNAREC": "OFF"
}
},
{
"name": "optimizedndr",
"inherits": [
"flags-base"
],
"generator": "Ninja",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Optimized",
"DEV_BRANCH": "OFF",
"NEW_DYNAREC": "ON"
}
},
{
"name": "debug",
"inherits": [
@@ -58,12 +82,36 @@
"NEW_DYNAREC": "OFF"
}
},
{
"name": "debugndr",
"inherits": [
"flags-base"
],
"generator": "Ninja",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug",
"DEV_BRANCH": "OFF",
"NEW_DYNAREC": "ON"
}
},
{
"name": "experimental",
"inherits": [
"flags-base"
],
"generator": "Ninja",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug",
"DEV_BRANCH": "ON",
"NEW_DYNAREC": "OFF"
}
},
{
"name": "experimentalndr",
"inherits": [
"flags-base"
],
"generator": "Ninja",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug",
"DEV_BRANCH": "ON",

16
src/86box.c
View File

@@ -160,7 +160,8 @@ int GAMEBLASTER = 0; /* (C) sound option */
int GUS = 0; /* (C) sound option */
int SSI2001 = 0; /* (C) sound option */
int voodoo_enabled = 0; /* (C) video option */
uint32_t mem_size = 0; /* (C) memory size */
uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/
uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */
int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */
int cpu = 0; /* (C) cpu type */
int fpu_type = 0; /* (C) fpu type */
@@ -931,7 +932,9 @@ pc_reset_hard_close(void)
scsi_disk_close();
#ifdef USE_OPENAL
closeal();
#endif
video_reset_close();
@@ -976,9 +979,6 @@ pc_reset_hard_init(void)
/* Reset and reconfigure the Sound Card layer. */
sound_card_reset();
/* Reset any ISA memory cards. */
isamem_reset();
/* Reset any ISA RTC cards. */
isartc_reset();
@@ -1048,8 +1048,12 @@ pc_reset_hard_init(void)
atfullspeed = 0;
pc_full_speed();
cycles = cycles_main = 0;
cycles = 0;
fpu_cycles = 0;
#ifdef USE_DYNAREC
cycles_main = 0;
#endif
update_mouse_msg();
}

8
src/CMakeLists.txt
View File

@@ -87,9 +87,11 @@ if(APPLE)
target_link_libraries(86Box Freetype::Freetype)
endif()
find_package(OpenAL REQUIRED)
include_directories(${OPENAL_INCLUDE_DIR})
target_link_libraries(86Box ${OPENAL_LIBRARY})
if(OPENAL)
find_package(OpenAL REQUIRED)
include_directories(${OPENAL_INCLUDE_DIR})
target_link_libraries(86Box ${OPENAL_LIBRARY})
endif()
find_package(SDL2 REQUIRED)
include_directories(${SDL2_INCLUDE_DIRS})

15
src/config.c
View File

@@ -1076,6 +1076,12 @@ load_ports(void)
for (c = 0; c < SERIAL_MAX; c++) {
sprintf(temp, "serial%d_enabled", c + 1);
serial_enabled[c] = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1);
/*
sprintf(temp, "serial%d_device", c + 1);
p = (char *) config_get_string(cat, temp, "none");
com_ports[c].device = com_device_get_from_internal_name(p);
*/
}
for (c = 0; c < PARALLEL_MAX; c++) {
@@ -2554,6 +2560,15 @@ save_ports(void)
config_delete_var(cat, temp);
else
config_set_int(cat, temp, serial_enabled[c]);
/*
sprintf(temp, "serial%d_device", c + 1);
if (com_ports[c].device == 0)
config_delete_var(cat, temp);
else
config_set_string(cat, temp,
(char *) com_device_get_internal_name(com_ports[c].device));
*/
}
for (c = 0; c < PARALLEL_MAX; c++) {

15
src/cpu/386.c
View File

@@ -81,7 +81,20 @@ x386_log(const char *fmt, ...)
#define OP_TABLE(name) ops_ ## name
#define CLOCK_CYCLES(c) cycles -= (c)
#define CLOCK_CYCLES(c) \
{\
if (fpu_cycles > 0) {\
fpu_cycles -= (c);\
if (fpu_cycles < 0) {\
cycles += fpu_cycles;\
}\
} else {\
cycles -= (c);\
}\
}
#define CLOCK_CYCLES_FPU(c) cycles -= (c)
#define CONCURRENCY_CYCLES(c) fpu_cycles = (c)
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
#include "x86_ops.h"

15
src/cpu/386_dynarec.c
View File

@@ -267,9 +267,22 @@ static void prefetch_flush()
#define OP_TABLE(name) ops_ ## name
#define CLOCK_CYCLES(c) cycles -= (c)
#define CLOCK_CYCLES(c) \
{\
if (fpu_cycles > 0) {\
fpu_cycles -= (c);\
if (fpu_cycles < 0) {\
cycles += fpu_cycles;\
}\
} else {\
cycles -= (c);\
}\
}
#define CLOCK_CYCLES_FPU(c) cycles -= (c)
#define CONCURRENCY_CYCLES(c) fpu_cycles = (c)
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
#include "386_ops.h"

2
src/cpu/386_dynarec_ops.c
View File

@@ -65,6 +65,8 @@ static __inline void fetch_ea_16_long(uint32_t rmdat)
#define OP_TABLE(name) dynarec_ops_ ## name
#define CLOCK_CYCLES(c)
#define CLOCK_CYCLES_FPU(c)
#define CONCURRENCY_CYCLES(c) fpu_cycles = (c)
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
#include "386_ops.h"

23
src/cpu/808x.c
View File

@@ -89,11 +89,32 @@ static int refresh = 0, cycdiff;
wait(val, 0); \
}
#define CLOCK_CYCLES(val) \
#define CLOCK_CYCLES_ALWAYS(val) \
{ \
wait(val, 0); \
}
#define CLOCK_CYCLES_FPU(val) \
{ \
wait(val, 0); \
}
#define CLOCK_CYCLES(val) \
{ \
if (fpu_cycles > 0) { \
fpu_cycles -= (val); \
if (fpu_cycles < 0) { \
wait(val, 0); \
} \
} else { \
wait(val, 0); \
} \
}
#define CONCURRENCY_CYCLES(c) fpu_cycles = (c)
typedef int (*OpFn)(uint32_t fetchdat);

8
src/cpu/CMakeLists.txt
View File

@@ -13,8 +13,8 @@
# Copyright 2020,2021 David Hrdlička.
#
add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c 386_dynarec.c
386_dynarec_ops.c x86seg.c x87.c x87_timings.c)
add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c
386_dynarec.c x86seg.c x87.c x87_timings.c)
if(AMD_K5)
target_compile_definitions(cpu PRIVATE USE_AMD_K5)
@@ -25,8 +25,10 @@ if(CYRIX_6X86)
endif()
if(DYNAREC)
target_sources(cpu PRIVATE 386_dynarec_ops.c)
add_library(cgt OBJECT codegen_timing_486.c codegen_timing_686.c
codegen_timing_common.c codegen_timing_k6.c
codegen_timing_pentium.c codegen_timing_p6.c
codegen_timing_winchip.c codegen_timing_winchip2.c)
endif()
endif()

1
src/cpu/cpu.c
View File

@@ -1369,6 +1369,7 @@ cpu_set(void)
case FPU_487SX:
default:
x87_timings = x87_timings_486;
x87_concurrency = x87_concurrency_486;
}
if (is386) {

3
src/cpu/cpu.h
View File

@@ -354,7 +354,7 @@ typedef struct {
uint8_t ssegs, ismmx,
abrt, _smi_line;
int _cycles, _in_smm;
int _cycles, _fpu_cycles, _in_smm;
uint16_t npxs, npxc;
@@ -457,6 +457,7 @@ COMPILE_TIME_ASSERT(sizeof(cpu_state_t) <= 128)
#define DI cpu_state.regs[7].w
#define cycles cpu_state._cycles
#define fpu_cycles cpu_state._fpu_cycles
#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm
#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod

4
src/cpu/x86seg.c
View File

@@ -2415,7 +2415,9 @@ cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg)
cpu_cur_status &= ~CPU_STATUS_NOTFLATDS;
else
cpu_cur_status |= CPU_STATUS_NOTFLATDS;
#ifdef USE_DYNAREC
codegen_flat_ds = 0;
#endif
}
if (seg == &cpu_state.seg_ss) {
if (seg->base == 0 && seg->limit_low == 0 && seg->limit_high == 0xffffffff)
@@ -2423,7 +2425,9 @@ cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg)
else
cpu_cur_status |= CPU_STATUS_NOTFLATSS;
set_stack32((segdat[3] & 0x40) ? 1 : 0);
#ifdef USE_DYNAREC
codegen_flat_ss = 0;
#endif
}
}
}

108
src/cpu/x87_ops_arith.h
View File

@@ -12,7 +12,8 @@ static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
if ((cpu_state.npxc >> 10) & 3) \
fesetround(FE_TONEAREST); \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd ## cycle_postfix) : ((x87_concurrency.fadd ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -24,7 +25,8 @@ static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
cpu_state.npxs &= ~(C0|C2|C3); \
cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom ## cycle_postfix) : ((x87_timings.fcom ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom ## cycle_postfix) : ((x87_timings.fcom ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom ## cycle_postfix) : ((x87_concurrency.fcom ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -37,7 +39,8 @@ static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
cpu_state.npxs &= ~(C0|C2|C3); \
cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
x87_pop(); \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom ## cycle_postfix) : ((x87_timings.fcom ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom ## cycle_postfix) : ((x87_timings.fcom ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom ## cycle_postfix) : ((x87_concurrency.fcom ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -49,7 +52,8 @@ static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
x87_div(ST(0), ST(0), use_var); \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv ## cycle_postfix) : ((x87_timings.fdiv ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv ## cycle_postfix) : ((x87_timings.fdiv ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd ## cycle_postfix) : ((x87_concurrency.fadd ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -61,7 +65,8 @@ static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
x87_div(ST(0), use_var, ST(0)); \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv ## cycle_postfix) : ((x87_timings.fdiv ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv ## cycle_postfix) : ((x87_timings.fdiv ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv ## cycle_postfix) : ((x87_concurrency.fdiv ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -73,7 +78,8 @@ static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
ST(0) *= use_var; \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fmul ## cycle_postfix) : ((x87_timings.fmul ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul ## cycle_postfix) : ((x87_timings.fmul ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul ## cycle_postfix) : ((x87_concurrency.fmul ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -85,7 +91,8 @@ static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
ST(0) -= use_var; \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd ## cycle_postfix) : ((x87_concurrency.fadd ## cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
@@ -97,7 +104,8 @@ static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
load_var = get(); if (cpu_state.abrt) return 1; \
ST(0) = use_var - ST(0); \
FP_TAG_VALID; \
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd ## cycle_postfix) : ((x87_timings.fadd ## cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd ## cycle_postfix) : ((x87_concurrency.fadd ## cycle_postfix) * cpu_multi)); \
return 0; \
}
@@ -127,7 +135,8 @@ static int opFADD(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = ST(0) + ST(fetchdat & 7);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFADDr(uint32_t fetchdat)
@@ -136,7 +145,8 @@ static int opFADDr(uint32_t fetchdat)
cpu_state.pc++;
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFADDP(uint32_t fetchdat)
@@ -146,7 +156,8 @@ static int opFADDP(uint32_t fetchdat)
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
@@ -157,7 +168,8 @@ static int opFCOM(uint32_t fetchdat)
cpu_state.npxs &= ~(C0|C2|C3);
if (ST(0) == ST(fetchdat & 7)) cpu_state.npxs |= C3;
else if (ST(0) < ST(fetchdat & 7)) cpu_state.npxs |= C0;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom) : (x87_concurrency.fcom * cpu_multi));
return 0;
}
@@ -168,7 +180,8 @@ static int opFCOMP(uint32_t fetchdat)
cpu_state.npxs &= ~(C0|C2|C3);
cpu_state.npxs |= x87_compare(ST(0), ST(fetchdat & 7));
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom) : (x87_concurrency.fcom * cpu_multi));
return 0;
}
@@ -187,7 +200,8 @@ static int opFCOMPP(uint32_t fetchdat)
x87_pop();
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom) : (x87_concurrency.fcom * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -199,7 +213,8 @@ static int opFUCOMPP(uint32_t fetchdat)
cpu_state.npxs |= x87_ucompare(ST(0), ST(1));
x87_pop();
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fucom) : (x87_concurrency.fucom * cpu_multi));
return 0;
}
@@ -211,7 +226,8 @@ static int opFCOMI(uint32_t fetchdat)
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom) : (x87_concurrency.fcom * cpu_multi));
return 0;
}
static int opFCOMIP(uint32_t fetchdat)
@@ -223,7 +239,8 @@ static int opFCOMIP(uint32_t fetchdat)
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fcom) : (x87_timings.fcom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fcom) : (x87_concurrency.fcom * cpu_multi));
return 0;
}
#endif
@@ -234,7 +251,8 @@ static int opFDIV(uint32_t fetchdat)
cpu_state.pc++;
x87_div(ST(0), ST(0), ST(fetchdat & 7));
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int opFDIVr(uint32_t fetchdat)
@@ -243,7 +261,8 @@ static int opFDIVr(uint32_t fetchdat)
cpu_state.pc++;
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int opFDIVP(uint32_t fetchdat)
@@ -253,7 +272,8 @@ static int opFDIVP(uint32_t fetchdat)
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
@@ -263,7 +283,8 @@ static int opFDIVR(uint32_t fetchdat)
cpu_state.pc++;
x87_div(ST(0), ST(fetchdat&7), ST(0));
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int opFDIVRr(uint32_t fetchdat)
@@ -272,7 +293,8 @@ static int opFDIVRr(uint32_t fetchdat)
cpu_state.pc++;
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int opFDIVRP(uint32_t fetchdat)
@@ -282,7 +304,8 @@ static int opFDIVRP(uint32_t fetchdat)
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
@@ -292,7 +315,8 @@ static int opFMUL(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = ST(0) * ST(fetchdat & 7);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
static int opFMULr(uint32_t fetchdat)
@@ -301,7 +325,8 @@ static int opFMULr(uint32_t fetchdat)
cpu_state.pc++;
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
static int opFMULP(uint32_t fetchdat)
@@ -311,7 +336,8 @@ static int opFMULP(uint32_t fetchdat)
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
@@ -321,7 +347,8 @@ static int opFSUB(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = ST(0) - ST(fetchdat & 7);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFSUBr(uint32_t fetchdat)
@@ -330,7 +357,8 @@ static int opFSUBr(uint32_t fetchdat)
cpu_state.pc++;
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFSUBP(uint32_t fetchdat)
@@ -340,7 +368,8 @@ static int opFSUBP(uint32_t fetchdat)
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
@@ -350,7 +379,8 @@ static int opFSUBR(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = ST(fetchdat & 7) - ST(0);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFSUBRr(uint32_t fetchdat)
@@ -359,7 +389,8 @@ static int opFSUBRr(uint32_t fetchdat)
cpu_state.pc++;
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
FP_TAG_VALID_F;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int opFSUBRP(uint32_t fetchdat)
@@ -369,7 +400,8 @@ static int opFSUBRP(uint32_t fetchdat)
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
FP_TAG_VALID_F;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
@@ -380,7 +412,8 @@ static int opFUCOM(uint32_t fetchdat)
cpu_state.pc++;
cpu_state.npxs &= ~(C0|C2|C3);
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fucom) : (x87_concurrency.fucom * cpu_multi));
return 0;
}
@@ -391,7 +424,8 @@ static int opFUCOMP(uint32_t fetchdat)
cpu_state.npxs &= ~(C0|C2|C3);
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fucom) : (x87_concurrency.fucom * cpu_multi));
return 0;
}
@@ -403,7 +437,8 @@ static int opFUCOMI(uint32_t fetchdat)
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fucom) : (x87_concurrency.fucom * cpu_multi));
return 0;
}
static int opFUCOMIP(uint32_t fetchdat)
@@ -415,7 +450,8 @@ static int opFUCOMIP(uint32_t fetchdat)
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fucom) : (x87_timings.fucom * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fucom) : (x87_concurrency.fucom * cpu_multi));
return 0;
}
#endif

101
src/cpu/x87_ops_loadstore.h
View File

@@ -23,7 +23,8 @@ static int opFILDiw_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw(); if (cpu_state.abrt) return 1;
x87_push((double)temp);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -35,7 +36,8 @@ static int opFILDiw_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw(); if (cpu_state.abrt) return 1;
x87_push((double)temp);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
return 0;
}
#endif
@@ -46,7 +48,8 @@ static int opFISTiw_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -56,7 +59,8 @@ static int opFISTiw_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -68,7 +72,8 @@ static int opFISTPiw_a16(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0))); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -79,7 +84,8 @@ static int opFISTPiw_a32(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0))); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return 0;
}
#endif
@@ -95,7 +101,8 @@ static int opFILDiq_a16(uint32_t fetchdat)
cpu_state.MM[cpu_state.TOP&7].q = temp64;
FP_TAG_DEFAULT;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -110,7 +117,8 @@ static int opFILDiq_a32(uint32_t fetchdat)
cpu_state.MM[cpu_state.TOP&7].q = temp64;
FP_TAG_DEFAULT;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#endif
@@ -139,7 +147,8 @@ static int FBSTP_a16(uint32_t fetchdat)
if (ST(0) < 0.0) tempc |= 0x80;
writememb(easeg, cpu_state.eaaddr + 9, tempc); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fbstp) : (x87_concurrency.fbstp * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -167,7 +176,7 @@ static int FBSTP_a32(uint32_t fetchdat)
if (ST(0) < 0.0) tempc |= 0x80;
writememb(easeg, cpu_state.eaaddr + 9, tempc); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
return 0;
}
#endif
@@ -184,7 +193,8 @@ static int FISTPiq_a16(uint32_t fetchdat)
temp64 = x87_fround(ST(0));
seteaq(temp64); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -200,7 +210,8 @@ static int FISTPiq_a32(uint32_t fetchdat)
temp64 = x87_fround(ST(0));
seteaq(temp64); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
return 0;
}
#endif
@@ -213,7 +224,8 @@ static int opFILDil_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal(); if (cpu_state.abrt) return 1;
x87_push((double)templ);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -225,7 +237,8 @@ static int opFILDil_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal(); if (cpu_state.abrt) return 1;
x87_push((double)templ);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
return 0;
}
#endif
@@ -236,7 +249,8 @@ static int opFISTil_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -246,7 +260,8 @@ static int opFISTil_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -258,7 +273,8 @@ static int opFISTPil_a16(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0))); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -269,7 +285,8 @@ static int opFISTPil_a32(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0))); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return 0;
}
#endif
@@ -282,7 +299,8 @@ static int opFLDe_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
t=x87_ld80(); if (cpu_state.abrt) return 1;
x87_push(t);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -294,7 +312,8 @@ static int opFLDe_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
t=x87_ld80(); if (cpu_state.abrt) return 1;
x87_push(t);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#endif
@@ -306,7 +325,8 @@ static int opFSTPe_a16(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -317,7 +337,8 @@ static int opFSTPe_a32(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#endif
@@ -330,7 +351,8 @@ static int opFLDd_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
t.i = geteaq(); if (cpu_state.abrt) return 1;
x87_push(t.d);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -342,7 +364,8 @@ static int opFLDd_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
t.i = geteaq(); if (cpu_state.abrt) return 1;
x87_push(t.d);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
return 0;
}
#endif
@@ -355,7 +378,8 @@ static int opFSTd_a16(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -367,7 +391,8 @@ static int opFSTd_a32(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -381,7 +406,8 @@ static int opFSTPd_a16(uint32_t fetchdat)
t.d = ST(0);
seteaq(t.i); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -394,7 +420,8 @@ static int opFSTPd_a32(uint32_t fetchdat)
t.d = ST(0);
seteaq(t.i); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return 0;
}
#endif
@@ -407,7 +434,8 @@ static int opFLDs_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
ts.i = geteal(); if (cpu_state.abrt) return 1;
x87_push((double)ts.s);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -419,7 +447,8 @@ static int opFLDs_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg);
ts.i = geteal(); if (cpu_state.abrt) return 1;
x87_push((double)ts.s);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#endif
@@ -432,7 +461,8 @@ static int opFSTs_a16(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float)ST(0);
seteal(ts.i);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -444,7 +474,8 @@ static int opFSTs_a32(uint32_t fetchdat)
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float)ST(0);
seteal(ts.i);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -458,7 +489,8 @@ static int opFSTPs_a16(uint32_t fetchdat)
ts.s = (float)ST(0);
seteal(ts.i); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -471,7 +503,8 @@ static int opFSTPs_a32(uint32_t fetchdat)
ts.s = (float)ST(0);
seteal(ts.i); if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#endif

140
src/cpu/x87_ops_misc.h
View File

@@ -15,7 +15,8 @@ static int opFSTSW_AX(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
AX = cpu_state.npxs;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstcw_sw) : (x87_concurrency.fstcw_sw * cpu_multi));
return 0;
}
#endif
@@ -25,7 +26,8 @@ static int opFNOP(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fnop) : (x87_timings.fnop * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fnop) : (x87_timings.fnop * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fnop) : (x87_concurrency.fnop * cpu_multi));
return 0;
}
@@ -34,7 +36,8 @@ static int opFCLEX(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
cpu_state.npxs &= 0xff00;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fnop) : (x87_timings.fnop * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fnop) : (x87_timings.fnop * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fnop) : (x87_concurrency.fnop * cpu_multi));
return 0;
}
@@ -58,7 +61,8 @@ static int opFINIT(uint32_t fetchdat)
#endif
cpu_state.TOP = 0;
cpu_state.ismmx = 0;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.finit) : (x87_timings.finit * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.finit) : (x87_timings.finit * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.finit) : (x87_concurrency.finit * cpu_multi));
CPU_BLOCK_END();
return 0;
}
@@ -73,7 +77,8 @@ static int opFFREE(uint32_t fetchdat)
#else
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3;
#endif
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.ffree) : (x87_timings.ffree * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ffree) : (x87_timings.ffree * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ffree) : (x87_concurrency.ffree * cpu_multi));
return 0;
}
@@ -83,7 +88,8 @@ static int opFFREEP(uint32_t fetchdat)
cpu_state.pc++;
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3; if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.ffree) : (x87_timings.ffree * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ffree) : (x87_timings.ffree * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ffree) : (x87_concurrency.ffree * cpu_multi));
return 0;
}
@@ -93,7 +99,8 @@ static int opFST(uint32_t fetchdat)
cpu_state.pc++;
ST(fetchdat & 7) = ST(0);
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst) : (x87_timings.fst * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst) : (x87_timings.fst * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst) : (x87_concurrency.fst * cpu_multi));
return 0;
}
@@ -104,7 +111,8 @@ static int opFSTP(uint32_t fetchdat)
ST(fetchdat & 7) = ST(0);
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fst) : (x87_timings.fst * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst) : (x87_timings.fst * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst) : (x87_concurrency.fst * cpu_multi));
return 0;
}
@@ -160,7 +168,8 @@ static int FSTOR()
#endif
cpu_state.ismmx = 1;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.frstor) : (x87_timings.frstor * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frstor) : (x87_timings.frstor * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frstor) : (x87_concurrency.frstor * cpu_multi));
return cpu_state.abrt;
}
static int opFSTOR_a16(uint32_t fetchdat)
@@ -330,7 +339,8 @@ static int FSAVE()
cpu_state.TOP = 0;
cpu_state.ismmx = 0;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fsave) : (x87_timings.fsave * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsave) : (x87_timings.fsave * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsave) : (x87_concurrency.fsave * cpu_multi));
return cpu_state.abrt;
}
static int opFSAVE_a16(uint32_t fetchdat)
@@ -358,7 +368,8 @@ static int opFSTSW_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw((cpu_state.npxs & 0xC7FF) | ((cpu_state.TOP & 7) << 11));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstcw_sw) : (x87_concurrency.fstcw_sw * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -368,7 +379,8 @@ static int opFSTSW_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw((cpu_state.npxs & 0xC7FF) | ((cpu_state.TOP & 7) << 11));
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstcw_sw) : (x87_concurrency.fstcw_sw * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -386,7 +398,8 @@ static int opFLD(uint32_t fetchdat)
x87_push(ST(fetchdat&7));
cpu_state.tag[cpu_state.TOP&7] = old_tag;
cpu_state.MM[cpu_state.TOP&7].q = old_i64;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld) : (x87_timings.fld * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld) : (x87_timings.fld * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld) : (x87_concurrency.fld * cpu_multi));
return 0;
}
@@ -407,7 +420,8 @@ static int opFXCH(uint32_t fetchdat)
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q = old_i64;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fxch) : (x87_timings.fxch * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fxch) : (x87_timings.fxch * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fxch) : (x87_concurrency.fxch * cpu_multi));
return 0;
}
@@ -417,7 +431,8 @@ static int opFCHS(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = -ST(0);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fchs) : (x87_timings.fchs * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fchs) : (x87_timings.fchs * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fchs) : (x87_concurrency.fchs * cpu_multi));
return 0;
}
@@ -427,7 +442,8 @@ static int opFABS(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = fabs(ST(0));
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fabs) : (x87_timings.fabs * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fabs) : (x87_timings.fabs * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fabs) : (x87_concurrency.fabs * cpu_multi));
return 0;
}
@@ -438,7 +454,8 @@ static int opFTST(uint32_t fetchdat)
cpu_state.npxs &= ~(C0|C2|C3);
if (ST(0) == 0.0) cpu_state.npxs |= C3;
else if (ST(0) < 0.0) cpu_state.npxs |= C0;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ftst) : (x87_concurrency.ftst * cpu_multi));
return 0;
}
@@ -455,7 +472,8 @@ static int opFXAM(uint32_t fetchdat)
else if (ST(0) == 0.0) cpu_state.npxs |= C3;
else cpu_state.npxs |= C2;
if (ST(0) < 0.0) cpu_state.npxs |= C1;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fxam) : (x87_timings.fxam * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fxam) : (x87_timings.fxam * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fxam) : (x87_concurrency.fxam * cpu_multi));
return 0;
}
@@ -464,7 +482,8 @@ static int opFLD1(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push(1.0);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_z1) : (x87_timings.fld_z1 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_z1) : (x87_timings.fld_z1 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_z1) : (x87_concurrency.fld_z1 * cpu_multi));
return 0;
}
@@ -473,7 +492,8 @@ static int opFLDL2T(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push(3.3219280948873623);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_const) : (x87_concurrency.fld_const * cpu_multi));
return 0;
}
@@ -482,7 +502,8 @@ static int opFLDL2E(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push(1.4426950408889634);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_const) : (x87_concurrency.fld_const * cpu_multi));
return 0;
}
@@ -491,7 +512,8 @@ static int opFLDPI(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push(3.141592653589793);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_const) : (x87_concurrency.fld_const * cpu_multi));
return 0;
}
@@ -500,7 +522,8 @@ static int opFLDEG2(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push(0.3010299956639812);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_const) : (x87_concurrency.fld_const * cpu_multi));
return 0;
}
@@ -509,7 +532,8 @@ static int opFLDLN2(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
x87_push_u64(0x3fe62e42fefa39f0ull);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_const) : (x87_timings.fld_const * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_const) : (x87_concurrency.fld_const * cpu_multi));
return 0;
}
@@ -519,7 +543,8 @@ static int opFLDZ(uint32_t fetchdat)
cpu_state.pc++;
x87_push(0.0);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fld_z1) : (x87_timings.fld_z1 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_z1) : (x87_timings.fld_z1 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_z1) : (x87_concurrency.fld_z1 * cpu_multi));
return 0;
}
@@ -529,7 +554,8 @@ static int opF2XM1(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = pow(2.0, ST(0)) - 1.0;
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.f2xm1) : (x87_timings.f2xm1 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.f2xm1) : (x87_timings.f2xm1 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.f2xm1) : (x87_concurrency.f2xm1 * cpu_multi));
return 0;
}
@@ -540,7 +566,8 @@ static int opFYL2X(uint32_t fetchdat)
ST(1) = ST(1) * (log(ST(0)) / log(2.0));
FP_TAG_VALID_N;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fyl2x) : (x87_timings.fyl2x * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fyl2x) : (x87_timings.fyl2x * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fyl2x) : (x87_concurrency.fyl2x * cpu_multi));
return 0;
}
@@ -551,7 +578,8 @@ static int opFYL2XP1(uint32_t fetchdat)
ST(1) = ST(1) * (log1p(ST(0)) / log(2.0));
FP_TAG_VALID_N;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fyl2xp1) : (x87_timings.fyl2xp1 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fyl2xp1) : (x87_timings.fyl2xp1 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fyl2xp1) : (x87_concurrency.fyl2xp1 * cpu_multi));
return 0;
}
@@ -563,7 +591,8 @@ static int opFPTAN(uint32_t fetchdat)
FP_TAG_VALID;
x87_push(1.0);
cpu_state.npxs &= ~C2;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fptan) : (x87_timings.fptan * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fptan) : (x87_timings.fptan * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fptan) : (x87_concurrency.fptan * cpu_multi));
return 0;
}
@@ -574,7 +603,8 @@ static int opFPATAN(uint32_t fetchdat)
ST(1) = atan2(ST(1), ST(0));
FP_TAG_VALID_N;
x87_pop();
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fpatan) : (x87_timings.fpatan * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fpatan) : (x87_timings.fpatan * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fpatan) : (x87_concurrency.fpatan * cpu_multi));
return 0;
}
@@ -587,7 +617,8 @@ static int opFDECSTP(uint32_t fetchdat)
#else
cpu_state.TOP = (cpu_state.TOP - 1) & 7;
#endif
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fincdecstp) : (x87_timings.fincdecstp * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fincdecstp) : (x87_timings.fincdecstp * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fincdecstp) : (x87_concurrency.fincdecstp * cpu_multi));
return 0;
}
@@ -600,7 +631,8 @@ static int opFINCSTP(uint32_t fetchdat)
#else
cpu_state.TOP = (cpu_state.TOP + 1) & 7;
#endif
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fincdecstp) : (x87_timings.fincdecstp * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fincdecstp) : (x87_timings.fincdecstp * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fincdecstp) : (x87_concurrency.fincdecstp * cpu_multi));
return 0;
}
@@ -616,7 +648,8 @@ static int opFPREM(uint32_t fetchdat)
if (temp64 & 4) cpu_state.npxs|=C0;
if (temp64 & 2) cpu_state.npxs|=C3;
if (temp64 & 1) cpu_state.npxs|=C1;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fprem) : (x87_timings.fprem * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fprem) : (x87_timings.fprem * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fprem) : (x87_concurrency.fprem * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -632,7 +665,8 @@ static int opFPREM1(uint32_t fetchdat)
if (temp64 & 4) cpu_state.npxs|=C0;
if (temp64 & 2) cpu_state.npxs|=C3;
if (temp64 & 1) cpu_state.npxs|=C1;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fprem1) : (x87_timings.fprem1 * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fprem1) : (x87_timings.fprem1 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fprem1) : (x87_concurrency.fprem1 * cpu_multi));
return 0;
}
#endif
@@ -643,7 +677,8 @@ static int opFSQRT(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = sqrt(ST(0));
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fsqrt) : (x87_timings.fsqrt * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsqrt) : (x87_timings.fsqrt * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsqrt) : (x87_concurrency.fsqrt * cpu_multi));
return 0;
}
@@ -658,7 +693,8 @@ static int opFSINCOS(uint32_t fetchdat)
FP_TAG_VALID;
x87_push(cos(td));
cpu_state.npxs &= ~C2;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fsincos) : (x87_timings.fsincos * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsincos) : (x87_timings.fsincos * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsincos) : (x87_concurrency.fsincos * cpu_multi));
return 0;
}
#endif
@@ -669,7 +705,8 @@ static int opFRNDINT(uint32_t fetchdat)
cpu_state.pc++;
ST(0) = (double)x87_fround(ST(0));
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
@@ -682,7 +719,8 @@ static int opFSCALE(uint32_t fetchdat)
if(ST(0) != 0.0)
ST(0) = ST(0) * pow(2.0, (double)temp64);
FP_TAG_VALID;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fscale) : (x87_timings.fscale * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fscale) : (x87_timings.fscale * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fscale) : (x87_concurrency.fscale * cpu_multi));
return 0;
}
@@ -694,7 +732,8 @@ static int opFSIN(uint32_t fetchdat)
ST(0) = sin(ST(0));
FP_TAG_VALID;
cpu_state.npxs &= ~C2;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fsin_cos) : (x87_timings.fsin_cos * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsin_cos) : (x87_timings.fsin_cos * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsin_cos) : (x87_concurrency.fsin_cos * cpu_multi));
return 0;
}
@@ -705,7 +744,8 @@ static int opFCOS(uint32_t fetchdat)
ST(0) = cos(ST(0));
FP_TAG_VALID;
cpu_state.npxs &= ~C2;
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fsin_cos) : (x87_timings.fsin_cos * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsin_cos) : (x87_timings.fsin_cos * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsin_cos) : (x87_concurrency.fsin_cos * cpu_multi));
return 0;
}
#endif
@@ -733,7 +773,8 @@ static int FLDENV()
cpu_state.TOP = (cpu_state.npxs >> 11) & 7;
break;
}
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fldenv) : (x87_timings.fldenv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fldenv) : (x87_timings.fldenv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fldenv) : (x87_concurrency.fldenv * cpu_multi));
return cpu_state.abrt;
}
@@ -766,7 +807,8 @@ static int opFLDCW_a16(uint32_t fetchdat)
if (cpu_state.abrt) return 1;
cpu_state.npxc = tempw;
codegen_set_rounding_mode((cpu_state.npxc >> 10) & 3);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fldcw) : (x87_timings.fldcw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fldcw) : (x87_timings.fldcw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fldcw) : (x87_concurrency.fldcw * cpu_multi));
return 0;
}
#ifndef FPU_8087
@@ -780,7 +822,8 @@ static int opFLDCW_a32(uint32_t fetchdat)
if (cpu_state.abrt) return 1;
cpu_state.npxc = tempw;
codegen_set_rounding_mode((cpu_state.npxc >> 10) & 3);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fldcw) : (x87_timings.fldcw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fldcw) : (x87_timings.fldcw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fldcw) : (x87_concurrency.fldcw * cpu_multi));
return 0;
}
#endif
@@ -826,7 +869,8 @@ static int FSTENV()
writememl(easeg,cpu_state.eaaddr+24,x87_op_seg);
break;
}
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstenv) : (x87_timings.fstenv * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstenv) : (x87_timings.fstenv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstenv) : (x87_concurrency.fstenv * cpu_multi));
return cpu_state.abrt;
}
@@ -855,7 +899,8 @@ static int opFSTCW_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(cpu_state.npxc);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstenv) : (x87_concurrency.fstenv * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
@@ -865,7 +910,8 @@ static int opFSTCW_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(cpu_state.npxc);
CLOCK_CYCLES((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fstcw_sw) : (x87_timings.fstcw_sw * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fstcw_sw) : (x87_concurrency.fstcw_sw * cpu_multi));
return cpu_state.abrt;
}
#endif
@@ -882,7 +928,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
ST(0) = ST(fetchdat & 7); \
} \
CLOCK_CYCLES(4); \
CLOCK_CYCLES_FPU(4); \
return 0; \
}

155
src/cpu/x87_timings.c
View File

@@ -8,6 +8,7 @@
#include "x87_timings.h"
x87_timings_t x87_timings;
x87_timings_t x87_concurrency;
const x87_timings_t x87_timings_8087 =
{
@@ -313,3 +314,157 @@ const x87_timings_t x87_timings_486 =
.fyl2x = (196 + 329) / 2,
.fyl2xp1 = (171 + 326) / 2
};
/* this should be used for FPUs with no concurrency.
some pre-486DX Cyrix FPUs reportedly are like this. */
const x87_timings_t x87_concurrency_none =
{
.f2xm1 = 0,
.fabs = 0,
.fadd = 0,
.fadd_32 = 0,
.fadd_64 = 0,
.fbld = 0,
.fbstp = 0,
.fchs = 0,
.fclex = 0,
.fcom = 0,
.fcom_32 = 0,
.fcom_64 = 0,
.fcos = 0,
.fincdecstp = 0,
.fdisi_eni = 0,
.fdiv = 0,
.fdiv_32 = 0,
.fdiv_64 = 0,
.ffree = 0,
.fadd_i16 = 0,
.fadd_i32 = 0,
.fcom_i16 = 0,
.fcom_i32 = 0,
.fdiv_i16 = 0,
.fdiv_i32 = 0,
.fild_16 = 0,
.fild_32 = 0,
.fild_64 = 0,
.fmul_i16 = 0,
.fmul_i32 = 0,
.finit = 0,
.fist_16 = 0,
.fist_32 = 0,
.fist_64 = 0,
.fld = 0,
.fld_32 = 0,
.fld_64 = 0,
.fld_80 = 0,
.fld_z1 = 0,
.fld_const = 0,
.fldcw = 0,
.fldenv = 0,
.fmul = 0,
.fmul_32 = 0,
.fmul_64 = 0,
.fnop = 0,
.fpatan = 0,
.fprem = 0,
.fprem1 = 0,
.fptan = 0,
.frndint = 0,
.frstor = 0,
.fsave = 0,
.fscale = 0,
.fsetpm = 0,
.fsin_cos = 0,
.fsincos = 0,
.fsqrt = 0,
.fst = 0,
.fst_32 = 0,
.fst_64 = 0,
.fst_80 = 0,
.fstcw_sw = 0,
.fstenv = 0,
.ftst = 0,
.fucom = 0,
.fwait = 0,
.fxam = 0,
.fxch = 0,
.fxtract = 0,
.fyl2x = 0,
.fyl2xp1 = 0,
};
const x87_timings_t x87_concurrency_486 =
{
.f2xm1 = 2,
.fabs = 0,
.fadd = 7,
.fadd_32 = 7,
.fadd_64 = 7,
.fbld = 8,
.fbstp = 0,
.fchs = 0,
.fclex = 0,
.fcom = 1,
.fcom_32 = 1,
.fcom_64 = 1,
.fcos = 2,
.fincdecstp = 0,
.fdisi_eni = 0,
.fdiv = 70,
.fdiv_32 = 70,
.fdiv_64 = 70,
.ffree = 0,
.fadd_i16 = 7,
.fadd_i32 = 7,
.fcom_i16 = 1,
.fcom_i32 = 1,
.fdiv_i16 = 70,
.fdiv_i32 = 70,
.fild_16 = 4,
.fild_32 = 4,
.fild_64 = 8,
.fmul_i16 = 8,
.fmul_i32 = 8,
.finit = 0,
.fist_16 = 0,
.fist_32 = 0,
.fist_64 = 0,
.fld = 0,
.fld_32 = 0,
.fld_64 = 0,
.fld_80 = 0,
.fld_z1 = 0,
.fld_const = 2,
.fldcw = 0,
.fldenv = 0,
.fmul = 13,
.fmul_32 = 8,
.fmul_64 = 11,
.fnop = 0,
.fpatan = 5,
.fprem = 2,
.fprem1 = 6,
.fptan = 70,
.frndint = 0,
.frstor = 0,
.fsave = 0,
.fscale = 2,
.fsetpm = 0,
.fsin_cos = 2,
.fsincos = 2,
.fsqrt = 70,
.fst = 0,
.fst_32 = 0,
.fst_64 = 0,
.fst_80 = 0,
.fstcw_sw = 0,
.fstenv = 0,
.ftst = 1,
.fucom = 1,
.fwait = 0,
.fxam = 0,
.fxch = 0,
.fxtract = 4,
.fyl2x = 13,
.fyl2xp1 = 13,
};

5
src/cpu/x87_timings.h
View File

@@ -53,4 +53,7 @@ extern const x87_timings_t x87_timings_287;
extern const x87_timings_t x87_timings_387;
extern const x87_timings_t x87_timings_486;
extern x87_timings_t x87_timings;
extern const x87_timings_t x87_concurrency_486;
extern x87_timings_t x87_timings;
extern x87_timings_t x87_concurrency;

10
src/device.c
View File

@@ -378,9 +378,7 @@ device_get_name(const device_t *d, int bus, char *name)
name[0] = 0x00;
if (bus) {
if (d->flags & DEVICE_LPT)
sbus = "LPT";
else if (d->flags & DEVICE_ISA)
if (d->flags & DEVICE_ISA)
sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA";
else if (d->flags & DEVICE_CBUS)
sbus = "C-BUS";
@@ -396,6 +394,10 @@ device_get_name(const device_t *d, int bus, char *name)
sbus = "AGP";
else if (d->flags & DEVICE_AC97)
sbus = "AMR";
else if (d->flags & DEVICE_COM)
sbus = "COM";
else if (d->flags & DEVICE_LPT)
sbus = "LPT";
if (sbus != NULL) {
/* First concatenate [<Bus>] before the device's name. */
@@ -406,7 +408,7 @@ device_get_name(const device_t *d, int bus, char *name)
/* Then change string from ISA16 to ISA if applicable. */
if (!strcmp(sbus, "ISA16"))
sbus = "ISA";
else if (!strcmp(sbus, "LPT")) {
else if (!strcmp(sbus, "COM")|| !strcmp(sbus, "LPT")) {
sbus = NULL;
strcat(name, d->name);
return;

14
src/device/CMakeLists.txt
View File

@@ -21,4 +21,16 @@ add_library(dev OBJECT bugger.c cassette.c cartridge.c hasp.c hwm.c hwm_lm75.c h
if(LASERXT)
target_compile_definitions(dev PRIVATE USE_LASERXT)
endif()
endif()
if(ISAMEM_RAMPAGE)
target_compile_definitions(dev PRIVATE USE_ISAMEM_RAMPAGE)
endif()
if(ISAMEM_IAB)
target_compile_definitions(dev PRIVATE USE_ISAMEM_IAB)
endif()
if(ISAMEM_BRAT)
target_compile_definitions(dev PRIVATE USE_ISAMEM_BRAT)
endif()

24
src/device/ibm_5161.c
View File

@@ -54,15 +54,29 @@ ibm_5161_in(uint16_t port, void *priv)
ret = dev->regs[port & 0x0007];
switch (port) {
case 0x211:
case 0x215:
case 0x210: /* Write to latch expansion bus data (ED0-ED7) */
/* Read to verify expansion bus data (ED0-ED7) */
break;
case 0x214: /* Write to latch data bus bits (DO - 07) */
/* Read data bus bits (DO - D7) */
break;
case 0x211: /* Read high-order address bits (A8 - A 15) */
case 0x215: /* Read high-order address bits (A8 - A 15) */
ret = (get_last_addr() >> 8) & 0xff;
break;
case 0x212:
case 0x216:
case 0x212: /* Read low-order address bits (A0 - A7) */
case 0x216: /* Read low-order address bits (A0 - A7) */
ret = get_last_addr() & 0xff;
break;
case 0x213:
case 0x213: /* Write 00 to disable expansion unit */
/* Write 01 to enable expansion unit */
/* Read status of expansion unit
00 = enable/disable
01 = wait-state request flag
02-03 = not used
04-07 = switch position
1 = Off
0 =On */
ret = dev->regs[3] & 0x01;
break;
}

356
src/device/isamem.c
View File

@@ -84,6 +84,17 @@
#include "cpu.h"
#define ISAMEM_IBMXT_CARD 0
#define ISAMEM_GENXT_CARD 1
#define ISAMEM_IBMAT_CARD 2
#define ISAMEM_GENAT_CARD 3
#define ISAMEM_P5PAK_CARD 4
#define ISAMEM_A6PAK_CARD 5
#define ISAMEM_EMS5150_CARD 6
#define ISAMEM_EV159_CARD 10
#define ISAMEM_RAMPAGEXT_CARD 11
#define ISAMEM_ABOVEBOARD_CARD 12
#define ISAMEM_BRAT_CARD 13
#define ISAMEM_DEBUG 0
@@ -95,6 +106,9 @@
#define EMS_PGSIZE (16 << 10) /* one page is this big */
#define EMS_MAXPAGE 4 /* number of viewport pages */
#define EXTRAM_CONVENTIONAL 0
#define EXTRAM_HIGH 1
#define EXTRAM_XMS 2
typedef struct {
int8_t enabled; /* 1=ENABLED */
@@ -398,28 +412,31 @@ isamem_init(const device_t *info)
/* Do per-board initialization. */
tot = 0;
switch(dev->board) {
case 0: /* IBM PC/XT Memory Expansion Card */
case 2: /* Paradise Systems 5-PAK */
case ISAMEM_IBMXT_CARD: /* IBM PC/XT Memory Expansion Card */
case ISAMEM_GENXT_CARD: /* Generic PC/XT Memory Expansion Card */
case ISAMEM_P5PAK_CARD: /* Paradise Systems 5-PAK */
case ISAMEM_A6PAK_CARD: /* AST SixPakPlus */
dev->total_size = device_get_config_int("size");
dev->start_addr = device_get_config_int("start");
tot = dev->total_size;
break;
case 1: /* IBM PC/AT Memory Expansion Card */
case ISAMEM_IBMAT_CARD: /* IBM PC/AT Memory Expansion Card */
case ISAMEM_GENAT_CARD: /* Generic PC/AT Memory Expansion Card */
dev->total_size = device_get_config_int("size");
dev->start_addr = device_get_config_int("start");
tot = dev->total_size;
dev->flags |= FLAG_WIDE;
break;
case 3: /* Micro Mainframe EMS-5150(T) */
case ISAMEM_EMS5150_CARD: /* Micro Mainframe EMS-5150(T) */
dev->base_addr = device_get_config_hex16("base");
dev->total_size = device_get_config_int("size");
dev->frame_addr = 0xD0000;
dev->flags |= (FLAG_EMS | FLAG_CONFIG);
break;
case 10: /* Everex EV-159 RAM 3000 */
case ISAMEM_EV159_CARD: /* Everex EV-159 RAM 3000 */
dev->base_addr = device_get_config_hex16("base");
dev->total_size = device_get_config_int("size");
dev->start_addr = device_get_config_int("start");
@@ -433,7 +450,9 @@ isamem_init(const device_t *info)
dev->frame_addr = 0xE0000;
break;
case 11:
case ISAMEM_RAMPAGEXT_CARD: /* AST RAMpage/XT */
case ISAMEM_ABOVEBOARD_CARD: /* Intel AboveBoard */
case ISAMEM_BRAT_CARD: /* BocaRAM/AT */
dev->base_addr = device_get_config_hex16("base");
dev->total_size = device_get_config_int("size");
dev->start_addr = device_get_config_int("start");
@@ -496,8 +515,8 @@ dev->frame_addr = 0xE0000;
t = tot;
isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10);
dev->ext_ram[0].ptr = ptr;
dev->ext_ram[0].base = addr;
dev->ext_ram[EXTRAM_CONVENTIONAL].ptr = ptr;
dev->ext_ram[EXTRAM_CONVENTIONAL].base = addr;
/* Create, initialize and enable the low-memory mapping. */
mem_mapping_add(&dev->low_mapping, addr, t,
@@ -507,7 +526,7 @@ dev->frame_addr = 0xE0000;
ram_writeb,
(dev->flags&FLAG_WIDE) ? ram_writew : NULL,
NULL,
ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[0]);
ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_CONVENTIONAL]);
/* Tell the memory system this is external RAM. */
mem_set_mem_state(addr, t,
@@ -531,8 +550,8 @@ dev->frame_addr = 0xE0000;
isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10);
dev->ext_ram[1].ptr = ptr;
dev->ext_ram[1].base = addr + tot;
dev->ext_ram[EXTRAM_HIGH].ptr = ptr;
dev->ext_ram[EXTRAM_HIGH].base = addr + tot;
/* Update and enable the remap. */
mem_mapping_set(&ram_remapped_mapping,
@@ -540,7 +559,7 @@ dev->frame_addr = 0xE0000;
ram_readb, ram_readw, NULL,
ram_writeb, ram_writew, NULL,
ptr, MEM_MAPPING_EXTERNAL,
&dev->ext_ram[1]);
&dev->ext_ram[EXTRAM_HIGH]);
mem_mapping_disable(&ram_remapped_mapping);
/* Tell the memory system this is external RAM. */
@@ -565,14 +584,14 @@ dev->frame_addr = 0xE0000;
t = tot;
isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10);
dev->ext_ram[2].ptr = ptr;
dev->ext_ram[2].base = addr;
dev->ext_ram[EXTRAM_XMS].ptr = ptr;
dev->ext_ram[EXTRAM_XMS].base = addr;
/* Create, initialize and enable the high-memory mapping. */
mem_mapping_add(&dev->high_mapping, addr, t,
ram_readb, ram_readw, NULL,
ram_writeb, ram_writew, NULL,
ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[2]);
ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_XMS]);
/* Tell the memory system this is external RAM. */
mem_set_mem_state(addr, t, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
@@ -583,6 +602,8 @@ dev->frame_addr = 0xE0000;
addr += t;
}
isa_mem_size += dev->total_size - (k >> 10);
/* If EMS is enabled, use the remainder for EMS. */
if (dev->flags & FLAG_EMS) {
/* EMS 3.2 cannot have more than 2048KB per board. */
@@ -663,7 +684,7 @@ static const device_config_t ibmxt_config[] =
},
{
"start", "Start Address", CONFIG_SPINNER, "", 256, "",
{ 0, 640-64, 64 },
{ 0, 576, 64 },
{ { 0 } }
},
{
@@ -674,23 +695,50 @@ static const device_config_t ibmxt_config[] =
static const device_t ibmxt_device = {
"IBM PC/XT Memory Expansion",
DEVICE_ISA,
0,
ISAMEM_IBMXT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
ibmxt_config
};
static const device_config_t genericxt_config[] =
{
{
"size", "Memory Size", CONFIG_SPINNER, "", 16, "",
{ 0, 640, 16 },
{ { 0 } }
},
{
"start", "Start Address", CONFIG_SPINNER, "", 0, "",
{ 0, 624, 16 },
{ { 0 } }
},
{
"", "", -1
}
};
static const device_t genericxt_device = {
"Generic PC/XT Memory Expansion",
DEVICE_ISA,
ISAMEM_GENXT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
genericxt_config
};
static const device_config_t ibmat_config[] =
{
{
"size", "Memory Size", CONFIG_SPINNER, "", 512, "",
{ 0, 4096, 512 },
{ 0, 12288, 512 },
{ { 0 } }
},
{
"start", "Start Address", CONFIG_SPINNER, "", 512, "",
{ 0, 16128, 128 },
{ 0, 15872, 512 },
{ { 0 } }
},
{
@@ -701,13 +749,40 @@ static const device_config_t ibmat_config[] =
static const device_t ibmat_device = {
"IBM PC/AT Memory Expansion",
DEVICE_ISA,
1,
ISAMEM_IBMAT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
ibmat_config
};
static const device_config_t genericat_config[] =
{
{
"size", "Memory Size", CONFIG_SPINNER, "", 512, "",
{ 0, 16384, 512 },
{ { 0 } }
},
{
"start", "Start Address", CONFIG_SPINNER, "", 512, "",
{ 0, 15872, 128 },
{ { 0 } }
},
{
"", "", -1
}
};
static const device_t genericat_device = {
"Generic PC/AT Memory Expansion",
DEVICE_ISA,
ISAMEM_GENAT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
genericat_config
};
static const device_config_t p5pak_config[] =
{
{
@@ -728,13 +803,40 @@ static const device_config_t p5pak_config[] =
static const device_t p5pak_device = {
"Paradise Systems 5-PAK",
DEVICE_ISA,
2,
ISAMEM_P5PAK_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
p5pak_config
};
static const device_config_t a6pak_config[] =
{
{
"size", "Memory Size", CONFIG_SPINNER, "", 64, "",
{ 0, 576, 64 },
{ { 0 } }
},
{
"start", "Start Address", CONFIG_SPINNER, "", 256, "",
{ 64, 512, 64 },
{ { 0 } }
},
{
"", "", -1
}
};
static const device_t a6pak_device = {
"AST SixPakPlus",
DEVICE_ISA,
ISAMEM_A6PAK_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
a6pak_config
};
static const device_config_t ems5150_config[] =
{
{
@@ -774,7 +876,7 @@ static const device_config_t ems5150_config[] =
static const device_t ems5150_device = {
"Micro Mainframe EMS-5150(T)",
DEVICE_ISA,
3,
ISAMEM_EMS5150_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
ems5150_config
@@ -877,13 +979,103 @@ static const device_config_t ev159_config[] =
static const device_t ev159_device = {
"Everex EV-159 RAM 3000 Deluxe",
DEVICE_ISA,
10,
ISAMEM_EV159_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
ev159_config
};
#ifdef USE_ISAMEM_BRAT
static const device_config_t brat_config[] =
{
{
"base", "Address", CONFIG_HEX16, "", 0x0258, "", { 0 },
{
{
"208H", 0x0208
},
{
"218H", 0x0218
},
{
"258H", 0x0258
},
{
"268H", 0x0268
},
{
""
}
},
},
{
"frame", "Frame Address", CONFIG_HEX20, "", 0, "", { 0 },
{
{
"Disabled", 0x00000
},
{
"D000H", 0xD0000
},
{
"E000H", 0xE0000
},
{
""
}
},
},
{
"width", "I/O Width", CONFIG_SELECTION, "", 8, "", { 0 },
{
{
"8-bit", 8
},
{
"16-bit", 16
},
{
""
}
},
},
{
"speed", "Transfer Speed", CONFIG_SELECTION, "", 0, "", { 0 },
{
{
"Standard", 0
},
{
"High-Speed", 1
},
{
""
}
}
},
{
"size", "Memory Size", CONFIG_SPINNER, "", 128,
"",
{ 0, 8192, 512 },
{ 0 }
},
{
"", "", -1
}
};
static const device_t brat_device = {
"BocaRAM/AT",
DEVICE_ISA,
ISAMEM_BRAT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
brat_config
};
#endif
#ifdef USE_ISAMEM_RAMPAGE
static const device_config_t rampage_config[] =
{
@@ -975,10 +1167,10 @@ static const device_config_t rampage_config[] =
}
};
static const device_t isamem_rampage_device = {
static const device_t rampage_device = {
"AST RAMpage/XT",
DEVICE_ISA,
11,
ISAMEM_RAMPAGEXT_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
rampage_config
@@ -986,14 +1178,119 @@ static const device_t isamem_rampage_device = {
#endif
#ifdef USE_ISAMEM_IAB
static const device_config_t iab_config[] =
{
{
"base", "Address", CONFIG_HEX16, "", 0x0258, "", { 0 },
{
{
"208H", 0x0208
},
{
"218H", 0x0218
},
{
"258H", 0x0258
},
{
"268H", 0x0268
},
{
"2A8H", 0x02A8
},
{
"2B8H", 0x02B8
},
{
"2E8H", 0x02E8
},
{
""
}
},
},
{
"frame", "Frame Address", CONFIG_HEX20, "", 0, "", { 0 },
{
{
"Disabled", 0x00000
},
{
"C000H", 0xC0000
},
{
"D000H", 0xD0000
},
{
"E000H", 0xE0000
},
{
""
}
},
},
{
"width", "I/O Width", CONFIG_SELECTION, "", 8, "", { 0 },
{
{
"8-bit", 8
},
{
"16-bit", 16
},
{
""
}
},
},
{
"speed", "Transfer Speed", CONFIG_SELECTION, "", 0, "", { 0 },
{
{
"Standard", 0
},
{
"High-Speed", 1
},
{
""
}
}
},
{
"size", "Memory Size", CONFIG_SPINNER, "", 128,
"",
{ 0, 8192, 128 },
{ 0 }
},
{
"", "", -1
}
};
static const device_t iab_device = {
"Intel AboveBoard",
DEVICE_ISA,
ISAMEM_ABOVEBOARD_CARD,
isamem_init, isamem_close, NULL,
{ NULL }, NULL, NULL,
iab_config
};
#endif
static const struct {
const char *internal_name;
const device_t *dev;
} boards[] = {
{ "none", NULL },
{ "none", NULL },
{ "ibmxt", &ibmxt_device },
{ "genericxt", &genericxt_device },
{ "ibmat", &ibmat_device },
{ "genericat", &genericat_device },
{ "p5pak", &p5pak_device },
{ "a6pak", &a6pak_device },
{ "ems5150", &ems5150_device },
{ "ev159", &ev159_device },
#ifdef USE_ISAMEM_BRAT
@@ -1003,9 +1300,9 @@ static const struct {
{ "rampage", &rampage_device },
#endif
#ifdef USE_ISAMEM_IAB
{ "iab", &iab_device },
{ "iab", &iab_device },
#endif
{ "", NULL }
{ "", NULL }
};
@@ -1014,6 +1311,9 @@ isamem_reset(void)
{
int k, i;
/* We explicitly set to zero here or bad things happen */
isa_mem_size = 0;
for (i = 0; i < ISAMEM_MAX; i++) {
k = isamem_type[i];
if (k == 0) continue;

55
src/device/isartc.c
View File

@@ -83,6 +83,11 @@
#include <86box/isartc.h>
#define ISARTC_EV170 0
#define ISARTC_DTK 1
#define ISARTC_P5PAK 2
#define ISARTC_A6PAK 3
#define ISARTC_DEBUG 0
@@ -506,7 +511,7 @@ isartc_init(const device_t *info)
/* Do per-board initialization. */
switch(dev->board) {
case 0: /* Everex EV-170 Magic I/O */
case ISARTC_EV170: /* Everex EV-170 Magic I/O */
dev->flags |= FLAG_YEAR80;
dev->base_addr = device_get_config_hex16("base");
dev->base_addrsz = 32;
@@ -519,7 +524,7 @@ isartc_init(const device_t *info)
dev->year = MM67_AL_DOM; /* year, NON STANDARD */
break;
case 1: /* DTK PII-147 Hexa I/O Plus */
case ISARTC_DTK: /* DTK PII-147 Hexa I/O Plus */
dev->flags |= FLAG_YEARBCD;
dev->base_addr = device_get_config_hex16("base");
dev->base_addrsz = 32;
@@ -531,7 +536,8 @@ isartc_init(const device_t *info)
dev->year = MM67_AL_HUNTEN; /* year, NON STANDARD */
break;
case 2: /* Paradise Systems 5PAK */
case ISARTC_P5PAK: /* Paradise Systems 5PAK */
case ISARTC_A6PAK: /* AST SixPakPlus */
dev->flags |= FLAG_YEAR80;
dev->base_addr = 0x02c0;
dev->base_addrsz = 32;
@@ -627,7 +633,7 @@ static const device_config_t ev170_config[] = {
static const device_t ev170_device = {
"Everex EV-170 Magic I/O",
DEVICE_ISA,
0,
ISARTC_EV170,
isartc_init, isartc_close, NULL,
{ NULL }, NULL, NULL,
ev170_config
@@ -657,7 +663,7 @@ static const device_config_t pii147_config[] = {
static const device_t pii147_device = {
"DTK PII-147 Hexa I/O Plus",
DEVICE_ISA,
1,
ISARTC_DTK,
isartc_init, isartc_close, NULL,
{ NULL }, NULL, NULL,
pii147_config
@@ -693,13 +699,49 @@ static const device_config_t p5pak_config[] = {
static const device_t p5pak_device = {
"Paradise Systems 5-PAK",
DEVICE_ISA,
2,
ISARTC_P5PAK,
isartc_init, isartc_close, NULL,
{ NULL }, NULL, NULL,
p5pak_config
};
static const device_config_t a6pak_config[] = {
{
"irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 },
{
{
"Disabled", -1
},
{
"IRQ2", 2
},
{
"IRQ3", 3
},
{
"IRQ5", 5
},
{
""
}
},
},
{
"", "", -1
}
};
static const device_t a6pak_device = {
"AST SixPakPlus",
DEVICE_ISA,
ISARTC_A6PAK,
isartc_init, isartc_close, NULL,
{ NULL }, NULL, NULL,
a6pak_config
};
static const struct {
const char *internal_name;
const device_t *dev;
@@ -708,6 +750,7 @@ static const struct {
{ "ev170", &ev170_device },
{ "pii147", &pii147_device },
{ "p5pak", &p5pak_device },
{ "a6pak", &a6pak_device },
{ "", NULL },
};

180
src/device/keyboard_xt.c
View File

@@ -55,6 +55,17 @@
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
// Keyboard Types
#define KBD_TYPE_PC81 0
#define KBD_TYPE_PC82 1
#define KBD_TYPE_XT82 2
#define KBD_TYPE_XT86 3
#define KBD_TYPE_COMPAQ 4
#define KBD_TYPE_TANDY 5
#define KBD_TYPE_TOSHIBA 6
#define KBD_TYPE_VTECH 7
#define KBD_TYPE_OLIVETTI 8
#define KBD_TYPE_ZENITH 9
typedef struct {
int want_irq;
@@ -357,8 +368,8 @@ kbd_log(const char *fmt, ...)
#endif
static uint8_t
get_fdd_switch_settings(){
get_fdd_switch_settings() {
int i, fdd_count = 0;
for (i = 0; i < FDD_NUM; i++) {
@@ -369,20 +380,18 @@ get_fdd_switch_settings(){
if (!fdd_count)
return 0x00;
else
return ((fdd_count - 1) << 6) | 0x01;
return ((fdd_count - 1) << 6) | 0x01;
}
static uint8_t
get_videomode_switch_settings(){
get_videomode_switch_settings() {
if (video_is_mda())
return 0x30;
else if (video_is_cga())
return 0x20; /* 0x10 would be 40x25 */
else
return 0x00;
return 0x00;
}
static void
@@ -392,7 +401,7 @@ kbd_poll(void *priv)
timer_advance_u64(&kbd->send_delay_timer, 1000 * TIMER_USEC);
if (!(kbd->pb & 0x40) && (kbd->type != 5))
if (!(kbd->pb & 0x40) && (kbd->type != KBD_TYPE_TANDY))
return;
if (kbd->want_irq) {
@@ -504,7 +513,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
xtkbd_t *kbd = (xtkbd_t *)priv;
switch (port) {
case 0x61:
case 0x61: /* Keyboard Control Register (aka Port B) */
if (!(kbd->pb & 0x40) && (val & 0x40)) {
key_queue_start = key_queue_end = 0;
kbd->want_irq = 0;
@@ -514,9 +523,9 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
kbd->pb = val;
ppi.pb = val;
timer_process();
timer_process();
if ((kbd->type <= 1) && (cassette != NULL))
if (((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) && (cassette != NULL))
pc_cas_set_motor(cassette, (kbd->pb & 0x08) == 0);
speaker_update();
@@ -535,13 +544,13 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
}
#ifdef ENABLE_KEYBOARD_XT_LOG
if (kbd->type <= 1)
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82))
kbd_log("Cassette motor is %s\n", !(val & 0x08) ? "ON" : "OFF");
#endif
break;
#ifdef ENABLE_KEYBOARD_XT_LOG
case 0x62:
if (kbd->type <= 1)
case 0x62: /* Switch Register (aka Port C) */
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82))
kbd_log("Cassette IN is %i\n", !!(val & 0x10));
break;
#endif
@@ -554,16 +563,17 @@ kbd_read(uint16_t port, void *priv)
{
xtkbd_t *kbd = (xtkbd_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x60:
if ((kbd->pb & 0x80) && ((kbd->type <= 3) || (kbd->type == 9))) {
if (kbd->type <= 1)
case 0x60: /* Keyboard Data Register (aka Port A) */
if ((kbd->pb & 0x80) && ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)
|| (kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_ZENITH))) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82))
ret = (kbd->pd & ~0x02) | (hasfpu ? 0x02 : 0x00);
else if ((kbd->type == 2) || (kbd->type == 3))
else if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86))
ret = 0xff; /* According to Ruud on the PCem forum, this is supposed to return 0xFF on the XT. */
else if (kbd->type == 9) {
else if (kbd->type == KBD_TYPE_ZENITH) {
/* Zenith Data Systems Z-151
* SW1 switch settings:
* bits 6-7: floppy drive number
@@ -586,32 +596,41 @@ kbd_read(uint16_t port, void *priv)
ret = kbd->pa;
break;
case 0x61:
case 0x61: /* Keyboard Control Register (aka Port B) */
ret = kbd->pb;
break;
case 0x62:
if (kbd->type == 0)
ret = 0x00;
else if (kbd->type == 1) {
if (kbd->pb & 0x04)
ret = ((mem_size - 64) / 32) & 0x0f;
case 0x62: /* Switch Register (aka Port C) */
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) {
if (kbd->pb & 0x04) /* PB2 */
switch (mem_size + isa_mem_size) {
case 64:
case 48:
case 32:
case 16:
ret = 0x00;
break;
default:
ret = (((mem_size + isa_mem_size) - 64) / 32) & 0x0f;
break;
}
else
ret = ((mem_size - 64) / 32) >> 4;
} else if (kbd->type == 8 || kbd->type == 9) {
ret = (((mem_size + isa_mem_size) - 64) / 32) >> 4;
} else if (kbd->type == KBD_TYPE_OLIVETTI
|| kbd->type == KBD_TYPE_ZENITH) {
/* Olivetti M19 or Zenith Data Systems Z-151 */
if (kbd->pb & 0x04)
if (kbd->pb & 0x04) /* PB2 */
ret = kbd->pd & 0xbf;
else
else
ret = kbd->pd >> 4;
} else {
if (kbd->pb & 0x08)
if (kbd->pb & 0x08) /* PB3 */
ret = kbd->pd >> 4;
else {
/* LaserXT = Always 512k RAM;
LaserXT/3 = Bit 0: set = 512k, clear = 256k. */
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
if (kbd->type == 6)
if (kbd->type == KBD_TYPE_TOSHIBA)
ret = ((mem_size == 512) ? 0x0d : 0x0c) | (hasfpu ? 0x02 : 0x00);
else
#endif
@@ -622,19 +641,21 @@ kbd_read(uint16_t port, void *priv)
/* This is needed to avoid error 131 (cassette error).
This is serial read: bit 5 = clock, bit 4 = data, cassette header is 256 x 0xff. */
if (kbd->type <= 1) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) {
if (cassette == NULL)
ret |= (ppispeakon ? 0x10 : 0);
else
ret |= (pc_cas_get_inp(cassette) ? 0x10 : 0);
}
if (kbd->type == 5)
if (kbd->type == KBD_TYPE_TANDY)
ret |= (tandy1k_eeprom_read() ? 0x10 : 0);
break;
case 0x63:
if ((kbd->type == 2) || (kbd->type == 3) || (kbd->type == 4) || (kbd->type == 6))
case 0x63: /* Keyboard Configuration Register (aka Port D) */
if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_COMPAQ)
|| (kbd->type == KBD_TYPE_TOSHIBA))
ret = kbd->pd;
break;
}
@@ -685,9 +706,14 @@ kbd_init(const device_t *info)
video_reset(gfxcard);
if ((kbd->type <= 3) || (kbd->type == 4) || (kbd->type == 6) || (kbd->type == 8)) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)
|| (kbd->type == KBD_TYPE_XT82) || (kbd->type <= KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_COMPAQ)
|| (kbd->type == KBD_TYPE_TOSHIBA)
|| (kbd->type == KBD_TYPE_OLIVETTI)) {
/* DIP switch readout: bit set = OFF, clear = ON. */
if (kbd->type == 8)
if (kbd->type == KBD_TYPE_OLIVETTI)
/* Olivetti M19
* Jumpers J1, J2 - monitor type.
* 01 - mono (high-res)
@@ -699,10 +725,13 @@ kbd_init(const device_t *info)
/* Switches 7, 8 - floppy drives. */
kbd->pd = get_fdd_switch_settings();
/* Siitches 5, 6 - video card type */
kbd->pd |= get_videomode_switch_settings();
/* Switches 3, 4 - memory size. */
if ((kbd->type == 3) || (kbd->type == 4) || (kbd->type == 6)) {
if ((kbd->type == KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_COMPAQ)
|| (kbd->type == KBD_TYPE_TOSHIBA)) {
switch (mem_size) {
case 256:
kbd->pd |= 0x00;
@@ -718,34 +747,49 @@ kbd_init(const device_t *info)
kbd->pd |= 0x0c;
break;
}
} else if (kbd->type >= 1) {
} else if (kbd->type == KBD_TYPE_XT82) {
switch (mem_size) {
case 64:
case 64: /* 1x64k */
kbd->pd |= 0x00;
break;
case 128:
case 128: /* 2x64k */
kbd->pd |= 0x04;
break;
case 192:
case 192: /* 3x64k */
kbd->pd |= 0x08;
break;
case 256:
case 256: /* 4x64k */
default:
kbd->pd |= 0x0c;
break;
}
} else {
} else if (kbd->type == KBD_TYPE_PC82) {
switch (mem_size) {
case 16:
kbd->pd |= 0x00;
break;
case 32:
kbd->pd |= 0x04;
break;
case 48:
case 192: /* 3x64k, not supported by stock BIOS due to bugs */
kbd->pd |= 0x08;
break;
case 64:
case 64: /* 4x16k */
case 96: /* 2x32k + 2x16k */
case 128: /* 4x32k */
case 160: /* 2x64k + 2x16k */
case 224: /* 3x64k + 1x32k */
case 256: /* 4x64k */
default:
kbd->pd |= 0x0c;
break;
}
} else { /* really just the PC '81 */
switch (mem_size) {
case 16: /* 1x16k */
kbd->pd |= 0x00;
break;
case 32: /* 2x16k */
kbd->pd |= 0x04;
break;
case 48: /* 3x16k */
kbd->pd |= 0x08;
break;
case 64: /* 4x16k */
default:
kbd->pd |= 0x0c;
break;
@@ -755,7 +799,7 @@ kbd_init(const device_t *info)
/* Switch 2 - 8087 FPU. */
if (hasfpu)
kbd->pd |= 0x02;
} else if (kbd-> type == 9) {
} else if (kbd-> type == KBD_TYPE_ZENITH) {
/* Zenith Data Systems Z-151
* SW2 switch settings:
* bit 7: monitor frequency
@@ -799,8 +843,8 @@ kbd_init(const device_t *info)
keyboard_set_table(scancode_xt);
is_tandy = (kbd->type == 5);
is_t1x00 = (kbd->type == 6);
is_tandy = (kbd->type == KBD_TYPE_TANDY);
is_t1x00 = (kbd->type == KBD_TYPE_TOSHIBA);
is_amstrad = 0;
@@ -831,7 +875,7 @@ kbd_close(void *priv)
const device_t keyboard_pc_device = {
"IBM PC Keyboard (1981)",
0,
0,
KBD_TYPE_PC81,
kbd_init,
kbd_close,
kbd_reset,
@@ -841,7 +885,7 @@ const device_t keyboard_pc_device = {
const device_t keyboard_pc82_device = {
"IBM PC Keyboard (1982)",
0,
1,
KBD_TYPE_PC82,
kbd_init,
kbd_close,
kbd_reset,
@@ -851,7 +895,7 @@ const device_t keyboard_pc82_device = {
const device_t keyboard_xt_device = {
"XT (1982) Keyboard",
0,
2,
KBD_TYPE_XT82,
kbd_init,
kbd_close,
kbd_reset,
@@ -861,7 +905,7 @@ const device_t keyboard_xt_device = {
const device_t keyboard_xt86_device = {
"XT (1986) Keyboard",
0,
3,
KBD_TYPE_XT86,
kbd_init,
kbd_close,
kbd_reset,
@@ -871,7 +915,7 @@ const device_t keyboard_xt86_device = {
const device_t keyboard_xt_compaq_device = {
"Compaq Portable Keyboard",
0,
4,
KBD_TYPE_COMPAQ,
kbd_init,
kbd_close,
kbd_reset,
@@ -881,7 +925,7 @@ const device_t keyboard_xt_compaq_device = {
const device_t keyboard_tandy_device = {
"Tandy 1000 Keyboard",
0,
5,
KBD_TYPE_TANDY,
kbd_init,
kbd_close,
kbd_reset,
@@ -891,7 +935,7 @@ const device_t keyboard_tandy_device = {
const device_t keyboard_xt_t1x00_device = {
"Toshiba T1x00 Keyboard",
0,
6,
KBD_TYPE_TOSHIBA,
kbd_init,
kbd_close,
kbd_reset,
@@ -902,7 +946,7 @@ const device_t keyboard_xt_t1x00_device = {
const device_t keyboard_xt_lxt3_device = {
"VTech Laser XT3 Keyboard",
0,
7,
KBD_TYPE_VTECH,
kbd_init,
kbd_close,
kbd_reset,
@@ -913,7 +957,7 @@ const device_t keyboard_xt_lxt3_device = {
const device_t keyboard_xt_olivetti_device = {
"Olivetti XT Keyboard",
0,
8,
KBD_TYPE_OLIVETTI,
kbd_init,
kbd_close,
kbd_reset,
@@ -923,7 +967,7 @@ const device_t keyboard_xt_olivetti_device = {
const device_t keyboard_xt_zenith_device = {
"Zenith XT Keyboard",
0,
9,
KBD_TYPE_ZENITH,
kbd_init,
kbd_close,
kbd_reset,

2
src/dma.c
View File

@@ -892,8 +892,10 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv)
{
uint8_t convert[8] = CHANNELS;
#ifdef USE_DYNAREC
if ((addr == 0x84) && cpu_use_dynarec)
update_tsc();
#endif
addr &= 0x0f;
dmaregs[2][addr] = val;

6
src/floppy/fdc.c
View File

@@ -2311,7 +2311,7 @@ fdc_reset(void *priv)
fdc->max_track = (fdc->flags & FDC_FLAG_MORE_TRACKS) ? 85 : 79;
fdc_remove(fdc);
fdc_set_base(fdc, (fdc->flags & FDC_FLAG_PCJR) ? 0x00f0 : 0x03f0);
fdc_set_base(fdc, (fdc->flags & FDC_FLAG_PCJR) ? FDC_PRIMARY_PCJR_ADDR : FDC_PRIMARY_ADDR);
current_drive = 0;
@@ -2342,12 +2342,12 @@ fdc_init(const device_t *info)
fdc->flags = info->local;
fdc->irq = 6;
fdc->irq = FDC_PRIMARY_IRQ;
if (fdc->flags & FDC_FLAG_PCJR)
timer_add(&fdc->watchdog_timer, fdc_watchdog_poll, fdc, 0);
else
fdc->dma_ch = 2;
fdc->dma_ch = FDC_PRIMARY_DMA;
fdc_log("FDC added: %04X (flags: %08X)\n", fdc->base_address, fdc->flags);

2
src/floppy/fdc_magitronic.c
View File

@@ -101,7 +101,7 @@ b215_init(const device_t *info)
rom_init(&dev->rom, ROM_B215, ROM_ADDR, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
dev->fdc_controller = device_add(&fdc_um8398_device);
io_sethandler(0x03f0, 1, b215_read, NULL, NULL, NULL, NULL, NULL, dev);
io_sethandler(FDC_PRIMARY_ADDR, 1, b215_read, NULL, NULL, NULL, NULL, NULL, dev);
return dev;
}

5
src/include/86box/86box.h
View File

@@ -23,7 +23,7 @@
/* Configuration values. */
#define SERIAL_MAX 4
#define PARALLEL_MAX 3
#define PARALLEL_MAX 4
#define SCREEN_RES_X 640
#define SCREEN_RES_Y 480
@@ -122,7 +122,8 @@ extern int sound_is_float, /* (C) sound uses FP values */
GUS, GUSMAX, /* (C) sound option */
SSI2001, /* (C) sound option */
voodoo_enabled; /* (C) video option */
extern uint32_t mem_size; /* (C) memory size */
extern uint32_t mem_size; /* (C) memory size (Installed on system board) */
extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */
extern int cpu, /* (C) cpu type */
cpu_use_dynarec, /* (C) cpu uses/needs Dyna */
fpu_type; /* (C) fpu type */

25
src/include/86box/device.h
View File

@@ -55,18 +55,19 @@
enum {
DEVICE_NOT_WORKING = 1, /* does not currently work correctly and will be disabled in a release build */
DEVICE_LPT = 2, /* requires a parallel port */
DEVICE_PCJR = 4, /* requires an IBM PCjr */
DEVICE_AT = 8, /* requires an AT-compatible system */
DEVICE_PS2 = 0x10, /* requires a PS/1 or PS/2 system */
DEVICE_ISA = 0x20, /* requires the ISA bus */
DEVICE_CBUS = 0x40, /* requires the C-BUS bus */
DEVICE_MCA = 0x80, /* requires the MCA bus */
DEVICE_EISA = 0x100, /* requires the EISA bus */
DEVICE_VLB = 0x200, /* requires the PCI bus */
DEVICE_PCI = 0x400, /* requires the VLB bus */
DEVICE_AGP = 0x800, /* requires the AGP bus */
DEVICE_AC97 = 0x1000 /* requires the AC'97 bus */
DEVICE_PCJR = 2, /* requires an IBM PCjr */
DEVICE_AT = 4, /* requires an AT-compatible system */
DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */
DEVICE_ISA = 0x10, /* requires the ISA bus */
DEVICE_CBUS = 0x20, /* requires the C-BUS bus */
DEVICE_MCA = 0x40, /* requires the MCA bus */
DEVICE_EISA = 0x80, /* requires the EISA bus */
DEVICE_VLB = 0x100, /* requires the PCI bus */
DEVICE_PCI = 0x200, /* requires the VLB bus */
DEVICE_AGP = 0x400, /* requires the AGP bus */
DEVICE_AC97 = 0x800, /* requires the AC'97 bus */
DEVICE_COM = 0x1000, /* requires a serial port */
DEVICE_LPT = 0x2000 /* requires a parallel port */
};

16
src/include/86box/fdc.h
View File

@@ -24,6 +24,22 @@
extern int fdc_type;
#define FDC_PRIMARY_ADDR 0x03f0
#define FDC_PRIMARY_IRQ 6
#define FDC_PRIMARY_DMA 2
#define FDC_PRIMARY_PCJR_ADDR 0x00f0
#define FDC_PRIMARY_PCJR_IRQ 6
#define FDC_PRIMARY_PCJR_DMA 2
#define FDC_SECONDARY_ADDR 0x0370
#define FDC_SECONDARY_IRQ 6
#define FDC_SECONDARY_DMA 2
#define FDC_TERTIARY_ADDR 0x0360
#define FDC_TERTIARY_IRQ 6
#define FDC_TERTIARY_DMA 2
#define FDC_QUATERNARY_ADDR 0x03e0
#define FDC_QUATERNARY_IRQ 6
#define FDC_QUATERNARY_DMA 2
#define FDC_FLAG_PCJR 0x01 /* PCjr */
#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */
#define FDC_FLAG_AT 0x04 /* AT+, PS/x */

18
src/include/86box/lpt.h
View File

@@ -24,13 +24,29 @@ extern void lpt1_remove_ams(void);
#define lpt1_init(a) lpt_port_init(0, a)
#define lpt1_irq(a) lpt_port_irq(0, a)
#define lpt1_remove() lpt_port_remove(0)
#define lpt2_init(a) lpt_port_init(1, a)
#define lpt2_irq(a) lpt_port_irq(1, a)
#define lpt2_remove() lpt_port_remove(1)
#define lpt3_init(a) lpt_port_init(2, a)
#define lpt3_irq(a) lpt_port_irq(2, a)
#define lpt3_remove() lpt_port_remove(2)
#define lpt4_init(a) lpt_port_init(3, a)
#define lpt4_irq(a) lpt_port_irq(3, a)
#define lpt4_remove() lpt_port_remove(3)
/*
#define lpt5_init(a) lpt_port_init(4, a)
#define lpt5_irq(a) lpt_port_irq(4, a)
#define lpt5_remove() lpt_port_remove(4)
#define lpt6_init(a) lpt_port_init(5, a)
#define lpt6_irq(a) lpt_port_irq(5, a)
#define lpt6_remove() lpt_port_remove(5)
*/
void lpt_devices_init(void);
void lpt_devices_close(void);
@@ -45,7 +61,7 @@ typedef struct {
void * priv;
} lpt_port_t;
extern lpt_port_t lpt_ports[3];
extern lpt_port_t lpt_ports[PARALLEL_MAX];
extern void lpt_write(uint16_t port, uint8_t val, void *priv);
extern uint8_t lpt_read(uint16_t port, void *priv);

267
src/include/86box/resource.h
View File

@@ -24,93 +24,134 @@
/* Dialog IDs. */
#define DLG_ABOUT 101 /* top-level dialog */
#define DLG_STATUS 102 /* top-level dialog */
#define DLG_SND_GAIN 103 /* top-level dialog */
#define DLG_NEW_FLOPPY 104 /* top-level dialog */
#define DLG_SPECIFY_DIM 105 /* top-level dialog */
#define DLG_PREFERENCES 106 /* top-level dialog */
#define DLG_CONFIG 110 /* top-level dialog */
#define DLG_CFG_MACHINE 111 /* sub-dialog of config */
#define DLG_CFG_VIDEO 112 /* sub-dialog of config */
#define DLG_CFG_INPUT 113 /* sub-dialog of config */
#define DLG_CFG_SOUND 114 /* sub-dialog of config */
#define DLG_CFG_NETWORK 115 /* sub-dialog of config */
#define DLG_CFG_PORTS 116 /* sub-dialog of config */
#define DLG_CFG_STORAGE 117 /* sub-dialog of config */
#define DLG_CFG_HARD_DISKS 118 /* sub-dialog of config */
#define DLG_CFG_HARD_DISKS_ADD 119 /* sub-dialog of config */
#define DLG_CFG_FLOPPY_AND_CDROM_DRIVES 120 /* sub-dialog of config */
#define DLG_CFG_OTHER_REMOVABLE_DEVICES 121 /* sub-dialog of config */
#define DLG_CFG_PERIPHERALS 122 /* sub-dialog of config */
#define DLG_ABOUT 101 /* top-level dialog */
#define DLG_STATUS 102 /* top-level dialog */
#define DLG_SND_GAIN 103 /* top-level dialog */
#define DLG_NEW_FLOPPY 104 /* top-level dialog */
#define DLG_SPECIFY_DIM 105 /* top-level dialog */
#define DLG_PREFERENCES 106 /* top-level dialog */
#define DLG_CONFIG 110 /* top-level dialog */
#define DLG_CFG_MACHINE 111 /* sub-dialog of config */
#define DLG_CFG_VIDEO 112 /* sub-dialog of config */
#define DLG_CFG_INPUT 113 /* sub-dialog of config */
#define DLG_CFG_SOUND 114 /* sub-dialog of config */
#define DLG_CFG_NETWORK 115 /* sub-dialog of config */
#define DLG_CFG_PORTS 116 /* sub-dialog of config */
#define DLG_CFG_STORAGE 117 /* sub-dialog of config */
#define DLG_CFG_HARD_DISKS 118 /* sub-dialog of config */
#define DLG_CFG_HARD_DISKS_ADD 119 /* sub-dialog of config */
#define DLG_CFG_FLOPPY_AND_CDROM_DRIVES 120 /* sub-dialog of config */
#define DLG_CFG_OTHER_REMOVABLE_DEVICES 121 /* sub-dialog of config */
#define DLG_CFG_PERIPHERALS 122 /* sub-dialog of config */
/* Static text label IDs. */
#define IDT_1700 1700 /* Language: */
#define IDT_1701 1701 /* Machine: */
#define IDT_1702 1702 /* CPU type: */
#define IDT_1703 1703 /* Wait states: */
#define IDT_1704 1704 /* CPU: */
#define IDT_1705 1705 /* MB == IDC_TEXT_MB */
#define IDT_1706 1706 /* Memory: */
#define IDT_1707 1707 /* Video: */
#define IDT_1708 1708 /* Machine type: */
#define IDT_1709 1709 /* Mouse: */
#define IDT_1710 1710 /* Joystick: */
#define IDT_1711 1711 /* Sound card: */
#define IDT_1712 1712 /* MIDI Out Device: */
#define IDT_1713 1713 /* MIDI In Device: */
#define IDT_1714 1714 /* Network type: */
#define IDT_1715 1715 /* PCap device: */
#define IDT_1716 1716 /* Network adapter: */
#define IDT_1717 1717 /* SCSI Controller: */
#define IDT_1718 1718 /* HD Controller: */
#define IDT_1719 1719
#define IDT_1720 1720 /* Hard disks: */
#define IDT_1721 1721 /* Bus: */
#define IDT_1722 1722 /* Channel: */
#define IDT_1723 1723 /* ID: */
#define IDT_1724 1724 /* LUN: */
#define IDT_1726 1726 /* Sectors: */
#define IDT_1727 1727 /* Heads: */
#define IDT_1728 1728 /* Cylinders: */
#define IDT_1729 1729 /* Size (MB): */
#define IDT_1730 1730 /* Type: */
#define IDT_1731 1731 /* File name: */
#define IDT_1737 1737 /* Floppy drives: */
#define IDT_1738 1738 /* Type: */
#define IDT_1739 1739 /* CD-ROM drives: */
#define IDT_1740 1740 /* Bus: */
#define IDT_1741 1741 /* ID: */
#define IDT_1742 1742 /* LUN: */
#define IDT_1743 1743 /* Channel: */
#define IDT_STEXT 1744 /* text in status window */
#define IDT_SDEVICE 1745 /* text in status window */
#define IDT_1746 1746 /* Gain */
#define IDT_1749 1749 /* File name: */
#define IDT_1750 1750 /* Disk size: */
#define IDT_1751 1751 /* RPM mode: */
#define IDT_1752 1752 /* Progress: */
#define IDT_1753 1753 /* Bus: */
#define IDT_1754 1754 /* ID: */
#define IDT_1755 1755 /* LUN: */
#define IDT_1756 1756 /* Channel: */
#define IDT_1757 1757 /* Progress: */
#define IDT_1758 1758 /* Speed: */
#define IDT_1759 1759 /* ZIP drives: */
#define IDT_1763 1763 /* Board #1: */
#define IDT_1764 1764 /* Board #2: */
#define IDT_1765 1765 /* Board #3: */
#define IDT_1766 1766 /* Board #4: */
#define IDT_1767 1767 /* ISA RTC: */
#define IDT_1768 1768 /* Ext FD Controller: */
#define IDT_1769 1769 /* MO drives: */
#define IDT_1770 1770 /* Bus: */
#define IDT_1771 1771 /* ID: */
#define IDT_1772 1772 /* Channel */
#define IDT_1773 1773 /* Type: */
#define IDT_1774 1774 /* Image Format: */
#define IDT_1775 1775 /* Block Size: */
/* DLG_SND_GAIN */
#define IDT_GAIN 1700 /* Gain */
/* DLG_NEW_FLOPPY */
#define IDT_FLP_FILE_NAME 1701 /* File name: */
#define IDT_FLP_DISK_SIZE 1702 /* Disk size: */
#define IDT_FLP_RPM_MODE 1703 /* RPM mode: */
#define IDT_FLP_PROGRESS 1704 /* Progress: */
/* DLG_SPECIFY_DIM */
#define IDT_WIDTH 1705 /* ??? */
#define IDT_HEIGHT 1706 /* ??? */
/* DLG_CFG_MACHINE */
#define IDT_MACHINE_TYPE 1707 /* Machine type: */
#define IDT_MACHINE 1708 /* Machine: */
#define IDT_CPU_TYPE 1709 /* CPU type: */
#define IDT_CPU_SPEED 1710 /* CPU speed: */
#define IDT_FPU 1711 /* FPU: */
#define IDT_WAIT_STATES 1712 /* Wait states: */
#define IDT_MB 1713 /* MB == IDC_TEXT_MB */
#define IDT_MEMORY 1714 /* Memory: */
/* DLG_CFG_VIDEO */
#define IDT_VIDEO 1715 /* Video: */
/* DLG_CFG_INPUT */
#define IDT_MOUSE 1716 /* Mouse: */
#define IDT_JOYSTICK 1717 /* Joystick: */
/* DLG_CFG_SOUND */
#define IDT_SOUND 1718 /* Sound card: */
#define IDT_MIDI_OUT 1719 /* MIDI Out Device: */
#define IDT_MIDI_IN 1720 /* MIDI In Device: */
/* DLG_CFG_NETWORK */
#define IDT_NET_TYPE 1721 /* Network type: */
#define IDT_PCAP 1722 /* PCap device: */
#define IDT_NET 1723 /* Network adapter: */
/* DLG_CFG_PORTS */
#define IDT_COM1 1724 /* COM1 Device: */
#define IDT_COM2 1725 /* COM1 Device: */
#define IDT_COM3 1726 /* COM1 Device: */
#define IDT_COM4 1727 /* COM1 Device: */
#define IDT_LPT1 1728 /* LPT1 Device: */
#define IDT_LPT2 1729 /* LPT2 Device: */
#define IDT_LPT3 1730 /* LPT3 Device: */
#define IDT_LPT4 1731 /* LPT4 Device: */
/* DLG_CFG_STORAGE */
#define IDT_HDC 1732 /* HD Controller: */
#define IDT_FDC 1733 /* Ext FD Controller: */
#define IDT_SCSI_1 1734 /* SCSI Board #1: */
#define IDT_SCSI_2 1735 /* SCSI Board #2: */
#define IDT_SCSI_3 1736 /* SCSI Board #3: */
#define IDT_SCSI_4 1737 /* SCSI Board #4: */
/* DLG_CFG_HARD_DISKS */
#define IDT_HDD 1738 /* Hard disks: */
#define IDT_BUS 1739 /* Bus: */
#define IDT_CHANNEL 1740 /* Channel: */
#define IDT_ID 1741 /* ID: */
#define IDT_LUN 1742 /* LUN: */
/* DLG_CFG_HARD_DISKS_ADD */
#define IDT_SECTORS 1743 /* Sectors: */
#define IDT_HEADS 1744 /* Heads: */
#define IDT_CYLS 1745 /* Cylinders: */
#define IDT_SIZE_MB 1746 /* Size (MB): */
#define IDT_TYPE 1747 /* Type: */
#define IDT_FILE_NAME 1748 /* File name: */
#define IDT_IMG_FORMAT 1749 /* Image Format: */
#define IDT_BLOCK_SIZE 1750 /* Block Size: */
#define IDT_PROGRESS 1751 /* Progress: */
/* DLG_CFG_FLOPPY_AND_CDROM_DRIVES */
#define IDT_FLOPPY_DRIVES 1752 /* Floppy drives: */
#define IDT_FDD_TYPE 1753 /* Type: */
#define IDT_CD_DRIVES 1754 /* CD-ROM drives: */
#define IDT_CD_BUS 1755 /* Bus: */
#define IDT_CD_ID 1756 /* ID: */
#define IDT_CD_LUN 1757 /* LUN: */
#define IDT_CD_CHANNEL 1758 /* Channel: */
#define IDT_CD_SPEED 1759 /* Speed: */
/* DLG_CFG_OTHER_REMOVABLE_DEVICES */
#define IDT_MO_DRIVES 1760 /* MO drives: */
#define IDT_MO_BUS 1761 /* Bus: */
#define IDT_MO_ID 1762 /* ID: */
#define IDT_MO_CHANNEL 1763 /* Channel */
#define IDT_MO_TYPE 1764 /* Type: */
#define IDT_ZIP_DRIVES 1765 /* ZIP drives: */
#define IDT_ZIP_BUS 1766 /* Bus: */
#define IDT_ZIP_ID 1767 /* ID: */
#define IDT_ZIP_LUN 1768 /* LUN: */
#define IDT_ZIP_CHANNEL 1769 /* Channel: */
/* DLG_CFG_PERIPHERALS */
#define IDT_ISARTC 1770 /* ISA RTC: */
#define IDT_ISAMEM_1 1771 /* ISAMEM Board #1: */
#define IDT_ISAMEM_2 1772 /* ISAMEM Board #2: */
#define IDT_ISAMEM_3 1773 /* ISAMEM Board #3: */
#define IDT_ISAMEM_4 1774 /* ISAMEM Board #4: */
/*
* To try to keep these organized, we now group the
@@ -128,7 +169,7 @@
#define IDC_COMBO_MACHINE 1011 /* machine/cpu config */
#define IDC_CONFIGURE_MACHINE 1012
#define IDC_COMBO_CPU_TYPE 1013
#define IDC_COMBO_CPU 1014
#define IDC_COMBO_CPU_SPEED 1014
#define IDC_COMBO_FPU 1015
#define IDC_COMBO_WS 1016
#ifdef USE_DYNAREC
@@ -136,7 +177,7 @@
#endif
#define IDC_MEMTEXT 1018
#define IDC_MEMSPIN 1019
#define IDC_TEXT_MB IDT_1705
#define IDC_TEXT_MB IDT_MB
#define IDC_VIDEO 1020 /* video config */
#define IDC_COMBO_VIDEO 1021
@@ -154,7 +195,7 @@
#define IDC_CHECK_SSI 1042
#define IDC_CHECK_CMS 1043
#define IDC_CHECK_GUS 1044
#define IDC_COMBO_MIDI 1045
#define IDC_COMBO_MIDI_OUT 1045
#define IDC_CHECK_MPU401 1046
#define IDC_CONFIGURE_MPU401 1047
#define IDC_CHECK_FLOAT 1048
@@ -170,31 +211,33 @@
#define IDC_COMBO_LPT1 1070 /* ports config */
#define IDC_COMBO_LPT2 1071
#define IDC_COMBO_LPT3 1072
#define IDC_CHECK_SERIAL1 1073
#define IDC_CHECK_SERIAL2 1074
#define IDC_CHECK_SERIAL3 1075
#define IDC_CHECK_SERIAL4 1076
#define IDC_CHECK_PARALLEL1 1077
#define IDC_CHECK_PARALLEL2 1078
#define IDC_CHECK_PARALLEL3 1079
#define IDC_COMBO_LPT4 1073
#define IDC_CHECK_SERIAL1 1074
#define IDC_CHECK_SERIAL2 1075
#define IDC_CHECK_SERIAL3 1076
#define IDC_CHECK_SERIAL4 1077
#define IDC_CHECK_PARALLEL1 1078
#define IDC_CHECK_PARALLEL2 1079
#define IDC_CHECK_PARALLEL3 1080
#define IDC_CHECK_PARALLEL4 1081
#define IDC_OTHER_PERIPH 1080 /* storage controllers config */
#define IDC_COMBO_HDC 1081
#define IDC_CONFIGURE_HDC 1082
#define IDC_CHECK_IDE_TER 1083
#define IDC_BUTTON_IDE_TER 1084
#define IDC_CHECK_IDE_QUA 1085
#define IDC_BUTTON_IDE_QUA 1086
#define IDC_GROUP_SCSI 1087
#define IDC_COMBO_SCSI_1 1088
#define IDC_COMBO_SCSI_2 1089
#define IDC_COMBO_SCSI_3 1090
#define IDC_COMBO_SCSI_4 1091
#define IDC_CONFIGURE_SCSI_1 1092
#define IDC_CONFIGURE_SCSI_2 1093
#define IDC_CONFIGURE_SCSI_3 1094
#define IDC_CONFIGURE_SCSI_4 1095
#define IDC_CHECK_CASSETTE 1096
#define IDC_OTHER_PERIPH 1082 /* storage controllers config */
#define IDC_COMBO_HDC 1083
#define IDC_CONFIGURE_HDC 1084
#define IDC_CHECK_IDE_TER 1085
#define IDC_BUTTON_IDE_TER 1086
#define IDC_CHECK_IDE_QUA 1087
#define IDC_BUTTON_IDE_QUA 1088
#define IDC_GROUP_SCSI 1089
#define IDC_COMBO_SCSI_1 1090
#define IDC_COMBO_SCSI_2 1091
#define IDC_COMBO_SCSI_3 1092
#define IDC_COMBO_SCSI_4 1093
#define IDC_CONFIGURE_SCSI_1 1094
#define IDC_CONFIGURE_SCSI_2 1095
#define IDC_CONFIGURE_SCSI_3 1096
#define IDC_CONFIGURE_SCSI_4 1097
#define IDC_CHECK_CASSETTE 1098
#define IDC_HARD_DISKS 1100 /* hard disks config */
#define IDC_LIST_HARD_DISKS 1101
@@ -280,7 +323,7 @@
#define IDC_CONFIGURE_BUSLOGIC 1305
#define IDC_CONFIGURE_PCAP 1306
#define IDC_CONFIGURE_NET 1307
#define IDC_CONFIGURE_MIDI 1308
#define IDC_CONFIGURE_MIDI_OUT 1308
#define IDC_CONFIGURE_MIDI_IN 1309
#define IDC_JOY1 1310
#define IDC_JOY2 1311

8
src/include/86box/scsi_buslogic.h
View File

@@ -20,12 +20,14 @@
# define SCSI_BUSLOGIC_H
extern const device_t buslogic_542b_1991_device;
extern const device_t buslogic_device;
extern const device_t buslogic_542b_device;
extern const device_t buslogic_545s_device;
extern const device_t buslogic_542bh_device;
extern const device_t buslogic_545c_device;
extern const device_t buslogic_640a_device;
extern const device_t buslogic_445s_device;
extern const device_t buslogic_pci_device;
extern const device_t buslogic_445c_device;
extern const device_t buslogic_958d_pci_device;
extern void BuslogicDeviceReset(void *p);

5
src/include/86box/snd_mpu401.h
View File

@@ -19,6 +19,8 @@
* Copyright 2016-2020 Miran Grca.
* Copyright 2016-2020 TheCollector1995.
*/
#ifndef SOUND_MPU401_H
# define SOUND_MPU401_H
#define MPU401_VERSION 0x15
#define MPU401_REVISION 0x01
@@ -160,3 +162,6 @@ extern void mpu401_irq_attach(mpu_t *mpu, void (*ext_irq_update)(void *priv, int
extern int MPU401_InputSysex(void *p, uint8_t *buffer, uint32_t len, int abort);
extern void MPU401_InputMsg(void *p, uint8_t *msg, uint32_t len);
#endif /*SOUND_MPU401_H*/

4
src/include/86box/sound.h
View File

@@ -99,8 +99,12 @@ extern const device_t gus_device;
extern const device_t pas16_device;
#endif
/* IBM PS/1 Audio Card */
extern const device_t ps1snd_device;
/* Tandy PSSJ */
extern const device_t pssj_device;
extern const device_t pssj_isa_device;
/* Creative Labs Sound Blaster */
extern const device_t sb_1_device;

4
src/include/86box/vid_cga.h
View File

@@ -15,6 +15,8 @@
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#ifndef VIDEO_CGA_H
# define VIDEO_CGA_H
typedef struct cga_t
{
@@ -65,3 +67,5 @@ void cga_poll(void *p);
extern const device_config_t cga_config[];
extern const device_t cga_device;
#endif
#endif /*VIDEO_CGA_H*/

4
src/include/86box/vid_cga_comp.h
View File

@@ -16,6 +16,8 @@
* Copyright 2015-2018 reenigne.
* Copyright 2015-2018 Miran Grca.
*/
#ifndef VIDEO_CGA_COMP_H
# define VIDEO_CGA_COMP_H
#define Bit8u uint8_t
#define Bit32u uint32_t
@@ -25,3 +27,5 @@
void update_cga16_color(uint8_t cgamode);
void cga_comp_init(int revision);
Bit32u * Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks/*, bool doublewidth*/, Bit32u *TempLine);
#endif /*VIDEO_CGA_COMP_H*/

61
src/include/86box/vid_hercules.h Normal file
View File

@@ -0,0 +1,61 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the Hercules graphics cards.
*
*
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2019 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
* Copyright 2021 Jasmine Iwanek.
*/
#ifndef VIDEO_HERCULES_H
# define VIDEO_HERCULES_H
typedef struct {
mem_mapping_t mapping;
uint8_t crtc[32], charbuffer[4096];
int crtcreg;
uint8_t ctrl,
ctrl2,
stat;
uint64_t dispontime,
dispofftime;
pc_timer_t timer;
int firstline,
lastline;
int linepos,
displine;
int vc,
sc;
uint16_t ma,
maback;
int con, coff,
cursoron;
int dispon,
blink;
int vsynctime;
int vadj;
int lp_ff;
int cols[256][2][2];
uint8_t *vram;
} hercules_t;
static void *hercules_init(const device_t *info);
#endif /*VIDEO_HERCULES_H*/

5
src/include/86box/vid_svga.h
View File

@@ -16,6 +16,8 @@
* Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca.
*/
#ifndef VIDEO_SVGA_H
# define VIDEO_SVGA_H
#define FLAG_EXTRA_BANKS 1
@@ -274,6 +276,7 @@ extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, voi
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga);
extern void tvp3026_recalctimings(void *p, svga_t *svga);
extern void tvp3026_hwcursor_draw(svga_t *svga, int displine);
extern float tvp3026_getclock(int clock, void *p);
#ifdef EMU_DEVICE_H
extern const device_t ati68860_ramdac_device;
@@ -305,3 +308,5 @@ extern const device_t tseng_ics5301_ramdac_device;
extern const device_t tseng_ics5341_ramdac_device;
extern const device_t tvp3026_ramdac_device;
#endif
#endif /*VIDEO_SVGA_H*/

34
src/include/86box/vid_vga.h Normal file
View File

@@ -0,0 +1,34 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the IBM MDA + VGA graphics cards.
*
*
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
* Copyright 2021 Jasmine Iwanek.
*/
#ifndef VIDEO_VGA_H
# define VIDEO_VGA_H
typedef struct vga_t
{
svga_t svga;
rom_t bios_rom;
} vga_t;
static video_timings_t timing_vga = {VIDEO_ISA, 8, 16, 32, 8, 16, 32};
void vga_out(uint16_t addr, uint8_t val, void *p);
uint8_t vga_in(uint16_t addr, void *p);
#endif /*VIDEO_VGA_H*/

2
src/include/86box/video.h
View File

@@ -348,6 +348,7 @@ extern const device_t s3_diamond_stealth_vram_isa_device;
extern const device_t s3_ami_86c924_isa_device;
extern const device_t s3_metheus_86c928_isa_device;
extern const device_t s3_metheus_86c928_vlb_device;
extern const device_t s3_spea_mercury_lite_86c928_pci_device;
extern const device_t s3_spea_mirage_86c801_isa_device;
extern const device_t s3_spea_mirage_86c805_vlb_device;
extern const device_t s3_mirocrystal_8s_805_vlb_device;
@@ -394,6 +395,7 @@ extern const device_t s3_trio64v2_dx_onboard_pci_device;
extern const device_t s3_virge_325_pci_device;
extern const device_t s3_diamond_stealth_2000_pci_device;
extern const device_t s3_diamond_stealth_3000_pci_device;
extern const device_t s3_stb_velocity_3d_pci_device;
extern const device_t s3_virge_375_pci_device;
extern const device_t s3_diamond_stealth_2000pro_pci_device;
extern const device_t s3_virge_385_pci_device;

12
src/lpt.c
View File

@@ -14,7 +14,7 @@
#include <86box/net_plip.h>
lpt_port_t lpt_ports[3];
lpt_port_t lpt_ports[PARALLEL_MAX];
static const struct {
@@ -74,7 +74,7 @@ lpt_devices_init(void)
{
int i = 0;
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
lpt_ports[i].dt = (lpt_device_t *) lpt_devices[lpt_ports[i].device].device;
if (lpt_ports[i].dt)
@@ -89,7 +89,7 @@ lpt_devices_close(void)
int i = 0;
lpt_port_t *dev;
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
dev = &lpt_ports[i];
if (dev->dt)
@@ -176,10 +176,10 @@ void
lpt_init(void)
{
int i;
uint16_t default_ports[3] = { 0x378, 0x278, 0x3bc };
uint8_t default_irqs[3] = { 7, 5, 7 };
uint16_t default_ports[PARALLEL_MAX] = { 0x378, 0x278, 0x3bc, 0x268 }; /*, 0x27c, 0x26c }; */
uint8_t default_irqs[PARALLEL_MAX] = { 7, 5, 7, 5 }; /* , 7, 5 }; */
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
lpt_ports[i].addr = 0xffff;
lpt_ports[i].irq = 0xff;
lpt_ports[i].enable_irq = 0x10;

193
src/machine/m_ps1.c
View File

@@ -60,26 +60,11 @@
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_6x.h>
#include <86box/sound.h>
#include <86box/snd_sn76489.h>
#include <86box/video.h>
#include <86box/machine.h>
#include <86box/sound.h>
typedef struct {
sn76489_t sn76489;
uint8_t status, ctrl;
uint64_t timer_latch;
pc_timer_t timer_count;
int timer_enable;
uint8_t fifo[2048];
int fifo_read_idx, fifo_write_idx;
int fifo_threshold;
uint8_t dac_val;
int16_t buffer[SOUNDBUFLEN];
int pos;
} ps1snd_t;
typedef struct {
int model;
@@ -100,178 +85,6 @@ typedef struct {
} ps1_t;
static void
update_irq_status(ps1snd_t *snd)
{
if (((snd->status & snd->ctrl) & 0x12) && (snd->ctrl & 0x01))
picint(1 << 7);
else
picintc(1 << 7);
}
static uint8_t
snd_read(uint16_t port, void *priv)
{
ps1snd_t *snd = (ps1snd_t *)priv;
uint8_t ret = 0xff;
switch (port & 7) {
case 0: /* ADC data */
snd->status &= ~0x10;
update_irq_status(snd);
ret = 0;
break;
case 2: /* status */
ret = snd->status;
ret |= (snd->ctrl & 0x01);
if ((snd->fifo_write_idx - snd->fifo_read_idx) >= 2048)
ret |= 0x08; /* FIFO full */
if (snd->fifo_read_idx == snd->fifo_write_idx)
ret |= 0x04; /* FIFO empty */
break;
case 3: /* FIFO timer */
/*
* The PS/1 Technical Reference says this should return
* thecurrent value, but the PS/1 BIOS and Stunt Island
* expect it not to change.
*/
ret = snd->timer_latch;
break;
case 4:
case 5:
case 6:
case 7:
ret = 0;
}
return(ret);
}
static void
snd_write(uint16_t port, uint8_t val, void *priv)
{
ps1snd_t *snd = (ps1snd_t *)priv;
switch (port & 7) {
case 0: /* DAC output */
if ((snd->fifo_write_idx - snd->fifo_read_idx) < 2048) {
snd->fifo[snd->fifo_write_idx & 2047] = val;
snd->fifo_write_idx++;
}
break;
case 2: /* control */
snd->ctrl = val;
if (! (val & 0x02))
snd->status &= ~0x02;
update_irq_status(snd);
break;
case 3: /* timer reload value */
snd->timer_latch = val;
if (val)
timer_set_delay_u64(&snd->timer_count, ((0xff-val) * TIMER_USEC));
else
timer_disable(&snd->timer_count);
break;
case 4: /* almost empty */
snd->fifo_threshold = val * 4;
break;
}
}
static void
snd_update(ps1snd_t *snd)
{
for (; snd->pos < sound_pos_global; snd->pos++)
snd->buffer[snd->pos] = (int8_t)(snd->dac_val ^ 0x80) * 0x20;
}
static void
snd_callback(void *priv)
{
ps1snd_t *snd = (ps1snd_t *)priv;
snd_update(snd);
if (snd->fifo_read_idx != snd->fifo_write_idx) {
snd->dac_val = snd->fifo[snd->fifo_read_idx & 2047];
snd->fifo_read_idx++;
}
if ((snd->fifo_write_idx - snd->fifo_read_idx) == snd->fifo_threshold)
snd->status |= 0x02; /*FIFO almost empty*/
snd->status |= 0x10; /*ADC data ready*/
update_irq_status(snd);
timer_advance_u64(&snd->timer_count, snd->timer_latch * TIMER_USEC);
}
static void
snd_get_buffer(int32_t *buffer, int len, void *priv)
{
ps1snd_t *snd = (ps1snd_t *)priv;
int c;
snd_update(snd);
for (c = 0; c < len * 2; c++)
buffer[c] += snd->buffer[c >> 1];
snd->pos = 0;
}
static void *
snd_init(const device_t *info)
{
ps1snd_t *snd;
snd = malloc(sizeof(ps1snd_t));
memset(snd, 0x00, sizeof(ps1snd_t));
sn76489_init(&snd->sn76489, 0x0205, 0x0001, SN76496, 4000000);
io_sethandler(0x0200, 1, snd_read,NULL,NULL, snd_write,NULL,NULL, snd);
io_sethandler(0x0202, 6, snd_read,NULL,NULL, snd_write,NULL,NULL, snd);
timer_add(&snd->timer_count, snd_callback, snd, 0);
sound_add_handler(snd_get_buffer, snd);
return(snd);
}
static void
snd_close(void *priv)
{
ps1snd_t *snd = (ps1snd_t *)priv;
free(snd);
}
static const device_t snd_device = {
"PS/1 Audio Card",
0, 0,
snd_init, snd_close, NULL,
{ NULL },
NULL,
NULL
};
static void
recalc_memory(ps1_t *ps)
{
@@ -470,7 +283,7 @@ ps1_setup(int model)
lpt2_remove();
device_add(&snd_device);
device_add(&ps1snd_device);
device_add(&fdc_at_ps1_device);
@@ -499,7 +312,7 @@ ps1_setup(int model)
device_add(&ide_isa_device);
device_add(&snd_device);
device_add(&ps1snd_device);
}
}

4
src/machine/machine.c
View File

@@ -40,6 +40,7 @@
#include "cpu.h"
#include <86box/video.h>
#include <86box/machine.h>
#include <86box/isamem.h>
int bios_only = 0;
@@ -101,6 +102,9 @@ machine_init_ex(int m)
/* Prepare some video-related things if we're using internal
or no video. */
video_pre_reset(gfxcard);
/* Reset any ISA memory cards. */
isamem_reset();
}
/* All good, boot the machine! */

2
src/machine/machine_table.c
View File

@@ -105,7 +105,7 @@ const machine_type_t machine_types[] = {
const machine_t machines[] = {
/* 8088 Machines */
{ "[8088] IBM PC (1981)", "ibmpc", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 16, 64, 16, 0, machine_pc_init, NULL },
{ "[8088] IBM PC (1982)", "ibmpc82", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 256, 256, 256, 0, machine_pc82_init, NULL },
{ "[8088] IBM PC (1982)", "ibmpc82", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 256, 64, 0, machine_pc82_init, NULL },
{ "[8088] IBM PCjr", "ibmpcjr", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 4772728, 4772728, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO_FIXED | MACHINE_CARTRIDGE, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{ "[8088] IBM XT (1982)", "ibmxt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 256, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM XT (1986)", "ibmxt86", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 256, 640, 64, 0, machine_xt86_init, NULL },

8
src/scsi/scsi.c
View File

@@ -64,9 +64,10 @@ static SCSI_CARD scsi_cards[] = {
{ "aha154xc", &aha154xc_device, },
{ "aha154xcf", &aha154xcf_device, },
{ "aha154xcp", &aha154xcp_device, },
{ "bt542b", &buslogic_542b_1991_device, },
{ "bt542bh", &buslogic_device, },
{ "bt542b", &buslogic_542b_device, },
{ "bt542bh", &buslogic_542bh_device, },
{ "bt545s", &buslogic_545s_device, },
{ "bt545c", &buslogic_545c_device, },
{ "lcs6821n", &scsi_lcs6821n_device, },
{ "rt1000b", &scsi_rt1000b_device, },
{ "t128", &scsi_t128_device, },
@@ -78,7 +79,7 @@ static SCSI_CARD scsi_cards[] = {
{ "bt640a", &buslogic_640a_device, },
{ "ncr53c90", &ncr53c90_mca_device, },
{ "spock", &spock_device, },
{ "bt958d", &buslogic_pci_device, },
{ "bt958d", &buslogic_958d_pci_device, },
{ "ncr53c810", &ncr53c810_pci_device, },
{ "ncr53c815", &ncr53c815_pci_device, },
{ "ncr53c820", &ncr53c820_pci_device, },
@@ -87,6 +88,7 @@ static SCSI_CARD scsi_cards[] = {
{ "ncr53c875", &ncr53c875_pci_device, },
{ "dc390", &dc390_pci_device, },
{ "bt445s", &buslogic_445s_device, },
{ "bt445c", &buslogic_445c_device, },
{ "", NULL, },
};

15
src/scsi/scsi_aha154x.c
View File

@@ -1259,6 +1259,9 @@ static const device_config_t aha_154xb_config[] = {
{
"D800H", 0xd8000
},
{
"DC00H", 0xdc000
},
{
""
}
@@ -1357,6 +1360,9 @@ static const device_config_t aha_154x_config[] = {
{
"D800H", 0xd8000
},
{
"DC00H", 0xdc000
},
{
""
}
@@ -1450,12 +1456,21 @@ static const device_config_t aha_154xcf_config[] = {
{
"C800H", 0xc8000
},
{
"CC00H", 0xcc000
},
{
"D000H", 0xd0000
},
{
"D400H", 0xd4000
},
{
"D800H", 0xd8000
},
{
"DC00H", 0xdc000
},
{
""
}

426
src/scsi/scsi_buslogic.c
View File

@@ -231,13 +231,14 @@ typedef struct {
enum {
CHIP_BUSLOGIC_ISA_542_1991,
CHIP_BUSLOGIC_ISA_542,
CHIP_BUSLOGIC_ISA,
CHIP_BUSLOGIC_MCA,
CHIP_BUSLOGIC_EISA,
CHIP_BUSLOGIC_VLB,
CHIP_BUSLOGIC_PCI
CHIP_BUSLOGIC_ISA_542B_1991_12_14,
CHIP_BUSLOGIC_ISA_545S_1992_10_05,
CHIP_BUSLOGIC_ISA_542BH_1993_05_23,
CHIP_BUSLOGIC_ISA_545C_1994_12_01,
CHIP_BUSLOGIC_VLB_445S_1993_11_16,
CHIP_BUSLOGIC_VLB_445C_1994_12_01,
CHIP_BUSLOGIC_MCA_640A_1993_05_23,
CHIP_BUSLOGIC_PCI_958D_1995_12_30
};
@@ -266,17 +267,21 @@ BuslogicGetNVRFileName(buslogic_data_t *bl)
{
switch(bl->chip)
{
case CHIP_BUSLOGIC_ISA_542_1991:
case CHIP_BUSLOGIC_ISA_542B_1991_12_14:
return "bt542b.nvr";
case CHIP_BUSLOGIC_ISA_542:
return "bt542bh.nvr";
case CHIP_BUSLOGIC_ISA:
case CHIP_BUSLOGIC_ISA_545S_1992_10_05:
return "bt545s.nvr";
case CHIP_BUSLOGIC_MCA:
return "bt640a.nvr";
case CHIP_BUSLOGIC_VLB:
case CHIP_BUSLOGIC_ISA_542BH_1993_05_23:
return "bt542bh.nvr";
case CHIP_BUSLOGIC_ISA_545C_1994_12_01:
return "bt545c.nvr";
case CHIP_BUSLOGIC_VLB_445S_1993_11_16:
return "bt445s.nvr";
case CHIP_BUSLOGIC_PCI:
case CHIP_BUSLOGIC_VLB_445C_1994_12_01:
return "bt445c.nvr";
case CHIP_BUSLOGIC_MCA_640A_1993_05_23:
return "bt640a.nvr";
case CHIP_BUSLOGIC_PCI_958D_1995_12_30:
return "bt958d.nvr";
default:
fatal("Unrecognized BusLogic chip: %i\n", bl->chip);
@@ -303,30 +308,36 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe)
HALR->structured.autoSCSIData.aHostAdaptertype[0] = ' ';
HALR->structured.autoSCSIData.aHostAdaptertype[5] = ' ';
switch (bl->chip) {
case CHIP_BUSLOGIC_ISA_542_1991:
case CHIP_BUSLOGIC_ISA_542B_1991_12_14:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542B", 4);
break;
case CHIP_BUSLOGIC_ISA_542:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542BH", 5);
break;
case CHIP_BUSLOGIC_ISA:
case CHIP_BUSLOGIC_ISA_545S_1992_10_05:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545S", 4);
break;
case CHIP_BUSLOGIC_MCA:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "640A", 4);
case CHIP_BUSLOGIC_ISA_542BH_1993_05_23:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542BH", 5);
break;
case CHIP_BUSLOGIC_VLB:
case CHIP_BUSLOGIC_ISA_545C_1994_12_01:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545C", 4);
break;
case CHIP_BUSLOGIC_VLB_445S_1993_11_16:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445S", 4);
break;
case CHIP_BUSLOGIC_PCI:
case CHIP_BUSLOGIC_VLB_445C_1994_12_01:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445C", 4);
break;
case CHIP_BUSLOGIC_MCA_640A_1993_05_23:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "640A", 4);
break;
case CHIP_BUSLOGIC_PCI_958D_1995_12_30:
memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "958D", 4);
break;
}
HALR->structured.autoSCSIData.fLevelSensitiveInterrupt = (bl->chip == CHIP_BUSLOGIC_PCI) ? 1 : 0;
HALR->structured.autoSCSIData.fLevelSensitiveInterrupt = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0;
HALR->structured.autoSCSIData.uSystemRAMAreForBIOS = 6;
if (bl->chip != CHIP_BUSLOGIC_PCI) {
if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
switch(dev->DmaChannel) {
case 5:
HALR->structured.autoSCSIData.uDMAChannel = 1;
@@ -342,9 +353,9 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe)
break;
}
}
HALR->structured.autoSCSIData.fDMAAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 1;
HALR->structured.autoSCSIData.fDMAAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1;
if (bl->chip != CHIP_BUSLOGIC_PCI) {
if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
switch(dev->Irq) {
case 9:
HALR->structured.autoSCSIData.uIrqChannel = 1;
@@ -369,14 +380,14 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe)
break;
}
}
HALR->structured.autoSCSIData.fIrqAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 1;
HALR->structured.autoSCSIData.fIrqAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1;
HALR->structured.autoSCSIData.uDMATransferRate = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 1;
HALR->structured.autoSCSIData.uDMATransferRate = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1;
HALR->structured.autoSCSIData.uSCSIId = 7;
HALR->structured.autoSCSIData.uSCSIConfiguration = 0x3F;
HALR->structured.autoSCSIData.uBusOnDelay = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 7;
HALR->structured.autoSCSIData.uBusOffDelay = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 4;
HALR->structured.autoSCSIData.uBusOnDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 7;
HALR->structured.autoSCSIData.uBusOffDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 4;
HALR->structured.autoSCSIData.uBIOSConfiguration = (bl->has_bios) ? 0x33 : 0x32;
if (!safe)
HALR->structured.autoSCSIData.uBIOSConfiguration |= 0x04;
@@ -416,7 +427,7 @@ BuslogicInitializeAutoSCSIRam(x54x_t *dev)
fatal("BuslogicInitializeAutoSCSIRam(): Error reading data\n");
fclose(f);
f = NULL;
if (bl->chip == CHIP_BUSLOGIC_PCI) {
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
x54x_io_remove(dev, dev->Base, 4);
switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) {
case 0:
@@ -472,7 +483,10 @@ buslogic_get_host_id(void *p)
HALocalRAM *HALR = &bl->LocalRAM;
if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991))
if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) ||
(bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) ||
(bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16))
return dev->HostID;
else
return HALR->structured.autoSCSIData.uSCSIId;
@@ -489,7 +503,11 @@ buslogic_get_irq(void *p)
HALocalRAM *HALR = &bl->LocalRAM;
if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991) || (bl->chip == CHIP_BUSLOGIC_PCI))
if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) ||
(bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) ||
(bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) ||
(bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30))
return dev->Irq;
else
return bl_irq[HALR->structured.autoSCSIData.uIrqChannel];
@@ -506,9 +524,12 @@ buslogic_get_dma(void *p)
HALocalRAM *HALR = &bl->LocalRAM;
if (bl->chip == CHIP_BUSLOGIC_PCI)
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30)
return (dev->Base ? 7 : 0);
else if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991))
else if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) ||
(bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) ||
(bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16))
return dev->DmaChannel;
else
return bl_dma[HALR->structured.autoSCSIData.uDMAChannel];
@@ -543,15 +564,15 @@ buslogic_param_len(void *p)
case 0xFB:
return 3;
case 0x93: /* Valid only for VLB */
return (bl->chip == CHIP_BUSLOGIC_VLB) ? 1 : 0;
return (bl->chip == CHIP_BUSLOGIC_VLB_445C_1994_12_01 || bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) ? 1 : 0;
case 0x95: /* Valid only for PCI */
return (bl->chip == CHIP_BUSLOGIC_PCI) ? 1 : 0;
return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0;
case 0x97: /* Valid only for PCI */
case 0xA7: /* Valid only for PCI */
return (bl->chip == CHIP_BUSLOGIC_PCI) ? 10 : 0;
return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 10 : 0;
case 0xA8: /* Valid only for PCI */
case 0xA9: /* Valid only for PCI */
return (bl->chip == CHIP_BUSLOGIC_PCI) ? 4 : 0;
return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 4 : 0;
default:
return 0;
}
@@ -690,6 +711,8 @@ buslogic_cmds(void *p)
BuslogicPCIInformation_t *ReplyPI;
int cCharsToTransfer;
buslogic_log("Buslogic cmds = 0x%02x\n", dev->Command);
switch (dev->Command) {
case 0x20:
dev->DataReplyLeft = 0;
@@ -754,7 +777,7 @@ buslogic_cmds(void *p)
case 0x84:
dev->DataBuf[0] = dev->fw_rev[4];
dev->DataReplyLeft = 1;
break;
break;
case 0x85:
if (strlen(dev->fw_rev) == 6)
dev->DataBuf[0] = dev->fw_rev[5];
@@ -763,7 +786,7 @@ buslogic_cmds(void *p)
dev->DataReplyLeft = 1;
break;
case 0x86:
if (bl->chip == CHIP_BUSLOGIC_PCI) {
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
ReplyPI = (BuslogicPCIInformation_t *) dev->DataBuf;
memset(ReplyPI, 0, sizeof(BuslogicPCIInformation_t));
ReplyPI->InformationIsValid = 0;
@@ -801,7 +824,7 @@ buslogic_cmds(void *p)
/* The reply length is set by the guest and is found in the first byte of the command buffer. */
dev->DataReplyLeft = dev->CmdBuf[0];
memset(dev->DataBuf, 0, dev->DataReplyLeft);
if (bl->chip == CHIP_BUSLOGIC_ISA_542)
if (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23)
i = 5;
else
i = 4;
@@ -819,16 +842,18 @@ buslogic_cmds(void *p)
memset(ReplyIESI, 0, sizeof(ReplyInquireExtendedSetupInformation));
switch (bl->chip) {
case CHIP_BUSLOGIC_ISA_542_1991:
case CHIP_BUSLOGIC_ISA_542:
case CHIP_BUSLOGIC_ISA:
case CHIP_BUSLOGIC_VLB:
case CHIP_BUSLOGIC_ISA_542B_1991_12_14:
case CHIP_BUSLOGIC_ISA_545S_1992_10_05:
case CHIP_BUSLOGIC_ISA_542BH_1993_05_23:
case CHIP_BUSLOGIC_ISA_545C_1994_12_01:
case CHIP_BUSLOGIC_VLB_445S_1993_11_16:
case CHIP_BUSLOGIC_VLB_445C_1994_12_01:
ReplyIESI->uBusType = 'A'; /* ISA style */
break;
case CHIP_BUSLOGIC_MCA:
case CHIP_BUSLOGIC_MCA_640A_1993_05_23:
ReplyIESI->uBusType = 'M'; /* MCA style */
break;
case CHIP_BUSLOGIC_PCI:
case CHIP_BUSLOGIC_PCI_958D_1995_12_30:
ReplyIESI->uBusType = 'E'; /* PCI style */
break;
}
@@ -836,17 +861,19 @@ buslogic_cmds(void *p)
ReplyIESI->u16ScatterGatherLimit = 8192;
ReplyIESI->cMailbox = dev->MailboxCount;
ReplyIESI->uMailboxAddressBase = dev->MailboxOutAddr;
ReplyIESI->fHostWideSCSI = 1; /* This should be set for the BT-542B as well. */
if ((bl->chip != CHIP_BUSLOGIC_ISA_542) && (bl->chip != CHIP_BUSLOGIC_ISA_542_1991) && (bl->chip != CHIP_BUSLOGIC_MCA))
ReplyIESI->fHostWideSCSI = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0;
if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) &&
(bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23) &&
(bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16))
ReplyIESI->fLevelSensitiveInterrupt = bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt;
if (bl->chip == CHIP_BUSLOGIC_PCI)
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30)
ReplyIESI->fHostUltraSCSI = 1;
memcpy(ReplyIESI->aFirmwareRevision, &(dev->fw_rev[strlen(dev->fw_rev) - 3]), sizeof(ReplyIESI->aFirmwareRevision));
buslogic_log("Return Extended Setup Information: %d\n", dev->CmdBuf[0]);
break;
case 0x8F:
bl->fAggressiveRoundRobinMode = dev->CmdBuf[0] & 1;
buslogic_log("Aggressive Round Robin Mode = %d\n", bl->fAggressiveRoundRobinMode);
dev->DataReplyLeft = 0;
break;
case 0x90:
@@ -866,13 +893,16 @@ buslogic_cmds(void *p)
dev->DataReply = 0;
break;
case 0x93:
if (bl->chip != CHIP_BUSLOGIC_VLB) {
if ((bl->chip != CHIP_BUSLOGIC_VLB_445C_1994_12_01) && (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16)) {
dev->DataReplyLeft = 0;
dev->Status |= STAT_INVCMD;
break;
}
case 0x92:
if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991) || (bl->chip == CHIP_BUSLOGIC_MCA)) {
if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) ||
(bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) ||
(bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23)) {
dev->DataReplyLeft = 0;
dev->Status |= STAT_INVCMD;
break;
@@ -901,7 +931,7 @@ buslogic_cmds(void *p)
break;
}
if ((bl->chip == CHIP_BUSLOGIC_PCI) && !(dev->Status & STAT_INVCMD)) {
if ((bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) && !(dev->Status & STAT_INVCMD)) {
x54x_io_remove(dev, dev->Base, 4);
switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) {
case 0:
@@ -918,7 +948,8 @@ buslogic_cmds(void *p)
}
break;
case 0x94:
if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991) || (bl->chip == CHIP_BUSLOGIC_MCA)) {
if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23)) {
dev->DataReplyLeft = 0;
dev->Status |= STAT_INVCMD;
break;
@@ -937,7 +968,7 @@ buslogic_cmds(void *p)
}
break;
case 0x95:
if (bl->chip == CHIP_BUSLOGIC_PCI) {
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
if (dev->Base != 0)
x54x_io_remove(dev, dev->Base, 4);
if (dev->CmdBuf[0] < 6) {
@@ -966,7 +997,7 @@ buslogic_cmds(void *p)
dev->DataReplyLeft = 0;
break;
case 0xA8:
if (bl->chip != CHIP_BUSLOGIC_PCI) {
if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
dev->DataReplyLeft = 0;
dev->Status |= STAT_INVCMD;
break;
@@ -985,7 +1016,7 @@ buslogic_cmds(void *p)
dev->DataReply = 0;
break;
case 0xA9:
if (bl->chip != CHIP_BUSLOGIC_PCI) {
if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
dev->DataReplyLeft = 0;
dev->Status |= STAT_INVCMD;
break;
@@ -1038,18 +1069,20 @@ buslogic_setup_data(void *p)
bl_setup->uCharacterD = 'D'; /* BusLogic model. */
switch(bl->chip)
{
case CHIP_BUSLOGIC_ISA_542_1991:
case CHIP_BUSLOGIC_ISA_542:
case CHIP_BUSLOGIC_ISA:
case CHIP_BUSLOGIC_ISA_542B_1991_12_14:
case CHIP_BUSLOGIC_ISA_545S_1992_10_05:
case CHIP_BUSLOGIC_ISA_542BH_1993_05_23:
case CHIP_BUSLOGIC_ISA_545C_1994_12_01:
bl_setup->uHostBusType = 'A';
break;
case CHIP_BUSLOGIC_MCA:
case CHIP_BUSLOGIC_MCA_640A_1993_05_23:
bl_setup->uHostBusType = 'B';
break;
case CHIP_BUSLOGIC_VLB:
case CHIP_BUSLOGIC_VLB_445S_1993_11_16:
case CHIP_BUSLOGIC_VLB_445C_1994_12_01:
bl_setup->uHostBusType = 'E';
break;
case CHIP_BUSLOGIC_PCI:
case CHIP_BUSLOGIC_PCI_958D_1995_12_30:
bl_setup->uHostBusType = 'F';
break;
}
@@ -1062,6 +1095,8 @@ buslogic_is_aggressive_mode(void *p)
x54x_t *dev = (x54x_t *)p;
buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
buslogic_log("Buslogic: Aggressive mode = %d\n", bl->fAggressiveRoundRobinMode);
return bl->fAggressiveRoundRobinMode;
}
@@ -1072,7 +1107,8 @@ buslogic_interrupt_type(void *p)
x54x_t *dev = (x54x_t *)p;
buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_ISA_542_1991) || (bl->chip == CHIP_BUSLOGIC_MCA))
if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) ||
(bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23))
return 0;
else
return !!bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt;
@@ -1302,7 +1338,7 @@ static void
BuslogicInitializeLocalRAM(buslogic_data_t *bl)
{
memset(bl->LocalRAM.u8View, 0, sizeof(HALocalRAM));
if (bl->chip == CHIP_BUSLOGIC_PCI) {
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 1;
} else {
bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 0;
@@ -1582,92 +1618,115 @@ buslogic_init(const device_t *info)
bl->fAggressiveRoundRobinMode = 1;
switch(bl->chip)
{
case CHIP_BUSLOGIC_ISA_542_1991:
strcpy(dev->name, "BT-542B");
bios_rom_name = "roms/scsi/buslogic/BT-542B_BIOS.ROM";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA221";
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_ISA_542:
strcpy(dev->name, "BT-542BH");
bios_rom_name = "roms/scsi/buslogic/BT-542BH_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA335";
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_ISA:
default:
strcpy(dev->name, "BT-545S");
bios_rom_name = "roms/scsi/buslogic/BT-545S_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-545S_AutoSCSI.rom";
autoscsi_rom_size = 0x4000;
has_scam_rom = 0;
dev->fw_rev = "AA421E";
dev->ha_bps = 10000000.0; /* fast SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_MCA:
strcpy(dev->name, "BT-640A");
bios_rom_name = "roms/scsi/buslogic/BT-640A_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "BA150";
dev->flags |= X54X_32BIT;
dev->pos_regs[0] = 0x08; /* MCA board ID */
dev->pos_regs[1] = 0x07;
mca_add(buslogic_mca_read, buslogic_mca_write, buslogic_mca_feedb, NULL, dev);
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_VLB:
strcpy(dev->name, "BT-445S");
bios_rom_name = "roms/scsi/buslogic/BT-445S_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-445S_AutoSCSI.rom";
autoscsi_rom_size = 0x8000;
has_scam_rom = 1;
scam_rom_name = "roms/scsi/buslogic/BT-445S_SCAM.rom";
scam_rom_size = 0x0200;
dev->fw_rev = "AA507B";
dev->flags |= X54X_32BIT;
dev->ha_bps = 10000000.0; /* fast SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_PCI:
strcpy(dev->name, "BT-958D");
bios_rom_name = "roms/scsi/buslogic/BT-958D_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-958D_AutoSCSI.rom";
autoscsi_rom_size = 0x8000;
has_scam_rom = 1;
scam_rom_name = "roms/scsi/buslogic/BT-958D_SCAM.rom";
scam_rom_size = 0x0200;
dev->fw_rev = "AA507B";
dev->flags |= (X54X_CDROM_BOOT | X54X_32BIT);
dev->ha_bps = 20000000.0; /* ultra SCSI */
dev->max_id = 15; /* wide SCSI */
break;
}
bios_rom_name = NULL;
has_autoscsi_rom = 0;
has_scam_rom = 0;
switch (bl->chip) {
case CHIP_BUSLOGIC_ISA_542B_1991_12_14: /*Dated December 14th, 1991*/
strcpy(dev->name, "BT-542B");
bios_rom_name = "roms/scsi/buslogic/BT-542B_BIOS.ROM";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA221";
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_ISA_545S_1992_10_05: /*Dated October 5th, 1992*/
strcpy(dev->name, "BT-545S");
bios_rom_name = "roms/scsi/buslogic/BT-545S_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA331";
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: /*Dated May 23rd, 1993*/
strcpy(dev->name, "BT-542BH");
bios_rom_name = "roms/scsi/buslogic/BT-542BH_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA335";
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_ISA_545C_1994_12_01: /*Dated December 1st, 1994*/
strcpy(dev->name, "BT-545C");
bios_rom_name = "roms/scsi/buslogic/BT-545C_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-545C_AutoSCSI.rom";
autoscsi_rom_size = 0x4000;
has_scam_rom = 0;
dev->fw_rev = "AA425J";
dev->ha_bps = 10000000.0; /* fast SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_MCA_640A_1993_05_23: /*Dated May 23rd, 1993*/
strcpy(dev->name, "BT-640A");
bios_rom_name = "roms/scsi/buslogic/BT-640A_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "BA335";
dev->flags |= X54X_32BIT;
dev->pos_regs[0] = 0x08; /* MCA board ID */
dev->pos_regs[1] = 0x07;
mca_add(buslogic_mca_read, buslogic_mca_write, buslogic_mca_feedb, NULL, dev);
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_VLB_445S_1993_11_16: /*Dated November 16th, 1993*/
strcpy(dev->name, "BT-445S");
bios_rom_name = "roms/scsi/buslogic/BT-445S_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 0;
has_scam_rom = 0;
dev->fw_rev = "AA335";
dev->flags |= X54X_32BIT;
dev->ha_bps = 5000000.0; /* normal SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_VLB_445C_1994_12_01: /*Dated December 1st, 1994*/
strcpy(dev->name, "BT-445C");
bios_rom_name = "roms/scsi/buslogic/BT-445C_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-445C_AutoSCSI.rom";
autoscsi_rom_size = 0x4000;
has_scam_rom = 0;
dev->fw_rev = "AA425J";
dev->flags |= X54X_32BIT;
dev->ha_bps = 10000000.0; /* fast SCSI */
dev->max_id = 7; /* narrow SCSI */
break;
case CHIP_BUSLOGIC_PCI_958D_1995_12_30: /*Dated December 30th, 1995*/
strcpy(dev->name, "BT-958D");
bios_rom_name = "roms/scsi/buslogic/BT-958D_BIOS.rom";
bios_rom_size = 0x4000;
bios_rom_mask = 0x3fff;
has_autoscsi_rom = 1;
autoscsi_rom_name = "roms/scsi/buslogic/BT-958D_AutoSCSI.rom";
autoscsi_rom_size = 0x8000;
has_scam_rom = 1;
scam_rom_name = "roms/scsi/buslogic/BT-958D_SCAM.rom";
scam_rom_size = 0x0200;
dev->fw_rev = "AA507B";
dev->flags |= (X54X_CDROM_BOOT | X54X_32BIT);
dev->ha_bps = 20000000.0; /* ultra SCSI */
dev->max_id = 15; /* wide SCSI */
break;
}
if ((dev->Base != 0) && !(dev->card_bus & DEVICE_MCA) && !(dev->card_bus & DEVICE_PCI)) {
x54x_io_set(dev, dev->Base, 4);
@@ -1709,7 +1768,7 @@ buslogic_init(const device_t *info)
bl->bios_mask = 0;
}
if (bl->chip == CHIP_BUSLOGIC_PCI) {
if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) {
dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, BuslogicPCIRead, BuslogicPCIWrite, dev);
buslogic_pci_bar[0].addr_regs[0] = 1;
@@ -1727,14 +1786,15 @@ buslogic_init(const device_t *info)
x54x_mem_disable(dev);
}
if ((bl->chip == CHIP_BUSLOGIC_MCA) || (bl->chip == CHIP_BUSLOGIC_PCI))
if ((bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30))
mem_mapping_disable(&bl->bios.mapping);
buslogic_log("Buslogic on port 0x%04X\n", dev->Base);
x54x_device_reset(dev);
if ((bl->chip != CHIP_BUSLOGIC_ISA_542) && (bl->chip != CHIP_BUSLOGIC_ISA_542_1991) && (bl->chip != CHIP_BUSLOGIC_MCA)) {
if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) && (bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) &&
(bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23)) {
BuslogicInitializeLocalRAM(bl);
BuslogicInitializeAutoSCSIRam(dev);
}
@@ -1848,19 +1908,10 @@ static const device_config_t BT958D_Config[] = {
}
};
const device_t buslogic_542b_1991_device = {
const device_t buslogic_542b_device = {
"BusLogic BT-542B ISA",
DEVICE_ISA | DEVICE_AT,
CHIP_BUSLOGIC_ISA_542_1991,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
};
const device_t buslogic_device = {
"BusLogic BT-542BH ISA",
DEVICE_ISA | DEVICE_AT,
CHIP_BUSLOGIC_ISA_542,
CHIP_BUSLOGIC_ISA_542B_1991_12_14,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
@@ -1869,7 +1920,25 @@ const device_t buslogic_device = {
const device_t buslogic_545s_device = {
"BusLogic BT-545S ISA",
DEVICE_ISA | DEVICE_AT,
CHIP_BUSLOGIC_ISA,
CHIP_BUSLOGIC_ISA_545S_1992_10_05,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
};
const device_t buslogic_542bh_device = {
"BusLogic BT-542BH ISA",
DEVICE_ISA | DEVICE_AT,
CHIP_BUSLOGIC_ISA_542BH_1993_05_23,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
};
const device_t buslogic_545c_device = {
"BusLogic BT-545C ISA",
DEVICE_ISA | DEVICE_AT,
CHIP_BUSLOGIC_ISA_545C_1994_12_01,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
@@ -1878,7 +1947,7 @@ const device_t buslogic_545s_device = {
const device_t buslogic_640a_device = {
"BusLogic BT-640A MCA",
DEVICE_MCA,
CHIP_BUSLOGIC_MCA,
CHIP_BUSLOGIC_MCA_640A_1993_05_23,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
NULL
@@ -1887,16 +1956,25 @@ const device_t buslogic_640a_device = {
const device_t buslogic_445s_device = {
"BusLogic BT-445S VLB",
DEVICE_VLB,
CHIP_BUSLOGIC_VLB,
CHIP_BUSLOGIC_VLB_445S_1993_11_16,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
};
const device_t buslogic_pci_device = {
const device_t buslogic_445c_device = {
"BusLogic BT-445C VLB",
DEVICE_VLB,
CHIP_BUSLOGIC_VLB_445C_1994_12_01,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT_ISA_Config
};
const device_t buslogic_958d_pci_device = {
"BusLogic BT-958D PCI",
DEVICE_PCI,
CHIP_BUSLOGIC_PCI,
CHIP_BUSLOGIC_PCI_958D_1995_12_30,
buslogic_init, x54x_close, NULL,
{ NULL }, NULL, NULL,
BT958D_Config

9
src/sound/CMakeLists.txt
View File

@@ -13,12 +13,17 @@
# Copyright 2020,2021 David Hrdlička.
#
add_library(snd OBJECT sound.c openal.c snd_opl.c snd_opl_nuked.c snd_resid.cc
add_library(snd OBJECT sound.c snd_opl.c snd_opl_nuked.c snd_resid.cc
midi.c midi_rtmidi.cpp snd_speaker.c snd_pssj.c snd_lpt_dac.c snd_ac97_codec.c snd_ac97_via.c
snd_lpt_dss.c snd_adlib.c snd_adlibgold.c snd_ad1848.c snd_audiopci.c
snd_lpt_dss.c snd_ps1.c snd_adlib.c snd_adlibgold.c snd_ad1848.c snd_audiopci.c
snd_azt2316a.c snd_cms.c snd_cs423x.c snd_gus.c snd_sb.c snd_sb_dsp.c
snd_emu8k.c snd_mpu401.c snd_sn76489.c snd_ssi2001.c snd_wss.c snd_ym7128.c)
if(OPENAL)
target_compile_definitions(snd PRIVATE USE_OPENAL)
target_sources(snd PRIVATE openal.c)
endif()
if(FLUIDSYNTH)
target_compile_definitions(snd PRIVATE USE_FLUIDSYNTH)
target_sources(snd PRIVATE midi_fluidsynth.c)

8
src/sound/midi_fluidsynth.c
View File

@@ -40,8 +40,10 @@ enum fluid_interp {
};
#ifdef USE_OPENAL
extern void givealbuffer_midi(void *buf, uint32_t size);
extern void al_set_midi(int freq, int buf_size);
#endif
static void *fluidsynth_handle; /* handle to FluidSynth DLL */
@@ -150,7 +152,9 @@ static void fluidsynth_thread(void *param)
buf_pos += buf_size;
if (buf_pos >= data->buf_size)
{
#ifdef USE_OPENAL
givealbuffer_midi(data->buffer, data->buf_size / sizeof(float));
#endif
buf_pos = 0;
}
}
@@ -163,7 +167,9 @@ static void fluidsynth_thread(void *param)
buf_pos += buf_size;
if (buf_pos >= data->buf_size)
{
#ifdef USE_OPENAL
givealbuffer_midi(data->buffer_int16, data->buf_size / sizeof(int16_t));
#endif
buf_pos = 0;
}
}
@@ -314,7 +320,9 @@ void* fluidsynth_init(const device_t *info)
data->buffer_int16 = malloc(data->buf_size);
}
#ifdef USE_OPENAL
al_set_midi(data->samplerate, data->buf_size);
#endif
dev = malloc(sizeof(midi_device_t));
memset(dev, 0, sizeof(midi_device_t));

8
src/sound/midi_mt32.c
View File

@@ -13,8 +13,10 @@
#include <86box/midi.h>
#ifdef USE_OPENAL
extern void givealbuffer_midi(void *buf, uint32_t size);
extern void al_set_midi(int freq, int buf_size);
#endif
static const mt32emu_report_handler_i_v0 handler_v0 = {
/** Returns the actual interface version ID */
@@ -136,7 +138,9 @@ static void mt32_thread(void *param)
buf_pos += bsize;
if (buf_pos >= buf_size)
{
#ifdef USE_OPENAL
givealbuffer_midi(buffer, buf_size / sizeof(float));
#endif
buf_pos = 0;
}
}
@@ -148,7 +152,9 @@ static void mt32_thread(void *param)
buf_pos += bsize;
if (buf_pos >= buf_size)
{
#ifdef USE_OPENAL
givealbuffer_midi(buffer_int16, buf_size / sizeof(int16_t));
#endif
buf_pos = 0;
}
}
@@ -200,7 +206,9 @@ void* mt32emu_init(char *control_rom, char *pcm_rom)
mt32emu_set_reversed_stereo_enabled(context, device_get_config_int("reversed_stereo"));
mt32emu_set_nice_amp_ramp_enabled(context, device_get_config_int("nice_ramp"));
#ifdef USE_OPENAL
al_set_midi(samplerate, buf_size);
#endif
dev = malloc(sizeof(midi_device_t));
memset(dev, 0, sizeof(midi_device_t));

126
src/sound/snd_adlibgold.c
View File

@@ -40,7 +40,7 @@ typedef struct adgold_t
int adgold_mma_intpos[2];
pc_timer_t adgold_mma_timer_count;
uint8_t adgold_midi_ctrl, midi_queue[16];
int midi_r, midi_w;
int uart_in, uart_out, sysex;
@@ -57,7 +57,7 @@ typedef struct adgold_t
opl_t opl;
ym7128_t ym7128;
int fm_vol_l, fm_vol_r;
int samp_vol_l, samp_vol_r;
int aux_vol_l, aux_vol_r;
@@ -85,7 +85,7 @@ static int bass_attenuation[0x10] =
(int)(0.708 * 16384), /*3 dB*/
(int)(0 * 16384), /*0 dB*/
(int)(0.708 * 16384), /*3 dB*/
(int)(1 * 16384), /*6 dB*/
(int)(1 * 16384), /*6 dB*/
(int)(1.413 * 16384), /*9 dB*/
(int)(1.995 * 16384), /*12 dB*/
(int)(2.819 * 16384), /*15 dB*/
@@ -115,7 +115,7 @@ static int treble_attenuation[0x10] =
(int)(0.708 * 16384), /*3 dB*/
(int)(0 * 16384), /*0 dB*/
(int)(0.708 * 16384), /*3 dB*/
(int)(1 * 16384), /*6 dB*/
(int)(1 * 16384), /*6 dB*/
(int)(1.413 * 16384), /*9 dB*/
(int)(1.995 * 16384), /*12 dB*/
(int)(1.995 * 16384),
@@ -171,10 +171,10 @@ void adgold_update_irq_status(adgold_t *adgold)
void adgold_getsamp_dma(adgold_t *adgold, int channel)
{
int temp;
if ((adgold->adgold_mma_regs[channel][0xc] & 0x60) && (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) >= 127))
return;
temp = dma_channel_read(1);
if (temp == DMA_NODATA) return;
adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp;
@@ -184,7 +184,7 @@ void adgold_getsamp_dma(adgold_t *adgold, int channel)
temp = dma_channel_read(1);
adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp;
adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255;
}
}
if (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) >= adgold->adgold_mma_intpos[channel])
{
adgold->adgold_mma_status &= ~(0x01 << channel);
@@ -208,7 +208,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
return;
}
if (val == 0xfe)
{
{
adgold->adgold_38x_state = 0;
return;
}
@@ -229,7 +229,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
if (val & 2)
memcpy(adgold->adgold_eeprom, adgold->adgold_38x_regs, 0x1a);
break;
case 0x04: /*Final output volume left*/
adgold->adgold_38x_regs[0x04] = val;
adgold->vol_l = attenuation[val & 0x3f];
@@ -246,7 +246,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
adgold->adgold_38x_regs[0x07] = val;
adgold->treble = val & 0xf;
break;
case 0x09: /*FM volume left*/
adgold->adgold_38x_regs[0x09] = val;
adgold->fm_vol_l = (int)(int8_t)(val - 128);
@@ -271,12 +271,12 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
adgold->adgold_38x_regs[0x0e] = val;
adgold->aux_vol_r = (int)(int8_t)(val - 128);
break;
case 0x18: /*Surround*/
adgold->adgold_38x_regs[0x18] = val;
ym7128_write(&adgold->ym7128, val);
break;
default:
adgold->adgold_38x_regs[adgold->adgold_38x_addr] = val;
break;
@@ -311,11 +311,11 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
case 0x7:
adgold->adgold_mma.timer2_latch = (adgold->adgold_mma.timer2_latch & 0xff) | (val << 8);
break;
case 0x8:
if ((val & 1) && !(adgold->adgold_mma_regs[0][8] & 1)) /*Reload timer 0*/
adgold->adgold_mma.timer0_count = adgold->adgold_mma.timer0_latch;
if ((val & 2) && !(adgold->adgold_mma_regs[0][8] & 2)) /*Reload timer 1*/
adgold->adgold_mma.timer1_count = adgold->adgold_mma.timer1_latch;
@@ -325,7 +325,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
if ((val & 8) && !(adgold->adgold_mma_regs[0][8] & 8)) /*Reload base timer*/
adgold->adgold_mma.timerbase_count = adgold->adgold_mma.timerbase_latch;
break;
case 0x9:
switch (val & 0x18)
{
@@ -345,7 +345,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
{
if (!(adgold->adgold_mma_regs[0][0x9] & 1))
adgold->adgold_mma.voice_count[0] = adgold->adgold_mma.voice_latch[0];
if (adgold->adgold_mma_regs[0][0xc] & 1)
{
if (adgold->adgold_mma_regs[0][0xc] & 0x80)
@@ -385,7 +385,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
}
adgold->adgold_mma_enable[0] = val & 0x01;
break;
case 0xb:
if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128)
{
@@ -398,14 +398,14 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
}
}
break;
case 0xc:
adgold->adgold_mma_intpos[0] = (7 - ((val >> 2) & 7)) * 8;
break;
case 0xd:
adgold->adgold_midi_ctrl = val & 0x3f;
if ((adgold->adgold_midi_ctrl & 0x0f) != 0x0f) {
if ((adgold->adgold_midi_ctrl & 0x0f) == 0x00) {
adgold->uart_out = 0;
@@ -432,7 +432,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
adgold_update_irq_status(adgold);
break;
case 0xe:
if (adgold->uart_out) {
midi_raw_out_byte(val);
@@ -468,7 +468,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
{
if (!(adgold->adgold_mma_regs[1][0x9] & 1))
adgold->adgold_mma.voice_count[1] = adgold->adgold_mma.voice_latch[1];
if (adgold->adgold_mma_regs[1][0xc] & 1)
{
while (((adgold->adgold_mma_fifo_end[1] - adgold->adgold_mma_fifo_start[1]) & 255) < 128)
@@ -479,7 +479,7 @@ void adgold_write(uint16_t addr, uint8_t val, void *p)
}
adgold->adgold_mma_enable[1] = val & 0x01;
break;
case 0xb:
if (((adgold->adgold_mma_fifo_end[1] - adgold->adgold_mma_fifo_start[1]) & 255) < 128)
{
@@ -506,7 +506,7 @@ uint8_t adgold_read(uint16_t addr, void *p)
{
adgold_t *adgold = (adgold_t *)p;
uint8_t temp = 0;
switch (addr & 7)
{
case 0: case 1:
@@ -519,7 +519,7 @@ uint8_t adgold_read(uint16_t addr, void *p)
else
temp = opl3_read(addr, &adgold->opl);
break;
case 3:
if (adgold->adgold_38x_state)
{
@@ -535,7 +535,7 @@ uint8_t adgold_read(uint16_t addr, void *p)
default:
temp = adgold->adgold_38x_regs[adgold->adgold_38x_addr];
}
}
}
else
temp = opl3_read(addr, &adgold->opl);
@@ -592,7 +592,7 @@ void adgold_update(adgold_t *adgold)
for (; adgold->pos < sound_pos_global; adgold->pos++)
{
adgold->mma_buffer[0][adgold->pos] = adgold->mma_buffer[1][adgold->pos] = 0;
if (adgold->adgold_mma_regs[0][9] & 0x20)
adgold->mma_buffer[0][adgold->pos] += adgold->adgold_mma_out[0] / 2;
if (adgold->adgold_mma_regs[0][9] & 0x40)
@@ -620,11 +620,11 @@ void adgold_mma_poll(adgold_t *adgold, int channel)
adgold->adgold_mma_out[channel] = dat;
adgold->adgold_mma_fifo_start[channel] = (adgold->adgold_mma_fifo_start[channel] + 1) & 255;
break;
case 0x40: /*12-bit sensible format*/
if (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) < 2)
return;
dat = adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_start[channel]] & 0xf0;
adgold->adgold_mma_fifo_start[channel] = (adgold->adgold_mma_fifo_start[channel] + 1) & 255;
dat |= (adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_start[channel]] << 8);
@@ -632,7 +632,7 @@ void adgold_mma_poll(adgold_t *adgold, int channel)
adgold->adgold_mma_out[channel] = dat;
break;
}
if (adgold->adgold_mma_regs[channel][0xc] & 1)
{
adgold_getsamp_dma(adgold, channel);
@@ -652,9 +652,9 @@ void adgold_mma_poll(adgold_t *adgold, int channel)
void adgold_timer_poll(void *p)
{
adgold_t *adgold = (adgold_t *)p;
timer_advance_u64(&adgold->adgold_mma_timer_count, (uint64_t)((double)TIMER_USEC * 1.88964));
if (adgold->adgold_midi_ctrl & 0x3f) {
if ((adgold->adgold_midi_ctrl & 0x3f) != 0x3f) {
if (adgold->uart_out)
@@ -729,7 +729,7 @@ static void adgold_get_buffer(int32_t *buffer, int len, void *p)
adgold_t *adgold = (adgold_t *)p;
int16_t* adgold_buffer = malloc(sizeof(int16_t) * len * 2);
if (adgold_buffer == NULL) fatal("adgold_buffer = NULL");
int c;
opl3_update(&adgold->opl);
@@ -745,7 +745,7 @@ static void adgold_get_buffer(int32_t *buffer, int len, void *p)
if (adgold->surround_enabled)
ym7128_apply(&adgold->ym7128, adgold_buffer, len);
switch (adgold->adgold_38x_regs[0x8] & 6)
{
case 0:
@@ -763,7 +763,7 @@ static void adgold_get_buffer(int32_t *buffer, int len, void *p)
case 6: /*Left and right channels*/
break;
}
switch (adgold->adgold_38x_regs[0x8] & 0x18)
{
case 0x00: /*Forced mono*/
@@ -855,10 +855,10 @@ static void adgold_input_msg(void *p, uint8_t *msg, uint32_t len)
{
adgold_t *adgold = (adgold_t *)p;
uint8_t i;
if (adgold->sysex)
return;
if (adgold->uart_in) {
adgold->adgold_mma_status |= 0x04;
@@ -866,7 +866,7 @@ static void adgold_input_msg(void *p, uint8_t *msg, uint32_t len)
adgold->midi_queue[adgold->midi_w++] = msg[i];
adgold->midi_w &= 0x0f;
}
adgold_update_irq_status(adgold);
}
}
@@ -875,7 +875,7 @@ static int adgold_input_sysex(void *p, uint8_t *buffer, uint32_t len, int abort)
{
adgold_t *adgold = (adgold_t *)p;
uint32_t i;
if (abort) {
adgold->sysex = 0;
return 0;
@@ -903,7 +903,7 @@ void *adgold_init(const device_t *info)
adgold->surround_enabled = device_get_config_int("surround");
adgold->gameport_enabled = device_get_config_int("gameport");
opl3_init(&adgold->opl);
if (adgold->surround_enabled)
ym7128_init(&adgold->ym7128);
@@ -917,6 +917,33 @@ void *adgold_init(const device_t *info)
for (; c >= 0; c--)
attenuation[c] = 0;
adgold->adgold_eeprom[0x00] = 0x00;
adgold->adgold_eeprom[0x01] = 0x00;
adgold->adgold_eeprom[0x02] = 0x7f;
adgold->adgold_eeprom[0x03] = 0x7f;
adgold->adgold_eeprom[0x04] = 0xf8; /* vol_l */
adgold->adgold_eeprom[0x05] = 0xf8; /* vol_r */
adgold->adgold_eeprom[0x06] = 0xf6; /* bass */
adgold->adgold_eeprom[0x07] = 0xf6; /* treble */
adgold->adgold_eeprom[0x08] = 0xce;
adgold->adgold_eeprom[0x09] = 0xff; /* fm_vol_l */
adgold->adgold_eeprom[0x0a] = 0xff; /* fm_vol_r */
adgold->adgold_eeprom[0x0b] = 0xff; /* samp_vol_l */
adgold->adgold_eeprom[0x0c] = 0xff; /* samp_vol_r */
adgold->adgold_eeprom[0x0d] = 0xff; /* aux_vol_l */
adgold->adgold_eeprom[0x0e] = 0xff; /* aux_vol_r */
adgold->adgold_eeprom[0x0f] = 0xff;
adgold->adgold_eeprom[0x10] = 0xff;
adgold->adgold_eeprom[0x11] = 0x20;
adgold->adgold_eeprom[0x12] = 0x00;
adgold->adgold_eeprom[0x13] = 0x0b; /* IRQ 1, DMA1 */
adgold->adgold_eeprom[0x14] = 0x00; /* DMA2 */
adgold->adgold_eeprom[0x15] = 0x71; /* Port */
adgold->adgold_eeprom[0x16] = 0x00;
adgold->adgold_eeprom[0x17] = 0x68;
adgold->adgold_eeprom[0x18] = 0x00; /* Surround */
adgold->adgold_eeprom[0x19] = 0x00;
f = nvr_fopen("adgold.bin", "rb");
if (f)
{
@@ -927,8 +954,9 @@ void *adgold_init(const device_t *info)
adgold->adgold_status = 0xf;
adgold->adgold_38x_addr = 0;
adgold->adgold_eeprom[0x13] = 3 | (1 << 4); /*IRQ 7, DMA 1*/
adgold->adgold_eeprom[0x14] = 3 << 4; /*DMA 3*/
adgold->adgold_eeprom[0x13] = 3 | (1 << 3); /*IRQ 7, DMA 1*/
// adgold->adgold_eeprom[0x14] = 3 << 4; /*DMA 3 - Double check this */
adgold->adgold_eeprom[0x14] = 0x00; /*DMA ?*/
adgold->adgold_eeprom[0x15] = 0x388 / 8; /*Present at 388-38f*/
memcpy(adgold->adgold_38x_regs, adgold->adgold_eeprom, 0x19);
adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f];
@@ -940,25 +968,25 @@ void *adgold_init(const device_t *info)
adgold->samp_vol_l = (int)(int8_t)(adgold->adgold_eeprom[0x0b] - 128);
adgold->samp_vol_r = (int)(int8_t)(adgold->adgold_eeprom[0x0c] - 128);
adgold->aux_vol_l = (int)(int8_t)(adgold->adgold_eeprom[0x0d] - 128);
adgold->aux_vol_r = (int)(int8_t)(adgold->adgold_eeprom[0x0e] - 128);
adgold->aux_vol_r = (int)(int8_t)(adgold->adgold_eeprom[0x0e] - 128);
adgold->adgold_mma_enable[0] = 0;
adgold->adgold_mma_fifo_start[0] = adgold->adgold_mma_fifo_end[0] = 0;
/*388/389 are handled by adlib_init*/
io_sethandler(0x0388, 0x0008, adgold_read, NULL, NULL, adgold_write, NULL, NULL, adgold);
if (adgold->gameport_enabled)
gameport_remap(gameport_add(&gameport_201_device), 0x201);
timer_add(&adgold->adgold_mma_timer_count, adgold_timer_poll, adgold, 1);
sound_add_handler(adgold_get_buffer, adgold);
sound_set_cd_audio_filter(adgold_filter_cd_audio, adgold);
if (device_get_config_int("receive_input"))
midi_in_handler(1, adgold_input_msg, adgold_input_sysex, adgold);
return adgold;
}
@@ -966,7 +994,7 @@ void adgold_close(void *p)
{
FILE *f;
adgold_t *adgold = (adgold_t *)p;
f = nvr_fopen("adgold.bin", "wb");
if (f)
{

11
src/sound/snd_pas16.c
View File

@@ -17,6 +17,7 @@
#include <86box/filters.h>
#include <86box/snd_mpu401.h>
#include <86box/snd_opl.h>
#include <86box/snd_sb.h>
#include <86box/snd_sb_dsp.h>
@@ -413,7 +414,7 @@ static void pas16_pit_out(uint16_t port, uint8_t val, void *p)
{
if (!(val & 0x20))
{
if (val & 2) pas16->pit.rl[0] = timer_get_remaining_u64(&pit.timer[0]) / PITCONST;;
if (val & 2) pas16->pit.rl[0] = timer_get_remaining_u64(&pas16->pit.timer[0]) / PITCONST;;
if (val & 4) pas16->pit.rl[1] = pas16->pit.c[1];
if (val & 8) pas16->pit.rl[2] = pas16->pit.c[2];
}
@@ -429,7 +430,7 @@ static void pas16_pit_out(uint16_t port, uint8_t val, void *p)
if (!(pas16->pit.ctrl & 0x30))
{
if (!t)
pas16->pit.rl[t] = timer_get_remaining_u64(&pit.timer[t]) / PITCONST;
pas16->pit.rl[t] = timer_get_remaining_u64(&pas16->pit.timer[t]) / PITCONST;
else
{
pas16->pit.rl[t] = pas16->pit.c[t];
@@ -450,7 +451,7 @@ static void pas16_pit_out(uint16_t port, uint8_t val, void *p)
{
pas16->pit.rm[t] = 3;
if (!t)
pas16->pit.rl[t] = timer_get_remaining_u64(&pit.timer[t]) / PITCONST;
pas16->pit.rl[t] = timer_get_remaining_u64(&pas16->pit.timer[t]) / PITCONST;
else
pas16->pit.rl[t] = pas16->pit.c[t];
}
@@ -519,8 +520,8 @@ static uint8_t pas16_pit_in(uint16_t port, void *p)
pas16->pit.rereadlatch[t] = 0;
if (!t)
{
pas16->pit.rl[t] = timer_get_remaining_u64(&pit.timer[t]) / PITCONST;
if ((timer_get_remaining_u64(&pit.timer[t]) / PITCONST) > 65536)
pas16->pit.rl[t] = timer_get_remaining_u64(&pas16->pit.timer[t]) / PITCONST;
if ((timer_get_remaining_u64(&pas16->pit.timer[t]) / PITCONST) > 65536)
pas16->pit.rl[t] = 0xFFFF;
}
else

201
src/sound/snd_ps1.c Normal file
View File

@@ -0,0 +1,201 @@
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/io.h>
#include <86box/pic.h>
#include <86box/timer.h>
#include <86box/device.h>
#include <86box/sound.h>
#include <86box/snd_sn76489.h>
typedef struct {
sn76489_t sn76489;
uint8_t status, ctrl;
uint64_t timer_latch;
pc_timer_t timer_count;
int timer_enable;
uint8_t fifo[2048];
int fifo_read_idx, fifo_write_idx;
int fifo_threshold;
uint8_t dac_val;
int16_t buffer[SOUNDBUFLEN];
int pos;
} ps1snd_t;
static void
ps1snd_update_irq_status(ps1snd_t *snd)
{
if (((snd->status & snd->ctrl) & 0x12) && (snd->ctrl & 0x01))
picint(1 << 7);
else
picintc(1 << 7);
}
static uint8_t
ps1snd_read(uint16_t port, void *priv)
{
ps1snd_t *ps1snd = (ps1snd_t *)priv;
uint8_t ret = 0xff;
switch (port & 7) {
case 0: /* ADC data */
ps1snd->status &= ~0x10;
ps1snd_update_irq_status(ps1snd);
ret = 0;
break;
case 2: /* status */
ret = ps1snd->status;
ret |= (ps1snd->ctrl & 0x01);
if ((ps1snd->fifo_write_idx - ps1snd->fifo_read_idx) >= 2048)
ret |= 0x08; /* FIFO full */
if (ps1snd->fifo_read_idx == ps1snd->fifo_write_idx)
ret |= 0x04; /* FIFO empty */
break;
case 3: /* FIFO timer */
/*
* The PS/1 Technical Reference says this should return
* thecurrent value, but the PS/1 BIOS and Stunt Island
* expect it not to change.
*/
ret = ps1snd->timer_latch;
break;
case 4:
case 5:
case 6:
case 7:
ret = 0;
}
return(ret);
}
static void
ps1snd_write(uint16_t port, uint8_t val, void *priv)
{
ps1snd_t *ps1snd = (ps1snd_t *)priv;
switch (port & 7) {
case 0: /* DAC output */
if ((ps1snd->fifo_write_idx - ps1snd->fifo_read_idx) < 2048) {
ps1snd->fifo[ps1snd->fifo_write_idx & 2047] = val;
ps1snd->fifo_write_idx++;
}
break;
case 2: /* control */
ps1snd->ctrl = val;
if (! (val & 0x02))
ps1snd->status &= ~0x02;
ps1snd_update_irq_status(ps1snd);
break;
case 3: /* timer reload value */
ps1snd->timer_latch = val;
if (val)
timer_set_delay_u64(&ps1snd->timer_count, ((0xff-val) * TIMER_USEC));
else
timer_disable(&ps1snd->timer_count);
break;
case 4: /* almost empty */
ps1snd->fifo_threshold = val * 4;
break;
}
}
static void
ps1snd_update(ps1snd_t *ps1snd)
{
for (; ps1snd->pos < sound_pos_global; ps1snd->pos++)
ps1snd->buffer[ps1snd->pos] = (int8_t)(ps1snd->dac_val ^ 0x80) * 0x20;
}
static void
ps1snd_callback(void *priv)
{
ps1snd_t *ps1snd = (ps1snd_t *)priv;
ps1snd_update(ps1snd);
if (ps1snd->fifo_read_idx != ps1snd->fifo_write_idx) {
ps1snd->dac_val = ps1snd->fifo[ps1snd->fifo_read_idx & 2047];
ps1snd->fifo_read_idx++;
}
if ((ps1snd->fifo_write_idx - ps1snd->fifo_read_idx) == ps1snd->fifo_threshold)
ps1snd->status |= 0x02; /*FIFO almost empty*/
ps1snd->status |= 0x10; /*ADC data ready*/
ps1snd_update_irq_status(ps1snd);
timer_advance_u64(&ps1snd->timer_count, ps1snd->timer_latch * TIMER_USEC);
}
static void
ps1snd_get_buffer(int32_t *buffer, int len, void *priv)
{
ps1snd_t *ps1snd = (ps1snd_t *)priv;
int c;
ps1snd_update(ps1snd);
for (c = 0; c < len * 2; c++)
buffer[c] += ps1snd->buffer[c >> 1];
ps1snd->pos = 0;
}
static void *
ps1snd_init(const device_t *info)
{
ps1snd_t *ps1snd = malloc(sizeof(ps1snd_t));
memset(ps1snd, 0x00, sizeof(ps1snd_t));
sn76489_init(&ps1snd->sn76489, 0x0205, 0x0001, SN76496, 4000000);
io_sethandler(0x0200, 1, ps1snd_read,NULL,NULL, ps1snd_write,NULL,NULL, ps1snd);
io_sethandler(0x0202, 6, ps1snd_read,NULL,NULL, ps1snd_write,NULL,NULL, ps1snd);
timer_add(&ps1snd->timer_count, ps1snd_callback, ps1snd, 0);
sound_add_handler(ps1snd_get_buffer, ps1snd);
return(ps1snd);
}
static void
ps1snd_close(void *priv)
{
ps1snd_t *ps1snd = (ps1snd_t *)priv;
free(ps1snd);
}
const device_t ps1snd_device = {
"IBM PS/1 Audio Card",
0, 0,
ps1snd_init, ps1snd_close,
NULL,
{ NULL },
NULL,
NULL,
NULL
};

394
src/sound/snd_pssj.c
View File

@@ -15,233 +15,289 @@
typedef struct pssj_t
{
sn76489_t sn76489;
uint8_t ctrl;
uint8_t wave;
uint8_t dac_val;
uint16_t freq;
int amplitude;
int irq;
pc_timer_t timer_count;
int enable;
int wave_pos;
int pulse_width;
sn76489_t sn76489;
int16_t buffer[SOUNDBUFLEN];
int pos;
uint8_t ctrl;
uint8_t wave;
uint8_t dac_val;
uint16_t freq;
int amplitude;
int irq;
pc_timer_t timer_count;
int enable;
int wave_pos;
int pulse_width;
int16_t buffer[SOUNDBUFLEN];
int pos;
} pssj_t;
static void pssj_update_irq(pssj_t *pssj)
{
if (pssj->irq && (pssj->ctrl & 0x10) && (pssj->ctrl & 0x08))
picint(1 << 7);
if (pssj->irq && (pssj->ctrl & 0x10) && (pssj->ctrl & 0x08))
picint(1 << 7);
}
static void pssj_write(uint16_t port, uint8_t val, void *p)
{
pssj_t *pssj = (pssj_t *)p;
pssj_t *pssj = (pssj_t *)p;
switch (port & 3)
{
case 0:
pssj->ctrl = val;
if (!pssj->enable && ((val & 4) && (pssj->ctrl & 3)))
timer_set_delay_u64(&pssj->timer_count, (TIMER_USEC * (1000000.0 / 3579545.0) * (double)(pssj->freq ? pssj->freq : 0x400)));
pssj->enable = (val & 4) && (pssj->ctrl & 3);
if (!pssj->enable)
timer_disable(&pssj->timer_count);
sn74689_set_extra_divide(&pssj->sn76489, val & 0x40);
if (!(val & 8))
pssj->irq = 0;
pssj_update_irq(pssj);
break;
case 1:
switch (pssj->ctrl & 3)
{
case 1: /*Sound channel*/
pssj->wave = val;
pssj->pulse_width = val & 7;
break;
case 3: /*Direct DAC*/
pssj->dac_val = val;
break;
}
break;
case 2:
pssj->freq = (pssj->freq & 0xf00) | val;
break;
case 3:
pssj->freq = (pssj->freq & 0x0ff) | ((val & 0xf) << 8);
pssj->amplitude = val >> 4;
break;
}
switch (port & 3)
{
case 0:
pssj->ctrl = val;
if (!pssj->enable && ((val & 4) && (pssj->ctrl & 3)))
timer_set_delay_u64(&pssj->timer_count, (TIMER_USEC * (1000000.0 / 3579545.0) * (double)(pssj->freq ? pssj->freq : 0x400)));
pssj->enable = (val & 4) && (pssj->ctrl & 3);
if (!pssj->enable)
timer_disable(&pssj->timer_count);
sn74689_set_extra_divide(&pssj->sn76489, val & 0x40);
if (!(val & 8))
pssj->irq = 0;
pssj_update_irq(pssj);
break;
case 1:
switch (pssj->ctrl & 3)
{
case 1: /*Sound channel*/
pssj->wave = val;
pssj->pulse_width = val & 7;
break;
case 3: /*Direct DAC*/
pssj->dac_val = val;
break;
}
break;
case 2:
pssj->freq = (pssj->freq & 0xf00) | val;
break;
case 3:
pssj->freq = (pssj->freq & 0x0ff) | ((val & 0xf) << 8);
pssj->amplitude = val >> 4;
break;
}
}
static uint8_t pssj_read(uint16_t port, void *p)
{
pssj_t *pssj = (pssj_t *)p;
switch (port & 3)
{
case 0:
return (pssj->ctrl & ~0x88) | (pssj->irq ? 8 : 0);
case 1:
switch (pssj->ctrl & 3)
{
case 0: /*Joystick*/
return 0;
case 1: /*Sound channel*/
return pssj->wave;
case 2: /*Successive approximation*/
return 0x80;
case 3: /*Direct DAC*/
return pssj->dac_val;
}
break;
case 2:
return pssj->freq & 0xff;
case 3:
return (pssj->freq >> 8) | (pssj->amplitude << 4);
default:
return 0xff;
}
pssj_t *pssj = (pssj_t *)p;
return 0xff;
switch (port & 3)
{
case 0:
return (pssj->ctrl & ~0x88) | (pssj->irq ? 8 : 0);
case 1:
switch (pssj->ctrl & 3)
{
case 0: /*Joystick*/
return 0;
case 1: /*Sound channel*/
return pssj->wave;
case 2: /*Successive approximation*/
return 0x80;
case 3: /*Direct DAC*/
return pssj->dac_val;
}
break;
case 2:
return pssj->freq & 0xff;
case 3:
return (pssj->freq >> 8) | (pssj->amplitude << 4);
default:
return 0xff;
}
return 0xff;
}
static void pssj_update(pssj_t *pssj)
{
for (; pssj->pos < sound_pos_global; pssj->pos++)
pssj->buffer[pssj->pos] = (((int8_t)(pssj->dac_val ^ 0x80) * 0x20) * pssj->amplitude) / 15;
for (; pssj->pos < sound_pos_global; pssj->pos++)
pssj->buffer[pssj->pos] = (((int8_t)(pssj->dac_val ^ 0x80) * 0x20) * pssj->amplitude) / 15;
}
static void pssj_callback(void *p)
{
pssj_t *pssj = (pssj_t *)p;
int data;
pssj_t *pssj = (pssj_t *)p;
int data;
pssj_update(pssj);
if (pssj->ctrl & 2)
pssj_update(pssj);
if (pssj->ctrl & 2)
{
if ((pssj->ctrl & 3) == 3)
{
if ((pssj->ctrl & 3) == 3)
{
data = dma_channel_read(1);
data = dma_channel_read(1);
if (data != DMA_NODATA)
{
pssj->dac_val = data & 0xff;
}
}
else
{
data = dma_channel_write(1, 0x80);
}
if ((data & DMA_OVER) && data != DMA_NODATA)
{
if (pssj->ctrl & 0x08)
{
pssj->irq = 1;
pssj_update_irq(pssj);
}
}
if (data != DMA_NODATA)
{
pssj->dac_val = data & 0xff;
}
}
else
{
switch (pssj->wave & 0xc0)
{
case 0x00: /*Pulse*/
pssj->dac_val = (pssj->wave_pos > (pssj->pulse_width << 1)) ? 0xff : 0;
break;
case 0x40: /*Ramp*/
pssj->dac_val = pssj->wave_pos << 3;
break;
case 0x80: /*Triangle*/
if (pssj->wave_pos & 16)
pssj->dac_val = (pssj->wave_pos ^ 31) << 4;
else
pssj->dac_val = pssj->wave_pos << 4;
break;
case 0xc0:
pssj->dac_val = 0x80;
break;
}
pssj->wave_pos = (pssj->wave_pos + 1) & 31;
data = dma_channel_write(1, 0x80);
}
timer_advance_u64(&pssj->timer_count, (TIMER_USEC * (1000000.0 / 3579545.0) * (double)(pssj->freq ? pssj->freq : 0x400)));
if ((data & DMA_OVER) && data != DMA_NODATA)
{
if (pssj->ctrl & 0x08)
{
pssj->irq = 1;
pssj_update_irq(pssj);
}
}
}
else
{
switch (pssj->wave & 0xc0)
{
case 0x00: /*Pulse*/
pssj->dac_val = (pssj->wave_pos > (pssj->pulse_width << 1)) ? 0xff : 0;
break;
case 0x40: /*Ramp*/
pssj->dac_val = pssj->wave_pos << 3;
break;
case 0x80: /*Triangle*/
if (pssj->wave_pos & 16)
pssj->dac_val = (pssj->wave_pos ^ 31) << 4;
else
pssj->dac_val = pssj->wave_pos << 4;
break;
case 0xc0:
pssj->dac_val = 0x80;
break;
}
pssj->wave_pos = (pssj->wave_pos + 1) & 31;
}
timer_advance_u64(&pssj->timer_count, (TIMER_USEC * (1000000.0 / 3579545.0) * (double)(pssj->freq ? pssj->freq : 0x400)));
}
static void pssj_get_buffer(int32_t *buffer, int len, void *p)
{
pssj_t *pssj = (pssj_t *)p;
int c;
pssj_update(pssj);
for (c = 0; c < len * 2; c++)
buffer[c] += pssj->buffer[c >> 1];
pssj_t *pssj = (pssj_t *)p;
int c;
pssj->pos = 0;
pssj_update(pssj);
for (c = 0; c < len * 2; c++)
buffer[c] += pssj->buffer[c >> 1];
pssj->pos = 0;
}
void *pssj_init(const device_t *info)
{
pssj_t *pssj = malloc(sizeof(pssj_t));
memset(pssj, 0, sizeof(pssj_t));
pssj_t *pssj = malloc(sizeof(pssj_t));
memset(pssj, 0, sizeof(pssj_t));
sn76489_init(&pssj->sn76489, 0x00c0, 0x0004, PSSJ, 3579545);
sn76489_init(&pssj->sn76489, 0x00c0, 0x0004, PSSJ, 3579545);
io_sethandler(0x00C4, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj);
timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable);
sound_add_handler(pssj_get_buffer, pssj);
return pssj;
io_sethandler(0x00C4, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj);
timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable);
sound_add_handler(pssj_get_buffer, pssj);
return pssj;
}
void *pssj_1e0_init(const device_t *info)
{
pssj_t *pssj = malloc(sizeof(pssj_t));
memset(pssj, 0, sizeof(pssj_t));
pssj_t *pssj = malloc(sizeof(pssj_t));
memset(pssj, 0, sizeof(pssj_t));
sn76489_init(&pssj->sn76489, 0x01e0, 0x0004, PSSJ, 3579545);
sn76489_init(&pssj->sn76489, 0x01e0, 0x0004, PSSJ, 3579545);
io_sethandler(0x01E4, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj);
timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable);
sound_add_handler(pssj_get_buffer, pssj);
return pssj;
io_sethandler(0x01E4, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj);
timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable);
sound_add_handler(pssj_get_buffer, pssj);
return pssj;
}
void *pssj_isa_init(const device_t *info)
{
pssj_t *pssj = malloc(sizeof(pssj_t));
memset(pssj, 0, sizeof(pssj_t));
sn76489_init(&pssj->sn76489, 0x00c0, 0x0004, PSSJ, 3579545);
uint16_t addr = device_get_config_hex16("base");
io_sethandler(addr, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj);
timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable);
sound_add_handler(pssj_get_buffer, pssj);
return pssj;
}
void pssj_close(void *p)
{
pssj_t *pssj = (pssj_t *)p;
pssj_t *pssj = (pssj_t *)p;
free(pssj);
free(pssj);
}
static const device_config_t pssj_isa_config[] =
{
{
"base", "Address", CONFIG_HEX16, "", 0xC0, "", { 0 },
{
{
"0xC0", 0xC0
},
{
"0x1E0", 0x1E0
},
{
"0x2C0", 0x2C0
},
{
""
}
}
},
{
"", "", -1
}
};
const device_t pssj_device =
{
"Tandy PSSJ",
0, 0,
pssj_init,
pssj_close,
NULL,
{ NULL },
NULL,
NULL
"Tandy PSSJ",
0,
0,
pssj_init,
pssj_close,
NULL,
{ NULL },
NULL,
NULL
};
const device_t pssj_1e0_device =
{
"Tandy PSSJ (port 1e0h)",
0, 0,
pssj_1e0_init,
pssj_close,
NULL,
{ NULL },
NULL,
NULL
"Tandy PSSJ (port 1e0h)",
0,
0,
pssj_1e0_init,
pssj_close,
NULL,
{ NULL },
NULL,
NULL
};
const device_t pssj_isa_device =
{
"Tandy PSSJ Clone",
DEVICE_ISA,
0,
pssj_isa_init,
pssj_close,
NULL,
{ NULL },
NULL,
NULL,
pssj_isa_config
};

7
src/sound/sound.c
View File

@@ -104,6 +104,7 @@ static const SOUND_CARD sound_cards[] =
#if defined(DEV_BRANCH) && defined(USE_PAS16)
{ "pas16", &pas16_device },
#endif
{ "pssj_isa", &pssj_isa_device },
{ "wss", &wss_device },
{ "adlib_mca", &adlib_mca_device },
{ "ncraudio", &ncr_business_audio_device },
@@ -323,10 +324,12 @@ sound_cd_thread(void *param)
}
}
#ifdef USE_OPENAL
if (sound_is_float)
givealbuffer_cd(cd_out_buffer);
else
givealbuffer_cd(cd_out_buffer_int16);
#endif
}
}
@@ -430,10 +433,12 @@ sound_poll(void *priv)
}
}
#ifdef USE_OPENAL
if (sound_is_float)
givealbuffer(outbuffer_ex);
else
givealbuffer(outbuffer_ex_int16);
#endif
if (cd_thread_enable) {
cd_buf_update--;
@@ -462,7 +467,9 @@ sound_reset(void)
midi_device_init();
midi_in_device_init();
#ifdef USE_OPENAL
inital();
#endif
timer_add(&sound_poll_timer, sound_poll, NULL, 1);

38
src/video/vid_hercules.c
View File

@@ -31,45 +31,9 @@
#include <86box/pit.h>
#include <86box/device.h>
#include <86box/video.h>
#include <86box/vid_hercules.h>
typedef struct {
mem_mapping_t mapping;
uint8_t crtc[32], charbuffer[4096];
int crtcreg;
uint8_t ctrl,
ctrl2,
stat;
uint64_t dispontime,
dispofftime;
pc_timer_t timer;
int firstline,
lastline;
int linepos,
displine;
int vc,
sc;
uint16_t ma,
maback;
int con, coff,
cursoron;
int dispon,
blink;
int vsynctime;
int vadj;
int lp_ff;
int cols[256][2][2];
uint8_t *vram;
} hercules_t;
static video_timings_t timing_hercules = {VIDEO_ISA, 8, 16, 32, 8, 16, 32};

149
src/video/vid_s3.c
View File

@@ -41,6 +41,7 @@
#define ROM_DIAMOND_STEALTH_VRAM "roms/video/s3/Diamond Stealth VRAM BIOS v2.31 U14.BIN"
#define ROM_AMI_86C924 "roms/video/s3/S3924AMI.BIN"
#define ROM_METHEUS_86C928 "roms/video/s3/928.VBI"
#define ROM_SPEA_MERCURY_LITE_PCI "roms/video/s3/SPEAVGA.VBI"
#define ROM_SPEA_MIRAGE_86C801 "roms/video/s3/V7MIRAGE.VBI"
#define ROM_SPEA_MIRAGE_86C805 "roms/video/s3/86c805pspeavlbus.BIN"
#define ROM_MIROCRYSTAL8S_805 "roms/video/s3/S3_805VL_ATT20C491_miroCRYSTAL_8s_ver1.4.BIN"
@@ -104,7 +105,8 @@ enum
S3_PHOENIX_VISION968,
S3_MIROCRYSTAL8S_805,
S3_NUMBER9_9FX_531,
S3_NUMBER9_9FX_771
S3_NUMBER9_9FX_771,
S3_SPEA_MERCURY_LITE_PCI
};
@@ -113,22 +115,24 @@ enum
S3_86C911 = 0x00,
S3_86C924 = 0x02,
S3_86C928 = 0x04,
S3_86C801 = 0x06,
S3_86C805 = 0x07,
S3_VISION964 = 0x08,
S3_VISION968 = 0x10,
S3_VISION864 = 0x18,
S3_VISION868 = 0x20,
S3_TRIO32 = 0x28,
S3_TRIO64 = 0x30,
S3_TRIO64V = 0x38,
S3_TRIO64V2 = 0x40
S3_86C928PCI = 0x06,
S3_86C801 = 0x07,
S3_86C805 = 0x08,
S3_VISION964 = 0x18,
S3_VISION968 = 0x20,
S3_VISION864 = 0x28,
S3_VISION868 = 0x30,
S3_TRIO32 = 0x38,
S3_TRIO64 = 0x40,
S3_TRIO64V = 0x48,
S3_TRIO64V2 = 0x50
};
static video_timings_t timing_s3_86c911 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_86c801 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_86c805 = {VIDEO_BUS, 4, 4, 5, 20, 20, 35};
static video_timings_t timing_s3_86c928pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_stealth64_vlb = {VIDEO_BUS, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_stealth64_pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42};
static video_timings_t timing_s3_vision864_vlb = {VIDEO_BUS, 4, 4, 5, 20, 20, 35};
@@ -563,7 +567,7 @@ static void
s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val)
{
svga_t *svga = &s3->svga;
if (s3->accel.cmd & 0x100) {
switch (s3->accel.cmd & 0x600) {
case 0x000:
@@ -1173,7 +1177,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3);
} else {
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3);
if (s3->chip != S3_86C928PCI)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3);
}
break;
}
@@ -1197,7 +1202,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
}
break;
case 0x200:
/*Windows 95's built-in driver expects this to be loaded regardless of the byte swap bit (0xE2E9) in the 86c928*/
/*Windows 95's built-in driver expects this to be loaded regardless of the byte swap bit (0xE2E9) in the 86c928 ISA/VLB*/
if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) {
if (s3->accel.cmd & 0x1000)
@@ -1205,7 +1210,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
else
s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3);
} else {
if (s3->chip == S3_86C928)
if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI)
s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8));
else {
if (s3->accel.cmd & 0x1000)
@@ -1214,6 +1219,15 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3);
}
}
} else {
if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI)
s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8));
else {
if (s3->accel.cmd & 0x1000)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3);
else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3);
}
}
break;
case 0x400:
@@ -1261,7 +1275,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3);
break;
case 0x200:
/*Windows 95's built-in driver expects the upper 16 bits to be loaded instead of the whole 32-bit one, regardless of the byte swap bit (0xE2EB) in the 86c928*/
/*Windows 95's built-in driver expects the upper 16 bits to be loaded instead of the whole 32-bit one, regardless of the byte swap bit (0xE2EB) in the 86c928 ISA/VLB card*/
if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) {
if (s3->accel.cmd & 0x1000)
@@ -1269,7 +1283,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
else
s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3);
} else {
if (s3->chip == S3_86C928)
if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI)
s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8));
else {
if (s3->accel.cmd & 0x1000)
@@ -1278,6 +1292,15 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3);
}
}
} else {
if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI)
s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8));
else {
if (s3->accel.cmd & 0x1000)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), s3);
else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3);
}
}
break;
case 0x400:
@@ -1360,7 +1383,7 @@ s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val)
if ((addr >= 0x08000) && (addr <= 0x0803f))
s3_pci_write(0, addr & 0xff, val, s3);
}
switch (addr & 0x1fffe) {
case 0x8100: addr = 0x82e8; break; /*ALT_CURXY*/
case 0x8102: addr = 0x86e8; break;
@@ -2405,8 +2428,10 @@ s3_out(uint16_t addr, uint8_t val, void *p)
{
case 0x3c2:
if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_86C928)) {
if (((val >> 2) & 3) != 3)
icd2061_write(svga->clock_gen, (val >> 2) & 3);
if ((s3->card_type != S3_SPEA_MERCURY_P64V) && (s3->card_type != S3_MIROVIDEO40SV_ERGO_968)) {
if (((val >> 2) & 3) != 3)
icd2061_write(svga->clock_gen, (val >> 2) & 3);
}
}
break;
@@ -2472,6 +2497,8 @@ s3_out(uint16_t addr, uint8_t val, void *p)
sc1148x_ramdac_out(addr, rs2, val, svga->ramdac, svga);
} else if (s3->card_type == S3_NUMBER9_9FX_531)
att498_ramdac_out(addr, rs2, val, svga->ramdac, svga);
else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI))
sc1502x_ramdac_out(addr, val, svga->ramdac, svga);
else
sdac_ramdac_out(addr, rs2, val, svga->ramdac, svga);
return;
@@ -2760,6 +2787,8 @@ s3_in(uint16_t addr, void *p)
return sc1148x_ramdac_in(addr, rs2, svga->ramdac, svga);
else if (s3->card_type == S3_NUMBER9_9FX_531)
return att498_ramdac_in(addr, rs2, svga->ramdac, svga);
else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI))
return sc1502x_ramdac_in(addr, svga->ramdac, svga);
else
return sdac_ramdac_in(addr, rs2, svga->ramdac, svga);
break;
@@ -2880,7 +2909,7 @@ static void s3_recalctimings(svga_t *svga)
if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL20SD_864 ||
s3->card_type == S3_MIROCRYSTAL20SV_964 || s3->card_type == S3_SPEA_MIRAGE_86C801 ||
s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_MIROCRYSTAL8S_805 ||
s3->card_type == S3_NUMBER9_9FX_531) {
s3->card_type == S3_NUMBER9_9FX_531 || s3->card_type == S3_SPEA_MERCURY_LITE_PCI) {
if (!(svga->crtc[0x5e] & 0x04))
svga->vblankstart = svga->dispend;
if (svga->bpp != 32) {
@@ -3006,7 +3035,8 @@ static void s3_recalctimings(svga_t *svga)
svga->hdisp = s3->width;
}
if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805)
if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 ||
s3->card_type == S3_SPEA_MERCURY_LITE_PCI)
svga->hdisp = s3->width;
break;
case 16:
@@ -3034,7 +3064,8 @@ static void s3_recalctimings(svga_t *svga)
svga->hdisp = s3->width;
}
if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805)
if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 ||
s3->card_type == S3_SPEA_MERCURY_LITE_PCI)
svga->hdisp = s3->width;
break;
case 24:
@@ -3044,6 +3075,15 @@ static void s3_recalctimings(svga_t *svga)
svga->hdisp /= 3;
else
svga->hdisp = (svga->hdisp * 2) / 3;
if (s3->card_type == S3_SPEA_MERCURY_LITE_PCI) {
if (s3->width == 2048)
switch (svga->dispend) {
case 480:
svga->hdisp = 640;
break;
}
}
} else {
if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 ||
s3->card_type == S3_SPEA_MERCURY_P64V)
@@ -3085,7 +3125,7 @@ static void s3_recalctimings(svga_t *svga)
s3->width = 800;
svga->hdisp = 800;
break;
}
}
}
}
}
@@ -3292,6 +3332,7 @@ s3_updatemapping(s3_t *s3)
case S3_TRIO64V:
case S3_TRIO64V2:
case S3_86C928:
case S3_86C928PCI:
s3->linear_size = 0x400000;
break;
default:
@@ -3842,8 +3883,9 @@ s3_accel_in(uint16_t port, void *p)
s3_accel_start(16, 1, s3->accel.pix_trans[0], 0, s3);
else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
} else
} else {
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
}
break;
}
}
@@ -5235,7 +5277,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
/*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled.
When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on
the NOP command)*/
switch (cmd)
{
case 0: /*NOP (Short Stroke Vectors)*/
@@ -6129,8 +6170,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
frgd_mix = (s3->accel.frgd_mix >> 5) & 3;
bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3;
while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2))
{
int y = s3->accel.poly_cy;
@@ -6278,7 +6317,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
ROPMIX
if (s3->accel.cmd & 0x10) {
if (s3->accel.cmd & 0x10) {
WRITE(s3->accel.dest + s3->accel.dx, out);
}
}
@@ -6615,6 +6654,7 @@ static void s3_reset(void *priv)
break;
case S3_METHEUS_86C928:
case S3_SPEA_MERCURY_LITE_PCI:
svga->crtc[0x5a] = 0x0a;
break;
@@ -6763,6 +6803,11 @@ static void *s3_init(const device_t *info)
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801);
break;
case S3_SPEA_MERCURY_LITE_PCI:
bios_fn = ROM_SPEA_MERCURY_LITE_PCI;
chip = S3_86C928PCI;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c928pci);
break;
case S3_MIROCRYSTAL20SD_864:
bios_fn = ROM_MIROCRYSTAL20SD_864_VLB;
chip = S3_VISION864;
@@ -7159,7 +7204,20 @@ static void *s3_init(const device_t *info)
svga->ramdac = device_add(&bt485_ramdac_device);
svga->clock_gen = device_add(&icd2061_device);
svga->getclock = icd2061_getclock;
break;
break;
case S3_SPEA_MERCURY_LITE_PCI:
svga->decode_mask = (4 << 20) - 1;
stepping = 0xb0; /*86C928PCI*/
s3->id = stepping;
s3->id_ext = stepping;
s3->id_ext_pci = stepping;
s3->packed_mmio = 0;
svga->crtc[0x5a] = 0x0a;
svga->ramdac = device_add(&sc1502x_ramdac_device);
svga->clock_gen = device_add(&av9194_device);
svga->getclock = av9194_getclock;
break;
case S3_PARADISE_BAHAMAS64:
case S3_PHOENIX_VISION864:
@@ -7219,13 +7277,15 @@ static void *s3_init(const device_t *info)
}
if (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968 ||
info->local == S3_NUMBER9_9FX_771)
info->local == S3_NUMBER9_9FX_771) {
svga->ramdac = device_add(&ibm_rgb528_ramdac_device);
else
svga->clock_gen = device_add(&icd2061_device);
svga->getclock = icd2061_getclock;
} else {
svga->ramdac = device_add(&tvp3026_ramdac_device);
svga->clock_gen = device_add(&icd2061_device);
svga->getclock = icd2061_getclock;
svga->clock_gen = svga->ramdac;
svga->getclock = tvp3026_getclock;
}
break;
case S3_NUMBER9_9FX_531:
@@ -7380,6 +7440,11 @@ static int s3_metheus_86c928_available(void)
return rom_present(ROM_METHEUS_86C928);
}
static int s3_spea_mercury_lite_pci_available(void)
{
return rom_present(ROM_SPEA_MERCURY_LITE_PCI);
}
static int s3_bahamas64_available(void)
{
return rom_present(ROM_PARADISE_BAHAMAS64);
@@ -7796,6 +7861,20 @@ const device_t s3_metheus_86c928_vlb_device =
s3_standard_config
};
const device_t s3_spea_mercury_lite_86c928_pci_device =
{
"S3 86c928 PCI (SPEA Mercury Lite)",
DEVICE_PCI,
S3_SPEA_MERCURY_LITE_PCI,
s3_init,
s3_close,
s3_reset,
{ s3_spea_mercury_lite_pci_available },
s3_speed_changed,
s3_force_redraw,
s3_standard_config
};
const device_t s3_mirocrystal_20sd_864_vlb_device =
{
"S3 Vision864 VLB (MiroCRYSTAL 20SD)",

218
src/video/vid_s3_virge.c
View File

@@ -61,7 +61,7 @@ static int dither[4][4] =
#define FIFO_ENTRY_SIZE (1 << 31)
#define FIFO_ENTRIES (virge->fifo_write_idx - virge->fifo_read_idx)
#define FIFO_FULL ((virge->fifo_write_idx - virge->fifo_read_idx) >= FIFO_SIZE)
#define FIFO_FULL ((virge->fifo_write_idx - virge->fifo_read_idx) >= (FIFO_SIZE - 4))
#define FIFO_EMPTY (virge->fifo_read_idx == virge->fifo_write_idx)
#define FIFO_TYPE 0xff000000
@@ -70,6 +70,7 @@ static int dither[4][4] =
#define ROM_VIRGE_325 "roms/video/s3virge/86c325.bin"
#define ROM_DIAMOND_STEALTH3D_2000 "roms/video/s3virge/s3virge.bin"
#define ROM_DIAMOND_STEALTH3D_3000 "roms/video/s3virge/diamondstealth3000.vbi"
#define ROM_STB_VELOCITY_3D "roms/video/s3virge/stb_velocity3d_110.BIN"
#define ROM_VIRGE_DX "roms/video/s3virge/86c375_1.bin"
#define ROM_DIAMOND_STEALTH3D_2000PRO "roms/video/s3virge/virgedxdiamond.vbi"
#define ROM_VIRGE_GX "roms/video/s3virge/86c375_4.bin"
@@ -82,6 +83,7 @@ enum
S3_VIRGE_325,
S3_DIAMOND_STEALTH3D_2000,
S3_DIAMOND_STEALTH3D_3000,
S3_STB_VELOCITY_3D,
S3_VIRGE_DX,
S3_DIAMOND_STEALTH3D_2000PRO,
S3_VIRGE_GX,
@@ -288,7 +290,6 @@ typedef struct virge_t
int sec_x, sec_y, sec_w, sec_h;
} streams;
int fifo_slot;
uint8_t cmd_dma;
uint8_t dma_bs;
uint32_t cmd_dma_base;
@@ -302,6 +303,10 @@ typedef struct virge_t
fifo_entry_t fifo[FIFO_SIZE];
volatile int fifo_read_idx, fifo_write_idx;
thread_t *fifo_thread;
event_t *wake_fifo_thread;
event_t *fifo_not_full_event;
int virge_busy, local;
uint8_t subsys_stat, subsys_cntl, advfunc_cntl;
@@ -417,6 +422,11 @@ s3_virge_tri_timer(void *p)
thread_set_event(virge->wake_render_thread); /*Wake up FIFO thread if moving from idle*/
}
static __inline void
wake_fifo_thread(virge_t *virge)
{
thread_set_event(virge->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/
}
static void
queue_triangle(virge_t *virge)
@@ -970,7 +980,8 @@ static void s3_virge_updatemapping(virge_t *virge)
mem_mapping_disable(&virge->new_mmio_mapping);
}
static void s3_virge_vblank_start(svga_t *svga)
static void
s3_virge_vblank_start(svga_t *svga)
{
virge_t *virge = (virge_t *)svga->p;
@@ -978,6 +989,16 @@ static void s3_virge_vblank_start(svga_t *svga)
s3_virge_update_irqs(virge);
}
static void
s3_virge_wait_fifo_idle(virge_t *virge)
{
while (!FIFO_EMPTY)
{
wake_fifo_thread(virge);
thread_wait_event(virge->fifo_not_full_event, 1);
}
}
static uint8_t
s3_virge_mmio_read(uint32_t addr, void *p)
{
@@ -989,14 +1010,12 @@ s3_virge_mmio_read(uint32_t addr, void *p)
switch (addr & 0xffff)
{
case 0x8505:
ret = 0;
if (virge->s3d_busy || virge->fifo_slot) {
ret = 0x10;
} else {
ret = 0x30;
}
if (virge->fifo_slot)
virge->fifo_slot--;
if (virge->s3d_busy || virge->virge_busy || !FIFO_EMPTY)
ret = 0x10;
else
ret = 0x10 | (1 << 5);
if (!virge->virge_busy)
wake_fifo_thread(virge);
return ret;
case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3:
@@ -1014,6 +1033,7 @@ s3_virge_mmio_read(uint32_t addr, void *p)
return s3_virge_in(addr & 0x3ff, virge);
case 0x859c:
s3_virge_wait_fifo_idle(virge);
return virge->cmd_dma;
case 0xff20: case 0xff21:
@@ -1030,22 +1050,21 @@ static uint16_t
s3_virge_mmio_read_w(uint32_t addr, void *p)
{
virge_t *virge = (virge_t *)p;
uint32_t ret = 0xffff;
uint16_t ret = 0xffff;
s3_virge_log("[%04X:%08X]: MMIO ReadW addr = %04x\n", CS, cpu_state.pc, addr & 0xfffe);
switch (addr & 0xfffe) {
case 0x8504:
if (!virge->fifo_slot)
if (FIFO_EMPTY)
virge->subsys_stat |= INT_FIFO_EMP;
ret |= virge->subsys_stat;
if (virge->fifo_slot)
virge->fifo_slot--;
ret |= 0x30; /*A bit of a workaround at the moment.*/
s3_virge_update_irqs(virge);
return ret;
return ret;
case 0x859c:
s3_virge_wait_fifo_idle(virge);
return virge->cmd_dma;
default:
@@ -1134,78 +1153,91 @@ s3_virge_mmio_read_l(uint32_t addr, void *p)
break;
case 0x8504:
if (virge->s3d_busy || virge->fifo_slot) {
if (virge->s3d_busy || virge->virge_busy || !FIFO_EMPTY)
ret = (0x10 << 8);
} else {
else
ret = (0x10 << 8) | (1 << 13);
if (!virge->s3d_busy)
virge->subsys_stat |= INT_3DF_EMP;
if (!virge->fifo_slot)
virge->subsys_stat |= INT_FIFO_EMP;
}
ret |= virge->subsys_stat;
if (virge->fifo_slot)
virge->fifo_slot--;
s3_virge_update_irqs(virge);
if (!virge->virge_busy)
wake_fifo_thread(virge);
dmahdr->dblword_read = 0;
dmahdr->dblword_write = 0;
break;
case 0x8590:
s3_virge_wait_fifo_idle(virge);
ret = virge->cmd_dma_base;
break;
case 0x8594:
s3_virge_wait_fifo_idle(virge);
break;
case 0x8598:
s3_virge_wait_fifo_idle(virge);
ret = virge->dma_ptr;
break;
case 0x859c:
s3_virge_wait_fifo_idle(virge);
ret = virge->cmd_dma;
break;
case 0xa4d4:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.src_base;
break;
case 0xa4d8:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.dest_base;
break;
case 0xa4dc:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.clip_l << 16) | virge->s3d.clip_r;
break;
case 0xa4e0:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.clip_t << 16) | virge->s3d.clip_b;
break;
case 0xa4e4:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.dest_str << 16) | virge->s3d.src_str;
break;
case 0xa4e8: case 0xace8:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.mono_pat_0;
break;
case 0xa4ec: case 0xacec:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.mono_pat_1;
break;
case 0xa4f0:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.pat_bg_clr;
break;
case 0xa4f4:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.pat_fg_clr;
break;
case 0xa4f8:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.src_bg_clr;
break;
case 0xa4fc:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.src_fg_clr;
break;
case 0xa500:
s3_virge_wait_fifo_idle(virge);
ret = virge->s3d.cmd_set;
break;
case 0xa504:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.r_width << 16) | virge->s3d.r_height;
break;
case 0xa508:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.rsrc_x << 16) | virge->s3d.rsrc_y;
break;
case 0xa50c:
s3_virge_wait_fifo_idle(virge);
ret = (virge->s3d.rdest_x << 16) | virge->s3d.rdest_y;
break;
@@ -1242,14 +1274,96 @@ s3_virge_mmio_read_l(uint32_t addr, void *p)
return ret;
}
static void
fifo_thread(void *param)
{
virge_t *virge = (virge_t *)param;
static void s3_virge_mmio_write(uint32_t addr, uint8_t val, void *p)
while (virge->fifo_thread_run)
{
thread_set_event(virge->fifo_not_full_event);
thread_wait_event(virge->wake_fifo_thread, -1);
thread_reset_event(virge->wake_fifo_thread);
virge->virge_busy = 1;
while (!FIFO_EMPTY)
{
uint64_t start_time = plat_timer_read();
uint64_t end_time;
uint32_t addr, val;
fifo_entry_t *fifo = &virge->fifo[virge->fifo_read_idx & FIFO_MASK];
addr = fifo->addr_type & FIFO_ADDR;
val = fifo->val;
switch (fifo->addr_type & FIFO_TYPE)
{
case FIFO_WRITE_BYTE:
if ((addr & 0xfffc) < 0x8000)
s3_virge_bitblt(virge, 8, val);
break;
case FIFO_WRITE_WORD:
if ((addr & 0xfffc) < 0x8000)
{
if (virge->s3d.cmd_set & CMD_SET_MS)
s3_virge_bitblt(virge, 16, ((val >> 8) | (val << 8)) << 16);
else
s3_virge_bitblt(virge, 16, val);
}
break;
case FIFO_WRITE_DWORD:
if ((addr & 0xfffc) < 0x8000)
{
if (virge->s3d.cmd_set & CMD_SET_MS)
s3_virge_bitblt(virge, 32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24));
else
s3_virge_bitblt(virge, 32, val);
}
break;
}
virge->fifo_read_idx++;
fifo->addr_type = FIFO_INVALID;
if (FIFO_ENTRIES > 0xe000)
thread_set_event(virge->fifo_not_full_event);
end_time = plat_timer_read();
virge_time += end_time - start_time;
}
virge->virge_busy = 0;
virge->subsys_stat |= INT_FIFO_EMP | INT_3DF_EMP;
s3_virge_update_irqs(virge);
}
}
static void
s3_virge_queue(virge_t *virge, uint32_t addr, uint32_t val, uint32_t type)
{
fifo_entry_t *fifo = &virge->fifo[virge->fifo_write_idx & FIFO_MASK];
if (FIFO_FULL)
{
thread_reset_event(virge->fifo_not_full_event);
if (FIFO_FULL)
thread_wait_event(virge->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/
}
fifo->val = val;
fifo->addr_type = (addr & FIFO_ADDR) | type;
virge->fifo_write_idx++;
if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8)
wake_fifo_thread(virge);
}
static void
s3_virge_mmio_write(uint32_t addr, uint8_t val, void *p)
{
virge_t *virge = (virge_t *)p;
s3_virge_log("MMIO WriteB addr = %04x, val = %02x\n", addr & 0xffff, val);
if ((addr & 0xffff) < 0x8000) {
s3_virge_bitblt(virge, 8, val);
s3_virge_queue(virge, addr, val, FIFO_WRITE_BYTE);
} else {
switch (addr & 0xffff) {
case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3:
@@ -1286,10 +1400,7 @@ s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *p)
s3_virge_log("[%04X:%08X]: MMIO WriteW addr = %04x, val = %04x\n", CS, cpu_state.pc, addr & 0xfffe, val);
if ((addr & 0xfffe) < 0x8000) {
if (virge->s3d.cmd_set & CMD_SET_MS)
s3_virge_bitblt(virge, 16, ((val >> 8) | (val << 8)) << 16);
else
s3_virge_bitblt(virge, 16, val);
s3_virge_queue(virge, addr, val, FIFO_WRITE_WORD);
} else {
if ((addr & 0xfffe) == 0x83d4) {
s3_virge_mmio_write(addr, val, virge);
@@ -1310,17 +1421,19 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *p)
s3_virge_log("MMIO WriteL addr = %04x, val = %08x\n", addr & 0xfffc, val);
if ((addr & 0xfffc) < 0x8000) {
if ((addr & 0xe000) == 0) {
if (virge->s3d.cmd_set & CMD_SET_MS)
s3_virge_bitblt(virge, 32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24));
else
s3_virge_bitblt(virge, 32, val);
s3_virge_bitblt(virge, 32, val);
} else {
s3_virge_queue(virge, addr, val, FIFO_WRITE_DWORD);
}
if (virge->cmd_dma) {
dmahdr->datatype = 1;
}
} else {
if ((addr & 0xfffc) >= 0xa000)
virge->fifo_slot++;
if (virge->cmd_dma) {
dmahdr->datatype = 0;
}
@@ -3875,6 +3988,7 @@ static void s3_virge_reset(void *priv)
virge->svga.crtc[0x59] = 0x70;
break;
case S3_DIAMOND_STEALTH3D_3000:
case S3_STB_VELOCITY_3D:
virge->svga.crtc[0x59] = 0x70;
break;
case S3_VIRGE_GX2:
@@ -3950,6 +4064,9 @@ static void *s3_virge_init(const device_t *info)
case S3_DIAMOND_STEALTH3D_3000:
bios_fn = ROM_DIAMOND_STEALTH3D_3000;
break;
case S3_STB_VELOCITY_3D:
bios_fn = ROM_STB_VELOCITY_3D;
break;
case S3_VIRGE_DX:
bios_fn = ROM_VIRGE_DX;
break;
@@ -4041,6 +4158,7 @@ static void *s3_virge_init(const device_t *info)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000_pci);
break;
case S3_DIAMOND_STEALTH3D_3000:
case S3_STB_VELOCITY_3D:
virge->svga.decode_mask = (8 << 20) - 1;
virge->virge_id_high = 0x88;
virge->virge_id_low = 0x3d;
@@ -4135,6 +4253,11 @@ static void *s3_virge_init(const device_t *info)
virge->render_thread_run = 1;
virge->render_thread = thread_create(render_thread, virge);
virge->wake_fifo_thread = thread_create_event();
virge->fifo_not_full_event = thread_create_event();
virge->fifo_thread_run = 1;
virge->fifo_thread = thread_create(fifo_thread, virge);
timer_add(&virge->tri_timer, s3_virge_tri_timer, virge, 0);
virge->local = info->local;
@@ -4153,6 +4276,12 @@ static void s3_virge_close(void *p)
thread_destroy_event(virge->wake_main_thread);
thread_destroy_event(virge->wake_render_thread);
virge->fifo_thread_run = 0;
thread_set_event(virge->wake_fifo_thread);
thread_wait(virge->fifo_thread);
thread_destroy_event(virge->wake_fifo_thread);
thread_destroy_event(virge->fifo_not_full_event);
svga_close(&virge->svga);
ddc_close(virge->ddc);
@@ -4176,6 +4305,11 @@ static int s3_virge_988_diamond_available(void)
return rom_present(ROM_DIAMOND_STEALTH3D_3000);
}
static int s3_virge_988_stb_available(void)
{
return rom_present(ROM_STB_VELOCITY_3D);
}
static int s3_virge_375_available(void)
{
return rom_present(ROM_VIRGE_DX);
@@ -4302,6 +4436,20 @@ const device_t s3_diamond_stealth_3000_pci_device =
s3_virge_config
};
const device_t s3_stb_velocity_3d_pci_device =
{
"S3 ViRGE/VX (STB Velocity 3D) PCI",
DEVICE_PCI,
S3_STB_VELOCITY_3D,
s3_virge_init,
s3_virge_close,
s3_virge_reset,
{ s3_virge_988_stb_available },
s3_virge_speed_changed,
s3_virge_force_redraw,
s3_virge_config
};
const device_t s3_virge_375_pci_device =
{
"S3 ViRGE/DX (375) PCI",

2
src/video/vid_table.c
View File

@@ -138,6 +138,7 @@ video_cards[] = {
{ "cl_gd5480_pci", &gd5480_pci_device },
{ "ctl3d_banshee_pci", &creative_voodoo_banshee_device },
{ "stealth32_pci", &et4000w32p_pci_device },
{ "spea_mercurylite_pci", &s3_spea_mercury_lite_86c928_pci_device },
{ "stealth64v_pci", &s3_diamond_stealth64_964_pci_device },
{ "elsawin2kprox_964_pci", &s3_elsa_winner2000_pro_x_964_pci_device },
{ "mirocrystal20sv_pci", &s3_mirocrystal_20sv_964_pci_device },
@@ -160,6 +161,7 @@ video_cards[] = {
{ "virge325_pci", &s3_virge_325_pci_device },
{ "stealth3d_2000_pci", &s3_diamond_stealth_2000_pci_device },
{ "stealth3d_3000_pci", &s3_diamond_stealth_3000_pci_device },
{ "stb_velocity3d_pci", &s3_stb_velocity_3d_pci_device },
{ "virge375_pci", &s3_virge_375_pci_device },
{ "stealth3d_2000pro_pci", &s3_diamond_stealth_2000pro_pci_device },
{ "virge385_pci", &s3_virge_385_pci_device },

125
src/video/vid_tgui9440.c
View File

@@ -1249,7 +1249,8 @@ enum
TGUI_BITBLT = 1,
TGUI_SCANLINE = 3,
TGUI_BRESENHAMLINE = 4,
TGUI_SHORTVECTOR = 5
TGUI_SHORTVECTOR = 5,
TGUI_FASTLINE = 6
};
enum
@@ -1480,7 +1481,7 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
tgui->accel.right >>= 2;
}
}
switch (tgui->accel.flags & (TGUI_SRCMONO|TGUI_SRCDISP))
{
case TGUI_SRCCPU:
@@ -1572,31 +1573,36 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
while (count--) {
src_dat = ((cpu_dat >> 31) ? tgui->accel.fg_col : tgui->accel.bg_col);
if (tgui->accel.bpp == 0)
src_dat &= 0xff;
else if (tgui->accel.bpp == 1)
src_dat &= 0xffff;
if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right &&
tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) {
src_dat = ((cpu_dat >> 31) ? tgui->accel.fg_col : tgui->accel.bg_col);
if (tgui->accel.bpp == 0)
src_dat &= 0xff;
else if (tgui->accel.bpp == 1)
src_dat &= 0xffff;
READ(tgui->accel.dst, dst_dat);
READ(tgui->accel.dst, dst_dat);
pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)];
pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)];
if (tgui->accel.bpp == 0)
pat_dat &= 0xff;
else if (tgui->accel.bpp == 1)
pat_dat &= 0xffff;
if (tgui->accel.bpp == 0)
pat_dat &= 0xff;
else if (tgui->accel.bpp == 1)
pat_dat &= 0xffff;
if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) {
MIX();
if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) {
MIX();
WRITE(tgui->accel.dst, out);
WRITE(tgui->accel.dst, out);
}
}
cpu_dat <<= 1;
tgui->accel.src += xdir;
tgui->accel.dst += xdir;
tgui->accel.pat_x += xdir;
if (tgui->type >= TGUI_9660)
tgui->accel.dx += xdir;
tgui->accel.x++;
if (tgui->accel.x > tgui->accel.size_x) {
@@ -1605,6 +1611,11 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
tgui->accel.pat_x = tgui->accel.dst_x;
tgui->accel.pat_y += ydir;
if (tgui->type >= TGUI_9660) {
tgui->accel.dx = tgui->accel.dst_x & 0xfff;
tgui->accel.dy += ydir;
}
tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch);
tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch);
@@ -1891,6 +1902,88 @@ tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui)
}
}
break;
case TGUI_FASTLINE:
{
if (tgui->type < TGUI_9660)
break;
int16_t dx, dy;
dx = tgui->accel.dst_x & 0xfff;
dy = tgui->accel.dst_y & 0xfff;
tgui->accel.left = tgui->accel.src_x_clip & 0xfff;
tgui->accel.right = tgui->accel.dst_x_clip & 0xfff;
tgui->accel.top = tgui->accel.src_y_clip & 0xfff;
tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff;
if (tgui->accel.bpp == 1) {
tgui->accel.left >>= 1;
tgui->accel.right >>= 1;
} else if (tgui->accel.bpp == 3) {
tgui->accel.left >>= 2;
tgui->accel.right >>= 2;
}
while (count--) {
READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat);
/*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/
if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right &&
dy >= tgui->accel.top && dy <= tgui->accel.bottom)) {
READ(dx + (dy * tgui->accel.pitch), dst_dat);
pat_dat = tgui->accel.fg_col;
if (tgui->accel.bpp == 0)
pat_dat &= 0xff;
else if (tgui->accel.bpp == 1)
pat_dat &= 0xffff;
MIX();
WRITE(dx + (dy * tgui->accel.pitch), out);
}
if (tgui->accel.y == (tgui->accel.size_y & 0xfff))
break;
switch ((tgui->accel.size_y >> 8) & 0xe0) {
case 0x00:
dx++;
break;
case 0x20:
dx++;
dy--;
break;
case 0x40:
dy--;
break;
case 0x60:
dx--;
dy--;
break;
case 0x80:
dx--;
break;
case 0xa0:
dx--;
dy++;
break;
case 0xc0:
dy++;
break;
case 0xe0:
dx++;
dy++;
break;
}
tgui->accel.y++;
}
}
break;
}
}

134
src/video/vid_tvp3026_ramdac.c
View File

@@ -47,6 +47,12 @@ typedef struct
uint8_t misc;
uint8_t type;
uint8_t mode;
uint8_t pll_addr;
uint8_t clock_sel;
struct
{
uint8_t m, n, p;
} pix, mem, loop;
} tvp3026_ramdac_t;
static void
@@ -96,7 +102,6 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
rs |= (!!rs2 << 2);
rs |= (!!rs3 << 3);
switch (rs) {
case 0x00: /* Palette Write Index Register (RS value = 0000) */
ramdac->ind_idx = val;
@@ -152,7 +157,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
svga->dac_hwcursor.xsize = svga->dac_hwcursor.ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.xsize;
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.ysize;
svga->dac_hwcursor.ena = ((val & 0x03) != 0);
svga->dac_hwcursor.ena = !!(val & 0x03);
ramdac->mode = val & 0x03;
}
break;
@@ -163,7 +168,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
svga->dac_hwcursor.xsize = svga->dac_hwcursor.ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.xsize;
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.ysize;
svga->dac_hwcursor.ena = ((val & 0x03) != 0);
svga->dac_hwcursor.ena = !!(val & 0x03);
ramdac->mode = val & 0x03;
break;
case 0x0f: /* Latch Control */
@@ -177,6 +182,9 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
ramdac->mcr = val;
tvp3026_set_bpp(ramdac, svga);
break;
case 0x1a: /* Clock Selection */
ramdac->clock_sel = val;
break;
case 0x1c: /* Palette-Page Register */
ramdac->ppr = val;
break;
@@ -187,6 +195,51 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
ramdac->misc = val;
svga->ramdac_type = (val & 0x08) ? RAMDAC_8BIT : RAMDAC_6BIT;
break;
case 0x2c: /* PLL Address */
ramdac->pll_addr = val;
break;
case 0x2d: /* Pixel clock PLL data */
switch (ramdac->pll_addr & 3) {
case 0:
ramdac->pix.n = val;
break;
case 1:
ramdac->pix.m = val;
break;
case 2:
ramdac->pix.p = val;
break;
}
ramdac->pll_addr = ((ramdac->pll_addr + 1) & 3) | (ramdac->pll_addr & 0xfc);
break;
case 0x2e: /* Memory Clock PLL Data */
switch ((ramdac->pll_addr >> 2) & 3) {
case 0:
ramdac->mem.n = val;
break;
case 1:
ramdac->mem.m = val;
break;
case 2:
ramdac->mem.p = val;
break;
}
ramdac->pll_addr = ((ramdac->pll_addr + 4) & 0x0c) | (ramdac->pll_addr & 0xf3);
break;
case 0x2f: /* Loop Clock PLL Data */
switch ((ramdac->pll_addr >> 4) & 3) {
case 0:
ramdac->loop.n = val;
break;
case 1:
ramdac->loop.m = val;
break;
case 2:
ramdac->loop.p = val;
break;
}
ramdac->pll_addr = ((ramdac->pll_addr + 0x10) & 0x30) | (ramdac->pll_addr & 0xcf);
break;
case 0x39: /* MCLK/Loop Clock Control */
ramdac->mclk = val;
break;
@@ -292,6 +345,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 0x19: /* Multiplex Control */
temp = ramdac->mcr;
break;
case 0x1a: /* Clock Selection */
temp = ramdac->clock_sel;
break;
case 0x1c: /* Palette-Page Register */
temp = ramdac->ppr;
break;
@@ -301,6 +357,54 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 0x1e: /* Miscellaneous Control */
temp = ramdac->misc;
break;
case 0x2c: /* PLL Address */
temp = ramdac->pll_addr;
break;
case 0x2d: /* Pixel clock PLL data */
switch (ramdac->pll_addr & 3) {
case 0:
temp = ramdac->pix.n;
break;
case 1:
temp = ramdac->pix.m;
break;
case 2:
temp = ramdac->pix.p;
break;
case 3:
temp = 0x40; /*PLL locked to frequency*/
break;
}
break;
case 0x2e: /* Memory Clock PLL Data */
switch ((ramdac->pll_addr >> 2) & 3) {
case 0:
temp = ramdac->mem.n;
break;
case 1:
temp = ramdac->mem.m;
break;
case 2:
temp = ramdac->mem.p;
break;
case 3:
temp = 0x40; /*PLL locked to frequency*/
break;
}
break;
case 0x2f: /* Loop Clock PLL Data */
switch ((ramdac->pll_addr >> 4) & 3) {
case 0:
temp = ramdac->loop.n;
break;
case 1:
temp = ramdac->loop.m;
break;
case 2:
temp = ramdac->loop.p;
break;
}
break;
case 0x39: /* MCLK/Loop Clock Control */
temp = ramdac->mclk;
break;
@@ -436,6 +540,29 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
}
float
tvp3026_getclock(int clock, void *p)
{
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p;
int n, m, pl;
float f_vco, f_pll;
if (clock == 0)
return 25175000.0;
if (clock == 1)
return 28322000.0;
/*Fvco = 8 x Fref x (65 - M) / (65 - N)*/
/*Fpll = Fvco / 2^P*/
n = ramdac->pix.n & 0x3f;
m = ramdac->pix.m & 0x3f;
pl = ramdac->pix.p & 0x03;
f_vco = 8.0 * 14318184 * (float)(65 - m) / (float)(65 - n);
f_pll = f_vco / (float)(1 << pl);
return f_pll;
}
void *
tvp3026_ramdac_init(const device_t *info)
{
@@ -447,6 +574,7 @@ tvp3026_ramdac_init(const device_t *info)
ramdac->latch_cntl = 0x06;
ramdac->true_color = 0x80;
ramdac->mcr = 0x98;
ramdac->clock_sel = 0x07;
ramdac->mclk = 0x18;
return ramdac;

9
src/video/vid_vga.c
View File

@@ -29,16 +29,9 @@
#include <86box/timer.h>
#include <86box/video.h>
#include <86box/vid_svga.h>
#include <86box/vid_vga.h>
typedef struct vga_t
{
svga_t svga;
rom_t bios_rom;
} vga_t;
static video_timings_t timing_vga = {VIDEO_ISA, 8, 16, 32, 8, 16, 32};
static video_timings_t timing_ps1_svga_isa = {VIDEO_ISA, 6, 8, 16, 6, 8, 16};
static video_timings_t timing_ps1_svga_mca = {VIDEO_MCA, 6, 8, 16, 6, 8, 16};

31
src/win/Makefile.mingw
View File

@@ -69,6 +69,15 @@ ifeq ($(DEV_BUILD), y)
ifndef XL24
XL24 := y
endif
ifndef ISAMEM_RAMPAGE
ISAMEM_RAMPAGE := y
endif
ifndef ISAMEM_IAB
ISAMEM_IAB := y
endif
ifndef ISAMEM_BRAT
ISAMEM_BRAT := y
endif
ifndef OLIVETTI
OLIVETTI := y
endif
@@ -118,6 +127,15 @@ else
ifndef XL24
XL24 := n
endif
ifndef ISAMEM_RAMPAGE
ISAMEM_RAMPAGE := n
endif
ifndef ISAMEM_IAB
ISAMEM_IAB := n
endif
ifndef ISAMEM_BRAT
ISAMEM_BRAT := n
endif
ifndef OLIVETTI
OLIVETTI := n
endif
@@ -450,6 +468,18 @@ ifeq ($(XL24), y)
OPTS += -DUSE_XL24
endif
ifeq ($(ISAMEM_RAMPAGE), y)
OPTS += -DUSE_ISAMEM_RAMPAGE
endif
ifeq ($(ISAMEM_IAB), y)
OPTS += -DUSE_ISAMEM_IAB
endif
ifeq ($(ISAMEM_BRAT), y)
OPTS += -DUSE_ISAMEM_BRAT
endif
ifeq ($(OLIVETTI), y)
OPTS += -DUSE_OLIVETTI
DEVBROBJ += olivetti_eva.o
@@ -620,6 +650,7 @@ SNDOBJ := sound.o \
midi.o midi_rtmidi.o \
snd_speaker.o \
snd_pssj.o \
snd_ps1.o \
snd_lpt_dac.o snd_lpt_dss.o \
snd_adlib.o snd_adlibgold.o snd_ad1848.o snd_audiopci.o \
snd_ac97_codec.o snd_ac97_via.o \

17
src/win/languages/cs-CZ.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Počítač:"
#define STR_CONFIGURE "Nastavit"
#define STR_CPU_TYPE "Procesor:"
#define STR_SPEED "Rychlost:"
#define STR_CPU_SPEED "Rychlost:"
#define STR_FPU "Koprocesor:"
#define STR_WAIT_STATES "Čekací stavy:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Zvuková karta:"
#define STR_MIDI "MIDI výstup:"
#define STR_MIDI_OUT "MIDI výstup:"
#define STR_MIDI_IN "MIDI vstup:"
#define STR_MPU401 "Samostatný MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap zařízení:"
#define STR_NET "Síťový adaptér:"
#define STR_LPT1 "Zařízení na LPT1"
#define STR_LPT2 "Zařízení na LPT2"
#define STR_LPT3 "Zařízení na LPT3"
#define STR_COM1 "Zařízení na COM1:"
#define STR_COM2 "Zařízení na COM2:"
#define STR_COM3 "Zařízení na COM3:"
#define STR_COM4 "Zařízení na COM4:"
#define STR_LPT1 "Zařízení na LPT1:"
#define STR_LPT2 "Zařízení na LPT2:"
#define STR_LPT3 "Zařízení na LPT3:"
#define STR_LPT4 "Zařízení na LPT4:"
#define STR_SERIAL1 "Povolit port COM1"
#define STR_SERIAL2 "Povolit port COM2"
#define STR_SERIAL3 "Povolit port COM3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Povolit port LPT1"
#define STR_PARALLEL2 "Povolit port LPT2"
#define STR_PARALLEL3 "Povolit port LPT3"
#define STR_PARALLEL4 "Povolit port LPT4"
#define STR_HDC "Řadič disku:"
#define STR_FDC "Disketový řadič:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo časování"
#define STR_CHECKBPB "Kontrola BPB"
#define STR_CDROM_DRIVES "Mechaniky CD-ROM:"
#define STR_CD_SPEED "Rychlost:"
#define STR_MO_DRIVES "Magnetooptické mechaniky:"
#define STR_ZIP_DRIVES "Mechaniky ZIP:"

17
src/win/languages/de-DE.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Maschine:"
#define STR_CONFIGURE "Einstellen"
#define STR_CPU_TYPE "CPU-Typ:"
#define STR_SPEED "Geschwindigkeit:"
#define STR_CPU_SPEED "Geschwindigkeit:"
#define STR_FPU "FPU-Einheit:"
#define STR_WAIT_STATES "Wartezustände:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Soundkarte:"
#define STR_MIDI "MIDI Out-Gerät:"
#define STR_MIDI_OUT "MIDI Out-Gerät:"
#define STR_MIDI_IN "MIDI In-Gerät:"
#define STR_MPU401 "Standalone-MPU-401-Gerät"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap-Gerät:"
#define STR_NET "Netzwerkadapter:"
#define STR_LPT1 "LPT1-Gerät"
#define STR_LPT2 "LPT2-Gerät"
#define STR_LPT3 "LPT3-Gerät"
#define STR_COM1 "COM1-Gerät:"
#define STR_COM2 "COM2-Gerät:"
#define STR_COM3 "COM3-Gerät:"
#define STR_COM4 "COM4-Gerät:"
#define STR_LPT1 "LPT1-Gerät:"
#define STR_LPT2 "LPT2-Gerät:"
#define STR_LPT3 "LPT3-Gerät:"
#define STR_LPT4 "LPT4-Gerät:"
#define STR_SERIAL1 "Serielle Schnittstelle 1"
#define STR_SERIAL2 "Serielle Schnittstelle 2"
#define STR_SERIAL3 "Serielle Schnittstelle 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Parallelport 1"
#define STR_PARALLEL2 "Parallelport 2"
#define STR_PARALLEL3 "Parallelport 3"
#define STR_PARALLEL4 "Parallelport 4"
#define STR_HDC "HDD-Controller:"
#define STR_FDC "FD-Controller:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo-Timings"
#define STR_CHECKBPB "BPB überprüfen"
#define STR_CDROM_DRIVES "CD-ROM-Laufwerke:"
#define STR_CD_SPEED "Geschwindigkeit:"
#define STR_MO_DRIVES "MO-Laufwerke:"
#define STR_ZIP_DRIVES "ZIP-Laufwerke:"

251
src/win/languages/dialogs.rc
View File

@@ -23,7 +23,7 @@ BEGIN
PUSHBUTTON STR_CANCEL,IDCANCEL,57,24,50,14
CONTROL STR_GAIN,IDC_SLIDER_GAIN,"msctls_trackbar32",TBS_VERT |
TBS_BOTH | TBS_AUTOTICKS | WS_TABSTOP,15,20,20,109
CTEXT STR_GAIN,IDT_1746,10,7,32,9,SS_CENTERIMAGE
CTEXT STR_GAIN,IDT_GAIN,10,7,32,9,SS_CENTERIMAGE
END
DLG_NEW_FLOPPY DIALOG DISCARDABLE 0, 0, 226, 86
@@ -33,20 +33,41 @@ FONT FONT_SIZE, FONT_NAME
BEGIN
DEFPUSHBUTTON STR_OK,IDOK,104,65,50,14
PUSHBUTTON STR_CANCEL,IDCANCEL,162,65,50,14
LTEXT STR_FILE_NAME,IDT_1749,7,6,44,12,SS_CENTERIMAGE
LTEXT STR_DISK_SIZE,IDT_1750,7,25,44,12,SS_CENTERIMAGE
LTEXT STR_RPM_MODE,IDT_1751,7,45,44,12,SS_CENTERIMAGE
LTEXT STR_FILE_NAME,IDT_FLP_FILE_NAME,7,6,44,12,SS_CENTERIMAGE
LTEXT STR_DISK_SIZE,IDT_FLP_DISK_SIZE,7,25,44,12,SS_CENTERIMAGE
LTEXT STR_RPM_MODE,IDT_FLP_RPM_MODE,7,45,44,12,SS_CENTERIMAGE
EDITTEXT IDC_EDIT_FILE_NAME,53,5,150,14,ES_AUTOHSCROLL | ES_READONLY
COMBOBOX IDC_COMBO_DISK_SIZE,53,25,166,14,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
COMBOBOX IDC_COMBO_RPM_MODE,53,45,166,14,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON "...",IDC_CFILE,206,5,13,14
LTEXT STR_PROGRESS,IDT_1757,7,45,44,12,SS_CENTERIMAGE
LTEXT STR_PROGRESS,IDT_FLP_PROGRESS,7,45,44,12,SS_CENTERIMAGE
CONTROL "IMGCreateProgress",IDC_PBAR_IMG_CREATE,"msctls_progress32",PBS_SMOOTH |
WS_BORDER,53,45,166,14
END
DLG_SPECIFY_DIM DIALOG DISCARDABLE 0, 0, 175, 66
STYLE DS_MODALFRAME | WS_POPUP | WS_CAPTION | WS_SYSMENU
CAPTION STR_SPECIFY_DIM
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_WIDTH,IDT_WIDTH,7,9,24,12
EDITTEXT IDC_EDIT_WIDTH,33,7,45,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_WIDTHSPIN,"msctls_updown32",UDS_SETBUDDYINT |
UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS,76,6,
12,12
LTEXT STR_HEIGHT,IDT_HEIGHT,97,9,24,12
EDITTEXT IDC_EDIT_HEIGHT,123,7,45,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_HEIGHTSPIN,"msctls_updown32",UDS_SETBUDDYINT |
UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS,166,6,
12,12
CONTROL STR_LOCK_TO_SIZE,IDC_CHECK_LOCK_SIZE,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,26,94,10
DEFPUSHBUTTON STR_OK,IDOK,30,45,50,14
PUSHBUTTON STR_CANCEL,IDCANCEL,99,45,50,14
END
DLG_CONFIG DIALOG DISCARDABLE 0, 0, 376, 256
STYLE DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU
CAPTION STR_CONFIG
@@ -59,56 +80,47 @@ BEGIN
CONTROL "",-1,"Static",SS_BLACKFRAME | SS_SUNKEN,1,226,373,1
END
DLG_SPECIFY_DIM DIALOG DISCARDABLE 0, 0, 175, 66
STYLE DS_MODALFRAME | WS_POPUP | WS_CAPTION | WS_SYSMENU
CAPTION STR_SPECIFY_DIM
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_WIDTH,IDT_1709,7,9,24,12
EDITTEXT IDC_EDIT_WIDTH,33,7,45,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_WIDTHSPIN,"msctls_updown32",UDS_SETBUDDYINT |
UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS,76,6,
12,12
LTEXT STR_HEIGHT,IDT_1710,97,9,24,12
EDITTEXT IDC_EDIT_HEIGHT,123,7,45,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_HEIGHTSPIN,"msctls_updown32",UDS_SETBUDDYINT |
UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS,166,6,
12,12
CONTROL STR_LOCK_TO_SIZE,IDC_CHECK_LOCK_SIZE,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,26,94,10
DEFPUSHBUTTON STR_OK,IDOK,30,45,50,14
PUSHBUTTON STR_CANCEL,IDCANCEL,99,45,50,14
END
DLG_CFG_MACHINE DIALOG DISCARDABLE 107, 0, 305, 200
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
COMBOBOX IDC_COMBO_MACHINE_TYPE,71,7,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_MACHINE_TYPE,IDT_1708,7,9,60,10
LTEXT STR_MACHINE_TYPE,IDT_MACHINE_TYPE,7,9,60,10
COMBOBOX IDC_COMBO_MACHINE,71,26,138,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_MACHINE,IDT_1701,7,28,60,10
LTEXT STR_MACHINE,IDT_MACHINE,7,28,60,10
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_MACHINE,214,26,46,12
COMBOBOX IDC_COMBO_CPU_TYPE,71,45,110,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CPU_TYPE,IDT_1702,7,47,59,10
COMBOBOX IDC_COMBO_CPU,215,45,45,120,CBS_DROPDOWNLIST |
LTEXT STR_CPU_TYPE,IDT_CPU_TYPE,7,47,59,10
COMBOBOX IDC_COMBO_CPU_SPEED,215,45,45,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_SPEED,IDT_1704,189,47,24,10
LTEXT STR_CPU_SPEED,IDT_CPU_SPEED,189,47,24,10
COMBOBOX IDC_COMBO_FPU,71,64,189,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_FPU,IDT_1707,7,66,59,10
LTEXT STR_FPU,IDT_FPU,7,66,59,10
COMBOBOX IDC_COMBO_WS,71,83,189,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_WAIT_STATES,IDT_1703,7,85,60,10
LTEXT STR_WAIT_STATES,IDT_WAIT_STATES,7,85,60,10
EDITTEXT IDC_MEMTEXT,70,102,45,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_MEMSPIN,"msctls_updown32",UDS_SETBUDDYINT |
UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS,113,101,
12,12
LTEXT STR_MB,IDT_1705,123,104,10,10
LTEXT STR_MEMORY,IDT_1706,7,104,30,10
LTEXT STR_MB,IDT_MB,123,104,10,10
LTEXT STR_MEMORY,IDT_MEMORY,7,104,30,10
#ifdef USE_DYNAREC
CONTROL STR_DYNAREC,IDC_CHECK_DYNAREC,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,120,120,10
#endif
GROUPBOX STR_TIME_SYNC,IDC_TIME_SYNC,7,135,100,56
CONTROL STR_DISABLED,IDC_RADIO_TS_DISABLED,"Button",
BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,14,147,84,10
@@ -116,17 +128,13 @@ BEGIN
BS_AUTORADIOBUTTON | WS_TABSTOP,14,161,84,10
CONTROL STR_ENABLED_UTC, IDC_RADIO_TS_UTC,"Button",
BS_AUTORADIOBUTTON | WS_TABSTOP,14,175,84,10
#ifdef USE_DYNAREC
CONTROL STR_DYNAREC,IDC_CHECK_DYNAREC,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,120,120,10
#endif
END
DLG_CFG_VIDEO DIALOG DISCARDABLE 107, 0, 267, 45
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_VIDEO,IDT_1707,7,9,48,10
LTEXT STR_VIDEO,IDT_VIDEO,7,9,48,10
COMBOBOX IDC_COMBO_VIDEO,64,7,155,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_VID,222,7,38,12
@@ -139,11 +147,11 @@ DLG_CFG_INPUT DIALOG DISCARDABLE 107, 0, 267, 65
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_MOUSE,IDT_1709,7,9,57,10
LTEXT STR_MOUSE,IDT_MOUSE,7,9,57,10
COMBOBOX IDC_COMBO_MOUSE,71,7,140,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_MOUSE,214,7,46,12
LTEXT STR_JOYSTICK,IDT_1710,7,27,58,10
LTEXT STR_JOYSTICK,IDT_JOYSTICK,7,27,58,10
COMBOBOX IDC_COMBO_JOYSTICK,71,25,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_JOY1,IDC_JOY1,7,44,50,14
@@ -158,17 +166,17 @@ FONT FONT_SIZE, FONT_NAME
BEGIN
COMBOBOX IDC_COMBO_SOUND,71,7,140,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_SOUND,IDT_1711,7,9,59,10
LTEXT STR_SOUND,IDT_SOUND,7,9,59,10
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_SND,214,7,46,12
COMBOBOX IDC_COMBO_MIDI,71,26,140,120,CBS_DROPDOWNLIST | WS_VSCROLL |
COMBOBOX IDC_COMBO_MIDI_OUT,71,26,140,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_MIDI,IDT_1712,7,28,59,10
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_MIDI,214,26,46,12
LTEXT STR_MIDI_OUT,IDT_MIDI_OUT,7,28,59,10
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_MIDI_OUT,214,26,46,12
COMBOBOX IDC_COMBO_MIDI_IN,71,45,140,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_MIDI_IN,IDT_1713,7,47,59,10
LTEXT STR_MIDI_IN,IDT_MIDI_IN,7,47,59,10
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_MIDI_IN,214,45,46,12
CONTROL STR_MPU401,IDC_CHECK_MPU401,"Button",
@@ -195,63 +203,87 @@ DLG_CFG_NETWORK DIALOG DISCARDABLE 107, 0, 267, 65
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_NET_TYPE,IDT_1714,7,9,59,10
LTEXT STR_NET_TYPE,IDT_NET_TYPE,7,9,59,10
COMBOBOX IDC_COMBO_NET_TYPE,71,7,189,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_PCAP,IDT_1715,7,28,59,10
LTEXT STR_PCAP,IDT_PCAP,7,28,59,10
COMBOBOX IDC_COMBO_PCAP,71,26,189,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
LTEXT STR_NET,IDT_1716,7,47,59,10
LTEXT STR_NET,IDT_NET,7,47,59,10
COMBOBOX IDC_COMBO_NET,71,45,140,120,CBS_DROPDOWNLIST | WS_VSCROLL |
WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_NET,214,44,46,12
END
DLG_CFG_PORTS DIALOG DISCARDABLE 107, 0, 267, 135
DLG_CFG_PORTS DIALOG DISCARDABLE 107, 0, 267, 150
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_LPT1,IDT_1717,7,9,61,10
/*
LTEXT STR_COM1,IDT_COM1,7,9,61,10
COMBOBOX IDC_COMBO_COM1,71,7,DLG_CFG_COMBO_NOBTN_WIDTH,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_COM2,IDT_COM2,7,28,61,10
COMBOBOX IDC_COMBO_COM2,71,26,DLG_CFG_COMBO_NOBTN_WIDTH,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_COM3,IDT_COM3,7,47,61,10
COMBOBOX IDC_COMBO_COM3,71,45,DLG_CFG_COMBO_NOBTN_WIDTH,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_COM4,IDT_COM4,7,66,61,10
COMBOBOX IDC_COMBO_COM4,71,45,DLG_CFG_COMBO_NOBTN_WIDTH,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
*/
LTEXT STR_LPT1,IDT_LPT1,7,9,61,10
COMBOBOX IDC_COMBO_LPT1,71,7,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_LPT2,IDT_1718,7,28,61,10
LTEXT STR_LPT2,IDT_LPT2,7,28,61,10
COMBOBOX IDC_COMBO_LPT2,71,26,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_LPT3,IDT_1719,7,47,61,10
LTEXT STR_LPT3,IDT_LPT3,7,47,61,10
COMBOBOX IDC_COMBO_LPT3,71,45,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_LPT4,IDT_LPT4,7,66,61,10
COMBOBOX IDC_COMBO_LPT4,71,64,189,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
CONTROL STR_SERIAL1,IDC_CHECK_SERIAL1,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,64,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,7,83,94,10
CONTROL STR_SERIAL2,IDC_CHECK_SERIAL2,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,147,64,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,147,83,94,10
CONTROL STR_SERIAL3,IDC_CHECK_SERIAL3,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,82,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,7,101,94,10
CONTROL STR_SERIAL4,IDC_CHECK_SERIAL4,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,147,82,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,147,101,94,10
CONTROL STR_PARALLEL1,IDC_CHECK_PARALLEL1,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,100,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,7,119,94,10
CONTROL STR_PARALLEL2,IDC_CHECK_PARALLEL2,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,147,100,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,147,119,94,10
CONTROL STR_PARALLEL3,IDC_CHECK_PARALLEL3,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,7,118,94,10
BS_AUTOCHECKBOX | WS_TABSTOP,7,137,94,10
CONTROL STR_PARALLEL4,IDC_CHECK_PARALLEL4,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,147,137,94,10
END
DLG_CFG_STORAGE DIALOG DISCARDABLE 107, 0, 267, 203
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_HDC,IDT_1718,7,9,64,10
LTEXT STR_HDC,IDT_HDC,7,9,64,10
COMBOBOX IDC_COMBO_HDC,64,7,155,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_HDC,222,7,38,12
LTEXT STR_FDC,IDT_1768,7,28,64,10
LTEXT STR_FDC,IDT_FDC,7,28,64,10
COMBOBOX IDC_COMBO_FDC,64,26,155,120,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_FDC,222,26,38,12
@@ -265,19 +297,19 @@ BEGIN
PUSHBUTTON STR_CONFIGURE,IDC_BUTTON_IDE_QUA,222,64,38,12
GROUPBOX STR_SCSI,IDC_GROUP_SCSI,7,85,253,93
LTEXT STR_SCSI_1,IDT_1763,16,102,48,10
LTEXT STR_SCSI_1,IDT_SCSI_1,16,102,48,10
COMBOBOX IDC_COMBO_SCSI_1,73,100,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_SCSI_1,213,100,38,12
LTEXT STR_SCSI_2,IDT_1764,16,121,48,10
LTEXT STR_SCSI_2,IDT_SCSI_2,16,121,48,10
COMBOBOX IDC_COMBO_SCSI_2,73,119,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_SCSI_2,213,119,38,12
LTEXT STR_SCSI_3,IDT_1765,16,140,48,10
LTEXT STR_SCSI_3,IDT_SCSI_3,16,140,48,10
COMBOBOX IDC_COMBO_SCSI_3,73,138,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_SCSI_3,213,138,38,12
LTEXT STR_SCSI_4,IDT_1766,16,159,48,10
LTEXT STR_SCSI_4,IDT_SCSI_4,16,159,48,10
COMBOBOX IDC_COMBO_SCSI_4,73,157,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_SCSI_4,213,157,38,12
@@ -293,19 +325,19 @@ BEGIN
CONTROL "List1",IDC_LIST_HARD_DISKS,"SysListView32",LVS_REPORT |
LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER |
WS_TABSTOP,7,18,253,92
LTEXT STR_HDD,IDT_1720,7,7,253,8
LTEXT STR_HDD,IDT_HDD,7,7,253,8
PUSHBUTTON STR_NEW,IDC_BUTTON_HDD_ADD_NEW,60,137,62,10
PUSHBUTTON STR_EXISTING,IDC_BUTTON_HDD_ADD,129,137,62,10
PUSHBUTTON STR_REMOVE,IDC_BUTTON_HDD_REMOVE,198,137,62,10
COMBOBOX IDC_COMBO_HD_BUS,33,117,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BUS,IDT_1721,7,119,24,8
LTEXT STR_BUS,IDT_BUS,7,119,24,8
COMBOBOX IDC_COMBO_HD_CHANNEL,170,117,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CHANNEL,IDT_1722,131,119,38,8
LTEXT STR_CHANNEL,IDT_CHANNEL,131,119,38,8
COMBOBOX IDC_COMBO_HD_ID,170,117,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_ID,IDT_1723,131,119,38,8
LTEXT STR_ID,IDT_ID,131,119,38,8
COMBOBOX IDC_COMBO_HD_CHANNEL_IDE,170,117,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
END
@@ -325,30 +357,30 @@ BEGIN
EDITTEXT IDC_EDIT_HD_SIZE,42,52,28,12
COMBOBOX IDC_COMBO_HD_TYPE,113,52,98,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_SECTORS,IDT_1726,154,35,27,10
LTEXT STR_HEADS,IDT_1727,81,35,29,8
LTEXT STR_CYLS,IDT_1728,7,35,32,12
LTEXT STR_SIZE_MB,IDT_1729,7,54,33,8
LTEXT STR_TYPE,IDT_1730,86,54,24,8
LTEXT STR_FILE_NAME,IDT_1731,7,7,204,9
LTEXT STR_SECTORS,IDT_SECTORS,154,35,27,10
LTEXT STR_HEADS,IDT_HEADS,81,35,29,8
LTEXT STR_CYLS,IDT_CYLS,7,35,32,12
LTEXT STR_SIZE_MB,IDT_SIZE_MB,7,54,33,8
LTEXT STR_TYPE,IDT_TYPE,86,54,24,8
LTEXT STR_FILE_NAME,IDT_FILE_NAME,7,7,204,9
COMBOBOX IDC_COMBO_HD_BUS,33,71,58,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BUS,IDT_1721,7,73,24,8
LTEXT STR_BUS,IDT_BUS,7,73,24,8
COMBOBOX IDC_COMBO_HD_CHANNEL,134,71,77,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CHANNEL,IDT_1722,99,73,34,8
LTEXT STR_CHANNEL,IDT_CHANNEL,99,73,34,8
COMBOBOX IDC_COMBO_HD_ID,134,71,77,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_ID,IDT_1723,99,73,34,8
LTEXT STR_ID,IDT_ID,99,73,34,8
COMBOBOX IDC_COMBO_HD_CHANNEL_IDE,134,71,77,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_IMG_FORMAT,IDT_1774,7,92,50,12
LTEXT STR_IMG_FORMAT,IDT_IMG_FORMAT,7,92,50,12
COMBOBOX IDC_COMBO_HD_IMG_FORMAT,58,90,153,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BLOCK_SIZE,IDT_1775,7,111,50,12
LTEXT STR_BLOCK_SIZE,IDT_BLOCK_SIZE,7,111,50,12
COMBOBOX IDC_COMBO_HD_BLOCK_SIZE,58,109,153,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_PROGRESS,IDT_1752,7,7,204,9
LTEXT STR_PROGRESS,IDT_PROGRESS,7,7,204,9
CONTROL "IMGCreateProgress",IDC_PBAR_IMG_CREATE,"msctls_progress32",PBS_SMOOTH |
WS_BORDER,7,16,204,12
END
@@ -360,10 +392,10 @@ BEGIN
CONTROL "List1",IDC_LIST_FLOPPY_DRIVES,"SysListView32",
LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER |
WS_TABSTOP,7,18,253,60
LTEXT STR_FLOPPY_DRIVES,IDT_1737,7,7,253,8
LTEXT STR_FLOPPY_DRIVES,IDT_FLOPPY_DRIVES,7,7,253,8
COMBOBOX IDC_COMBO_FD_TYPE,33,85,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_TYPE,IDT_1738,7,87,24,8
LTEXT STR_TYPE,IDT_FDD_TYPE,7,87,24,8
CONTROL STR_TURBO,IDC_CHECKTURBO,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,131,86,64,10
CONTROL STR_CHECKBPB,IDC_CHECKBPB,"Button",
@@ -372,19 +404,19 @@ BEGIN
CONTROL "List1",IDC_LIST_CDROM_DRIVES,"SysListView32",LVS_REPORT |
LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER |
WS_TABSTOP,7,117,253,60
LTEXT STR_CDROM_DRIVES,IDT_1739,7,107,253,8
LTEXT STR_CDROM_DRIVES,IDT_CD_DRIVES,7,107,253,8
COMBOBOX IDC_COMBO_CD_BUS,33,185,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BUS,IDT_1740,7,187,24,8
LTEXT STR_BUS,IDT_CD_BUS,7,187,24,8
COMBOBOX IDC_COMBO_CD_ID,170,185,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_ID,IDT_1741,131,187,38,8
LTEXT STR_ID,IDT_CD_ID,131,187,38,8
COMBOBOX IDC_COMBO_CD_CHANNEL_IDE,170,185,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CHANNEL,IDT_1742,131,187,38,8
LTEXT STR_CHANNEL,IDT_CD_CHANNEL,131,187,38,8
COMBOBOX IDC_COMBO_CD_SPEED,33,205,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_SPEED,IDT_1758,7,207,24,8
LTEXT STR_CD_SPEED,IDT_CD_SPEED,7,207,24,8
END
DLG_CFG_OTHER_REMOVABLE_DEVICES DIALOG DISCARDABLE 107, 0, 267, 222
@@ -395,33 +427,33 @@ BEGIN
CONTROL "List1",IDC_LIST_MO_DRIVES,"SysListView32",LVS_REPORT |
LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER |
WS_TABSTOP,7,17,253,60
LTEXT STR_MO_DRIVES,IDT_1769,7,7,253,8
LTEXT STR_MO_DRIVES,IDT_MO_DRIVES,7,7,253,8
COMBOBOX IDC_COMBO_MO_BUS,33,85,80,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BUS,IDT_1770,7,87,24,8
LTEXT STR_BUS,IDT_MO_BUS,7,87,24,8
COMBOBOX IDC_COMBO_MO_ID,170,85,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_ID,IDT_1771,131,87,38,8
LTEXT STR_ID,IDT_MO_ID,131,87,38,8
COMBOBOX IDC_COMBO_MO_CHANNEL_IDE,170,85,90,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CHANNEL,IDT_1772,131,87,38,8
LTEXT STR_CHANNEL,IDT_MO_CHANNEL,131,87,38,8
COMBOBOX IDC_COMBO_MO_TYPE,33,105,120,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_TYPE,IDT_1773,7,107,24,8
LTEXT STR_TYPE,IDT_MO_TYPE,7,107,24,8
CONTROL "List1",IDC_LIST_ZIP_DRIVES,"SysListView32",LVS_REPORT |
LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER |
WS_TABSTOP,7,137,253,60
LTEXT STR_ZIP_DRIVES,IDT_1759,7,127,253,8
LTEXT STR_ZIP_DRIVES,IDT_ZIP_DRIVES,7,127,253,8
COMBOBOX IDC_COMBO_ZIP_BUS,33,205,80,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_BUS,IDT_1753,7,207,24,8
LTEXT STR_BUS,IDT_ZIP_BUS,7,207,24,8
COMBOBOX IDC_COMBO_ZIP_ID,149,205,61,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_ID,IDT_1754,120,207,28,8
LTEXT STR_ID,IDT_ZIP_ID,120,207,28,8
COMBOBOX IDC_COMBO_ZIP_CHANNEL_IDE,149,205,61,12,CBS_DROPDOWNLIST |
WS_VSCROLL | WS_TABSTOP
LTEXT STR_CHANNEL,IDT_1755,120,207,28,8
LTEXT STR_CHANNEL,IDT_ZIP_CHANNEL,120,207,28,8
CONTROL STR_250,IDC_CHECK250,"Button",
BS_AUTOCHECKBOX | WS_TABSTOP,218,205,44,10
END
@@ -430,25 +462,25 @@ DLG_CFG_PERIPHERALS DIALOG DISCARDABLE 107, 0, 267, 154
STYLE DS_CONTROL | WS_CHILD
FONT FONT_SIZE, FONT_NAME
BEGIN
LTEXT STR_ISARTC,IDT_1767,7,9,48,10
LTEXT STR_ISARTC,IDT_ISARTC,7,9,48,10
COMBOBOX IDC_COMBO_ISARTC,64,7,155,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_ISARTC,222,7,38,12
GROUPBOX STR_ISAMEM,IDC_GROUP_ISAMEM,7,28,253,93
LTEXT STR_ISAMEM_1,IDT_1763,16,45,48,10
LTEXT STR_ISAMEM_1,IDT_ISAMEM_1,16,45,48,10
COMBOBOX IDC_COMBO_ISAMEM_1,73,43,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_ISAMEM_1,213,43,38,12
LTEXT STR_ISAMEM_2,IDT_1764,16,64,48,10
LTEXT STR_ISAMEM_2,IDT_ISAMEM_2,16,64,48,10
COMBOBOX IDC_COMBO_ISAMEM_2,73,62,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_ISAMEM_2,213,62,38,12
LTEXT STR_ISAMEM_3,IDT_1765,16,83,48,10
LTEXT STR_ISAMEM_3,IDT_ISAMEM_3,16,83,48,10
COMBOBOX IDC_COMBO_ISAMEM_3,73,81,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_ISAMEM_3,213,81,38,12
LTEXT STR_ISAMEM_4,IDT_1766,16,102,48,10
LTEXT STR_ISAMEM_4,IDT_ISAMEM_4,16,102,48,10
COMBOBOX IDC_COMBO_ISAMEM_4,73,100,137,120,
CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON STR_CONFIGURE,IDC_CONFIGURE_ISAMEM_4,213,100,38,12
@@ -488,7 +520,7 @@ END
#undef STR_MACHINE
#undef STR_CONFIGURE
#undef STR_CPU_TYPE
#undef STR_SPEED
#undef STR_CPU_SPEED
#undef STR_FPU
#undef STR_WAIT_STATES
#undef STR_MB
@@ -510,7 +542,7 @@ END
#undef STR_JOY4
#undef STR_SOUND
#undef STR_MIDI
#undef STR_MIDI_OUT
#undef STR_MIDI_IN
#undef STR_MPU401
#undef STR_SSI
@@ -522,9 +554,14 @@ END
#undef STR_PCAP
#undef STR_NET
#undef STR_COM1
#undef STR_COM2
#undef STR_COM3
#undef STR_COM4
#undef STR_LPT1
#undef STR_LPT2
#undef STR_LPT3
#undef STR_LPT4
#undef STR_SERIAL1
#undef STR_SERIAL2
#undef STR_SERIAL3
@@ -532,6 +569,7 @@ END
#undef STR_PARALLEL1
#undef STR_PARALLEL2
#undef STR_PARALLEL3
#undef STR_PARALLEL4
#undef STR_HDC
#undef STR_FDC
@@ -565,6 +603,7 @@ END
#undef STR_TURBO
#undef STR_CHECKBPB
#undef STR_CDROM_DRIVES
#undef STR_CD_SPEED
#undef STR_MO_DRIVES
#undef STR_ZIP_DRIVES

11
src/win/languages/en-GB.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Machine:"
#define STR_CONFIGURE "Configure"
#define STR_CPU_TYPE "CPU type:"
#define STR_SPEED "Speed:"
#define STR_CPU_SPEED "Speed:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Wait states:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Sound card:"
#define STR_MIDI "MIDI Out Device:"
#define STR_MIDI_OUT "MIDI Out Device:"
#define STR_MIDI_IN "MIDI In Device:"
#define STR_MPU401 "Standalone MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap device:"
#define STR_NET "Network adapter:"
#define STR_COM1 "COM1 Device:"
#define STR_COM2 "COM2 Device:"
#define STR_COM3 "COM3 Device:"
#define STR_COM4 "COM4 Device:"
#define STR_LPT1 "LPT1 Device:"
#define STR_LPT2 "LPT2 Device:"
#define STR_LPT3 "LPT3 Device:"
#define STR_LPT4 "LPT4 Device:"
#define STR_SERIAL1 "Serial port 1"
#define STR_SERIAL2 "Serial port 2"
#define STR_SERIAL3 "Serial port 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Parallel port 1"
#define STR_PARALLEL2 "Parallel port 2"
#define STR_PARALLEL3 "Parallel port 3"
#define STR_PARALLEL4 "Parallel port 4"
#define STR_HDC "HD Controller:"
#define STR_FDC "FD Controller:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo timings"
#define STR_CHECKBPB "Check BPB"
#define STR_CDROM_DRIVES "CD-ROM drives:"
#define STR_CD_SPEED "Speed:"
#define STR_MO_DRIVES "MO drives:"
#define STR_ZIP_DRIVES "ZIP drives:"

11
src/win/languages/en-US.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Machine:"
#define STR_CONFIGURE "Configure"
#define STR_CPU_TYPE "CPU type:"
#define STR_SPEED "Speed:"
#define STR_CPU_SPEED "Speed:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Wait states:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Sound card:"
#define STR_MIDI "MIDI Out Device:"
#define STR_MIDI_OUT "MIDI Out Device:"
#define STR_MIDI_IN "MIDI In Device:"
#define STR_MPU401 "Standalone MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap device:"
#define STR_NET "Network adapter:"
#define STR_COM1 "COM1 Device:"
#define STR_COM2 "COM2 Device:"
#define STR_COM3 "COM3 Device:"
#define STR_COM4 "COM4 Device:"
#define STR_LPT1 "LPT1 Device:"
#define STR_LPT2 "LPT2 Device:"
#define STR_LPT3 "LPT3 Device:"
#define STR_LPT4 "LPT4 Device:"
#define STR_SERIAL1 "Serial port 1"
#define STR_SERIAL2 "Serial port 2"
#define STR_SERIAL3 "Serial port 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Parallel port 1"
#define STR_PARALLEL2 "Parallel port 2"
#define STR_PARALLEL3 "Parallel port 3"
#define STR_PARALLEL4 "Parallel port 4"
#define STR_HDC "HD Controller:"
#define STR_FDC "FD Controller:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo timings"
#define STR_CHECKBPB "Check BPB"
#define STR_CDROM_DRIVES "CD-ROM drives:"
#define STR_CD_SPEED "Speed:"
#define STR_MO_DRIVES "MO drives:"
#define STR_ZIP_DRIVES "ZIP drives:"

11
src/win/languages/es-ES.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Máquina:"
#define STR_CONFIGURE "Configurar"
#define STR_CPU_TYPE "Tipo de CPU:"
#define STR_SPEED "Velocidad:"
#define STR_CPU_SPEED "Velocidad:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Estados en espera:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Mando 4..."
#define STR_SOUND "Tarjeta de sonido:"
#define STR_MIDI "Dispositivo MIDI de salida:"
#define STR_MIDI_OUT "Dispositivo MIDI de salida:"
#define STR_MIDI_IN "Dispositivo MIDI de entrada:"
#define STR_MPU401 "MPU-401 independiente"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Dispositivo PCap:"
#define STR_NET "Adaptador de red:"
#define STR_COM1 "Dispositivo COM1:"
#define STR_COM2 "Dispositivo COM2:"
#define STR_COM3 "Dispositivo COM3:"
#define STR_COM4 "Dispositivo COM4:"
#define STR_LPT1 "Dispositivo LPT1:"
#define STR_LPT2 "Dispositivo LPT2:"
#define STR_LPT3 "Dispositivo LPT3:"
#define STR_LPT4 "Dispositivo LPT4:"
#define STR_SERIAL1 "Puerto serie 1"
#define STR_SERIAL2 "Puerto serie 2"
#define STR_SERIAL3 "Puerto serie 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Puerto paralelo 1"
#define STR_PARALLEL2 "Puerto paralelo 2"
#define STR_PARALLEL3 "Puerto paralelo 3"
#define STR_PARALLEL4 "Puerto paralelo 4"
#define STR_HDC "Controladora HD:"
#define STR_FDC "Controladora FD:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Temporizaciones Turbo"
#define STR_CHECKBPB "Chequear BPB"
#define STR_CDROM_DRIVES "Unidades de CD-ROM:"
#define STR_CD_SPEED "Velocidad:"
#define STR_MO_DRIVES "Unidades MO:"
#define STR_ZIP_DRIVES "Unidades ZIP:"

11
src/win/languages/fi-FI.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Tietokone:"
#define STR_CONFIGURE "Määritys"
#define STR_CPU_TYPE "Suorittimen tyyppi:"
#define STR_SPEED "Nopeus:"
#define STR_CPU_SPEED "Nopeus:"
#define STR_FPU "Apusuoritin:"
#define STR_WAIT_STATES "Odotustilat:"
#define STR_MB "Mt"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Peliohjain 4..."
#define STR_SOUND "Äänikortti:"
#define STR_MIDI "MIDI-ulostulo:"
#define STR_MIDI_OUT "MIDI-ulostulo:"
#define STR_MIDI_IN "MIDI-sisääntulo:"
#define STR_MPU401 "Erillinen MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap-laite:"
#define STR_NET "Verkkokortti:"
#define STR_COM1 "COM1-laite:"
#define STR_COM2 "COM2-laite:"
#define STR_COM3 "COM3-laite:"
#define STR_COM4 "COM4-laite:"
#define STR_LPT1 "LPT1-laite:"
#define STR_LPT2 "LPT2-laite:"
#define STR_LPT3 "LPT3-laite:"
#define STR_LPT4 "LPT4-laite:"
#define STR_SERIAL1 "Sarjaportti 1"
#define STR_SERIAL2 "Sarjaportti 2"
#define STR_SERIAL3 "Sarjaportti 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Rinnakkaisportti 1"
#define STR_PARALLEL2 "Rinnakkaisportti 2"
#define STR_PARALLEL3 "Rinnakkaisportti 3"
#define STR_PARALLEL4 "Rinnakkaisportti 4"
#define STR_HDC "Kiintolevyohjain:"
#define STR_FDC "Levykeohjain:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo-ajoitukset"
#define STR_CHECKBPB "Tarkista BPB"
#define STR_CDROM_DRIVES "CD-ROM-asemat:"
#define STR_CD_SPEED "Nopeus:"
#define STR_MO_DRIVES "Magneettisoptiset asemat (MO):"
#define STR_ZIP_DRIVES "ZIP-asemat:"

11
src/win/languages/fr-FR.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Machine:"
#define STR_CONFIGURE "Configurer"
#define STR_CPU_TYPE "Type du processeur:"
#define STR_SPEED "Vitesse:"
#define STR_CPU_SPEED "Vitesse:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "États d'attente:"
#define STR_MB "Mo"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Manette 4..."
#define STR_SOUND "Carte son:"
#define STR_MIDI "Sortie MIDI:"
#define STR_MIDI_OUT "Sortie MIDI:"
#define STR_MIDI_IN "Entrée MIDI:"
#define STR_MPU401 "MPU-401 autonome"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Dispositif PCap:"
#define STR_NET "Adaptateur de réseau:"
#define STR_COM1 "Dispositif COM1:"
#define STR_COM2 "Dispositif COM2:"
#define STR_COM3 "Dispositif COM3:"
#define STR_COM4 "Dispositif COM4:"
#define STR_LPT1 "Dispositif LPT1:"
#define STR_LPT2 "Dispositif LPT2:"
#define STR_LPT3 "Dispositif LPT3:"
#define STR_LPT4 "Dispositif LPT4:"
#define STR_SERIAL1 "Port série 1"
#define STR_SERIAL2 "Port série 2"
#define STR_SERIAL3 "Port série 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Port parallèle 1"
#define STR_PARALLEL2 "Port parallèle 2"
#define STR_PARALLEL3 "Port parallèle 3"
#define STR_PARALLEL4 "Port parallèle 4"
#define STR_HDC "Contrôleur HD:"
#define STR_FDC "Contrôleur FD:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo"
#define STR_CHECKBPB "Vérifier BPB"
#define STR_CDROM_DRIVES "Lecterus CD-ROM:"
#define STR_CD_SPEED "Vitesse:"
#define STR_MO_DRIVES "Lecteurs magnéto-optiques:"
#define STR_ZIP_DRIVES "Lecteurs ZIP:"

11
src/win/languages/hr-HR.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Sistem:"
#define STR_CONFIGURE "Namjesti"
#define STR_CPU_TYPE "Tip procesora:"
#define STR_SPEED "Brzina:"
#define STR_CPU_SPEED "Brzina:"
#define STR_FPU "FPU uređaj:"
#define STR_WAIT_STATES "Stanja čekanja:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Palica za igru 4..."
#define STR_SOUND "Zvučna kartica:"
#define STR_MIDI "Izlazni uređaj MIDI:"
#define STR_MIDI_OUT "Izlazni uređaj MIDI:"
#define STR_MIDI_IN "Ulazni uređaj MIDI:"
#define STR_MPU401 "Samostalni MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Uređaj PCap:"
#define STR_NET "Mrežna kartica:"
#define STR_COM1 "Uređaj COM1:"
#define STR_COM2 "Uređaj COM2:"
#define STR_COM3 "Uređaj COM3:"
#define STR_COM4 "Uređaj COM4:"
#define STR_LPT1 "Uređaj LPT1:"
#define STR_LPT2 "Uređaj LPT2:"
#define STR_LPT3 "Uređaj LPT3:"
#define STR_LPT4 "Uređaj LPT4:"
#define STR_SERIAL1 "Serijska vrata 1"
#define STR_SERIAL2 "Serijska vrata 2"
#define STR_SERIAL3 "Serijska vrata 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Paralelna vrata 1"
#define STR_PARALLEL2 "Paralelna vrata 2"
#define STR_PARALLEL3 "Paralelna vrata 3"
#define STR_PARALLEL4 "Paralelna vrata 4"
#define STR_HDC "Kontroler tvrdog diska:"
#define STR_FDC "Kontroler diskete:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo vrijemena"
#define STR_CHECKBPB "Provjeraj BPB"
#define STR_CDROM_DRIVES "CD-ROM pogoni:"
#define STR_CD_SPEED "Brzina:"
#define STR_MO_DRIVES "MO pogoni:"
#define STR_ZIP_DRIVES "ZIP pogoni:"

13
src/win/languages/hu-HU.rc
View File

@@ -11,6 +11,8 @@ LANGUAGE LANG_HUNGARIAN, SUBLANG_DEFAULT
#pragma code_page(65001)
#endif //_WIN32
#define AUTHORS
/////////////////////////////////////////////////////////////////////////////
//
// Menu
@@ -298,7 +300,7 @@ END
#define STR_MACHINE "Számítógép:"
#define STR_CONFIGURE "Beállítások..."
#define STR_CPU_TYPE "Processzor:"
#define STR_SPEED "Seb.:"
#define STR_CPU_SPEED "Seb.:"
#define STR_FPU "FPU-egység:"
#define STR_WAIT_STATES "Várak. ciklusok:"
#define STR_MB "MB"
@@ -320,7 +322,7 @@ END
#define STR_JOY4 "Játékvez. 4..."
#define STR_SOUND "Hangkártya:"
#define STR_MIDI "MIDI-kimenet:"
#define STR_MIDI_OUT "MIDI-kimenet:"
#define STR_MIDI_IN "MIDI-bemenet:"
#define STR_MPU401 "Különálló MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -332,9 +334,14 @@ END
#define STR_PCAP "PCap eszköz:"
#define STR_NET "Hálózati kártya:"
#define STR_COM1 "COM1 eszköz:"
#define STR_COM2 "COM2 eszköz:"
#define STR_COM3 "COM3 eszköz:"
#define STR_COM4 "COM4 eszköz:"
#define STR_LPT1 "LPT1 eszköz:"
#define STR_LPT2 "LPT2 eszköz:"
#define STR_LPT3 "LPT3 eszköz:"
#define STR_LPT4 "LPT4 eszköz:"
#define STR_SERIAL1 "Soros port 1"
#define STR_SERIAL2 "Soros port 2"
#define STR_SERIAL3 "Soros port 3"
@@ -342,6 +349,7 @@ END
#define STR_PARALLEL1 "Párhuzamos port 1"
#define STR_PARALLEL2 "Párhuzamos port 2"
#define STR_PARALLEL3 "Párhuzamos port 3"
#define STR_PARALLEL4 "Párhuzamos port 4"
#define STR_HDC "Merevl.-vezérlő:"
#define STR_FDC "Floppy-vezérlő:"
@@ -375,6 +383,7 @@ END
#define STR_TURBO "Turbó időzítés"
#define STR_CHECKBPB "BPB ellenőrzés"
#define STR_CDROM_DRIVES "CD-ROM meghajtók:"
#define STR_CD_SPEED "Seb.:"
#define STR_MO_DRIVES "MO-meghajtók:"
#define STR_ZIP_DRIVES "ZIP-meghajtók:"

14
src/win/languages/it-IT.rc
View File

@@ -6,7 +6,8 @@ LANGUAGE LANG_ITALIAN, SUBLANG_ITALIAN
#pragma code_page(65001)
#endif //_WIN32
#define explorerdotexe
// explorerdotexe
#define AUTHORS
/////////////////////////////////////////////////////////////////////////////
//
@@ -295,7 +296,7 @@ END
#define STR_MACHINE "Piastra madre:"
#define STR_CONFIGURE "Configura"
#define STR_CPU_TYPE "Tipo del CPU:"
#define STR_SPEED "Veloc.:"
#define STR_CPU_SPEED "Veloc.:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Stati di attesa:"
#define STR_MB "MB"
@@ -317,7 +318,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Scheda audio:"
#define STR_MIDI "Uscita MIDI:"
#define STR_MIDI_OUT "Uscita MIDI:"
#define STR_MIDI_IN "Entrata MIDI:"
#define STR_MPU401 "MPU-401 autonomo"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +330,14 @@ END
#define STR_PCAP "Dispositivo PCap:"
#define STR_NET "Scheda di rete:"
#define STR_COM1 "Dispositivo COM1:"
#define STR_COM2 "Dispositivo COM2:"
#define STR_COM3 "Dispositivo COM3:"
#define STR_COM4 "Dispositivo COM4:"
#define STR_LPT1 "Dispositivo LPT1:"
#define STR_LPT2 "Dispositivo LPT2:"
#define STR_LPT3 "Dispositivo LPT3:"
#define STR_LPT4 "Dispositivo LPT4:"
#define STR_SERIAL1 "Porta seriale 1"
#define STR_SERIAL2 "Porta seriale 2"
#define STR_SERIAL3 "Porta seriale 3"
@@ -339,6 +345,7 @@ END
#define STR_PARALLEL1 "Porta parallela 1"
#define STR_PARALLEL2 "Porta parallela 2"
#define STR_PARALLEL3 "Porta parallela 3"
#define STR_PARALLEL4 "Porta parallela 4"
#define STR_HDC "Controller HD:"
#define STR_FDC "Controller FD:"
@@ -372,6 +379,7 @@ END
#define STR_TURBO "Turbo"
#define STR_CHECKBPB "Verifica BPB"
#define STR_CDROM_DRIVES "Unità CD-ROM:"
#define STR_CD_SPEED "Veloc.:"
#define STR_MO_DRIVES "Unità magneto-ottiche:"
#define STR_ZIP_DRIVES "Unità ZIP:"

11
src/win/languages/ja-JP.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "マシン:"
#define STR_CONFIGURE "設定"
#define STR_CPU_TYPE "CPUタイプ:"
#define STR_SPEED "速度:"
#define STR_CPU_SPEED "速度:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "待機状態:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "ジョイスティック4..."
#define STR_SOUND "サウンドカード:"
#define STR_MIDI "MIDI出力デバイス:"
#define STR_MIDI_OUT "MIDI出力デバイス:"
#define STR_MIDI_IN "MIDI入力デバイス:"
#define STR_MPU401 "独立型MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCapデバイス:"
#define STR_NET "ネットワークアダプター:"
#define STR_COM1 "COM1デバイス:"
#define STR_COM2 "COM2デバイス:"
#define STR_COM3 "COM3デバイス:"
#define STR_COM4 "COM4デバイス:"
#define STR_LPT1 "LPT1デバイス:"
#define STR_LPT2 "LPT2デバイス:"
#define STR_LPT3 "LPT3デバイス:"
#define STR_LPT4 "LPT4デバイス:"
#define STR_SERIAL1 "シリアルポート1"
#define STR_SERIAL2 "シリアルポート2"
#define STR_SERIAL3 "シリアルポート3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "パラレルポート1"
#define STR_PARALLEL2 "パラレルポート2"
#define STR_PARALLEL3 "パラレルポート3"
#define STR_PARALLEL4 "パラレルポート4"
#define STR_HDC "HDコントローラー:"
#define STR_FDC "FDコントローラー:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "高速タイミング"
#define STR_CHECKBPB "BPBをチェック"
#define STR_CDROM_DRIVES "CD-ROMドライブ:"
#define STR_CD_SPEED "速度:"
#define STR_MO_DRIVES "光磁気ドライブ:"
#define STR_ZIP_DRIVES "ZIPドライブ:"

11
src/win/languages/ko-KR.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "기종:"
#define STR_CONFIGURE "설정"
#define STR_CPU_TYPE "CPU 종류:"
#define STR_SPEED "속도:"
#define STR_CPU_SPEED "속도:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "대기 상태:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "조이스틱 4..."
#define STR_SOUND "사운드 카드:"
#define STR_MIDI "MIDI 출력 장치:"
#define STR_MIDI_OUT "MIDI 출력 장치:"
#define STR_MIDI_IN "MIDI 입력 장치:"
#define STR_MPU401 "MPU-401 단독 사용"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap 장치:"
#define STR_NET "네트워크 어댑터:"
#define STR_COM1 "COM1 장치:"
#define STR_COM2 "COM2 장치:"
#define STR_COM3 "COM3 장치:"
#define STR_COM4 "COM4 장치:"
#define STR_LPT1 "LPT1 장치:"
#define STR_LPT2 "LPT2 장치:"
#define STR_LPT3 "LPT3 장치:"
#define STR_LPT4 "LPT4 장치:"
#define STR_SERIAL1 "직렬 포트 1"
#define STR_SERIAL2 "직렬 포트 2"
#define STR_SERIAL3 "직렬 포트 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "병렬 포트 1"
#define STR_PARALLEL2 "병렬 포트 2"
#define STR_PARALLEL3 "병렬 포트 3"
#define STR_PARALLEL4 "병렬 포트 4"
#define STR_HDC "HD 컨트롤러:"
#define STR_FDC "FD 컨트롤러:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "고속 동작"
#define STR_CHECKBPB "BPB 확인"
#define STR_CDROM_DRIVES "CD-ROM 드라이브:"
#define STR_CD_SPEED "속도:"
#define STR_MO_DRIVES "광자기 드라이브:"
#define STR_ZIP_DRIVES "ZIP 드라이브:"

7
src/win/languages/pl-PL.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Maszyna:"
#define STR_CONFIGURE "Konfiguruj"
#define STR_CPU_TYPE "Rodzaj procesora:"
#define STR_SPEED "Szybkość:"
#define STR_CPU_SPEED "Szybkość:"
#define STR_FPU "Jednostka FPU:"
#define STR_WAIT_STATES "Stany oczekiwania:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Karta dźwiękowa:"
#define STR_MIDI "Urządzenie wyjściowe MIDI:"
#define STR_MIDI_OUT "Urządzenie wyjściowe MIDI:"
#define STR_MIDI_IN "Urządzenie wejściowe MIDI:"
#define STR_MPU401 "Samodzielne urządzenie MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -332,6 +332,7 @@ END
#define STR_LPT1 "Urządzenie LPT1:"
#define STR_LPT2 "Urządzenie LPT2:"
#define STR_LPT3 "Urządzenie LPT3:"
#define STR_LPT4 "Urządzenie LPT4:"
#define STR_SERIAL1 "Port szeregowy 1"
#define STR_SERIAL2 "Port szeregowy 2"
#define STR_SERIAL3 "Port szeregowy 3"
@@ -339,6 +340,7 @@ END
#define STR_PARALLEL1 "Port równoległy 1"
#define STR_PARALLEL2 "Port równoległy 2"
#define STR_PARALLEL3 "Port równoległy 3"
#define STR_PARALLEL4 "Port równoległy 4"
#define STR_HDC "Kontroler dysku twardego:"
#define STR_FDC "Kontroler dyskietek:"
@@ -372,6 +374,7 @@ END
#define STR_TURBO "Rozrządy Turbo"
#define STR_CHECKBPB "Sprawdzaj BPB"
#define STR_CDROM_DRIVES "Napędy CD-ROM:"
#define STR_CD_SPEED "Szybkość:"
#define STR_MO_DRIVES "Napędy MO:"
#define STR_ZIP_DRIVES "Napędy ZIP:"

11
src/win/languages/pt-BR.rc
View File

@@ -298,7 +298,7 @@ END
#define STR_MACHINE "Máquina:"
#define STR_CONFIGURE "Configurar"
#define STR_CPU_TYPE "Tipo de CPU:"
#define STR_SPEED "Veloc.:"
#define STR_CPU_SPEED "Veloc.:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Estados de espera:"
#define STR_MB "MB"
@@ -320,7 +320,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Placa de som:"
#define STR_MIDI "Disp. saída MIDI:"
#define STR_MIDI_OUT "Disp. saída MIDI:"
#define STR_MIDI_IN "Disp. entrada MIDI:"
#define STR_MPU401 "MPU-401 autônomo"
#define STR_SSI "Innovation SSI-2001"
@@ -332,9 +332,14 @@ END
#define STR_PCAP "Dispositivo PCap:"
#define STR_NET "Adaptador de rede:"
#define STR_COM1 "Dispositivo COM1:"
#define STR_COM2 "Dispositivo COM2:"
#define STR_COM3 "Dispositivo COM3:"
#define STR_COM4 "Dispositivo COM4:"
#define STR_LPT1 "Dispositivo LPT1:"
#define STR_LPT2 "Dispositivo LPT2:"
#define STR_LPT3 "Dispositivo LPT3:"
#define STR_LPT4 "Dispositivo LPT4:"
#define STR_SERIAL1 "Porta serial 1"
#define STR_SERIAL2 "Porta serial 2"
#define STR_SERIAL3 "Porta serial 3"
@@ -342,6 +347,7 @@ END
#define STR_PARALLEL1 "Porta paralela 1"
#define STR_PARALLEL2 "Porta paralela 2"
#define STR_PARALLEL3 "Porta paralela 3"
#define STR_PARALLEL4 "Porta paralela 4"
#define STR_HDC "Controlador HD:"
#define STR_FDC "Controlador FD:"
@@ -375,6 +381,7 @@ END
#define STR_TURBO "Turbo"
#define STR_CHECKBPB "Verificar BPB"
#define STR_CDROM_DRIVES "Unidades de CD-ROM:"
#define STR_CD_SPEED "Veloc.:"
#define STR_MO_DRIVES "Unidades magneto-ópticas:"
#define STR_ZIP_DRIVES "Unidades ZIP:"

11
src/win/languages/pt-PT.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Máquina:"
#define STR_CONFIGURE "Configurar"
#define STR_CPU_TYPE "Tipo do CPU:"
#define STR_SPEED "Velocidade:"
#define STR_CPU_SPEED "Velocidade:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Estados de espera:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Joystick 4..."
#define STR_SOUND "Placa de som:"
#define STR_MIDI "Disp. saída MIDI:"
#define STR_MIDI_OUT "Disp. saída MIDI:"
#define STR_MIDI_IN "Disp. entrada MIDI:"
#define STR_MPU401 "MPU-401 autónomo"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Dispositivo PCap:"
#define STR_NET "Placa de rede:"
#define STR_COM1 "Dispositivo COM1:"
#define STR_COM2 "Dispositivo COM2:"
#define STR_COM3 "Dispositivo COM3:"
#define STR_COM4 "Dispositivo COM4:"
#define STR_LPT1 "Dispositivo LPT1:"
#define STR_LPT2 "Dispositivo LPT2:"
#define STR_LPT3 "Dispositivo LPT3:"
#define STR_LPT4 "Dispositivo LPT4:"
#define STR_SERIAL1 "Porta de série 1"
#define STR_SERIAL2 "Porta de série 2"
#define STR_SERIAL3 "Porta de série 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Porta paralela 1"
#define STR_PARALLEL2 "Porta paralela 2"
#define STR_PARALLEL3 "Porta paralela 3"
#define STR_PARALLEL4 "Porta paralela 4"
#define STR_HDC "Controlador HD:"
#define STR_FDC "Controlador FD:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Velocidade turbo"
#define STR_CHECKBPB "Verificar BPB"
#define STR_CDROM_DRIVES "Unidades CD-ROM:"
#define STR_CD_SPEED "Velocidade:"
#define STR_MO_DRIVES "Unidades magneto-ópticas:"
#define STR_ZIP_DRIVES "Unidades ZIP:"

53
src/win/languages/ru-RU.rc
View File

@@ -31,13 +31,13 @@ BEGIN
END
POPUP "&Вид"
BEGIN
MENUITEM "&Скрыть строку статуса", IDM_VID_HIDE_STATUS_BAR
MENUITEM "Hide &toolbar", IDM_VID_HIDE_TOOLBAR
MENUITEM "&Скрыть строку состояния", IDM_VID_HIDE_STATUS_BAR
MENUITEM "С&крыть панель инструментов", IDM_VID_HIDE_TOOLBAR
MENUITEM SEPARATOR
MENUITEM "&Изменяемый размер окна", IDM_VID_RESIZE
MENUITEM "&Запомнить размер и положение", IDM_VID_REMEMBER
MENUITEM SEPARATOR
POPUP "&Рендерер"
POPUP "&Рендеринг"
BEGIN
MENUITEM "&SDL (Software)", IDM_VID_SDL_SW
MENUITEM "SDL (&Hardware)", IDM_VID_SDL_HW
@@ -98,7 +98,7 @@ BEGIN
POPUP "&Инструменты"
BEGIN
MENUITEM "&Настройки машины...", IDM_CONFIG
MENUITEM "&Обновление значков строки статуса", IDM_UPDATE_ICONS
MENUITEM "&Обновление значков строки состояния", IDM_UPDATE_ICONS
MENUITEM SEPARATOR
MENUITEM "Сделать с&криншот\tCtrl+F11", IDM_ACTION_SCREENSHOT
MENUITEM SEPARATOR
@@ -144,7 +144,7 @@ BEGIN
MENUITEM "&Точка останова журнала\tCtrl+F10", IDM_LOG_BREAKPOINT
# endif
# ifdef ENABLE_VRAM_DUMP
MENUITEM "&Выгрузка дампа видео-ОЗУ\tCtrl+F1", IDM_DUMP_VRAM
MENUITEM "&Выгрузка дампа видеопамяти\tCtrl+F1", IDM_DUMP_VRAM
# endif
# endif
END
@@ -208,7 +208,7 @@ CdromSubmenu MENU DISCARDABLE
BEGIN
POPUP ""
BEGIN
MENUITEM "&Mute", IDM_CDROM_MUTE
MENUITEM "О&тключить звук", IDM_CDROM_MUTE
MENUITEM SEPARATOR
MENUITEM "П&устой", IDM_CDROM_EMPTY
MENUITEM "&Снова загрузить предыдущий образ", IDM_CDROM_RELOAD
@@ -294,8 +294,8 @@ END
#define STR_MACHINE_TYPE "Тип машины:"
#define STR_MACHINE "Системная плата:"
#define STR_CONFIGURE "Настройка"
#define STR_CPU_TYPE "Тип ЦПУ:"
#define STR_SPEED "Speed:"
#define STR_CPU_TYPE "Тип ЦП:"
#define STR_CPU_SPEED "Скорость:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Циклы ожидания:"
#define STR_MB "МБ"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Джойстик 4..."
#define STR_SOUND "Звуковая карта:"
#define STR_MIDI "MIDI Out устр-во:"
#define STR_MIDI_OUT "MIDI Out устр-во:"
#define STR_MIDI_IN "MIDI In устр-во:"
#define STR_MPU401 "Отдельный MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Устройство PCap:"
#define STR_NET "Сетевая карта:"
#define STR_COM1 "Устройство COM1:"
#define STR_COM2 "Устройство COM2:"
#define STR_COM3 "Устройство COM3:"
#define STR_COM4 "Устройство COM4:"
#define STR_LPT1 "Устройство LPT1:"
#define STR_LPT2 "Устройство LPT2:"
#define STR_LPT3 "Устройство LPT3:"
#define STR_LPT4 "Устройство LPT4:"
#define STR_SERIAL1 "Последов. порт COM1"
#define STR_SERIAL2 "Последов. порт COM2"
#define STR_SERIAL3 "Последов. порт COM3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Параллельный порт LPT1"
#define STR_PARALLEL2 "Параллельный порт LPT2"
#define STR_PARALLEL3 "Параллельный порт LPT3"
#define STR_PARALLEL4 "Параллельный порт LPT4"
#define STR_HDC "Контроллер HD:"
#define STR_FDC "Контроллер FD:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Турбо тайминги"
#define STR_CHECKBPB "Проверять BPB"
#define STR_CDROM_DRIVES "Дисководы CD-ROM:"
#define STR_CD_SPEED "Скорость:"
#define STR_MO_DRIVES "Магнитооптические дисководы:"
#define STR_ZIP_DRIVES "ZIP дисководы:"
@@ -463,7 +470,7 @@ BEGIN
IDS_2102 "Система управления полетом Thrustmaster"
IDS_2103 "Нет"
IDS_2104 "Невозможно загрузить ускорители клавиатуры."
IDS_2105 "Невозможно зарегистрировать необработанный ввод."
IDS_2105 "Невозможно зарегистрировать необработанный (RAW) ввод."
IDS_2106 "%u"
IDS_2107 "%u МБ (CHS: %i, %i, %i)"
IDS_2108 "Дисковод %i (%s): %ls"
@@ -525,21 +532,21 @@ BEGIN
IDS_2143 "Шейдеры OpenGL (*.GLSL)\0*.GLSL\0Все файлы (*.*)\0*.*\0"
IDS_2144 "Параметры OpenGL"
IDS_2145 "Вы загружаете неподдерживаемую конфигурацию"
IDS_2146 "Выбор типов CPU для этой системной платы на данной эмулируемой машине отключен.\n\nЭто позволяет выбрать процессор, который в противном случае несовместим с выбранной материнской платой. Однако, вы можете столкнуться с несовместимостью с BIOS материнской платы или другим ПО.\n\nВключение этого параметра официально не поддерживается, и все поданные отчеты об ошибках могут быть закрыты как недействительные."
IDS_2146 "Выбор типов ЦП для этой системной платы на данной эмулируемой машине отключен.\n\nЭто позволяет выбрать процессор, который в противном случае несовместим с выбранной материнской платой. Однако, вы можете столкнуться с несовместимостью с BIOS материнской платы или другим ПО.\n\nВключение этого параметра официально не поддерживается, и все поданные отчеты об ошибках могут быть закрыты как недействительные."
IDS_2147 "Продолжить"
IDS_2148 "Кассета: %s"
IDS_2149 "Образы кассет (*.PCM;*.RAW;*.WAV;*.CAS)\0*.PCM;*.RAW;*.WAV;*.CAS\0Все файлы (*.*)\0*.*\0"
IDS_2150 "Картридж %i: %ls"
IDS_2151 "Образы картриджей (*.A;*.B;*.JRC)\0*.A;*.B;*.JRC\0Все файлы (*.*)\0*.*\0"
IDS_2152 "Error initializing renderer"
IDS_2153 "OpenGL (3.0 Core) renderer could not be initialized. Use another renderer."
IDS_2154 "Resume execution"
IDS_2155 "Pause execution"
IDS_2156 "Press Ctrl+Alt+Del"
IDS_2157 "Press Ctrl+Alt+Esc"
IDS_2158 "Hard reset"
IDS_2159 "ACPI shutdown"
IDS_2160 "Settings"
IDS_2152 "Ошибка инициализации рендерера"
IDS_2153 "Невозможно инициализировать рендерер OpenGL (3.0). Пожалуйста, используйте другой рендерер."
IDS_2154 "Возобновить выполнение"
IDS_2155 "Приостановить выполнение"
IDS_2156 "Нажать Ctrl+Alt+Del"
IDS_2157 "Нажать Ctrl+Alt+Esc"
IDS_2158 "Холодная перезагрузка"
IDS_2159 "Сигнал завершения ACPI"
IDS_2160 "Настройки машины"
END
STRINGTABLE DISCARDABLE
@@ -548,10 +555,10 @@ BEGIN
IDS_4097 "%01i:%01i"
IDS_4098 "%01i"
IDS_4099 "MFM/RLL или ESDI дисководов CD-ROM никогда не существовало"
IDS_4100 "Custom..."
IDS_4101 "Custom (large)..."
IDS_4100 "Задать вручную..."
IDS_4101 "Задать вручную (large)..."
IDS_4102 "Создать новый жёсткий диск"
IDS_4103 "Добавить существующий жёсткий диск"
IDS_4103 "Выбрать существующий жёсткий диск"
IDS_4104 "Размер образов дисков HDI не может превышать 4 ГБ."
IDS_4105 "Размер образов дисков не может превышать 127 ГБ."
IDS_4106 "Образы жёстких дисков (*.HD?;*.IM?;*.VHD)\0*.HD?;*.IM?;*.VHD\0Все файлы (*.*)\0*.*\0"

11
src/win/languages/sl-SI.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Sistem:"
#define STR_CONFIGURE "Nastavi"
#define STR_CPU_TYPE "Vrsta procesorja:"
#define STR_SPEED "Hitrost:"
#define STR_CPU_SPEED "Hitrost:"
#define STR_FPU "Procesor plavajoče vejice:"
#define STR_WAIT_STATES "Čakalna stanja:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Igralna palica 4..."
#define STR_SOUND "Zvočna kartica:"
#define STR_MIDI "Izhodna naprava MIDI:"
#define STR_MIDI_OUT "Izhodna naprava MIDI:"
#define STR_MIDI_IN "Vhodna naprava MIDI:"
#define STR_MPU401 "Samostojen MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "Naprava PCap:"
#define STR_NET "Omrežna kartica:"
#define STR_COM1 "Naprava COM1:"
#define STR_COM2 "Naprava COM2:"
#define STR_COM3 "Naprava COM3:"
#define STR_COM4 "Naprava COM4:"
#define STR_LPT1 "Naprava LPT1:"
#define STR_LPT2 "Naprava LPT2:"
#define STR_LPT3 "Naprava LPT3:"
#define STR_LPT4 "Naprava LPT4:"
#define STR_SERIAL1 "Serijska vrata 1"
#define STR_SERIAL2 "Serijska vrata 2"
#define STR_SERIAL3 "Serijska vrata 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Paralelna vrata 1"
#define STR_PARALLEL2 "Paralelna vrata 2"
#define STR_PARALLEL3 "Paralelna vrata 3"
#define STR_PARALLEL4 "Paralelna vrata 4"
#define STR_HDC "Krmilnik trdega diska:"
#define STR_FDC "Krmilnik disketnika:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo časovniki"
#define STR_CHECKBPB "Preverjaj BPB"
#define STR_CDROM_DRIVES "Pogoni CD-ROM:"
#define STR_CD_SPEED "Hitrost:"
#define STR_MO_DRIVES "Magnetno-optični pogoni:"
#define STR_ZIP_DRIVES "Pogoni ZIP:"

11
src/win/languages/tr-TR.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "Makine:"
#define STR_CONFIGURE "Ayarla"
#define STR_CPU_TYPE "CPU türü:"
#define STR_SPEED "Hız:"
#define STR_CPU_SPEED "Hız:"
#define STR_FPU "FPU:"
#define STR_WAIT_STATES "Bekleme süreleri:"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "Oyun kolu 4..."
#define STR_SOUND "Ses kartı:"
#define STR_MIDI "MIDI Çıkış Cihazı:"
#define STR_MIDI_OUT "MIDI Çıkış Cihazı:"
#define STR_MIDI_IN "MIDI Giriş Cihazı:"
#define STR_MPU401 "Bağımsız MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap cihazı:"
#define STR_NET "Ağ cihazı:"
#define STR_COM1 "COM1 Cihazı:"
#define STR_COM2 "COM2 Cihazı:"
#define STR_COM3 "COM3 Cihazı:"
#define STR_COM4 "COM4 Cihazı:"
#define STR_LPT1 "LPT1 Cihazı:"
#define STR_LPT2 "LPT2 Cihazı:"
#define STR_LPT3 "LPT3 Cihazı:"
#define STR_LPT4 "LPT4 Cihazı:"
#define STR_SERIAL1 "Seri port 1"
#define STR_SERIAL2 "Seri port 2"
#define STR_SERIAL3 "Seri port 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "Paralel port 1"
#define STR_PARALLEL2 "Paralel port 2"
#define STR_PARALLEL3 "Paralel port 3"
#define STR_PARALLEL4 "Paralel port 4"
#define STR_HDC "HD Kontrolcüsü:"
#define STR_FDC "FD Kontrolcüsü:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "Turbo zamanlamaları"
#define STR_CHECKBPB "BPB'yi denetle"
#define STR_CDROM_DRIVES "CD-ROM sürücüleri:"
#define STR_CD_SPEED "Hız:"
#define STR_MO_DRIVES "MO sürücüleri:"
#define STR_ZIP_DRIVES "ZIP sürücüleri:"

11
src/win/languages/zh-CN.rc
View File

@@ -295,7 +295,7 @@ END
#define STR_MACHINE "机型:"
#define STR_CONFIGURE "配置"
#define STR_CPU_TYPE "CPU 类型:"
#define STR_SPEED "速度:"
#define STR_CPU_SPEED "速度:"
#define STR_FPU "浮点处理器 (FPU):"
#define STR_WAIT_STATES "等待状态 (WS):"
#define STR_MB "MB"
@@ -317,7 +317,7 @@ END
#define STR_JOY4 "操纵杆 4..."
#define STR_SOUND "声卡:"
#define STR_MIDI "MIDI 输出设备:"
#define STR_MIDI_OUT "MIDI 输出设备:"
#define STR_MIDI_IN "MIDI 输入设备:"
#define STR_MPU401 "独立 MPU-401"
#define STR_SSI "Innovation SSI-2001"
@@ -329,9 +329,14 @@ END
#define STR_PCAP "PCap 设备:"
#define STR_NET "网络适配器:"
#define STR_COM1 "COM1 设备:"
#define STR_COM2 "COM2 设备:"
#define STR_COM3 "COM3 设备:"
#define STR_COM4 "COM4 设备:"
#define STR_LPT1 "LPT1 设备:"
#define STR_LPT2 "LPT2 设备:"
#define STR_LPT3 "LPT3 设备:"
#define STR_LPT4 "LPT4 设备:"
#define STR_SERIAL1 "串口 1"
#define STR_SERIAL2 "串口 2"
#define STR_SERIAL3 "串口 3"
@@ -339,6 +344,7 @@ END
#define STR_PARALLEL1 "并口 1"
#define STR_PARALLEL2 "并口 2"
#define STR_PARALLEL3 "并口 3"
#define STR_PARALLEL4 "并口 4"
#define STR_HDC "硬盘控制器:"
#define STR_FDC "软盘控制器:"
@@ -372,6 +378,7 @@ END
#define STR_TURBO "加速时序"
#define STR_CHECKBPB "检查 BPB"
#define STR_CDROM_DRIVES "光盘驱动器:"
#define STR_CD_SPEED "速度:"
#define STR_MO_DRIVES "磁光盘驱动器:"
#define STR_ZIP_DRIVES "ZIP 驱动器:"

9
src/win/win.c
View File

@@ -1135,12 +1135,15 @@ plat_setfullscreen(int on)
ResizeWindowByClientArea(hwndMain, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height));
}
/* Toolbar. */
MoveWindow(hwndRebar, 0, 0, temp_x, tbar_height, TRUE);
/* Render window. */
MoveWindow(hwndRender, 0, 0, temp_x, temp_y, TRUE);
GetWindowRect(hwndRender, &rect);
MoveWindow(hwndRender, 0, hide_tool_bar ? 0 : tbar_height, temp_x, temp_y, TRUE);
/* Status bar. */
MoveWindow(hwndSBAR, 0, rect.bottom, temp_x, 17, TRUE);
GetClientRect(hwndMain, &rect);
MoveWindow(hwndSBAR, 0, rect.bottom - sbar_height, temp_x, sbar_height, TRUE);
if (mouse_capture)
ClipCursor(&rect);

2
src/win/win_devconf.c
View File

@@ -471,7 +471,7 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst)
item->y = y;
item->id = id++;
item->cx = 80;
item->cx = 100;
item->cy = 15;
item->style = WS_CHILD | WS_VISIBLE | BS_AUTOCHECKBOX;

28
src/win/win_new_floppy.c
View File

@@ -52,8 +52,13 @@ typedef struct {
} disk_size_t;
static const disk_size_t disk_sizes[14] = { { 0, 1, 2, 1, 0, 40, 8, 2, 0xfe, 2, 2, 1, 64 }, /* 160k */
{ 0, 1, 2, 1, 0, 40, 9, 2, 0xfc, 2, 2, 1, 64 }, /* 180k */
static const disk_size_t disk_sizes[14] = {
// { 1, 1, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 250k 8" */
// { 1, 2, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 500k 8" */
// { 1, 1, 2, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 616k 8" */
// { 1, 2, 0, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 1232k 8" */
{ 0, 1, 2, 1, 0, 40, 8, 2, 0xfe, 1, 2, 1, 64 }, /* 160k */
{ 0, 1, 2, 1, 0, 40, 9, 2, 0xfc, 1, 2, 2, 64 }, /* 180k */
{ 0, 2, 2, 1, 0, 40, 8, 2, 0xff, 2, 2, 1, 112 }, /* 320k */
{ 0, 2, 2, 1, 0, 40, 9, 2, 0xfd, 2, 2, 2, 112 }, /* 360k */
{ 0, 2, 2, 1, 0, 80, 8, 2, 0xfb, 2, 2, 2, 112 }, /* 640k */
@@ -325,7 +330,7 @@ create_zip_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_zdi,
h = GetDlgItem(hwnd, IDC_COMBO_RPM_MODE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hwnd, IDT_1751);
h = GetDlgItem(hwnd, IDT_FLP_RPM_MODE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hwnd, IDC_PBAR_IMG_CREATE);
@@ -333,7 +338,7 @@ create_zip_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_zdi,
SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0);
EnableWindow(h, TRUE);
ShowWindow(h, SW_SHOW);
h = GetDlgItem(hwnd, IDT_1757);
h = GetDlgItem(hwnd, IDT_FLP_PROGRESS);
EnableWindow(h, TRUE);
ShowWindow(h, SW_SHOW);
@@ -559,7 +564,7 @@ create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND h
h = GetDlgItem(hwnd, IDC_COMBO_RPM_MODE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hwnd, IDT_1751);
h = GetDlgItem(hwnd, IDT_FLP_RPM_MODE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hwnd, IDC_PBAR_IMG_CREATE);
@@ -567,7 +572,7 @@ create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND h
SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0);
EnableWindow(h, TRUE);
ShowWindow(h, SW_SHOW);
h = GetDlgItem(hwnd, IDT_1757);
h = GetDlgItem(hwnd, IDT_FLP_PROGRESS);
EnableWindow(h, TRUE);
ShowWindow(h, SW_SHOW);
@@ -698,7 +703,7 @@ NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
uint8_t disk_size, rpm_mode;
int ret;
FILE *f;
int zip_types, mo_types;
int zip_types, mo_types, floppy_types;
wchar_t *twcs;
switch (message) {
@@ -716,7 +721,8 @@ NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
for (i = 0; i < mo_types; i++)
SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5902 + i));
} else {
for (i = 0; i < 12; i++)
floppy_types = 12;
for (i = 0; i < floppy_types; i++)
SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5888 + i));
}
SendMessage(h, CB_SETCURSEL, 0, 0);
@@ -727,7 +733,7 @@ NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
SendMessage(h, CB_SETCURSEL, 0, 0);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hdlg, IDT_1751);
h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hdlg, IDOK);
@@ -735,7 +741,7 @@ NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
h = GetDlgItem(hdlg, IDT_1757);
h = GetDlgItem(hdlg, IDT_FLP_PROGRESS);
EnableWindow(h, FALSE);
ShowWindow(h, SW_HIDE);
break;
@@ -827,7 +833,7 @@ NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
else
file_type = 0;
}
h = GetDlgItem(hdlg, IDT_1751);
h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE);
if (file_type == 2) {
EnableWindow(h, TRUE);
ShowWindow(h, SW_SHOW);

117
src/win/win_settings.c
View File

@@ -99,8 +99,8 @@ static int temp_net_type, temp_net_card;
static char temp_pcap_dev[522];
/* Ports category */
static int temp_lpt_devices[3];
static int temp_serial[4], temp_lpt[3];
static int temp_lpt_devices[PARALLEL_MAX];
static int temp_serial[SERIAL_MAX], temp_lpt[PARALLEL_MAX];
/* Other peripherals category */
static int temp_fdc_card, temp_hdc, temp_ide_ter, temp_ide_qua, temp_cassette;
@@ -357,11 +357,11 @@ win_settings_init(void)
temp_net_card = network_card;
/* Ports category */
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
temp_lpt_devices[i] = lpt_ports[i].device;
temp_lpt[i] = lpt_ports[i].enabled;
}
for (i = 0; i < 4; i++)
for (i = 0; i < SERIAL_MAX; i++)
temp_serial[i] = serial_enabled[i];
/* Storage devices category */
@@ -477,11 +477,11 @@ win_settings_changed(void)
i = i || (network_card != temp_net_card);
/* Ports category */
for (j = 0; j < 3; j++) {
for (j = 0; j < PARALLEL_MAX; j++) {
i = i || (temp_lpt_devices[j] != lpt_ports[j].device);
i = i || (temp_lpt[j] != lpt_ports[j].enabled);
}
for (j = 0; j < 4; j++)
for (j = 0; j < SERIAL_MAX; j++)
i = i || (temp_serial[j] != serial_enabled[j]);
/* Storage devices category */
@@ -568,11 +568,11 @@ win_settings_save(void)
network_card = temp_net_card;
/* Ports category */
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
lpt_ports[i].device = temp_lpt_devices[i];
lpt_ports[i].enabled = temp_lpt[i];
}
for (i = 0; i < 4; i++)
for (i = 0; i < SERIAL_MAX; i++)
serial_enabled[i] = temp_serial[i];
/* Storage devices category */
@@ -707,13 +707,13 @@ win_settings_machine_recalc_cpu_m(HWND hdlg)
lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR));
settings_reset_content(hdlg, IDC_COMBO_CPU);
settings_reset_content(hdlg, IDC_COMBO_CPU_SPEED);
c = i = 0;
while (temp_cpu_f->cpus[c].cpu_type != 0) {
if (cpu_is_eligible(temp_cpu_f, c, temp_machine)) {
stransi = (char *) temp_cpu_f->cpus[c].name;
mbstowcs(lptsTemp, stransi, strlen(stransi) + 1);
settings_add_string(hdlg, IDC_COMBO_CPU, (LPARAM)(LPCSTR)lptsTemp);
settings_add_string(hdlg, IDC_COMBO_CPU_SPEED, (LPARAM)(LPCSTR)lptsTemp);
if (first_eligible == -1)
first_eligible = i;
@@ -727,13 +727,13 @@ win_settings_machine_recalc_cpu_m(HWND hdlg)
}
if (i == 0)
fatal("No eligible CPUs for the selected family\n");
settings_enable_window(hdlg, IDC_COMBO_CPU, i != 1);
settings_enable_window(hdlg, IDC_COMBO_CPU_SPEED, i != 1);
if (current_eligible < first_eligible)
current_eligible = first_eligible;
else if (current_eligible > last_eligible)
current_eligible = last_eligible;
temp_cpu = listtocpu[current_eligible];
settings_set_cur_sel(hdlg, IDC_COMBO_CPU, current_eligible);
settings_set_cur_sel(hdlg, IDC_COMBO_CPU_SPEED, current_eligible);
win_settings_machine_recalc_cpu(hdlg);
@@ -974,9 +974,9 @@ win_settings_machine_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
win_settings_machine_recalc_cpu_m(hdlg);
}
break;
case IDC_COMBO_CPU:
case IDC_COMBO_CPU_SPEED:
if (HIWORD(wParam) == CBN_SELCHANGE) {
temp_cpu = listtocpu[settings_get_cur_sel(hdlg, IDC_COMBO_CPU)];
temp_cpu = listtocpu[settings_get_cur_sel(hdlg, IDC_COMBO_CPU_SPEED)];
win_settings_machine_recalc_cpu(hdlg);
}
break;
@@ -1325,7 +1325,7 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
settings_enable_window(hdlg, IDC_CONFIGURE_SND, sound_card_has_config(temp_sound_card));
c = d = 0;
settings_reset_content(hdlg, IDC_COMBO_MIDI);
settings_reset_content(hdlg, IDC_COMBO_MIDI_OUT);
while (1) {
generate_device_name(midi_device_getdevice(c), midi_device_get_internal_name(c), 0);
@@ -1334,19 +1334,19 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
if (midi_device_available(c)) {
if (c == 0)
settings_add_string(hdlg, IDC_COMBO_MIDI, win_get_string(IDS_2103));
settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, win_get_string(IDS_2103));
else
settings_add_string(hdlg, IDC_COMBO_MIDI, (LPARAM) device_name);
settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, (LPARAM) device_name);
settings_list_to_midi[d] = c;
if ((c == 0) || (c == temp_midi_device))
settings_set_cur_sel(hdlg, IDC_COMBO_MIDI, d);
settings_set_cur_sel(hdlg, IDC_COMBO_MIDI_OUT, d);
d++;
}
c++;
}
settings_enable_window(hdlg, IDC_CONFIGURE_MIDI, midi_device_has_config(temp_midi_device));
settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_device_has_config(temp_midi_device));
c = d = 0;
settings_reset_content(hdlg, IDC_COMBO_MIDI_IN);
@@ -1404,16 +1404,16 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
temp_deviceconfig |= deviceconfig_open(hdlg, (void *)sound_card_getdevice(temp_sound_card));
break;
case IDC_COMBO_MIDI:
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI)];
settings_enable_window(hdlg, IDC_CONFIGURE_MIDI, midi_device_has_config(temp_midi_device));
case IDC_COMBO_MIDI_OUT:
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)];
settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_device_has_config(temp_midi_device));
settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401);
settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow());
settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401);
break;
case IDC_CONFIGURE_MIDI:
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI)];
case IDC_CONFIGURE_MIDI_OUT:
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)];
temp_deviceconfig |= deviceconfig_open(hdlg, (void *)midi_device_getdevice(temp_midi_device));
break;
@@ -1474,7 +1474,7 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
case WM_SAVESETTINGS:
temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)];
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI)];
temp_midi_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)];
temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)];
temp_mpu401 = settings_get_check(hdlg, IDC_CHECK_MPU401);
temp_GAMEBLASTER = settings_get_check(hdlg, IDC_CHECK_CMS);
@@ -1504,7 +1504,7 @@ win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
case WM_INITDIALOG:
lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR));
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
c = 0;
while (1) {
s = lpt_device_get_name(c);
@@ -1527,7 +1527,7 @@ win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
settings_enable_window(hdlg, IDC_COMBO_LPT1 + i, temp_lpt[i]);
}
for (i = 0; i < 4; i++)
for (i = 0; i < SERIAL_MAX; i++)
settings_set_check(hdlg, IDC_CHECK_SERIAL1 + i, temp_serial[i]);
free(lptsTemp);
@@ -1539,6 +1539,7 @@ win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
case IDC_CHECK_PARALLEL1:
case IDC_CHECK_PARALLEL2:
case IDC_CHECK_PARALLEL3:
case IDC_CHECK_PARALLEL4:
i = LOWORD(wParam) - IDC_CHECK_PARALLEL1;
settings_enable_window(hdlg, IDC_COMBO_LPT1 + i,
settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i) == BST_CHECKED);
@@ -1547,12 +1548,12 @@ win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
break;
case WM_SAVESETTINGS:
for (i = 0; i < 3; i++) {
for (i = 0; i < PARALLEL_MAX; i++) {
temp_lpt_devices[i] = settings_get_cur_sel(hdlg, IDC_COMBO_LPT1 + i);
temp_lpt[i] = settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i);
}
for (i = 0; i < 4; i++)
for (i = 0; i < SERIAL_MAX; i++)
temp_serial[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL1 + i);
default:
@@ -2011,7 +2012,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
{
int i = 0, bus = 0;
for (i = IDT_1722; i <= IDT_1723; i++)
for (i = IDT_CHANNEL; i <= IDT_ID; i++)
settings_show_window(hdlg, i, FALSE);
settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, FALSE);
settings_show_window(hdlg, IDC_COMBO_HD_ID, FALSE);
@@ -2022,7 +2023,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
switch(bus) {
case HDD_BUS_MFM: /* MFM */
settings_show_window(hdlg, IDT_1722, TRUE);
settings_show_window(hdlg, IDT_CHANNEL, TRUE);
settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE);
if (assign_id)
@@ -2030,7 +2031,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.mfm_channel : temp_hdd[lv1_current_sel].mfm_channel);
break;
case HDD_BUS_XTA: /* XTA */
settings_show_window(hdlg, IDT_1722, TRUE);
settings_show_window(hdlg, IDT_CHANNEL, TRUE);
settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE);
if (assign_id)
@@ -2038,7 +2039,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.xta_channel : temp_hdd[lv1_current_sel].xta_channel);
break;
case HDD_BUS_ESDI: /* ESDI */
settings_show_window(hdlg, IDT_1722, TRUE);
settings_show_window(hdlg, IDT_CHANNEL, TRUE);
settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE);
if (assign_id)
@@ -2047,7 +2048,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
break;
case HDD_BUS_IDE: /* IDE */
case HDD_BUS_ATAPI: /* ATAPI */
settings_show_window(hdlg, IDT_1722, TRUE);
settings_show_window(hdlg, IDT_CHANNEL, TRUE);
settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL_IDE, TRUE);
if (assign_id)
@@ -2055,8 +2056,8 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE, is_add_dlg ? new_hdd.ide_channel : temp_hdd[lv1_current_sel].ide_channel);
break;
case HDD_BUS_SCSI: /* SCSI */
settings_show_window(hdlg, IDT_1723, TRUE);
settings_show_window(hdlg, IDT_1724, TRUE);
settings_show_window(hdlg, IDT_ID, TRUE);
settings_show_window(hdlg, IDT_LUN, TRUE);
settings_show_window(hdlg, IDC_COMBO_HD_ID, TRUE);
if (assign_id)
@@ -2065,7 +2066,7 @@ recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id)
}
}
settings_show_window(hdlg, IDT_1721, (hd_listview_items != 0) || is_add_dlg);
settings_show_window(hdlg, IDT_BUS, (hd_listview_items != 0) || is_add_dlg);
settings_show_window(hdlg, IDC_COMBO_HD_BUS, (hd_listview_items != 0) || is_add_dlg);
}
@@ -2528,11 +2529,11 @@ static MVHDGeom create_drive_vhd_fixed(char* filename, int cyl, int heads, int s
adjust_86box_geometry_for_vhd(&_86box_geometry, &vhd_geometry);
HWND h = GetDlgItem(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE);
settings_show_window(vhd_progress_hdlg, IDT_1731, FALSE);
settings_show_window(vhd_progress_hdlg, IDT_FILE_NAME, FALSE);
settings_show_window(vhd_progress_hdlg, IDC_EDIT_HD_FILE_NAME, FALSE);
settings_show_window(vhd_progress_hdlg, IDC_CFILE, FALSE);
settings_show_window(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE, TRUE);
settings_enable_window(vhd_progress_hdlg, IDT_1752, TRUE);
settings_enable_window(vhd_progress_hdlg, IDT_PROGRESS, TRUE);
SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) vhd_geometry.cyl * vhd_geometry.heads * vhd_geometry.spt);
SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0);
@@ -2663,7 +2664,7 @@ win_settings_hard_disks_add_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM
settings_set_cur_sel(hdlg, IDC_COMBO_HD_BLOCK_SIZE, 0);
settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE);
settings_show_window(hdlg, IDT_1775, FALSE);
settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE);
if (existing & 1) {
settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE);
@@ -2672,7 +2673,7 @@ win_settings_hard_disks_add_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM
settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE);
settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE);
settings_show_window(hdlg, IDC_COMBO_HD_IMG_FORMAT, FALSE);
settings_show_window(hdlg, IDT_1774, FALSE);
settings_show_window(hdlg, IDT_IMG_FORMAT, FALSE);
/* adjust window size */
GetWindowRect(hdlg, &rect);
@@ -2717,7 +2718,7 @@ win_settings_hard_disks_add_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM
new_hdd.scsi_id = id;
settings_enable_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE);
settings_show_window(hdlg, IDT_1752, FALSE);
settings_show_window(hdlg, IDT_PROGRESS, FALSE);
settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, FALSE);
no_update = 0;
@@ -2845,11 +2846,11 @@ win_settings_hard_disks_add_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM
size &= 0xfffff;
if (size || r) {
settings_show_window(hdlg, IDT_1731, FALSE);
settings_show_window(hdlg, IDT_FILE_NAME, FALSE);
settings_show_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE);
settings_show_window(hdlg, IDC_CFILE, FALSE);
settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, TRUE);
settings_enable_window(hdlg, IDT_1752, TRUE);
settings_enable_window(hdlg, IDT_PROGRESS, TRUE);
h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE);
SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) r);
@@ -3309,10 +3310,10 @@ hdd_add_file_open_error:
if (img_format == 4 || img_format == 5) { /* For dynamic and diff VHDs, show the block size dropdown. */
settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, TRUE);
settings_show_window(hdlg, IDT_1775, TRUE);
settings_show_window(hdlg, IDT_BLOCK_SIZE, TRUE);
} else { /* Hide it otherwise. */
settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE);
settings_show_window(hdlg, IDT_1775, FALSE);
settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE);
}
break;
}
@@ -3731,7 +3732,7 @@ win_settings_zip_drives_recalc_list(HWND hdlg)
lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE;
lvI.stateMask = lvI.iSubItem = lvI.state = 0;
for (i = 0; i < 4; i++) {
for (i = 0; i < ZIP_NUM; i++) {
fsid = combo_id_to_format_string_id(temp_zip_drives[i].bus_type);
lvI.iSubItem = 0;
@@ -4226,19 +4227,19 @@ cdrom_recalc_location_controls(HWND hdlg, int assign_id)
int i = 0;
int bus = temp_cdrom[lv2_current_sel].bus_type;
for (i = IDT_1741; i < (IDT_1742 + 1); i++)
for (i = IDT_CD_ID; i <= (IDT_CD_LUN); i++)
settings_show_window(hdlg, i, FALSE);
settings_show_window(hdlg, IDC_COMBO_CD_ID, FALSE);
settings_show_window(hdlg, IDC_COMBO_CD_CHANNEL_IDE, FALSE);
settings_show_window(hdlg, IDC_COMBO_CD_SPEED, bus != CDROM_BUS_DISABLED);
settings_show_window(hdlg, IDT_1758, bus != CDROM_BUS_DISABLED);
settings_show_window(hdlg, IDT_CD_SPEED, bus != CDROM_BUS_DISABLED);
if (bus != CDROM_BUS_DISABLED)
settings_set_cur_sel(hdlg, IDC_COMBO_CD_SPEED, temp_cdrom[lv2_current_sel].speed - 1);
switch(bus) {
case CDROM_BUS_ATAPI: /* ATAPI */
settings_show_window(hdlg, IDT_1742, TRUE);
settings_show_window(hdlg, IDT_CD_LUN, TRUE);
settings_show_window(hdlg, IDC_COMBO_CD_CHANNEL_IDE, TRUE);
if (assign_id)
@@ -4247,7 +4248,7 @@ cdrom_recalc_location_controls(HWND hdlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_CD_CHANNEL_IDE, temp_cdrom[lv2_current_sel].ide_channel);
break;
case CDROM_BUS_SCSI: /* SCSI */
settings_show_window(hdlg, IDT_1741, TRUE);
settings_show_window(hdlg, IDT_CD_ID, TRUE);
settings_show_window(hdlg, IDC_COMBO_CD_ID, TRUE);
if (assign_id)
@@ -4307,19 +4308,19 @@ mo_recalc_location_controls(HWND hdlg, int assign_id)
int i = 0;
int bus = temp_mo_drives[lv1_current_sel].bus_type;
for (i = IDT_1771; i < (IDT_1772 + 1); i++)
for (i = IDT_MO_ID; i <= (IDT_MO_CHANNEL); i++)
settings_show_window(hdlg, i, FALSE);
settings_show_window(hdlg, IDC_COMBO_MO_ID, FALSE);
settings_show_window(hdlg, IDC_COMBO_MO_CHANNEL_IDE, FALSE);
settings_show_window(hdlg, IDC_COMBO_MO_TYPE, bus != MO_BUS_DISABLED);
settings_show_window(hdlg, IDT_1773, bus != MO_BUS_DISABLED);
settings_show_window(hdlg, IDT_MO_TYPE, bus != MO_BUS_DISABLED);
if (bus != MO_BUS_DISABLED)
settings_set_cur_sel(hdlg, IDC_COMBO_MO_TYPE, temp_mo_drives[lv1_current_sel].type);
switch(bus) {
case MO_BUS_ATAPI: /* ATAPI */
settings_show_window(hdlg, IDT_1772, TRUE);
settings_show_window(hdlg, IDT_MO_CHANNEL, TRUE);
settings_show_window(hdlg, IDC_COMBO_MO_CHANNEL_IDE, TRUE);
if (assign_id)
@@ -4328,7 +4329,7 @@ mo_recalc_location_controls(HWND hdlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_MO_CHANNEL_IDE, temp_mo_drives[lv1_current_sel].ide_channel);
break;
case MO_BUS_SCSI: /* SCSI */
settings_show_window(hdlg, IDT_1771, TRUE);
settings_show_window(hdlg, IDT_MO_ID, TRUE);
settings_show_window(hdlg, IDC_COMBO_MO_ID, TRUE);
if (assign_id)
@@ -4374,7 +4375,7 @@ zip_recalc_location_controls(HWND hdlg, int assign_id)
int bus = temp_zip_drives[lv2_current_sel].bus_type;
for (i = IDT_1754; i < (IDT_1755 + 1); i++)
for (i = IDT_ZIP_ID; i <= (IDT_ZIP_LUN); i++)
settings_show_window(hdlg, i, FALSE);
settings_show_window(hdlg, IDC_COMBO_ZIP_ID, FALSE);
settings_show_window(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, FALSE);
@@ -4385,7 +4386,7 @@ zip_recalc_location_controls(HWND hdlg, int assign_id)
switch(bus) {
case ZIP_BUS_ATAPI: /* ATAPI */
settings_show_window(hdlg, IDT_1755, TRUE);
settings_show_window(hdlg, IDT_ZIP_LUN, TRUE);
settings_show_window(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, TRUE);
if (assign_id)
@@ -4394,7 +4395,7 @@ zip_recalc_location_controls(HWND hdlg, int assign_id)
settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, temp_zip_drives[lv2_current_sel].ide_channel);
break;
case ZIP_BUS_SCSI: /* SCSI */
settings_show_window(hdlg, IDT_1754, TRUE);
settings_show_window(hdlg, IDT_ZIP_ID, TRUE);
settings_show_window(hdlg, IDC_COMBO_ZIP_ID, TRUE);
if (assign_id)

5
src/win/win_ui.c
View File

@@ -1419,10 +1419,7 @@ ui_init(int nCmdShow)
scrnsz_x = fixed_size_x;
scrnsz_y = fixed_size_y;
}
if (hide_status_bar)
ResizeWindowByClientArea(hwndMain, scrnsz_x, scrnsz_y);
else
ResizeWindowByClientArea(hwndMain, scrnsz_x, scrnsz_y + sbar_height);
ResizeWindowByClientArea(hwnd, scrnsz_x, scrnsz_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height));
}
/* Load the desired language */