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Merge pull request #3148 from jriwanek-forks/more-whitespace

Browse Source 
Yet more clang-formatting
This commit is contained in:
Miran Grča
2023-03-01 05:57:01 +01:00
committed by GitHub
parent 95000ed732 610401de7a
commit 1d972f3308
45 changed files with 1245 additions and 1230 deletions
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80
src/86box.c
View File

@@ -150,47 +150,47 @@ uint64_t instru_run_ms = 0;
/* Configuration values. */
int window_remember;
int vid_resize; /* (C) allow resizing */
int invert_display = 0; /* (C) invert the display */
int suppress_overscan = 0; /* (C) suppress overscans */
int scale = 0; /* (C) screen scale factor */
int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */
int vid_api = 0; /* (C) video renderer */
int vid_cga_contrast = 0; /* (C) video */
int video_fullscreen = 0; /* (C) video */
int video_fullscreen_scale = 0; /* (C) video */
int video_fullscreen_first = 0; /* (C) video */
int enable_overscan = 0; /* (C) video */
int force_43 = 0; /* (C) video */
int video_filter_method = 1; /* (C) video */
int video_vsync = 0; /* (C) video */
int video_framerate = -1; /* (C) video */
char video_shader[512] = { '\0' }; /* (C) video */
int vid_resize; /* (C) allow resizing */
int invert_display = 0; /* (C) invert the display */
int suppress_overscan = 0; /* (C) suppress overscans */
int scale = 0; /* (C) screen scale factor */
int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */
int vid_api = 0; /* (C) video renderer */
int vid_cga_contrast = 0; /* (C) video */
int video_fullscreen = 0; /* (C) video */
int video_fullscreen_scale = 0; /* (C) video */
int video_fullscreen_first = 0; /* (C) video */
int enable_overscan = 0; /* (C) video */
int force_43 = 0; /* (C) video */
int video_filter_method = 1; /* (C) video */
int video_vsync = 0; /* (C) video */
int video_framerate = -1; /* (C) video */
char video_shader[512] = { '\0' }; /* (C) video */
bool serial_passthrough_enabled[SERIAL_MAX] = { 0, 0, 0, 0 }; /* (C) activation and kind of pass-through for serial ports */
int bugger_enabled = 0; /* (C) enable ISAbugger */
int postcard_enabled = 0; /* (C) enable POST card */
int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */
int isartc_type = 0; /* (C) enable ISA RTC card */
int gfxcard[2] = { 0, 0 }; /* (C) graphics/video card */
int show_second_monitors = 1; /* (C) show non-primary monitors */
int sound_is_float = 1; /* (C) sound uses FP values */
int voodoo_enabled = 0; /* (C) video option */
int ibm8514_enabled = 0; /* (C) video option */
int xga_enabled = 0; /* (C) video option */
uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/
uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */
int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */
int cpu = 0; /* (C) cpu type */
int fpu_type = 0; /* (C) fpu type */
int time_sync = 0; /* (C) enable time sync */
int confirm_reset = 1; /* (C) enable reset confirmation */
int confirm_exit = 1; /* (C) enable exit confirmation */
int confirm_save = 1; /* (C) enable save confirmation */
int enable_discord = 0; /* (C) enable Discord integration */
int pit_mode = -1; /* (C) force setting PIT mode */
int fm_driver = 0; /* (C) select FM sound driver */
int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */
int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */
int bugger_enabled = 0; /* (C) enable ISAbugger */
int postcard_enabled = 0; /* (C) enable POST card */
int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */
int isartc_type = 0; /* (C) enable ISA RTC card */
int gfxcard[2] = { 0, 0 }; /* (C) graphics/video card */
int show_second_monitors = 1; /* (C) show non-primary monitors */
int sound_is_float = 1; /* (C) sound uses FP values */
int voodoo_enabled = 0; /* (C) video option */
int ibm8514_enabled = 0; /* (C) video option */
int xga_enabled = 0; /* (C) video option */
uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/
uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */
int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */
int cpu = 0; /* (C) cpu type */
int fpu_type = 0; /* (C) fpu type */
int time_sync = 0; /* (C) enable time sync */
int confirm_reset = 1; /* (C) enable reset confirmation */
int confirm_exit = 1; /* (C) enable exit confirmation */
int confirm_save = 1; /* (C) enable save confirmation */
int enable_discord = 0; /* (C) enable Discord integration */
int pit_mode = -1; /* (C) force setting PIT mode */
int fm_driver = 0; /* (C) select FM sound driver */
int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */
int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */
/* Statistics. */
extern int mmuflush;

6
src/acpi.c
View File

@@ -40,9 +40,9 @@
#include <86box/i2c.h>
#include <86box/video.h>
int acpi_rtc_status = 0;
int acpi_rtc_status = 0;
atomic_int acpi_pwrbut_pressed = 0;
int acpi_enabled = 0;
int acpi_enabled = 0;
static double cpu_to_acpi;
@@ -1520,7 +1520,7 @@ acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi)
}
void
acpi_pwrbtn_timer(void* priv)
acpi_pwrbtn_timer(void *priv)
{
acpi_t *dev = (acpi_t *) priv;

297
src/chipset/ali1429.c
View File

@@ -1,21 +1,21 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
* This file is part of the 86Box distribution.
*
* Implementation of the ALi M1429 chipset.
* Implementation of the ALi M1429 chipset.
*
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020,2021 Tiseno100.
* Copyright 2021,2021 Miran Grca.
* Copyright 2020-2021 Tiseno100.
* Copyright 2021 Miran Grca.
*/
/*
@@ -64,12 +64,12 @@
Register 20h:
Bits 2-1-0: Bus Clock Speed
0 0 0: 7.1519Mhz (ATCLK2)
0 0 1: CLK2IN/4
0 1 0: CLK2IN/5
0 1 1: CLK2IN/6
1 0 0: CLK2IN/8
1 0 1: CLK2IN/10
1 1 0: CLK2IN/12
0 0 1: CLK2IN/4
0 1 0: CLK2IN/5
0 1 1: CLK2IN/6
1 0 0: CLK2IN/8
1 0 1: CLK2IN/10
1 1 0: CLK2IN/12
*/
@@ -94,13 +94,11 @@
#include <86box/smram.h>
#include <86box/chipset.h>
#define GREEN dev->is_g /* Is G Variant */
#define GREEN dev->is_g /* Is G Variant */
#ifdef ENABLE_ALI1429_LOG
int ali1429_do_log = ENABLE_ALI1429_LOG;
static void
ali1429_log(const char *fmt, ...)
{
@@ -113,27 +111,25 @@ ali1429_log(const char *fmt, ...)
}
}
#else
#define ali1429_log(fmt, ...)
# define ali1429_log(fmt, ...)
#endif
typedef struct
{
uint8_t is_g, index, cfg_locked, reg_57h,
regs[90];
uint8_t is_g, index, cfg_locked, reg_57h,
regs[90];
} ali1429_t;
static void
ali1429_shadow_recalc(ali1429_t *dev)
{
uint32_t base, i, can_write, can_read;
shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
for (i = 0; i < 8; i++) {
base = 0xc0000 + (i << 15);
@@ -147,149 +143,151 @@ ali1429_shadow_recalc(ali1429_t *dev)
flushmmucache_nopc();
}
static void
ali1429_write(uint16_t addr, uint8_t val, void *priv)
{
ali1429_t *dev = (ali1429_t *)priv;
ali1429_t *dev = (ali1429_t *) priv;
switch (addr) {
case 0x22:
dev->index = val;
break;
case 0x22:
dev->index = val;
break;
case 0x23:
case 0x23:
#ifdef ENABLE_ALI1429_LOG
if (dev->index != 0x03)
ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
if (dev->index != 0x03)
ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
#endif
if (dev->index == 0x03)
dev->cfg_locked = (val != 0xc5);
if (dev->index == 0x03)
dev->cfg_locked = (val != 0xc5);
if (!dev->cfg_locked) {
pclog("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
if (!dev->cfg_locked) {
pclog("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
/* Common M1429 Registers */
switch (dev->index) {
case 0x10: case 0x11:
dev->regs[dev->index] = val;
break;
/* Common M1429 Registers */
switch (dev->index) {
case 0x10:
case 0x11:
dev->regs[dev->index] = val;
break;
case 0x12:
dev->regs[dev->index] = val;
if(val & 4)
mem_remap_top(128);
else
mem_remap_top(0);
break;
case 0x12:
dev->regs[dev->index] = val;
if (val & 4)
mem_remap_top(128);
else
mem_remap_top(0);
break;
case 0x13: case 0x14:
dev->regs[dev->index] = val;
ali1429_shadow_recalc(dev);
break;
case 0x13:
case 0x14:
dev->regs[dev->index] = val;
ali1429_shadow_recalc(dev);
break;
case 0x15: case 0x16:
case 0x17:
dev->regs[dev->index] = val;
break;
case 0x15:
case 0x16:
case 0x17:
dev->regs[dev->index] = val;
break;
case 0x18:
dev->regs[dev->index] = (val & 0x8f) | 0x20;
cpu_cache_ext_enabled = !!(val & 2);
cpu_update_waitstates();
break;
case 0x18:
dev->regs[dev->index] = (val & 0x8f) | 0x20;
cpu_cache_ext_enabled = !!(val & 2);
cpu_update_waitstates();
break;
case 0x19: case 0x1a:
case 0x1e:
dev->regs[dev->index] = val;
break;
case 0x19:
case 0x1a:
case 0x1e:
dev->regs[dev->index] = val;
break;
case 0x20:
dev->regs[dev->index] = val;
case 0x20:
dev->regs[dev->index] = val;
switch(val & 7) {
case 0: case 7: /* Illegal */
cpu_set_isa_speed(7159091);
break;
switch (val & 7) {
case 0:
case 7: /* Illegal */
cpu_set_isa_speed(7159091);
break;
case 1:
cpu_set_isa_speed(cpu_busspeed / 4);
break;
case 1:
cpu_set_isa_speed(cpu_busspeed / 4);
break;
case 2:
cpu_set_isa_speed(cpu_busspeed / 5);
break;
case 2:
cpu_set_isa_speed(cpu_busspeed / 5);
break;
case 3:
cpu_set_isa_speed(cpu_busspeed / 6);
break;
case 3:
cpu_set_isa_speed(cpu_busspeed / 6);
break;
case 4:
cpu_set_isa_speed(cpu_busspeed / 8);
break;
case 4:
cpu_set_isa_speed(cpu_busspeed / 8);
break;
case 5:
cpu_set_isa_speed(cpu_busspeed / 10);
break;
case 5:
cpu_set_isa_speed(cpu_busspeed / 10);
break;
case 6:
cpu_set_isa_speed(cpu_busspeed / 12);
break;
}
break;
case 6:
cpu_set_isa_speed(cpu_busspeed / 12);
break;
}
break;
case 0x21 ... 0x27:
dev->regs[dev->index] = val;
break;
}
case 0x21 ... 0x27:
dev->regs[dev->index] = val;
break;
}
/* M1429G Only Registers */
if (GREEN) {
switch (dev->index) {
case 0x30 ... 0x41:
case 0x43: case 0x45:
case 0x4a:
dev->regs[dev->index] = val;
break;
/* M1429G Only Registers */
if (GREEN) {
switch (dev->index) {
case 0x30 ... 0x41:
case 0x43:
case 0x45:
case 0x4a:
dev->regs[dev->index] = val;
break;
case 0x57:
dev->reg_57h = val;
break;
}
}
}
break;
case 0x57:
dev->reg_57h = val;
break;
}
}
}
break;
}
}
static uint8_t
ali1429_read(uint16_t addr, void *priv)
{
ali1429_t *dev = (ali1429_t *)priv;
uint8_t ret = 0xff;
ali1429_t *dev = (ali1429_t *) priv;
uint8_t ret = 0xff;
if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a))
ret = dev->regs[dev->index];
ret = dev->regs[dev->index];
else if ((addr == 0x23) && (dev->index == 0x57))
ret = dev->reg_57h;
ret = dev->reg_57h;
else if (addr == 0x22)
ret = dev->index;
ret = dev->index;
return ret;
}
static void
ali1429_close(void *priv)
{
ali1429_t *dev = (ali1429_t *)priv;
ali1429_t *dev = (ali1429_t *) priv;
free(dev);
}
static void
ali1429_defaults(ali1429_t *dev)
{
@@ -308,28 +306,27 @@ ali1429_defaults(ali1429_t *dev)
/* M1429G Default Registers */
if (GREEN) {
dev->regs[0x31] = 0x88;
dev->regs[0x32] = 0xc0;
dev->regs[0x38] = 0xe5;
dev->regs[0x40] = 0xe3;
dev->regs[0x41] = 2;
dev->regs[0x45] = 0x80;
dev->regs[0x31] = 0x88;
dev->regs[0x32] = 0xc0;
dev->regs[0x38] = 0xe5;
dev->regs[0x40] = 0xe3;
dev->regs[0x41] = 2;
dev->regs[0x45] = 0x80;
}
}
static void *
ali1429_init(const device_t *info)
{
ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t));
ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t));
memset(dev, 0, sizeof(ali1429_t));
dev->cfg_locked = 1;
GREEN = info->local;
GREEN = info->local;
/* M1429 Ports:
22h Index Port
23h Data Port
22h Index Port
23h Data Port
*/
io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
@@ -341,29 +338,29 @@ ali1429_init(const device_t *info)
}
const device_t ali1429_device = {
.name = "ALi M1429",
.name = "ALi M1429",
.internal_name = "ali1429",
.flags = 0,
.local = 0,
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
.flags = 0,
.local = 0,
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
.force_redraw = NULL,
.config = NULL
};
const device_t ali1429g_device = {
.name = "ALi M1429G",
.name = "ALi M1429G",
.internal_name = "ali1429g",
.flags = 0,
.local = 1,
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
.flags = 0,
.local = 1,
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
.force_redraw = NULL,
.config = NULL
};

250
src/chipset/ali1435.c
View File

@@ -38,138 +38,132 @@
#include <86box/chipset.h>
#include <86box/spd.h>
#define MEM_STATE_SHADOW_R 0x01
#define MEM_STATE_SHADOW_W 0x02
#define MEM_STATE_SMRAM 0x04
#define MEM_STATE_SHADOW_R 0x01
#define MEM_STATE_SHADOW_W 0x02
#define MEM_STATE_SMRAM 0x04
typedef struct
{
uint8_t index, cfg_locked,
regs[16], pci_regs[256];
uint8_t index, cfg_locked,
regs[16], pci_regs[256];
} ali1435_t;
#define ENABLE_ALI1435_LOG 1
#ifdef ENABLE_ALI1435_LOG
int ali1435_do_log = ENABLE_ALI1435_LOG;
static void
ali1435_log(const char *fmt, ...)
{
va_list ap;
if (ali1435_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define ali1435_log(fmt, ...)
# define ali1435_log(fmt, ...)
#endif
/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter
when the most siginificant bit is set. We work around that by manipulating the
emulated PIC's ELCR register. */
when the most siginificant bit is set. We work around that by manipulating the
emulated PIC's ELCR register. */
static void
ali1435_update_irqs(ali1435_t *dev, int set)
{
uint8_t val;
int i, reg;
int shift, irq;
int irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
pic_t *temp_pic;
int i, reg;
int shift, irq;
int irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
pic_t *temp_pic;
for (i = 0; i < 4; i++) {
reg = 0x80 + (i >> 1);
shift = (i & 1) << 2;
val = (dev->pci_regs[reg] >> shift) & 0x0f;
irq = irq_map[val & 0x07];
if (irq == -1)
continue;
temp_pic = (irq >= 8) ? &pic2 : &pic;
irq &= 7;
if (set && (val & 0x08))
temp_pic->elcr |= (1 << irq);
else
temp_pic->elcr &= ~(1 << irq);
reg = 0x80 + (i >> 1);
shift = (i & 1) << 2;
val = (dev->pci_regs[reg] >> shift) & 0x0f;
irq = irq_map[val & 0x07];
if (irq == -1)
continue;
temp_pic = (irq >= 8) ? &pic2 : &pic;
irq &= 7;
if (set && (val & 0x08))
temp_pic->elcr |= (1 << irq);
else
temp_pic->elcr &= ~(1 << irq);
}
}
static void
ali1435_pci_write(int func, int addr, uint8_t val, void *priv)
{
ali1435_t *dev = (ali1435_t *) priv;
int irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
int irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 };
ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val);
if (func > 0)
return;
return;
if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b)))
return;
return;
if ((addr >= 0x0f) && (addr < 0x30))
return;
return;
if ((addr >= 0x34) && (addr < 0x40))
return;
return;
switch (addr) {
/* Dummy PCI Config */
case 0x04:
dev->pci_regs[addr] = (val & 0x7f) | 0x07;
break;
/* Dummy PCI Config */
case 0x04:
dev->pci_regs[addr] = (val & 0x7f) | 0x07;
break;
case 0x05:
dev->pci_regs[addr] = (val & 0x01);
break;
case 0x05:
dev->pci_regs[addr] = (val & 0x01);
break;
/* Dummy PCI Status */
case 0x07:
dev->pci_regs[addr] &= ~(val & 0xb8);
break;
/* Dummy PCI Status */
case 0x07:
dev->pci_regs[addr] &= ~(val & 0xb8);
break;
case 0x80: case 0x81:
dev->pci_regs[addr] = val;
ali1435_update_irqs(dev, 0);
irq = irq_map[val & 0x07];
if (irq >= 0) {
ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
} else {
ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
}
irq = irq_map[(val >> 4) & 0x07];
if (irq >= 0) {
ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
} else {
ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
}
ali1435_update_irqs(dev, 1);
break;
case 0x80:
case 0x81:
dev->pci_regs[addr] = val;
ali1435_update_irqs(dev, 0);
irq = irq_map[val & 0x07];
if (irq >= 0) {
ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq);
pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq);
} else {
ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1));
pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
}
irq = irq_map[(val >> 4) & 0x07];
if (irq >= 0) {
ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq);
pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq);
} else {
ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1));
pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED);
}
ali1435_update_irqs(dev, 1);
break;
default:
dev->pci_regs[addr] = val;
break;
default:
dev->pci_regs[addr] = val;
break;
}
}
static uint8_t
ali1435_pci_read(int func, int addr, void *priv)
{
ali1435_t *dev = (ali1435_t *) priv;
uint8_t ret;
uint8_t ret;
ret = 0xff;
@@ -181,68 +175,65 @@ ali1435_pci_read(int func, int addr, void *priv)
return ret;
}
static void
ali1435_write(uint16_t addr, uint8_t val, void *priv)
{
ali1435_t *dev = (ali1435_t *)priv;
ali1435_t *dev = (ali1435_t *) priv;
switch (addr) {
case 0x22:
dev->index = val;
break;
case 0x22:
dev->index = val;
break;
case 0x23:
/* #ifdef ENABLE_ALI1435_LOG
if (dev->index != 0x03)
ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
#endif */
case 0x23:
/* #ifdef ENABLE_ALI1435_LOG
if (dev->index != 0x03)
ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
#endif */
if (dev->index == 0x03)
dev->cfg_locked = (val != 0x69);
if (dev->index == 0x03)
dev->cfg_locked = (val != 0x69);
if (!dev->cfg_locked) {
pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
if (!dev->cfg_locked) {
pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val);
switch (dev->index) {
/* PCI Mechanism select? */
case 0x00:
dev->regs[dev->index] = val;
pclog("PMC = %i\n", val != 0xc8);
pci_set_pmc(val != 0xc8);
break;
switch (dev->index) {
/* PCI Mechanism select? */
case 0x00:
dev->regs[dev->index] = val;
pclog("PMC = %i\n", val != 0xc8);
pci_set_pmc(val != 0xc8);
break;
/* ???? */
case 0x06:
dev->regs[dev->index] = val;
break;
/* ???? */
case 0x06:
dev->regs[dev->index] = val;
break;
/* ???? */
case 0x07:
dev->regs[dev->index] = val;
break;
}
}
break;
/* ???? */
case 0x07:
dev->regs[dev->index] = val;
break;
}
}
break;
}
}
static uint8_t
ali1435_read(uint16_t addr, void *priv)
{
ali1435_t *dev = (ali1435_t *)priv;
uint8_t ret = 0xff;
ali1435_t *dev = (ali1435_t *) priv;
uint8_t ret = 0xff;
if ((addr == 0x23) && (dev->index < 0x10))
ret = dev->regs[dev->index];
ret = dev->regs[dev->index];
else if (addr == 0x22)
ret = dev->index;
ret = dev->index;
return ret;
}
static void
ali1435_reset(void *priv)
{
@@ -258,13 +249,16 @@ ali1435_reset(void *priv)
memset(dev->pci_regs, 0, 256);
dev->pci_regs[0x00] = 0x25; dev->pci_regs[0x01] = 0x10; /*ALi*/
dev->pci_regs[0x02] = 0x35; dev->pci_regs[0x03] = 0x14; /*M1435*/
dev->pci_regs[0x00] = 0x25;
dev->pci_regs[0x01] = 0x10; /*ALi*/
dev->pci_regs[0x02] = 0x35;
dev->pci_regs[0x03] = 0x14; /*M1435*/
dev->pci_regs[0x04] = 0x07;
dev->pci_regs[0x07] = 0x04;
dev->pci_regs[0x0b] = 0x06;
dev->pci_regs[0x80] = 0x80; dev->pci_regs[0x81] = 0x00;
dev->pci_regs[0x80] = 0x80;
dev->pci_regs[0x81] = 0x00;
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
@@ -272,16 +266,14 @@ ali1435_reset(void *priv)
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
}
static void
ali1435_close(void *p)
{
ali1435_t *dev = (ali1435_t *)p;
ali1435_t *dev = (ali1435_t *) p;
free(dev);
}
static void *
ali1435_init(const device_t *info)
{
@@ -291,8 +283,8 @@ ali1435_init(const device_t *info)
dev->cfg_locked = 1;
/* M1435 Ports:
22h Index Port
23h Data Port
22h Index Port
23h Data Port
*/
io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev);
@@ -309,15 +301,15 @@ ali1435_init(const device_t *info)
}
const device_t ali1435_device = {
.name = "Intel ALi M1435",
.name = "Intel ALi M1435",
.internal_name = "ali1435",
.flags = DEVICE_PCI,
.local = 0x00,
.init = ali1435_init,
.close = ali1435_close,
.reset = ali1435_reset,
.flags = DEVICE_PCI,
.local = 0x00,
.init = ali1435_init,
.close = ali1435_close,
.reset = ali1435_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
.force_redraw = NULL,
.config = NULL
};

66
src/chipset/ali6117.c
View File

@@ -46,38 +46,40 @@ typedef struct ali6117_t {
/* Total size, Bank 0 size, Bank 1 size, Bank 2 size, Bank 3 size. */
static uint32_t ali6117_modes[32][5] = {
{ 1024, 512, 512, 0, 0 },
{ 2048, 512, 512, 512, 512 },
{ 3072, 512, 512, 2048, 0 },
{ 5120, 512, 512, 2048, 2048 },
{ 9216, 512, 512, 8192, 0 },
{ 1024, 1024, 0, 0, 0 },
{ 2048, 1024, 1024, 0, 0 },
{ 4096, 1024, 1024, 2048, 0 },
{ 6144, 1024, 1024, 2048, 2048 },
{ 10240, 1024, 1024, 8192, 0 },
{ 18432, 1024, 1024, 8192, 8192 },
{ 3072, 1024, 2048, 0, 0 },
{ 5120, 1024, 2048, 2048, 0 },
{ 9216, 1024, 8192, 0, 0 },
{ 2048, 2048, 0, 0, 0 },
{ 4096, 2048, 2048, 0, 0 },
{ 6144, 2048, 2048, 2048, 0 },
{ 8192, 2048, 2048, 2048, 2048 },
{ 12288, 2048, 2048, 8192, 0 },
{ 20480, 2048, 2048, 8192, 8192 },
{ 10240, 2048, 8192, 0, 0 },
{ 18432, 2048, 8192, 8192, 0 },
{ 26624, 2048, 8192, 8192, 8192 },
{ 4096, 4096, 0, 0, 0 },
{ 8192, 4096, 4096, 0, 0 },
{ 24576, 4096, 4096, 8192, 8192 },
{ 12288, 4096, 8192, 0, 0 },
{ 8192, 8192, 0, 0, 0 },
{ 16384, 8192, 8192, 0, 0 },
{ 24576, 8192, 8192, 8192, 0 },
{ 32768, 8192, 8192, 8192, 8192 },
{ 65536, 32768, 32768, 0, 0 }
// clang-format off
{ 1024, 512, 512, 0, 0 },
{ 2048, 512, 512, 512, 512 },
{ 3072, 512, 512, 2048, 0 },
{ 5120, 512, 512, 2048, 2048 },
{ 9216, 512, 512, 8192, 0 },
{ 1024, 1024, 0, 0, 0 },
{ 2048, 1024, 1024, 0, 0 },
{ 4096, 1024, 1024, 2048, 0 },
{ 6144, 1024, 1024, 2048, 2048 },
{ 10240, 1024, 1024, 8192, 0 },
{ 18432, 1024, 1024, 8192, 8192 },
{ 3072, 1024, 2048, 0, 0 },
{ 5120, 1024, 2048, 2048, 0 },
{ 9216, 1024, 8192, 0, 0 },
{ 2048, 2048, 0, 0, 0 },
{ 4096, 2048, 2048, 0, 0 },
{ 6144, 2048, 2048, 2048, 0 },
{ 8192, 2048, 2048, 2048, 2048 },
{ 12288, 2048, 2048, 8192, 0 },
{ 20480, 2048, 2048, 8192, 8192 },
{ 10240, 2048, 8192, 0, 0 },
{ 18432, 2048, 8192, 8192, 0 },
{ 26624, 2048, 8192, 8192, 8192 },
{ 4096, 4096, 0, 0, 0 },
{ 8192, 4096, 4096, 0, 0 },
{ 24576, 4096, 4096, 8192, 8192 },
{ 12288, 4096, 8192, 0, 0 },
{ 8192, 8192, 0, 0, 0 },
{ 16384, 8192, 8192, 0, 0 },
{ 24576, 8192, 8192, 8192, 0 },
{ 32768, 8192, 8192, 8192, 8192 },
{ 65536, 32768, 32768, 0, 0 }
// clang-format on
};
#ifdef ENABLE_ALI6117_LOG

12
src/chipset/scat.c
View File

@@ -84,16 +84,20 @@ typedef struct scat_t {
} scat_t;
static const uint8_t max_map[32] = {
// clang-format off
0, 1, 1, 1, 2, 3, 4, 8,
4, 8, 12, 16, 20, 24, 28, 32,
0, 5, 9, 13, 6, 10, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0
// clang-format om
};
static const uint8_t max_map_sx[32] = {
0, 1, 2, 1, 3, 4, 6, 10,
5, 9, 13, 4, 8, 12, 16, 14,
18, 22, 26, 20, 24, 28, 32, 18,
20, 32, 0, 0, 0, 0, 0, 0
// clang-format off
0, 1, 2, 1, 3, 4, 6, 10,
5, 9, 13, 4, 8, 12, 16, 14,
18, 22, 26, 20, 24, 28, 32, 18,
20, 32, 0, 0, 0, 0, 0, 0
// clang-format om
};
static const uint8_t scatsx_external_is_RAS[33] = {
0, 0, 0, 0, 0, 0, 0, 0,

206
src/chipset/sis_85c50x.c
View File

@@ -135,89 +135,90 @@ sis_85c50x_smm_recalc(sis_85c50x_t *dev)
static void
sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
{
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
sis_85c50x_log("85C501: [W] (%02X, %02X) = %02X\n", func, addr, val);
if (func == 0x00) switch (addr) {
case 0x04: /* Command - low byte */
dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xb4) | (val & 0x4b);
break;
case 0x07: /* Status - high byte */
dev->pci_conf[addr] = ((dev->pci_conf[addr] & 0xf9) & ~(val & 0xf8)) | (val & 0x06);
break;
case 0x50:
dev->pci_conf[addr] = val;
break;
case 0x51: /* Cache */
dev->pci_conf[addr] = val;
cpu_cache_ext_enabled = (val & 0x40);
cpu_update_waitstates();
break;
case 0x52:
dev->pci_conf[addr] = val;
break;
case 0x53: /* Shadow RAM */
case 0x54:
case 0x55:
case 0x56:
dev->pci_conf[addr] = val;
sis_85c50x_shadow_recalc(dev);
if (addr == 0x54)
if (func == 0x00)
switch (addr) {
case 0x04: /* Command - low byte */
dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xb4) | (val & 0x4b);
break;
case 0x07: /* Status - high byte */
dev->pci_conf[addr] = ((dev->pci_conf[addr] & 0xf9) & ~(val & 0xf8)) | (val & 0x06);
break;
case 0x50:
dev->pci_conf[addr] = val;
break;
case 0x51: /* Cache */
dev->pci_conf[addr] = val;
cpu_cache_ext_enabled = (val & 0x40);
cpu_update_waitstates();
break;
case 0x52:
dev->pci_conf[addr] = val;
break;
case 0x53: /* Shadow RAM */
case 0x54:
case 0x55:
case 0x56:
dev->pci_conf[addr] = val;
sis_85c50x_shadow_recalc(dev);
if (addr == 0x54)
sis_85c50x_smm_recalc(dev);
break;
case 0x57:
case 0x58:
case 0x59:
case 0x5a:
case 0x5c:
case 0x5d:
case 0x5e:
case 0x61:
case 0x62:
case 0x63:
case 0x67:
case 0x68:
case 0x6a:
case 0x6b:
case 0x6c:
case 0x6d:
case 0x6e:
case 0x6f:
dev->pci_conf[addr] = val;
break;
case 0x5f:
dev->pci_conf[addr] = val & 0xfe;
break;
case 0x5b:
dev->pci_conf[addr] = val;
break;
case 0x60: /* SMI */
if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) {
dev->pci_conf[0x69] |= 0x01;
smi_raise();
}
dev->pci_conf[addr] = val & 0x3e;
break;
case 0x64: /* SMRAM */
case 0x65:
dev->pci_conf[addr] = val;
sis_85c50x_smm_recalc(dev);
break;
case 0x57:
case 0x58:
case 0x59:
case 0x5a:
case 0x5c:
case 0x5d:
case 0x5e:
case 0x61:
case 0x62:
case 0x63:
case 0x67:
case 0x68:
case 0x6a:
case 0x6b:
case 0x6c:
case 0x6d:
case 0x6e:
case 0x6f:
dev->pci_conf[addr] = val;
break;
case 0x5f:
dev->pci_conf[addr] = val & 0xfe;
break;
case 0x5b:
dev->pci_conf[addr] = val;
break;
case 0x60: /* SMI */
if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) {
dev->pci_conf[0x69] |= 0x01;
smi_raise();
}
dev->pci_conf[addr] = val & 0x3e;
break;
case 0x64: /* SMRAM */
case 0x65:
dev->pci_conf[addr] = val;
sis_85c50x_smm_recalc(dev);
break;
case 0x66:
dev->pci_conf[addr] = (val & 0x7f);
break;
case 0x69:
dev->pci_conf[addr] &= ~(val);
break;
}
break;
case 0x66:
dev->pci_conf[addr] = (val & 0x7f);
break;
case 0x69:
dev->pci_conf[addr] &= ~(val);
break;
}
}
static uint8_t
sis_85c50x_read(int func, int addr, void *priv)
{
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
if (func == 0x00)
ret = dev->pci_conf[addr];
@@ -234,41 +235,42 @@ sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv)
sis_85c50x_log("85C503: [W] (%02X, %02X) = %02X\n", func, addr, val);
if (func == 0x00) switch (addr) {
case 0x04: /* Command */
dev->pci_conf_sb[addr] = val & 0x0f;
break;
case 0x07: /* Status */
dev->pci_conf_sb[addr] &= ~(val & 0x30);
break;
case 0x40: /* BIOS Control Register */
dev->pci_conf_sb[addr] = val & 0x3f;
break;
case 0x41:
case 0x42:
case 0x43:
case 0x44:
/* INTA/B/C/D# Remapping Control Register */
dev->pci_conf_sb[addr] = val & 0x8f;
if (val & 0x80)
pci_set_irq_routing(PCI_INTA + (addr - 0x41), PCI_IRQ_DISABLED);
else
pci_set_irq_routing(PCI_INTA + (addr - 0x41), val & 0xf);
break;
case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */
case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */
case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */
case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */
dev->pci_conf_sb[addr] = val;
break;
}
if (func == 0x00)
switch (addr) {
case 0x04: /* Command */
dev->pci_conf_sb[addr] = val & 0x0f;
break;
case 0x07: /* Status */
dev->pci_conf_sb[addr] &= ~(val & 0x30);
break;
case 0x40: /* BIOS Control Register */
dev->pci_conf_sb[addr] = val & 0x3f;
break;
case 0x41:
case 0x42:
case 0x43:
case 0x44:
/* INTA/B/C/D# Remapping Control Register */
dev->pci_conf_sb[addr] = val & 0x8f;
if (val & 0x80)
pci_set_irq_routing(PCI_INTA + (addr - 0x41), PCI_IRQ_DISABLED);
else
pci_set_irq_routing(PCI_INTA + (addr - 0x41), val & 0xf);
break;
case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */
case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */
case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */
case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */
dev->pci_conf_sb[addr] = val;
break;
}
}
static uint8_t
sis_85c50x_sb_read(int func, int addr, void *priv)
{
sis_85c50x_t *dev = (sis_85c50x_t *) priv;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
if (func == 0x00)
ret = dev->pci_conf_sb[addr];

6
src/config.c
View File

@@ -857,7 +857,7 @@ load_ports(void)
serial_passthrough_enabled[c] = !!ini_section_get_int(cat, temp, 0);
if (serial_passthrough_enabled[c])
config_log("Serial Port %d: passthrough enabled.\n\n", c+1);
config_log("Serial Port %d: passthrough enabled.\n\n", c + 1);
}
for (c = 0; c < PARALLEL_MAX; c++) {
@@ -2345,7 +2345,7 @@ save_input_devices(void)
} else {
ini_section_delete_var(cat, "tablet_tool_type");
}
ini_delete_section_if_empty(config, cat);
}
@@ -2540,7 +2540,7 @@ save_storage_controllers(void)
ini_section_delete_var(cat, "cdrom_interface");
else
ini_section_set_string(cat, "cdrom_interface",
cdrom_interface_get_internal_name(cdrom_interface_current));
cdrom_interface_get_internal_name(cdrom_interface_current));
if (ide_ter_enabled == 0)
ini_section_delete_var(cat, "ide_ter");

10
src/device.c
View File

@@ -92,7 +92,7 @@ device_set_context(device_context_t *c, const device_t *d, int inst)
void *sec, *single_sec;
memset(c, 0, sizeof(device_context_t));
c->dev = d;
c->dev = d;
c->instance = inst;
if (inst) {
sprintf(c->name, "%s #%i", d->name, inst);
@@ -135,7 +135,7 @@ device_context_restore(void)
}
static void *
device_add_common(const device_t *d, const device_t *cd, void *p, void* params, int inst)
device_add_common(const device_t *d, const device_t *cd, void *p, void *params, int inst)
{
void *priv = NULL;
int c;
@@ -203,7 +203,7 @@ device_add(const device_t *d)
}
void *
device_add_parameters(const device_t *d, void* params)
device_add_parameters(const device_t *d, void *params)
{
return device_add_common(d, d, NULL, params, 0);
}
@@ -216,7 +216,7 @@ device_add_ex(const device_t *d, void *priv)
}
void
device_add_ex_parameters(const device_t *d, void* priv, void *params)
device_add_ex_parameters(const device_t *d, void *priv, void *params)
{
device_add_common(d, d, priv, params, 0);
}
@@ -293,7 +293,7 @@ device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst)
}
void
device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void* params)
device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void *params)
{
device_add_common(d, cd, priv, params, inst);
}

4
src/device/isartc.c
View File

@@ -88,7 +88,7 @@
#define ISARTC_A6PAK 3
#define ISARTC_VENDEX 4
#define ISARTC_DEBUG 0
#define ISARTC_DEBUG 0
typedef struct {
const char *name; /* board name */
@@ -572,7 +572,7 @@ isartc_init(const device_t *info)
dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev);
/* Hook into the NVR backend. */
dev->nvr.fn = (char *)info->internal_name;
dev->nvr.fn = (char *) info->internal_name;
dev->nvr.irq = dev->irq;
if (!is_at)
nvr_init(&dev->nvr);

5
src/device/mouse.c
View File

@@ -40,11 +40,10 @@ int mouse_x,
mouse_buttons,
mouse_mode,
mouse_tablet_in_proximity = 0,
tablet_tool_type = 1; /* 0 = Puck/Cursor, 1 = Pen */
tablet_tool_type = 1; /* 0 = Puck/Cursor, 1 = Pen */
double mouse_x_abs,
mouse_y_abs;
mouse_y_abs;
static const device_t mouse_none_device = {
.name = "None",

2
src/device/mouse_serial.c
View File

@@ -511,7 +511,7 @@ sermouse_command_timer(void *priv)
}
static int
sermouse_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
sermouse_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
{
mouse_t *dev = (mouse_t *) priv;

202
src/device/mouse_wacom_tablet.c
View File

@@ -10,10 +10,9 @@
#include <86box/serial.h>
#include <86box/plat.h>
#define FLAG_3BTN 0x20 /* enable 3-button mode */
#define FLAG_3BTN 0x20 /* enable 3-button mode */
enum wacom_modes
{
enum wacom_modes {
WACOM_MODE_SUPPRESSED = 0,
WACOM_MODE_POINT = 1,
WACOM_MODE_STREAM = 2,
@@ -36,7 +35,7 @@ typedef struct {
int abs_x, abs_y,
rel_x, rel_y,
oldb, b;
int data_pos, data_rec_pos, mode, transmission_ongoing, transmission_format, interval;
int increment, suppressed_increment;
int transmission_stopped;
@@ -46,8 +45,8 @@ typedef struct {
int suppressed, measurement, always_report;
int remote_req, remote_mode;
int last_abs_x, last_abs_y; /* Suppressed/Increment Mode. */
uint32_t settings; /* Settings DWORD */
int last_abs_x, last_abs_y; /* Suppressed/Increment Mode. */
uint32_t settings; /* Settings DWORD */
double transmit_period;
double old_tsc, reset_tsc;
@@ -59,8 +58,8 @@ typedef struct {
static double
wacom_transmit_period(mouse_wacom_t *dev, int bps, int rps)
{
double dbps = (double) bps;
double temp = 0.0;
double dbps = (double) bps;
double temp = 0.0;
int word_len = 10;
if (rps == -1)
@@ -76,22 +75,22 @@ wacom_transmit_period(mouse_wacom_t *dev, int bps, int rps)
}
static void
wacom_reset(mouse_wacom_t* wacom)
wacom_reset(mouse_wacom_t *wacom)
{
wacom->transmit_period = wacom_transmit_period(wacom, 9600, -1);
wacom->mode = WACOM_MODE_POINT;
wacom->data_pos = 0;
wacom->transmit_period = wacom_transmit_period(wacom, 9600, -1);
wacom->mode = WACOM_MODE_POINT;
wacom->data_pos = 0;
wacom->transmission_ongoing = 0;
wacom->mode = 0;
wacom->mode = 0;
wacom->transmission_stopped = 0;
wacom->interval = 0;
wacom->transmit_id = 0;
wacom->format = 0; /* ASCII */
wacom->measurement = 1;
wacom->interval = 0;
wacom->transmit_id = 0;
wacom->format = 0; /* ASCII */
wacom->measurement = 1;
wacom->increment = wacom->suppressed_increment = 0;
wacom->reset_tsc = tsc;
wacom->reset_tsc = tsc;
wacom->remote_mode = wacom->remote_req = 0;
wacom->always_report = 0;
wacom->always_report = 0;
mouse_mode = 1;
}
@@ -99,7 +98,7 @@ wacom_reset(mouse_wacom_t* wacom)
static void
wacom_callback(struct serial_s *serial, void *priv)
{
mouse_wacom_t* wacom = (mouse_wacom_t*)priv;
mouse_wacom_t *wacom = (mouse_wacom_t *) priv;
wacom->transmit_period = wacom_transmit_period(wacom, 9600, -1);
timer_stop(&wacom->report_timer);
@@ -109,8 +108,8 @@ wacom_callback(struct serial_s *serial, void *priv)
static void
wacom_write(struct serial_s *serial, void *priv, uint8_t data)
{
mouse_wacom_t* wacom = (mouse_wacom_t*)priv;
static int special_command = 0;
mouse_wacom_t *wacom = (mouse_wacom_t *) priv;
static int special_command = 0;
if (data == '~') {
special_command = 1;
@@ -119,17 +118,18 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data)
if (special_command) {
switch (data) {
case '#':
{
if (!wacom->transmission_ongoing) wacom->transmit_id++;
break;
}
{
if (!wacom->transmission_ongoing)
wacom->transmit_id++;
break;
}
}
special_command = 0;
return;
}
if (data == '@') {
wacom->remote_req = 1;
wacom->remote_req = 1;
wacom->remote_mode = 1;
return;
}
@@ -144,41 +144,44 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data)
}
wacom->data_rec[wacom->data_rec_pos++] = data;
if (data == '\r' || data == '\n') {
wacom->data_rec[wacom->data_rec_pos] = 0;
wacom->data_rec_pos = 0;
wacom->data_rec[wacom->data_rec_pos] = 0;
wacom->data_rec_pos = 0;
if (data == '\n') pclog("Wacom: written %s", wacom->data_rec);
else pclog("Wacom: written %s\n", wacom->data_rec);
if (data == '\n')
pclog("Wacom: written %s", wacom->data_rec);
else
pclog("Wacom: written %s\n", wacom->data_rec);
if (!memcmp(wacom->data_rec, "AS", 2)) {
wacom->format = (wacom->data_rec[2] == '1');
wacom->format = (wacom->data_rec[2] == '1');
wacom->transmission_ongoing = 0;
} else if (!memcmp(wacom->data_rec, "SR", 2)) {
wacom->mode = WACOM_MODE_STREAM;
wacom->mode = WACOM_MODE_STREAM;
wacom->suppressed_increment = 0;
} else if (!memcmp(wacom->data_rec, "IN", 2)) {
sscanf((const char*)wacom->data_rec, "IN%d", &wacom->increment);
sscanf((const char *) wacom->data_rec, "IN%d", &wacom->increment);
} else if (!memcmp(wacom->data_rec, "RE", 2) || wacom->data_rec[0] == '$' || wacom->data_rec[0] == '#') {
wacom_reset(wacom);
} else if (!memcmp(wacom->data_rec, "IT", 2)) {
sscanf((const char*)wacom->data_rec, "IT%d", &wacom->interval);
sscanf((const char *) wacom->data_rec, "IT%d", &wacom->interval);
} else if (!memcmp(wacom->data_rec, "DE", 2)) {
sscanf((const char*)wacom->data_rec, "DE%d", &mouse_mode);
sscanf((const char *) wacom->data_rec, "DE%d", &mouse_mode);
mouse_mode = !mouse_mode;
plat_mouse_capture(0);
} else if (!memcmp(wacom->data_rec, "SU", 2)) {
sscanf((const char*)wacom->data_rec, "SU%d", &wacom->suppressed_increment);
sscanf((const char *) wacom->data_rec, "SU%d", &wacom->suppressed_increment);
} else if (!memcmp(wacom->data_rec, "PH", 2)) {
sscanf((const char*)wacom->data_rec, "PH%d", &wacom->pressure_mode);
sscanf((const char *) wacom->data_rec, "PH%d", &wacom->pressure_mode);
} else if (!memcmp(wacom->data_rec, "IC", 2)) {
sscanf((const char*)wacom->data_rec, "IC%d", &wacom->measurement);
sscanf((const char *) wacom->data_rec, "IC%d", &wacom->measurement);
} else if (!memcmp(wacom->data_rec, "AL", 2)) {
sscanf((const char*)wacom->data_rec, "AL%d", &wacom->always_report);
sscanf((const char *) wacom->data_rec, "AL%d", &wacom->always_report);
} else if (!memcmp(wacom->data_rec, "RQ", 2)) {
sscanf((const char*)wacom->data_rec, "RQ%d", &wacom->remote_mode);
if (wacom->remote_mode) wacom->remote_req = 1;
sscanf((const char *) wacom->data_rec, "RQ%d", &wacom->remote_mode);
if (wacom->remote_mode)
wacom->remote_req = 1;
} else if (!memcmp(wacom->data_rec, "SP", 2)) {
wacom->transmission_stopped = 1;
} else if (!memcmp(wacom->data_rec, "ST", 2)){
} else if (!memcmp(wacom->data_rec, "ST", 2)) {
wacom->transmission_stopped = 0;
wacom->remote_mode = wacom->remote_req = 0;
}
@@ -188,16 +191,21 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data)
static int
wacom_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
{
mouse_wacom_t* wacom = (mouse_wacom_t*)priv;
wacom->abs_x = abs_x * (wacom->measurement ? 4566. : 5800.);
wacom->abs_y = abs_y * (wacom->measurement ? 2972. : 3774.);
if (wacom->abs_x > (wacom->measurement ? 4566 : 5800)) wacom->abs_x = (wacom->measurement ? 4566 : 5800);
if (wacom->abs_y > (wacom->measurement ? 2972 : 3774)) wacom->abs_x = (wacom->measurement ? 2972 : 3774);
if (wacom->abs_x < 0) wacom->abs_x = 0;
if (wacom->abs_y < 0) wacom->abs_y = 0;
mouse_wacom_t *wacom = (mouse_wacom_t *) priv;
wacom->abs_x = abs_x * (wacom->measurement ? 4566. : 5800.);
wacom->abs_y = abs_y * (wacom->measurement ? 2972. : 3774.);
if (wacom->abs_x > (wacom->measurement ? 4566 : 5800))
wacom->abs_x = (wacom->measurement ? 4566 : 5800);
if (wacom->abs_y > (wacom->measurement ? 2972 : 3774))
wacom->abs_x = (wacom->measurement ? 2972 : 3774);
if (wacom->abs_x < 0)
wacom->abs_x = 0;
if (wacom->abs_y < 0)
wacom->abs_y = 0;
wacom->rel_x = x;
wacom->rel_y = y;
if (wacom->b != b) wacom->oldb = wacom->b;
if (wacom->b != b)
wacom->oldb = wacom->b;
wacom->b = b;
return (0);
}
@@ -205,9 +213,12 @@ wacom_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv)
static int
wacom_switch_off_to_on(int b, int oldb)
{
if (!(oldb & 0x1) && (b & 1)) return 1;
if (!(oldb & 0x2) && (b & 2)) return 1;
if (!(oldb & 0x4) && (b & 4)) return 1;
if (!(oldb & 0x1) && (b & 1))
return 1;
if (!(oldb & 0x2) && (b & 2))
return 1;
if (!(oldb & 0x4) && (b & 4))
return 1;
return 0;
}
@@ -215,33 +226,36 @@ wacom_switch_off_to_on(int b, int oldb)
static uint8_t
wacom_get_switch(int b)
{
if (b & 0x4) return 0x23;
if (b & 0x2) return 0x22;
if (b & 0x1) return 0x21;
if (b & 0x4)
return 0x23;
if (b & 0x2)
return 0x22;
if (b & 0x1)
return 0x21;
return 0x00;
}
static void
wacom_transmit_prepare(mouse_wacom_t* wacom, int x, int y)
wacom_transmit_prepare(mouse_wacom_t *wacom, int x, int y)
{
wacom->transmission_ongoing = 1;
wacom->data_pos = 0;
wacom->data_pos = 0;
memset(wacom->data, 0, sizeof(wacom->data));
if (wacom->transmit_id) {
wacom->transmission_format = 0;
snprintf((char*)wacom->data, sizeof(wacom->data), "~#SD51C V3.2.1.01\r");
snprintf((char *) wacom->data, sizeof(wacom->data), "~#SD51C V3.2.1.01\r");
return;
}
wacom->transmission_format = wacom->format;
wacom->last_abs_x = wacom->abs_x;
wacom->last_abs_y = wacom->abs_y;
wacom->remote_req = 0;
wacom->last_abs_x = wacom->abs_x;
wacom->last_abs_y = wacom->abs_y;
wacom->remote_req = 0;
wacom->oldb = wacom->b;
if (wacom->format == 1) {
wacom->data[0] = 0xC0;
wacom->data[6] = wacom->pressure_mode ? ((wacom->b & 0x1) ? (uint8_t)31 : (uint8_t)-31) : wacom_get_switch(wacom->b);
wacom->data[6] = wacom->pressure_mode ? ((wacom->b & 0x1) ? (uint8_t) 31 : (uint8_t) -31) : wacom_get_switch(wacom->b);
wacom->data[5] = (y & 0x7F);
wacom->data[4] = ((y & 0x3F80) >> 7) & 0x7F;
@@ -264,15 +278,15 @@ wacom_transmit_prepare(mouse_wacom_t* wacom, int x, int y)
if (tablet_tool_type == 1) {
wacom->data[0] |= 0x20;
}
if (!mouse_tablet_in_proximity) {
wacom->data[0] &= ~0x40;
}
} else {
wacom->data[0] = 0;
snprintf((char*)wacom->data, sizeof(wacom->data), "*,%05d,%05d,%d\r\n",
wacom->abs_x, wacom->abs_y,
wacom->pressure_mode ? ((wacom->b & 0x1) ? (uint8_t)-31 : (uint8_t)15) : ((wacom->b & 0x1) ? 21 : 00));
snprintf((char *) wacom->data, sizeof(wacom->data), "*,%05d,%05d,%d\r\n",
wacom->abs_x, wacom->abs_y,
wacom->pressure_mode ? ((wacom->b & 0x1) ? (uint8_t) -31 : (uint8_t) 15) : ((wacom->b & 0x1) ? 21 : 00));
}
}
@@ -280,17 +294,17 @@ extern double cpuclock;
static void
wacom_report_timer(void *priv)
{
mouse_wacom_t* wacom = (mouse_wacom_t*)priv;
double milisecond_diff = ((double)(tsc - wacom->old_tsc)) / cpuclock * 1000.0;
int relative_mode = (mouse_mode == 0);
int x = (relative_mode ? wacom->rel_x : wacom->abs_x);
int y = (relative_mode ? wacom->rel_y : wacom->abs_y);
int x_diff = abs(relative_mode ? wacom->rel_x : (wacom->abs_x - wacom->last_abs_x));
int y_diff = abs(relative_mode ? wacom->rel_y : (wacom->abs_y - wacom->last_abs_y));
int increment = wacom->suppressed_increment ? wacom->suppressed_increment : wacom->increment;
mouse_wacom_t *wacom = (mouse_wacom_t *) priv;
double milisecond_diff = ((double) (tsc - wacom->old_tsc)) / cpuclock * 1000.0;
int relative_mode = (mouse_mode == 0);
int x = (relative_mode ? wacom->rel_x : wacom->abs_x);
int y = (relative_mode ? wacom->rel_y : wacom->abs_y);
int x_diff = abs(relative_mode ? wacom->rel_x : (wacom->abs_x - wacom->last_abs_x));
int y_diff = abs(relative_mode ? wacom->rel_y : (wacom->abs_y - wacom->last_abs_y));
int increment = wacom->suppressed_increment ? wacom->suppressed_increment : wacom->increment;
timer_on_auto(&wacom->report_timer, wacom->transmit_period);
if ((((double)(tsc - wacom->reset_tsc)) / cpuclock * 1000.0) <= 10)
if ((((double) (tsc - wacom->reset_tsc)) / cpuclock * 1000.0) <= 10)
return;
if (wacom->transmit_id && !wacom->transmission_ongoing)
goto transmit_prepare;
@@ -309,26 +323,26 @@ wacom_report_timer(void *priv)
wacom->old_tsc = tsc;
} else
return;
switch (wacom->mode) {
case WACOM_MODE_STREAM:
default:
break;
case WACOM_MODE_POINT:
{
if (!(wacom_switch_off_to_on(wacom->b, wacom->oldb)))
return;
break;
}
{
if (!(wacom_switch_off_to_on(wacom->b, wacom->oldb)))
return;
break;
}
case WACOM_MODE_SWITCH:
{
if (!wacom->b)
return;
break;
}
{
if (!wacom->b)
return;
break;
}
}
if (increment && !(x_diff > increment || y_diff > increment)) {
@@ -348,9 +362,9 @@ transmit:
if ((wacom->transmission_format == 0 && wacom->data[wacom->data_pos] == 0)
|| (wacom->transmission_format == 1 && wacom->data_pos == 7)) {
wacom->transmission_ongoing = 0;
wacom->transmit_id = 0;
wacom->data_pos = 0;
wacom->old_tsc = tsc;
wacom->transmit_id = 0;
wacom->data_pos = 0;
wacom->old_tsc = tsc;
}
return;
}
@@ -360,7 +374,7 @@ wacom_init(const device_t *info)
{
mouse_wacom_t *dev;
dev = (mouse_wacom_t *) calloc(1, sizeof(mouse_wacom_t));
dev = (mouse_wacom_t *) calloc(1, sizeof(mouse_wacom_t));
dev->name = info->name;
dev->but = 3;

19
src/device/serial.c
View File

@@ -152,7 +152,7 @@ serial_clear_timeout(serial_t *dev)
static void
serial_receive_timer(void *priv)
{
serial_t *dev = (serial_t *) priv;
serial_t *dev = (serial_t *) priv;
// serial_log("serial_receive_timer()\n");
@@ -211,8 +211,7 @@ write_fifo(serial_t *dev, uint8_t dat)
{
serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat,
(dev->type >= SERIAL_16550) && dev->fifo_enabled,
((dev->type >= SERIAL_16550) && dev->fifo_enabled) ?
(dev->rcvr_fifo_pos % dev->rcvr_fifo_len) : 0);
((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos % dev->rcvr_fifo_len) : 0);
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
/* FIFO mode. */
@@ -560,7 +559,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
dev->rcvr_fifo_len = 14;
break;
}
dev->out_new = 0xffff;
dev->out_new = 0xffff;
serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len);
}
break;
@@ -665,7 +664,7 @@ serial_read(uint16_t addr, void *p)
if (dev->rcvr_fifo_full || (dev->rcvr_fifo_pos != dev->rcvr_fifo_end)) {
/* There is data in the FIFO. */
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos];
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos];
dev->rcvr_fifo_pos = (dev->rcvr_fifo_pos + 1) & 0x0f;
/* Make sure to clear the FIFO full condition. */
@@ -690,7 +689,7 @@ serial_read(uint16_t addr, void *p)
} else {
/* Non-FIFO mode. */
ret = (uint8_t) (dev->out_new & 0xffff);
ret = (uint8_t) (dev->out_new & 0xffff);
dev->out_new = 0xffff;
/* Always clear Data Ready interrupt. */
@@ -857,8 +856,8 @@ serial_reset(void *priv)
serial_reset_port(dev);
dev->dlab = 96;
dev->fcr = 0x06;
dev->dlab = 96;
dev->fcr = 0x06;
serial_transmit_period(dev);
serial_update_speed(dev);
@@ -889,8 +888,8 @@ serial_init(const device_t *info)
serial_setup(dev, COM1_ADDR, COM1_IRQ);
/* Default to 1200,N,7. */
dev->dlab = 96;
dev->fcr = 0x06;
dev->dlab = 96;
dev->fcr = 0x06;
if (info->local == SERIAL_8250_PCJR)
dev->clock_src = 1789500.0;
else

2
src/discord.c
View File

@@ -88,7 +88,7 @@ discord_update_activity(int paused)
*(paren - 1) = '\0';
#pragma GCC diagnostic push
#if defined(__GNUC__) && !defined (__clang__)
#if defined(__GNUC__) && !defined(__clang__)
# pragma GCC diagnostic ignored "-Wformat-truncation"
#endif
if (strlen(vm_name) < 100) {

6
src/disk/hdc_ide.c
View File

@@ -737,7 +737,7 @@ ide_set_signature(ide_t *ide)
ide->secount = ide->sc->phase;
ide->cylinder = ide->sc->request_length;
} else {
ide->secount = 1;
ide->secount = 1;
// ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF);
ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0x7F7F);
if (ide->type == IDE_HDD)
@@ -1919,9 +1919,9 @@ ide_readb(uint16_t addr, void *priv)
addr &= 0xFFF7;
if ((ide->type == IDE_NONE) && ((ide_drives[ch ^ 1]->type == IDE_NONE) || !(ch & 1)))
absent = 1; /* Absent and is master or both are absent. */
absent = 1; /* Absent and is master or both are absent. */
else if ((ide->type == IDE_NONE) && (ch & 1))
absent = 2; /* Absent and is slave and master is present. */
absent = 2; /* Absent and is slave and master is present. */
switch (addr & 0x7) {
case 0x0: /* Data */

4
src/disk/hdc_xta.c
View File

@@ -102,7 +102,7 @@
#include <86box/hdc.h>
#include <86box/hdd.h>
#define HDC_TIME (50 * TIMER_USEC)
#define HDC_TIME (50 * TIMER_USEC)
#define WD_REV_1_BIOS_FILE "roms/hdd/xta/idexywd2.bin"
#define WD_REV_2_BIOS_FILE "roms/hdd/xta/infowdbios.rom"
@@ -968,7 +968,7 @@ xta_init(const device_t *info)
{
drive_t *drive;
char *bios_rev = NULL;
char *fn = NULL;
char *fn = NULL;
hdc_t *dev;
int c, i;
int max = XTA_NUM;

31
src/floppy/fdc_monster.c
View File

@@ -33,12 +33,12 @@
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define ROM_MONSTER_FDC "roms/floppy/monster-fdc/floppy_bios.bin"
typedef struct
{
rom_t bios_rom;
rom_t bios_rom;
fdc_t *fdc_pri;
fdc_t *fdc_sec;
} monster_fdc_t;
@@ -46,7 +46,7 @@ typedef struct
static void
monster_fdc_close(void *priv)
{
monster_fdc_t *dev = (monster_fdc_t *)priv;
monster_fdc_t *dev = (monster_fdc_t *) priv;
free(dev);
}
@@ -56,7 +56,7 @@ monster_fdc_init(const device_t *info)
{
monster_fdc_t *dev;
dev = (monster_fdc_t *)malloc(sizeof(monster_fdc_t));
dev = (monster_fdc_t *) malloc(sizeof(monster_fdc_t));
memset(dev, 0, sizeof(monster_fdc_t));
#if 0
@@ -86,13 +86,14 @@ monster_fdc_init(const device_t *info)
return dev;
}
static int monster_fdc_available(void)
static int
monster_fdc_available(void)
{
return rom_present(ROM_MONSTER_FDC);
}
static const device_config_t monster_fdc_config[] = {
// clang-format off
// clang-format off
#if 0
{
.name = "sec_enabled",
@@ -205,19 +206,19 @@ static const device_config_t monster_fdc_config[] = {
},
#endif
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
// clang-format on
};
const device_t fdc_monster_device = {
.name = "Monster FDC Floppy Drive Controller",
.name = "Monster FDC Floppy Drive Controller",
.internal_name = "monster_fdc",
.flags = DEVICE_ISA,
.local = 0,
.init = monster_fdc_init,
.close = monster_fdc_close,
.reset = NULL,
.flags = DEVICE_ISA,
.local = 0,
.init = monster_fdc_init,
.close = monster_fdc_close,
.reset = NULL,
{ .available = monster_fdc_available },
.speed_changed = NULL,
.force_redraw = NULL,
.config =monster_fdc_config
.force_redraw = NULL,
.config = monster_fdc_config
};

4
src/floppy/fdi2raw.c
View File

@@ -1520,7 +1520,7 @@ struct pulse_sample {
static int pulse_limitval = 15; /* tolerance of 15% */
static struct pulse_sample psarray[FDI_MAX_ARRAY];
static int array_index;
static uint32_t total;
static uint32_t total;
static int totaldiv;
static void
@@ -2051,7 +2051,7 @@ decode_lowlevel_track(FDI *fdi, int track, struct fdi_cache *cache)
}
static unsigned char fdiid[] = { "Formatted Disk Image file" };
static int bit_rate_table[16] = { 125, 150, 250, 300, 500, 1000 };
static int bit_rate_table[16] = { 125, 150, 250, 300, 500, 1000 };
void
fdi2raw_header_free(FDI *fdi)

14
src/machine/m_at_386dx_486.c
View File

@@ -1066,7 +1066,7 @@ machine_at_486sp3_init(const machine_t *model)
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 05 = Slot 3 */
pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); /* 06 = Slot 4 */
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_ami_pci_device); /* Uses the AMIKEY KBC */
device_add(&keyboard_ps2_ami_pci_device); /* Uses the AMIKEY KBC */
device_add(&sio_device);
device_add(&fdc37c663_ide_device);
device_add(&sst_flash_29ee010_device);
@@ -1725,11 +1725,11 @@ machine_at_ms4134_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms4134/4alm001.bin",
ret = bios_load_linear("roms/machines/ms4134/4alm001.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
return ret;
machine_at_common_ide_init(model);
@@ -1760,10 +1760,10 @@ machine_at_tg486gp_init(const machine_t *model)
int ret;
ret = bios_load_linear("roms/machines/tg486gp/tg486gp.bin",
0x000e0000, 131072, 0);
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
return ret;
machine_at_common_ide_init(model);
@@ -1793,10 +1793,10 @@ machine_at_tg486g_init(const machine_t *model)
int ret;
ret = bios_load_linear("roms/machines/tg486g/tg486g.bin",
0x000c0000, 262144, 0);
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
return ret;
else {
mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000);
mem_mapping_set_exec(&bios_mapping, rom);

1
src/machine/machine_table.c
View File

@@ -12929,7 +12929,6 @@ machine_get_kbc_device(int m)
return (NULL);
}
const device_t *
machine_get_device(int m)
{

366
src/network/net_3c501.c
View File

@@ -60,43 +60,42 @@
#include <86box/bswap.h>
/* Maximum number of times we report a link down to the guest (failure to send frame) */
#define ELNK_MAX_LINKDOWN_REPORTED 3
#define ELNK_MAX_LINKDOWN_REPORTED 3
/* Maximum number of times we postpone restoring a link that is temporarily down. */
#define ELNK_MAX_LINKRST_POSTPONED 3
#define ELNK_MAX_LINKRST_POSTPONED 3
/* Maximum frame size we handle */
#define MAX_FRAME 1536
#define MAX_FRAME 1536
/* Size of the packet buffer. */
#define ELNK_BUF_SIZE 2048
#define ELNK_BUF_SIZE 2048
/* The packet buffer address mask. */
#define ELNK_BUF_ADR_MASK (ELNK_BUF_SIZE - 1)
#define ELNK_BUF_ADR_MASK (ELNK_BUF_SIZE - 1)
/* The GP buffer pointer address within the buffer. */
#define ELNK_GP(dev) (dev->uGPBufPtr & ELNK_BUF_ADR_MASK)
#define ELNK_GP(dev) (dev->uGPBufPtr & ELNK_BUF_ADR_MASK)
/* The GP buffer pointer mask.
* NB: The GP buffer pointer is internally a 12-bit counter. When addressing into the
* packet buffer, bit 11 is ignored. Required to pass 3C501 diagnostics.
*/
#define ELNK_GP_MASK 0xfff
#define ELNK_GP_MASK 0xfff
/*********************************************************************************************************************************
* Structures and Typedefs *
*********************************************************************************************************************************/
* Structures and Typedefs *
*********************************************************************************************************************************/
/**
* EtherLink Transmit Command Register.
*/
typedef struct ELNK_XMIT_CMD {
uint8_t det_ufl : 1; /* Detect underflow. */
uint8_t det_coll : 1; /* Detect collision. */
uint8_t det_16col : 1; /* Detect collision 16. */
uint8_t det_succ : 1; /* Detect successful xmit. */
uint8_t unused : 4;
uint8_t det_ufl : 1; /* Detect underflow. */
uint8_t det_coll : 1; /* Detect collision. */
uint8_t det_16col : 1; /* Detect collision 16. */
uint8_t det_succ : 1; /* Detect successful xmit. */
uint8_t unused : 4;
} EL_XMT_CMD;
/**
@@ -107,151 +106,151 @@ typedef struct ELNK_XMIT_CMD {
* (something the 3C501 does not have a concept of).
*/
typedef struct ELNK_XMIT_STAT {
uint8_t uflow : 1; /* Underflow on transmit. */
uint8_t coll : 1; /* Collision on transmit. */
uint8_t coll16 : 1; /* 16 collisions on transmit. */
uint8_t ready : 1; /* Ready for a new frame. */
uint8_t undef : 4;
uint8_t uflow : 1; /* Underflow on transmit. */
uint8_t coll : 1; /* Collision on transmit. */
uint8_t coll16 : 1; /* 16 collisions on transmit. */
uint8_t ready : 1; /* Ready for a new frame. */
uint8_t undef : 4;
} EL_XMT_STAT;
/** Address match (adr_match) modes. */
typedef enum {
EL_ADRM_DISABLED = 0, /* Receiver disabled. */
EL_ADRM_PROMISC = 1, /* Receive all addresses. */
EL_ADRM_BCAST = 2, /* Receive station + broadcast. */
EL_ADRM_MCAST = 3 /* Receive station + multicast. */
EL_ADRM_DISABLED = 0, /* Receiver disabled. */
EL_ADRM_PROMISC = 1, /* Receive all addresses. */
EL_ADRM_BCAST = 2, /* Receive station + broadcast. */
EL_ADRM_MCAST = 3 /* Receive station + multicast. */
} EL_ADDR_MATCH;
/**
* EtherLink Receive Command Register.
*/
typedef struct ELNK_RECV_CMD {
uint8_t det_ofl : 1; /* Detect overflow errors. */
uint8_t det_fcs : 1; /* Detect FCS errors. */
uint8_t det_drbl : 1; /* Detect dribble error. */
uint8_t det_runt : 1; /* Detect short frames. */
uint8_t det_eof : 1; /* Detect EOF (frames without overflow). */
uint8_t acpt_good : 1; /* Accept good frames. */
uint8_t adr_match : 2; /* Address match mode. */
uint8_t det_ofl : 1; /* Detect overflow errors. */
uint8_t det_fcs : 1; /* Detect FCS errors. */
uint8_t det_drbl : 1; /* Detect dribble error. */
uint8_t det_runt : 1; /* Detect short frames. */
uint8_t det_eof : 1; /* Detect EOF (frames without overflow). */
uint8_t acpt_good : 1; /* Accept good frames. */
uint8_t adr_match : 2; /* Address match mode. */
} EL_RCV_CMD;
/**
* EtherLink Receive Status Register.
*/
typedef struct ELNK_RECV_STAT {
uint8_t oflow : 1; /* Overflow on receive. */
uint8_t fcs : 1; /* FCS error. */
uint8_t dribble : 1; /* Dribble error. */
uint8_t runt : 1; /* Short frame. */
uint8_t no_ovf : 1; /* Received packet w/o overflow. */
uint8_t good : 1; /* Received good packet. */
uint8_t undef : 1;
uint8_t stale : 1; /* Stale receive status. */
uint8_t oflow : 1; /* Overflow on receive. */
uint8_t fcs : 1; /* FCS error. */
uint8_t dribble : 1; /* Dribble error. */
uint8_t runt : 1; /* Short frame. */
uint8_t no_ovf : 1; /* Received packet w/o overflow. */
uint8_t good : 1; /* Received good packet. */
uint8_t undef : 1;
uint8_t stale : 1; /* Stale receive status. */
} EL_RCV_STAT;
/** Buffer control (buf_ctl) modes. */
typedef enum {
EL_BCTL_SYSTEM = 0, /* Host has buffer access. */
EL_BCTL_XMT_RCV = 1, /* Transmit, then receive. */
EL_BCTL_RECEIVE = 2, /* Receive. */
EL_BCTL_LOOPBACK = 3 /* Loopback. */
EL_BCTL_SYSTEM = 0, /* Host has buffer access. */
EL_BCTL_XMT_RCV = 1, /* Transmit, then receive. */
EL_BCTL_RECEIVE = 2, /* Receive. */
EL_BCTL_LOOPBACK = 3 /* Loopback. */
} EL_BUFFER_CONTROL;
/**
* EtherLink Auxiliary Status Register.
*/
typedef struct ELNK_AUX_CMD {
uint8_t ire : 1; /* Interrupt Request Enable. */
uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
uint8_t buf_ctl : 2; /* Packet buffer control. */
uint8_t unused : 1;
uint8_t dma_req : 1; /* DMA request. */
uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
uint8_t reset : 1; /* Card in reset while set. */
uint8_t ire : 1; /* Interrupt Request Enable. */
uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
uint8_t buf_ctl : 2; /* Packet buffer control. */
uint8_t unused : 1;
uint8_t dma_req : 1; /* DMA request. */
uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
uint8_t reset : 1; /* Card in reset while set. */
} EL_AUX_CMD;
/**
* EtherLink Auxiliary Status Register.
*/
typedef struct ELNK_AUX_STAT {
uint8_t recv_bsy : 1; /* Receive busy. */
uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
uint8_t buf_ctl : 2; /* Packet buffer control. */
uint8_t dma_done : 1; /* DMA done. */
uint8_t dma_req : 1; /* DMA request. */
uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
uint8_t xmit_bsy : 1; /* Transmit busy. */
uint8_t recv_bsy : 1; /* Receive busy. */
uint8_t xmit_bf : 1; /* Xmit packets with bad FCS. */
uint8_t buf_ctl : 2; /* Packet buffer control. */
uint8_t dma_done : 1; /* DMA done. */
uint8_t dma_req : 1; /* DMA request. */
uint8_t ride : 1; /* Request Interrupt and DMA Enable. */
uint8_t xmit_bsy : 1; /* Transmit busy. */
} EL_AUX_STAT;
/**
* Internal interrupt status.
*/
typedef struct ELNK_INTR_STAT {
uint8_t recv_intr : 1; /* Receive interrupt status. */
uint8_t xmit_intr : 1; /* Transmit interrupt status. */
uint8_t dma_intr : 1; /* DMA interrupt status. */
uint8_t unused : 5;
uint8_t recv_intr : 1; /* Receive interrupt status. */
uint8_t xmit_intr : 1; /* Transmit interrupt status. */
uint8_t dma_intr : 1; /* DMA interrupt status. */
uint8_t unused : 5;
} EL_INTR_STAT;
typedef struct {
uint32_t base_address;
int base_irq;
uint32_t bios_addr;
uint8_t maclocal[6]; /* configured MAC (local) address. */
bool fISR; /* Internal interrupt flag. */
int fDMA; /* Internal DMA active flag. */
int fInReset; /* Internal in-reset flag. */
uint8_t aPROM[8]; /* The PROM contents. Only 8 bytes addressable, R/O. */
uint8_t aStationAddr[6]; /* The station address programmed by the guest, W/O. */
uint16_t uGPBufPtr; /* General Purpose (GP) Buffer Pointer, R/W. */
uint16_t uRCVBufPtr; /* Receive (RCV) Buffer Pointer, R/W. */
uint32_t base_address;
int base_irq;
uint32_t bios_addr;
uint8_t maclocal[6]; /* configured MAC (local) address. */
bool fISR; /* Internal interrupt flag. */
int fDMA; /* Internal DMA active flag. */
int fInReset; /* Internal in-reset flag. */
uint8_t aPROM[8]; /* The PROM contents. Only 8 bytes addressable, R/O. */
uint8_t aStationAddr[6]; /* The station address programmed by the guest, W/O. */
uint16_t uGPBufPtr; /* General Purpose (GP) Buffer Pointer, R/W. */
uint16_t uRCVBufPtr; /* Receive (RCV) Buffer Pointer, R/W. */
/** Transmit Command Register, W/O. */
union {
uint8_t XmitCmdReg;
EL_XMT_CMD XmitCmd;
uint8_t XmitCmdReg;
EL_XMT_CMD XmitCmd;
};
/** Transmit Status Register, R/O. */
union {
uint8_t XmitStatReg;
EL_XMT_STAT XmitStat;
uint8_t XmitStatReg;
EL_XMT_STAT XmitStat;
};
/** Receive Command Register, W/O. */
union {
uint8_t RcvCmdReg;
EL_RCV_CMD RcvCmd;
uint8_t RcvCmdReg;
EL_RCV_CMD RcvCmd;
};
/** Receive Status Register, R/O. */
union {
uint8_t RcvStatReg;
EL_RCV_STAT RcvStat;
uint8_t RcvStatReg;
EL_RCV_STAT RcvStat;
};
/** Auxiliary Command Register, W/O. */
union {
uint8_t AuxCmdReg;
EL_AUX_CMD AuxCmd;
uint8_t AuxCmdReg;
EL_AUX_CMD AuxCmd;
};
/** Auxiliary Status Register, R/O. */
union {
uint8_t AuxStatReg;
EL_AUX_STAT AuxStat;
uint8_t AuxStatReg;
EL_AUX_STAT AuxStat;
};
int fLinkUp; /* If set the link is currently up. */
int fLinkTempDown; /* If set the link is temporarily down because of a saved state load. */
uint16_t cLinkDownReported; /* Number of times we've reported the link down. */
uint16_t cLinkRestorePostponed; /* Number of times we've postponed the link restore. */
int fLinkUp; /* If set the link is currently up. */
int fLinkTempDown; /* If set the link is temporarily down because of a saved state load. */
uint16_t cLinkDownReported; /* Number of times we've reported the link down. */
uint16_t cLinkRestorePostponed; /* Number of times we've postponed the link restore. */
/* Internal interrupt state. */
union {
uint8_t IntrStateReg;
EL_INTR_STAT IntrState;
uint8_t IntrStateReg;
EL_INTR_STAT IntrState;
};
uint32_t cMsLinkUpDelay; /* MS to wait before we enable the link. */
int dma_channel;
uint8_t abLoopBuf[ELNK_BUF_SIZE]; /* The loopback transmit buffer (avoid stack allocations). */
uint8_t abRuntBuf[64]; /* The runt pad buffer (only really needs 60 bytes). */
uint8_t abPacketBuf[ELNK_BUF_SIZE]; /* The packet buffer. */
int dma_pos;
pc_timer_t timer_restore;
netcard_t *netcard;
uint32_t cMsLinkUpDelay; /* MS to wait before we enable the link. */
int dma_channel;
uint8_t abLoopBuf[ELNK_BUF_SIZE]; /* The loopback transmit buffer (avoid stack allocations). */
uint8_t abRuntBuf[64]; /* The runt pad buffer (only really needs 60 bytes). */
uint8_t abPacketBuf[ELNK_BUF_SIZE]; /* The packet buffer. */
int dma_pos;
pc_timer_t timer_restore;
netcard_t *netcard;
} threec501_t;
#ifdef ENABLE_3COM501_LOG
@@ -280,7 +279,7 @@ static void elnkR3HardReset(threec501_t *dev);
#endif
#define ETHER_ADDR_LEN ETH_ALEN
#define ETH_ALEN 6
#define ETH_ALEN 6
#pragma pack(1)
struct ether_header /** @todo Use RTNETETHERHDR? */
{
@@ -325,8 +324,8 @@ static void
elnkTempLinkDown(threec501_t *dev)
{
if (dev->fLinkUp) {
dev->fLinkTempDown = 1;
dev->cLinkDownReported = 0;
dev->fLinkTempDown = 1;
dev->cLinkDownReported = 0;
dev->cLinkRestorePostponed = 0;
timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC);
}
@@ -341,7 +340,7 @@ elnkR3Reset(void *priv)
threec501_t *dev = (threec501_t *) priv;
if (dev->fLinkTempDown) {
dev->cLinkDownReported = 0x1000;
dev->cLinkDownReported = 0x1000;
dev->cLinkRestorePostponed = 0x1000;
timer_disable(&dev->timer_restore);
}
@@ -367,15 +366,14 @@ elnkR3HardReset(threec501_t *dev)
elnkSoftReset(dev);
}
/**
* Check if incoming frame matches the station address.
*/
static __inline int
padr_match(threec501_t *dev, const uint8_t *buf)
{
struct ether_header *hdr = (struct ether_header *)buf;
int result;
struct ether_header *hdr = (struct ether_header *) buf;
int result;
/* Checks own + broadcast as well as own + multicast. */
result = (dev->RcvCmd.adr_match >= EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, dev->aStationAddr, 6);
@@ -389,21 +387,20 @@ padr_match(threec501_t *dev, const uint8_t *buf)
static __inline int
padr_bcast(threec501_t *dev, const uint8_t *buf)
{
static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
struct ether_header *hdr = (struct ether_header *)buf;
int result = (dev->RcvCmd.adr_match == EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, aBCAST, 6);
static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
struct ether_header *hdr = (struct ether_header *) buf;
int result = (dev->RcvCmd.adr_match == EL_ADRM_BCAST) && !memcmp(hdr->ether_dhost, aBCAST, 6);
return result;
}
/**
* Check if incoming frame is an accepted multicast frame.
*/
static __inline int
padr_mcast(threec501_t *dev, const uint8_t *buf)
{
struct ether_header *hdr = (struct ether_header *)buf;
int result = (dev->RcvCmd.adr_match == EL_ADRM_MCAST) && ETHER_IS_MULTICAST(hdr->ether_dhost);
struct ether_header *hdr = (struct ether_header *) buf;
int result = (dev->RcvCmd.adr_match == EL_ADRM_MCAST) && ETHER_IS_MULTICAST(hdr->ether_dhost);
return result;
}
@@ -475,9 +472,9 @@ elnkSoftReset(threec501_t *dev)
static int
elnkReceiveLocked(void *priv, uint8_t *src, int size)
{
threec501_t *dev = (threec501_t *) priv;
int is_padr = 0, is_bcast = 0, is_mcast = 0;
bool fLoopback = dev->RcvCmd.adr_match == EL_BCTL_LOOPBACK;
threec501_t *dev = (threec501_t *) priv;
int is_padr = 0, is_bcast = 0, is_mcast = 0;
bool fLoopback = dev->RcvCmd.adr_match == EL_BCTL_LOOPBACK;
union {
uint8_t RcvStatNewReg;
@@ -513,8 +510,8 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
* filter are always ignored.
*/
/// @todo cbToRecv must be 6 or more (complete address)
if ((dev->RcvCmd.adr_match == EL_ADRM_PROMISC) /* promiscuous enabled */
|| (is_padr = padr_match(dev, src))
if ((dev->RcvCmd.adr_match == EL_ADRM_PROMISC) /* promiscuous enabled */
|| (is_padr = padr_match(dev, src))
|| (is_bcast = padr_bcast(dev, src))
|| (is_mcast = padr_mcast(dev, src))) {
uint8_t *dst = dev->abPacketBuf + dev->uRCVBufPtr;
@@ -524,9 +521,9 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
#endif
/* Receive status is evaluated from scratch. The stale bit must remain set until we know better. */
rcvstatnew.RcvStatNewReg = 0;
rcvstatnew.RcvStatNewReg = 0;
rcvstatnew.RcvStatNew.stale = 1;
dev->RcvStatReg = 0x80;
dev->RcvStatReg = 0x80;
/* Detect errors: Runts, overflow, and FCS errors.
* NB: Dribble errors can not happen because we can only receive an
@@ -549,7 +546,7 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
memset(dev->abRuntBuf, 0, sizeof(dev->abRuntBuf));
memcpy(dev->abRuntBuf, src, size);
size = 60;
src = dev->abRuntBuf;
src = dev->abRuntBuf;
} else {
#ifdef ENABLE_3COM501_LOG
threec501_log("3Com501 runt, size=%d\n", size);
@@ -582,7 +579,7 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
if (rcvstatnew.RcvStatNew.no_ovf && !rcvstatnew.RcvStatNew.fcs && !rcvstatnew.RcvStatNew.runt)
rcvstatnew.RcvStatNew.good = 1;
uint16_t cbCopy = (uint16_t)MIN(ELNK_BUF_SIZE - dev->uRCVBufPtr, size);
uint16_t cbCopy = (uint16_t) MIN(ELNK_BUF_SIZE - dev->uRCVBufPtr, size);
/* All packets that passed the address filter are copied to the buffer. */
@@ -604,15 +601,15 @@ elnkReceiveLocked(void *priv, uint8_t *src, int size)
* NB: The precise receive logic is not very well described in the EtherLink
* documentation. It was refined using the 3C501.EXE diagnostic utility.
*/
if ( (rcvstatnew.RcvStatNew.good && dev->RcvCmd.acpt_good)
|| (rcvstatnew.RcvStatNew.no_ovf && dev->RcvCmd.det_eof)
|| (rcvstatnew.RcvStatNew.runt && dev->RcvCmd.det_runt)
if ((rcvstatnew.RcvStatNew.good && dev->RcvCmd.acpt_good)
|| (rcvstatnew.RcvStatNew.no_ovf && dev->RcvCmd.det_eof)
|| (rcvstatnew.RcvStatNew.runt && dev->RcvCmd.det_runt)
|| (rcvstatnew.RcvStatNew.dribble && dev->RcvCmd.det_drbl)
|| (rcvstatnew.RcvStatNew.fcs && dev->RcvCmd.det_fcs)
|| (rcvstatnew.RcvStatNew.oflow && dev->RcvCmd.det_ofl)) {
dev->AuxStat.recv_bsy = 0;
dev->IntrState.recv_intr = 1;
rcvstatnew.RcvStatNew.stale = 0; /* Prevents further receive until set again. */
|| (rcvstatnew.RcvStatNew.fcs && dev->RcvCmd.det_fcs)
|| (rcvstatnew.RcvStatNew.oflow && dev->RcvCmd.det_ofl)) {
dev->AuxStat.recv_bsy = 0;
dev->IntrState.recv_intr = 1;
rcvstatnew.RcvStatNew.stale = 0; /* Prevents further receive until set again. */
}
/* Finally update the receive status. */
@@ -715,7 +712,7 @@ elnkAsyncTransmit(threec501_t *dev)
/* NB: The buffer control does *not* change to Receive and stays the way it was. */
if (!fLoopback) {
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
}
} while (0); /* No loop, because there isn't ever more than one packet to transmit. */
@@ -725,14 +722,14 @@ elnkAsyncTransmit(threec501_t *dev)
static void
elnkCsrWrite(threec501_t *dev, uint8_t data)
{
bool fTransmit = false;
bool fReceive = false;
bool fDMAR;
int mode;
bool fTransmit = false;
bool fReceive = false;
bool fDMAR;
int mode;
union {
uint8_t reg;
EL_AUX_CMD val;
uint8_t reg;
EL_AUX_CMD val;
} auxcmd;
auxcmd.reg = data;
@@ -759,7 +756,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
#endif
elnkSoftReset(dev);
}
dev->AuxCmd.reset = auxcmd.val.reset; /* Update the reset bit, if nothing else. */
dev->AuxCmd.reset = auxcmd.val.reset; /* Update the reset bit, if nothing else. */
}
/* If the card is in reset, stop right here. */
@@ -788,14 +785,14 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
}
} else {
while (dev->dma_pos < (ELNK_BUF_SIZE - ELNK_GP(dev))) {
int dma_data = dma_channel_read(dev->dma_channel);
int dma_data = dma_channel_read(dev->dma_channel);
dev->abPacketBuf[ELNK_GP(dev) + dev->dma_pos] = dma_data & 0xff;
dev->dma_pos++;
}
}
dev->uGPBufPtr = (dev->uGPBufPtr + dev->dma_pos) & ELNK_GP_MASK;
dma_set_drq(dev->dma_channel, 0);
dev->dma_pos = 0;
dev->dma_pos = 0;
dev->IntrState.dma_intr = 1;
dev->AuxStat.dma_done = 1;
elnkUpdateIrq(dev);
@@ -808,7 +805,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
/* Interrupt enable changes. */
if ((dev->AuxCmd.ire != auxcmd.val.ire) || (dev->AuxCmd.ride != auxcmd.val.ride)) {
dev->AuxStat.ride = dev->AuxCmd.ride = auxcmd.val.ride;
dev->AuxCmd.ire = auxcmd.val.ire; /* NB: IRE is not visible in the aux status register. */
dev->AuxCmd.ire = auxcmd.val.ire; /* NB: IRE is not visible in the aux status register. */
}
/* DMA Request changes. */
@@ -824,15 +821,15 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
/* Packet buffer control changes. */
if (dev->AuxCmd.buf_ctl != auxcmd.val.buf_ctl) {
#ifdef ENABLE_3COM501_LOG
static const char *apszBuffCntrl[4] = { "System", "Xmit then Recv", "Receive", "Loopback" };
static const char *apszBuffCntrl[4] = { "System", "Xmit then Recv", "Receive", "Loopback" };
threec501_log("3Com501: Packet buffer control `%s' -> `%s'\n", apszBuffCntrl[dev->AuxCmd.buf_ctl], apszBuffCntrl[auxcmd.val.buf_ctl]);
#endif
if (auxcmd.val.buf_ctl == EL_BCTL_XMT_RCV) {
/* Transmit, then receive. */
fTransmit = true;
fTransmit = true;
dev->AuxStat.recv_bsy = 0;
} else if (auxcmd.val.buf_ctl == EL_BCTL_SYSTEM) {
dev->AuxStat.xmit_bsy = 1; /* Transmit Busy is set here and cleared once actual transmit completes. */
dev->AuxStat.xmit_bsy = 1; /* Transmit Busy is set here and cleared once actual transmit completes. */
dev->AuxStat.recv_bsy = 0;
} else if (auxcmd.val.buf_ctl == EL_BCTL_RECEIVE) {
/* Special case: If going from xmit-then-receive mode to receive mode, and we received
@@ -845,8 +842,8 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
/* For loopback, we go through the regular transmit and receive path. That may be an
* overkill but the receive path is too complex for a special loopback-only case.
*/
fTransmit = true;
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
fTransmit = true;
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
}
dev->AuxStat.buf_ctl = dev->AuxCmd.buf_ctl = auxcmd.val.buf_ctl;
}
@@ -863,7 +860,7 @@ elnkCsrWrite(threec501_t *dev, uint8_t data)
if (fTransmit)
elnkAsyncTransmit(dev);
else if (fReceive) {
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
dev->AuxStat.recv_bsy = 1; /* Receive Busy now set until a packet is received. */
}
}
@@ -874,52 +871,52 @@ threec501_read(uint16_t addr, void *priv)
uint8_t retval = 0xff;
switch (addr & 0x0f) {
case 0x00: /* Receive status register aliases. The SEEQ 8001 */
case 0x02: /* EDLC clearly only decodes one bit for reads. */
case 0x00: /* Receive status register aliases. The SEEQ 8001 */
case 0x02: /* EDLC clearly only decodes one bit for reads. */
case 0x04:
case 0x06: /* Receive status register. */
retval = dev->RcvStatReg;
dev->RcvStat.stale = 1; /* Allows further reception. */
case 0x06: /* Receive status register. */
retval = dev->RcvStatReg;
dev->RcvStat.stale = 1; /* Allows further reception. */
dev->IntrState.recv_intr = 0; /* Reading clears receive interrupt. */
elnkUpdateIrq(dev);
break;
case 0x01: /* Transmit status register aliases. */
case 0x01: /* Transmit status register aliases. */
case 0x03:
case 0x05:
case 0x07: /* Transmit status register. */
retval = dev->XmitStatReg;
case 0x07: /* Transmit status register. */
retval = dev->XmitStatReg;
dev->IntrState.xmit_intr = 0; /* Reading clears transmit interrupt. */
elnkUpdateIrq(dev);
break;
case 0x08: /* GP Buffer pointer LSB. */
case 0x08: /* GP Buffer pointer LSB. */
retval = (dev->uGPBufPtr & 0xff);
break;
case 0x09: /* GP Buffer pointer MSB. */
case 0x09: /* GP Buffer pointer MSB. */
retval = (dev->uGPBufPtr >> 8);
break;
case 0x0a: /* RCV Buffer pointer LSB. */
case 0x0a: /* RCV Buffer pointer LSB. */
retval = (dev->uRCVBufPtr & 0xff);
break;
case 0x0b: /* RCV Buffer pointer MSB. */
case 0x0b: /* RCV Buffer pointer MSB. */
retval = (dev->uRCVBufPtr >> 8);
break;
case 0x0c: /* Ethernet address PROM window. */
case 0x0d: /* Alias. */
case 0x0c: /* Ethernet address PROM window. */
case 0x0d: /* Alias. */
/* Reads use low 3 bits of GP buffer pointer, no auto-increment. */
retval = dev->aPROM[dev->uGPBufPtr & 7];
break;
case 0x0e: /* Auxiliary status register. */
case 0x0e: /* Auxiliary status register. */
retval = dev->AuxStatReg;
break;
case 0x0f: /* Buffer window. */
case 0x0f: /* Buffer window. */
/* Reads use low 11 bits of GP buffer pointer, auto-increment. */
retval = dev->abPacketBuf[ELNK_GP(dev)];
retval = dev->abPacketBuf[ELNK_GP(dev)];
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
break;
}
@@ -973,40 +970,40 @@ threec501_write(uint16_t addr, uint8_t value, void *priv)
#endif
break;
case 0x08: /* GP Buffer pointer LSB. */
case 0x08: /* GP Buffer pointer LSB. */
dev->uGPBufPtr = (dev->uGPBufPtr & 0xff00) | value;
break;
case 0x09: /* GP Buffer pointer MSB. */
case 0x09: /* GP Buffer pointer MSB. */
dev->uGPBufPtr = (dev->uGPBufPtr & 0x00ff) | (value << 8);
break;
case 0x0a: /* RCV Buffer pointer clear. */
case 0x0a: /* RCV Buffer pointer clear. */
dev->uRCVBufPtr = 0;
#ifdef ENABLE_3COM501_LOG
threec501_log("3Com501: RCV Buffer Pointer cleared (%02X)\n", value);
#endif
break;
case 0x0b: /* RCV buffer pointer MSB. */
case 0x0c: /* Ethernet address PROM window. */
case 0x0d: /* Undocumented. */
case 0x0b: /* RCV buffer pointer MSB. */
case 0x0c: /* Ethernet address PROM window. */
case 0x0d: /* Undocumented. */
#ifdef ENABLE_3COM501_LOG
threec501_log("3Com501: Writing read-only register %02X!\n", reg);
#endif
break;
case 0x0e: /* Auxiliary Command (CSR). */
case 0x0e: /* Auxiliary Command (CSR). */
elnkCsrWrite(dev, value);
break;
case 0x0f: /* Buffer window. */
case 0x0f: /* Buffer window. */
/* Writes use low 11 bits of GP buffer pointer, auto-increment. */
if (dev->AuxCmd.buf_ctl != EL_BCTL_SYSTEM) {
/// @todo Does this still increment GPBufPtr?
break;
}
dev->abPacketBuf[ELNK_GP(dev)] = value;
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
dev->uGPBufPtr = (dev->uGPBufPtr + 1) & ELNK_GP_MASK;
break;
}
@@ -1042,12 +1039,12 @@ elnkSetLinkState(void *priv, uint32_t link_state)
if (dev->fLinkUp != link_up) {
dev->fLinkUp = link_up;
if (link_up) {
dev->fLinkTempDown = 1;
dev->cLinkDownReported = 0;
dev->fLinkTempDown = 1;
dev->cLinkDownReported = 0;
dev->cLinkRestorePostponed = 0;
timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC);
} else {
dev->cLinkDownReported = 0;
dev->cLinkDownReported = 0;
dev->cLinkRestorePostponed = 0;
}
}
@@ -1060,8 +1057,7 @@ elnkR3TimerRestore(void *priv)
{
threec501_t *dev = (threec501_t *) priv;
if ((dev->cLinkDownReported <= ELNK_MAX_LINKDOWN_REPORTED) &&
(dev->cLinkRestorePostponed <= ELNK_MAX_LINKRST_POSTPONED)) {
if ((dev->cLinkDownReported <= ELNK_MAX_LINKDOWN_REPORTED) && (dev->cLinkRestorePostponed <= ELNK_MAX_LINKRST_POSTPONED)) {
timer_advance_u64(&dev->timer_restore, 1500000 * TIMER_USEC);
dev->cLinkRestorePostponed++;
} else {
@@ -1117,7 +1113,7 @@ threec501_nic_init(const device_t *info)
/* Initialize the PROM */
memcpy(dev->aPROM, dev->maclocal, sizeof(dev->maclocal));
dev->aPROM[6] = dev->aPROM[7] = 0; /* The two padding bytes. */
dev->aPROM[6] = dev->aPROM[7] = 0; /* The two padding bytes. */
#ifdef ENABLE_3COM501_LOG
threec501_log("I/O=%04x, IRQ=%d, DMA=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
@@ -1210,15 +1206,15 @@ static const device_config_t threec501_config[] = {
};
const device_t threec501_device = {
.name = "3Com EtherLink (3c500/3c501)",
.name = "3Com EtherLink (3c500/3c501)",
.internal_name = "3c501",
.flags = DEVICE_ISA,
.local = 0,
.init = threec501_nic_init,
.close = threec501_nic_close,
.reset = elnkR3Reset,
.flags = DEVICE_ISA,
.local = 0,
.init = threec501_nic_init,
.close = threec501_nic_close,
.reset = elnkR3Reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = threec501_config
.force_redraw = NULL,
.config = threec501_config
};

157
src/pci_dummy.c
View File

@@ -32,7 +32,7 @@ static uint8_t
pci_dummy_read(uint16_t Port, void *p)
{
pci_dummy_t *dev = (pci_dummy_t *) p;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
switch (Port & 0x20) {
case 0x00:
@@ -120,51 +120,57 @@ static uint8_t
pci_dummy_pci_read(int func, int addr, void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t ret = 0xff;
uint8_t ret = 0xff;
if (func == 0x00) switch (addr) {
case 0x00: case 0x2c:
ret = 0x1a;
break;
case 0x01: case 0x2d:
ret = 0x07;
break;
if (func == 0x00)
switch (addr) {
case 0x00:
case 0x2c:
ret = 0x1a;
break;
case 0x01:
case 0x2d:
ret = 0x07;
break;
case 0x02: case 0x2e:
ret = 0x0b;
break;
case 0x03: case 0x2f:
ret = 0xab;
break;
case 0x02:
case 0x2e:
ret = 0x0b;
break;
case 0x03:
case 0x2f:
ret = 0xab;
break;
case 0x04: /* PCI_COMMAND_LO */
case 0x05: /* PCI_COMMAND_HI */
case 0x06: /* PCI_STATUS_LO */
case 0x07: /* PCI_STATUS_HI */
case 0x0a: case 0x0b:
case 0x3c: /* PCI_ILR */
ret = dev->pci_regs[addr];
break;
case 0x04: /* PCI_COMMAND_LO */
case 0x05: /* PCI_COMMAND_HI */
case 0x06: /* PCI_STATUS_LO */
case 0x07: /* PCI_STATUS_HI */
case 0x0a:
case 0x0b:
case 0x3c: /* PCI_ILR */
ret = dev->pci_regs[addr];
break;
case 0x08: /* Techncially, revision, but we return the card (slot) here. */
ret = dev->card;
break;
case 0x08: /* Techncially, revision, but we return the card (slot) here. */
ret = dev->card;
break;
case 0x10: /* PCI_BAR 7:5 */
ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01;
break;
case 0x11: /* PCI_BAR 15:8 */
ret = dev->pci_bar[0].addr_regs[1];
break;
case 0x10: /* PCI_BAR 7:5 */
ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01;
break;
case 0x11: /* PCI_BAR 15:8 */
ret = dev->pci_bar[0].addr_regs[1];
break;
case 0x3d: /* PCI_IPR */
ret = PCI_INTA;
break;
case 0x3d: /* PCI_IPR */
ret = PCI_INTA;
break;
default:
ret = 0x00;
break;
}
default:
ret = 0x00;
break;
}
// pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret);
@@ -175,50 +181,51 @@ static void
pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t valxor;
uint8_t valxor;
// pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val);
if (func == 0x00) switch (addr) {
case 0x04: /* PCI_COMMAND_LO */
valxor = (val & 0x03) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO) {
if (func == 0x00)
switch (addr) {
case 0x04: /* PCI_COMMAND_LO */
valxor = (val & 0x03) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO) {
pci_dummy_io_remove(dev);
if ((dev->pci_bar[0].addr != 0) && (val & PCI_COMMAND_IO))
pci_dummy_io_set(dev);
}
dev->pci_regs[addr] = val & 0x03;
break;
case 0x10: /* PCI_BAR */
val &= 0xe0; /* 0xe0 acc to RTL DS */
/*FALLTHROUGH*/
case 0x11: /* PCI_BAR */
/* Remove old I/O. */
pci_dummy_io_remove(dev);
if ((dev->pci_bar[0].addr != 0) && (val & PCI_COMMAND_IO))
pci_dummy_io_set(dev);
}
dev->pci_regs[addr] = val & 0x03;
break;
case 0x10: /* PCI_BAR */
val &= 0xe0; /* 0xe0 acc to RTL DS */
/*FALLTHROUGH*/
/* Set new I/O as per PCI request. */
dev->pci_bar[0].addr_regs[addr & 3] = val;
case 0x11: /* PCI_BAR */
/* Remove old I/O. */
pci_dummy_io_remove(dev);
/* Then let's calculate the new I/O base. */
dev->pci_bar[0].addr &= 0xffe0;
/* Set new I/O as per PCI request. */
dev->pci_bar[0].addr_regs[addr & 3] = val;
/* Log the new base. */
// pclog("AB0B:071A: PCI: new I/O base is %04X\n", dev->pci_bar[0].addr);
/* Then let's calculate the new I/O base. */
dev->pci_bar[0].addr &= 0xffe0;
/* We're done, so get out of the here. */
if (dev->pci_regs[4] & PCI_COMMAND_IO) {
if ((dev->pci_bar[0].addr) != 0)
pci_dummy_io_set(dev);
}
break;
/* Log the new base. */
// pclog("AB0B:071A: PCI: new I/O base is %04X\n", dev->pci_bar[0].addr);
/* We're done, so get out of the here. */
if (dev->pci_regs[4] & PCI_COMMAND_IO) {
if ((dev->pci_bar[0].addr) != 0)
pci_dummy_io_set(dev);
}
break;
case 0x3c: /* PCI_ILR */
pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val);
dev->pci_regs[addr] = val;
return;
}
case 0x3c: /* PCI_ILR */
pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val);
dev->pci_regs[addr] = val;
return;
}
}
static void
@@ -275,7 +282,7 @@ pci_dummy_init(int min_slot, int max_slot, int nb_slot, int sb_slot)
for (i = min_slot; i <= max_slot; i++) {
if ((i != nb_slot) && (i != sb_slot)) {
pci_register_slot(i, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(i, PCI_CARD_NORMAL, 1, 3, 2, 4);
device_add_inst(&pci_dummy_device, j);
j++;
}

353
src/scsi/scsi_cdrom.c
View File

@@ -63,138 +63,138 @@ typedef struct
/* Table of all SCSI commands and their flags, needed for the new disc change / not ready handler. */
uint8_t scsi_cdrom_command_flags[0x100] = {
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */
IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */
0, /* 0x02 */
IMPLEMENTED | ALLOW_UA, /* 0x03 */
0, 0, 0, 0, /* 0x04-0x07 */
IMPLEMENTED | CHECK_READY, /* 0x08 */
0, 0, /* 0x09-0x0A */
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */
0, /* 0x0C */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x0D */
0, 0, 0, 0, /* 0x0E-0x11 */
IMPLEMENTED | ALLOW_UA, /* 0x12 */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */
0, /* 0x14 */
IMPLEMENTED, /* 0x15 */
0, 0, 0, 0, /* 0x16-0x19 */
IMPLEMENTED, /* 0x1A */
IMPLEMENTED | CHECK_READY, /* 0x1B */
0, 0, /* 0x1C-0x1D */
IMPLEMENTED | CHECK_READY, /* 0x1E */
0, 0, 0, /* 0x1F-0x21*/
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x22*/
0, 0, /* 0x23-0x24 */
IMPLEMENTED | CHECK_READY, /* 0x25 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x26 */
0, /* 0x27 */
IMPLEMENTED | CHECK_READY, /* 0x28 */
0, 0, /* 0x29-0x2A */
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */
0, 0, 0, /* 0x2C-0x2E */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x30-0x3F */
0, 0, /* 0x40-0x41 */
IMPLEMENTED | CHECK_READY, /* 0x42 */
IMPLEMENTED | CHECK_READY, /* 0x43 - Read TOC - can get through UNIT_ATTENTION, per VIDE-CDD.SYS
NOTE: The ATAPI reference says otherwise, but I think this is a question of
interpreting things right - the UNIT ATTENTION condition we have here
is a tradition from not ready to ready, by definition the drive
eventually becomes ready, make the condition go away. */
IMPLEMENTED | CHECK_READY, /* 0x44 */
IMPLEMENTED | CHECK_READY, /* 0x45 */
IMPLEMENTED | ALLOW_UA, /* 0x46 */
IMPLEMENTED | CHECK_READY, /* 0x47 */
IMPLEMENTED | CHECK_READY, /* 0x48 */
IMPLEMENTED | CHECK_READY, /* 0x49 */
IMPLEMENTED | ALLOW_UA, /* 0x4A */
IMPLEMENTED | CHECK_READY, /* 0x4B */
0, 0, /* 0x4C-0x4D */
IMPLEMENTED | CHECK_READY, /* 0x4E */
0, 0, /* 0x4F-0x50 */
IMPLEMENTED | CHECK_READY, /* 0x51 */
IMPLEMENTED | CHECK_READY, /* 0x52 */
0, 0, /* 0x53-0x54 */
IMPLEMENTED, /* 0x55 */
0, 0, 0, 0, /* 0x56-0x59 */
IMPLEMENTED, /* 0x5A */
0, 0, 0, 0, 0, /* 0x5B-0x5F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x6F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x7F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80-0x8F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90-0x9F */
0, 0, 0, 0, 0, /* 0xA0-0xA4 */
IMPLEMENTED | CHECK_READY, /* 0xA5 */
0, 0, /* 0xA6-0xA7 */
IMPLEMENTED | CHECK_READY, /* 0xA8 */
IMPLEMENTED | CHECK_READY, /* 0xA9 */
0, 0, 0, /* 0xAA-0xAC */
IMPLEMENTED | CHECK_READY, /* 0xAD */
0, /* 0xAE */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */
0, 0, 0, 0, /* 0xB0-0xB3 */
IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB4 */
0, 0, 0, /* 0xB5-0xB7 */
IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB8 */
IMPLEMENTED | CHECK_READY, /* 0xB9 */
IMPLEMENTED | CHECK_READY, /* 0xBA */
IMPLEMENTED, /* 0xBB */
IMPLEMENTED | CHECK_READY, /* 0xBC */
IMPLEMENTED, /* 0xBD */
IMPLEMENTED | CHECK_READY, /* 0xBE */
IMPLEMENTED | CHECK_READY, /* 0xBF */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC0 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC1 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC2 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC3 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC4 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC5 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC6 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC9 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCB */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCD */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xCE-0xD7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xD8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xD9 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDB */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDD */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDE */
0, /* 0xDF */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE0 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE1 */
0, /* 0xE2 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE3 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE4 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE5 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE6 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE9 */
0, /* 0xEA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xEB */
0, /* 0xEC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xED */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xEE */
0, /* 0xEF */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 /* 0xF0-0xFF */
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */
IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */
0, /* 0x02 */
IMPLEMENTED | ALLOW_UA, /* 0x03 */
0, 0, 0, 0, /* 0x04-0x07 */
IMPLEMENTED | CHECK_READY, /* 0x08 */
0, 0, /* 0x09-0x0A */
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */
0, /* 0x0C */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x0D */
0, 0, 0, 0, /* 0x0E-0x11 */
IMPLEMENTED | ALLOW_UA, /* 0x12 */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */
0, /* 0x14 */
IMPLEMENTED, /* 0x15 */
0, 0, 0, 0, /* 0x16-0x19 */
IMPLEMENTED, /* 0x1A */
IMPLEMENTED | CHECK_READY, /* 0x1B */
0, 0, /* 0x1C-0x1D */
IMPLEMENTED | CHECK_READY, /* 0x1E */
0, 0, 0, /* 0x1F-0x21*/
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x22*/
0, 0, /* 0x23-0x24 */
IMPLEMENTED | CHECK_READY, /* 0x25 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0x26 */
0, /* 0x27 */
IMPLEMENTED | CHECK_READY, /* 0x28 */
0, 0, /* 0x29-0x2A */
IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */
0, 0, 0, /* 0x2C-0x2E */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x30-0x3F */
0, 0, /* 0x40-0x41 */
IMPLEMENTED | CHECK_READY, /* 0x42 */
IMPLEMENTED | CHECK_READY, /* 0x43 - Read TOC - can get through UNIT_ATTENTION, per VIDE-CDD.SYS
NOTE: The ATAPI reference says otherwise, but I think this is a question of
interpreting things right - the UNIT ATTENTION condition we have here
is a tradition from not ready to ready, by definition the drive
eventually becomes ready, make the condition go away. */
IMPLEMENTED | CHECK_READY, /* 0x44 */
IMPLEMENTED | CHECK_READY, /* 0x45 */
IMPLEMENTED | ALLOW_UA, /* 0x46 */
IMPLEMENTED | CHECK_READY, /* 0x47 */
IMPLEMENTED | CHECK_READY, /* 0x48 */
IMPLEMENTED | CHECK_READY, /* 0x49 */
IMPLEMENTED | ALLOW_UA, /* 0x4A */
IMPLEMENTED | CHECK_READY, /* 0x4B */
0, 0, /* 0x4C-0x4D */
IMPLEMENTED | CHECK_READY, /* 0x4E */
0, 0, /* 0x4F-0x50 */
IMPLEMENTED | CHECK_READY, /* 0x51 */
IMPLEMENTED | CHECK_READY, /* 0x52 */
0, 0, /* 0x53-0x54 */
IMPLEMENTED, /* 0x55 */
0, 0, 0, 0, /* 0x56-0x59 */
IMPLEMENTED, /* 0x5A */
0, 0, 0, 0, 0, /* 0x5B-0x5F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x6F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x7F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80-0x8F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90-0x9F */
0, 0, 0, 0, 0, /* 0xA0-0xA4 */
IMPLEMENTED | CHECK_READY, /* 0xA5 */
0, 0, /* 0xA6-0xA7 */
IMPLEMENTED | CHECK_READY, /* 0xA8 */
IMPLEMENTED | CHECK_READY, /* 0xA9 */
0, 0, 0, /* 0xAA-0xAC */
IMPLEMENTED | CHECK_READY, /* 0xAD */
0, /* 0xAE */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */
0, 0, 0, 0, /* 0xB0-0xB3 */
IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB4 */
0, 0, 0, /* 0xB5-0xB7 */
IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB8 */
IMPLEMENTED | CHECK_READY, /* 0xB9 */
IMPLEMENTED | CHECK_READY, /* 0xBA */
IMPLEMENTED, /* 0xBB */
IMPLEMENTED | CHECK_READY, /* 0xBC */
IMPLEMENTED, /* 0xBD */
IMPLEMENTED | CHECK_READY, /* 0xBE */
IMPLEMENTED | CHECK_READY, /* 0xBF */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC0 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC1 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC2 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC3 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC4 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC5 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC6 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC9 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCB */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCD */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xCE-0xD7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xD8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xD9 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDB */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDD */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xDE */
0, /* 0xDF */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE0 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE1 */
0, /* 0xE2 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE3 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE4 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE5 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE6 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE7 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE8 */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xE9 */
0, /* 0xEA */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xEB */
0, /* 0xEC */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xED */
IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xEE */
0, /* 0xEF */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 /* 0xF0-0xFF */
};
static uint64_t scsi_cdrom_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_DISCONNECT_PAGE | GPMODEP_CDROM_PAGE | GPMODEP_CDROM_AUDIO_PAGE | (1ULL << 0x0fULL) | GPMODEP_CAPABILITIES_PAGE | GPMODEP_ALL_PAGES);
static uint64_t scsi_cdrom_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_DISCONNECT_PAGE | GPMODEP_CDROM_PAGE | GPMODEP_CDROM_AUDIO_PAGE | (1ULL << 0x0fULL) | GPMODEP_CAPABILITIES_PAGE | GPMODEP_ALL_PAGES);
static uint64_t scsi_cdrom_mode_sense_page_flags_sony = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_DISCONNECT_PAGE | GPMODEP_CDROM_PAGE_SONY | GPMODEP_CDROM_AUDIO_PAGE_SONY | (1ULL << 0x0fULL) | GPMODEP_CAPABILITIES_PAGE | GPMODEP_ALL_PAGES);
static uint64_t scsi_cdrom_drive_status_page_flags = ((1ULL << 0x01ULL) | (1ULL << 0x02ULL) | (1ULL << 0x0fULL) | GPMODEP_ALL_PAGES);
static uint64_t scsi_cdrom_drive_status_page_flags = ((1ULL << 0x01ULL) | (1ULL << 0x02ULL) | (1ULL << 0x0fULL) | GPMODEP_ALL_PAGES);
static const mode_sense_pages_t scsi_cdrom_drive_status_pages = {
{{ 0, 0 },
{ 0x01, 0, 2, 0x0f, 0xbf }, /*Drive Status Data Format*/
{ 0x02, 0, 1, 0}, /*Audio Play Status Format*/
{ 0, 0 },
{ 0x02, 0, 1, 0 }, /*Audio Play Status Format*/
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
@@ -709,8 +709,8 @@ scsi_cdrom_drive_status(scsi_cdrom_t *dev, uint8_t *buf, uint32_t pos, uint8_t p
for (j = 0; j < msplen; j++) {
if (i == 0x01) {
buf[pos++] = scsi_cdrom_drive_status_read(dev, page_control, i, 3 + j);
if (!(j & 1)) { /*MSB of Drive Status*/
if (dev->drv->ops) /*Bit 11 of Drive Status, */
if (!(j & 1)) { /*MSB of Drive Status*/
if (dev->drv->ops) /*Bit 11 of Drive Status, */
buf[pos] &= ~0x08; /*Disc is present*/
else
buf[pos] |= 0x08; /*Disc not present*/
@@ -1702,13 +1702,13 @@ scsi_cdrom_command(scsi_common_t *sc, uint8_t *cdb)
int toc_format, block_desc = 0;
int ret, format = 0;
int real_pos, track = 0;
char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 };
char device_identify_ex[15] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 };
int32_t blen = 0, *BufLen;
uint8_t *b;
uint32_t profiles[2] = { MMC_PROFILE_CD_ROM, MMC_PROFILE_DVD_ROM };
uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f;
uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f;
char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 };
char device_identify_ex[15] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 };
int32_t blen = 0, *BufLen;
uint8_t *b;
uint32_t profiles[2] = { MMC_PROFILE_CD_ROM, MMC_PROFILE_DVD_ROM };
uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f;
uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f;
if (dev->drv->bus_type == CDROM_BUS_SCSI) {
BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length;
@@ -1876,7 +1876,7 @@ begin:
case 0xC7:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_MSF_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_MSF;
cdb[0] = GPCMD_PLAY_AUDIO_MSF;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -1884,10 +1884,10 @@ begin:
!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "SONY_CD-ROM_CDU-76S_1.00")) { /*GPCMD_PLAY_MSF_SONY*/
cdb[0] = GPCMD_PLAY_AUDIO_MSF;
dev->current_cdb[0] = cdb[0];
dev->sony_vendor = 1;
dev->sony_vendor = 1;
goto begin;
break;
} /*GPCMD_READ_DISC_INFORMATION_TOSHIBA*/
} /*GPCMD_READ_DISC_INFORMATION_TOSHIBA*/
case 0xDE: /*GPCMD_READ_DISC_INFORMATION_NEC*/
scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN);
scsi_cdrom_buf_alloc(dev, 4);
@@ -2405,7 +2405,7 @@ begin:
scsi_cdrom_command_complete(dev);
dev->sony_vendor = 1;
break;
} /*GPCMD_AUDIO_TRACK_SEARCH_TOSHIBA and GPCMD_EJECT_CHINON*/
} /*GPCMD_AUDIO_TRACK_SEARCH_TOSHIBA and GPCMD_EJECT_CHINON*/
case 0xD8: /*GPCMD_AUDIO_TRACK_SEARCH_NEC*/
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "CHINON_CD-ROM_CDS-431_H42"))) {
scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS);
@@ -2418,8 +2418,8 @@ begin:
scsi_cdrom_illegal_mode(dev);
break;
}
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
ret = cdrom_audio_track_search(dev->drv, pos, cdb[9] & 0xc0, cdb[1] & 1);
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
ret = cdrom_audio_track_search(dev->drv, pos, cdb[9] & 0xc0, cdb[1] & 1);
dev->drv->audio_op = (cdb[1] & 1) ? 0x03 : 0x02;
if (ret)
@@ -2438,7 +2438,7 @@ begin:
if (strcmp(cdrom_drive_types[dev->drv->type].internal_name, "PIONEER_CD-ROM_DRM-604X_2403")) {
dev->sony_vendor = 0;
} else {
msf = dev->ms_pages_saved_sony.pages[GPMODE_CDROM_PAGE_SONY][2] & 0x01;
msf = dev->ms_pages_saved_sony.pages[GPMODE_CDROM_PAGE_SONY][2] & 0x01;
dev->sony_vendor = 1;
}
@@ -2465,7 +2465,7 @@ begin:
scsi_cdrom_data_command_finish(dev, len, len, len, 0);
return;
} /*GPCMD_PLAY_AUDIO_TOSHIBA*/
} /*GPCMD_PLAY_AUDIO_TOSHIBA*/
case 0xD9: /*GPCMD_PLAY_AUDIO_NEC*/
scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS);
if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) {
@@ -2648,7 +2648,7 @@ begin:
else
scsi_cdrom_illegal_mode(dev);
break;
} /*GPCMD_READ_SUBCODEQ_PLAYING_STATUS_TOSHIBA and GPCMD_STOP_CHINON*/
} /*GPCMD_READ_SUBCODEQ_PLAYING_STATUS_TOSHIBA and GPCMD_STOP_CHINON*/
case 0xDD: /*GPCMD_READ_SUBCODEQ_PLAYING_STATUS_NEC*/
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "CHINON_CD-ROM_CDS-431_H42"))) {
scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS);
@@ -2658,7 +2658,7 @@ begin:
scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN);
alloc_length = cdb[1] & 0x1f;
len = 10;
len = 10;
if (!dev->drv->ops) {
scsi_cdrom_not_ready(dev);
@@ -2753,7 +2753,7 @@ begin:
case 0xC4:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_READ_HEADER_MATSUSHITA*/
cdb[0] = GPCMD_READ_HEADER;
cdb[0] = GPCMD_READ_HEADER;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -2772,10 +2772,10 @@ begin:
len = max_len;
memset(dev->buffer, 0, 10);
dev->buffer[0] = 0x00; /*Reserved*/
dev->buffer[1] = 0x00; /*Reserved*/
dev->buffer[2] = cdb[7]; /*Audio Status data length*/
dev->buffer[3] = cdb[8]; /*Audio Status data length*/
dev->buffer[0] = 0x00; /*Reserved*/
dev->buffer[1] = 0x00; /*Reserved*/
dev->buffer[2] = cdb[7]; /*Audio Status data length*/
dev->buffer[3] = cdb[8]; /*Audio Status data length*/
dev->buffer[4] = cdrom_get_audio_status_sony(dev->drv, &dev->buffer[6], msf); /*Audio status*/
dev->buffer[5] = 0x00;
@@ -2842,15 +2842,14 @@ begin:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "86BOX_CD-ROM_1.00")))
ide_padstr8(dev->buffer + idx, 8, EMU_NAME); /* Vendor */
else
ide_padstr8(dev->buffer + idx, 8, cdrom_drive_types[dev->drv->type].vendor); /* Vendor */
ide_padstr8(dev->buffer + idx, 8, cdrom_drive_types[dev->drv->type].vendor); /* Vendor */
idx += 8;
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "86BOX_CD-ROM_1.00")))
ide_padstr8(dev->buffer + idx, 40, device_identify_ex); /* Product */
else
ide_padstr8(dev->buffer + idx, 40, cdrom_drive_types[dev->drv->type].model); /* Product */
ide_padstr8(dev->buffer + idx, 40, cdrom_drive_types[dev->drv->type].model); /* Product */
idx += 40;
ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Serial */
@@ -2959,7 +2958,7 @@ begin:
else {
if (max_len == 96) {
dev->buffer[4] = 91;
idx = 96;
idx = 96;
}
}
}
@@ -2995,7 +2994,7 @@ atapi_out:
case 0xC3:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_READ_TOC_MATSUSHITA*/
cdb[0] = GPCMD_READ_TOC_PMA_ATIP;
cdb[0] = GPCMD_READ_TOC_PMA_ATIP;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3009,11 +3008,11 @@ atapi_out:
dev->sector_len = 1;
dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
real_pos = cdrom_lba_to_msf_accurate(dev->sector_pos);
dev->buffer[0] = ((real_pos >> 16) & 0xff);
dev->buffer[1] = ((real_pos >> 8) & 0xff);
dev->buffer[2] = real_pos & 0xff;
dev->buffer[3] = 1; /*2048 bytes user data*/
real_pos = cdrom_lba_to_msf_accurate(dev->sector_pos);
dev->buffer[0] = ((real_pos >> 16) & 0xff);
dev->buffer[1] = ((real_pos >> 8) & 0xff);
dev->buffer[2] = real_pos & 0xff;
dev->buffer[3] = 1; /*2048 bytes user data*/
len = 4;
len = MIN(len, alloc_length);
@@ -3030,7 +3029,7 @@ atapi_out:
case 0xC2:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_READ_SUBCHANNEL_MATSUSHITA*/
cdb[0] = GPCMD_READ_SUBCHANNEL;
cdb[0] = GPCMD_READ_SUBCHANNEL;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3135,7 +3134,7 @@ atapi_out:
case 0xC5:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_10;
cdb[0] = GPCMD_PLAY_AUDIO_10;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3149,7 +3148,7 @@ atapi_out:
}
case 0xC8:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_TRACK_INDEX_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_INDEX;
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_INDEX;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3157,13 +3156,13 @@ atapi_out:
!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "SONY_CD-ROM_CDU-76S_1.00")) { /*GPCMD_PLAY_AUDIO_SONY*/
cdb[0] = GPCMD_PLAY_AUDIO_10;
dev->current_cdb[0] = cdb[0];
dev->sony_vendor = 1;
dev->sony_vendor = 1;
goto begin;
break;
}
case 0xC9:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10;
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3188,7 +3187,7 @@ atapi_out:
}
case 0xCB:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PAUSE_RESUME_MATSUSHITA*/
cdb[0] = GPCMD_PAUSE_RESUME;
cdb[0] = GPCMD_PAUSE_RESUME;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3206,10 +3205,10 @@ atapi_out:
len = max_len;
memset(dev->buffer, 0, 10);
dev->buffer[0] = 0x00; /*Reserved*/
dev->buffer[1] = 0x00; /*Reserved*/
dev->buffer[2] = cdb[7]; /*Audio Status data length*/
dev->buffer[3] = cdb[8]; /*Audio Status data length*/
dev->buffer[0] = 0x00; /*Reserved*/
dev->buffer[1] = 0x00; /*Reserved*/
dev->buffer[2] = cdb[7]; /*Audio Status data length*/
dev->buffer[3] = cdb[8]; /*Audio Status data length*/
dev->buffer[4] = cdrom_get_audio_status_sony(dev->drv, &dev->buffer[6], msf); /*Audio status*/
dev->buffer[5] = 0x00;
@@ -3246,8 +3245,8 @@ atapi_out:
memset(dev->buffer, 0, len);
alloc_length = len;
len = scsi_cdrom_drive_status(dev, dev->buffer, 0, cdb[2]);
len = MIN(len, alloc_length);
len = scsi_cdrom_drive_status(dev, dev->buffer, 0, cdb[2]);
len = MIN(len, alloc_length);
scsi_cdrom_set_buf_len(dev, BufLen, &len);
@@ -3258,14 +3257,14 @@ atapi_out:
}
case 0xE5:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_12_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_12;
cdb[0] = GPCMD_PLAY_AUDIO_12;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
}
case 0xE9:
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "MATSHITA_CD-ROM_CR-501_1.0b"))) { /*GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12_MATSUSHITA*/
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12;
cdb[0] = GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12;
dev->current_cdb[0] = cdb[0];
goto begin;
break;
@@ -3484,7 +3483,7 @@ static void
scsi_cdrom_identify(ide_t *ide, int ide_has_dma)
{
scsi_cdrom_t *dev;
char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 };
char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 };
dev = (scsi_cdrom_t *) ide->sc;
@@ -3492,13 +3491,13 @@ scsi_cdrom_identify(ide_t *ide, int ide_has_dma)
scsi_cdrom_log("ATAPI Identify: %s\n", device_identify);
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "NEC_CD-ROM_DRIVE260_1.01")) || (!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "NEC_CD-ROM_DRIVE260_1.00"))) /*NEC only*/
ide->buffer[0] = 0x8000 | (5 << 8) | 0x80 | (1 << 5); /* ATAPI device, CD-ROM drive, removable media, interrupt DRQ */
ide->buffer[0] = 0x8000 | (5 << 8) | 0x80 | (1 << 5); /* ATAPI device, CD-ROM drive, removable media, interrupt DRQ */
else
ide->buffer[0] = 0x8000 | (5 << 8) | 0x80 | (2 << 5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "86BOX_CD-ROM_1.00"))) {
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */
ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */
} else {
if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "NEC_CD-ROM_DRIVE260_1.01"))) {

6
src/scsi/scsi_ncr5380.c
View File

@@ -880,10 +880,10 @@ memio_read(uint32_t addr, void *priv)
ncr_log("NCR status ctrl read=%02x\n", ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY);
if (!ncr_dev->ncr_busy)
ret |= STATUS_53C80_ACCESSIBLE;
if (ncr->mode & 0x30) { /*Parity bits*/
if (ncr->mode & 0x30) { /*Parity bits*/
if (!(ncr->mode & MODE_DMA)) { /*This is to avoid RTBios 8.10R BIOS problems with the hard disk and detection.*/
ret |= 0x01; /*If the parity bits are set, bit 0 of the 53c400 status port should be set as well.*/
ncr->mode = 0; /*Required by RTASPI10.SYS otherwise it won't initialize.*/
ret |= 0x01; /*If the parity bits are set, bit 0 of the 53c400 status port should be set as well.*/
ncr->mode = 0; /*Required by RTASPI10.SYS otherwise it won't initialize.*/
}
}
ncr_log("NCR 53c400 status = %02x.\n", ret);

8
src/scsi/scsi_spock.c
View File

@@ -445,9 +445,9 @@ spock_process_imm_cmd(spock_t *scsi)
switch (scsi->command & CMD_MASK) {
case CMD_ASSIGN:
scsi->assign = 1;
adapter_id = (scsi->command >> 16) & 15;
phys_id = (scsi->command >> 20) & 7;
lun_id = (scsi->command >> 24) & 7;
adapter_id = (scsi->command >> 16) & 15;
phys_id = (scsi->command >> 20) & 7;
lun_id = (scsi->command >> 24) & 7;
if (adapter_id == 15) {
if (phys_id == 7) /*Device 15 always adapter*/
spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE);
@@ -1175,7 +1175,7 @@ static const device_config_t spock_rom_config[] = {
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
// clang-format on
};
const device_t spock_device = {

16
src/sio/sio_ali5123.c
View File

@@ -246,12 +246,14 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
/* Block writes to some logical devices. */
if (cur_ld > 0x0c)
return;
else switch (cur_ld) {
case 0x01: case 0x02:
case 0x06:
case 0x08 ... 0x0a:
return;
}
else
switch (cur_ld) {
case 0x01:
case 0x02:
case 0x06:
case 0x08 ... 0x0a:
return;
}
dev->ld_regs[cur_ld][dev->cur_reg] = val;
}
} else
@@ -409,7 +411,7 @@ ali5123_read(uint16_t port, void *priv)
ret = dev->regs[dev->cur_reg];
} else {
cur_ld = dev->regs[7];
ret = dev->ld_regs[cur_ld][dev->cur_reg];
ret = dev->ld_regs[cur_ld][dev->cur_reg];
}
}
}

8
src/sound/snd_optimc.c
View File

@@ -70,14 +70,14 @@ typedef struct optimc_t {
} optimc_t, opti_82c929a_t;
static void
optimc_filter_opl(void* priv, double* out_l, double* out_r)
optimc_filter_opl(void *priv, double *out_l, double *out_r)
{
optimc_t *optimc = (optimc_t *) priv;
if (optimc->cur_wss_enabled) {
*out_l /= optimc->sb->mixer_sbpro.fm_l;
*out_r /= optimc->sb->mixer_sbpro.fm_r;
ad1848_filter_aux2((void*)&optimc->ad1848, out_l, out_r);
ad1848_filter_aux2((void *) &optimc->ad1848, out_l, out_r);
}
}
@@ -167,7 +167,7 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
switch ((val >> 4) & 0x3) {
case 0: /* WSBase = 0x530 */
optimc->cur_wss_addr = 0x530;
break;
break;
case 1: /* WSBase = 0xE80 */
optimc->cur_wss_addr = 0xE80;
break;
@@ -373,7 +373,7 @@ optimc_init(const device_t *info)
sb_ct1345_mixer_reset(optimc->sb);
optimc->sb->opl_mixer = optimc;
optimc->sb->opl_mix = optimc_filter_opl;
optimc->sb->opl_mix = optimc_filter_opl;
optimc->fm_type = (info->local & OPTIMC_OPL4) ? FM_YMF278B : FM_YMF262;
fm_driver_get(optimc->fm_type, &optimc->sb->opl);

38
src/sound/sound.c
View File

@@ -51,9 +51,9 @@ typedef struct {
void *priv;
} sound_handler_t;
int sound_card_current[SOUND_CARD_MAX] = { 0, 0, 0, 0};
int sound_pos_global = 0;
int sound_gain = 0;
int sound_card_current[SOUND_CARD_MAX] = { 0, 0, 0, 0 };
int sound_pos_global = 0;
int sound_gain = 0;
static sound_handler_t sound_handlers[8];
@@ -79,31 +79,31 @@ static void (*filter_cd_audio)(int channel, double *buffer, void *p) = NULL;
static void *filter_cd_audio_p = NULL;
static const device_t sound_none_device = {
.name = "None",
.name = "None",
.internal_name = "none",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
.force_redraw = NULL,
.config = NULL
};
static const device_t sound_internal_device = {
.name = "Internal",
.name = "Internal",
.internal_name = "internal",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
.force_redraw = NULL,
.config = NULL
};
static const SOUND_CARD sound_cards[] = {

6
src/unix/unix.c
View File

@@ -814,9 +814,9 @@ void
plat_get_global_config_dir(char *strptr)
{
#ifdef __APPLE__
char* prefPath = SDL_GetPrefPath(NULL, "net.86Box.86Box")
char *prefPath = SDL_GetPrefPath(NULL, "net.86Box.86Box")
#else
char* prefPath = SDL_GetPrefPath(NULL, "86Box");
char *prefPath = SDL_GetPrefPath(NULL, "86Box");
#endif
strncpy(strptr, prefPath, 1024);
path_slash(strptr);
@@ -1089,7 +1089,7 @@ main(int argc, char **argv)
return 6;
}
gfxcard[1] = 0;
gfxcard[1] = 0;
eventthread = SDL_ThreadID();
blitmtx = SDL_CreateMutex();
if (!blitmtx) {

4
src/unix/unix_serial_passthrough.c
View File

@@ -200,8 +200,8 @@ plat_serpt_write(void *p, uint8_t data)
static int
open_pseudo_terminal(serial_passthrough_t *dev)
{
int master_fd = open("/dev/ptmx", O_RDWR | O_NONBLOCK);
char *ptname;
int master_fd = open("/dev/ptmx", O_RDWR | O_NONBLOCK);
char *ptname;
struct termios term_attr_raw;
if (!master_fd) {

26
src/video/vid_mga.c
View File

@@ -896,9 +896,9 @@ mystique_recalctimings(svga_t *svga)
svga->ma = svga->maback = (svga->maback - (mystique->ma_latch_old << 2)) + (svga->ma_latch << 2);
mystique->ma_latch_old = svga->ma_latch;
}
svga->rowoffset <<= 1;
switch (mystique->xmulctrl & XMULCTRL_DEPTH_MASK) {
case XMULCTRL_DEPTH_8:
case XMULCTRL_DEPTH_2G8V16:
@@ -2249,7 +2249,8 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p)
mystique->dwgreg.fcol = val;
break;
case REG_SRC0: {
case REG_SRC0:
{
int x = 0, y = 0;
mystique->dwgreg.src[0] = val;
for (y = 0; y < 2; y++) {
@@ -2257,12 +2258,13 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + (y * 16)));
}
}
//pclog("SRC0 = 0x%08X\n", val);
// pclog("SRC0 = 0x%08X\n", val);
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[0], 32);
}
break;
case REG_SRC1: {
case REG_SRC1:
{
int x = 0, y = 0;
mystique->dwgreg.src[1] = val;
for (y = 2; y < 4; y++) {
@@ -2270,12 +2272,13 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 2) * 16)));
}
}
//pclog("SRC1 = 0x%08X\n", val);
// pclog("SRC1 = 0x%08X\n", val);
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[1], 32);
}
break;
case REG_SRC2: {
case REG_SRC2:
{
int x = 0, y = 0;
mystique->dwgreg.src[2] = val;
for (y = 4; y < 6; y++) {
@@ -2283,12 +2286,13 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 4) * 16)));
}
}
//pclog("SRC2 = 0x%08X\n", val);
// pclog("SRC2 = 0x%08X\n", val);
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[2], 32);
break;
}
case REG_SRC3: {
case REG_SRC3:
{
int x = 0, y = 0;
mystique->dwgreg.src[3] = val;
for (y = 6; y < 8; y++) {
@@ -2296,11 +2300,11 @@ mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p)
mystique->dwgreg.pattern[y][x] = val & (1 << (x + ((y - 6) * 16)));
}
}
//pclog("SRC3 = 0x%08X\n", val);
// pclog("SRC3 = 0x%08X\n", val);
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)
blit_iload_write(mystique, mystique->dwgreg.src[3], 32);
break;
}
}
case REG_DMAPAD:
if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD)

18
src/video/vid_s3.c
View File

@@ -5650,18 +5650,18 @@ polygon_setup(s3_t *s3)
out = (out & s3->accel.wrt_mask) | (old_dest_dat & ~s3->accel.wrt_mask); \
}
#define WRITE(addr, dat) \
if (s3->bpp == 0 && !s3->color_16bit) { \
svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \
#define WRITE(addr, dat) \
if (s3->bpp == 0 && !s3->color_16bit) { \
svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \
svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = svga->monitor->mon_changeframecount; \
} else if (s3->bpp == 1 || s3->color_16bit) { \
vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \
} else if (s3->bpp == 1 || s3->color_16bit) { \
vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \
svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = svga->monitor->mon_changeframecount; \
} else if (s3->bpp == 2) { \
svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \
} else if (s3->bpp == 2) { \
svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \
svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = svga->monitor->mon_changeframecount; \
} else { \
vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \
} else { \
vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \
svga->changedvram[(dword_remap_l(svga, addr) & (s3->vram_mask >> 2)) >> 10] = svga->monitor->mon_changeframecount; \
}

13
src/video/vid_s3_virge.c
View File

@@ -4181,13 +4181,12 @@ s3_virge_init(const device_t *info)
s3_virge_overlay_draw);
virge->svga.hwcursor.cur_ysize = 64;
if (bios_fn != NULL)
{
if (info->local == S3_VIRGE_GX2)
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
else
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
}
if (bios_fn != NULL) {
if (info->local == S3_VIRGE_GX2)
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
else
rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
}
mem_mapping_disable(&virge->bios_rom.mapping);

14
src/video/vid_svga.c
View File

@@ -872,7 +872,7 @@ svga_poll(void *p)
svga->oddeven ^= 1;
svga->monitor->mon_changeframecount = svga->interlace ? 3 : 2;
svga->vslines = 0;
svga->vslines = 0;
if (svga->interlace && svga->oddeven)
svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5);
@@ -938,9 +938,9 @@ svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
{
int c, d, e;
svga->p = p;
svga->p = p;
svga->monitor_index = monitor_index_global;
svga->monitor = &monitors[svga->monitor_index];
svga->monitor = &monitors[svga->monitor_index];
for (c = 0; c < 256; c++) {
e = c;
@@ -954,10 +954,10 @@ svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
svga->attrregs[0x11] = 0;
svga->overscan_color = 0x000000;
svga->monitor->mon_overscan_x = 16;
svga->monitor->mon_overscan_y = 32;
svga->x_add = 8;
svga->y_add = 16;
svga->monitor->mon_overscan_x = 16;
svga->monitor->mon_overscan_y = 32;
svga->x_add = 8;
svga->y_add = 16;
svga->crtc[0] = 63;
svga->crtc[6] = 255;

2
src/video/vid_tvp3026_ramdac.c
View File

@@ -162,7 +162,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
case 0x0a: /* Indexed Data (RS value = 1010) */
switch (ramdac->ind_idx) {
case 0x06: /* Indirect Cursor Control */
ramdac->ccr = val;
ramdac->ccr = val;
if (!(ramdac->ccr & 0x80)) {
svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64;
svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize;

9
src/video/vid_voodoo_banshee.c
View File

@@ -1603,8 +1603,7 @@ banshee_read_linear(uint32_t addr, void *p)
cycles -= voodoo->read_time;
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz))
{
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz)) {
return rom_read(addr & (banshee->bios_rom.sz - 1), &banshee->bios_rom);
}
addr &= svga->decode_mask;
@@ -1639,8 +1638,7 @@ banshee_read_linear_w(uint32_t addr, void *p)
return banshee_read_linear(addr, p) | (banshee_read_linear(addr + 1, p) << 8);
cycles -= voodoo->read_time;
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz))
{
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz)) {
return rom_readw(addr & (banshee->bios_rom.sz - 1), &banshee->bios_rom);
}
addr &= svga->decode_mask;
@@ -1676,8 +1674,7 @@ banshee_read_linear_l(uint32_t addr, void *p)
cycles -= voodoo->read_time;
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz))
{
if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz)) {
return rom_readl(addr & (banshee->bios_rom.sz - 1), &banshee->bios_rom);
}
addr &= svga->decode_mask;

4
src/video/vid_voodoo_display.c
View File

@@ -493,8 +493,8 @@ voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src,
void
voodoo_callback(void *p)
{
voodoo_t *voodoo = (voodoo_t *) p;
monitor_t* monitor = &monitors[voodoo->monitor_index];
voodoo_t *voodoo = (voodoo_t *) p;
monitor_t *monitor = &monitors[voodoo->monitor_index];
if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) {
if (voodoo->line < voodoo->v_disp) {

2
src/video/video.c
View File

@@ -106,7 +106,6 @@ void *__cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size) = memcpy
void *(*video_copy)(void *__restrict, const void *__restrict, size_t);
#endif
PALETTE cgapal = {
{0,0,0}, {0,42,0}, {42,0,0}, {42,21,0},
{0,0,0}, {0,42,42}, {42,0,42}, {42,42,42},
@@ -173,7 +172,6 @@ PALETTE cgapal_mono[6] = {
}
};
const uint32_t shade[5][256] =
{
{0}, // RGB Color (unused)

6
src/vnc.c
View File

@@ -88,8 +88,8 @@ vnc_mouse_poll(void)
mouse_x += ms.dx;
mouse_y += ms.dy;
ms.dx = 0;
ms.dy = 0;
ms.dx = 0;
ms.dy = 0;
// pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z);
}
@@ -186,7 +186,7 @@ vnc_display(rfbClientPtr cl)
static void
vnc_blit(int x, int y, int w, int h, int monitor_index)
{
int row;
int row;
if (monitor_index || (x < 0) || (y < 0) || (w < VNC_MIN_X) || (h < VNC_MIN_Y) || (w > VNC_MAX_X) || (h > VNC_MAX_Y) || (buffer32 == NULL)) {
video_blit_complete_monitor(monitor_index);

4
src/win/win.c
View File

@@ -884,12 +884,12 @@ plat_mmap(size_t size, uint8_t executable)
}
void
plat_get_global_config_dir(char* strptr)
plat_get_global_config_dir(char *strptr)
{
wchar_t appdata_dir[1024] = { L'\0' };
if (_wgetenv(L"LOCALAPPDATA") && _wgetenv(L"LOCALAPPDATA")[0] != L'\0') {
size_t len = 0;
size_t len = 0;
wcsncpy(appdata_dir, _wgetenv(L"LOCALAPPDATA"), 1024);
len = wcslen(appdata_dir);
if (appdata_dir[len - 1] != L'\\') {

6
src/win/win_devconf.c
View File

@@ -251,7 +251,7 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
id += 2;
break;
case CONFIG_BIOS:
bios = config->bios;
bios = config->bios;
val_str = config_get_string((char *) config_device.name,
(char *) config->name, (char *) config->default_string);
@@ -378,8 +378,8 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
id += 2;
break;
case CONFIG_BIOS:
bios = config->bios;
c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)];
bios = config->bios;
c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)];
for (; c > 0; c--)
bios++;
config_set_string((char *) config_device.name, (char *) config->name, (char *) bios->internal_name);

76
src/win/win_serial_passthrough.c
View File

@@ -47,7 +47,7 @@ plat_serpt_close(void *p)
if (dev->mode == SERPT_MODE_VCON)
DisconnectNamedPipe((HANDLE) dev->master_fd);
if (dev->mode == SERPT_MODE_HOSTSER) {
SetCommState((HANDLE)dev->master_fd, (DCB*)dev->backend_priv);
SetCommState((HANDLE) dev->master_fd, (DCB *) dev->backend_priv);
free(dev->backend_priv);
}
CloseHandle((HANDLE) dev->master_fd);
@@ -80,41 +80,44 @@ plat_serpt_write_vcon(serial_passthrough_t *dev, uint8_t data)
void
plat_serpt_set_params(void *p)
{
serial_passthrough_t *dev = (serial_passthrough_t *)p;
serial_passthrough_t *dev = (serial_passthrough_t *) p;
if (dev->mode == SERPT_MODE_HOSTSER) {
DCB serialattr = {};
GetCommState((HANDLE)dev->master_fd, &serialattr);
#define BAUDRATE_RANGE(baud_rate, min, max) if (baud_rate >= min && baud_rate < max) { serialattr.BaudRate = min; }
if (dev->mode == SERPT_MODE_HOSTSER) {
DCB serialattr = {};
GetCommState((HANDLE) dev->master_fd, &serialattr);
#define BAUDRATE_RANGE(baud_rate, min, max) \
if (baud_rate >= min && baud_rate < max) { \
serialattr.BaudRate = min; \
}
BAUDRATE_RANGE(dev->baudrate, 110, 300);
BAUDRATE_RANGE(dev->baudrate, 300, 600);
BAUDRATE_RANGE(dev->baudrate, 600, 1200);
BAUDRATE_RANGE(dev->baudrate, 1200, 2400);
BAUDRATE_RANGE(dev->baudrate, 2400, 4800);
BAUDRATE_RANGE(dev->baudrate, 4800, 9600);
BAUDRATE_RANGE(dev->baudrate, 9600, 14400);
BAUDRATE_RANGE(dev->baudrate, 14400, 19200);
BAUDRATE_RANGE(dev->baudrate, 19200, 38400);
BAUDRATE_RANGE(dev->baudrate, 38400, 57600);
BAUDRATE_RANGE(dev->baudrate, 57600, 115200);
BAUDRATE_RANGE(dev->baudrate, 115200, 0xFFFFFFFF);
BAUDRATE_RANGE(dev->baudrate, 110, 300);
BAUDRATE_RANGE(dev->baudrate, 300, 600);
BAUDRATE_RANGE(dev->baudrate, 600, 1200);
BAUDRATE_RANGE(dev->baudrate, 1200, 2400);
BAUDRATE_RANGE(dev->baudrate, 2400, 4800);
BAUDRATE_RANGE(dev->baudrate, 4800, 9600);
BAUDRATE_RANGE(dev->baudrate, 9600, 14400);
BAUDRATE_RANGE(dev->baudrate, 14400, 19200);
BAUDRATE_RANGE(dev->baudrate, 19200, 38400);
BAUDRATE_RANGE(dev->baudrate, 38400, 57600);
BAUDRATE_RANGE(dev->baudrate, 57600, 115200);
BAUDRATE_RANGE(dev->baudrate, 115200, 0xFFFFFFFF);
serialattr.ByteSize = dev->data_bits;
serialattr.StopBits = (dev->serial->lcr & 0x04) ? TWOSTOPBITS : ONESTOPBIT;
if (!(dev->serial->lcr & 0x08)) {
serialattr.fParity = 0;
serialattr.Parity = NOPARITY;
} else {
serialattr.fParity = 1;
if (dev->serial->lcr & 0x20) {
serialattr.Parity = (MARKPARITY) + !!(dev->serial->lcr & 0x10);
} else {
serialattr.Parity = (ODDPARITY) + !!(dev->serial->lcr & 0x10);
}
}
serialattr.ByteSize = dev->data_bits;
serialattr.StopBits = (dev->serial->lcr & 0x04) ? TWOSTOPBITS : ONESTOPBIT;
if (!(dev->serial->lcr & 0x08)) {
serialattr.fParity = 0;
serialattr.Parity = NOPARITY;
} else {
serialattr.fParity = 1;
if (dev->serial->lcr & 0x20) {
serialattr.Parity = (MARKPARITY) + !!(dev->serial->lcr & 0x10);
} else {
serialattr.Parity = (ODDPARITY) + !!(dev->serial->lcr & 0x10);
}
}
SetCommState((HANDLE)dev->master_fd, &serialattr);
SetCommState((HANDLE) dev->master_fd, &serialattr);
#undef BAUDRATE_RANGE
}
}
@@ -168,7 +171,7 @@ open_pseudo_terminal(serial_passthrough_t *dev)
if (dev->master_fd == (intptr_t) INVALID_HANDLE_VALUE) {
wchar_t errorMsg[1024] = { 0 };
wchar_t finalMsg[1024] = { 0 };
DWORD error = GetLastError();
DWORD error = GetLastError();
FormatMessageW(FORMAT_MESSAGE_FROM_SYSTEM, NULL, error, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), errorMsg, 1024, NULL);
swprintf(finalMsg, 1024, L"Named Pipe (server, named_pipe=\"%hs\", port=COM%d): %ls\n", ascii_pipe_name, dev->port + 1, errorMsg);
ui_msgbox(MBX_ERROR | MBX_FATAL, finalMsg);
@@ -188,8 +191,9 @@ open_host_serial_port(serial_passthrough_t *dev)
.WriteTotalTimeoutMultiplier = 0,
.WriteTotalTimeoutConstant = 1000
};
DCB* serialattr = calloc(1, sizeof(DCB));
if (!serialattr) return 0;
DCB *serialattr = calloc(1, sizeof(DCB));
if (!serialattr)
return 0;
dev->master_fd = (intptr_t) CreateFileA(dev->host_serial_path, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
if (dev->master_fd == (intptr_t) INVALID_HANDLE_VALUE) {
free(serialattr);
@@ -201,7 +205,7 @@ open_host_serial_port(serial_passthrough_t *dev)
free(serialattr);
return 0;
}
GetCommState((HANDLE)dev->master_fd, serialattr);
GetCommState((HANDLE) dev->master_fd, serialattr);
dev->backend_priv = serialattr;
return 1;
}

104
src/win/win_settings.c
View File

@@ -328,11 +328,11 @@ win_settings_init(void)
temp_sync = time_sync;
/* Video category */
temp_gfxcard[0] = gfxcard[0];
temp_gfxcard[0] = gfxcard[0];
temp_gfxcard[1] = gfxcard[1];
temp_voodoo = voodoo_enabled;
temp_ibm8514 = ibm8514_enabled;
temp_xga = xga_enabled;
temp_voodoo = voodoo_enabled;
temp_ibm8514 = ibm8514_enabled;
temp_xga = xga_enabled;
/* Input devices category */
temp_mouse = mouse_type;
@@ -351,17 +351,17 @@ win_settings_init(void)
for (i = 0; i < NET_CARD_MAX; i++) {
temp_net_type[i] = net_cards_conf[i].net_type;
memset(temp_pcap_dev[i], 0, sizeof(temp_pcap_dev[i]));
# ifdef ENABLE_SETTINGS_LOG
#ifdef ENABLE_SETTINGS_LOG
assert(sizeof(temp_pcap_dev[i]) == sizeof(net_cards_conf[i].host_dev_name));
# endif
#endif
memcpy(temp_pcap_dev[i], net_cards_conf[i].host_dev_name, sizeof(net_cards_conf[i].host_dev_name));
temp_net_card[i] = net_cards_conf[i].device_num;
}
/* Ports category */
for (i = 0; i < PARALLEL_MAX; i++) {
temp_lpt_devices[i] = lpt_ports[i].device;
temp_lpt[i] = lpt_ports[i].enabled;
temp_lpt_devices[i] = lpt_ports[i].device;
temp_lpt[i] = lpt_ports[i].enabled;
}
for (i = 0; i < SERIAL_MAX; i++) {
temp_serial[i] = com_ports[i].enabled;
@@ -552,8 +552,8 @@ win_settings_save(void)
time_sync = temp_sync;
/* Video category */
gfxcard[0] = temp_gfxcard[0];
gfxcard[1] = temp_gfxcard[1];
gfxcard[0] = temp_gfxcard[0];
gfxcard[1] = temp_gfxcard[1];
voodoo_enabled = temp_voodoo;
ibm8514_enabled = temp_ibm8514;
xga_enabled = temp_xga;
@@ -585,7 +585,7 @@ win_settings_save(void)
lpt_ports[i].enabled = temp_lpt[i];
}
for (i = 0; i < SERIAL_MAX; i++) {
com_ports[i].enabled = temp_serial[i];
com_ports[i].enabled = temp_serial[i];
serial_passthrough_enabled[i] = temp_serial_passthrough_enabled[i];
}
@@ -1801,7 +1801,7 @@ win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
}
for (i = 0; i < SERIAL_MAX; i++) {
temp_serial[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL1 + i);
temp_serial[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL1 + i);
temp_serial_passthrough_enabled[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL_PASS1 + i);
}
@@ -2025,10 +2025,10 @@ network_recalc_combos(HWND hdlg)
#if 0
for (uint8_t i = 0; i < NET_CARD_MAX; i++) {
#endif
settings_enable_window(hdlg, IDC_COMBO_PCAP1, temp_net_type[0] == NET_TYPE_PCAP);
settings_enable_window(hdlg, IDC_COMBO_NET1,
(temp_net_type[0] == NET_TYPE_SLIRP) || ((temp_net_type[0] == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev[0]) > 0)));
settings_enable_window(hdlg, IDC_CONFIGURE_NET1, network_card_has_config(temp_net_card[0]) && ((temp_net_type[0] == NET_TYPE_SLIRP) || ((temp_net_type[0] == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev[0]) > 0))));
settings_enable_window(hdlg, IDC_COMBO_PCAP1, temp_net_type[0] == NET_TYPE_PCAP);
settings_enable_window(hdlg, IDC_COMBO_NET1,
(temp_net_type[0] == NET_TYPE_SLIRP) || ((temp_net_type[0] == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev[0]) > 0)));
settings_enable_window(hdlg, IDC_CONFIGURE_NET1, network_card_has_config(temp_net_card[0]) && ((temp_net_type[0] == NET_TYPE_SLIRP) || ((temp_net_type[0] == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev[0]) > 0))));
#if 0
}
#endif
@@ -2053,44 +2053,44 @@ win_settings_network_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
#if 0
for (uint8_t i = 0; i < NET_CARD_MAX; i++) {
#endif
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"None");
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"SLiRP");
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"PCap");
settings_set_cur_sel(hdlg, IDC_COMBO_NET1_TYPE, temp_net_type[0]);
settings_enable_window(hdlg, IDC_COMBO_PCAP1, temp_net_type[0] == NET_TYPE_PCAP);
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"None");
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"SLiRP");
settings_add_string(hdlg, IDC_COMBO_NET1_TYPE, (LPARAM) L"PCap");
settings_set_cur_sel(hdlg, IDC_COMBO_NET1_TYPE, temp_net_type[0]);
settings_enable_window(hdlg, IDC_COMBO_PCAP1, temp_net_type[0] == NET_TYPE_PCAP);
for (c = 0; c < network_ndev; c++) {
mbstowcs(lptsTemp, network_devs[c].description, strlen(network_devs[c].description) + 1);
settings_add_string(hdlg, IDC_COMBO_PCAP1, (LPARAM) lptsTemp);
}
settings_set_cur_sel(hdlg, IDC_COMBO_PCAP1, network_dev_to_id(temp_pcap_dev[0]));
for (c = 0; c < network_ndev; c++) {
mbstowcs(lptsTemp, network_devs[c].description, strlen(network_devs[c].description) + 1);
settings_add_string(hdlg, IDC_COMBO_PCAP1, (LPARAM) lptsTemp);
}
settings_set_cur_sel(hdlg, IDC_COMBO_PCAP1, network_dev_to_id(temp_pcap_dev[0]));
/* NIC config */
c = d = 0;
settings_reset_content(hdlg, IDC_COMBO_NET1);
while (1) {
generate_device_name(network_card_getdevice(c), network_card_get_internal_name(c), 1);
/* NIC config */
c = d = 0;
settings_reset_content(hdlg, IDC_COMBO_NET1);
while (1) {
generate_device_name(network_card_getdevice(c), network_card_get_internal_name(c), 1);
if (device_name[0] == L'\0')
break;
if (device_name[0] == L'\0')
break;
if (network_card_available(c) && device_is_valid(network_card_getdevice(c), temp_machine)) {
if (c == 0)
settings_add_string(hdlg, IDC_COMBO_NET1, win_get_string(IDS_2104));
else
settings_add_string(hdlg, IDC_COMBO_NET1, (LPARAM) device_name);
settings_list_to_device[0][d] = c;
if ((c == 0) || (c == temp_net_card[0]))
settings_set_cur_sel(hdlg, IDC_COMBO_NET1, d);
d++;
}
c++;
if (network_card_available(c) && device_is_valid(network_card_getdevice(c), temp_machine)) {
if (c == 0)
settings_add_string(hdlg, IDC_COMBO_NET1, win_get_string(IDS_2104));
else
settings_add_string(hdlg, IDC_COMBO_NET1, (LPARAM) device_name);
settings_list_to_device[0][d] = c;
if ((c == 0) || (c == temp_net_card[0]))
settings_set_cur_sel(hdlg, IDC_COMBO_NET1, d);
d++;
}
settings_enable_window(hdlg, IDC_COMBO_NET1, d);
network_recalc_combos(hdlg);
free(lptsTemp);
c++;
}
settings_enable_window(hdlg, IDC_COMBO_NET1, d);
network_recalc_combos(hdlg);
free(lptsTemp);
#if 0
}
#endif
@@ -2157,10 +2157,10 @@ win_settings_network_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
#if 0
for (uint8_t i = 0; i < NET_CARD_MAX; i++) {
#endif
temp_net_type[0] = settings_get_cur_sel(hdlg, IDC_COMBO_NET1_TYPE);
memset(temp_pcap_dev[0], '\0', sizeof(temp_pcap_dev[0]));
strcpy(temp_pcap_dev[0], network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP1)].device);
temp_net_card[0] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET1)];
temp_net_type[0] = settings_get_cur_sel(hdlg, IDC_COMBO_NET1_TYPE);
memset(temp_pcap_dev[0], '\0', sizeof(temp_pcap_dev[0]));
strcpy(temp_pcap_dev[0], network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP1)].device);
temp_net_card[0] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET1)];
#if 0
}
#endif

2
src/win/win_ui.c
View File

@@ -45,7 +45,7 @@
#include <86box/win.h>
#include <86box/version.h>
#ifdef DISCORD
# include <86box/discord.h>
# include <86box/discord.h>
#endif
#ifdef MTR_ENABLED