Merge branch 'master' of ssh://github.com/86Box/86Box

This commit is contained in:
RichardG867
2022-10-28 17:55:07 -03:00
94 changed files with 1062 additions and 488 deletions

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@@ -25,7 +25,7 @@ If applicable, add screenshots to help explain your problem.
**Desktop (please complete the following information):**
- OS: [e.g. Windows 10]
- 86Box version: [e.g. v3.00 build 3333; saying "Latest from Jenkins" isn't helpful]
- 86Box version: [e.g. v3.7.1 build 4032; saying "Latest from Jenkins" isn't helpful]
- Build information: [i.e. new/old dynarec, architecture and build type]
**Additional context**

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@@ -52,7 +52,7 @@ jobs:
${{ matrix.environment.prefix }}-libpng
${{ matrix.environment.prefix }}-libvncserver
${{ matrix.environment.prefix }}-rtmidi
- uses: actions/checkout@v2
- uses: actions/checkout@v3
- name: make
run: make -fwin/makefile.mingw -j DEV_BUILD=${{ matrix.dev-build }} NEW_DYNAREC=${{ matrix.new-dynarec }} X64=${{ matrix.environment.x64 }} VNC=n
working-directory: ./src

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@@ -78,7 +78,7 @@ jobs:
${{ matrix.environment.prefix }}-libvncserver
${{ matrix.environment.prefix }}-openal
${{ matrix.environment.prefix }}-rtmidi
- uses: actions/checkout@v2
- uses: actions/checkout@v3
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
@@ -90,7 +90,7 @@ jobs:
run: cmake --build build
- name: Generate package
run: cmake --install build
- uses: actions/upload-artifact@v2
- uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
path: build/artifacts/**
@@ -146,7 +146,7 @@ jobs:
name: ARM64
steps:
- uses: actions/checkout@v2
- uses: actions/checkout@v3
- name: Prepare VS environment
uses: ilammy/msvc-dev-cmd@v1
with:
@@ -189,7 +189,7 @@ jobs:
run: cmake --build build
- name: Generate package
run: cmake --install build --prefix ./build/artifacts
- uses: actions/upload-artifact@v2
- uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-LLVM-${{ matrix.target.name }}-gha${{ github.run_number }}'
path: build/artifacts/**
@@ -218,7 +218,7 @@ jobs:
slug: -NDR
steps:
- uses: actions/checkout@v2
- uses: actions/checkout@v3
- name: Install dependencies
run: >-
sudo apt update && sudo apt install
@@ -241,7 +241,7 @@ jobs:
run: cmake --build build
# - name: Generate package
# run: cmake --install build --prefix ./build/artifacts
# - uses: actions/upload-artifact@v2
# - uses: actions/upload-artifact@v3
# with:
# name: '86Box${{ matrix.build.slug }}-UbuntuJammy-x86_64-gha${{ github.run_number }}'
# path: build/artifacts/**
@@ -270,7 +270,7 @@ jobs:
slug: -NDR
steps:
- uses: actions/checkout@v2
- uses: actions/checkout@v3
- name: Install dependencies
run: brew install freetype sdl2 libpng rtmidi qt@5 openal-soft ninja
- name: Configure CMake
@@ -285,7 +285,7 @@ jobs:
run: cmake --build build
- name: Generate package
run: cmake --install build --prefix ./build/artifacts
- uses: actions/upload-artifact@v2
- uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**

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@@ -14,11 +14,13 @@
*
* Copyright 2021 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include "cpu.h"
@@ -48,7 +50,7 @@ typedef struct
} ct_82c100_t;
#ifdef ENABLE_CT_82C100_LOG
int ct_82c100_do_log = ENABLE_CT82C100_LOG;
int ct_82c100_do_log = ENABLE_CT_82C100_LOG;
static void
ct_82c100_log(const char *fmt, ...)

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@@ -40,6 +40,7 @@
#ifdef ENABLE_ACC2168_LOG
int acc2168_do_log = ENABLE_ACC2168_LOG;
static void
acc2168_log(const char *fmt, ...)
{

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@@ -45,6 +45,7 @@
#ifdef ENABLE_ALI1489_LOG
int ali1489_do_log = ENABLE_ALI1489_LOG;
static void
ali1489_log(const char *fmt, ...)
{

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@@ -42,6 +42,7 @@ typedef struct ali1531_t {
#ifdef ENABLE_ALI1531_LOG
int ali1531_do_log = ENABLE_ALI1531_LOG;
static void
ali1531_log(const char *fmt, ...)
{

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@@ -40,6 +40,7 @@ typedef struct ali1541_t {
#ifdef ENABLE_ALI1541_LOG
int ali1541_do_log = ENABLE_ALI1541_LOG;
static void
ali1541_log(const char *fmt, ...)
{

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@@ -78,6 +78,7 @@ int ali1533_irq_routing[16] = { PCI_IRQ_DISABLED, 9, 3, 10, 4, 5, 7, 6,
#ifdef ENABLE_ALI1543_LOG
int ali1543_do_log = ENABLE_ALI1543_LOG;
static void
ali1543_log(const char *fmt, ...)
{

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@@ -39,6 +39,7 @@ typedef struct ali1621_t {
#ifdef ENABLE_ALI1621_LOG
int ali1621_do_log = ENABLE_ALI1621_LOG;
static void
ali1621_log(const char *fmt, ...)
{

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@@ -41,6 +41,7 @@ typedef struct
#ifdef ENABLE_CS4031_LOG
int cs4031_do_log = ENABLE_CS4031_LOG;
static void
cs4031_log(const char *fmt, ...)
{

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@@ -40,6 +40,7 @@ typedef struct
#ifdef ENABLE_ET6000_LOG
int et6000_do_log = ENABLE_ET6000_LOG;
static void
et6000_log(const char *fmt, ...)
{

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@@ -13,11 +13,13 @@
*
* Copyright 2020 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/device.h>

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@@ -14,11 +14,13 @@
*
* Copyright 2019,2020 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/mem.h>

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@@ -65,6 +65,7 @@ typedef struct
#ifdef ENABLE_INTEL_82335_LOG
int intel_82335_do_log = ENABLE_INTEL_82335_LOG;
static void
intel_82335_log(const char *fmt, ...)
{

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@@ -40,6 +40,7 @@ i450GX is way more popular of an option but needs more stuff.
#ifdef ENABLE_450KX_LOG
int i450kx_do_log = ENABLE_450KX_LOG;
static void
i450kx_log(const char *fmt, ...)
{

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@@ -12,11 +12,13 @@
*
* Copyright 2016-2018 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/device.h>

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@@ -19,11 +19,13 @@
*
* Copyright 2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>

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@@ -41,6 +41,7 @@ typedef struct
#ifdef ENABLE_OLIVETTI_EVA_LOG
int olivetti_eva_do_log = ENABLE_OLIVETTI_EVA_LOG;
static void
olivetti_eva_log(const char *fmt, ...)
{

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@@ -31,6 +31,7 @@
#ifdef ENABLE_OPTI291_LOG
int opti291_do_log = ENABLE_OPTI291_LOG;
static void
opti291_log(const char *fmt, ...)
{

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@@ -40,6 +40,7 @@
#ifdef ENABLE_OPTI822_LOG
int opti822_do_log = ENABLE_OPTI822_LOG;
static void
opti822_log(const char *fmt, ...)
{

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@@ -49,6 +49,7 @@
#ifdef ENABLE_SIS_5511_LOG
int sis_5511_do_log = ENABLE_SIS_5511_LOG;
static void
sis_5511_log(const char *fmt, ...)
{

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@@ -55,6 +55,7 @@
#ifdef ENABLE_SIS_5571_LOG
int sis_5571_do_log = ENABLE_SIS_5571_LOG;
static void
sis_5571_log(const char *fmt, ...)
{

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@@ -38,6 +38,7 @@
#ifdef ENABLE_SIS_85C50X_LOG
int sis_85c50x_do_log = ENABLE_SIS_85C50X_LOG;
static void
sis_85c50x_log(const char *fmt, ...)
{

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@@ -46,6 +46,7 @@ typedef struct
#ifdef ENABLE_VT82C49X_LOG
int vt82c49x_do_log = ENABLE_VT82C49X_LOG;
static void
vt82c49x_log(const char *fmt, ...)
{

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@@ -47,6 +47,7 @@
#ifdef ENABLE_WD76C10_LOG
int wd76c10_do_log = ENABLE_WD76C10_LOG;
static void
wd76c10_log(const char *fmt, ...)
{

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@@ -267,6 +267,7 @@ void codegen_block_init(uint32_t phys_addr)
void codegen_block_start_recompile(codeblock_t *block)
{
page_t *page = &pages[block->phys >> 12];
uintptr_t rip_rel;
if (!page->block[(block->phys >> 10) & 3])
mem_flush_write_page(block->phys, cs+cpu_state.pc);
@@ -298,15 +299,17 @@ void codegen_block_start_recompile(codeblock_t *block)
while (block_pos < BLOCK_EXIT_OFFSET)
addbyte(0x90); /*NOP*/
#else
addbyte(0xc6); /* mov byte ptr[&(cpu_state.abrt)],ABRT_GPF */
addbyte(0x05);
addlong((uint32_t) (uintptr_t) &(cpu_state.abrt));
addbyte(0xC6); /*MOVB ABRT_GPF,(abrt)*/
addbyte(0x45);
addbyte((uint8_t)cpu_state_offset(abrt));
addbyte(ABRT_GPF);
addbyte(0x31); /* xor eax,eax */
addbyte(0xc0);
addbyte(0x67); /* mov [&(abrt_error)],eax */
addbyte(0xa3);
addlong((uint32_t) (uintptr_t) &(abrt_error));
addbyte(0x89); /*MOVB eax,(abrt_error)*/
addbyte(0x85);
rip_rel = ((uintptr_t)&cpu_state) + 128;
rip_rel = ((uintptr_t) &(abrt_error)) - rip_rel;
addlong((uint32_t) rip_rel);
#endif
block_pos = BLOCK_EXIT_OFFSET; /*Exit code*/
addbyte(0x48); /*ADDL $40,%rsp*/

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@@ -11,7 +11,7 @@
#ifdef OLD_GPF
#define BLOCK_GPF_OFFSET (BLOCK_EXIT_OFFSET - 20)
#else
#define BLOCK_GPF_OFFSET (BLOCK_EXIT_OFFSET - 15)
#define BLOCK_GPF_OFFSET (BLOCK_EXIT_OFFSET - 12)
#endif
#define BLOCK_MAX 1620

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@@ -194,27 +194,23 @@ exec386(int cycs)
#endif
}
}
} else if (trap) {
flags_rebuild();
trap = 0;
#ifndef USE_NEW_DYNAREC
oldcs = CS;
#endif
cpu_state.oldpc = cpu_state.pc;
dr[6] |= 0x4000;
x86_int(1);
}
if (smi_line)
enter_smm_check(0);
else if (trap) {
flags_rebuild();
dr[6] |= 0x4000;
if (msw & 1)
pmodeint(1, 0);
else {
writememw(ss, (SP - 2) & 0xFFFF, cpu_state.flags);
writememw(ss, (SP - 4) & 0xFFFF, CS);
writememw(ss, (SP - 6) & 0xFFFF, cpu_state.pc);
SP -= 6;
addr = (1 << 2) + idt.base;
cpu_state.flags &= ~I_FLAG;
cpu_state.flags &= ~T_FLAG;
cpu_state.pc = readmemw(0, addr);
loadcs(readmemw(0, addr + 2));
}
} else if (nmi && nmi_enable && nmi_mask) {
else if (nmi && nmi_enable && nmi_mask) {
#ifndef USE_NEW_DYNAREC
oldcs = CS;
#endif
cpu_state.oldpc = cpu_state.pc;
x86_int(2);
nmi_enable = 0;

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@@ -398,7 +398,7 @@ exec386_dynarec_int(void)
CPU_BLOCK_END();
}
if (trap) {
if (!cpu_state.abrt && trap) {
trap = 0;
#ifndef USE_NEW_DYNAREC
oldcs = CS;

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@@ -313,7 +313,7 @@ readmemw(uint32_t s, uint16_t a)
else {
wait(4, 1);
ret = read_mem_b(s + a);
ret |= read_mem_b(s + (is186 ? (a + 1) : (a + 1) & 0xffff)) << 8;
ret |= read_mem_b(s + ((is186 && !is_nec) ? (a + 1) : (a + 1) & 0xffff)) << 8;
}
return ret;
@@ -385,7 +385,7 @@ writememw(uint32_t s, uint32_t a, uint16_t v)
else {
write_mem_b(addr, v & 0xff);
wait(4, 1);
addr = s + (is186 ? (a + 1) : ((a + 1) & 0xffff));
addr = s + ((is186 && !is_nec) ? (a + 1) : ((a + 1) & 0xffff));
write_mem_b(addr, v >> 8);
}
@@ -794,7 +794,7 @@ seteaq(uint64_t val)
static void
push(uint16_t *val)
{
if (is186 && SP == 1) {
if ((is186 && !is_nec) && (SP == 1)) {
writememw(ss - 1, 0, *val);
SP = cpu_state.eaaddr = 0xFFFF;
return;
@@ -963,7 +963,7 @@ interrupt(uint16_t addr)
pfq_clear();
ovr_seg = NULL;
access(39, 16);
tempf = cpu_state.flags & (is_nec && cpu_state.inside_emulation_mode ? 0x8fd7 : 0x0fd7);
tempf = cpu_state.flags & ((is_nec && cpu_state.inside_emulation_mode) ? 0x8fd7 : 0x0fd7);
push(&tempf);
cpu_state.flags &= ~(I_FLAG | T_FLAG);
access(40, 16);
@@ -1405,8 +1405,7 @@ set_co_mul(int bits, int carry)
{
set_cf(carry);
set_of(carry);
if (!is_nec)
set_zf_ex(!carry);
set_zf_ex(!carry);
if (!carry)
wait(1, 0);
}
@@ -1653,7 +1652,8 @@ execx86(int cycs)
int8_t nibble_result_s;
uint16_t addr, tempw, new_cs, new_ip;
uint16_t tempw_int, size, tempbp, lowbound;
uint16_t highbound, regval;
uint16_t highbound, regval, orig_sp, wordtopush;
uint16_t immediate, old_flags;
int bits;
uint32_t dest_seg, i, carry, nibble;
uint32_t srcseg, byteaddr;
@@ -1679,6 +1679,97 @@ execx86(int cycs)
// pclog("[%04X:%04X] Opcode: %02X\n", CS, cpu_state.pc, opcode);
if (is186) {
switch (opcode) {
case 0x60: /*PUSHA/PUSH R*/
orig_sp = SP;
wait(1, 0);
push(&AX);
push(&CX);
push(&DX);
push(&BX);
push(&orig_sp);
push(&BP);
push(&SI);
push(&DI);
handled = 1;
break;
case 0x61: /*POPA/POP R*/
wait(9, 0);
DI = pop();
SI = pop();
BP = pop();
(void) pop(); /* former orig_sp */
BX = pop();
DX = pop();
CX = pop();
AX = pop();
handled = 1;
break;
case 0x62: /* BOUND r/m */
lowbound = 0;
highbound = 0;
regval = 0;
do_mod_rm();
lowbound = readmemw(easeg, cpu_state.eaaddr);
highbound = readmemw(easeg, cpu_state.eaaddr + 2);
regval = get_reg(cpu_reg);
if (lowbound > regval || highbound < regval) {
cpu_state.pc = cpu_state.oldpc;
interrupt(5);
}
handled = 1;
break;
case 0x64:
case 0x65:
if (is_nec) {
/* REPC/REPNC */
wait(1, 0);
in_rep = (opcode == 0x64 ? 1 : 2);
rep_c_flag = 1;
completed = 0;
handled = 1;
}
break;
case 0x68:
wordtopush = pfq_fetchw();
wait(1, 0);
push(&wordtopush);
handled = 1;
break;
case 0x69:
immediate = 0;
bits = 16;
do_mod_rm();
read_ea(0, 16);
immediate = pfq_fetchw();
mul(cpu_data & 0xFFFF, immediate);
set_reg(cpu_reg, cpu_data);
set_co_mul(16, cpu_dest != 0);
handled = 1;
break;
case 0x6a:
wordtopush = sign_extend(pfq_fetchb());
push(&wordtopush);
handled = 1;
break;
case 0x6b: /* IMUL reg16,reg16/mem16,imm8 */
immediate = 0;
bits = 16;
do_mod_rm();
read_ea(0, 16);
immediate = pfq_fetchb();
mul(cpu_data & 0xFFFF, immediate);
set_reg(cpu_reg, cpu_data);
set_co_mul(16, cpu_dest != 0);
handled = 1;
break;
case 0x6c:
case 0x6d: /* INM dst, DW/INS dst, DX */
bits = 8 << (opcode & 1);
@@ -1757,28 +1848,6 @@ execx86(int cycs)
handled = 1;
break;
case 0xc9: /* LEAVE/DISPOSE */
SP = BP;
BP = pop();
handled = 1;
break;
case 0x62: /* BOUND r/m */
lowbound = 0;
highbound = 0;
regval = 0;
do_mod_rm();
lowbound = readmemw(easeg, cpu_state.eaaddr);
highbound = readmemw(easeg, cpu_state.eaaddr + 2);
regval = get_reg(cpu_reg);
if (lowbound > regval || highbound < regval) {
cpu_state.pc = cpu_state.oldpc;
interrupt(5);
}
handled = 1;
break;
case 0xc0:
case 0xc1: /*rot imm8 */
bits = 8 << (opcode & 1);
@@ -1868,6 +1937,12 @@ execx86(int cycs)
set_ea(cpu_data);
handled = 1;
break;
case 0xc9: /* LEAVE/DISPOSE */
SP = BP;
BP = pop();
handled = 1;
break;
}
}
if (!handled) {
@@ -2423,34 +2498,8 @@ execx86(int cycs)
break;
case 0x60: /*JO alias*/
if (is186) { /* PUSHA/PUSH R*/
uint16_t orig_sp = SP;
wait(1, 0);
push(&AX);
push(&CX);
push(&DX);
push(&BX);
push(&orig_sp);
push(&BP);
push(&SI);
push(&DI);
} else
jcc(opcode, cpu_state.flags & V_FLAG);
break;
case 0x70: /*JO*/
case 0x61: /*JNO alias*/
if (is186) { /* POPA/POP R*/
wait(9, 0);
DI = pop();
SI = pop();
BP = pop();
(void) pop(); /* former orig_sp */
BX = pop();
DX = pop();
CX = pop();
AX = pop();
break;
}
case 0x71: /*JNO*/
jcc(opcode, cpu_state.flags & V_FLAG);
break;
@@ -2464,14 +2513,7 @@ execx86(int cycs)
case 0x74: /*JE*/
case 0x65: /*JNE alias*/
case 0x75: /*JNE*/
if (is_nec && (opcode & 0xFE) == 0x64) {
/* REPC/REPNC */
wait(1, 0);
in_rep = (opcode == 0x64 ? 1 : 2);
rep_c_flag = 1;
completed = 0;
} else
jcc(opcode, cpu_state.flags & Z_FLAG);
jcc(opcode, cpu_state.flags & Z_FLAG);
break;
case 0x66: /*JBE alias*/
case 0x76: /*JBE*/
@@ -2480,47 +2522,14 @@ execx86(int cycs)
jcc(opcode, cpu_state.flags & (C_FLAG | Z_FLAG));
break;
case 0x68: /*JS alias*/
if (is186) { /* PUSH imm16 */
uint16_t wordtopush = pfq_fetchw();
wait(1, 0);
push(&wordtopush);
break;
}
case 0x78: /*JS*/
case 0x69: /*JNS alias*/
if (is186 && opcode == 0x69) { /* IMUL reg16,reg16/mem16,imm16 */
uint16_t immediate = 0;
bits = 16;
do_mod_rm();
read_ea(0, 16);
immediate = pfq_fetchw();
mul(cpu_data & 0xFFFF, immediate);
set_reg(cpu_reg, cpu_data);
set_co_mul(16, cpu_dest != 0);
break;
}
case 0x79: /*JNS*/
jcc(opcode, cpu_state.flags & N_FLAG);
break;
case 0x6A: /*JP alias*/
if (is186) { /* PUSH imm8 */
uint16_t wordtopush = sign_extend(pfq_fetchb());
push(&wordtopush);
break;
}
case 0x7A: /*JP*/
case 0x6B: /*JNP alias*/
if (is186 && opcode == 0x6B) { /* IMUL reg16,reg16/mem16,imm8 */
uint16_t immediate = 0;
bits = 16;
do_mod_rm();
read_ea(0, 16);
immediate = pfq_fetchb();
mul(cpu_data & 0xFFFF, immediate);
set_reg(cpu_reg, cpu_data);
set_co_mul(16, cpu_dest != 0);
break;
}
case 0x7B: /*JNP*/
jcc(opcode, cpu_state.flags & P_FLAG);
break;
@@ -2734,7 +2743,7 @@ execx86(int cycs)
break;
case 0x9C: /*PUSHF*/
access(33, 16);
tempw = cpu_state.flags & (is_nec && cpu_state.inside_emulation_mode ? MD_FLAG | 0x0fd7 : 0x0fd7);
tempw = cpu_state.flags & ((is_nec && cpu_state.inside_emulation_mode) ? (MD_FLAG | 0x0fd7) : 0x0fd7);
push(&tempw);
break;
case 0x9D: /*POPF*/
@@ -3109,13 +3118,21 @@ execx86(int cycs)
case 0xD4: /*AAM*/
wait(1, 0);
cpu_src = pfq_fetchb();
if (is_nec) {
(void) pfq_fetchb();
cpu_src = 10;
} else
cpu_src = pfq_fetchb();
if (x86_div(AL, 0))
set_pzs(16);
break;
case 0xD5: /*AAD*/
wait(1, 0);
mul(pfq_fetchb(), AH);
if (is_nec) {
(void) pfq_fetchb();
mul(10, AH);
} else
mul(pfq_fetchb(), AH);
cpu_dest = AL;
cpu_src = cpu_data;
add(8);
@@ -3341,6 +3358,7 @@ execx86(int cycs)
break;
case 0x20: /* MUL */
case 0x28: /* IMUL */
old_flags = cpu_state.flags;
wait(1, 0);
mul(get_accum(bits), cpu_data);
if (opcode & 1) {
@@ -3355,12 +3373,14 @@ execx86(int cycs)
if (!is_nec)
cpu_data = AH;
}
/* NOTE: When implementing the V20, care should be taken to not change
the zero flag. */
set_sf(bits);
set_pf();
if (cpu_mod != 3)
wait(1, 0);
/* NOTE: When implementing the V20, care should be taken to not change
the zero flag. */
if (is_nec)
cpu_state.flags = (cpu_state.flags & ~Z_FLAG) | (old_flags & Z_FLAG);
break;
case 0x30: /* DIV */
case 0x38: /* IDIV */

View File

@@ -73,6 +73,9 @@ enum {
/* Make sure this is as low as possible. */
cpu_state_t cpu_state;
/* Place this immediately after. */
uint32_t abrt_error;
#ifdef USE_DYNAREC
const OpFn *x86_dynarec_opcodes, *x86_dynarec_opcodes_0f,
*x86_dynarec_opcodes_d8_a16, *x86_dynarec_opcodes_d8_a32,
@@ -357,7 +360,7 @@ cpu_set(void)
unmask_a20_in_smm = 0;
CPUID = cpu_s->cpuid_model;
is8086 = (cpu_s->cpu_type > CPU_8088) && !(cpu_s->cpu_type == CPU_V20);
is8086 = (cpu_s->cpu_type > CPU_8088) && (cpu_s->cpu_type != CPU_V20) && (cpu_s->cpu_type != CPU_188);
is_nec = (cpu_s->cpu_type == CPU_V20) || (cpu_s->cpu_type == CPU_V30);
is186 = (cpu_s->cpu_type == CPU_186) || (cpu_s->cpu_type == CPU_188) || (cpu_s->cpu_type == CPU_V20) || (cpu_s->cpu_type == CPU_V30);
is286 = (cpu_s->cpu_type >= CPU_286);

View File

@@ -162,26 +162,38 @@ static int opFF_w_a16(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*INC w*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
seteaw(temp + 1); if (cpu_state.abrt) return 1;
setadd16nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
break;
case 0x08: /*DEC w*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
seteaw(temp - 1); if (cpu_state.abrt) return 1;
setsub16nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
break;
case 0x10: /*CALL*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
new_pc = geteaw(); if (cpu_state.abrt) return 1;
PUSH_W(cpu_state.pc);
cpu_state.pc = new_pc;
@@ -192,8 +204,10 @@ static int opFF_w_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x18: /*CALL far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = readmemw(easeg, cpu_state.eaaddr);
new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (cpu_state.abrt) return 1;
@@ -203,8 +217,10 @@ static int opFF_w_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x20: /*JMP*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
new_pc = geteaw(); if (cpu_state.abrt) return 1;
cpu_state.pc = new_pc;
CPU_BLOCK_END();
@@ -214,8 +230,10 @@ static int opFF_w_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x28: /*JMP far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
#ifdef USE_NEW_DYNAREC
old_pc = cpu_state.pc;
#else
@@ -234,8 +252,10 @@ static int opFF_w_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x30: /*PUSH w*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
PUSH_W(temp);
CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
@@ -261,26 +281,38 @@ static int opFF_w_a32(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*INC w*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
seteaw(temp + 1); if (cpu_state.abrt) return 1;
setadd16nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
break;
case 0x08: /*DEC w*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
seteaw(temp - 1); if (cpu_state.abrt) return 1;
setsub16nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
break;
case 0x10: /*CALL*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
new_pc = geteaw(); if (cpu_state.abrt) return 1;
PUSH_W(cpu_state.pc);
cpu_state.pc = new_pc;
@@ -291,8 +323,10 @@ static int opFF_w_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x18: /*CALL far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = readmemw(easeg, cpu_state.eaaddr);
new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (cpu_state.abrt) return 1;
@@ -302,8 +336,10 @@ static int opFF_w_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x20: /*JMP*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
new_pc = geteaw(); if (cpu_state.abrt) return 1;
cpu_state.pc = new_pc;
CPU_BLOCK_END();
@@ -313,8 +349,10 @@ static int opFF_w_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x28: /*JMP far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
#ifdef USE_NEW_DYNAREC
old_pc = cpu_state.pc;
#else
@@ -333,8 +371,10 @@ static int opFF_w_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x30: /*PUSH w*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1UL);
}
temp = geteaw(); if (cpu_state.abrt) return 1;
PUSH_W(temp);
CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
@@ -361,26 +401,38 @@ static int opFF_l_a16(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*INC l*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
seteal(temp + 1); if (cpu_state.abrt) return 1;
setadd32nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
break;
case 0x08: /*DEC l*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
seteal(temp - 1); if (cpu_state.abrt) return 1;
setsub32nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
break;
case 0x10: /*CALL*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = geteal(); if (cpu_state.abrt) return 1;
PUSH_L(cpu_state.pc);
cpu_state.pc = new_pc;
@@ -391,8 +443,10 @@ static int opFF_l_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x18: /*CALL far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 5UL);
}
new_pc = readmeml(easeg, cpu_state.eaaddr);
new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (cpu_state.abrt) return 1;
@@ -402,8 +456,10 @@ static int opFF_l_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x20: /*JMP*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = geteal(); if (cpu_state.abrt) return 1;
cpu_state.pc = new_pc;
CPU_BLOCK_END();
@@ -413,8 +469,10 @@ static int opFF_l_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x28: /*JMP far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 5UL);
}
#ifdef USE_NEW_DYNAREC
old_pc = cpu_state.pc;
#else
@@ -433,8 +491,10 @@ static int opFF_l_a16(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x30: /*PUSH l*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
PUSH_L(temp);
CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
@@ -460,26 +520,38 @@ static int opFF_l_a32(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*INC l*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
seteal(temp + 1); if (cpu_state.abrt) return 1;
setadd32nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
break;
case 0x08: /*DEC l*/
if (cpu_mod != 3)
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
if (cpu_mod != 3) {
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
seteal(temp - 1); if (cpu_state.abrt) return 1;
setsub32nc(temp, 1);
CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
break;
case 0x10: /*CALL*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = geteal(); if (cpu_state.abrt) return 1;
PUSH_L(cpu_state.pc); if (cpu_state.abrt) return 1;
cpu_state.pc = new_pc;
@@ -490,8 +562,10 @@ static int opFF_l_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x18: /*CALL far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 5UL);
}
new_pc = readmeml(easeg, cpu_state.eaaddr);
new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (cpu_state.abrt) return 1;
@@ -501,8 +575,10 @@ static int opFF_l_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x20: /*JMP*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
new_pc = geteal(); if (cpu_state.abrt) return 1;
cpu_state.pc = new_pc;
CPU_BLOCK_END();
@@ -512,8 +588,10 @@ static int opFF_l_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x28: /*JMP far*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 5UL);
}
#ifdef USE_NEW_DYNAREC
old_pc = cpu_state.pc;
#else
@@ -532,8 +610,10 @@ static int opFF_l_a32(uint32_t fetchdat)
PREFETCH_FLUSH();
break;
case 0x30: /*PUSH l*/
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
if (cpu_mod != 3) {
SEG_CHECK_READ(cpu_state.ea_seg); if (cpu_state.abrt) return 1;
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3UL);
}
temp = geteal(); if (cpu_state.abrt) return 1;
PUSH_L(temp);
PREFETCH_RUN((cpu_mod == 3) ? 2 : 5, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,1, 1);

View File

@@ -41,8 +41,6 @@ uint8_t opcode2;
int cgate16, cgate32;
int intgatesize;
uint32_t abrt_error;
void taskswitch286(uint16_t seg, uint16_t *segdat, int is32);
void pmodeint(int num, int soft);

View File

@@ -64,12 +64,14 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>

View File

@@ -66,13 +66,14 @@
#define KBD_TYPE_OLIVETTI 8
#define KBD_TYPE_ZENITH 9
#define KBD_TYPE_PRAVETZ 10
#define KBD_TYPE_XTCLONE 11
typedef struct {
int want_irq;
int blocked;
int tandy;
uint8_t pa, pb, pd;
uint8_t pa, pb, pd, clock;
uint8_t key_waiting;
uint8_t type, pravetz_flags;
@@ -514,17 +515,22 @@ static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
xtkbd_t *kbd = (xtkbd_t *) priv;
uint8_t bit, set;
uint8_t bit, set, new_clock;
switch (port) {
case 0x61: /* Keyboard Control Register (aka Port B) */
if (!(kbd->pb & 0x40) && (val & 0x40)) {
key_queue_start = key_queue_end = 0;
kbd->want_irq = 0;
kbd->blocked = 0;
kbd_adddata(0xaa);
if (!(val & 0x80)) {
new_clock = !!(val & 0x40);
if (!kbd->clock && new_clock) {
key_queue_start = key_queue_end = 0;
kbd->want_irq = 0;
kbd->blocked = 0;
kbd_adddata(0xaa);
}
}
kbd->pb = val;
if (!(kbd->pb & 0x80))
kbd->clock = !!(kbd->pb & 0x40);
ppi.pb = val;
timer_process();
@@ -579,8 +585,9 @@ kbd_read(uint16_t port, void *priv)
switch (port) {
case 0x60: /* Keyboard Data Register (aka Port A) */
if ((kbd->pb & 0x80) && ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_PRAVETZ) || (kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_ZENITH))) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_PRAVETZ))
if ((kbd->pb & 0x80) && ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_PRAVETZ) || (kbd->type == KBD_TYPE_XT82) ||
(kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_ZENITH))) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_PRAVETZ))
ret = (kbd->pd & ~0x02) | (hasfpu ? 0x02 : 0x00);
else if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86))
ret = 0xff; /* According to Ruud on the PCem forum, this is supposed to return 0xFF on the XT. */
@@ -664,9 +671,9 @@ kbd_read(uint16_t port, void *priv)
break;
case 0x63: /* Keyboard Configuration Register (aka Port D) */
if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_COMPAQ)
|| (kbd->type == KBD_TYPE_TOSHIBA))
if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) ||
(kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_TOSHIBA))
ret = kbd->pd;
break;
@@ -727,8 +734,9 @@ kbd_init(const device_t *info)
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) ||
(kbd->type == KBD_TYPE_PRAVETZ) || (kbd->type == KBD_TYPE_XT82) ||
(kbd->type <= KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_TOSHIBA) || (kbd->type == KBD_TYPE_OLIVETTI)) {
(kbd->type <= KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_XTCLONE) ||
(kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_TOSHIBA) ||
(kbd->type == KBD_TYPE_OLIVETTI)) {
/* DIP switch readout: bit set = OFF, clear = ON. */
if (kbd->type == KBD_TYPE_OLIVETTI)
@@ -747,9 +755,8 @@ kbd_init(const device_t *info)
kbd->pd |= get_videomode_switch_settings();
/* Switches 3, 4 - memory size. */
if ((kbd->type == KBD_TYPE_XT86)
|| (kbd->type == KBD_TYPE_COMPAQ)
|| (kbd->type == KBD_TYPE_TOSHIBA)) {
if ((kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_XTCLONE) ||
(kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_TOSHIBA)) {
switch (mem_size) {
case 256:
kbd->pd |= 0x00;
@@ -1043,3 +1050,17 @@ const device_t keyboard_xt_zenith_device = {
.force_redraw = NULL,
.config = NULL
};
const device_t keyboard_xtclone_device = {
.name = "XT (Clone) Keyboard",
.internal_name = "keyboard_xtclone",
.flags = 0,
.local = KBD_TYPE_XTCLONE,
.init = kbd_init,
.close = kbd_close,
.reset = kbd_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

View File

@@ -36,7 +36,7 @@ typedef struct {
int mode;
uint8_t flags;
uint16_t flags;
uint8_t resolution;
uint8_t sample_rate;
@@ -46,11 +46,12 @@ typedef struct {
uint8_t last_data[6];
} mouse_t;
#define FLAG_INTELLI 0x80 /* device is IntelliMouse */
#define FLAG_INTMODE 0x40 /* using Intellimouse mode */
#define FLAG_SCALED 0x20 /* enable delta scaling */
#define FLAG_ENABLED 0x10 /* dev is enabled for use */
#define FLAG_CTRLDAT 0x08 /* ctrl or data mode */
#define FLAG_5BTN 0x100 /* using Intellimouse Optical mode */
#define FLAG_INTELLI 0x80 /* device is IntelliMouse */
#define FLAG_INTMODE 0x40 /* using Intellimouse mode */
#define FLAG_SCALED 0x20 /* enable delta scaling */
#define FLAG_ENABLED 0x10 /* dev is enabled for use */
#define FLAG_CTRLDAT 0x08 /* ctrl or data mode */
int mouse_scan = 0;
@@ -128,12 +129,12 @@ ps2_write(uint8_t val, void *priv)
case 0xe9: /* status request */
keyboard_at_adddata_mouse(0xfa);
temp = (dev->flags & 0x30);
if (mouse_buttons & 0x01)
temp |= 0x01;
if (mouse_buttons & 0x02)
temp |= 0x02;
if (mouse_buttons & 0x04)
temp |= 0x03;
if (mouse_buttons & 1)
temp |= 4;
if (mouse_buttons & 2)
temp |= 1;
if ((mouse_buttons & 4) && (dev->flags & FLAG_INTELLI))
temp |= 2;
keyboard_at_adddata_mouse(temp);
keyboard_at_adddata_mouse(dev->resolution);
keyboard_at_adddata_mouse(dev->sample_rate);
@@ -156,14 +157,24 @@ ps2_write(uint8_t val, void *priv)
keyboard_at_adddata_mouse(temp);
keyboard_at_adddata_mouse(dev->x & 0xff);
keyboard_at_adddata_mouse(dev->y & 0xff);
if (dev->flags & FLAG_INTMODE)
keyboard_at_adddata_mouse(dev->z);
if (dev->flags & FLAG_INTMODE) {
int temp_z = dev->z;
if ((dev->flags & FLAG_5BTN)) {
temp_z &= 0xF;
if (mouse_buttons & 8)
temp_z |= 0x10;
if (mouse_buttons & 16)
temp_z |= 0x20;
}
keyboard_at_adddata_mouse(temp_z);
}
break;
case 0xf2: /* read ID */
keyboard_at_adddata_mouse(0xfa);
if (dev->flags & FLAG_INTMODE)
keyboard_at_adddata_mouse(0x03);
keyboard_at_adddata_mouse((dev->flags & FLAG_5BTN) ? 0x04 : 0x03);
else
keyboard_at_adddata_mouse(0x00);
break;
@@ -210,8 +221,17 @@ mouse_reset:
dev->last_data[5] = val;
if (dev->last_data[0] == 0xf3 && dev->last_data[1] == 0xc8 && dev->last_data[2] == 0xf3 && dev->last_data[3] == 0x64 && dev->last_data[4] == 0xf3 && dev->last_data[5] == 0x50)
if (dev->last_data[0] == 0xf3 && dev->last_data[1] == 0xc8
&& dev->last_data[2] == 0xf3 && dev->last_data[3] == 0xc8
&& dev->last_data[4] == 0xf3 && dev->last_data[5] == 0x50
&& mouse_get_buttons() == 5) {
dev->flags |= FLAG_INTMODE | FLAG_5BTN;
}
else if (dev->last_data[0] == 0xf3 && dev->last_data[1] == 0xc8
&& dev->last_data[2] == 0xf3 && dev->last_data[3] == 0x64
&& dev->last_data[4] == 0xf3 && dev->last_data[5] == 0x50) {
dev->flags |= FLAG_INTMODE;
}
}
}
@@ -269,8 +289,17 @@ ps2_poll(int x, int y, int z, int b, void *priv)
keyboard_at_adddata_mouse(buff[0]);
keyboard_at_adddata_mouse(buff[1]);
keyboard_at_adddata_mouse(buff[2]);
if (dev->flags & FLAG_INTMODE)
keyboard_at_adddata_mouse(dev->z);
if (dev->flags & FLAG_INTMODE) {
int temp_z = dev->z;
if ((dev->flags & FLAG_5BTN)) {
temp_z &= 0xF;
if (mouse_buttons & 8)
temp_z |= 0x10;
if (mouse_buttons & 16)
temp_z |= 0x20;
}
keyboard_at_adddata_mouse(temp_z);
}
dev->x = dev->y = dev->z = 0;
}
@@ -299,13 +328,15 @@ mouse_ps2_init(const device_t *info)
if (i > 2)
dev->flags |= FLAG_INTELLI;
if (i == 4) i = 3;
/* Hook into the general AT Keyboard driver. */
keyboard_at_set_mouse(ps2_write, dev);
mouse_ps2_log("%s: buttons=%d\n", dev->name, (dev->flags & FLAG_INTELLI) ? 3 : 2);
mouse_ps2_log("%s: buttons=%d\n", dev->name, i);
/* Tell them how many buttons we have. */
mouse_set_buttons((dev->flags & FLAG_INTELLI) ? 3 : 2);
mouse_set_buttons(i);
/* Return our private data to the I/O layer. */
return (dev);
@@ -333,10 +364,11 @@ static const device_config_t ps2_config[] = {
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "Two", .value = 2 },
{ .description = "Three", .value = 3 },
{ .description = "Wheel", .value = 4 },
{ .description = "" }
{ .description = "Two", .value = 2 },
{ .description = "Three", .value = 3 },
{ .description = "Wheel", .value = 4 },
{ .description = "Five + Wheel", .value = 5 },
{ .description = "" }
}
},
{

View File

@@ -49,35 +49,13 @@ hdc_log(const char *fmt, ...)
# define hdc_log(fmt, ...)
#endif
static void *
nullhdc_init(const device_t *info)
{
return (NULL);
}
static void
nullhdc_close(void *priv)
{
}
static void *
inthdc_init(const device_t *info)
{
return (NULL);
}
static void
inthdc_close(void *priv)
{
}
static const device_t hdc_none_device = {
.name = "None",
.internal_name = "none",
.flags = 0,
.local = 0,
.init = nullhdc_init,
.close = nullhdc_close,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
@@ -90,8 +68,8 @@ static const device_t hdc_internal_device = {
.internal_name = "internal",
.flags = 0,
.local = 0,
.init = inthdc_init,
.close = inthdc_close,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,

View File

@@ -51,6 +51,7 @@ static int next_id = 0;
#ifdef ENABLE_CMD640_LOG
int cmd640_do_log = ENABLE_CMD640_LOG;
static void
cmd640_log(const char *fmt, ...)
{

View File

@@ -49,6 +49,7 @@ typedef struct
#ifdef ENABLE_CMD646_LOG
int cmd646_do_log = ENABLE_CMD646_LOG;
static void
cmd646_log(const char *fmt, ...)
{

View File

@@ -821,7 +821,7 @@ st506_callback(void *priv)
/* For a 615/4/26 we get 666/2/31 geometry. */
st506_xt_log("ST506: drive%i: cyls=%i, heads=%i\n",
dev->drive_sel, drive->cfg_cyl, drive->cfg_hpc);
if (dev->type == 23 && drive->cfg_hpc == 2) {
if ((dev->type >= 23) && (drive->cfg_hpc == 2)) {
/*
* On Victor V86P, there's a disagreement between
* the physical geometry, what the controller
@@ -975,7 +975,7 @@ st506_callback(void *priv)
break;
case CMD_V86P_POWEROFF:
if (dev->type == 23) {
if (dev->type >= 23) {
/*
* Main BIOS (not the option ROM on disk) issues this.
* Not much we can do, since we don't have a physical disk
@@ -1538,9 +1538,16 @@ st506_init(const device_t *info)
dev->switches |= 0x40;
dev->bios_addr = device_get_config_hex20("bios_addr");
break;
case 23: /* Victor V86P (RLL) */
fn = VICTOR_V86P_BIOS_FILE;
break;
case 24: /* Toshiba T1200 */
fn = NULL;
dev->base = 0x01f0;
dev->switches = 0x0c;
break;
}
/* Load the ROM BIOS. */
@@ -2112,3 +2119,17 @@ const device_t st506_xt_victor_v86p_device = {
.force_redraw = NULL,
.config = NULL
};
const device_t st506_xt_toshiba_t1200_device = {
.name = "Toshiba T1200 RLL Fixed Disk Adapter",
.internal_name = "st506_xt_toshiba_t1200",
.flags = DEVICE_ISA,
.local = (HDD_BUS_MFM << 8) | 24,
.init = st506_init,
.close = st506_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

View File

@@ -94,6 +94,22 @@ fdc_log(const char *fmt, ...)
# define fdc_log(fmt, ...)
#endif
/*
const device_t fdc_none_device = {
.name = "None",
.internal_name = "none",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
*/
const device_t fdc_internal_device = {
.name = "Internal",
.internal_name = "internal",
@@ -112,9 +128,9 @@ typedef const struct {
const device_t *device;
} fdc_cards_t;
/* All emulated machines have at least one integrated FDC controller */
static fdc_cards_t fdc_cards[] = {
// clang-format off
// { &fdc_none_device },
{ &fdc_internal_device },
{ &fdc_b215_device },
{ &fdc_pii151b_device },
@@ -1224,7 +1240,7 @@ fdc_read(uint16_t addr, void *priv)
{
fdc_t *fdc = (fdc_t *) priv;
uint8_t ret;
int drive;
int drive = 0;
cycles -= ISA_CYCLES(8);
@@ -2275,7 +2291,11 @@ fdc_reset(void *priv)
fdc->max_track = (fdc->flags & FDC_FLAG_MORE_TRACKS) ? 85 : 79;
fdc_remove(fdc);
fdc_set_base(fdc, (fdc->flags & FDC_FLAG_PCJR) ? FDC_PRIMARY_PCJR_ADDR : FDC_PRIMARY_ADDR);
if (fdc->flags & FDC_FLAG_SEC) {
fdc_set_base(fdc, FDC_SECONDARY_ADDR);
} else {
fdc_set_base(fdc, (fdc->flags & FDC_FLAG_PCJR) ? FDC_PRIMARY_PCJR_ADDR : FDC_PRIMARY_ADDR);
}
current_drive = 0;
@@ -2304,10 +2324,15 @@ fdc_init(const device_t *info)
fdc->flags = info->local;
fdc->irq = FDC_PRIMARY_IRQ;
if (fdc->flags & FDC_FLAG_SEC)
fdc->irq = FDC_SECONDARY_IRQ;
else
fdc->irq = FDC_PRIMARY_IRQ;
if (fdc->flags & FDC_FLAG_PCJR)
timer_add(&fdc->watchdog_timer, fdc_watchdog_poll, fdc, 0);
else if (fdc->flags & FDC_FLAG_SEC)
fdc->dma_ch = FDC_SECONDARY_DMA;
else
fdc->dma_ch = FDC_PRIMARY_DMA;
@@ -2347,6 +2372,20 @@ const device_t fdc_xt_device = {
.config = NULL
};
const device_t fdc_xt_sec_device = {
.name = "PC/XT Floppy Drive Controller (Secondary)",
.internal_name = "fdc_xt",
.flags = FDC_FLAG_SEC,
.local = 0,
.init = fdc_init,
.close = fdc_close,
.reset = fdc_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t fdc_xt_t1x00_device = {
.name = "PC/XT Floppy Drive Controller (Toshiba)",
.internal_name = "fdc_xt_t1x00",
@@ -2417,6 +2456,20 @@ const device_t fdc_at_device = {
.config = NULL
};
const device_t fdc_at_sec_device = {
.name = "PC/AT Floppy Drive Controller (Secondary)",
.internal_name = "fdc_at_sec",
.flags = 0,
.local = FDC_FLAG_AT | FDC_FLAG_SEC,
.init = fdc_init,
.close = fdc_close,
.reset = fdc_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t fdc_at_actlow_device = {
.name = "PC/AT Floppy Drive Controller (Active low)",
.internal_name = "fdc_at_actlow",

View File

@@ -283,11 +283,9 @@ const int gap3_sizes[5][8][48] = { { { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } } };
#ifdef ENABLE_IMG_LOG
int img_do_log = ENABLE_IMG_LOG;
static void
img_log(const char *fmt, ...)
{

View File

@@ -204,11 +204,9 @@ static const uint8_t d_len[256] = {
static td0_t *td0[FDD_NUM];
#ifdef ENABLE_TD0_LOG
int td0_do_log = ENABLE_TD0_LOG;
static void
td0_log(const char *fmt, ...)
{

View File

@@ -52,6 +52,7 @@ extern int fdc_type;
#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */
#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */
#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */
#define FDC_FLAG_SEC 0x1000 /* Is Secondary */
typedef struct {
uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl;
@@ -185,11 +186,13 @@ extern uint8_t fdc_get_current_drive(void);
#ifdef EMU_DEVICE_H
extern const device_t fdc_xt_device;
extern const device_t fdc_xt_sec_device;
extern const device_t fdc_xt_t1x00_device;
extern const device_t fdc_xt_tandy_device;
extern const device_t fdc_xt_amstrad_device;
extern const device_t fdc_pcjr_device;
extern const device_t fdc_at_device;
extern const device_t fdc_at_sec_device;
extern const device_t fdc_at_actlow_device;
extern const device_t fdc_at_ps1_device;
extern const device_t fdc_at_smc_device;

View File

@@ -30,17 +30,18 @@
extern int hdc_current;
extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */
extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */
extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */
extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */
extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */
extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */
extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */
extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */
extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */
extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */
extern const device_t st506_xt_victor_v86p_device; /* st506_xt_victor_v86p */
extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */
extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */
extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */
extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */
extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */
extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */
extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */
extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */
extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */
extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */
extern const device_t st506_xt_victor_v86p_device; /* st506_xt_victor_v86p */
extern const device_t st506_xt_toshiba_t1200_device; /* st506_xt_toshiba_t1200 */
extern const device_t esdi_at_wd1007vse1_device; /* esdi_at */
extern const device_t esdi_ps2_device; /* esdi_mca */

View File

@@ -156,6 +156,7 @@ extern const device_t keyboard_xt_lxt3_device;
# endif
extern const device_t keyboard_xt_olivetti_device;
extern const device_t keyboard_xt_zenith_device;
extern const device_t keyboard_xtclone_device;
extern const device_t keyboard_at_device;
extern const device_t keyboard_at_ami_device;
extern const device_t keyboard_at_samsung_device;

View File

@@ -787,6 +787,8 @@ extern int machine_xt_kaypropc_init(const machine_t *);
extern int machine_xt_sansx16_init(const machine_t *);
extern int machine_xt_bw230_init(const machine_t *);
extern int machine_xt_v20xt_init(const machine_t *);
extern int machine_xt_iskra3104_init(const machine_t *);
extern int machine_xt_pravetz16_imko4_init(const machine_t *);

View File

@@ -254,10 +254,14 @@ machine_at_micronics386_init(const machine_t *model)
}
static void
machine_at_scat_init(const machine_t *model, int is_v4)
machine_at_scat_init(const machine_t *model, int is_v4, int is_ami)
{
machine_at_common_init(model);
device_add(&keyboard_at_ami_device);
if (is_ami)
device_add(&keyboard_at_ami_device);
else
device_add(&keyboard_at_device);
if (is_v4)
device_add(&scat_4_device);
@@ -289,7 +293,7 @@ machine_at_award286_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 0);
machine_at_scat_init(model, 0, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -308,7 +312,7 @@ machine_at_gdc212m_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 0);
machine_at_scat_init(model, 0, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -331,10 +335,7 @@ machine_at_gw286ct_init(const machine_t *model)
device_add(&f82c710_device);
machine_at_common_init(model);
device_add(&keyboard_at_device);
device_add(&scat_4_device);
machine_at_scat_init(model, 1, 0);
device_add(&ide_isa_device);
@@ -352,7 +353,7 @@ machine_at_super286tr_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 0);
machine_at_scat_init(model, 0, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -371,7 +372,7 @@ machine_at_spc4200p_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 0);
machine_at_scat_init(model, 0, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -391,7 +392,7 @@ machine_at_spc4216p_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 1);
machine_at_scat_init(model, 1, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -414,7 +415,7 @@ machine_at_spc4620p_init(const machine_t *model)
if (gfxcard == VID_INTERNAL)
device_add(&ati28800k_spc4620p_device);
machine_at_scat_init(model, 1);
machine_at_scat_init(model, 1, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -449,7 +450,7 @@ machine_at_deskmaster286_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_scat_init(model, 0);
machine_at_scat_init(model, 0, 1);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
@@ -720,11 +721,10 @@ machine_at_mr1217_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_ide_init(model);
device_add(&ali1217_device);
device_add(&fdc_at_device);
device_add(&ide_isa_device);
device_add(&keyboard_ps2_device);
return ret;

View File

@@ -265,7 +265,7 @@ machine_at_mb500n_init(const machine_t *model)
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&piix_no_mirq_device);
device_add(&fdc37c665_device);
device_add(&intel_flash_bxt_device);

View File

@@ -175,7 +175,7 @@ machine_xt86_init(const machine_t *model)
static void
machine_xt_clone_init(const machine_t *model)
{
device_add(&keyboard_xt86_device);
device_add(&keyboard_xtclone_device);
machine_xt_common_init(model);
}
@@ -581,3 +581,19 @@ machine_xt_bw230_init(const machine_t *model)
return ret;
}
int
machine_xt_v20xt_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/v20xt/V20XTBios.bin",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_xt_clone_init(model);
return ret;
}

View File

@@ -8,7 +8,7 @@
*
* Emulation of the Olivetti XT-compatible machines.
*
*
* - Supports MM58174 real-time clock emulation
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -25,6 +25,7 @@
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <stdarg.h>
#include <wchar.h>
#include <86box/86box.h>
@@ -69,6 +70,28 @@
#define CGA_RGB 0
#define CGA_COMPOSITE 1
enum MM58174_ADDR {
/* Registers */
MM58174_TEST, /* TEST register, write only */
MM58174_TENTHS, /* Tenths of second, read only */
MM58174_SECOND1, /* Units of seconds, read only */
MM58174_SECOND10, /* Tens of seconds, read only */
MM58174_MINUTE1,
MM58174_MINUTE10,
MM58174_HOUR1,
MM58174_HOUR10,
MM58174_DAY1,
MM58174_DAY10,
MM58174_WEEKDAY,
MM58174_MONTH1,
MM58174_MONTH10,
MM58174_LEAPYEAR, /* Leap year status, write only */
MM58174_RESET, /* RESET register, write only */
MM58174_IRQ /* Interrupt register, read / write */
};
static struct tm intclk;
typedef struct {
/* Keyboard stuff. */
int wantirq;
@@ -120,6 +143,170 @@ m24_log(const char *fmt, ...)
# define m24_log(fmt, ...)
#endif
/* Set the chip time. */
static void
mm58174_time_set(uint8_t *regs, struct tm *tm)
{
regs[MM58174_SECOND1] = (tm->tm_sec % 10);
regs[MM58174_SECOND10] = (tm->tm_sec / 10);
regs[MM58174_MINUTE1] = (tm->tm_min % 10);
regs[MM58174_MINUTE10] = (tm->tm_min / 10);
regs[MM58174_HOUR1] = (tm->tm_hour % 10);
regs[MM58174_HOUR10] = (tm->tm_hour / 10);
regs[MM58174_WEEKDAY] = (tm->tm_wday + 1);
regs[MM58174_DAY1] = (tm->tm_mday % 10);
regs[MM58174_DAY10] = (tm->tm_mday / 10);
regs[MM58174_MONTH1] = ((tm->tm_mon + 1) % 10);
regs[MM58174_MONTH10] = ((tm->tm_mon + 1) / 10);
/* MM87174 does not store the year, M24 uses the IRQ register to count 8 years from leap year */
regs[MM58174_IRQ] = ((tm->tm_year + 1900) % 8);
regs[MM58174_LEAPYEAR] = 8 >> ((regs[MM58174_IRQ] & 0x07) & 0x03);
}
/* Get the chip time. */
#define nibbles(a) (regs[(a##1)] + 10 * regs[(a##10)])
static void
mm58174_time_get(uint8_t *regs, struct tm *tm)
{
tm->tm_sec = nibbles(MM58174_SECOND);
tm->tm_min = nibbles(MM58174_MINUTE);
tm->tm_hour = nibbles(MM58174_HOUR);
tm->tm_wday = (regs[MM58174_WEEKDAY] - 1);
tm->tm_mday = nibbles(MM58174_DAY);
tm->tm_mon = (nibbles(MM58174_MONTH) - 1);
/* MM87174AN does not store the year */
tm->tm_year = (1984 + (regs[MM58174_IRQ] & 0x07) - 1900);
}
/* One more second has passed, update the internal clock. */
static void
mm58174_recalc()
{
/* Ping the internal clock. */
if (++intclk.tm_sec == 60) {
intclk.tm_sec = 0;
if (++intclk.tm_min == 60) {
intclk.tm_min = 0;
if (++intclk.tm_hour == 24) {
intclk.tm_hour = 0;
if (++intclk.tm_mday == (nvr_get_days(intclk.tm_mon, intclk.tm_year) + 1)) {
intclk.tm_mday = 1;
if (++intclk.tm_mon == 13) {
intclk.tm_mon = 1;
intclk.tm_year++;
}
}
}
}
}
}
/* This is called every second through the NVR/RTC hook. */
static void
mm58174_tick(nvr_t *nvr)
{
mm58174_recalc();
mm58174_time_set(nvr->regs, &intclk);
}
static void
mm58174_start(nvr_t *nvr)
{
struct tm tm;
/* Initialize the internal and chip times. */
if (time_sync & TIME_SYNC_ENABLED) {
/* Use the internal clock's time. */
nvr_time_get(&tm);
mm58174_time_set(nvr->regs, &tm);
} else {
/* Set the internal clock from the chip time. */
mm58174_time_get(nvr->regs, &tm);
nvr_time_set(&tm);
}
mm58174_time_get(nvr->regs, &intclk);
}
/* Write to one of the chip registers. */
static void
mm58174_write(uint16_t addr, uint8_t val, void *priv)
{
nvr_t *nvr = (nvr_t *) priv;
addr &= 0x0f;
val &= 0x0f;
/* Update non-read-only changed values if not synchronizing time to host */
if ((addr != MM58174_TENTHS) && (addr != MM58174_SECOND1) && (addr != MM58174_SECOND10))
if ((nvr->regs[addr] != val) && !(time_sync & TIME_SYNC_ENABLED))
nvr_dosave = 1;
if ((addr == MM58174_RESET) && (val & 0x01)) {
/* When timer starts, MM58174 sets seconds and tenths of second to 0 */
nvr->regs[MM58174_TENTHS] = 0;
if (!(time_sync & TIME_SYNC_ENABLED)) {
/* Only set seconds to 0 if not synchronizing time to host clock */
nvr->regs[MM58174_SECOND1] = 0;
nvr->regs[MM58174_SECOND10] = 0;
}
}
/* Store the new value */
nvr->regs[addr] = val;
/* Update internal clock with MM58174 time */
mm58174_time_get(nvr->regs, &intclk);
}
/* Read from one of the chip registers. */
static uint8_t
mm58174_read(uint16_t addr, void *priv)
{
nvr_t *nvr = (nvr_t *) priv;
addr &= 0x0f;
/* Set IRQ control bit to 0 upon read */
if (addr == 0x0f)
nvr->regs[addr] &= 0x07;
/* Grab and return the desired value */
return (nvr->regs[addr]);
}
/* Reset the MM58174 to a default state. */
static void
mm58174_reset(nvr_t *nvr)
{
/* Clear the NVRAM. */
memset(nvr->regs, 0xff, nvr->size);
/* Reset the RTC registers. */
memset(nvr->regs, 0x00, 16);
nvr->regs[MM58174_WEEKDAY] = 0x01;
nvr->regs[MM58174_DAY1] = 0x01;
nvr->regs[MM58174_MONTH1] = 0x01;
}
static void
mm58174_init(nvr_t *nvr, int size)
{
/* This is machine specific. */
nvr->size = size;
nvr->irq = -1;
/* Set up any local handlers here. */
nvr->reset = mm58174_reset;
nvr->start = mm58174_start;
nvr->tick = mm58174_tick;
/* Initialize the actual NVR. */
nvr_init(nvr);
io_sethandler(0x0070, 16,
mm58174_read, NULL, NULL, mm58174_write, NULL, NULL, nvr);
}
static void
m24_kbd_poll(void *priv)
{
@@ -668,7 +855,7 @@ m24_read(uint16_t port, void *priv)
ret |= 0x1;
break;
case 256:
ret |= 0x2 | 0x80;
ret |= 0x2;
break;
case 384:
ret |= 0x1 | 0x2 | 0x80;
@@ -677,10 +864,12 @@ m24_read(uint16_t port, void *priv)
ret |= 0x8;
break;
case 640:
default:
ret |= 0x1 | 0x8 | 0x80;
break;
default:
break;
}
break;
/*
* port 67:
* DIPSW-1 on mainboard (off=present=1)
@@ -722,6 +911,8 @@ m24_read(uint16_t port, void *priv)
/* Switch 2 - Set fast startup */
ret |= 0x2;
break;
}
return (ret);
@@ -732,6 +923,7 @@ machine_xt_m24_init(const machine_t *model)
{
int ret;
m24_kbd_t *m24_kbd;
nvr_t *nvr;
ret = bios_load_interleaved("roms/machines/m24/olivetti_m24_bios_version_1.44_low_even.bin",
"roms/machines/m24/olivetti_m24_bios_version_1.44_high_odd.bin",
@@ -752,13 +944,18 @@ machine_xt_m24_init(const machine_t *model)
/* Address 66-67 = mainboard dip-switch settings */
io_sethandler(0x0066, 2, m24_read, NULL, NULL, NULL, NULL, NULL, NULL);
/* FIXME: make sure this is correct?? */
device_add(&at_nvr_device);
standalone_gameport_type = &gameport_device;
nmi_init();
/* Allocate an NVR for this machine. */
nvr = (nvr_t *) malloc(sizeof(nvr_t));
if (nvr == NULL)
return (0);
memset(nvr, 0x00, sizeof(nvr_t));
mm58174_init(nvr, model->nvrmask + 1);
video_reset(gfxcard);
if (gfxcard == VID_INTERNAL)

View File

@@ -961,7 +961,7 @@ machine_xt_t1200_init(const machine_t *model)
device_add(&t1200_video_device);
if (hdc_current <= 1)
device_add(&st506_xt_victor_v86p_device);
device_add(&st506_xt_toshiba_t1200_device);
return ret;
}

View File

@@ -1103,6 +1103,42 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8088] Pravetz 16 / IMKO-4",
.internal_name = "pravetz16",
.type = MACHINE_TYPE_8088,
.chipset = MACHINE_CHIPSET_DISCRETE,
.init = machine_xt_pravetz16_imko4_init,
.pad = 0,
.pad0 = 0,
.pad1 = MACHINE_AVAILABLE,
.pad2 = 0,
.cpu = {
.package = CPU_PKG_8088,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_FLAGS_NONE,
.ram = {
.min = 64,
.max = 640,
.step = 64
},
.nvrmask = 0,
.kbc = KBC_IBM_PC_XT,
.kbc_p1 = 0xff00,
.gpio = 0xffffffff,
.device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8088] Sanyo SX-16",
.internal_name = "sansx16",
@@ -1611,18 +1647,18 @@ const machine_t machines[] = {
.net_device = NULL
},
{
.name = "[8088] Pravetz 16 / IMKO-4",
.internal_name = "pravetz16",
.name = "[V20] PC-XT",
.internal_name = "v20xt",
.type = MACHINE_TYPE_8088,
.chipset = MACHINE_CHIPSET_DISCRETE,
.init = machine_xt_pravetz16_imko4_init,
.init = machine_xt_v20xt_init,
.pad = 0,
.pad0 = 0,
.pad1 = MACHINE_AVAILABLE,
.pad2 = 0,
.cpu = {
.package = CPU_PKG_8088,
.block = CPU_BLOCK_NONE,
.block = CPU_BLOCK(CPU_8088),
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
@@ -1900,6 +1936,42 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Epson Equity LT",
.internal_name = "elt",
.type = MACHINE_TYPE_8086,
.chipset = MACHINE_CHIPSET_PROPRIETARY,
.init = machine_elt_init,
.pad = 0,
.pad0 = 0,
.pad1 = MACHINE_AVAILABLE,
.pad2 = 0,
.cpu = {
.package = CPU_PKG_8086,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_VIDEO,
.ram = {
.min = 640,
.max = 640,
.step = 640
},
.nvrmask = 0x3f,
.kbc = KBC_IBM_PC_XT,
.kbc_p1 = 0xff00,
.gpio = 0xffffffff,
.device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Olivetti M21/24/24SP",
.internal_name = "m24",
@@ -2045,42 +2117,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Victor V86P",
.internal_name = "v86p",
.type = MACHINE_TYPE_8086,
.chipset = MACHINE_CHIPSET_PROPRIETARY,
.init = machine_v86p_init,
.pad = 0,
.pad0 = 0,
.pad1 = MACHINE_AVAILABLE,
.pad2 = 0,
.cpu = {
.package = CPU_PKG_8086,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_VIDEO | MACHINE_MFM,
.ram = {
.min = 512,
.max = 1024,
.step = 128
},
.nvrmask = 127,
.kbc = KBC_IBM_PC_XT,
.kbc_p1 = 0xff00,
.gpio = 0xffffffff,
.device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Toshiba T1200",
.internal_name = "t1200",
@@ -2118,11 +2154,11 @@ const machine_t machines[] = {
.net_device = NULL
},
{
.name = "[8086] Epson Equity LT",
.internal_name = "elt",
.name = "[8086] Victor V86P",
.internal_name = "v86p",
.type = MACHINE_TYPE_8086,
.chipset = MACHINE_CHIPSET_PROPRIETARY,
.init = machine_elt_init,
.init = machine_v86p_init,
.pad = 0,
.pad0 = 0,
.pad1 = MACHINE_AVAILABLE,
@@ -2138,13 +2174,13 @@ const machine_t machines[] = {
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_VIDEO,
.flags = MACHINE_VIDEO | MACHINE_MFM,
.ram = {
.min = 640,
.max = 640,
.step = 640
.min = 512,
.max = 1024,
.step = 128
},
.nvrmask = 0x3f,
.nvrmask = 127,
.kbc = KBC_IBM_PC_XT,
.kbc_p1 = 0xff00,
.gpio = 0xffffffff,

View File

@@ -393,7 +393,7 @@ static int pcnetCanReceive(nic_t *dev);
int pcnet_do_log = ENABLE_PCNET_LOG;
static void
pcnetlog(int lvl, const char *fmt, ...)
pcnet_log(int lvl, const char *fmt, ...)
{
va_list ap;
@@ -404,7 +404,7 @@ pcnetlog(int lvl, const char *fmt, ...)
}
}
#else
# define pcnetlog(lvl, fmt, ...)
# define pcnet_log(lvl, fmt, ...)
#endif
static void
@@ -479,7 +479,7 @@ pcnetTmdLoad(nic_t *dev, TMD *tmd, uint32_t addr, int fRetIfNotOwn)
}
/* Double check the own bit; guest drivers might be buggy and lock prefixes in the recompiler are ignored by other threads. */
if (tmd->tmd1.own == 1 && !(ownbyte & 0x80))
pcnetlog(3, "%s: pcnetTmdLoad: own bit flipped while reading!!\n", dev->name);
pcnet_log(3, "%s: pcnetTmdLoad: own bit flipped while reading!!\n", dev->name);
if (!(ownbyte & 0x80))
tmd->tmd1.own = 0;
@@ -572,7 +572,7 @@ pcnetRmdLoad(nic_t *dev, RMD *rmd, uint32_t addr, int fRetIfNotOwn)
}
/* Double check the own bit; guest drivers might be buggy and lock prefixes in the recompiler are ignored by other threads. */
if (rmd->rmd1.own == 1 && !(ownbyte & 0x80))
pcnetlog(3, "%s: pcnetRmdLoad: own bit flipped while reading!!\n", dev->name);
pcnet_log(3, "%s: pcnetRmdLoad: own bit flipped while reading!!\n", dev->name);
if (!(ownbyte & 0x80))
rmd->rmd1.own = 0;
@@ -755,7 +755,7 @@ padr_match(nic_t *dev, const uint8_t *buf, int size)
padr[5] = dev->aCSR[14] >> 8;
result = !CSR_DRCVPA(dev) && !memcmp(hdr->ether_dhost, padr, 6);
pcnetlog(3, "%s: packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
pcnet_log(3, "%s: packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
"padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n",
dev->name,
hdr->ether_dhost[0], hdr->ether_dhost[1], hdr->ether_dhost[2],
@@ -771,7 +771,7 @@ padr_bcast(nic_t *dev, const uint8_t *buf, size_t size)
static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
struct ether_header *hdr = (struct ether_header *) buf;
int result = !CSR_DRCVBC(dev) && !memcmp(hdr->ether_dhost, aBCAST, 6);
pcnetlog(3, "%s: padr_bcast result=%d\n", dev->name, result);
pcnet_log(3, "%s: padr_bcast result=%d\n", dev->name, result);
return result;
}
@@ -817,7 +817,7 @@ pcnetTdraAddr(nic_t *dev, int idx)
static void
pcnetSoftReset(nic_t *dev)
{
pcnetlog(3, "%s: pcnetSoftReset\n", dev->name);
pcnet_log(3, "%s: pcnetSoftReset\n", dev->name);
dev->u32Lnkst = 0x40;
dev->GCRDRA = 0;
@@ -888,7 +888,7 @@ pcnetUpdateIrq(nic_t *dev)
if (dev->aCSR[4] & 0x0080) { /* UINTCMD */
dev->aCSR[4] &= ~0x0080; /* clear UINTCMD */
dev->aCSR[4] |= 0x0040; /* set UINT */
pcnetlog(2, "%s: user int\n", dev->name);
pcnet_log(2, "%s: user int\n", dev->name);
}
if (dev->aCSR[4] & csr0 & 0x0040 /* CSR_INEA */) {
@@ -906,7 +906,7 @@ pcnetUpdateIrq(nic_t *dev)
dev->aCSR[0] = csr0;
pcnetlog(2, "%s: pcnetUpdateIrq: iISR=%d\n", dev->name, iISR);
pcnet_log(2, "%s: pcnetUpdateIrq: iISR=%d\n", dev->name, iISR);
pcnet_do_irq(dev, iISR);
dev->iISR = iISR;
@@ -916,7 +916,7 @@ static void
pcnetInit(nic_t *dev)
{
int i;
pcnetlog(3, "%s: pcnetInit: init_addr=%#010x\n", dev->name, PHYSADDR(dev, CSR_IADR(dev)));
pcnet_log(3, "%s: pcnetInit: init_addr=%#010x\n", dev->name, PHYSADDR(dev, CSR_IADR(dev)));
/** @todo Documentation says that RCVRL and XMTRL are stored as two's complement!
* Software is allowed to write these registers directly. */
@@ -943,13 +943,13 @@ pcnetInit(nic_t *dev)
struct INITBLK32 initblk;
dev->GCUpperPhys = 0;
PCNET_INIT();
pcnetlog(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n",
pcnet_log(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n",
dev->name, initblk.rlen, initblk.tlen);
} else {
struct INITBLK16 initblk;
dev->GCUpperPhys = (0xff00 & (uint32_t) dev->aCSR[2]) << 16;
PCNET_INIT();
pcnetlog(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n",
pcnet_log(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n",
dev->name, initblk.rlen, initblk.tlen);
}
@@ -984,15 +984,15 @@ pcnetInit(nic_t *dev)
CSR_CRST(dev) = CSR_CRBC(dev) = CSR_NRST(dev) = CSR_NRBC(dev) = 0;
CSR_CXST(dev) = CSR_CXBC(dev) = CSR_NXST(dev) = CSR_NXBC(dev) = 0;
pcnetlog(1, "%s: Init: SWSTYLE=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]%s\n",
pcnet_log(1, "%s: Init: SWSTYLE=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]%s\n",
dev->name, BCR_SWSTYLE(dev),
dev->GCRDRA, CSR_RCVRL(dev), dev->GCTDRA, CSR_XMTRL(dev),
!dev->fSignalRxMiss ? " (CSR0_MISS disabled)" : "");
if (dev->GCRDRA & (dev->iLog2DescSize - 1))
pcnetlog(1, "%s: Warning: Misaligned RDRA\n", dev->name);
pcnet_log(1, "%s: Warning: Misaligned RDRA\n", dev->name);
if (dev->GCTDRA & (dev->iLog2DescSize - 1))
pcnetlog(1, "%s: Warning: Misaligned TDRA\n", dev->name);
pcnet_log(1, "%s: Warning: Misaligned TDRA\n", dev->name);
dev->aCSR[0] |= 0x0101; /* Initialization done */
dev->aCSR[0] &= ~0x0004; /* clear STOP bit */
@@ -1004,7 +1004,7 @@ pcnetInit(nic_t *dev)
static void
pcnetStart(nic_t *dev)
{
pcnetlog(3, "%s: pcnetStart: Poll timer\n", dev->name);
pcnet_log(3, "%s: pcnetStart: Poll timer\n", dev->name);
/* Reset any cached RX/TX descriptor state. */
CSR_CRDA(dev) = CSR_CRBA(dev) = CSR_NRDA(dev) = CSR_NRBA(dev) = 0;
@@ -1025,7 +1025,7 @@ pcnetStart(nic_t *dev)
static void
pcnetStop(nic_t *dev)
{
pcnetlog(3, "%s: pcnetStop: Poll timer\n", dev->name);
pcnet_log(3, "%s: pcnetStop: Poll timer\n", dev->name);
dev->aCSR[0] = 0x0004;
dev->aCSR[4] &= ~0x02c2;
dev->aCSR[5] &= ~0x0011;
@@ -1071,7 +1071,7 @@ pcnetRdtePoll(nic_t *dev)
* Don't flood the release log with errors.
*/
if (++dev->uCntBadRMD < 50)
pcnetlog(1, "%s: BAD RMD ENTRIES AT %#010x (i=%d)\n",
pcnet_log(1, "%s: BAD RMD ENTRIES AT %#010x (i=%d)\n",
dev->name, addr, i);
return;
}
@@ -1097,7 +1097,7 @@ pcnetRdtePoll(nic_t *dev)
* Don't flood the release log with errors.
*/
if (++dev->uCntBadRMD < 50)
pcnetlog(1, "%s: BAD RMD ENTRIES + AT %#010x (i=%d)\n",
pcnet_log(1, "%s: BAD RMD ENTRIES + AT %#010x (i=%d)\n",
dev->name, addr, i);
return;
}
@@ -1125,7 +1125,7 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd)
return 0;
if (tmd->tmd1.ones != 15) {
pcnetlog(1, "%s: BAD TMD XDA=%#010x\n",
pcnet_log(1, "%s: BAD TMD XDA=%#010x\n",
dev->name, PHYSADDR(dev, cxda));
return 0;
}
@@ -1177,20 +1177,20 @@ pcnetCalcPacketLen(nic_t *dev, int cb)
* No need to count further since this packet won't be sent anyway
* due to underflow.
*/
pcnetlog(3, "%s: pcnetCalcPacketLen: underflow, return %u\n", dev->name, cbPacket);
pcnet_log(3, "%s: pcnetCalcPacketLen: underflow, return %u\n", dev->name, cbPacket);
return cbPacket;
}
if (tmd.tmd1.ones != 15) {
pcnetlog(1, "%s: BAD TMD XDA=%#010x\n",
pcnet_log(1, "%s: BAD TMD XDA=%#010x\n",
dev->name, PHYSADDR(dev, addrDesc));
pcnetlog(3, "%s: pcnetCalcPacketLen: bad TMD, return %u\n", dev->name, cbPacket);
pcnet_log(3, "%s: pcnetCalcPacketLen: bad TMD, return %u\n", dev->name, cbPacket);
return cbPacket;
}
pcnetlog(3, "%s: pcnetCalcPacketLen: got valid TMD, cb=%u\n", dev->name, 4096 - tmd.tmd1.bcnt);
pcnet_log(3, "%s: pcnetCalcPacketLen: got valid TMD, cb=%u\n", dev->name, 4096 - tmd.tmd1.bcnt);
cbPacket += 4096 - tmd.tmd1.bcnt;
} while (!tmd.tmd1.enp);
pcnetlog(3, "#%d pcnetCalcPacketLen: return %u\n", dev->name, cbPacket);
pcnet_log(3, "#%d pcnetCalcPacketLen: return %u\n", dev->name, cbPacket);
return cbPacket;
}
@@ -1227,7 +1227,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
if (dev->fMaybeOutOfSpace)
return 0;
pcnetlog(1, "%s: pcnetReceiveNoSync: RX %x:%x:%x:%x:%x:%x > %x:%x:%x:%x:%x:%x len %d\n", dev->name,
pcnet_log(1, "%s: pcnetReceiveNoSync: RX %x:%x:%x:%x:%x:%x > %x:%x:%x:%x:%x:%x len %d\n", dev->name,
buf[6], buf[7], buf[8], buf[9], buf[10], buf[11],
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
size);
@@ -1258,7 +1258,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
dev->aCSR[0] |= 0x1000; /* Set MISS flag */
CSR_MISSC(dev)
++;
pcnetlog(2, "%s: pcnetReceiveNoSync: packet missed\n", dev->name);
pcnet_log(2, "%s: pcnetReceiveNoSync: packet missed\n", dev->name);
} else {
RTNETETHERHDR *pEth = (RTNETETHERHDR *) buf;
int fStrip = 0;
@@ -1331,7 +1331,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
/* RX disabled in the meantime? If so, abort RX. */
if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev)) {
pcnetlog(3, "%s: RX disabled 1\n", dev->name);
pcnet_log(3, "%s: RX disabled 1\n", dev->name);
return 0;
}
@@ -1374,7 +1374,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
/* RX disabled in the meantime? If so, abort RX. */
if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev)) {
pcnetlog(3, "%s: RX disabled 2\n", dev->name);
pcnet_log(3, "%s: RX disabled 2\n", dev->name);
return 0;
}
@@ -1400,7 +1400,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
rmd.rmd2.mcnt = cbPacket;
rmd.rmd2.zeros = 0;
} else {
pcnetlog(1, "%s: Overflow by %ubytes\n", dev->name, size);
pcnet_log(1, "%s: Overflow by %ubytes\n", dev->name, size);
rmd.rmd1.oflo = 1;
rmd.rmd1.buff = 1;
rmd.rmd1.err = 1;
@@ -1410,7 +1410,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
pcnetRmdStorePassHost(dev, &rmd, PHYSADDR(dev, crda));
dev->aCSR[0] |= 0x0400;
pcnetlog(1, "%s: RINT set, RCVRC=%d CRDA=%#010x\n", dev->name,
pcnet_log(1, "%s: RINT set, RCVRC=%d CRDA=%#010x\n", dev->name,
CSR_RCVRC(dev), PHYSADDR(dev, CSR_CRDA(dev)));
/* guest driver is owner: force repoll of current and next RDTEs */
@@ -1477,7 +1477,7 @@ pcnetAsyncTransmit(nic_t *dev)
&& dev->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED))
break;
pcnetlog(3, "%s: TMDLOAD %#010x\n", dev->name, PHYSADDR(dev, CSR_CXDA(dev)));
pcnet_log(3, "%s: TMDLOAD %#010x\n", dev->name, PHYSADDR(dev, CSR_CXDA(dev)));
int fLoopback = CSR_LOOP(dev);
@@ -1486,7 +1486,7 @@ pcnetAsyncTransmit(nic_t *dev)
*/
if (tmd.tmd1.stp && tmd.tmd1.enp) {
const int cb = 4096 - tmd.tmd1.bcnt;
pcnetlog("%s: pcnetAsyncTransmit: stp&enp: cb=%d xmtrc=%#x\n", dev->name, cb, CSR_XMTRC(dev));
pcnet_log("%s: pcnetAsyncTransmit: stp&enp: cb=%d xmtrc=%#x\n", dev->name, cb, CSR_XMTRC(dev));
if ((pcnetIsLinkUp(dev) || fLoopback)) {
@@ -1504,7 +1504,7 @@ pcnetAsyncTransmit(nic_t *dev)
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
} else {
pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos);
pcnet_log(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos);
network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos);
}
} else if (cb == 4096) {
@@ -1533,7 +1533,7 @@ pcnetAsyncTransmit(nic_t *dev)
* and later hardware is that the buffer lengths are *16-bit*
* two's complement numbers between 0 and 4096. AMD's drivers
* in fact generally treat the length as a 16-bit quantity. */
pcnetlog(1, "%s: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", dev->name);
pcnet_log(1, "%s: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", dev->name);
pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev)));
break;
} else {
@@ -1588,7 +1588,7 @@ pcnetAsyncTransmit(nic_t *dev)
if (!CSR_DXSUFLO(dev)) /* stop on xmit underflow */
dev->aCSR[0] &= ~0x0010; /* clear TXON */
pcnetTmdStorePassHost(dev, &tmd, GCPhysPrevTmd);
pcnetlog(3, "%s: pcnetAsyncTransmit: Underflow!!!\n", dev->name);
pcnet_log(3, "%s: pcnetAsyncTransmit: Underflow!!!\n", dev->name);
break;
}
@@ -1614,10 +1614,10 @@ pcnetAsyncTransmit(nic_t *dev)
if (HOST_IS_OWNER(CSR_CRST(dev)))
pcnetRdtePoll(dev);
pcnetlog(3, "%s: pcnetAsyncTransmit: receive loopback enp\n", dev->name);
pcnet_log(3, "%s: pcnetAsyncTransmit: receive loopback enp\n", dev->name);
pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos);
} else {
pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name);
pcnet_log(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name);
network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos);
}
@@ -1694,7 +1694,7 @@ pcnetPollTimer(void *p)
static void
pcnetHardReset(nic_t *dev)
{
pcnetlog(2, "%s: pcnetHardReset\n", dev->name);
pcnet_log(2, "%s: pcnetHardReset\n", dev->name);
dev->iISR = 0;
pcnet_do_irq(dev, 0);
@@ -1730,7 +1730,7 @@ pcnetHardReset(nic_t *dev)
static void
pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
{
pcnetlog(1, "%s: pcnet_csr_writew: rap=%d val=%#06x\n", dev->name, rap, val);
pcnet_log(1, "%s: pcnet_csr_writew: rap=%d val=%#06x\n", dev->name, rap, val);
switch (rap) {
case 0:
{
@@ -1745,27 +1745,27 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
if ((val & 7) == 7)
val &= ~3;
pcnetlog(2, "%s: CSR0 val = %04x, val2 = %04x\n", dev->name, val, dev->aCSR[0]);
pcnet_log(2, "%s: CSR0 val = %04x, val2 = %04x\n", dev->name, val, dev->aCSR[0]);
dev->aCSR[0] = csr0;
if (!CSR_STOP(dev) && (val & 4)) {
pcnetlog(3, "%s: pcnet_csr_writew(): Stop\n", dev->name);
pcnet_log(3, "%s: pcnet_csr_writew(): Stop\n", dev->name);
pcnetStop(dev);
}
if (!CSR_INIT(dev) && (val & 1)) {
pcnetlog(3, "%s: pcnet_csr_writew(): Init\n", dev->name);
pcnet_log(3, "%s: pcnet_csr_writew(): Init\n", dev->name);
pcnetInit(dev);
}
if (!CSR_STRT(dev) && (val & 2)) {
pcnetlog(3, "%s: pcnet_csr_writew(): Start\n", dev->name);
pcnet_log(3, "%s: pcnet_csr_writew(): Start\n", dev->name);
pcnetStart(dev);
}
if (CSR_TDMD(dev)) {
pcnetlog(3, "%s: pcnet_csr_writew(): Transmit\n", dev->name);
pcnet_log(3, "%s: pcnet_csr_writew(): Transmit\n", dev->name);
pcnetAsyncTransmit(dev);
}
}
@@ -1850,16 +1850,16 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
case 24: /* BADRL */
case 25: /* BADRU */
if (!CSR_STOP(dev) && !CSR_SPND(dev)) {
pcnetlog(3, "%s: WRITE CSR%d, %#06x, ignoring!!\n", dev->name, rap, val);
pcnet_log(3, "%s: WRITE CSR%d, %#06x, ignoring!!\n", dev->name, rap, val);
return;
}
if (rap == 24)
dev->GCRDRA = (dev->GCRDRA & 0xffff0000) | (val & 0x0000ffff);
else
dev->GCRDRA = (dev->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCRDRA);
pcnet_log(3, "%s: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCRDRA);
if (dev->GCRDRA & (dev->iLog2DescSize - 1))
pcnetlog(1, "%s: Warning: Misaligned RDRA (GCRDRA=%#010x)\n", dev->name, dev->GCRDRA);
pcnet_log(1, "%s: Warning: Misaligned RDRA (GCRDRA=%#010x)\n", dev->name, dev->GCRDRA);
break;
/*
* 30 & 31 are the Base Address of Transmit Descriptor.
@@ -1868,7 +1868,7 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
case 30: /* BADXL */
case 31: /* BADXU */
if (!CSR_STOP(dev) && !CSR_SPND(dev)) {
pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val);
pcnet_log(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val);
return;
}
if (rap == 30)
@@ -1876,10 +1876,10 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
else
dev->GCTDRA = (dev->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCTDRA);
pcnet_log(3, "%s: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCTDRA);
if (dev->GCTDRA & (dev->iLog2DescSize - 1))
pcnetlog(1, "%s: Warning: Misaligned TDRA (GCTDRA=%#010x)\n", dev->name, dev->GCTDRA);
pcnet_log(1, "%s: Warning: Misaligned TDRA (GCTDRA=%#010x)\n", dev->name, dev->GCTDRA);
break;
case 58: /* Software Style */
pcnet_bcr_writew(dev, BCR_SWS, val);
@@ -1893,10 +1893,10 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */
/** @todo transmit ring length is stored in two's complement! */
if (!CSR_STOP(dev) && !CSR_SPND(dev)) {
pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val);
pcnet_log(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val);
return;
}
pcnetlog(3, "%s: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", dev->name,
pcnet_log(3, "%s: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", dev->name,
rap, val, 1 + ~val);
val = 1 + ~val;
@@ -1951,7 +1951,7 @@ pcnet_csr_readw(nic_t *dev, uint16_t rap)
val = dev->aCSR[rap];
break;
}
pcnetlog(3, "%s: pcnet_csr_readw rap=%d val=0x%04x\n", dev->name, rap, val);
pcnet_log(3, "%s: pcnet_csr_readw rap=%d val=0x%04x\n", dev->name, rap, val);
return val;
}
@@ -1959,7 +1959,7 @@ static void
pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val)
{
rap &= 0x7f;
pcnetlog(3, "%s: pcnet_bcr_writew rap=%d val=0x%04x\n", dev->name, rap, val);
pcnet_log(3, "%s: pcnet_bcr_writew rap=%d val=0x%04x\n", dev->name, rap, val);
switch (rap) {
case BCR_SWS:
if (!(CSR_STOP(dev) || CSR_SPND(dev)))
@@ -2194,14 +2194,14 @@ pcnet_bcr_readw(nic_t *dev, uint16_t rap)
break;
}
pcnetlog(3, "pcnet_bcr_readw rap=%d val=0x%04x\n", rap, val);
pcnet_log(3, "pcnet_bcr_readw rap=%d val=0x%04x\n", rap, val);
return val;
}
static void
pcnet_word_write(nic_t *dev, uint32_t addr, uint16_t val)
{
pcnetlog(3, "%s: pcnet_word_write: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
pcnet_log(3, "%s: pcnet_word_write: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
if (!BCR_DWIO(dev)) {
switch (addr & 0x0f) {
@@ -2236,7 +2236,7 @@ pcnet_byte_read(nic_t *dev, uint32_t addr)
pcnetUpdateIrq(dev);
pcnetlog(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
pcnet_log(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
return (val);
}
@@ -2274,7 +2274,7 @@ pcnet_word_read(nic_t *dev, uint32_t addr)
pcnetUpdateIrq(dev);
skip_update_irq:
pcnetlog(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
pcnet_log(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev));
return (val);
}
@@ -2299,7 +2299,7 @@ pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val)
} else if ((addr & 0x0f) == 0) {
/* switch device to dword i/o mode */
pcnet_bcr_writew(dev, BCR_BSBC, pcnet_bcr_readw(dev, BCR_BSBC) | 0x0080);
pcnetlog(3, "%s: device switched into dword i/o mode\n", dev->name);
pcnet_log(3, "%s: device switched into dword i/o mode\n", dev->name);
};
}
@@ -2333,7 +2333,7 @@ pcnet_dword_read(nic_t *dev, uint32_t addr)
pcnetUpdateIrq(dev);
skip_update_irq:
pcnetlog(3, "%s: Read Long mode, addr = %08x, val = %08x\n", dev->name, addr, val);
pcnet_log(3, "%s: Read Long mode, addr = %08x, val = %08x\n", dev->name, addr, val);
return (val);
}
@@ -2358,7 +2358,7 @@ pcnet_write(nic_t *dev, uint32_t addr, uint32_t val, int len)
{
uint16_t off = addr & 0x1f;
pcnetlog(3, "%s: write addr %x, val %x, off %x, len %d\n", dev->name, addr, val, off, len);
pcnet_log(3, "%s: write addr %x, val %x, off %x, len %d\n", dev->name, addr, val, off, len);
if (off < 0x10) {
if (!BCR_DWIO(dev) && len == 1)
@@ -2404,7 +2404,7 @@ pcnet_read(nic_t *dev, uint32_t addr, int len)
uint32_t retval = 0xffffffff;
uint16_t off = addr & 0x1f;
pcnetlog(3, "%s: read addr %x, off %x, len %d\n", dev->name, addr, off, len);
pcnet_log(3, "%s: read addr %x, off %x, len %d\n", dev->name, addr, off, len);
if (off < 0x10) {
if (!BCR_DWIO(dev) && len == 1)
@@ -2423,7 +2423,7 @@ pcnet_read(nic_t *dev, uint32_t addr, int len)
retval = pcnet_dword_read(dev, addr);
}
pcnetlog(3, "%s: value in read - %08x\n", dev->name, retval);
pcnet_log(3, "%s: value in read - %08x\n", dev->name, retval);
return (retval);
}
@@ -2538,7 +2538,7 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
nic_t *dev = (nic_t *) p;
uint8_t valxor;
pcnetlog(4, "%s: Write value %02X to register %02X\n", dev->name, val, addr & 0xff);
pcnet_log(4, "%s: Write value %02X to register %02X\n", dev->name, val, addr & 0xff);
switch (addr) {
case 0x04:
@@ -2577,7 +2577,7 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
pcnet_pci_bar[0].addr &= 0xff00;
dev->PCIBase = pcnet_pci_bar[0].addr;
/* Log the new base. */
pcnetlog(4, "%s: New I/O base is %04X\n", dev->name, dev->PCIBase);
pcnet_log(4, "%s: New I/O base is %04X\n", dev->name, dev->PCIBase);
/* We're done, so get out of the here. */
if (pcnet_pci_regs[4] & PCI_COMMAND_IO) {
if (dev->PCIBase != 0)
@@ -2597,7 +2597,7 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
pcnet_pci_bar[1].addr &= 0xffffc000;
dev->MMIOBase = pcnet_pci_bar[1].addr & 0xffffc000;
/* Log the new base. */
pcnetlog(4, "%s: New MMIO base is %08X\n", dev->name, dev->MMIOBase);
pcnet_log(4, "%s: New MMIO base is %08X\n", dev->name, dev->MMIOBase);
/* We're done, so get out of the here. */
if (pcnet_pci_regs[4] & PCI_COMMAND_MEM) {
if (dev->MMIOBase != 0)
@@ -2617,7 +2617,7 @@ pcnet_pci_read(int func, int addr, void *p)
{
nic_t *dev = (nic_t *) p;
pcnetlog(4, "%s: Read to register %02X\n", dev->name, addr & 0xff);
pcnet_log(4, "%s: Read to register %02X\n", dev->name, addr & 0xff);
switch (addr) {
case 0x00:
@@ -2983,12 +2983,12 @@ pcnet_init(const device_t *info)
pcnet_ioset(dev, dev->base_address, 0x20);
}
pcnetlog(2, "%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
pcnet_log(2, "%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
dev->name, dev->base_address, dev->base_irq,
dev->aPROM[0], dev->aPROM[1], dev->aPROM[2],
dev->aPROM[3], dev->aPROM[4], dev->aPROM[5]);
pcnetlog(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name,
pcnet_log(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name,
dev->is_pci ? "PCI" : "VLB/ISA", dev->base_address, dev->base_irq);
/* Reset the board. */
@@ -3013,7 +3013,7 @@ pcnet_close(void *priv)
{
nic_t *dev = (nic_t *) priv;
pcnetlog(1, "%s: closed\n", dev->name);
pcnet_log(1, "%s: closed\n", dev->name);
netcard_close(dev->netcard);

View File

@@ -56,6 +56,9 @@
#include <stdlib.h>
#include <wchar.h>
#include <time.h>
#ifndef _WIN32
#include <sys/time.h>
#endif /* _WIN32 */
#include <stdbool.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
@@ -125,7 +128,7 @@ netdev_t network_devs[NET_HOST_INTF_MAX];
/* Local variables. */
#ifdef ENABLE_NETWORK_LOG
#if defined ENABLE_NETWORK_LOG && !defined(_WIN32)
int network_do_log = ENABLE_NETWORK_LOG;
static FILE *network_dump = NULL;
static mutex_t *network_dump_mutex;
@@ -215,7 +218,7 @@ network_init(void)
if (i > 0)
network_ndev += i;
#ifdef ENABLE_NETWORK_LOG
#if defined ENABLE_NETWORK_LOG && !defined(_WIN32)
/* Start packet dump. */
network_dump = fopen("network.pcap", "wb");
@@ -471,7 +474,7 @@ netcard_close(netcard_t *card)
void
network_close(void)
{
#ifdef ENABLE_NETWORK_LOG
#if defined ENABLE_NETWORK_LOG && !defined(_WIN32)
thread_close_mutex(network_dump_mutex);
network_dump_mutex = NULL;
#endif
@@ -494,7 +497,7 @@ network_reset(void)
ui_sb_update_icon(SB_NETWORK, 0);
#ifdef ENABLE_NETWORK_LOG
#if defined ENABLE_NETWORK_LOG && !defined(_WIN32)
network_dump_mutex = thread_create_mutex();
#endif

View File

@@ -46,6 +46,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -54,6 +55,7 @@
#include <ctype.h>
#include <pcap/pcap.h>
#include <time.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/plat.h>
#include <86box/plat_dynld.h>
@@ -243,16 +245,6 @@ show_devs(capdev_t *list, int num)
}
}
void
pclog(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
vfprintf(stderr, fmt, ap);
va_end(ap);
}
int
main(int argc, char **argv)
{

View File

@@ -44,6 +44,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -52,6 +53,7 @@
#include <errno.h>
#define PNG_DEBUG 0
#include <png.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/plat.h>
#include <86box/plat_dynld.h>
@@ -73,15 +75,15 @@
#define PNGFUNC(x) png_##x
#ifdef ENABLE_ESCP_LOG
int png_do_log = ENABLE_ESCP_LOG;
#ifdef ENABLE_PNG_LOG
int png_do_log = ENABLE_PNG_LOG;
static void
png_log(const char *fmt, ...)
{
va_list ap;
if (escp_do_log) {
if (png_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);

View File

@@ -48,6 +48,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -56,6 +57,7 @@
#include <math.h>
#include <ft2build.h>
#include FT_FREETYPE_H
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -1620,7 +1620,18 @@ void MainWindow::keyPressEvent(QKeyEvent* event)
if (send_keyboard_input && !(kbd_req_capture && !mouse_capture && !video_fullscreen))
{
// Windows keys in Qt have one-to-one mapping.
if (event->key() == Qt::Key_Super_L || event->key() == Qt::Key_Super_R) {
if (event->key() == Qt::Key_Pause && !keyboard_recv(0x38) && !keyboard_recv(0x138)) {
if ((keyboard_recv(0x1D) || keyboard_recv(0x11D))) {
keyboard_input(1, 0x46);
} else {
keyboard_input(0, 0xE1);
keyboard_input(0, 0x1D);
keyboard_input(0, 0x45);
keyboard_input(0, 0xE1);
keyboard_input(1, 0x1D);
keyboard_input(1, 0x45);
}
} else if (event->key() == Qt::Key_Super_L || event->key() == Qt::Key_Super_R) {
keyboard_input(1, event->key() == Qt::Key_Super_L ? 0x15B : 0x15C);
} else
#ifdef Q_OS_MACOS
@@ -1637,6 +1648,12 @@ void MainWindow::keyPressEvent(QKeyEvent* event)
if (keyboard_ismsexit()) {
plat_mouse_capture(0);
}
if ((video_fullscreen > 0) && (keyboard_recv(0x1D) || keyboard_recv(0x11D))) {
if (keyboard_recv(0x57)) ui->actionTake_screenshot->trigger();
else if (keyboard_recv(0x58)) pc_send_cad();
}
event->accept();
}
@@ -1651,6 +1668,11 @@ void MainWindow::blitToWidget(int x, int y, int w, int h, int monitor_index)
void MainWindow::keyReleaseEvent(QKeyEvent* event)
{
if (event->key() == Qt::Key_Pause) {
if (keyboard_recv(0x38) && keyboard_recv(0x138)) {
plat_pause(dopause ^ 1);
}
}
if (!send_keyboard_input)
return;

View File

@@ -85,7 +85,7 @@ void mouse_poll() {
extern "C" int vid_resize;
void plat_resize_request(int w, int h, int monitor_index)
{
if (is_quit) return;
if (video_fullscreen || is_quit) return;
if (vid_resize & 2) {
plat_resize_monitor(fixed_size_x, fixed_size_y, monitor_index);
}

View File

@@ -36,7 +36,6 @@
#ifdef ENABLE_JOYSTICK_LOG
int joystick_do_log = ENABLE_JOYSTICK_LOG;
static void
joystick_log(const char *fmt, ...)
{

View File

@@ -20,11 +20,11 @@
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>

View File

@@ -15,8 +15,8 @@
*
* Copyright 2016-2020 Miran Grca.
*/
#include <inttypes.h>
#include <stdarg.h>
#include <inttypes.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
@@ -689,6 +689,7 @@ scsi_cdrom_command_complete(scsi_cdrom_t *dev)
ui_sb_update_icon(SB_CDROM | dev->id, 0);
dev->packet_status = PHASE_COMPLETE;
scsi_cdrom_command_common(dev);
dev->phase = 3;
}
static void
@@ -696,6 +697,7 @@ scsi_cdrom_command_read(scsi_cdrom_t *dev)
{
dev->packet_status = PHASE_DATA_IN;
scsi_cdrom_command_common(dev);
dev->phase = !(dev->packet_status & 0x01) << 1;
}
static void
@@ -710,6 +712,7 @@ scsi_cdrom_command_write(scsi_cdrom_t *dev)
{
dev->packet_status = PHASE_DATA_OUT;
scsi_cdrom_command_common(dev);
dev->phase = !(dev->packet_status & 0x01) << 1;
}
static void

View File

@@ -879,17 +879,10 @@ ncr53c8xx_do_msgout(ncr53c8xx_t *dev, uint8_t id)
{
uint8_t msg;
int len, arg;
#ifdef ENABLE_NCR53C8XX_LOG
uint32_t current_tag;
#endif
scsi_device_t *sd;
sd = &scsi_devices[dev->bus][id];
#ifdef ENABLE_NCR53C8XX_LOG
current_tag = id;
#endif
ncr53c8xx_log("MSG out len=%d\n", dev->dbc);
while (dev->dbc) {
msg = ncr53c8xx_get_msgbyte(dev);
@@ -1011,9 +1004,6 @@ ncr53c8xx_process_script(ncr53c8xx_t *dev)
int opcode, insn_processed = 0, reg, operator, cond, jmp, n, i, c;
int32_t offset;
uint8_t op0, op1, data8, mask, data[7];
#ifdef ENABLE_NCR53C8XX_LOG
uint8_t *pp;
#endif
dev->sstop = 0;
again:
@@ -1337,10 +1327,6 @@ again:
dev->dsp += 4;
ncr53c8xx_memcpy(dev, dest, addr, insn & 0xffffff);
} else {
#ifdef ENABLE_NCR53C8XX_LOG
pp = data;
#endif
if (insn & (1 << 28))
addr = dev->dsa + sextract32(addr, 0, 24);
n = (insn & 7);

View File

@@ -957,7 +957,7 @@ x54x_scsi_cmd_phase1(x54x_t *dev)
}
dev->callback_sub_phase = 3;
x54x_log("scsi_devices[%02xi][%02i].Status = %02X\n", x54x->bus, req->TargetID, sd->status);
x54x_log("scsi_devices[%02xi][%02i].Status = %02X\n", dev->bus, req->TargetID, sd->status);
}
static void

View File

@@ -60,6 +60,24 @@ typedef struct upc_t {
serial_t *uart[2];
} upc_t;
#ifdef ENABLE_F82C710_LOG
int f82c710_do_log = ENABLE_F82C710_LOG;
static void
f82c710_log(const char *fmt, ...)
{
va_list ap;
if (f82c710_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define f82c710_log(fmt, ...)
#endif
static void
f82c710_update_ports(upc_t *dev, int set)
{
@@ -171,28 +189,28 @@ f82c606_update_ports(upc_t *dev, int set)
if (dev->regs[0] & 1) {
gameport_remap(dev->gameport, ((uint16_t) dev->regs[7]) << 2);
pclog("Game port at %04X\n", ((uint16_t) dev->regs[7]) << 2);
f82c710_log("Game port at %04X\n", ((uint16_t) dev->regs[7]) << 2);
}
if (dev->regs[0] & 2) {
serial_setup(dev->uart[0], ((uint16_t) dev->regs[4]) << 2, uart1_int);
pclog("UART 1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[4]) << 2, uart1_int);
f82c710_log("UART 1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[4]) << 2, uart1_int);
}
if (dev->regs[0] & 4) {
serial_setup(dev->uart[1], ((uint16_t) dev->regs[5]) << 2, uart2_int);
pclog("UART 2 at %04X, IRQ %i\n", ((uint16_t) dev->regs[5]) << 2, uart2_int);
f82c710_log("UART 2 at %04X, IRQ %i\n", ((uint16_t) dev->regs[5]) << 2, uart2_int);
}
if (dev->regs[0] & 8) {
lpt1_init(((uint16_t) dev->regs[6]) << 2);
lpt1_irq(lpt1_int);
pclog("LPT1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[6]) << 2, lpt1_int);
f82c710_log("LPT1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[6]) << 2, lpt1_int);
}
nvr_at_handler(1, ((uint16_t) dev->regs[3]) << 2, dev->nvr);
nvr_irq_set(nvr_int, dev->nvr);
pclog("RTC at %04X, IRQ %i\n", ((uint16_t) dev->regs[3]) << 2, nvr_int);
f82c710_log("RTC at %04X, IRQ %i\n", ((uint16_t) dev->regs[3]) << 2, nvr_int);
}
static uint8_t

View File

@@ -45,6 +45,7 @@
#ifdef ENABLE_PC87310_LOG
int pc87310_do_log = ENABLE_PC87310_LOG;
static void
pc87310_log(const char *fmt, ...)
{

View File

@@ -45,6 +45,7 @@
#ifdef ENABLE_PC87311_LOG
int pc87311_do_log = ENABLE_PC87311_LOG;
static void
pc87311_log(const char *fmt, ...)
{

View File

@@ -37,6 +37,7 @@
#ifdef ENABLE_PRIME3B_LOG
int prime3b_do_log = ENABLE_PRIME3B_LOG;
static void
prime3b_log(const char *fmt, ...)
{

View File

@@ -32,6 +32,7 @@
#ifdef ENABLE_PRIME3C_LOG
int prime3c_do_log = ENABLE_PRIME3C_LOG;
static void
prime3c_log(const char *fmt, ...)
{

View File

@@ -39,6 +39,7 @@
#ifdef ENABLE_W83787_LOG
int w83787_do_log = ENABLE_W83787_LOG;
static void
w83787_log(const char *fmt, ...)
{

View File

@@ -495,10 +495,6 @@ es1371_read_frame_reg(es1371_t *dev, int frame, int page)
break;
}
if (page == 0x0e || page == 0x0f) {
audiopci_log("Read frame = %02x, page = %02x, uart fifo valid = %02x, temp = %03x\n", frame, page, dev->valid, ret);
}
return ret;
}

View File

@@ -37,11 +37,13 @@
* Copyright 2016-2020 Miran Grca.
* Copyright 2013-2018 Alexey Khokholov (Nuke.YKT)
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/snd_opl_nuked.h>
#include <86box/sound.h>
@@ -208,14 +210,18 @@ enum {
};
#ifdef ENABLE_OPL_LOG
int nuked_do_log = ENABLE_OPL_LOG;
static void
nuked_log(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
if (nuked_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define nuked_log(fmt, ...)

View File

@@ -13,7 +13,7 @@
*
* Copyright 2022 Adrien Moulin.
*/
#include <cstdarg>
#include <cstdint>
#include <cstdio>
#include <cstdlib>
@@ -21,6 +21,7 @@
#include "ymfm/ymfm_opl.h"
extern "C" {
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/timer.h>
#include <86box/device.h>
@@ -225,15 +226,18 @@ extern "C" {
#include <86box/snd_opl.h>
#ifdef ENABLE_OPL_LOG
int ymfm_do_log = ENABLE_OPL_LOG;
static void
ymfm_log(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
if (ymfm_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define ymfm_log(fmt, ...)

View File

@@ -706,7 +706,7 @@ mouse_poll()
mouse_y = mousedata.deltay;
mouse_z = mousedata.deltaz;
mousedata.deltax = mousedata.deltay = mousedata.deltaz = 0;
mouse_buttons = mousedata.mousebuttons;
mouse_buttons = mousedata.mousebuttons;
SDL_UnlockMutex(mousemutex);
}
@@ -1171,6 +1171,12 @@ main(int argc, char **argv)
case SDL_BUTTON_MIDDLE:
buttonmask = 4;
break;
case SDL_BUTTON_X1:
buttonmask = 8;
break;
case SDL_BUTTON_X2:
buttonmask = 16;
break;
}
SDL_LockMutex(mousemutex);
if (event.button.state == SDL_PRESSED) {

View File

@@ -18,12 +18,14 @@
* Copyright 2008-2019 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/io.h>

View File

@@ -16,11 +16,13 @@
* Copyright 2019 Sarah Walker.
* Copyright 2019 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/io.h>

View File

@@ -20,11 +20,13 @@
*
* Copyright 2016-2018 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>

View File

@@ -16,11 +16,13 @@
*
* Copyright 2020 Miran Grca.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
@@ -28,8 +30,8 @@ typedef struct ics2494_t {
float freq[16];
} ics2494_t;
#ifdef ENABLE_ics2494_LOG
int ics2494_do_log = ENABLE_ics2494_LOG;
#ifdef ENABLE_ICS2494_LOG
int ics2494_do_log = ENABLE_ICS2494_LOG;
static void
ics2494_log(const char *fmt, ...)

View File

@@ -15,6 +15,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -22,6 +23,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -9,6 +9,7 @@
- 16 bpp runs with tiled framebuffer - to aid 3D?
8 and 32 bpp use linear
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -16,6 +17,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -14,6 +14,7 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@@ -21,6 +22,7 @@
#include <stddef.h>
#include <wchar.h>
#include <math.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/machine.h>

View File

@@ -298,7 +298,7 @@ else
endif
endif
ifeq ($(DEBUG), y)
DFLAGS += -ggdb -DDEBUG -DUSE_ACYCS
DFLAGS += -ggdb -DDEBUG
AOPTIM :=
ifndef COPTIM
COPTIM := -Og

View File

@@ -81,6 +81,16 @@ win_mouse_handle(PRAWINPUT raw)
else if (state.usButtonFlags & RI_MOUSE_RIGHT_BUTTON_UP)
mousestate.buttons &= ~2;
if (state.usButtonFlags & RI_MOUSE_BUTTON_4_DOWN)
mousestate.buttons |= 8;
else if (state.usButtonFlags & RI_MOUSE_BUTTON_4_UP)
mousestate.buttons &= ~8;
if (state.usButtonFlags & RI_MOUSE_BUTTON_5_DOWN)
mousestate.buttons |= 16;
else if (state.usButtonFlags & RI_MOUSE_BUTTON_5_UP)
mousestate.buttons &= ~16;
if (state.usButtonFlags & RI_MOUSE_WHEEL) {
mousestate.dwheel += (SHORT) state.usButtonData / 120;
}

View File

@@ -54,6 +54,7 @@
#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <SDL2/SDL.h>
#include <SDL2/SDL_error.h>
#include <stdarg.h>
#include <stdio.h>
@@ -253,7 +254,7 @@ sdl_blit(int x, int y, int w, int h, int monitor_index)
ret = SDL_RenderCopy(sdl_render, sdl_tex, &r_src, 0);
if (ret)
sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError());
sdl_log("SDL: unable to copy texture to renderer (%s)\n", SDL_GetError());
SDL_RenderPresent(sdl_render);
SDL_UnlockMutex(sdl_mutex);
@@ -295,7 +296,7 @@ sdl_blit_ex(int x, int y, int w, int h, int monitor_index)
ret = SDL_RenderCopy(sdl_render, sdl_tex, &r_src, 0);
if (ret)
sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError());
sdl_log("SDL: unable to copy texture to renderer (%s)\n", SDL_GetError());
SDL_RenderPresent(sdl_render);
SDL_UnlockMutex(sdl_mutex);
@@ -458,7 +459,7 @@ sdl_init_common(int flags)
wchar_t temp[128];
SDL_version ver;
sdl_log("SDL: init (fs=%d)\n", fs);
sdl_log("SDL: init (flags=%d)\n", flags);
/* Get and log the version of the DLL we are using. */
SDL_GetVersion(&ver);
@@ -466,7 +467,7 @@ sdl_init_common(int flags)
/* Initialize the SDL system. */
if (SDL_Init(SDL_INIT_VIDEO) < 0) {
sdl_log("SDL: initialization failed (%s)\n", sdl_GetError());
sdl_log("SDL: initialization failed (%s)\n", SDL_GetError());
return (0);
}