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Merge remote-tracking branch 'upstream/master' into feature/ich2

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This commit is contained in:
Jasmine Iwanek
2024-01-13 21:11:27 -05:00
parent 5313a10a3b b8462142b7
commit 089511fd0e
140 changed files with 11290 additions and 4883 deletions
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4
.github/workflows/c-cpp.yml vendored
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@@ -1,4 +1,4 @@
name: MSYS2 Makefile
name: MSYS2 Makefile (Windows, Legacy)
on:
@@ -16,7 +16,7 @@ on:
jobs:
msys2:
name: "Windows MSYS2 Makefile (Win32 GUI, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
name: "Win32 GUI, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
runs-on: windows-2022

483
.github/workflows/cmake.yml vendored
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@@ -1,483 +0,0 @@
name: CMake
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
msys2:
name: "Windows MSYS2 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
runs-on: windows-2022
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
defaults:
run:
shell: msys2 {0}
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
static: on
- name: Qt GUI
qt: on
static: on
slug: -Qt
packages: >-
qt5-static:p
# qt5-base:p
# qt5-tools:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
- msystem: UCRT64
prefix: mingw-w64-ucrt-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
steps:
- name: Prepare MSYS2 environment
uses: msys2/setup-msys2@v2
with:
release: false
update: true
msystem: ${{ matrix.environment.msystem }}
pacboy: >-
ninja:p
cmake:p
gcc:p
pkgconf:p
freetype:p
SDL2:p
zlib:p
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D STATIC_BUILD=${{ matrix.ui.static }}
- name: Build
run: |
.sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
.sonar/sonar-scanner-5.0.1.3006-windows/bin/sonar-scanner.bat --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
path: build/artifacts/**
llvm-windows:
name: "Windows vcpkg/LLVM (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.target.name }})"
if: 0
runs-on: windows-2022
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
VCPKG_BINARY_SOURCES: 'clear;nuget,GitHub,readwrite'
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
target:
- name: x86
triplet: x86-windows-static
toolchain: ./cmake/llvm-win32-i686.cmake
vcvars: x64_x86
- name: x64
triplet: x64-windows-static
toolchain: ./cmake/llvm-win32-x86_64.cmake
vcvars: x64
# - name: ARM
# triplet: arm-windows-static
# toolchain: ./cmake/llvm-win32-arm.cmake
# vcvars: x64_arm
- name: ARM64
triplet: arm64-windows-static
toolchain: ./cmake/llvm-win32-aarch64.cmake
vcvars: x64_arm64
exclude:
- dynarec:
new: off
target:
name: ARM64
steps:
- name: Prepare VS environment
uses: ilammy/msvc-dev-cmd@v1
with:
arch: ${{ matrix.target.vcvars }}
- name: Add LLVM to path
run: echo "C:/Program Files/LLVM/bin" >> $env:GITHUB_PATH
- name: Download Ninja
run: >
Invoke-WebRequest https://github.com/ninja-build/ninja/releases/download/v1.11.1/ninja-win.zip -OutFile ninja-win.zip &&
Expand-Archive ninja-win.zip -DestinationPath .
- name: Setup NuGet Credentials
run: >
& (C:/vcpkg/vcpkg --vcpkg-root "${{ env.VCPKG_ROOT }}" fetch nuget | tail -n 2)
sources add
-source "https://nuget.pkg.github.com/86Box/index.json"
-storepasswordincleartext
-name "GitHub"
-username "86Box"
-password "${{ secrets.GITHUB_TOKEN }}"
- name: Fix MSVC atomic headers
run: dir "C:/Program Files/Microsoft Visual Studio/2022/*/VC/Tools/MSVC/*/include" -include stdatomic.h -recurse | del
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain C:/vcpkg/scripts/buildsystems/vcpkg.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }} -D QT=${{ matrix.ui.qt }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D VCPKG_CHAINLOAD_TOOLCHAIN_FILE=${{ github.workspace }}/${{ matrix.target.toolchain }}
-D VCPKG_TARGET_TRIPLET=${{ matrix.target.triplet }}
-D VCPKG_HOST_TRIPLET=x64-windows
-D VCPKG_USE_HOST_TOOLS=ON
- name: Fix Qt
if: matrix.ui.qt == 'on'
run: |
$qtTargetsPath = "${{ github.workspace }}/build/vcpkg_installed/${{ matrix.target.triplet }}/share/Qt6/Qt6Targets.cmake"
(Get-Content $qtTargetsPath) -replace "^.*-Zc:__cplusplus;-permissive-.*$","#$&" | Set-Content $qtTargetsPath
- name: Reconfigure CMake
if: matrix.ui.qt == 'on'
run: |
cmake clean build
- name: Build
run: |
.sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
.sonar/sonar-scanner-5.0.1.3006-windows/bin/sonar-scanner.bat --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-LLVM-${{ matrix.target.name }}-gha${{ github.run_number }}'
path: build/artifacts/**
linux:
name: "Linux GCC 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
runs-on: ubuntu-22.04
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
static: on
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qtbase5-dev
qtbase5-private-dev
qttools5-dev
libevdev-dev
libxkbcommon-x11-dev
steps:
- name: Install dependencies
run: >-
sudo apt update && sudo apt install
build-essential
ninja-build
libfreetype-dev
libsdl2-dev
libpng-dev
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
- name: Build
run: |
build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
# if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-UbuntuJammy-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**
macos12:
name: "macOS 12 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
runs-on: macos-12
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
static: on
src-packages: >-
libsndfile
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
src-packages: >-
libsndfile
steps:
- name: Install source dependencies
run: >-
brew reinstall -s
${{ matrix.ui.src-packages }}
- name: Install dependencies
run: >-
brew install
ninja
freetype
sdl2
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
- name: Build
run: |
build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**

122
.github/workflows/cmake_linux.yml vendored Normal file
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@@ -0,0 +1,122 @@
name: CMake (Linux)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
linux:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
runs-on: ubuntu-22.04
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
static: on
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qtbase5-dev
qtbase5-private-dev
qttools5-dev
libevdev-dev
libxkbcommon-x11-dev
steps:
- name: Install dependencies
run: >-
sudo apt update && sudo apt install
build-essential
ninja-build
libfreetype-dev
libsdl2-dev
libpng-dev
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
- name: Build
run: |
build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
# if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-UbuntuJammy-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**

127
.github/workflows/cmake_macos.yml vendored Normal file
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@@ -0,0 +1,127 @@
name: CMake (macos)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
macos12:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
runs-on: macos-12
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
static: on
src-packages: >-
libsndfile
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
src-packages: >-
libsndfile
steps:
- name: Install source dependencies
run: >-
brew reinstall -s
${{ matrix.ui.src-packages }}
- name: Install dependencies
run: >-
brew install
ninja
freetype
sdl2
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
- name: Build
run: |
build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**

163
.github/workflows/cmake_windows_llvm.yml vendored Normal file
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@@ -0,0 +1,163 @@
name: CMake (Windows, vcpkg/LLVM)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
llvm-windows:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.target.name }}"
if: 0
runs-on: windows-2022
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
VCPKG_BINARY_SOURCES: 'clear;nuget,GitHub,readwrite'
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
target:
- name: x86
triplet: x86-windows-static
toolchain: ./cmake/llvm-win32-i686.cmake
vcvars: x64_x86
- name: x64
triplet: x64-windows-static
toolchain: ./cmake/llvm-win32-x86_64.cmake
vcvars: x64
# - name: ARM
# triplet: arm-windows-static
# toolchain: ./cmake/llvm-win32-arm.cmake
# vcvars: x64_arm
- name: ARM64
triplet: arm64-windows-static
toolchain: ./cmake/llvm-win32-aarch64.cmake
vcvars: x64_arm64
exclude:
- dynarec:
new: off
target:
name: ARM64
steps:
- name: Prepare VS environment
uses: ilammy/msvc-dev-cmd@v1
with:
arch: ${{ matrix.target.vcvars }}
- name: Add LLVM to path
run: echo "C:/Program Files/LLVM/bin" >> $env:GITHUB_PATH
- name: Download Ninja
run: >
Invoke-WebRequest https://github.com/ninja-build/ninja/releases/download/v1.11.1/ninja-win.zip -OutFile ninja-win.zip &&
Expand-Archive ninja-win.zip -DestinationPath .
- name: Setup NuGet Credentials
run: >
& (C:/vcpkg/vcpkg --vcpkg-root "${{ env.VCPKG_ROOT }}" fetch nuget | tail -n 2)
sources add
-source "https://nuget.pkg.github.com/86Box/index.json"
-storepasswordincleartext
-name "GitHub"
-username "86Box"
-password "${{ secrets.GITHUB_TOKEN }}"
- name: Fix MSVC atomic headers
run: dir "C:/Program Files/Microsoft Visual Studio/2022/*/VC/Tools/MSVC/*/include" -include stdatomic.h -recurse | del
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain C:/vcpkg/scripts/buildsystems/vcpkg.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }} -D QT=${{ matrix.ui.qt }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D VCPKG_CHAINLOAD_TOOLCHAIN_FILE=${{ github.workspace }}/${{ matrix.target.toolchain }}
-D VCPKG_TARGET_TRIPLET=${{ matrix.target.triplet }}
-D VCPKG_HOST_TRIPLET=x64-windows
-D VCPKG_USE_HOST_TOOLS=ON
- name: Fix Qt
if: matrix.ui.qt == 'on'
run: |
$qtTargetsPath = "${{ github.workspace }}/build/vcpkg_installed/${{ matrix.target.triplet }}/share/Qt6/Qt6Targets.cmake"
(Get-Content $qtTargetsPath) -replace "^.*-Zc:__cplusplus;-permissive-.*$","#$&" | Set-Content $qtTargetsPath
- name: Reconfigure CMake
if: matrix.ui.qt == 'on'
run: |
cmake clean build
- name: Build
run: |
.sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
.sonar/sonar-scanner-5.0.1.3006-windows/bin/sonar-scanner.bat --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: |
cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-LLVM-${{ matrix.target.name }}-gha${{ github.run_number }}'
path: build/artifacts/**

149
.github/workflows/cmake_windows_msys2.yml vendored Normal file
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@@ -0,0 +1,149 @@
name: CMake (Windows, msys2)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/cmake.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
msys2:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
runs-on: windows-2022
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
defaults:
run:
shell: msys2 {0}
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: debug
slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
static: on
- name: Qt GUI
qt: on
static: on
slug: -Qt
packages: >-
qt5-static:p
# qt5-base:p
# qt5-tools:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
- msystem: UCRT64
prefix: mingw-w64-ucrt-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
steps:
- name: Prepare MSYS2 environment
uses: msys2/setup-msys2@v2
with:
release: false
update: true
msystem: ${{ matrix.environment.msystem }}
pacboy: >-
ninja:p
cmake:p
gcc:p
pkgconf:p
freetype:p
SDL2:p
zlib:p
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@v2
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D STATIC_BUILD=${{ matrix.ui.static }}
- name: Build
run: |
.sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
run: |
.sonar/sonar-scanner-5.0.1.3006-windows/bin/sonar-scanner.bat --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}"
- name: Generate package
run: cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v3
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-Windows-${{ matrix.environment.msystem }}-gha${{ github.run_number }}'
path: build/artifacts/**

309
.github/workflows/codeql.yml vendored
View File

@@ -1,309 +0,0 @@
name: CodeQL
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
analyze-msys2:
name: "Analyze Windows MSYS2 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
runs-on: windows-2022
permissions:
actions: read
contents: read
security-events: write
defaults:
run:
shell: msys2 {0}
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
static: on
- name: Qt GUI
qt: on
static: off
slug: -Qt
packages: >-
qt5-base:p
qt5-tools:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
- msystem: UCRT64
prefix: mingw-w64-ucrt-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
steps:
- name: Prepare MSYS2 environment
uses: msys2/setup-msys2@v2
with:
release: false
update: true
msystem: ${{ matrix.environment.msystem }}
pacboy: >-
ninja:p
cmake:p
gcc:p
pkgconf:p
freetype:p
SDL2:p
zlib:p
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D STATIC_BUILD=${{ matrix.ui.static }}
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"
analyze-linux:
name: "Analyze Linux GCC 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
runs-on: ubuntu-22.04
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qtbase5-dev
qtbase5-private-dev
qttools5-dev
libevdev-dev
libxkbcommon-x11-dev
steps:
- name: Install dependencies
run: >-
sudo apt update && sudo apt install
build-essential
ninja-build
libfreetype-dev
libsdl2-dev
libpng-dev
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"
analyze-macos12:
name: "Analyze macOS 12 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
runs-on: macos-12
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
steps:
- name: Install dependencies
run: >-
brew install
ninja
freetype
sdl2
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"

112
.github/workflows/codeql_linux.yml vendored Normal file
View File

@@ -0,0 +1,112 @@
name: CodeQL Analysis (Linux)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
analyze-linux:
name: "Analyze Linux GCC 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
runs-on: ubuntu-22.04
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qtbase5-dev
qtbase5-private-dev
qttools5-dev
libevdev-dev
libxkbcommon-x11-dev
steps:
- name: Install dependencies
run: >-
sudo apt update && sudo apt install
build-essential
ninja-build
libfreetype-dev
libsdl2-dev
libpng-dev
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"

108
.github/workflows/codeql_macos.yml vendored Normal file
View File

@@ -0,0 +1,108 @@
name: CodeQL Analysis (macos)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
analyze-macos12:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
runs-on: macos-12
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
steps:
- name: Install dependencies
run: >-
brew install
ninja
freetype
sdl2
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"

141
.github/workflows/codeql_windows_msys2.yml vendored Normal file
View File

@@ -0,0 +1,141 @@
name: CodeQL Analysis (Windows, msys2)
on:
push:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
pull_request:
paths:
- src/**
- cmake/**
- "**/CMakeLists.txt"
- "CMakePresets.json"
- .github/workflows/**
- .github/workflows/codeql.yml
- vcpkg.json
- "!**/Makefile*"
jobs:
analyze-msys2:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
runs-on: windows-2022
permissions:
actions: read
contents: read
security-events: write
defaults:
run:
shell: msys2 {0}
strategy:
fail-fast: true
matrix:
language: [ 'cpp' ]
build:
# - name: Regular
# preset: regular
# - name: Debug
# preset: debug
# slug: -Debug
- name: Dev
preset: experimental
slug: -Dev
dynarec:
- name: ODR
new: off
slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: Win32 GUI
qt: off
static: on
- name: Qt GUI
qt: on
static: off
slug: -Qt
packages: >-
qt5-base:p
qt5-tools:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
- msystem: UCRT64
prefix: mingw-w64-ucrt-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
steps:
- name: Prepare MSYS2 environment
uses: msys2/setup-msys2@v2
with:
release: false
update: true
msystem: ${{ matrix.environment.msystem }}
pacboy: >-
ninja:p
cmake:p
gcc:p
pkgconf:p
freetype:p
SDL2:p
zlib:p
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: ${{ matrix.language }}
config-file: ./.github/codeql/codeql-config.yml
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D STATIC_BUILD=${{ matrix.ui.static }}
- name: Build
run: cmake --build build
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
with:
category: "/language:${{matrix.language}}"

3
CMakeLists.txt
View File

@@ -153,7 +153,6 @@ cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage"
cmake_dependent_option(ISAMEM_IAB "Intel Above Board" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_BRAT "BocaRAM/AT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(MGA "Matrox Mystique graphics adapters" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(PAS16 "Pro Audio Spectrum 16" ON "DEV_BRANCH" OFF)
@@ -197,7 +196,7 @@ if(NOT EMU_BUILD_NUM)
set(EMU_BUILD_NUM 0)
endif()
if(NOT EMU_COPYRIGHT_YEAR)
set(EMU_COPYRIGHT_YEAR 2023)
set(EMU_COPYRIGHT_YEAR 2024)
endif()
add_subdirectory(src)

11
debian/control vendored
View File

@@ -1,18 +1,21 @@
Source: 86box
Section: otherosfs
Priority: optional
Maintainer: Mariusz Kurek <mariuszkurek@protonmail.com>
Maintainer: Jasmine Iwanek <jriwanek@gmail.com>
Build-Depends: cmake (>= 3.21),
debhelper-compat (= 13),
libevdev-dev,
libfluidsynth-dev,
libfreetype-dev,
libopenal-dev,
libqt5opengl5-dev,
librtmidi-dev,
libsdl2-dev,
libslirp-dev,
libxkbcommon-x11-dev,
ninja-build,
qttools5-dev
qttools5-dev,
qtbase5-private-dev
Standards-Version: 4.6.0
Homepage: https://86box.net/
#Vcs-Browser: https://salsa.debian.org/debian/86box
@@ -26,4 +29,6 @@ Depends: ${shlibs:Depends},
sse2-support [i386]
Recommends: libpcap0.8-dev
Description: An emulator for classic IBM PC clones
#TODO: insert long description, indented with spaces
86Box is a low level x86 emulator that runs older operating systems and software
designed for IBM PC systems and compatibles from 1981 through
fairly recent system designs based on the PCI bus.

3
debian/copyright vendored
View File

@@ -8,7 +8,8 @@ Copyright: <years> <put author's name and email here>
License: GPL-2.0+
Files: debian/*
Copyright: 2022 Mariusz Kurek <mariuszkurek@protonmail.com>
Copyright: 2023 Jasmine Iwanek <jriwanek@gmail.com>
2022 Lili Kurek <lili@lili.lgbt>
License: GPL-2.0+
License: GPL-2.0+

5
debian/rules vendored
View File

@@ -25,7 +25,10 @@ endif
dh $@ --buildsystem cmake+ninja
override_dh_auto_configure:
dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR)
dh_auto_configure --buildsystem cmake+ninja -- --preset regular --toolchain $(TOOLCHAIN) -DNEW_DYNAREC=$(NDR) -B .
override_dh_auto_build:
dh_auto_build --buildsystem cmake+ninja
override_dh_auto_test:

2
debian/source/format vendored
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@@ -1 +1 @@
3.0 (quilt)
3.0 (native)

267
doc/specifications/86box-unit-tester.md Normal file
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@@ -0,0 +1,267 @@
# 86Box Unit Tester device specification v1.0.0
By GreaseMonkey + other 86Box contributors, 2024.
This specification, including any code samples included, has been released into the Public Domain under the Creative Commons CC0 licence version 1.0 or later, as described here: <http://creativecommons.org/publicdomain/zero/1.0>
The 86Box Unit Tester is a facility for allowing one to unit-test various parts of 86Box's emulation which would otherwise not be exposed to the emulated system.
The original purpose of this was to make it possible to analyse and verify aspects of the monitor framebuffers in order to detect and prevent regressions in certain pieces of video hardware.
----------------------------------------------------------------------------
## Versioning
This specification follows the rules of Semantic Versioning 2.0.0 as documented here: <https://semver.org/spec/v2.0.0.html>
The format is `major.minor.patch`.
- Before you mess with this specification, talk to the other contributors first!
- Any changes need to be tracked in the Version History below, mostly in the event that this document escapes into the wild and doesn't have the Git history attached to it.
- If it clarifies something without introducing any behaviour changes (e.g. formatting changes, spelling fixes), increment the patch version.
- If it introduces a backwards-compatible change, increment the minor version and reset the patch version to 0.
- If it introduces a backwards-incompatible change, increment the major version and reset the minor and patch versions to 0.
- If you make a mistake and accidentally introduce a backward-incompatible change, fix the mistake and increment the minor version.
- To clarify, modifications to *this* section are to be classified as a *patch* version update.
- If you understand SemVer 2.0.0, you may also do other things to the version number according to the specification.
And lastly, the 3 golden rules of protocol specifications:
1. If it's not documented, it doesn't exist.
2. If it's not documented but somehow exists, it's a bug.
3. If it's a bug, it needs to be fixed. (Yes, I'm talking to you. You who introduced the bug. Go fix it.)
The checklist:
- Work out what kind of version number this document needs.
- Update the version number at the top of the file.
- Add an entry to the "Version History" section below describing roughly what was changed.
----------------------------------------------------------------------------
## Version History
Dates are based on what day it was in UTC at the time of publication.
New entries are placed at the top. That is, immediately following this paragraph.
### v1.0.0 (2024-01-08)
Initial release. Authored by GreaseMonkey.
----------------------------------------------------------------------------
## Conventions
### Integer types
- `i8` denotes a signed 8-bit value.
- `u8` denotes an unsigned 8-bit value.
- `w8` denotes an 8-bit value which wraps around.
- `x8` denotes an 8-bit value where the signedness is irrelevant.
- `e8` ("either") denotes an 8-bit value where the most significant bit is clear - in effect, this is a 7-bit unsigned value, and can be interepreted identically as a signed 8-bit value.
- `u16L` denotes a little-endian unsigned 16-bit value.
- `u16B` would denote a big-endian unsigned 16-bit value if we had any big-endian values.
- `[N]T` denotes an array of `N` values of type `T`, whatever `N` and `T` are.
----------------------------------------------------------------------------
## Usage
### Accessing the device and configuring the I/O base address
Find an area in I/O space where 2 addresses are confirmed (or assumed) to be unused.
There is no need for the 2 addresses to be 2-byte-aligned.
Send the following sequence of bytes to port 0x80 with INTERRUPTS DISABLED:
'8', '6', 'B', 'o', 'x', (IOBASE & 0xFF), (IOBASE >> 8)
Alternatively denoted in hex:
38 36 42 6F 78 yy xx
There are no timing constraints. This is an emulator, after all.
To confirm that this has happened, read the status port at IOBASE+0x00.
If it's 0xFF, then the device is most likely not present.
Otherwise, one can potentially assume that it exists and has been configured successfully.
(You *did* make sure that the space was unused *before* doing this, right?)
IOBASE is allowed to overlap the trigger port, but please don't do this!
### Hiding the device
Set the I/O base address to 0xFFFF using the above method.
### Executing commands
The ports at IOBASE+0x00 and IOBASE+0x01 are all 8 bits wide.
Writing to IOBASE+0x00 cancels any in-flight commands and sends a new command.
Reading from IOBASE+0x00 reads the status:
- bit 0: There is data to be read from this device
- If one reads with this bit clear, the returned data will be 0xFF.
- bit 1: The device is expecting data to be sent to it
- If one writes with this bit clear, the data will be ignored.
- bit 2: There is no command in flight
- If this is set, then bits 0 and 1 will be clear.
- bit 3: The previously-sent command does not exist.
- bits 4 .. 7: Reserved, should be 0.
Writing to IOBASE+0x01 provides data to the device if said data is needed.
Reading from IOBASE+0x01 fetches the next byte data to the device if said data is needed.
### General flow of executing a command:
This is how most commands will work.
- Write the command to IOBASE+0x00.
- If data needs to be written or read:
- Read the status from IOBASE+0x00 and confirm that bit 2 is clear.
If it is set, then the command may not exist.
Check bit 3 if that's the case.
- If data needs to be written:
- Write all the data one needs to write.
- If data needs to be read:
- Read the status from IOBASE+0x00 and wait until bit 0 is set.
If it is set, then the command may not exist.
Check bit 3 if that's the case.
- Keep reading bytes until one is satisfied.
- Otherwise:
- Read the status from IOBASE+0x00 and wait until any of the bottom 3 bits are set.
----------------------------------------------------------------------------
## Command reference
### 0x00: No-op
This does nothing, takes no input, and gives no output.
This is an easy way to reset the status to 0x04 (no command in flight, not waiting for reads or writes, and no errors).
### 0x01: Capture Screen Snapshot
Captures a snapshot of the current screen state and stores it in the current snapshot buffer.
The initial state of the screen snapshot buffer has an image area of 0x0, an overscanned area of 0x0, and an image start offset of (0,0).
Input:
* u8 monitor
- 0x00 = no monitor - clear the screen snapshot
- 0x01 = primary monitor
- 0x02 = secondary monitor
- Any monitor which is not available is treated as 0x00, and clears the screen snapshot.
Output:
* `e16L` image width in pixels
* `e16L` image height in pixels
* `e16L` overscanned width in pixels
* `e16L` overscanned height in pixels
* `e16L` X offset of image start
* `e16L` Y offset of image start
If there is no screen snapshot, then all values will be 0 as per the initial screen snapshot buffer state.
### 0x02: Read Screen Snapshot Rectangle
Returns a rectangular snapshot of the screen snapshot buffer as an array of 32bpp 8:8:8:8 B:G:R:X pixels.
Input:
* `e16L` w: rectangle width in pixels
* `e16L` h: rectangle height in pixels
* `i16L` x: X offset relative to image start
* `i16L` y: Y offset relative to image start
Output:
* `[h][w][4]u8`: image data
- `[y][x][0]` is the blue component, or 0x00 if the pixel is outside the snapshot area.
- `[y][x][1]` is the green component, or 0x00 if the pixel is outside the snapshot area.
- `[y][x][2]` is the red component, or 0x00 if the pixel is outside the snapshot area.
- `[y][x][3]` is 0x00, or 0xFF if the pixel is outside the snapshot area.
### 0x03: Verify Screen Snapshot Rectangle
As per 0x02 "Read Screen Snapshot Rectangle", except instead of returning the pixel data, it returns a CRC-32 of the data.
The CRC is as per zlib's `crc32()` function. Specifically, one uses a right-shifting Galois LFSR with a polynomial of 0xEDB88320, bytes XORed against the least significant byte, the initial seed is 0xFFFFFFFF, and all bits of the output are inverted.
(Rationale: There are better CRCs, but this one is ubiquitous and still really good... and we don't need to protect against deliberate tampering.)
Input:
* `e16L` w: rectangle width in pixels
* `e16L` h: rectangle height in pixels
* `i16L` x: X offset relative to image start
* `i16L` y: Y offset relative to image start
Output:
* `u32L` crc: CRC-32 of rectangle data
### 0x04: Exit 86Box
Exits 86Box, unless this command is disabled.
- If the command is enabled, then program execution terminates immediately.
- If the command is disabled, it still counts as having executed correctly, but program execution continues. This makes it useful to show a "results" screen for a unit test.
Input:
* u8 exit code:
- The actual exit code is clamped to no greater than the maximum valid exit code.
- In practice, this is probably going to be 0x7F.
----------------------------------------------------------------------------
## Implementation notes
### Port 0x80 sequence detection
In order to ensure that one can always trigger the activation sequence, there are effectively two finite state machines in action.
FSM1:
- Wait for 8.
- Wait for 6.
- Wait for B.
- Wait for o.
- Wait for x.
Once received, set FSM2 to "Wait for low byte",
then go back to "Wait for 8".
If at any point an 8 arrives, jump to the "Wait for 6" step.
Otherwise, if any other unexpected byte arrives, jump to the "Wait for 8" step.
FSM2:
- Idle.
- Wait for low byte. Once received, store this in a temporary location.
- Wait for high byte.
Once received, replace IOBASE with this byte in the high byte and the temporary value in the low byte,
then go back to "Idle".
----------------------------------------------------------------------------
## Extending the protocol
### Adding new commands
Commands 0x01 through 0x7F accept a single command byte.
Command bytes 0x80 through 0xFB are reserved for 16-bit command IDs, to be written in a similar way to this:
- Write the first command byte (0x80 through 0xFF) to the command register.
- If this block of commands does not exist, then the command is cancelled and the status is set to 0x0C.
- Otherwise, the status is set to 0x0
- Write the next command byte (0x00 through 0xFF) to the data register.
- If this block of commands does not exist, then the command is cancelled and the status is set to 0x0C.
- Otherwise, the command exists and the status is set according to the command.
Command bytes 0xFC through 0xFF are reserved for if we somehow need more than 16 bits worth of command ID.

44
src/86box.c
View File

@@ -65,6 +65,7 @@
#include <86box/machine.h>
#include <86box/bugger.h>
#include <86box/postcard.h>
#include <86box/unittester.h>
#include <86box/isamem.h>
#include <86box/isartc.h>
#include <86box/lpt.h>
@@ -111,7 +112,7 @@
/* Stuff that used to be globally declared in plat.h but is now extern there
and declared here instead. */
int dopause; /* system is paused */
int dopause = 1; /* system is paused */
atomic_flag doresize; /* screen resize requested */
volatile int is_quit; /* system exit requested */
uint64_t timer_freq;
@@ -173,6 +174,7 @@ bool serial_passthrough_enabled[SERIAL_MAX] = { 0, 0, 0, 0 }; /* (C) activat
pass-through for serial ports */
int bugger_enabled = 0; /* (C) enable ISAbugger */
int postcard_enabled = 0; /* (C) enable POST card */
int unittester_enabled = 0; /* (C) enable unit tester device */
int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */
int isartc_type = 0; /* (C) enable ISA RTC card */
int gfxcard[2] = { 0, 0 }; /* (C) graphics/video card */
@@ -236,8 +238,8 @@ int efscrnsz_y = SCREEN_RES_Y;
static wchar_t mouse_msg[3][200];
static int do_pause_ack = 0;
static volatile int pause_ack = 0;
static volatile atomic_int do_pause_ack = 0;
static volatile atomic_int pause_ack = 0;
#ifndef RELEASE_BUILD
static char buff[1024];
@@ -542,7 +544,9 @@ usage:
printf("-N or --noconfirm - do not ask for confirmation on quit\n");
printf("-P or --vmpath path - set 'path' to be root for vm\n");
printf("-R or --rompath path - set 'path' to be ROM path\n");
#ifndef USE_SDL_UI
printf("-S or --settings - show only the settings dialog\n");
#endif
printf("-V or --vmname name - overrides the name of the running VM\n");
printf("-X or --clear what - clears the 'what' (cmos/flash/both)\n");
printf("-Y or --donothing - do not show any UI or run the emulation\n");
@@ -609,8 +613,10 @@ usage:
goto usage;
strcpy(vm_name, argv[++c]);
#ifndef USE_SDL_UI
} else if (!strcasecmp(argv[c], "--settings") || !strcasecmp(argv[c], "-S")) {
settings_only = 1;
#endif
} else if (!strcasecmp(argv[c], "--noconfirm") || !strcasecmp(argv[c], "-N")) {
confirm_exit_cmdl = 0;
} else if (!strcasecmp(argv[c], "--missing") || !strcasecmp(argv[c], "-M")) {
@@ -1153,9 +1159,6 @@ pc_reset_hard_init(void)
* that will be a call to device_reset_all() later !
*/
if (joystick_type)
gameport_update_joystick_type();
/* Reset and reconfigure the Sound Card layer. */
sound_card_reset();
@@ -1199,10 +1202,13 @@ pc_reset_hard_init(void)
/* Reset any ISA RTC cards. */
isartc_reset();
/* Initialize the Voodoo cards here inorder to minmize
/* Initialize the Voodoo cards here inorder to minimize
the chances of the SCSI controller ending up on the bridge. */
video_voodoo_init();
if (joystick_type)
gameport_update_joystick_type(); /* installs game port if no device provides one, must be late */
ui_sb_update_panes();
if (config_changed) {
@@ -1217,12 +1223,18 @@ pc_reset_hard_init(void)
device_add(&bugger_device);
if (postcard_enabled)
device_add(&postcard_device);
if (unittester_enabled)
device_add(&unittester_device);
if (IS_ARCH(machine, MACHINE_BUS_PCI)) {
pci_register_cards();
device_reset_all(DEVICE_PCI);
}
/* Mark IDE shadow drives (slaves with a present master) as such in case
the IDE controllers present are not some form of PCI. */
ide_drives_set_shadow();
/* Reset the CPU module. */
resetx86();
dma_reset();
@@ -1359,9 +1371,9 @@ _ui_window_title(void *s)
void
ack_pause(void)
{
if (do_pause_ack) {
do_pause_ack = 0;
pause_ack = 1;
if (atomic_load(&do_pause_ack)) {
atomic_store(&do_pause_ack, 0);
atomic_store(&pause_ack, 1);
}
}
@@ -1579,12 +1591,14 @@ get_actual_size_y(void)
void
do_pause(int p)
{
if (p)
int old_p = dopause;
if ((p == 1) && !old_p)
do_pause_ack = p;
dopause = p;
if (p) {
while (!pause_ack)
dopause = !!p;
if ((p == 1) && !old_p) {
while (!atomic_load(&pause_ack))
;
}
pause_ack = 0;
atomic_store(&pause_ack, 0);
}

1
src/CMakeLists.txt
View File

@@ -229,5 +229,6 @@ if (QT)
elseif(WIN32)
add_subdirectory(win)
else()
add_compile_definitions(USE_SDL_UI)
add_subdirectory(unix)
endif()

3
src/acpi.c
View File

@@ -847,7 +847,8 @@ acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *p
/* Since the UI doesn't have a power button at the moment, pause emulation,
then trigger a resume event so that the system resumes after unpausing. */
plat_pause(1);
plat_pause(2); /* 2 means do not wait for pause as
we're already in the CPU thread. */
timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC);
}
}

28
src/cdrom/cdrom.c
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@@ -614,8 +614,14 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
break;
}
/* Unlike standard commands, if there's a data track on an Audio CD (mixed mode)
the playback continues with the audio muted (Toshiba CD-ROM SCSI-2 manual reference). */
/* Do this at this point, since it's at this point that we know the
actual LBA position to start playing from. */
if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
cdrom_log("CD-ROM %i: LBA %08X not on an audio track\n", dev->id, pos);
cdrom_stop(dev);
return 0;
}
dev->cd_buflen = 0;
dev->cd_status = playbit ? CD_STATUS_PLAYING : CD_STATUS_PAUSED;
return 1;
@@ -641,6 +647,14 @@ cdrom_audio_track_search_pioneer(cdrom_t *dev, uint32_t pos, uint8_t playbit)
dev->seek_pos = pos;
/* Do this at this point, since it's at this point that we know the
actual LBA position to start playing from. */
if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
cdrom_log("CD-ROM %i: LBA %08X not on an audio track\n", dev->id, pos);
cdrom_stop(dev);
return 0;
}
dev->cd_buflen = 0;
dev->cd_status = playbit ? CD_STATUS_PLAYING : CD_STATUS_PAUSED;
return 1;
@@ -705,8 +719,14 @@ cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type)
cdrom_log("Toshiba/NEC Play Audio: MSF = %06x, type = %02x, cdstatus = %02x\n", pos, type, dev->cd_status);
/* Unlike standard commands, if there's a data track on an Audio CD (mixed mode)
the playback continues with the audio muted (Toshiba CD-ROM SCSI-2 manual reference). */
/* Do this at this point, since it's at this point that we know the
actual LBA position to start playing from. */
if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
cdrom_log("CD-ROM %i: LBA %08X not on an audio track\n", dev->id, pos);
cdrom_stop(dev);
return 0;
}
dev->cd_buflen = 0;
dev->cd_status = CD_STATUS_PLAYING;
return 1;

161
src/chipset/ali1489.c
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@@ -41,7 +41,8 @@
#include <86box/chipset.h>
#define DEFINE_SHADOW_PROCEDURE (((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))
#define DEFINE_SHADOW_PROCEDURE (((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | \
((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))
#define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
#ifdef ENABLE_ALI1489_LOG
@@ -64,19 +65,14 @@ ali1489_log(const char *fmt, ...)
typedef struct ali1489_t {
uint8_t index;
uint8_t ide_index;
uint8_t ide_chip_id;
uint8_t pci_slot;
uint8_t regs[256];
uint8_t pci_conf[256];
uint8_t ide_regs[256];
port_92_t *port_92;
smram_t *smram;
} ali1489_t;
static void ali1489_ide_handler(ali1489_t *dev);
static void
ali1489_shadow_recalc(ali1489_t *dev)
{
@@ -85,7 +81,8 @@ ali1489_shadow_recalc(ali1489_t *dev)
for (uint8_t i = 0; i < 8; i++) {
if (dev->regs[0x13] & (1 << i)) {
ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
0xc0000 + (i << 14), 0xc3fff + (i << 14),
!!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DEFINE_SHADOW_PROCEDURE);
} else {
ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xc0000 + (i << 14), 0xc3fff + (i << 14));
@@ -96,7 +93,8 @@ ali1489_shadow_recalc(ali1489_t *dev)
for (uint8_t i = 0; i < 4; i++) {
if (dev->regs[0x14] & (1 << i)) {
ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
0xe0000 + (i << 15), 0xe7fff + (i << 15),
!!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DEFINE_SHADOW_PROCEDURE);
shadowbios |= !!(dev->regs[0x14] & 0x10);
shadowbios_write |= !!(dev->regs[0x14] & 0x20);
@@ -142,25 +140,9 @@ ali1489_smram_recalc(ali1489_t *dev)
static void
ali1489_defaults(ali1489_t *dev)
{
memset(dev->ide_regs, 0x00, 256);
memset(dev->pci_conf, 0x00, 256);
memset(dev->regs, 0x00, 256);
ide_pri_disable();
ide_sec_disable();
/* IDE registers */
dev->ide_regs[0x00] = 0x57;
dev->ide_regs[0x01] = 0x02;
dev->ide_regs[0x08] = 0xff;
dev->ide_regs[0x09] = 0x41;
dev->ide_regs[0x0c] = 0x02;
dev->ide_regs[0x0e] = 0x02;
dev->ide_regs[0x10] = 0x02;
dev->ide_regs[0x12] = 0x02;
dev->ide_regs[0x34] = 0xff;
dev->ide_regs[0x35] = 0x01;
/* PCI registers */
dev->pci_conf[0x00] = 0xb9;
dev->pci_conf[0x01] = 0x10;
@@ -203,8 +185,6 @@ ali1489_defaults(ali1489_t *dev)
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
ali1489_ide_handler(dev);
}
static void
@@ -385,7 +365,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
break;
case 0x44: /* PCI INTx Sensitivity Register */
/* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */
/* TODO: When doing the IRQ and PCI IRQ rewrite,
bits 0 to 3 toggle edge/level output. */
dev->regs[dev->index] = val;
break;
default:
@@ -464,121 +445,6 @@ ali1489_pci_read(UNUSED(int func), int addr, void *priv)
return ret;
}
static void
ali1489_ide_handler(ali1489_t *dev)
{
ide_pri_disable();
ide_sec_disable();
if (dev->ide_regs[0x01] & 0x01) {
ide_pri_enable();
if (!(dev->ide_regs[0x35] & 0x40))
ide_sec_enable();
}
}
static void
ali1489_ide_write(uint16_t addr, uint8_t val, void *priv)
{
ali1489_t *dev = (ali1489_t *) priv;
switch (addr) {
case 0xf4: /* Usually it writes 30h here */
dev->ide_chip_id = val;
break;
case 0xf8:
dev->ide_index = val;
break;
case 0xfc:
if (dev->ide_chip_id != 0x30)
break;
switch (dev->ide_index) {
case 0x01: /* IDE Configuration Register */
dev->ide_regs[dev->ide_index] = val & 0x8f;
ali1489_ide_handler(dev);
break;
case 0x02: /* DBA Data Byte Cative Count for IDE-1 */
case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */
case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */
case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */
case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */
case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */
case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */
case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */
case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */
case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */
case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */
case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */
case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */
case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */
case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */
case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */
case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */
case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */
case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */
case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */
dev->ide_regs[dev->ide_index] = val & 0x1f;
break;
case 0x07: /* Buffer Mode Register 1 */
dev->ide_regs[dev->ide_index] = val;
break;
case 0x09: /* IDEPE1 IDE Port Enable Register 1 */
dev->ide_regs[dev->ide_index] = val & 0xc3;
break;
case 0x0a: /* Buffer Mode Register 2 */
dev->ide_regs[dev->ide_index] = val & 0x4f;
break;
case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */
case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */
case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */
case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */
dev->ide_regs[dev->ide_index] = val & 0x03;
break;
case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */
case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */
case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
dev->ide_regs[dev->ide_index] = val & 0x1f;
break;
case 0x35: /* IDEPE3 IDE Port Enable Register 3 */
dev->ide_regs[dev->ide_index] = val;
ali1489_ide_handler(dev);
break;
default:
break;
}
break;
default:
break;
}
}
static uint8_t
ali1489_ide_read(uint16_t addr, void *priv)
{
const ali1489_t *dev = (ali1489_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0xf4:
ret = dev->ide_chip_id;
break;
case 0xfc:
ret = dev->ide_regs[dev->ide_index];
ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret);
break;
default:
break;
}
return ret;
}
static void
ali1489_reset(void *priv)
{
@@ -612,19 +478,10 @@ ali1489_init(UNUSED(const device_t *info))
23h Data Port */
io_sethandler(0x0022, 0x0002, ali1489_read, NULL, NULL, ali1489_write, NULL, NULL, dev);
/* M1489 IDE controller
F4h Chip ID we write always 30h onto it
F8h Index Port
FCh Data Port
*/
io_sethandler(0x0f4, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
io_sethandler(0x0f8, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
io_sethandler(0x0fc, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
/* Dummy M1489 PCI device */
pci_add_card(PCI_ADD_NORTHBRIDGE, ali1489_pci_read, ali1489_pci_write, dev, &dev->pci_slot);
device_add(&ide_pci_2ch_device);
device_add(&ide_ali1489_device);
dev->port_92 = device_add(&port_92_pci_device);
dev->smram = smram_add();

109
src/chipset/ali1543.c
View File

@@ -489,12 +489,10 @@ static void
ali5229_ide_irq_handler(ali1543_t *dev)
{
int ctl = 0;
int ch = 0;
int bit = 0;
if (dev->ide_conf[0x52] & 0x10) {
ctl ^= 1;
ch ^= 1;
bit ^= 5;
}
@@ -984,7 +982,7 @@ static void
ali7101_write(int func, int addr, uint8_t val, void *priv)
{
ali1543_t *dev = (ali1543_t *) priv;
ali1543_log("M7101: dev->pmu_conf[%02x] = %02x\n", addr, val);
ali1543_log("M7101: [W] dev->pmu_conf[%02x] = %02x\n", addr, val);
if (func > 0)
return;
@@ -1408,65 +1406,78 @@ ali7101_read(int func, int addr, void *priv)
uint8_t ret = 0xff;
if (dev->pmu_dev_enable && (func == 0)) {
if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9))
return 0xff;
/* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
switch (addr) {
default:
ret = dev->pmu_conf[addr];
break;
case 0x42:
ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
break;
case 0x43:
ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
break;
case 0x7f:
ret = 0x80;
break;
case 0xbc:
ret = inb(0x70);
break;
}
if (dev->pmu_conf[0x77] & 0x10) {
if (!(dev->pmu_conf[0xc9] & 0x01) || (addr < 0x40) || (addr == 0xc9)) {
/* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
switch (addr) {
default:
ret = dev->pmu_conf[addr];
break;
case 0x10 ... 0x13:
if (dev->pmu_conf[0x5b] & 0x02)
ret = 0x00;
else
ret = dev->pmu_conf[addr];
break;
case 0x14 ... 0x17:
if (dev->pmu_conf[0x5b] & 0x04)
ret = 0x00;
else
ret = dev->pmu_conf[addr];
break;
case 0x42:
dev->pmu_conf[addr] &= 0xe0;
ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
break;
case 0x43:
dev->pmu_conf[addr] &= 0xef;
acpi_ali_soft_smi_status_write(dev->acpi, 0);
ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
break;
case 0x7f:
ret = 0x80;
break;
case 0xbc:
ret = inb(0x70);
break;
}
case 0x48:
dev->pmu_conf[addr] = 0x00;
break;
case 0x49:
dev->pmu_conf[addr] &= 0x60;
break;
case 0x4a:
dev->pmu_conf[addr] &= 0xc7;
break;
if (dev->pmu_conf[0x77] & 0x10) {
switch (addr) {
case 0x42:
dev->pmu_conf[addr] &= 0xe0;
break;
case 0x43:
dev->pmu_conf[addr] &= 0xef;
acpi_ali_soft_smi_status_write(dev->acpi, 0);
break;
case 0x4e:
dev->pmu_conf[addr] &= 0xfa;
break;
case 0x4f:
dev->pmu_conf[addr] &= 0xfe;
break;
case 0x48:
dev->pmu_conf[addr] = 0x00;
break;
case 0x49:
dev->pmu_conf[addr] &= 0x60;
break;
case 0x4a:
dev->pmu_conf[addr] &= 0xc7;
break;
case 0x74:
dev->pmu_conf[addr] &= 0xcc;
break;
case 0x4e:
dev->pmu_conf[addr] &= 0xfa;
break;
case 0x4f:
dev->pmu_conf[addr] &= 0xfe;
break;
default:
break;
case 0x74:
dev->pmu_conf[addr] &= 0xcc;
break;
default:
break;
}
}
}
}
ali1543_log("M7101: [R] dev->pmu_conf[%02x] = %02x\n", addr, ret);
return ret;
}

10
src/chipset/intel_piix.c
View File

@@ -597,6 +597,12 @@ piix_write(int func, int addr, uint8_t val, void *priv)
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), PCI_IRQ_DISABLED);
else
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
if (dev->type == 3) {
if (val & 0x20)
sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
else
sff_set_irq_mode(dev->bm[1], IRQ_MODE_LEGACY);
}
piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
}
break;
@@ -1006,11 +1012,11 @@ piix_write(int func, int addr, uint8_t val, void *priv)
break;
case 0xc0:
if (dev->type <= 4)
fregs[0xc0] = (fregs[0xc0] & ~(val & 0xbf)) | (val & 0x20);
fregs[0xc0] = (fregs[0xc0] & 0x40) | (val & 0xbf);
break;
case 0xc1:
if (dev->type <= 4)
fregs[0xc1] &= ~val;
fregs[0xc1] = (fregs[0xc0] & ~(val & 0x8f)) | (val & 0x20);
break;
case 0xff:
if (dev->type == 4) {

3
src/chipset/neat.c
View File

@@ -673,13 +673,14 @@ neat_init(UNUSED(const device_t *info))
{
neat_t *dev;
uint8_t dram_mode = 0;
uint8_t i;
/* Create an instance. */
dev = (neat_t *) malloc(sizeof(neat_t));
memset(dev, 0x00, sizeof(neat_t));
/* Initialize some of the registers to specific defaults. */
for (uint8_t i = REG_RA0; i <= REG_RB11; i++) {
for (i = REG_RA0; i <= REG_RB11; i++) {
dev->indx = i;
neat_write(0x0023, 0x00, dev);
}

50
src/chipset/sis_5511.c
View File

@@ -262,7 +262,7 @@ sis_5511_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0x7a: /* DRAM Bank Register 2-1 */
case 0x7c: /* DRAM Bank Register 3-0 */
case 0x7e: /* DRAM Bank Register 3-1 */
spd_write_drbs(dev->regs, 0x70, 0x7e, 0x82);
spd_write_drbs(dev->pci_conf, 0x70, 0x7e, 0x82);
break;
case 0x71: /* DRAM Bank Register 0-0 */
@@ -579,16 +579,19 @@ sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev)
break;
case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */
case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */
case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */
case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */
case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */
case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */
case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */
case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */
case 0x48: /* IDE Command Recovery Time Control */
dev->pci_conf_sb[1][addr] = val & 0x0f;
break;
case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */
case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */
case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */
case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */
case 0x49: /* IDE Command Active Time Control */
dev->pci_conf_sb[1][addr] = val;
dev->pci_conf_sb[1][addr] = val & 0x07;
break;
case 0x4a: /* IDE General Control Register 0 */
@@ -659,7 +662,11 @@ sis_5513_read(int func, int addr, void *priv)
sis_5511_log("SiS 5513 P2I: [R] dev->pci_conf_sb[0][%02X] = %02X\n", addr, ret);
} else if (func == 0x01) {
ret = dev->pci_conf_sb[func][addr];
if (addr == 0x3d)
ret = (((dev->pci_conf_sb[0x01][0x4b] & 0xc0) == 0xc0) ||
(dev->pci_conf_sb[0x01][0x09] & 0x05)) ? PCI_INTA : 0x00;
else
ret = dev->pci_conf_sb[func][addr];
sis_5511_log("SiS 5513 IDE: [R] dev->pci_conf_sb[1][%02X] = %02X\n", addr, ret);
}
@@ -785,7 +792,9 @@ sis_5511_reset(void *priv)
dev->pci_conf[0x74] = dev->pci_conf[0x76] = 0x04;
dev->pci_conf[0x78] = dev->pci_conf[0x7a] = 0x04;
dev->pci_conf[0x7c] = dev->pci_conf[0x7e] = 0x04;
dev->pci_conf[0x71] = dev->pci_conf[0x75] = 0x00;
dev->pci_conf[0x73] = dev->pci_conf[0x77] = 0x80;
dev->pci_conf[0x79] = dev->pci_conf[0x7d] = 0x00;
dev->pci_conf[0x7b] = dev->pci_conf[0x7f] = 0x80;
dev->pci_conf[0x80] = dev->pci_conf[0x81] = 0x00;
dev->pci_conf[0x82] = dev->pci_conf[0x83] = 0x00;
@@ -820,13 +829,13 @@ sis_5511_reset(void *priv)
dev->pci_conf_sb[0][0x40] = 0x00;
dev->pci_conf_sb[0][0x41] = dev->pci_conf_sb[0][0x42] = 0x80;
dev->pci_conf_sb[0][0x43] = dev->pci_conf_sb[0][0x44] = 0x80;
dev->pci_conf_sb[0][0x48] = dev->pci_conf_sb[0][0x49] = 0x80;
dev->pci_conf_sb[0][0x4a] = dev->pci_conf_sb[0][0x4b] = 0x80;
dev->pci_conf_sb[0][0x60] = dev->pci_conf_sb[0][0x51] = 0x80;
dev->pci_conf_sb[0][0x48] = dev->pci_conf_sb[0][0x49] = 0x00;
dev->pci_conf_sb[0][0x4a] = dev->pci_conf_sb[0][0x4b] = 0x00;
dev->pci_conf_sb[0][0x60] = dev->pci_conf_sb[0][0x61] = 0x80;
dev->pci_conf_sb[0][0x62] = 0x00;
dev->pci_conf_sb[0][0x63] = 0x80;
dev->pci_conf_sb[0][0x64] = 0x00;
dev->pci_conf_sb[0][0x65] = 0x80;
dev->pci_conf_sb[0][0x65] = 0x00;
dev->pci_conf_sb[0][0x66] = dev->pci_conf_sb[0][0x67] = 0x00;
dev->pci_conf_sb[0][0x68] = dev->pci_conf_sb[0][0x69] = 0x00;
dev->pci_conf_sb[0][0x6a] = 0x04;
@@ -873,6 +882,23 @@ sis_5511_reset(void *priv)
dev->pci_conf_sb[1][0x20] = 0x01;
dev->pci_conf_sb[1][0x21] = 0xf0;
dev->pci_conf_sb[1][0x22] = dev->pci_conf_sb[1][0x23] = 0x00;
dev->pci_conf_sb[1][0x24] = dev->pci_conf_sb[1][0x25] = 0x00;
dev->pci_conf_sb[1][0x26] = dev->pci_conf_sb[1][0x27] = 0x00;
dev->pci_conf_sb[1][0x28] = dev->pci_conf_sb[1][0x29] = 0x00;
dev->pci_conf_sb[1][0x2a] = dev->pci_conf_sb[1][0x2b] = 0x00;
dev->pci_conf_sb[1][0x2c] = dev->pci_conf_sb[1][0x2d] = 0x00;
dev->pci_conf_sb[1][0x2e] = dev->pci_conf_sb[1][0x2f] = 0x00;
dev->pci_conf_sb[1][0x30] = dev->pci_conf_sb[1][0x31] = 0x00;
dev->pci_conf_sb[1][0x32] = dev->pci_conf_sb[1][0x33] = 0x00;
dev->pci_conf_sb[1][0x40] = dev->pci_conf_sb[1][0x41] = 0x00;
dev->pci_conf_sb[1][0x42] = dev->pci_conf_sb[1][0x43] = 0x00;
dev->pci_conf_sb[1][0x44] = dev->pci_conf_sb[1][0x45] = 0x00;
dev->pci_conf_sb[1][0x46] = dev->pci_conf_sb[1][0x47] = 0x00;
dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x00;
dev->pci_conf_sb[1][0x4a] = 0x06;
dev->pci_conf_sb[1][0x4b] = 0x00;
dev->pci_conf_sb[1][0x4c] = dev->pci_conf_sb[1][0x4d] = 0x00;
dev->pci_conf_sb[1][0x4e] = dev->pci_conf_sb[1][0x4f] = 0x00;
sis_5513_ide_irq_handler(dev);
sis_5513_ide_handler(dev);
@@ -896,8 +922,6 @@ sis_5511_init(UNUSED(const device_t *info))
sis_5511_t *dev = (sis_5511_t *) calloc(1, sizeof(sis_5511_t));
uint8_t pit_is_fast = (((pit_mode == -1) && is486) || (pit_mode == 1));
memset(dev, 0, sizeof(sis_5511_t));
/* Device 0: SiS 5511 */
pci_add_card(PCI_ADD_NORTHBRIDGE, sis_5511_read, sis_5511_write, dev, &dev->nb_slot);
/* Device 1: SiS 5513 */

1605
src/chipset/sis_5571.c
View File

File diff suppressed because it is too large Load Diff

4
src/codegen_new/codegen_backend_x86-64.c
View File

@@ -73,7 +73,7 @@ static void
build_load_routine(codeblock_t *block, int size, int is_float)
{
uint8_t *branch_offset;
uint8_t *misaligned_offset;
uint8_t *misaligned_offset = NULL;
/*In - ESI = address
Out - ECX = data, ESI = abrt*/
@@ -161,7 +161,7 @@ static void
build_store_routine(codeblock_t *block, int size, int is_float)
{
uint8_t *branch_offset;
uint8_t *misaligned_offset;
uint8_t *misaligned_offset = NULL;
/*In - ECX = data, ESI = address
Out - ESI = abrt

42
src/config.c
View File

@@ -1104,13 +1104,13 @@ load_floppy_and_cdrom_drives(void)
p = ini_section_get_string(cat, temp, NULL);
if (p) {
if (path_abs(p)) {
if (strlen(p) > 255)
fatal("load_floppy_and_cdrom_drives(): strlen(p) > 255 "
if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
fatal("load_floppy_and_cdrom_drives(): strlen(p) > 2047 "
"(fdd_image_history[%i][%i])\n", c, i);
else
snprintf(fdd_image_history[c][i], 255, "%s", p);
snprintf(fdd_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
} else
snprintf(fdd_image_history[c][i], 255, "%s%s%s", usr_path,
snprintf(fdd_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
path_get_slash(usr_path), p);
path_normalize(fdd_image_history[c][i]);
}
@@ -1220,13 +1220,13 @@ load_floppy_and_cdrom_drives(void)
p = ini_section_get_string(cat, temp, NULL);
if (p) {
if (path_abs(p)) {
if (strlen(p) > 511)
fatal("load_floppy_and_cdrom_drives(): strlen(p) > 511 "
if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
fatal("load_floppy_and_cdrom_drives(): strlen(p) > 2047 "
"(cdrom[%i].image_history[%i])\n", c, i);
else
snprintf(cdrom[c].image_history[i], 511, "%s", p);
snprintf(cdrom[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
} else
snprintf(cdrom[c].image_history[i], 511, "%s%s%s", usr_path,
snprintf(cdrom[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
path_get_slash(usr_path), p);
path_normalize(cdrom[c].image_history[i]);
}
@@ -1353,13 +1353,13 @@ load_other_removable_devices(void)
p = ini_section_get_string(cat, temp, NULL);
if (p) {
if (path_abs(p)) {
if (strlen(p) > 511)
fatal("load_other_removable_devices(): strlen(p) > 511 "
if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
fatal("load_other_removable_devices(): strlen(p) > 2047 "
"(zip_drives[%i].image_history[%i])\n", c, i);
else
snprintf(zip_drives[c].image_history[i], 511, "%s", p);
snprintf(zip_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
} else
snprintf(zip_drives[c].image_history[i], 511, "%s%s%s", usr_path,
snprintf(zip_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
path_get_slash(usr_path), p);
path_normalize(zip_drives[c].image_history[i]);
}
@@ -1469,13 +1469,13 @@ load_other_removable_devices(void)
p = ini_section_get_string(cat, temp, NULL);
if (p) {
if (path_abs(p)) {
if (strlen(p) > 511)
fatal("load_other_removable_devices(): strlen(p) > 511 "
if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
fatal("load_other_removable_devices(): strlen(p) > 2047 "
"(mo_drives[%i].image_history[%i])\n", c, i);
else
snprintf(mo_drives[c].image_history[i], 511, "%s", p);
snprintf(mo_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
} else
snprintf(mo_drives[c].image_history[i], 511, "%s%s%s", usr_path,
snprintf(mo_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
path_get_slash(usr_path), p);
path_normalize(mo_drives[c].image_history[i]);
}
@@ -1514,8 +1514,9 @@ load_other_peripherals(void)
char *p;
char temp[512];
bugger_enabled = !!ini_section_get_int(cat, "bugger_enabled", 0);
postcard_enabled = !!ini_section_get_int(cat, "postcard_enabled", 0);
bugger_enabled = !!ini_section_get_int(cat, "bugger_enabled", 0);
postcard_enabled = !!ini_section_get_int(cat, "postcard_enabled", 0);
unittester_enabled = !!ini_section_get_int(cat, "unittester_enabled", 0);
for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
sprintf(temp, "isamem%d_type", c);
@@ -2348,6 +2349,11 @@ save_other_peripherals(void)
else
ini_section_set_int(cat, "postcard_enabled", postcard_enabled);
if (unittester_enabled == 0)
ini_section_delete_var(cat, "unittester_enabled");
else
ini_section_set_int(cat, "unittester_enabled", unittester_enabled);
for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
sprintf(temp, "isamem%d_type", c);
if (isamem_type[c] == 0)

2
src/cpu/386.c
View File

@@ -311,12 +311,12 @@ exec386_2386(int32_t cycs)
}
} else if (trap) {
flags_rebuild();
dr[6] |= (trap == 2) ? 0x8000 : 0x4000;
trap = 0;
#ifndef USE_NEW_DYNAREC
oldcs = CS;
#endif
cpu_state.oldpc = cpu_state.pc;
dr[6] |= 0x4000;
x86_int(1);
}

11
src/cpu/386_dynarec.c
View File

@@ -268,6 +268,12 @@ exec386_dynarec_int(void)
cpu_block_end = 0;
x86_was_reset = 0;
if (trap == 2) {
/* Handle the T bit in the new TSS first. */
CPU_BLOCK_END();
goto block_ended;
}
while (!cpu_block_end) {
# ifndef USE_NEW_DYNAREC
oldcs = CS;
@@ -321,13 +327,14 @@ exec386_dynarec_int(void)
CPU_BLOCK_END();
}
block_ended:
if (!cpu_state.abrt && trap) {
dr[6] |= (trap == 2) ? 0x8000 : 0x4000;
trap = 0;
# ifndef USE_NEW_DYNAREC
oldcs = CS;
# endif
cpu_state.oldpc = cpu_state.pc;
dr[6] |= 0x4000;
x86_int(1);
}
@@ -542,7 +549,7 @@ exec386_dynarec_dyn(void)
# endif
CPU_BLOCK_END();
if (cpu_state.flags & T_FLAG)
if ((cpu_state.flags & T_FLAG) || (trap == 2))
CPU_BLOCK_END();
if (smi_line)
CPU_BLOCK_END();

9
src/cpu/cpu.c
View File

@@ -181,6 +181,7 @@ int cpu_multi;
int cpu_16bitbus;
int cpu_64bitbus;
int cpu_cyrix_alignment;
int cpu_cpurst_on_sr;
int CPUID;
int is186;
@@ -742,6 +743,7 @@ cpu_set(void)
timing_misaligned = 0;
cpu_cyrix_alignment = 0;
cpu_cpurst_on_sr = 0;
cpu_CR4_mask = 0;
switch (cpu_s->cpu_type) {
@@ -3034,6 +3036,10 @@ amd_k_invalid_rdmsr:
EAX = msr.ecx1002ff & 0xffffffff;
EDX = msr.ecx1002ff >> 32;
break;
case 0x40000020:
EAX = msr.ecx40000020 & 0xffffffff;
EDX = msr.ecx40000020 >> 32;
break;
case 0xf0f00250:
EAX = msr.ecxf0f00250 & 0xffffffff;
EDX = msr.ecxf0f00250 >> 32;
@@ -3481,6 +3487,9 @@ amd_k_invalid_wrmsr:
case 0x1002ff:
msr.ecx1002ff = EAX | ((uint64_t) EDX << 32);
break;
case 0x40000020:
msr.ecx40000020 = EAX | ((uint64_t) EDX << 32);
break;
case 0xf0f00250:
msr.ecxf0f00250 = EAX | ((uint64_t) EDX << 32);
break;

8
src/cpu/cpu.h
View File

@@ -345,6 +345,9 @@ typedef struct {
/* K6-3, K6-2P, and K6-3P MSR's */
uint64_t amd_l2aar; /* 0xc0000089 */
/* Weird long MSR's used by the Hyper-V BIOS. */
uint64_t ecx40000020; /* 0x40000020 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecxf0f00250; /* 0xf0f00250 - Some weird long MSR's used by i686 AMI & some Phoenix BIOSes */
uint64_t ecxf0f00258; /* 0xf0f00258 */
@@ -550,8 +553,9 @@ extern int cpu_multi;
extern double cpu_dmulti;
extern double fpu_multi;
extern double cpu_busspeed;
extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/
extern int cpu_cyrix_alignment; /* Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries. */
extern int cpu_cpurst_on_sr; /* SiS 551x and 5571: Issue CPURST on soft reset. */
extern int is8086;
extern int is186;

2
src/cpu/x86.c
View File

@@ -342,6 +342,8 @@ reset_common(int hard)
if (!is286)
reset_808x(hard);
cpu_cpurst_on_sr = 0;
}
/* Hard reset. */

13
src/cpu/x86seg.c
View File

@@ -78,6 +78,10 @@ x86seg_log(const char *fmt, ...)
# define x86seg_log(fmt, ...)
#endif
#ifdef USE_DYNAREC
extern int cpu_block_end;
#endif
void
#ifdef OPS_286_386
x86_doabrt_2386(int x86_abrt)
@@ -2088,6 +2092,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
uint32_t new_edi;
uint32_t new_pc;
uint32_t new_flags;
uint32_t t_bit;
uint32_t addr;
uint32_t *segdat232 = (uint32_t *) segdat2;
const x86seg *dt;
@@ -2189,6 +2194,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
new_fs = readmemw(base, 0x58);
new_gs = readmemw(base, 0x5C);
new_ldt = readmemw(base, 0x60);
t_bit = readmemb(base, 0x64) & 1;
cr0 |= 8;
@@ -2279,6 +2285,13 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
op_loadseg(new_ds, &cpu_state.seg_ds);
op_loadseg(new_fs, &cpu_state.seg_fs);
op_loadseg(new_gs, &cpu_state.seg_gs);
if (t_bit) {
trap = 2;
#ifdef USE_DYNAREC
cpu_block_end = 1;
#endif
}
} else {
if (limit < 43) {
x86ts(NULL, seg);

6
src/device.c
View File

@@ -849,3 +849,9 @@ machine_get_config_string(char *s)
return NULL;
}
const device_t*
device_context_get_device(void)
{
return device_current.dev;
}

4
src/device/CMakeLists.txt
View File

@@ -18,11 +18,11 @@
add_library(dev OBJECT bugger.c cassette.c cartridge.c hasp.c hwm.c hwm_lm75.c hwm_lm78.c hwm_gl518sm.c hwm_nsc366.c
hwm_vt82c686.c ibm_5161.c intel_ich2_gpio.c intel_ich2_trap.c
isamem.c isartc.c ../lpt.c pci_bridge.c
postcard.c serial.c clock_ics9xxx.c isapnp.c i2c.c i2c_gpio.c
postcard.c serial.c unittester.c clock_ics9xxx.c isapnp.c i2c.c i2c_gpio.c
smbus_piix4.c smbus_ali7101.c keyboard.c keyboard_xt.c
kbc_at.c kbc_at_dev.c
keyboard_at.c
mouse.c mouse_bus.c mouse_serial.c mouse_ps2.c phoenix_486_jumper.c
mouse.c mouse_bus.c mouse_serial.c mouse_ps2.c nec_mate_unk.c phoenix_486_jumper.c
serial_passthrough.c tco.c)
if(NOT CMAKE_CXX_COMPILER_ID MATCHES "Clang")

2
src/device/isapnp.c
View File

@@ -124,7 +124,7 @@ static void
isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld)
{
/* Ignore card if it hasn't signed up for configuration changes. */
if (!card->config_changed)
if ((card == NULL) || !card->config_changed)
return;
/* Populate config structure, performing endianness conversion as needed. */

49
src/device/kbc_at.c
View File

@@ -44,6 +44,9 @@
#include <86box/video.h>
#include <86box/keyboard.h>
#include <86box/dma.h>
#include <86box/pci.h>
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
@@ -141,8 +144,9 @@ typedef struct atkbc_t {
uint32_t flags;
/* Main timer. */
pc_timer_t send_delay_timer;
/* Main timers. */
pc_timer_t kbc_poll_timer;
pc_timer_t kbc_dev_poll_timer;
/* P2 pulse callback timer. */
pc_timer_t pulse_cb;
@@ -695,10 +699,18 @@ kbc_at_poll(void *priv)
{
atkbc_t *dev = (atkbc_t *) priv;
timer_advance_u64(&dev->send_delay_timer, (100ULL * TIMER_USEC));
timer_advance_u64(&dev->kbc_poll_timer, (100ULL * TIMER_USEC));
/* TODO: Implement the password security state. */
kbc_at_do_poll(dev);
}
static void
kbc_at_dev_poll(void *priv)
{
atkbc_t *dev = (atkbc_t *) priv;
timer_advance_u64(&dev->kbc_dev_poll_timer, (100ULL * TIMER_USEC));
if ((kbc_at_ports[0] != NULL) && (kbc_at_ports[0]->priv != NULL))
kbc_at_ports[0]->poll(kbc_at_ports[0]->priv);
@@ -736,7 +748,7 @@ write_p2(atkbc_t *dev, uint8_t val)
/* AT, PS/2: Handle reset. */
/* 0 holds the CPU in the RESET state, 1 releases it. To simplify this,
we just do everything on release. */
if ((old ^ val) & 0x01) { /*Reset*/
if (!cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
if (!(val & 0x01)) { /* Pin 0 selected. */
/* Pin 0 selected. */
kbc_at_log("write_p2(): Pulse reset!\n");
@@ -765,6 +777,28 @@ write_p2(atkbc_t *dev, uint8_t val)
/* Do this here to avoid an infinite reset loop. */
dev->p2 = val;
if (cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
if (!(val & 0x01)) { /* Pin 0 selected. */
/* Pin 0 selected. */
pclog("write_p2(): Pulse reset!\n");
dma_reset();
dma_set_at(1);
device_reset_all(DEVICE_ALL);
cpu_alt_reset = 0;
pci_reset();
mem_a20_alt = 0;
mem_a20_recalc();
flushmmucache();
resetx86();
}
}
}
static void
@@ -1934,7 +1968,8 @@ kbc_at_close(void *priv)
int max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1;
/* Stop timers. */
timer_disable(&dev->send_delay_timer);
timer_disable(&dev->kbc_dev_poll_timer);
timer_disable(&dev->kbc_poll_timer);
for (int i = 0; i < max_ports; i++) {
if (kbc_at_ports[i] != NULL) {
@@ -1966,9 +2001,11 @@ kbc_at_init(const device_t *info)
io_sethandler(0x0060, 1, kbc_at_read, NULL, NULL, kbc_at_write, NULL, NULL, dev);
io_sethandler(0x0064, 1, kbc_at_read, NULL, NULL, kbc_at_write, NULL, NULL, dev);
timer_add(&dev->send_delay_timer, kbc_at_poll, dev, 1);
timer_add(&dev->kbc_poll_timer, kbc_at_poll, dev, 1);
timer_add(&dev->pulse_cb, pulse_poll, dev, 0);
timer_add(&dev->kbc_dev_poll_timer, kbc_at_dev_poll, dev, 1);
dev->write60_ven = NULL;
dev->write64_ven = NULL;

20
src/device/keyboard_at.c
View File

@@ -32,6 +32,8 @@
#define FIFO_SIZE 16
#define BAT_COUNT 1000
enum {
KBD_84_KEY = 0,
KBD_101_KEY,
@@ -75,6 +77,8 @@ static atkbc_dev_t *SavedKbd = NULL;
static uint8_t inv_cmd_response = 0xfa;
static uint16_t bat_counter = 0;
static const scancode scancode_set1[512] = {
// clang-format off
{ { 0},{ 0} }, { { 0x01,0},{ 0x81,0} }, { { 0x02,0},{ 0x82,0} }, { { 0x03,0},{ 0x83,0} }, /*000*/
@@ -704,11 +708,16 @@ keyboard_at_bat(void *priv)
{
atkbc_dev_t *dev = (atkbc_dev_t *) priv;
keyboard_at_set_defaults(dev);
if (bat_counter == 0x0000) {
keyboard_at_set_defaults(dev);
keyboard_scan = 1;
keyboard_scan = 1;
kbc_at_dev_queue_add(dev, 0xaa, 0);
kbc_at_dev_queue_add(dev, 0xaa, 0);
} else {
bat_counter--;
dev->state = DEV_STATE_EXECUTE_BAT;
}
}
static void
@@ -926,6 +935,7 @@ keyboard_at_write(void *priv)
case 0xff: /* reset */
kbc_at_dev_reset(dev, 1);
bat_counter = 1000;
break;
default:
@@ -965,8 +975,10 @@ keyboard_at_init(const device_t *info)
dev->fifo_mask = FIFO_SIZE - 1;
if (dev->port != NULL)
if (dev->port != NULL) {
kbc_at_dev_reset(dev, 0);
bat_counter = 0x0000;
}
keyboard_send = add_data_kbd;
SavedKbd = dev;

4
src/device/mouse_serial.c
View File

@@ -28,6 +28,7 @@
#include <86box/serial.h>
#include <86box/mouse.h>
#include <86box/plat.h>
#include <86box/version.h>
#define SERMOUSE_PORT 0 /* attach to Serial0 */
@@ -537,7 +538,7 @@ ltsermouse_process_command(mouse_t *dev)
[FORMAT_HEX] = 0x04,
[FORMAT_MS_4BYTE] = 0x08, /* Guess */
[FORMAT_MS_WHEEL] = 0x08 }; /* Guess */
const char *copr = "\r\n(C) 2023 86Box, Revision 3.0";
const char *copr = "\r\n(C) " COPYRIGHT_YEAR " 86Box, Revision 3.0";
mouse_serial_log("ltsermouse_process_command(): %02X\n", dev->ib);
dev->command = dev->ib;
@@ -674,7 +675,6 @@ ltsermouse_process_data(mouse_t *dev)
case 0x2a:
switch (dev->ib) {
default:
mouse_serial_log("Serial mouse: Invalid period %02X, using 1200 bps\n", data);
fallthrough;
case 0x6e:
dev->bps = 1200;

75
src/device/nec_mate_unk.c Normal file
View File

@@ -0,0 +1,75 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the NEC Mate NX MA30D/23D Unknown Readout.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020-2023 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
static uint8_t
nec_mate_unk_read(UNUSED(uint16_t addr), void *priv)
{
/* Expected by this NEC machine.
It writes something on ports 3D6C, 3D6D, and 3D6E, then expects to read
2Ah from port 3D6D. Then it repeats this with ports 6A, 6B, and 6C.
*/
return 0x2a;
}
static void
nec_mate_unk_close(void *priv)
{
uint8_t *dev = (uint8_t *) priv;
free(dev);
}
static void *
nec_mate_unk_init(const device_t *info)
{
/* We have to return something non-NULL. */
uint8_t *dev = (uint8_t *) calloc(1, sizeof(uint8_t));
io_sethandler(0x006b, 0x0001, nec_mate_unk_read, NULL, NULL, NULL, NULL, NULL, NULL);
io_sethandler(0x3d6d, 0x0001, nec_mate_unk_read, NULL, NULL, NULL, NULL, NULL, NULL);
return dev;
}
const device_t nec_mate_unk_device = {
.name = "NEC Mate NX MA30D/23D Unknown Readout",
.internal_name = "nec_mate_unk",
.flags = 0,
.local = 0,
.init = nec_mate_unk_init,
.close = nec_mate_unk_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

635
src/device/unittester.c Normal file
View File

@@ -0,0 +1,635 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Debug device for assisting in unit testing.
* See doc/specifications/86box-unit-tester.md for more info.
* If modifying the protocol, you MUST modify the specification
* and increment the version number.
*
*
*
* Authors: GreaseMonkey, <thematrixeatsyou+86b@gmail.com>
*
* Copyright 2024 GreaseMonkey.
*/
#include <stdarg.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/io.h>
#include <86box/plat.h>
#include <86box/unittester.h>
#include <86box/video.h>
enum fsm1_value {
UT_FSM1_WAIT_8,
UT_FSM1_WAIT_6,
UT_FSM1_WAIT_B,
UT_FSM1_WAIT_o,
UT_FSM1_WAIT_x,
};
enum fsm2_value {
UT_FSM2_IDLE,
UT_FSM2_WAIT_IOBASE_0,
UT_FSM2_WAIT_IOBASE_1,
};
/* Status bit mask */
#define UT_STATUS_AWAITING_READ (1 << 0)
#define UT_STATUS_AWAITING_WRITE (1 << 1)
#define UT_STATUS_IDLE (1 << 2)
#define UT_STATUS_UNSUPPORTED_CMD (1 << 3)
/* Command list */
enum unittester_cmd {
UT_CMD_NOOP = 0x00,
UT_CMD_CAPTURE_SCREEN_SNAPSHOT = 0x01,
UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE = 0x02,
UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE = 0x03,
UT_CMD_EXIT = 0x04,
};
struct unittester_state {
/* I/O port settings */
uint16_t trigger_port;
uint16_t iobase_port;
/* Trigger port finite state machines */
/* FSM1: "86Box" string detection */
enum fsm1_value fsm1;
/* FSM2: IOBASE port selection, once trigger is activated */
enum fsm2_value fsm2;
uint16_t fsm2_new_iobase;
/* Command and data handling state */
uint8_t status;
enum unittester_cmd cmd_id;
uint32_t write_offs;
uint32_t write_len;
uint64_t read_offs;
uint64_t read_len;
/* Screen snapshot state */
/* Monitor to take snapshot on */
uint8_t snap_monitor;
/* Main image width + height */
uint16_t snap_img_width;
uint16_t snap_img_height;
/* Fully overscanned image width + height */
uint16_t snap_overscan_width;
uint16_t snap_overscan_height;
/* Offset of actual image within overscanned area */
uint16_t snap_img_xoffs;
uint16_t snap_img_yoffs;
/* Command-specific state */
/* 0x02: Read Screen Snapshot Rectangle */
/* 0x03: Verify Screen Snapshot Rectangle */
uint16_t read_snap_width;
uint16_t read_snap_height;
int16_t read_snap_xoffs;
int16_t read_snap_yoffs;
uint32_t read_snap_crc;
/* 0x04: Exit */
uint8_t exit_code;
};
static struct unittester_state unittester;
static const struct unittester_state unittester_defaults = {
.trigger_port = 0x0080,
.iobase_port = 0xFFFF,
.fsm1 = UT_FSM1_WAIT_8,
.fsm2 = UT_FSM2_IDLE,
.status = UT_STATUS_IDLE,
.cmd_id = UT_CMD_NOOP,
};
static const device_config_t unittester_config[] = {
{ .name = "exit_enabled",
.description = "Enable 0x04 \"Exit 86Box\" command",
.type = CONFIG_BINARY,
.default_int = 1,
.default_string = "" },
{ .type = CONFIG_END }
};
/* Kept separate, as we will be reusing this object */
static bitmap_t *unittester_screen_buffer = NULL;
static bool unittester_exit_enabled = true;
#ifdef ENABLE_UNITTESTER_LOG
int unittester_do_log = ENABLE_UNITTESTER_LOG;
static void
unittester_log(const char *fmt, ...)
{
va_list ap;
if (unittester_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define unittester_log(fmt, ...)
#endif
static uint8_t
unittester_read_snap_rect_idx(uint64_t offs)
{
/* WARNING: If the width is somehow 0 and wasn't caught earlier, you'll probably get a divide by zero crash. */
uint32_t idx = (offs & 0x3);
int64_t x = (offs >> 2) % unittester.read_snap_width;
int64_t y = (offs >> 2) / unittester.read_snap_width;
x += unittester.read_snap_xoffs;
y += unittester.read_snap_yoffs;
if (x < 0 || y < 0 || x >= unittester.snap_overscan_width || y >= unittester.snap_overscan_height) {
/* Out of range! */
return (idx == 3 ? 0xFF : 0x00);
} else {
/* In range */
return (unittester_screen_buffer->line[y][x] & 0x00FFFFFF) >> (idx * 8);
}
}
static void
unittester_write(uint16_t port, uint8_t val, UNUSED(void *priv))
{
if (port == unittester.iobase_port + 0x00) {
/* Command port */
/* unittester_log("[UT] W %02X Command\n", val); */
unittester.write_offs = 0;
unittester.write_len = 0;
unittester.read_offs = 0;
unittester.read_len = 0;
switch (val) {
/* 0x00: No-op */
case UT_CMD_NOOP:
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE;
break;
/* 0x01: Capture Screen Snapshot */
case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
unittester.cmd_id = UT_CMD_CAPTURE_SCREEN_SNAPSHOT;
unittester.status = UT_STATUS_AWAITING_WRITE;
unittester.write_len = 1;
break;
/* 0x02: Read Screen Snapshot Rectangle */
case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
unittester.cmd_id = UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE;
unittester.status = UT_STATUS_AWAITING_WRITE;
unittester.write_len = 8;
break;
/* 0x03: Verify Screen Snapshot Rectangle */
case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
unittester.cmd_id = UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE;
unittester.status = UT_STATUS_AWAITING_WRITE;
unittester.write_len = 8;
break;
/* 0x04: Exit */
case UT_CMD_EXIT:
unittester.cmd_id = UT_CMD_EXIT;
unittester.status = UT_STATUS_AWAITING_WRITE;
unittester.write_len = 1;
break;
/* Unsupported command - terminate here */
default:
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE | UT_STATUS_UNSUPPORTED_CMD;
break;
}
} else if (port == unittester.iobase_port + 0x01) {
/* Data port */
/* unittester_log("[UT] W %02X Data\n", val); */
/* Skip if not awaiting */
if ((unittester.status & UT_STATUS_AWAITING_WRITE) == 0)
return;
switch (unittester.cmd_id) {
case UT_CMD_EXIT:
switch (unittester.write_offs) {
case 0:
unittester.exit_code = val;
break;
default:
break;
}
break;
case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
switch (unittester.write_offs) {
case 0:
unittester.snap_monitor = val;
break;
default:
break;
}
break;
case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
switch (unittester.write_offs) {
case 0:
unittester.read_snap_width = (uint16_t) val;
break;
case 1:
unittester.read_snap_width |= ((uint16_t) val) << 8;
break;
case 2:
unittester.read_snap_height = (uint16_t) val;
break;
case 3:
unittester.read_snap_height |= ((uint16_t) val) << 8;
break;
case 4:
unittester.read_snap_xoffs = (uint16_t) val;
break;
case 5:
unittester.read_snap_xoffs |= ((uint16_t) val) << 8;
break;
case 6:
unittester.read_snap_yoffs = (uint16_t) val;
break;
case 7:
unittester.read_snap_yoffs |= ((uint16_t) val) << 8;
break;
default:
break;
}
break;
/* This should not be reachable, but just in case... */
default:
break;
}
/* Advance write buffer */
unittester.write_offs += 1;
if (unittester.write_offs >= unittester.write_len) {
unittester.status &= ~UT_STATUS_AWAITING_WRITE;
/* Determine what we're doing here based on the command. */
switch (unittester.cmd_id) {
case UT_CMD_EXIT:
unittester_log("[UT] Exit received - code = %02X\n", unittester.exit_code);
/* CHECK: Do we actually exit? */
if (unittester_exit_enabled) {
/* Yes - call exit! */
/* Clamp exit code */
if (unittester.exit_code > 0x7F)
unittester.exit_code = 0x7F;
/* Exit somewhat quickly! */
unittester_log("[UT] Exit enabled, exiting with code %02X\n", unittester.exit_code);
exit(unittester.exit_code);
} else {
/* No - report successful command completion and continue program execution */
unittester_log("[UT] Exit disabled, continuing execution\n");
}
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE;
break;
case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
/* Recompute screen */
unittester.snap_img_width = 0;
unittester.snap_img_height = 0;
unittester.snap_img_xoffs = 0;
unittester.snap_img_yoffs = 0;
unittester.snap_overscan_width = 0;
unittester.snap_overscan_height = 0;
if (unittester.snap_monitor < 0x01 || (unittester.snap_monitor - 1) > MONITORS_NUM) {
/* No monitor here - clear snapshot */
unittester.snap_monitor = 0x00;
} else if (video_get_type_monitor(unittester.snap_monitor - 1) == VIDEO_FLAG_TYPE_NONE) {
/* Monitor disabled - clear snapshot */
unittester.snap_monitor = 0x00;
} else {
/* Compute bounds for snapshot */
const monitor_t *m = &monitors[unittester.snap_monitor - 1];
unittester.snap_img_width = m->mon_xsize;
unittester.snap_img_height = m->mon_ysize;
unittester.snap_overscan_width = m->mon_xsize + m->mon_overscan_x;
unittester.snap_overscan_height = m->mon_ysize + m->mon_overscan_y;
unittester.snap_img_xoffs = (m->mon_overscan_x >> 1);
unittester.snap_img_yoffs = (m->mon_overscan_y >> 1);
/* Take snapshot */
for (size_t y = 0; y < unittester.snap_overscan_height; y++) {
for (size_t x = 0; x < unittester.snap_overscan_width; x++) {
unittester_screen_buffer->line[y][x] = m->target_buffer->line[y][x];
}
}
}
/* We have 12 bytes to read. */
unittester_log("[UT] Screen snapshot - image %d x %d @ (%d, %d) in overscan %d x %d\n",
unittester.snap_img_width,
unittester.snap_img_height,
unittester.snap_img_xoffs,
unittester.snap_img_yoffs,
unittester.snap_overscan_width,
unittester.snap_overscan_height);
unittester.status = UT_STATUS_AWAITING_READ;
unittester.read_len = 12;
break;
case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
/* Offset the X,Y offsets by the overscan offsets. */
unittester.read_snap_xoffs += (int16_t) unittester.snap_img_xoffs;
unittester.read_snap_yoffs += (int16_t) unittester.snap_img_yoffs;
/* NOTE: Width * Height * 4 can potentially exceed a 32-bit number.
So, we use 64-bit numbers instead.
In practice, this will only happen if someone decides to request e.g. a 65535 x 65535 image,
of which most of the pixels will be out of range anyway.
*/
unittester.read_len = ((uint64_t) unittester.read_snap_width) * ((uint64_t) unittester.read_snap_height) * 4;
unittester.read_snap_crc = 0xFFFFFFFF;
unittester_log("[UT] Screen rectangle analysis - %d x %d @ (%d, %d)\n",
unittester.read_snap_width,
unittester.read_snap_height,
unittester.read_snap_xoffs - (int16_t) unittester.snap_img_xoffs,
unittester.read_snap_yoffs - (int16_t) unittester.snap_img_yoffs);
if (unittester.cmd_id == UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE) {
/* Read everything and compute CRC */
uint32_t crc = 0xFFFFFFFF;
for (uint64_t i = 0; i < unittester.read_len; i++) {
crc ^= 0xFF & (uint32_t) unittester_read_snap_rect_idx(i);
/* Use some bit twiddling until we have a table-based fast CRC-32 implementation */
for (uint32_t j = 0; j < 8; j++) {
crc = (crc >> 1) ^ ((-(crc & 0x1)) & 0xEDB88320);
}
}
unittester.read_snap_crc = crc ^ 0xFFFFFFFF;
unittester_log("[UT] Screen rectangle analysis CRC = %08X\n",
unittester.read_snap_crc);
/* Set actual read length for CRC result */
unittester.read_len = 4;
unittester.status = UT_STATUS_AWAITING_READ;
} else {
/* Do we have anything to read? */
if (unittester.read_len >= 1) {
/* Yes - start reads! */
unittester.status = UT_STATUS_AWAITING_READ;
} else {
/* No - stop here. */
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE;
}
}
break;
default:
/* Nothing to write? Stop here. */
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE;
break;
}
}
} else {
/* Not handled here - possibly open bus! */
}
}
static uint8_t
unittester_read(uint16_t port, UNUSED(void *priv))
{
uint8_t outval = 0xFF;
if (port == unittester.iobase_port + 0x00) {
/* Status port */
/* unittester_log("[UT] R -- Status = %02X\n", unittester.status); */
return unittester.status;
} else if (port == unittester.iobase_port + 0x01) {
/* Data port */
/* unittester_log("[UT] R -- Data\n"); */
/* Skip if not awaiting */
if ((unittester.status & UT_STATUS_AWAITING_READ) == 0)
return 0xFF;
switch (unittester.cmd_id) {
case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
switch (unittester.read_offs) {
case 0:
outval = (uint8_t) (unittester.snap_img_width);
break;
case 1:
outval = (uint8_t) (unittester.snap_img_width >> 8);
break;
case 2:
outval = (uint8_t) (unittester.snap_img_height);
break;
case 3:
outval = (uint8_t) (unittester.snap_img_height >> 8);
break;
case 4:
outval = (uint8_t) (unittester.snap_overscan_width);
break;
case 5:
outval = (uint8_t) (unittester.snap_overscan_width >> 8);
break;
case 6:
outval = (uint8_t) (unittester.snap_overscan_height);
break;
case 7:
outval = (uint8_t) (unittester.snap_overscan_height >> 8);
break;
case 8:
outval = (uint8_t) (unittester.snap_img_xoffs);
break;
case 9:
outval = (uint8_t) (unittester.snap_img_xoffs >> 8);
break;
case 10:
outval = (uint8_t) (unittester.snap_img_yoffs);
break;
case 11:
outval = (uint8_t) (unittester.snap_img_yoffs >> 8);
break;
default:
break;
}
break;
case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
outval = unittester_read_snap_rect_idx(unittester.read_offs);
break;
case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
outval = (uint8_t) (unittester.read_snap_crc >> (8 * unittester.read_offs));
break;
/* This should not be reachable, but just in case... */
default:
break;
}
/* Advance read buffer */
unittester.read_offs += 1;
if (unittester.read_offs >= unittester.read_len) {
/* Once fully read, we stop here. */
unittester.cmd_id = UT_CMD_NOOP;
unittester.status = UT_STATUS_IDLE;
}
return outval;
} else {
/* Not handled here - possibly open bus! */
return 0xFF;
}
}
static void
unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
/* This one gets quite spammy. */
/* unittester_log("[UT] Trigger value %02X -> FSM1 = %02X, FSM2 = %02X, IOBASE = %04X\n", val, unittester.fsm1, unittester.fsm2, unittester.iobase_port); */
/* Update FSM2 */
switch (unittester.fsm2) {
/* IDLE: Do nothing - FSM1 will put us in the right state. */
case UT_FSM2_IDLE:
unittester.fsm2 = UT_FSM2_IDLE;
break;
/* WAIT IOBASE 0: Set low byte of temporary IOBASE. */
case UT_FSM2_WAIT_IOBASE_0:
unittester.fsm2_new_iobase = ((uint16_t) val);
unittester.fsm2 = UT_FSM2_WAIT_IOBASE_1;
break;
/* WAIT IOBASE 0: Set high byte of temporary IOBASE and commit to the real IOBASE. */
case UT_FSM2_WAIT_IOBASE_1:
unittester.fsm2_new_iobase |= ((uint16_t) val) << 8;
unittester_log("[UT] Remapping IOBASE: %04X -> %04X\n", unittester.iobase_port, unittester.fsm2_new_iobase);
/* Unmap old IOBASE */
if (unittester.iobase_port != 0xFFFF)
io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
unittester.iobase_port = 0xFFFF;
/* Map new IOBASE */
unittester.iobase_port = unittester.fsm2_new_iobase;
if (unittester.iobase_port != 0xFFFF)
io_sethandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
/* Reset FSM2 to IDLE */
unittester.fsm2 = UT_FSM2_IDLE;
break;
}
/* Update FSM1 */
switch (val) {
case '8':
unittester.fsm1 = UT_FSM1_WAIT_6;
break;
case '6':
if (unittester.fsm1 == UT_FSM1_WAIT_6)
unittester.fsm1 = UT_FSM1_WAIT_B;
else
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
case 'B':
if (unittester.fsm1 == UT_FSM1_WAIT_B)
unittester.fsm1 = UT_FSM1_WAIT_o;
else
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
case 'o':
if (unittester.fsm1 == UT_FSM1_WAIT_o)
unittester.fsm1 = UT_FSM1_WAIT_x;
else
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
case 'x':
if (unittester.fsm1 == UT_FSM1_WAIT_x) {
unittester_log("[UT] Config activated, awaiting new IOBASE\n");
unittester.fsm2 = UT_FSM2_WAIT_IOBASE_0;
}
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
default:
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
}
}
static void *
unittester_init(UNUSED(const device_t *info))
{
unittester = (struct unittester_state) unittester_defaults;
unittester_exit_enabled = !!device_get_config_int("exit_enabled");
if (unittester_screen_buffer == NULL)
unittester_screen_buffer = create_bitmap(2048, 2048);
io_sethandler(unittester.trigger_port, 1, NULL, NULL, NULL, unittester_trigger_write, NULL, NULL, NULL);
unittester_log("[UT] 86Box Unit Tester initialised\n");
return &unittester; /* Dummy non-NULL value */
}
static void
unittester_close(UNUSED(void *priv))
{
io_removehandler(unittester.trigger_port, 1, NULL, NULL, NULL, unittester_trigger_write, NULL, NULL, NULL);
if (unittester.iobase_port != 0xFFFF)
io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
unittester.iobase_port = 0xFFFF;
if (unittester_screen_buffer != NULL) {
destroy_bitmap(unittester_screen_buffer);
unittester_screen_buffer = NULL;
}
unittester_log("[UT] 86Box Unit Tester closed\n");
}
const device_t unittester_device = {
.name = "86Box Unit Tester",
.internal_name = "unittester",
.flags = DEVICE_ISA,
.local = 0,
.init = unittester_init,
.close = unittester_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = unittester_config,
};

3
src/disk/CMakeLists.txt
View File

@@ -15,7 +15,8 @@
add_library(hdd OBJECT hdd.c hdd_image.c hdd_table.c hdc.c hdc_st506_xt.c
hdc_st506_at.c hdc_xta.c hdc_esdi_at.c hdc_esdi_mca.c hdc_xtide.c
hdc_ide.c hdc_ide_opti611.c hdc_ide_cmd640.c hdc_ide_cmd646.c hdc_ide_sff8038i.c)
hdc_ide.c hdc_ide_ali5213.c hdc_ide_opti611.c hdc_ide_cmd640.c hdc_ide_cmd646.c
hdc_ide_sff8038i.c)
add_library(zip OBJECT zip.c)

69
src/disk/hdc_ide.c
View File

@@ -734,19 +734,25 @@ ide_get_sector(ide_t *ide)
static void
ide_next_sector(ide_t *ide)
{
uint32_t sector = ide->tf->sector;
uint32_t head = ide->tf->head;
if (ide->tf->lba)
ide->lba_addr++;
else {
ide->tf->sector++;
if ((ide->tf->sector == 0) || (ide->tf->sector == (ide->cfg_spt + 1))) {
ide->tf->sector = 1;
ide->tf->head++;
if ((ide->tf->head == 0) || (ide->head == ide->cfg_hpc)) {
ide->tf->head = 0;
sector++;
if ((sector == 0) || (sector == (ide->cfg_spt + 1))) {
sector = 1;
head++;
if (head == ide->cfg_hpc) {
head = 0;
ide->tf->cylinder++;
}
}
}
ide->tf->sector = sector & 0xff;
ide->tf->head = head & 0x0f;
}
static void
@@ -1389,8 +1395,15 @@ ide_write_devctl(UNUSED(uint16_t addr), uint8_t val, void *priv)
} else {
/* Currently active device is 1, simply reset the status and the active device. */
dev_reset(ide);
ide->tf->atastat = DRDY_STAT | DSC_STAT;
if (ide->type == IDE_ATAPI) {
/* Non-early ATAPI devices have DRDY clear after SRST. */
ide->tf->atastat = 0;
if (IDE_ATAPI_IS_EARLY)
ide->tf->atastat |= DRDY_STAT;
} else
ide->tf->atastat = DRDY_STAT | DSC_STAT;
ide->tf->error = 1;
ide_other->tf->error = 1; /* Assert PDIAG-. */
dev->cur_dev &= ~1;
ch = dev->cur_dev;
@@ -1771,7 +1784,7 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
ide->tf->error = ABRT_ERR;
ide_irq_raise(ide);
}
return;
break;
default:
break;
@@ -1788,7 +1801,7 @@ ide_read_data(ide_t *ide, int length)
double xfer_us;
#if defined(ENABLE_IDE_LOG) && (ENABLE_IDE_LOG == 2)
ide_log("ide_read_data(): ch = %i, board = %i, type = %i\n", ch,
ide_log("ide_read_data(): ch = %i, board = %i, type = %i\n", ide->channel,
ide->board, ide->type);
#endif
@@ -1868,7 +1881,8 @@ ide_status(ide_t *ide, ide_t *ide_other, int ch)
/* On real hardware, a slave with a present master always
returns a status of 0x00.
Confirmed by the ATA-3 and ATA-4 specifications. */
ret = 0x00;
// ret = 0x00;
ret = 0x01;
} else {
ret = ide->tf->atastat;
if (ide->type == IDE_ATAPI)
@@ -1948,8 +1962,8 @@ ide_readb(uint16_t addr, void *priv)
else
ret = ide->tf->cylinder >> 8;
#if defined(ENABLE_IDE_LOG) && (ENABLE_IDE_LOG == 2)
pclog("Cylinder high @ board %i, channel %i: ide->type = %i, "
"ret = %02X\n", ide->board, ide->channel, ide->type, ret);
ide_log("Cylinder high @ board %i, channel %i: ide->type = %i, "
"ret = %02X\n", ide->board, ide->channel, ide->type, ret);
#endif
break;
@@ -2070,7 +2084,11 @@ ide_board_callback(void *priv)
ide_log("ide_board_callback(%i)\n", dev->cur_dev >> 1);
for (uint8_t i = 0; i < 2; i++) {
dev->cur_dev &= ~1;
/* Reset the devices in reverse so if there's a slave without a master,
its copy of the master's task file gets reset first. */
for (int8_t i = 1; i >= 0; i--) {
ide = dev->ide[i];
if (ide->type == IDE_ATAPI) {
ide->tf->atastat = 0;
@@ -2078,9 +2096,9 @@ ide_board_callback(void *priv)
ide->tf->atastat |= DRDY_STAT | DSC_STAT;
} else
ide->tf->atastat = DRDY_STAT | DSC_STAT;
}
dev->cur_dev &= ~1;
ide->reset = 0;
}
ide = dev->ide[0];
if (dev->diag) {
@@ -2287,6 +2305,9 @@ ide_callback(void *priv)
case WIN_WRITE:
case WIN_WRITE_NORETRY:
#ifdef ENABLE_IDE_LOG
off64_t sector = ide_get_sector(ide);
#endif
if (ide->type == IDE_ATAPI)
err = ABRT_ERR;
else if (!ide->tf->lba && (ide->cfg_spt == 0))
@@ -2305,6 +2326,7 @@ ide_callback(void *priv)
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0);
}
}
ide_log("Write: %02X, %i, %08X, %" PRIi64 "\n", err, ide->hdd_num, ide->lba_addr, sector);
break;
case WIN_WRITE_DMA:
@@ -2446,6 +2468,7 @@ ide_callback(void *priv)
else {
ide->blocksize = ide->tf->secount;
ide->tf->atastat = DRDY_STAT | DSC_STAT;
ide_irq_raise(ide);
}
break;
@@ -2961,6 +2984,22 @@ ide_board_reset(int board)
ide_drive_reset(d);
}
void
ide_drives_set_shadow(void)
{
for (uint8_t d = 0; d < IDE_NUM; d++) {
if (ide_drives[d] == NULL)
continue;
if ((d & 1) && (ide_drives[d]->type == IDE_NONE) && (ide_drives[d ^ 1]->type != IDE_NONE)) {
ide_drives[d]->type = ide_drives[d ^ 1]->type | IDE_SHADOW;
if (ide_drives[d]->tf != NULL)
free(ide_drives[d]->tf);
ide_drives[d]->tf = ide_drives[d ^ 1]->tf;
}
}
}
/* Reset a standalone IDE unit. */
static void
ide_reset(UNUSED(void *priv))

267
src/disk/hdc_ide_ali5213.c Normal file
View File

@@ -0,0 +1,267 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the ALi M1489 chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020-2021 Tiseno100.
* Copyright 2020-2021 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/hdc_ide.h>
#include <86box/hdc.h>
#include <86box/mem.h>
#include <86box/nmi.h>
#include <86box/pic.h>
#include <86box/pci.h>
#include <86box/plat_unused.h>
#include <86box/port_92.h>
#include <86box/smram.h>
#include <86box/chipset.h>
#ifdef ENABLE_ALI5213_LOG
int ali5213_do_log = ENABLE_ALI5213_LOG;
static void
ali5213_log(const char *fmt, ...)
{
va_list ap;
if (ali5213_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define ali5213_log(fmt, ...)
#endif
typedef struct ali5213_t {
uint8_t index;
uint8_t chip_id;
uint8_t regs[256];
} ali5213_t;
static void
ali5213_ide_handler(ali5213_t *dev)
{
ide_pri_disable();
ide_sec_disable();
if (dev->regs[0x01] & 0x01) {
ide_pri_enable();
if (!(dev->regs[0x35] & 0x40))
ide_sec_enable();
}
}
static void
ali5213_write(uint16_t addr, uint8_t val, void *priv)
{
ali5213_t *dev = (ali5213_t *) priv;
ali5213_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
switch (addr) {
case 0xf4: /* Usually it writes 30h here */
dev->chip_id = val;
break;
case 0xf8:
dev->index = val;
break;
case 0xfc:
if (dev->chip_id != 0x30)
break;
switch (dev->index) {
case 0x01: /* IDE Configuration Register */
dev->regs[dev->index] = val & 0x8f;
ali5213_ide_handler(dev);
break;
case 0x02: /* DBA Data Byte Cative Count for IDE-1 */
case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */
case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */
case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */
case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */
case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */
case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */
case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */
case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */
case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */
case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */
case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */
case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */
case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */
case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */
case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */
case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */
case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */
case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */
case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */
dev->regs[dev->index] = val & 0x1f;
break;
case 0x07: /* Buffer Mode Register 1 */
dev->regs[dev->index] = val;
break;
case 0x09: /* IDEPE1 IDE Port Enable Register 1 */
dev->regs[dev->index] = val & 0xc3;
break;
case 0x0a: /* Buffer Mode Register 2 */
dev->regs[dev->index] = val & 0x4f;
break;
case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */
case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */
case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */
case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */
dev->regs[dev->index] = val & 0x03;
break;
case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */
case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */
case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
dev->regs[dev->index] = val & 0x1f;
break;
case 0x35: /* IDEPE3 IDE Port Enable Register 3 */
dev->regs[dev->index] = val;
ali5213_ide_handler(dev);
break;
default:
break;
}
break;
default:
break;
}
}
static uint8_t
ali5213_read(uint16_t addr, void *priv)
{
const ali5213_t *dev = (ali5213_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0xf4:
ret = dev->chip_id;
break;
case 0xfc:
ret = dev->regs[dev->index];
break;
default:
break;
}
ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
return ret;
}
static void
ali5213_reset(void *priv)
{
ali5213_t *dev = (ali5213_t *) priv;
memset(dev->regs, 0x00, 256);
ide_pri_disable();
ide_sec_disable();
/* IDE registers */
dev->regs[0x00] = 0x57;
dev->regs[0x01] = 0x02;
dev->regs[0x08] = 0xff;
dev->regs[0x09] = 0x41;
dev->regs[0x0c] = 0x02;
dev->regs[0x0e] = 0x02;
dev->regs[0x10] = 0x02;
dev->regs[0x12] = 0x02;
dev->regs[0x34] = 0xff;
dev->regs[0x35] = 0x01;
ali5213_ide_handler(dev);
}
static void
ali5213_close(void *priv)
{
ali5213_t *dev = (ali5213_t *) priv;
free(dev);
}
static void *
ali5213_init(UNUSED(const device_t *info))
{
ali5213_t *dev = (ali5213_t *) calloc(1, sizeof(ali5213_t));
/* M5213/M1489 IDE controller
F4h Chip ID we write always 30h onto it
F8h Index Port
FCh Data Port
*/
io_sethandler(0x0f4, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
io_sethandler(0x0f8, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
io_sethandler(0x0fc, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
device_add(info->local ? &ide_pci_2ch_device : &ide_vlb_2ch_device);
ali5213_reset(dev);
return dev;
}
const device_t ide_ali1489_device = {
.name = "ALi M1489 IDE",
.internal_name = "ali1489_ide",
.flags = 0,
.local = 1,
.init = ali5213_init,
.close = ali5213_close,
.reset = ali5213_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ide_ali5213_device = {
.name = "ALi M5213",
.internal_name = "ali5213",
.flags = 0,
.local = 0,
.init = ali5213_init,
.close = ali5213_close,
.reset = ali5213_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

3
src/disk/hdc_st506_xt.c
View File

@@ -1533,6 +1533,7 @@ static void
set_switches(hdc_t *dev, hd_type_t *hdt, int num)
{
const drive_t *drive;
int c;
int e;
dev->switches = 0x00;
@@ -1546,7 +1547,7 @@ set_switches(hdc_t *dev, hd_type_t *hdt, int num)
continue;
}
for (int c = 0; c < num; c++) {
for (c = 0; c < num; c++) {
/* Does the Xebec also support more than 4 types? */
if ((drive->spt == hdt[c].spt) && (drive->hpc == hdt[c].hpc) && (drive->tracks == hdt[c].tracks)) {
/* Olivetti M24/M240: Move the upper 2 bites up by 2 bits, as the

2
src/disk/zip.c
View File

@@ -531,7 +531,7 @@ zip_load(zip_t *dev, char *fn)
if (fseek(dev->drv->fp, dev->drv->base, SEEK_SET) == -1)
fatal("zip_load(): Error seeking to the beginning of the file\n");
strncpy(dev->drv->image_path, fn, sizeof(dev->drv->image_path) - 1);
strncpy(dev->drv->image_path, fn, strlen(dev->drv->image_path) + 1);
return 1;
}

149
src/floppy/fdc.c
View File

@@ -212,6 +212,7 @@ fdc_ctrl_reset(void *priv)
fdc->lock = 0;
fdc->head = 0;
fdc->step = 0;
fdc->power_down = 0;
if (!(fdc->flags & FDC_FLAG_AT))
fdc->rate = 2;
}
@@ -257,7 +258,7 @@ fdc_set_wrong_am(fdc_t *fdc)
int
fdc_get_drive(fdc_t *fdc)
{
return fdc->drive;
return (int) fdc->drive;
}
int fdc_get_bitcell_period(fdc_t *fdc);
@@ -270,7 +271,7 @@ fdc_get_perp(fdc_t *fdc)
if (!(fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_PCJR))
return 0;
return fdc->perp;
return (int) fdc->perp;
}
int
@@ -292,7 +293,7 @@ fdc_get_gap2(fdc_t *fdc, int drive)
int
fdc_get_format_n(fdc_t *fdc)
{
return fdc->format_n;
return (int) fdc->format_n;
}
int
@@ -321,7 +322,7 @@ fdc_stop_id_request(fdc_t *fdc)
int
fdc_get_gap(fdc_t *fdc)
{
return fdc->gap;
return (int) fdc->gap;
}
int
@@ -333,7 +334,7 @@ fdc_get_dtl(fdc_t *fdc)
int
fdc_get_format_sectors(fdc_t *fdc)
{
return fdc->format_sectors;
return (int) fdc->format_sectors;
}
static void
@@ -418,6 +419,12 @@ fdc_update_rates(fdc_t *fdc)
fdc_rate(fdc, 3);
}
void
fdc_set_power_down(fdc_t *fdc, uint8_t power_down)
{
fdc->power_down = power_down;
}
void
fdc_update_max_track(fdc_t *fdc, int max_track)
{
@@ -427,7 +434,7 @@ fdc_update_max_track(fdc_t *fdc, int max_track)
void
fdc_update_enh_mode(fdc_t *fdc, int enh_mode)
{
fdc->enh_mode = enh_mode;
fdc->enh_mode = !!enh_mode;
fdc_update_rates(fdc);
}
@@ -490,7 +497,7 @@ fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate)
void
fdc_update_drv2en(fdc_t *fdc, int drv2en)
{
fdc->drv2en = drv2en;
fdc->drv2en = !!drv2en;
}
void
@@ -500,37 +507,34 @@ fdc_update_rate(fdc_t *fdc, int drive)
fdc->bit_rate = 500;
else if ((fdc->rwc[drive] == 3) && fdc->enh_mode)
fdc->bit_rate = 250;
else
switch (fdc->rate) {
case 0: /*High density*/
fdc->bit_rate = 500;
break;
case 1: /*Double density (360 rpm)*/
switch (fdc->drvrate[drive]) {
case 0:
fdc->bit_rate = 300;
break;
case 1:
fdc->bit_rate = 500;
break;
case 2:
fdc->bit_rate = 2000;
break;
default:
break;
}
break;
case 2: /*Double density*/
fdc->bit_rate = 250;
break;
case 3: /*Extended density*/
fdc->bit_rate = 1000;
break;
default:
break;
}
else switch (fdc->rate) {
default:
break;
case 0: /*High density*/
fdc->bit_rate = 500;
break;
case 1: /*Double density (360 rpm)*/
switch (fdc->drvrate[drive]) {
default:
break;
case 0:
fdc->bit_rate = 300;
break;
case 1:
fdc->bit_rate = 500;
break;
case 2:
fdc->bit_rate = 2000;
break;
}
break;
case 2: /*Double density*/
fdc->bit_rate = 250;
break;
case 3: /*Extended density*/
fdc->bit_rate = 1000;
break;
}
fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/
}
@@ -688,10 +692,6 @@ fdc_io_command_phase1(fdc_t *fdc, int out)
fdc->stat |= 0x20;
else
dma_set_drq(fdc->dma_ch, 1);
if (out)
fdc->pos = 0;
else
fdc->inread = 1;
}
static void
@@ -741,7 +741,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
cycles -= ISA_CYCLES(8);
switch (addr & 7) {
if (!fdc->power_down || ((addr & 7) == 2) || ((addr & 7) == 4)) switch (addr & 7) {
case 0:
return;
case 1:
@@ -776,14 +776,20 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = fdc->ptot = 0;
}
if ((val & 4) && !(fdc->dor & 4)) {
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
fdc->interrupt = -1;
fdc->perp &= 0xfc;
if (fdc->power_down) {
timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
fdc->interrupt = -5;
} else {
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
fdc->interrupt = -1;
for (i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0);
fdc->perp &= 0xfc;
fdc_ctrl_reset(fdc);
for (i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0);
fdc_ctrl_reset(fdc);
}
}
/* We can now simplify this since each motor now spins separately. */
for (i = 0; i < FDD_NUM; i++) {
@@ -854,7 +860,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 4;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->format_state = 0;
} else
fdc_bad_command(fdc);
@@ -866,7 +871,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 8;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
break;
case 0x03: /*Specify*/
@@ -888,7 +892,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 8;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
break;
case 0x06: /*Read data*/
@@ -907,7 +910,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 8;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
break;
case 0x17: /*Powerdown mode*/
@@ -924,28 +926,24 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
case 0x08: /*Sense interrupt status*/
fdc_log("fdc->fintr = %i, fdc->reset_stat = %i\n", fdc->fintr, fdc->reset_stat);
fdc->lastdrive = fdc->drive;
fdc->pos = 0;
fdc_sis(fdc);
break;
case 0x0a: /*Read sector ID*/
fdc->pnum = 0;
fdc->ptot = 1;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
break;
case 0x0d: /*Format track*/
fdc->pnum = 0;
fdc->ptot = 5;
fdc->stat |= 0x90;
fdc->pos = 0;
fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
fdc->format_state = 0;
break;
case 0x0e: /*Dump registers*/
fdc->lastdrive = fdc->drive;
fdc->interrupt = 0x0e;
fdc->pos = 0;
fdc_callback(fdc);
break;
case 0x0f: /*Seek*/
@@ -964,7 +962,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
case 0x94: /*Lock*/
fdc->lastdrive = fdc->drive;
fdc->interrupt = fdc->command;
fdc->pos = 0;
fdc_callback(fdc);
break;
case 0x12: /*Set perpendicular mode*/
@@ -972,7 +969,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 1;
fdc->stat |= 0x90;
fdc->pos = 0;
} else
fdc_bad_command(fdc);
break;
@@ -980,7 +976,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->pnum = 0;
fdc->ptot = 3;
fdc->stat |= 0x90;
fdc->pos = 0;
break;
default:
fdc_bad_command(fdc);
@@ -1151,7 +1146,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->format_sectors = fdc->params[2];
fdc->format_n = fdc->params[1];
fdc->format_state = 1;
fdc->pos = 0;
fdc->stat = 0x10;
break;
case 0x0f: /* Seek */
@@ -1273,12 +1267,12 @@ uint8_t
fdc_read(uint16_t addr, void *priv)
{
fdc_t *fdc = (fdc_t *) priv;
uint8_t ret;
uint8_t ret = 0xff;
int drive = 0;
cycles -= ISA_CYCLES(8);
switch (addr & 7) {
if (!fdc->power_down || ((addr & 7) == 2)) switch (addr & 7) {
case 0: /* STA */
if (fdc->flags & FDC_FLAG_PS1) {
drive = real_drive(fdc, fdc->dor & 3);
@@ -1513,7 +1507,6 @@ fdc_poll_readwrite_finish(fdc_t *fdc, int compare)
if ((fdc->interrupt == 5) || (fdc->interrupt == 9))
fdd_do_writeback(real_drive(fdc, fdc->drive));
fdc->inread = 0;
fdc->interrupt = -2;
fdc_poll_common_finish(fdc, compare, 0);
@@ -1544,10 +1537,21 @@ fdc_callback(void *priv)
case -2: /*End of command*/
fdc->stat = (fdc->stat & 0xf) | 0x80;
return;
case -5: /*Reset in power down mode */
fdc->perp &= 0xfc;
for (uint8_t i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0);
fdc_ctrl_reset(fdc);
fdc->fintr = 0;
memset(fdc->pcn, 0x00, 4 * sizeof(uint16_t));
return;
case -1: /*Reset*/
fdc_int(fdc, 1);
fdc->fintr = 0;
memset(fdc->pcn, 0, 4 * sizeof(int));
memset(fdc->pcn, 0x00, 4 * sizeof(uint16_t));
fdc->reset_stat = 4;
return;
case 0x01: /* Mode */
@@ -1570,7 +1574,6 @@ fdc_callback(void *priv)
fdc->stat = 0x50;
}
}
fdc->inread = 1;
return;
case 0x04: /* Sense drive status */
fdc->res[10] = (fdc->params[0] & 7) | 0x20;
@@ -1715,7 +1718,6 @@ fdc_callback(void *priv)
default:
break;
}
fdc->inread = 1;
return;
case 0x07: /* Recalibrate */
fdc->pcn[fdc->params[0] & 3] = 0;
@@ -2004,18 +2006,11 @@ fdc_data(fdc_t *fdc, uint8_t data, int last)
return 0;
}
void
fdc_finishread(fdc_t *fdc)
{
fdc->inread = 0;
}
void
fdc_track_finishread(fdc_t *fdc, int condition)
{
fdc->stat = 0x10;
fdc->satisfying_sectors |= condition;
fdc->inread = 0;
fdc_callback(fdc);
}
@@ -2025,7 +2020,6 @@ fdc_sector_finishcompare(fdc_t *fdc, int satisfying)
fdc->stat = 0x10;
if (satisfying)
fdc->satisfying_sectors++;
fdc->inread = 0;
fdc_callback(fdc);
}
@@ -2033,7 +2027,6 @@ void
fdc_sector_finishread(fdc_t *fdc)
{
fdc->stat = 0x10;
fdc->inread = 0;
fdc_callback(fdc);
}
@@ -2356,6 +2349,8 @@ fdc_reset(void *priv)
for (uint8_t i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0);
fdc->power_down = 0;
}
static void
@@ -2418,7 +2413,7 @@ fdc_init(const device_t *info)
void
fdc_3f1_enable(fdc_t *fdc, int enable)
{
fdc->enable_3f1 = enable;
fdc->enable_3f1 = !!enable;
}
const device_t fdc_xt_device = {

97
src/floppy/fdd_86f.c
View File

@@ -1274,18 +1274,19 @@ d86f_find_address_mark_fm(int drive, int side, find_t *find, uint16_t req_am, ui
if (dev->last_word[side] == req_am) {
dev->calc_crc.word = 0xFFFF;
fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc));
find->sync_marks = find->bits_obtained = find->bytes_obtained = 0;
find->sync_pos = 0xFFFFFFFF;
dev->preceding_bit[side] = dev->last_word[side] & 1;
find->sync_marks = find->bits_obtained =
find->bytes_obtained = 0;
find->sync_pos = 0xFFFFFFFF;
dev->preceding_bit[side] = dev->last_word[side] & 1;
dev->state++;
return;
}
if (wrong_am && (dev->last_word[side] == wrong_am)) {
dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_finishread(d86f_fdc);
dev->data_find.sync_marks = dev->data_find.bits_obtained =
dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_nodataam(d86f_fdc);
return;
}
@@ -1328,8 +1329,9 @@ d86f_write_find_address_mark_fm(int drive, int side, find_t *find)
/* If we hadn't found enough set bits but have found a clear bit, null the counter of set bits. */
if (!(dev->last_word[side] & 1)) {
find->sync_marks = find->bits_obtained = find->bytes_obtained = 0;
find->sync_pos = 0xFFFFFFFF;
find->sync_marks = find->bits_obtained =
find->bytes_obtained = 0;
find->sync_pos = 0xFFFFFFFF;
}
}
@@ -1347,10 +1349,10 @@ d86f_find_address_mark_mfm(int drive, int side, find_t *find, uint16_t req_am, u
}
if (wrong_am && (dev->last_word[side] == wrong_am) && (find->sync_marks >= 3)) {
dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_finishread(d86f_fdc);
dev->data_find.sync_marks = dev->data_find.bits_obtained =
dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_nodataam(d86f_fdc);
return;
}
@@ -1433,22 +1435,26 @@ d86f_read_sector_id(int drive, int side, int match)
if (!(dev->id_find.bits_obtained & 15)) {
/* We've got a byte. */
if (dev->id_find.bytes_obtained < 4) {
dev->last_sector.byte_array[dev->id_find.bytes_obtained] = decodefm(drive, dev->last_word[side]);
dev->last_sector.byte_array[dev->id_find.bytes_obtained] =
decodefm(drive, dev->last_word[side]);
fdd_calccrc(dev->last_sector.byte_array[dev->id_find.bytes_obtained], &(dev->calc_crc));
} else if ((dev->id_find.bytes_obtained >= 4) && (dev->id_find.bytes_obtained < 6)) {
dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] = decodefm(drive, dev->last_word[side]);
dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] =
decodefm(drive, dev->last_word[side]);
}
dev->id_find.bytes_obtained++;
if (dev->id_find.bytes_obtained == 6) {
/* We've got the ID. */
if ((dev->calc_crc.word != dev->track_crc.word) && (dev->last_sector.dword == dev->req_sector.dword)) {
dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0;
d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword);
if ((dev->calc_crc.word != dev->track_crc.word) &&
(dev->last_sector.dword == dev->req_sector.dword)) {
dev->id_find.sync_marks = dev->id_find.bits_obtained =
dev->id_find.bytes_obtained = 0;
d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word,
dev->calc_crc.word, dev->last_sector.dword);
if ((dev->state != STATE_02_READ_ID) && (dev->state != STATE_0A_READ_ID)) {
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_finishread(d86f_fdc);
fdc_headercrcerror(d86f_fdc);
} else if (dev->state == STATE_0A_READ_ID)
dev->state--;
@@ -1458,25 +1464,37 @@ d86f_read_sector_id(int drive, int side, int match)
}
} else if ((dev->calc_crc.word == dev->track_crc.word) && (dev->state == STATE_0A_READ_ID)) {
/* CRC is valid and this is a read sector ID command. */
dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0;
fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0);
dev->id_find.sync_marks = dev->id_find.bits_obtained =
dev->id_find.bytes_obtained = dev->error_condition = 0;
fdc_sectorid(d86f_fdc,
dev->last_sector.id.c, dev->last_sector.id.h,
dev->last_sector.id.r, dev->last_sector.id.n, 0, 0);
dev->state = STATE_IDLE;
} else {
/* CRC is valid. */
dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0;
dev->id_find.sync_marks = dev->id_find.bits_obtained =
dev->id_find.bytes_obtained = 0;
dev->id_found |= 1;
if ((dev->last_sector.dword == dev->req_sector.dword) || !match) {
d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n);
d86f_handler[drive].set_sector(drive, side,
dev->last_sector.id.c, dev->last_sector.id.h,
dev->last_sector.id.r, dev->last_sector.id.n);
if (dev->state == STATE_02_READ_ID) {
/* READ TRACK command, we need some special handling here. */
/* Code corrected: Only the C, H, and N portions of the sector ID are compared, the R portion (the sector number) is ignored. */
if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) || (dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) || (dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) {
dev->error_condition |= 4; /* Mark that the sector ID is not the one expected by the FDC. */
/* Code corrected: Only the C, H, and N portions of the
sector ID are compared, the R portion
(the sector number) is ignored. */
if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) ||
(dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) ||
(dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) {
/* Mark that the sector ID is not the one expected by the FDC. */
dev->error_condition |= 4;
/* Make sure we use the sector size from the FDC. */
dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n;
}
/* If the two ID's are identical, then we do not need to do anything regarding the sector size. */
/* If the two ID's are identical, then we do not need to do
anything regarding the sector size. */
}
dev->state++;
} else {
@@ -1576,7 +1594,8 @@ d86f_read_sector_data(int drive, int side)
data = d86f_handler[drive].read_data(drive, side, dev->data_find.bytes_obtained);
else {
#ifdef HACK_FOR_DBASE_III
if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) && (dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272))
if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) &&
(dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272))
data = (random_generate() & 0xff);
else
#endif
@@ -1589,7 +1608,9 @@ d86f_read_sector_data(int drive, int side)
} else {
if (dev->data_find.bytes_obtained < d86f_get_data_len(drive)) {
if (dev->state != STATE_16_VERIFY_DATA) {
read_status = fdc_data(d86f_fdc, data, dev->data_find.bytes_obtained == (d86f_get_data_len(drive) - 1));
read_status = fdc_data(d86f_fdc, data,
dev->data_find.bytes_obtained ==
(d86f_get_data_len(drive) - 1));
if (read_status == -1)
dev->dma_over++;
}
@@ -1597,17 +1618,19 @@ d86f_read_sector_data(int drive, int side)
}
fdd_calccrc(data, &(dev->calc_crc));
} else if (dev->data_find.bytes_obtained < crc_pos)
dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] = decodefm(drive, dev->last_word[side]);
dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] =
decodefm(drive, dev->last_word[side]);
dev->data_find.bytes_obtained++;
if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) {
/* We've got the data. */
if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state != STATE_02_READ_DATA)) {
d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword);
dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_finishread(d86f_fdc);
d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word,
dev->calc_crc.word, dev->last_sector.dword);
dev->data_find.sync_marks = dev->data_find.bits_obtained =
dev->data_find.bytes_obtained = 0;
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_datacrcerror(d86f_fdc);
} else if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state == STATE_02_READ_DATA)) {
dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
@@ -2146,7 +2169,8 @@ d86f_turbo_read(int drive, int side)
} else {
if (dev->turbo_pos < (128UL << dev->req_sector.id.n)) {
if (dev->state != STATE_16_VERIFY_DATA) {
read_status = fdc_data(d86f_fdc, dat, dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1));
read_status = fdc_data(d86f_fdc, dat,
dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1));
if (read_status == -1)
dev->dma_over++;
}
@@ -2163,7 +2187,6 @@ d86f_turbo_read(int drive, int side)
#endif
dev->error_condition = 0;
dev->state = STATE_IDLE;
fdc_finishread(d86f_fdc);
fdc_datacrcerror(d86f_fdc);
} else if ((flags & SECTOR_CRC_ERROR) && (dev->state == STATE_02_READ_DATA)) {
#ifdef ENABLE_D86F_LOG

3
src/include/86box/86box.h
View File

@@ -33,7 +33,7 @@
/* Recently used images */
#define MAX_PREV_IMAGES 4
#define MAX_IMAGE_PATH_LEN 256
#define MAX_IMAGE_PATH_LEN 2048
/* Default language 0xFFFF = from system, 0x409 = en-US */
#define DEFAULT_LANGUAGE 0x0409
@@ -125,6 +125,7 @@ extern int gfxcard[2]; /* (C) graphics/video card */
extern char video_shader[512]; /* (C) video */
extern int bugger_enabled; /* (C) enable ISAbugger */
extern int postcard_enabled; /* (C) enable POST card */
extern int unittester_enabled; /* (C) enable unit tester device */
extern int isamem_type[]; /* (C) enable ISA mem cards */
extern int isartc_type; /* (C) enable ISA RTC card */
extern int sound_is_float; /* (C) sound uses FP values */

2
src/include/86box/chipset.h
View File

@@ -178,6 +178,8 @@ extern const device_t vlsi_scamp_device;
extern const device_t wd76c10_device;
/* Miscellaneous Hardware */
extern const device_t nec_mate_unk_device;
extern const device_t phoenix_486_jumper_device;
extern const device_t phoenix_486_jumper_pci_device;

2
src/include/86box/device.h
View File

@@ -202,6 +202,8 @@ extern const char *device_get_bios_file(const device_t *dev, const char *interna
extern int device_is_valid(const device_t *, int m);
extern const device_t* device_context_get_device(void);
extern int device_get_config_int(const char *name);
extern int device_get_config_int_ex(const char *s, int dflt_int);
extern int device_get_config_hex16(const char *name);

106
src/include/86box/fdc.h
View File

@@ -65,76 +65,85 @@ typedef struct fdc_t {
uint8_t st0;
uint8_t swap;
uint8_t dtl;
uint8_t swwp;
uint8_t disable_write;
uint8_t st5;
uint8_t st6;
uint8_t error;
uint8_t params[8];
uint8_t res[11];
uint8_t specify[2];
uint8_t config;
uint8_t pretrk;
uint8_t power_down;
uint8_t head;
uint8_t lastdrive;
uint8_t sector;
uint8_t drive;
uint8_t rate;
uint8_t tc;
uint8_t pnum;
uint8_t ptot;
uint8_t reset_stat;
uint8_t seek_dir;
uint8_t perp;
uint8_t format_state;
uint8_t format_n;
uint8_t step;
uint8_t noprec;
uint8_t data_ready;
uint8_t paramstogo;
uint8_t enh_mode;
uint8_t dma;
uint8_t densel_polarity;
uint8_t densel_force;
uint8_t fifo;
uint8_t tfifo;
uint8_t fifobufpos;
uint8_t drv2en;
uint8_t gap;
uint8_t enable_3f1;
uint8_t format_sectors;
uint8_t mfm;
uint8_t deleted;
uint8_t wrong_am;
uint8_t sc;
uint8_t fintr;
uint8_t rw_drive;
uint8_t lock;
uint8_t specify[2];
uint8_t res[11];
uint8_t eot[4];
uint8_t rwc[4];
uint8_t params[8];
uint8_t fifobuf[16];
uint16_t pcn[4];
uint16_t base_address;
uint16_t rw_track;
int head;
int sector;
int drive;
int lastdrive;
int pcn[4];
int eot[4];
int rw_track;
int pos;
int pnum;
int ptot;
int rate;
int reset_stat;
int lock;
int perp;
int format_state;
int format_n;
int step;
int seek_dir;
int tc;
int noprec;
int bit_rate; /* Should be 250 at start. */
int data_ready;
int inread;
int bitcell_period;
int enh_mode;
int rwc[4];
int drvrate[4];
int boot_drive;
int dma;
int densel_polarity;
int densel_force;
int fifo;
int tfifo;
int fifobufpos;
int drv2en;
int gap;
int enable_3f1;
int format_sectors;
int max_track;
int mfm;
int deleted;
int wrong_am;
int sc;
int satisfying_sectors;
int fintr;
int rw_drive;
int flags;
int interrupt;
int irq; /* Should be 6 by default. */
int dma_ch; /* Should be 2 by default. */
int irq; /* Should be 6 by default. */
int dma_ch; /* Should be 2 by default. */
int bit_rate; /* Should be 250 at start. */
int paramstogo;
int drvrate[4];
sector_id_t read_track_sector;
sector_id_t format_sector_id;
@@ -183,6 +192,7 @@ extern int fdc_get_compare_condition(fdc_t *fdc);
extern int fdc_is_deleted(fdc_t *fdc);
extern int fdc_is_sk(fdc_t *fdc);
extern void fdc_set_wrong_am(fdc_t *fdc);
extern void fdc_set_power_down(fdc_t *fdc, uint8_t power_down);
extern int fdc_get_drive(fdc_t *fdc);
extern int fdc_get_perp(fdc_t *fdc);
extern int fdc_get_format_n(fdc_t *fdc);

3
src/include/86box/hdc.h
View File

@@ -60,6 +60,9 @@ extern const device_t ide_vlb_2ch_device; /* vlb_ide_2ch */
extern const device_t ide_pci_device; /* pci_ide */
extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */
extern const device_t ide_ali1489_device; /* ALi M1489 */
extern const device_t ide_ali5213_device; /* ALi M5213 */
extern const device_t ide_cmd640_vlb_device; /* CMD PCI-640B VLB */
extern const device_t ide_cmd640_vlb_178_device; /* CMD PCI-640B VLB (Port 178h) */
extern const device_t ide_cmd640_vlb_pri_device; /* CMD PCI-640B VLB (Only primary channel) */

2
src/include/86box/hdc_ide.h
View File

@@ -188,6 +188,8 @@ extern void ide_atapi_attach(ide_t *dev);
extern void *ide_xtide_init(void);
extern void ide_xtide_close(void);
extern void ide_drives_set_shadow(void);
extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);

4
src/include/86box/hdd.h
View File

@@ -159,8 +159,8 @@ typedef struct hard_disk_t {
char fn[1024]; /* Name of current image file */
char vhd_parent[1041]; /* Differential VHD parent file */
uint32_t res0;
uint32_t pad1;
uint32_t seek_pos;
uint32_t seek_len;
uint32_t base;
uint32_t spt;
uint32_t hpc; /* Physical geometry parameters */

7
src/include/86box/machine.h
View File

@@ -639,6 +639,7 @@ extern int machine_at_8500tuc_init(const machine_t *);
extern int machine_at_p55t2s_init(const machine_t *);
extern int machine_at_p5vxb_init(const machine_t *);
extern int machine_at_dell_430vx_init(const machine_t *);
extern int machine_at_gw2kte_init(const machine_t *);
extern int machine_at_ap5s_init(const machine_t *);
@@ -686,6 +687,7 @@ extern int machine_at_ficpa2012_init(const machine_t *);
extern int machine_at_r534f_init(const machine_t *);
extern int machine_at_ms5146_init(const machine_t *);
extern int machine_at_cb52x_si_init(const machine_t *);
extern int machine_at_m560_init(const machine_t *);
extern int machine_at_ms5164_init(const machine_t *);
@@ -707,6 +709,7 @@ extern int machine_at_aurora_init(const machine_t *);
extern int machine_at_686nx_init(const machine_t *);
extern int machine_at_acerv60n_init(const machine_t *);
extern int machine_at_lgibm440fx_init(const machine_t *);
extern int machine_at_vs440fx_init(const machine_t *);
extern int machine_at_gw2kvenus_init(const machine_t *);
extern int machine_at_ap440fx_init(const machine_t *);
@@ -727,9 +730,12 @@ extern int machine_at_kn97_init(const machine_t *);
extern int machine_at_lx6_init(const machine_t *);
extern int machine_at_spitfire_init(const machine_t *);
extern int machine_at_mate_nx_ma30d_23d_init(const machine_t *);
extern int machine_at_p6i440e2_init(const machine_t *);
extern int machine_at_p2bls_init(const machine_t *);
extern int machine_at_lgibm440bx_init(const machine_t *);
extern int machine_at_p3bf_init(const machine_t *);
extern int machine_at_bf6_init(const machine_t *);
extern int machine_at_ax6bc_init(const machine_t *);
@@ -852,6 +858,7 @@ extern int machine_xt_pc700_init(const machine_t *);
extern int machine_xt_pc500_init(const machine_t *);
extern int machine_xt_vendex_init(const machine_t *);
extern int machine_xt_znic_init(const machine_t *);
extern int machine_xt_glabios_init(const machine_t *);
extern int machine_xt_super16t_init(const machine_t *);
extern int machine_xt_super16te_init(const machine_t *);
extern int machine_xt_top88_init(const machine_t *);

1
src/include/86box/pci.h
View File

@@ -71,6 +71,7 @@
#define FLAG_CONFIG_M1_IO_ON 0x00000020
#define FLAG_NO_IRQ_STEERING 0x00000040
#define FLAG_NO_BRIDGES 0x00000080
#define FLAG_TRC_CONTROLS_CPURST 0x00000100
#define FLAG_MECHANISM_MASK FLAG_MECHANISM_1 | FLAG_MECHANISM_2
#define FLAG_MASK 0x0000007f

1
src/include/86box/plat.h
View File

@@ -149,6 +149,7 @@ extern uint32_t plat_language_code(char *langcode);
extern void plat_language_code_r(uint32_t lcid, char *outbuf, int len);
extern void plat_get_cpu_string(char *outbuf, uint8_t len);
extern double plat_get_dpi(void);
extern void plat_set_thread_name(void *thread, const char *name);
/* Resource management. */
extern void set_language(uint32_t id);

3
src/include/86box/printer.h
View File

@@ -46,7 +46,8 @@
#ifndef PRINTER_H
#define PRINTER_H
#define FONT_FILE_DOTMATRIX "dotmatrix.ttf"
#define FONT_FILE_DOTMATRIX "dotmatrix.otf"
#define FONT_FILE_DOTMATRIX_ITALIC "dotmatrix_italic.otf"
#define FONT_FILE_ROMAN "roman.ttf"
#define FONT_FILE_SANSSERIF "sansserif.ttf"

2
src/include/86box/scsi_pcscsi.h
View File

@@ -26,6 +26,6 @@
#define SCSI_PCSCSI_H
extern const device_t dc390_pci_device;
extern const device_t ncr53c90_mca_device;
extern const device_t ncr53c90a_mca_device;
#endif /*SCSI_BUSLOGIC_H*/

1
src/include/86box/sio.h
View File

@@ -19,6 +19,7 @@
extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv);
extern const device_t acc3221_device;
extern const device_t ali5105_device;
extern const device_t ali5123_device;
extern const device_t f82c710_device;
extern const device_t f82c606_device;

5
src/include/86box/thread.h
View File

@@ -28,7 +28,7 @@ extern "C" {
# define event_t plat_event_t
# define mutex_t plat_mutex_t
# define thread_create plat_thread_create
# define thread_create_named plat_thread_create_named
# define thread_wait plat_thread_wait
# define thread_create_event plat_thread_create_event
# define thread_set_event plat_thread_set_event
@@ -48,7 +48,8 @@ typedef void thread_t;
typedef void event_t;
typedef void mutex_t;
extern thread_t *thread_create(void (*thread_func)(void *param), void *param);
#define thread_create(thread_func, param) thread_create_named((thread_func), (param), #thread_func)
extern thread_t *thread_create_named(void (*thread_func)(void *param), void *param, const char *name);
extern int thread_wait(thread_t *arg);
extern event_t *thread_create_event(void);
extern void thread_set_event(event_t *arg);

37
src/include/86box/unittester.h Normal file
View File

@@ -0,0 +1,37 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Debug device for assisting in unit testing.
* See doc/specifications/86box-unit-tester.md for more info.
* If modifying the protocol, you MUST modify the specification
* and increment the version number.
*
*
*
* Authors: GreaseMonkey, <thematrixeatsyou+86b@gmail.com>
*
* Copyright 2024 GreaseMonkey.
*/
#ifndef UNITTESTER_H
#define UNITTESTER_H
#ifdef __cplusplus
extern "C" {
#endif
/* Global variables. */
extern const device_t unittester_device;
/* Functions. */
#ifdef __cplusplus
}
#endif
#endif /*UNITTESTER_H*/

8
src/include/86box/vid_8514a.h
View File

@@ -67,13 +67,14 @@ typedef struct ibm8514_t {
uint16_t advfunc_cntl;
uint8_t ext_advfunc_cntl;
uint16_t cur_y;
uint16_t cur_y_bitres;
uint16_t cur_x;
uint16_t cur_x_bitres;
int16_t destx;
int16_t desty;
int16_t desty_axstp;
int16_t destx_distp;
int16_t err_term;
int16_t maj_axis_pcnt;
int16_t maj_axis_pcnt_no_limit;
uint16_t cmd;
uint16_t cmd_back;
uint16_t short_stroke;
@@ -100,7 +101,9 @@ typedef struct ibm8514_t {
int sys_cnt2;
int temp_cnt;
int16_t cx;
int16_t cx_back;
int16_t cy;
int16_t oldcx;
int16_t oldcy;
int16_t sx;
int16_t sy;
@@ -133,6 +136,7 @@ typedef struct ibm8514_t {
int fill_state;
int xdir;
int ydir;
int linedraw;
uint32_t ge_offset;
} accel;

1
src/include/86box/vid_cga.h
View File

@@ -66,6 +66,7 @@ typedef struct cga_t {
int composite;
int snow_enabled;
int rgb_type;
int double_type;
} cga_t;
void cga_init(cga_t *cga);

4
src/include/86box/vid_ega.h
View File

@@ -109,6 +109,8 @@ typedef struct ega_t {
int bpp;
int index;
int remap_required;
int actual_type;
int chipset;
uint32_t charseta;
uint32_t charsetb;
@@ -143,7 +145,7 @@ typedef struct ega_t {
extern const device_t ega_device;
extern const device_t cpqega_device;
extern const device_t sega_device;
extern const device_t atiega_device;
extern const device_t atiega800p_device;
extern const device_t iskra_ega_device;
extern const device_t et2000_device;
#endif

33
src/include/86box/vid_svga.h
View File

@@ -128,6 +128,8 @@ typedef struct svga_t {
int hblank_sub;
int hblank_end_val;
int hblank_end_len;
int packed_4bpp;
int ati_4color;
/*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 :
0MB-1MB - VRAM
@@ -231,6 +233,7 @@ typedef struct svga_t {
uint8_t dac_status;
uint8_t dpms;
uint8_t dpms_ui;
uint8_t color_2bpp;
uint8_t ksc5601_sbyte_mask;
uint8_t ksc5601_udc_area_msb[2];
@@ -246,6 +249,11 @@ typedef struct svga_t {
addresses are shifted to match*/
int packed_chain4;
/*Disable 8bpp blink mode - some cards support it, some don't, it's a weird mode
If mode 13h appears in a reddish-brown background (0x88) with dark green text (0x8F),
you should set this flag when entering that mode*/
int disable_blink;
/*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/
int force_dword_mode;
@@ -263,6 +271,15 @@ typedef struct svga_t {
/* Pointer to monitor */
monitor_t *monitor;
/* Enable LUT mapping of >= 24 bpp modes. */
int lut_map;
/* Override the horizontal blanking stuff. */
int hoverride;
/* Return a 32 bpp color from a 15/16 bpp color. */
uint32_t (*conv_16to32)(struct svga_t *svga, uint16_t color, uint8_t bpp);
void * dev8514;
void * xga;
} svga_t;
@@ -275,7 +292,7 @@ extern uint8_t ibm8514_ramdac_in(uint16_t port, void *priv);
extern void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *priv);
extern int ibm8514_cpu_src(svga_t *svga);
extern int ibm8514_cpu_dest(svga_t *svga);
extern void ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint16_t val, int len);
extern void ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint32_t val, int len);
extern void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len);
extern void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len);
@@ -329,6 +346,8 @@ enum {
RAMDAC_8BIT
};
uint32_t svga_lookup_lut_ram(svga_t* svga, uint32_t val);
/* We need a way to add a device with a pointer to a parent device so it can attach itself to it, and
possibly also a second ATi 68860 RAM DAC type that auto-sets SVGA render on RAM DAC render change. */
extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
@@ -388,11 +407,13 @@ extern float stg_getclock(int clock, void *priv);
extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
extern void tvp3026_recalctimings(void *priv, svga_t *svga);
extern void tvp3026_hwcursor_draw(svga_t *svga, int displine);
extern float tvp3026_getclock(int clock, void *priv);
extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
extern uint32_t tvp3026_conv_16to32(svga_t* svga, uint16_t color, uint8_t bpp);
extern void tvp3026_recalctimings(void *priv, svga_t *svga);
extern void tvp3026_hwcursor_draw(svga_t *svga, int displine);
extern float tvp3026_getclock(int clock, void *priv);
extern void tvp3026_gpio(uint8_t (*read)(uint8_t cntl, void *priv), void (*write)(uint8_t cntl, uint8_t data, void *priv), void *cb_priv, void *priv);
# ifdef EMU_DEVICE_H
extern const device_t ati68860_ramdac_device;

1
src/include/86box/vid_svga_render.h
View File

@@ -53,6 +53,7 @@ extern void svga_render_4bpp_lowres(svga_t *svga);
extern void svga_render_4bpp_highres(svga_t *svga);
extern void svga_render_8bpp_lowres(svga_t *svga);
extern void svga_render_8bpp_highres(svga_t *svga);
extern void svga_render_8bpp_incompatible_highres(svga_t *svga);
extern void svga_render_8bpp_tseng_lowres(svga_t *svga);
extern void svga_render_8bpp_tseng_highres(svga_t *svga);
extern void svga_render_8bpp_gs_lowres(svga_t *svga);

8
src/include/86box/video.h
View File

@@ -32,6 +32,9 @@ using atomic_int = std::atomic_int;
#define makecol(r, g, b) ((b) | ((g) << 8) | ((r) << 16))
#define makecol32(r, g, b) ((b) | ((g) << 8) | ((r) << 16))
#define getcolr(color) (((color) >> 16) & 0xFF)
#define getcolg(color) (((color) >> 8) & 0xFF)
#define getcolb(color) ((color) & 0xFF)
enum {
VID_NONE = 0,
@@ -431,12 +434,12 @@ extern const device_t ht216_32_standalone_device;
extern const device_t im1024_device;
extern const device_t pgc_device;
# if defined(DEV_BRANCH) && defined(USE_MGA)
/* Matrox MGA */
extern const device_t millennium_device;
extern const device_t mystique_device;
extern const device_t mystique_220_device;
# endif
extern const device_t millennium_ii_device;
extern const device_t productiva_g100_device;
/* Oak OTI-0x7 */
extern const device_t oti037c_device;
@@ -485,6 +488,7 @@ extern const device_t s3_phoenix_trio64_onboard_pci_device;
extern const device_t s3_phoenix_trio64_pci_device;
extern const device_t s3_phoenix_trio64vplus_pci_device;
extern const device_t s3_phoenix_trio64vplus_onboard_pci_device;
extern const device_t s3_cardex_trio64vplus_pci_device;
extern const device_t s3_mirocrystal_20sv_964_vlb_device;
extern const device_t s3_mirocrystal_20sv_964_pci_device;
extern const device_t s3_mirocrystal_20sd_864_vlb_device;

2
src/include_make/86box/version.h
View File

@@ -34,7 +34,7 @@
#define EMU_VERSION_FULL EMU_VERSION
#define EMU_VERSION_FULL_W EMU_VERSION_W
#define COPYRIGHT_YEAR "2022"
#define COPYRIGHT_YEAR "2024"
/* Web URL info. */
#define EMU_SITE "86box.net"

5
src/machine/m_at_386dx_486.c
View File

@@ -381,10 +381,9 @@ machine_at_acera1g_init(const machine_t *model)
device_add(&gd5428_onboard_device);
device_add(&keyboard_ps2_acer_pci_device);
device_add(&ide_isa_2ch_device);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&ali5105_device);
device_add(&ide_ali5213_device);
return ret;
}

68
src/machine/m_at_slot1.c
View File

@@ -152,6 +152,43 @@ machine_at_spitfire_init(const machine_t *model)
return ret;
}
int
machine_at_mate_nx_ma30d_23d_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/mate_nx_ma30d_23d/BIOS.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
#ifdef UNKNOWN_SLOT
pci_register_slot(0x0A, PCI_CARD_NETWORK, 2, 3, 4, 1); /* ???? device - GPIO? */
#endif
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 3, 0, 0, 0);
device_add(&i440lx_device);
device_add(&piix4e_device);
device_add(&nec_mate_unk_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&fdc37c67x_device);
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&lm78_device); /* no reporting in BIOS */
return ret;
}
int
machine_at_p6i440e2_init(const machine_t *model)
{
@@ -223,6 +260,37 @@ machine_at_p2bls_init(const machine_t *model)
return ret;
}
int
machine_at_lgibm440bx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibm440bx/ms6119.331",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&w83977tf_device);
device_add(&winbond_flash_w29c020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
int
machine_at_p3bf_init(const machine_t *model)
{

4
src/machine/m_at_socket4.c
View File

@@ -290,8 +290,8 @@ machine_at_revenge_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/revenge/1009af2_.bio",
"roms/machines/revenge/1009af2_.bi1",
ret = bios_load_linear_combined("roms/machines/revenge/1013af2_.bio",
"roms/machines/revenge/1013af2_.bi1",
0x1c000, 128);
if (bios_only || !ret)

37
src/machine/m_at_socket7.c
View File

@@ -1087,9 +1087,9 @@ machine_at_r534f_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
@@ -1116,9 +1116,9 @@ machine_at_ms5146_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
@@ -1134,6 +1134,35 @@ machine_at_ms5146_init(const machine_t *model)
return ret;
}
int
machine_at_cb52x_si_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/cb52x_si/CD5205S.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x07, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_5571_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&fdc37c669_370_device);
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_m560_init(const machine_t *model)
{

40
src/machine/m_at_socket7_3v.c
View File

@@ -671,6 +671,40 @@ machine_at_p5vxb_init(const machine_t *model)
return ret;
}
int
machine_at_dell_430vx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined2("roms/machines/dell_430vx/1003DY0J.BIO",
"roms/machines/dell_430vx/1003DY0J.BI1",
"roms/machines/dell_430vx/1003DY0J.BI2",
"roms/machines/dell_430vx/1003DY0J.BI3",
"roms/machines/dell_430vx/1003DY0J.RCV",
0x3a000, 128);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&fdc37c932fr_device);
device_add(&intel_flash_bxt_ami_device);
return ret;
}
int
machine_at_gw2kte_init(const machine_t *model)
{
@@ -694,7 +728,7 @@ machine_at_gw2kte_init(const machine_t *model)
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
device_add(&i430vx_device);
device_add(&piix3_device);
@@ -718,7 +752,7 @@ machine_at_ap5s_init(const machine_t *model)
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
@@ -747,7 +781,7 @@ machine_at_ms5124_init(const machine_t *model)
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);

29
src/machine/m_at_socket8.c
View File

@@ -161,6 +161,35 @@ machine_at_acerv60n_init(const machine_t *model)
return ret;
}
int
machine_at_lgibm440fx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibm440fx/bios.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&w83787f_device);
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_vs440fx_init(const machine_t *model)
{

110
src/machine/m_ps1.c
View File

@@ -63,6 +63,7 @@
#include <86box/video.h>
#include <86box/machine.h>
#include <86box/sound.h>
#include <86box/plat_unused.h>
typedef struct {
int model;
@@ -242,6 +243,56 @@ ps1_read(uint16_t port, void *priv)
return ret;
}
static const device_config_t ps1_2011_config[] = {
// clang-format off
{
.name = "bios_language",
.description = "BIOS Language",
.type = CONFIG_BIOS,
.default_string = "english_us",
.default_int = 0,
.file_filter = "",
.spinner = { 0 }, /*W1*/
.bios = {
{ .name = "English (US)", .internal_name = "english_us", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/FC0000_US.BIN", "" } },
{ .name = "English (UK)", .internal_name = "english_uk", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_UK.BIN", "roms/machines/ibmps1es/FC0000_UK.BIN", "" } },
{ .name = "English (Canada)", .internal_name = "english_ca", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_CA.BIN", "roms/machines/ibmps1es/FC0000_CA.BIN", "" } },
{ .name = "Portuguese", .internal_name = "portuguese", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_PT.BIN", "roms/machines/ibmps1es/FC0000_PT.BIN", "" } },
{ .name = "German", .internal_name = "german", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_DE.BIN", "roms/machines/ibmps1es/FC0000_DE.BIN", "" } },
{ .name = "Swedish", .internal_name = "swedish", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_SE.BIN", "roms/machines/ibmps1es/FC0000_SE.BIN", "" } },
{ .name = "French", .internal_name = "french", .bios_type = BIOS_NORMAL,
.files_no = 2, .local = 0, .size = 262144, .files = { "roms/machines/ibmps1es/F80000_FR.BIN", "roms/machines/ibmps1es/FC0000_FR.BIN", "" } },
{ .name = "Italian", .internal_name = "italian", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 524288, .files = { "roms/machines/ibmps1es/f80000.bin", "" } },
{ .name = "Spanish", .internal_name = "spanish", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 524288, .files = { "roms/machines/ibmps1es/F80000_ES.bin", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ps1_2011_device = {
.name = "PS/1 2011",
.internal_name = "ps/1_2011",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = &ps1_2011_config[0]
};
static void
ps1_setup(int model)
{
@@ -273,9 +324,27 @@ ps1_setup(int model)
device_add(&ps_nvr_device);
if (model == 2011) {
rom_init(&ps->high_rom,
"roms/machines/ibmps1es/f80000.bin",
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
if (!strcmp("english_us", device_get_config_bios("bios_language"))) {
/* US English */
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
} else if ((device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 1)) == NULL) {
/* Combined ROM. */
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
} else {
/* Split ROM. */
rom_init(&ps->mid_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 1),
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
}
lpt2_remove();
@@ -339,16 +408,43 @@ int
machine_ps1_m2011_init(const machine_t *model)
{
int ret;
const char* fn;
uint32_t offset;
ret = bios_load_linear("roms/machines/ibmps1es/f80000.bin",
0x000e0000, 131072, 0x60000);
if (!device_available(model->device)) {
/* No ROMs available. */
return 0;
}
if (bios_only || !ret)
device_context(model->device);
if ((fn = device_get_bios_file(model->device, device_get_config_bios("bios_language"), 1)) == NULL) {
/* Combined ROM or US English. */
fn = device_get_bios_file(model->device, device_get_config_bios("bios_language"), 0);
offset = (!strcmp("english_us", device_get_config_bios("bios_language"))) ? 0x20000 : 0x60000;
} else {
/* Separated ROM. */
offset = 0x20000;
}
if (!fn) {
fn = device_get_bios_file(model->device, "us_english", 0);
offset = 0x20000;
}
ret = bios_load_linear(fn, 0x000e0000, 131072, offset);
device_context_restore();
if (bios_only || !ret) {
return ret;
}
ps1_common_init(model);
ps1_setup(2011);
device_context(model->device);
ps1_setup(2011);
device_context_restore();
return ret;
}

16
src/machine/m_xt.c
View File

@@ -640,3 +640,19 @@ machine_xt_pb8810_init(const machine_t *model)
return ret;
}
int
machine_xt_glabios_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/glabios/GLABIOS_0.2.5_8E.ROM",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_xt_init_ex(model);
return ret;
}

298
src/machine/machine_table.c
View File

@@ -51,6 +51,7 @@ extern const device_t vid_ppc512_device;
extern const device_t vid_device_sl;
extern const device_t t1200_video_device;
extern const device_t compaq_plasma_device;
extern const device_t ps1_2011_device;
const machine_filter_t machine_types[] = {
{ "None", MACHINE_TYPE_NONE },
@@ -1803,6 +1804,45 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8088] GLaBIOS",
.internal_name = "glabios",
.type = MACHINE_TYPE_8088,
.chipset = MACHINE_CHIPSET_DISCRETE,
.init = machine_xt_glabios_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_8088,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_FLAGS_NONE,
.ram = {
.min = 64,
.max = 640,
.step = 64
},
.nvrmask = 0,
.kbc_device = &keyboard_xt_device,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[GC100A] Philips P3120",
.internal_name = "p3120",
@@ -2547,7 +2587,7 @@ const machine_t machines[] = {
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &ps1_2011_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
@@ -9525,6 +9565,48 @@ const machine_t machines[] = {
},
/* 430VX */
/* According to tests from real hardware: This has AMI MegaKey KBC firmware on the
PC87306 Super I/O chip, command 0xA1 returns '5'.
Command 0xA0 copyright string: (C)1994 AMI . */
{
.name = "[i430VX] Dell Hannibal+",
.internal_name = "dell_430vx",
.type = MACHINE_TYPE_SOCKET7_3V,
.chipset = MACHINE_CHIPSET_INTEL_430VX,
.init = machine_at_dell_430vx_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET5_7,
.block = CPU_BLOCK_NONE,
.min_bus = 50000000,
.max_bus = 66666667,
.min_voltage = 3380,
.max_voltage = 3520,
.min_multi = 1.5,
.max_multi = 3.0
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Has AMIKey H KBC firmware (AMIKey-2). */
{
.name = "[i430VX] ECS P5VX-B",
@@ -10959,11 +11041,11 @@ const machine_t machines[] = {
/* SiS 5571 */
/* Has the SiS 5571 chipset with on-chip KBC. */
{
.name = "[SiS 5571] Rise R534F",
.internal_name = "r534f",
.name = "[SiS 5571] Daewoo CB52X-SI",
.internal_name = "cb52x_si",
.type = MACHINE_TYPE_SOCKET7,
.chipset = MACHINE_CHIPSET_SIS_5571,
.init = machine_at_r534f_init,
.init = machine_at_cb52x_si_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
@@ -10971,9 +11053,9 @@ const machine_t machines[] = {
.cpu = {
.package = CPU_PKG_SOCKET5_7,
.block = CPU_BLOCK_NONE,
.min_bus = 55000000,
.max_bus = 83333333,
.min_voltage = 2500,
.min_bus = 50000000,
.max_bus = 75000000,
.min_voltage = 2800,
.max_voltage = 3520,
.min_multi = 1.5,
.max_multi = 3.0
@@ -10982,10 +11064,10 @@ const machine_t machines[] = {
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 393216,
.max = 262144,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
@@ -11025,7 +11107,7 @@ const machine_t machines[] = {
.max = 262144,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
@@ -11037,15 +11119,13 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* ALi ALADDiN IV+ */
/* Has the ALi M1543 southbridge with on-chip KBC. */
/* Has the SiS 5571 chipset with on-chip KBC. */
{
.name = "[ALi ALADDiN IV+] PC Chips M560",
.internal_name = "m560",
.name = "[SiS 5571] Rise R534F",
.internal_name = "r534f",
.type = MACHINE_TYPE_SOCKET7,
.chipset = MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS,
.init = machine_at_m560_init,
.chipset = MACHINE_CHIPSET_SIS_5571,
.init = machine_at_r534f_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
@@ -11053,7 +11133,7 @@ const machine_t machines[] = {
.cpu = {
.package = CPU_PKG_SOCKET5_7,
.block = CPU_BLOCK_NONE,
.min_bus = 50000000,
.min_bus = 55000000,
.max_bus = 83333333,
.min_voltage = 2500,
.max_voltage = 3520,
@@ -11064,7 +11144,7 @@ const machine_t machines[] = {
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 786432,
.max = 393216,
.step = 8192
},
.nvrmask = 255,
@@ -11079,6 +11159,8 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* ALi ALADDiN IV+ */
/* Has the ALi M1543 southbridge with on-chip KBC. */
{
.name = "[ALi ALADDiN IV+] MSI MS-5164",
@@ -11119,6 +11201,46 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has the ALi M1543 southbridge with on-chip KBC. */
{
.name = "[ALi ALADDiN IV+] PC Chips M560",
.internal_name = "m560",
.type = MACHINE_TYPE_SOCKET7,
.chipset = MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS,
.init = machine_at_m560_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET5_7,
.block = CPU_BLOCK_NONE,
.min_bus = 50000000,
.max_bus = 83333333,
.min_voltage = 2500,
.max_voltage = 3520,
.min_multi = 1.5,
.max_multi = 3.0
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 786432,
.step = 8192
},
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Super Socket 7 machines */
/* ALi ALADDiN V */
@@ -11615,6 +11737,47 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* It's a Intel VS440FX with a Gateway 2000 OEM BIOS */
{
.name = "[i440FX] Gateway 2000 Venus",
.internal_name = "gw2kvenus",
.type = MACHINE_TYPE_SOCKET8,
.chipset = MACHINE_CHIPSET_INTEL_440FX,
.init = machine_at_gw2kvenus_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET8,
.block = CPU_BLOCK_NONE,
.min_bus = 60000000,
.max_bus = 66666667,
.min_voltage = 2100,
.max_voltage = 3500,
.min_multi = 2.0,
.max_multi = 3.5
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 524288,
.step = 8192
},
.nvrmask = 127,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Has the AMIKey-2 (updated 'H') KBC firmware. */
{
.name = "[i440FX] Gigabyte GA-686NX",
.internal_name = "686nx",
@@ -11738,13 +11901,13 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* It's a Intel VS440FX with a Gateway 2000 OEM BIOS */
/* Has the AMIKey-2 (updated 'H') KBC firmware. */
{
.name = "[i440FX] Gateway 2000 Venus",
.internal_name = "gw2kvenus",
.name = "[i440FX] LG IBM Multinet x61 (MSI MS-6106)",
.internal_name = "lgibm440fx",
.type = MACHINE_TYPE_SOCKET8,
.chipset = MACHINE_CHIPSET_INTEL_440FX,
.init = machine_at_gw2kvenus_init,
.init = machine_at_lgibm440fx_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
@@ -11754,15 +11917,15 @@ const machine_t machines[] = {
.block = CPU_BLOCK_NONE,
.min_bus = 60000000,
.max_bus = 66666667,
.min_voltage = 2100,
.min_voltage = 2500,
.max_voltage = 3500,
.min_multi = 2.0,
.max_multi = 3.5
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.min = 40960,
.max = 524288,
.step = 8192
},
@@ -12070,6 +12233,47 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has a SM(S)C FDC37M60x Super I/O chip with on-chip KBC with Phoenix or
AMIKey-2 KBC firmware. */
{
.name = "[i440LX] NEC Mate NX MA30D/23D",
.internal_name = "mate_nx_ma30d_23d",
.type = MACHINE_TYPE_SLOT1,
.chipset = MACHINE_CHIPSET_INTEL_440LX,
.init = machine_at_mate_nx_ma30d_23d_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SLOT1,
.block = CPU_BLOCK_NONE,
.min_bus = 66666667,
.max_bus = 66666667,
.min_voltage = 1800,
.max_voltage = 3500,
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_AGP,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 1048576,
.step = 8192
},
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* 440EX */
/* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC
@@ -12361,6 +12565,46 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has the AMIKey-2 (updated 'H') KBC firmware. */
{
.name = "[i440BX] LG IBM Multinet i x7G (MSI MS-6119)",
.internal_name = "lgibm440bx",
.type = MACHINE_TYPE_SLOT1,
.chipset = MACHINE_CHIPSET_INTEL_440BX,
.init = machine_at_lgibm440bx_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SLOT1,
.block = CPU_BLOCK_NONE,
.min_bus = 50000000,
.max_bus = 112121212,
.min_voltage = 1300,
.max_voltage = 3500,
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_AGP,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI,
.ram = {
.min = 8192,
.max = 1048576,
.step = 8192
},
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Has a National Semiconductors PC87309 Super I/O chip with on-chip KBC
with most likely AMIKey-2 KBC firmware. */
{

17
src/mem/i2c_eeprom.c
View File

@@ -60,7 +60,7 @@ i2c_eeprom_start(UNUSED(void *bus), uint8_t addr, uint8_t read, void *priv)
{
i2c_eeprom_t *dev = (i2c_eeprom_t *) priv;
i2c_eeprom_log("I2C EEPROM %s %02X: start()\n", i2c_getbusname(dev->i2c), dev->addr);
i2c_eeprom_log("I2C EEPROM %s %02X: start(%c)\n", i2c_getbusname(dev->i2c), dev->addr, read ? 'R' : 'W');
if (!read) {
dev->addr_pos = 0;
@@ -77,8 +77,7 @@ i2c_eeprom_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv)
uint8_t ret = dev->data[dev->addr_register];
i2c_eeprom_log("I2C EEPROM %s %02X: read(%06X) = %02X\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register, ret);
dev->addr_register++;
dev->addr_register &= dev->addr_mask; /* roll-over */
dev->addr_register = (dev->addr_register + 1) & dev->addr_mask; /* roll-over */
return ret;
}
@@ -100,8 +99,7 @@ i2c_eeprom_write(UNUSED(void *bus), uint8_t addr, uint8_t data, void *priv)
i2c_eeprom_log("I2C EEPROM %s %02X: write(%06X, %02X) = %d\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register, data, !!dev->writable);
if (dev->writable)
dev->data[dev->addr_register] = data;
dev->addr_register++;
dev->addr_register &= dev->addr_mask; /* roll-over */
dev->addr_register = (dev->addr_register + 1) & dev->addr_mask; /* roll-over */
return dev->writable;
}
@@ -137,7 +135,8 @@ i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t w
uint32_t pow_size = 1 << log2i(size);
if (pow_size < size)
size = pow_size << 1;
size &= 0x7fffff; /* address space limit of 8 MB = 7 bits from I2C address + 16 bits */
if (size >= 8388608)
size = 8388608; /* address space limit of 8 MB = 7 bits from I2C address + 16 bits from command address */
i2c_eeprom_log("I2C EEPROM %s %02X: init(%d, %d)\n", i2c_getbusname(i2c), addr, size, writable);
@@ -149,7 +148,8 @@ i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t w
dev->addr_len = (size >= 4096) ? 16 : 8; /* use 16-bit addresses on 24C32 and above */
dev->addr_mask = size - 1;
i2c_sethandler(dev->i2c, dev->addr & ~(dev->addr_mask >> dev->addr_len), (dev->addr_mask >> dev->addr_len) + 1, i2c_eeprom_start, i2c_eeprom_read, i2c_eeprom_write, i2c_eeprom_stop, dev);
uint8_t i2c_mask = dev->addr_mask >> dev->addr_len;
i2c_sethandler(dev->i2c, dev->addr & ~i2c_mask, i2c_mask + 1, i2c_eeprom_start, i2c_eeprom_read, i2c_eeprom_write, i2c_eeprom_stop, dev);
return dev;
}
@@ -161,7 +161,8 @@ i2c_eeprom_close(void *dev_handle)
i2c_eeprom_log("I2C EEPROM %s %02X: close()\n", i2c_getbusname(dev->i2c), dev->addr);
i2c_removehandler(dev->i2c, dev->addr & ~(dev->addr_mask >> dev->addr_len), (dev->addr_mask >> dev->addr_len) + 1, i2c_eeprom_start, i2c_eeprom_read, i2c_eeprom_write, i2c_eeprom_stop, dev);
uint8_t i2c_mask = dev->addr_mask >> dev->addr_len;
i2c_removehandler(dev->i2c, dev->addr & ~i2c_mask, i2c_mask + 1, i2c_eeprom_start, i2c_eeprom_read, i2c_eeprom_write, i2c_eeprom_stop, dev);
free(dev);
}

9
src/network/net_pcnet.c
View File

@@ -866,7 +866,7 @@ pcnetSoftReset(nic_t *dev)
case DEV_AM79C960_VLB:
case DEV_AM79C961:
dev->aCSR[88] = 0x3003;
dev->aCSR[89] = 0x0262;
dev->aCSR[89] = 0x0000;
break;
default:
@@ -3101,9 +3101,12 @@ static const device_config_t pcnet_isa_config[] = {
{ .description = "IRQ 3", .value = 3 },
{ .description = "IRQ 4", .value = 4 },
{ .description = "IRQ 5", .value = 5 },
{ .description = "IRQ 7", .value = 7 },
{ .description = "IRQ 9", .value = 9 },
{ .description = "IRQ 10", .value = 10 },
{ .description = "IRQ 11", .value = 11 },
{ .description = "IRQ 12", .value = 12 },
{ .description = "IRQ 15", .value = 15 },
{ .description = "" }
},
},
@@ -3116,6 +3119,7 @@ static const device_config_t pcnet_isa_config[] = {
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "DMA 0", .value = 0 },
{ .description = "DMA 3", .value = 3 },
{ .description = "DMA 5", .value = 5 },
{ .description = "DMA 6", .value = 6 },
@@ -3162,9 +3166,12 @@ static const device_config_t pcnet_vlb_config[] = {
{ .description = "IRQ 3", .value = 3 },
{ .description = "IRQ 4", .value = 4 },
{ .description = "IRQ 5", .value = 5 },
{ .description = "IRQ 7", .value = 7 },
{ .description = "IRQ 9", .value = 9 },
{ .description = "IRQ 10", .value = 10 },
{ .description = "IRQ 11", .value = 11 },
{ .description = "IRQ 12", .value = 12 },
{ .description = "IRQ 15", .value = 15 },
{ .description = "" }
},
},

429
src/network/net_rtl8139.c
View File

@@ -39,6 +39,7 @@
#include <86box/device.h>
#include <86box/thread.h>
#include <86box/network.h>
#include <86box/net_eeprom_nmc93cxx.h>
#include <86box/bswap.h>
#include <86box/nvr.h>
#include "cpu.h"
@@ -351,44 +352,6 @@ enum chip_flags {
#define RTL8139_PCI_REVID RTL8139_PCI_REVID_8139CPLUS
/* Size is 64 * 16bit words */
#define EEPROM_9346_ADDR_BITS 6
#define EEPROM_9346_SIZE (1 << EEPROM_9346_ADDR_BITS)
#define EEPROM_9346_ADDR_MASK (EEPROM_9346_SIZE - 1)
enum Chip9346Operation {
Chip9346_op_mask = 0xc0, /* 10 zzzzzz */
Chip9346_op_read = 0x80, /* 10 AAAAAA */
Chip9346_op_write = 0x40, /* 01 AAAAAA D(15)..D(0) */
Chip9346_op_ext_mask = 0xf0, /* 11 zzzzzz */
Chip9346_op_write_enable = 0x30, /* 00 11zzzz */
Chip9346_op_write_all = 0x10, /* 00 01zzzz */
Chip9346_op_write_disable = 0x00, /* 00 00zzzz */
};
enum Chip9346Mode {
Chip9346_none = 0,
Chip9346_enter_command_mode,
Chip9346_read_command,
Chip9346_data_read, /* from output register */
Chip9346_data_write, /* to input register, then to contents at specified address */
Chip9346_data_write_all, /* to input register, then filling contents */
};
typedef struct EEprom9346 {
uint16_t contents[EEPROM_9346_SIZE];
int mode;
uint32_t tick;
uint8_t address;
uint16_t input;
uint16_t output;
uint8_t eecs;
uint8_t eesk;
uint8_t eedi;
uint8_t eedo;
} EEprom9346;
#pragma pack(push, 1)
typedef struct RTL8139TallyCounters {
/* Tally counters */
@@ -476,8 +439,6 @@ struct RTL8139State {
uint32_t RxRingAddrLO;
uint32_t RxRingAddrHI;
EEprom9346 eeprom;
uint32_t TCTR;
uint32_t TimerInt;
int64_t TCTR_base;
@@ -490,6 +451,8 @@ struct RTL8139State {
int cplus_txbuffer_len;
int cplus_txbuffer_offset;
uint32_t mem_base;
/* PCI interrupt timer */
pc_timer_t timer;
@@ -497,190 +460,14 @@ struct RTL8139State {
/* Support migration to/from old versions */
int rtl8139_mmio_io_addr_dummy;
nmc93cxx_eeprom_t *eeprom;
uint8_t eeprom_data[128];
};
/* Writes tally counters to memory via DMA */
static void RTL8139TallyCounters_dma_write(RTL8139State *s, uint32_t tc_addr);
static void
prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
{
rtl8139_log("eeprom command 0x%02x\n", command);
switch (command & Chip9346_op_mask) {
case Chip9346_op_read:
{
eeprom->address = command & EEPROM_9346_ADDR_MASK;
eeprom->output = eeprom->contents[eeprom->address];
eeprom->eedo = 0;
eeprom->tick = 0;
eeprom->mode = Chip9346_data_read;
rtl8139_log("eeprom read from address 0x%02x data=0x%04x\n",
eeprom->address, eeprom->output);
}
break;
case Chip9346_op_write:
{
eeprom->address = command & EEPROM_9346_ADDR_MASK;
eeprom->input = 0;
eeprom->tick = 0;
eeprom->mode = Chip9346_none; /* Chip9346_data_write */
rtl8139_log("eeprom begin write to address 0x%02x\n",
eeprom->address);
}
break;
default:
eeprom->mode = Chip9346_none;
switch (command & Chip9346_op_ext_mask) {
case Chip9346_op_write_enable:
rtl8139_log("eeprom write enabled\n");
break;
case Chip9346_op_write_all:
rtl8139_log("eeprom begin write all\n");
break;
case Chip9346_op_write_disable:
rtl8139_log("eeprom write disabled\n");
break;
default:
break;
}
break;
}
}
static void
prom9346_shift_clock(EEprom9346 *eeprom)
{
int bit = eeprom->eedi ? 1 : 0;
++eeprom->tick;
rtl8139_log("eeprom: tick %d eedi=%d eedo=%d\n", eeprom->tick, eeprom->eedi,
eeprom->eedo);
switch (eeprom->mode) {
case Chip9346_enter_command_mode:
if (bit) {
eeprom->mode = Chip9346_read_command;
eeprom->tick = 0;
eeprom->input = 0;
rtl8139_log("eeprom: +++ synchronized, begin command read\n");
}
break;
case Chip9346_read_command:
eeprom->input = (eeprom->input << 1) | (bit & 1);
if (eeprom->tick == 8) {
prom9346_decode_command(eeprom, eeprom->input & 0xff);
}
break;
case Chip9346_data_read:
eeprom->eedo = (eeprom->output & 0x8000) ? 1 : 0;
eeprom->output <<= 1;
if (eeprom->tick == 16) {
#if 1
// the FreeBSD drivers (rl and re) don't explicitly toggle
// CS between reads (or does setting Cfg9346 to 0 count too?),
// so we need to enter wait-for-command state here
eeprom->mode = Chip9346_enter_command_mode;
eeprom->input = 0;
eeprom->tick = 0;
rtl8139_log("eeprom: +++ end of read, awaiting next command\n");
#else
// original behaviour
++eeprom->address;
eeprom->address &= EEPROM_9346_ADDR_MASK;
eeprom->output = eeprom->contents[eeprom->address];
eeprom->tick = 0;
rtl8139_log("eeprom: +++ read next address 0x%02x data=0x%04x\n",
eeprom->address, eeprom->output);
#endif
}
break;
case Chip9346_data_write:
eeprom->input = (eeprom->input << 1) | (bit & 1);
if (eeprom->tick == 16) {
rtl8139_log("eeprom write to address 0x%02x data=0x%04x\n",
eeprom->address, eeprom->input);
eeprom->contents[eeprom->address] = eeprom->input;
eeprom->mode = Chip9346_none; /* waiting for next command after CS cycle */
eeprom->tick = 0;
eeprom->input = 0;
}
break;
case Chip9346_data_write_all:
eeprom->input = (eeprom->input << 1) | (bit & 1);
if (eeprom->tick == 16) {
for (int i = 0; i < EEPROM_9346_SIZE; i++) {
eeprom->contents[i] = eeprom->input;
}
rtl8139_log("eeprom filled with data=0x%04x\n", eeprom->input);
eeprom->mode = Chip9346_enter_command_mode;
eeprom->tick = 0;
eeprom->input = 0;
}
break;
default:
break;
}
}
static int
prom9346_get_wire(RTL8139State *s)
{
const EEprom9346 *eeprom = &s->eeprom;
if (!eeprom->eecs)
return 0;
return eeprom->eedo;
}
/* FIXME: This should be merged into/replaced by eeprom93xx.c. */
static void
prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi)
{
EEprom9346 *eeprom = &s->eeprom;
uint8_t old_eecs = eeprom->eecs;
uint8_t old_eesk = eeprom->eesk;
eeprom->eecs = eecs;
eeprom->eesk = eesk;
eeprom->eedi = eedi;
rtl8139_log("eeprom: +++ wires CS=%d SK=%d DI=%d DO=%d\n", eeprom->eecs,
eeprom->eesk, eeprom->eedi, eeprom->eedo);
if (!old_eecs && eecs) {
/* Synchronize start */
eeprom->tick = 0;
eeprom->input = 0;
eeprom->output = 0;
eeprom->mode = Chip9346_enter_command_mode;
rtl8139_log("=== eeprom: begin access, enter command mode\n");
}
if (!eecs) {
rtl8139_log("=== eeprom: end access\n");
return;
}
if (!old_eesk && eesk) {
/* SK front rules */
prom9346_shift_clock(eeprom);
}
}
static void
rtl8139_update_irq(RTL8139State *s)
{
@@ -1434,9 +1221,8 @@ rtl8139_IntrMitigate_read(UNUSED(RTL8139State *s))
static int
rtl8139_config_writable(RTL8139State *s)
{
if ((s->Cfg9346 & Chip9346_op_mask) == Cfg9346_ConfigWrite) {
if ((s->Cfg9346 & 0xc0) == 0xc0)
return 1;
}
rtl8139_log("Configuration registers are write-protected\n");
@@ -1518,10 +1304,10 @@ rtl8139_Cfg9346_write(RTL8139State *s, uint32_t val)
if (opmode == 0x80) {
/* eeprom access */
int eecs = (eeprom_val & 0x08) ? 1 : 0;
int eesk = (eeprom_val & 0x04) ? 1 : 0;
int eedi = (eeprom_val & 0x02) ? 1 : 0;
prom9346_set_wire(s, eecs, eesk, eedi);
nmc93cxx_eeprom_write(s->eeprom,
!!(eeprom_val & 0x08),
!!(eeprom_val & 0x04),
!!(eeprom_val & 0x02));
} else if (opmode == 0x40) {
/* Reset. */
val = 0;
@@ -1539,13 +1325,10 @@ rtl8139_Cfg9346_read(RTL8139State *s)
uint32_t opmode = ret & 0xc0;
if (opmode == 0x80) {
/* eeprom access */
int eedo = prom9346_get_wire(s);
if (eedo) {
if (nmc93cxx_eeprom_read(s->eeprom))
ret |= 0x01;
} else {
else
ret &= ~0x01;
}
}
rtl8139_log("Cfg9346 read val=0x%02x\n", ret);
@@ -3118,37 +2901,136 @@ rtl8139_io_readl(uint32_t addr, void *priv)
static uint32_t
rtl8139_io_readl_ioport(uint16_t addr, void *priv)
{
return rtl8139_io_readl(addr, priv);
uint32_t ret = 0xffffffff;
ret = rtl8139_io_readl(addr, priv);
rtl8139_log("[%04X:%08X] [RLI] %04X = %08X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static uint16_t
rtl8139_io_readw_ioport(uint16_t addr, void *priv)
{
return rtl8139_io_readw(addr, priv);
uint16_t ret = 0xffff;
ret = rtl8139_io_readw(addr, priv);
rtl8139_log("[%04X:%08X] [RWI] %04X = %04X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static uint8_t
rtl8139_io_readb_ioport(uint16_t addr, void *priv)
{
return rtl8139_io_readb(addr, priv);
uint8_t ret = 0xff;
ret = rtl8139_io_readb(addr, priv);
rtl8139_log("[%04X:%08X] [RBI] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static void
rtl8139_io_writel_ioport(uint16_t addr, uint32_t val, void *priv)
{
return rtl8139_io_writel(addr, val, priv);
rtl8139_log("[%04X:%08X] [WLI] %04X = %08X\n", CS, cpu_state.pc, addr, val);
rtl8139_io_writel(addr, val, priv);
}
static void
rtl8139_io_writew_ioport(uint16_t addr, uint16_t val, void *priv)
{
return rtl8139_io_writew(addr, val, priv);
rtl8139_log("[%04X:%08X] [WWI] %04X = %04X\n", CS, cpu_state.pc, addr, val);
rtl8139_io_writew(addr, val, priv);
}
static void
rtl8139_io_writeb_ioport(uint16_t addr, uint8_t val, void *priv)
{
return rtl8139_io_writeb(addr, val, priv);
rtl8139_log("[%04X:%08X] [WBI] %04X = %02X\n", CS, cpu_state.pc, addr, val);
rtl8139_io_writeb(addr, val, priv);
}
static uint32_t
rtl8139_io_readl_mem(uint32_t addr, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
uint32_t ret = 0xffffffff;
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
ret = rtl8139_io_readl(addr, priv);
rtl8139_log("[%04X:%08X] [RLM] %08X = %08X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static uint16_t
rtl8139_io_readw_mem(uint32_t addr, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
uint16_t ret = 0xffff;
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
ret = rtl8139_io_readw(addr, priv);
rtl8139_log("[%04X:%08X] [RWM] %08X = %04X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static uint8_t
rtl8139_io_readb_mem(uint32_t addr, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
uint8_t ret = 0xff;
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
ret = rtl8139_io_readb(addr, priv);
rtl8139_log("[%04X:%08X] [RBM] %08X = %02X\n", CS, cpu_state.pc, addr, ret);
return ret;
}
static void
rtl8139_io_writel_mem(uint32_t addr, uint32_t val, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
rtl8139_log("[%04X:%08X] [WLM] %08X = %08X\n", CS, cpu_state.pc, addr, val);
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
rtl8139_io_writel(addr, val, priv);
}
static void
rtl8139_io_writew_mem(uint32_t addr, uint16_t val, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
rtl8139_log("[%04X:%08X] [WWM] %08X = %04X\n", CS, cpu_state.pc, addr, val);
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
rtl8139_io_writew(addr, val, priv);
}
static void
rtl8139_io_writeb_mem(uint32_t addr, uint8_t val, void *priv)
{
RTL8139State *s = (RTL8139State *) priv;
rtl8139_log("[%04X:%08X] [WBM] %08X = %02X\n", CS, cpu_state.pc, addr, val);
if ((addr >= s->mem_base) && (addr < (s->mem_base + 0xff)))
rtl8139_io_writeb(addr, val, priv);
}
static int
@@ -3275,6 +3157,7 @@ rtl8139_pci_write(int func, int addr, uint8_t val, void *priv)
rtl8139_io_writeb_ioport, rtl8139_io_writew_ioport, rtl8139_io_writel_ioport,
priv);
s->pci_conf[addr & 0xFF] = val;
rtl8139_log("New I/O base: %04X\n", s->pci_conf[0x11] << 8);
if (s->pci_conf[0x4] & PCI_COMMAND_IO)
io_sethandler((s->pci_conf[0x11] << 8), 256,
rtl8139_io_readb_ioport, rtl8139_io_readw_ioport, rtl8139_io_readl_ioport,
@@ -3286,6 +3169,8 @@ rtl8139_pci_write(int func, int addr, uint8_t val, void *priv)
case 0x16:
case 0x17:
s->pci_conf[addr & 0xFF] = val;
s->mem_base = (s->pci_conf[0x15] << 8) | (s->pci_conf[0x16] << 16) | (s->pci_conf[0x17] << 24);
rtl8139_log("New memory base: %08X\n", s->mem_base);
if (s->pci_conf[0x4] & PCI_COMMAND_MEM)
mem_mapping_set_addr(&s->bar_mem, (s->pci_conf[0x15] << 8) | (s->pci_conf[0x16] << 16) | (s->pci_conf[0x17] << 24), 256);
break;
@@ -3299,42 +3184,42 @@ static void *
nic_init(const device_t *info)
{
RTL8139State *s = calloc(1, sizeof(RTL8139State));
FILE *fp = NULL;
nmc93cxx_eeprom_params_t params;
char eeprom_filename[1024] = { 0 };
uint8_t *mac_bytes;
uint32_t mac;
char filename[1024] = { 0 };
uint8_t *mac_bytes;
uint16_t *eep_data;
uint32_t mac;
mem_mapping_add(&s->bar_mem, 0, 0, rtl8139_io_readb, rtl8139_io_readw, rtl8139_io_readl, rtl8139_io_writeb, rtl8139_io_writew, rtl8139_io_writel, NULL, MEM_MAPPING_EXTERNAL, s);
mem_mapping_add(&s->bar_mem, 0, 0,
rtl8139_io_readb_mem, rtl8139_io_readw_mem, rtl8139_io_readl_mem,
rtl8139_io_writeb_mem, rtl8139_io_writew_mem, rtl8139_io_writel_mem,
NULL, MEM_MAPPING_EXTERNAL, s);
pci_add_card(PCI_ADD_NORMAL, rtl8139_pci_read, rtl8139_pci_write, s, &s->pci_slot);
s->inst = device_get_instance();
snprintf(eeprom_filename, sizeof(eeprom_filename), "eeprom_rtl8139c_plus_%d.nvr", s->inst);
fp = nvr_fopen(eeprom_filename, "rb");
if (fp) {
fread(s->eeprom.contents, 2, 64, fp);
fclose(fp);
fp = NULL;
} else {
/* prepare eeprom */
s->eeprom.contents[0] = 0x8129;
eep_data = (uint16_t *) s->eeprom_data;
/* PCI vendor and device ID should be mirrored here */
s->eeprom.contents[1] = 0x10EC;
s->eeprom.contents[2] = 0x8139;
/* prepare eeprom */
eep_data[0] = 0x8129;
/* XXX: Get proper MAC addresses from real EEPROM dumps. OID taken from net_ne2000.c */
/* PCI vendor and device ID should be mirrored here */
eep_data[1] = 0x10EC;
eep_data[2] = 0x8139;
/* XXX: Get proper MAC addresses from real EEPROM dumps. OID taken from net_ne2000.c */
#ifdef USE_REALTEK_OID
s->eeprom.contents[7] = 0xe000;
s->eeprom.contents[8] = 0x124c;
eep_data[7] = 0xe000;
eep_data[8] = 0x124c;
#else
s->eeprom.contents[7] = 0x1400;
s->eeprom.contents[8] = 0x122a;
eep_data[7] = 0x1400;
eep_data[8] = 0x122a;
#endif
s->eeprom.contents[9] = 0x1413;
}
eep_data[9] = 0x1413;
mac_bytes = (uint8_t *) &(s->eeprom.contents[7]);
mac_bytes = (uint8_t *) &(eep_data[7]);
/* See if we have a local MAC address configured. */
mac = device_get_config_mac("mac", -1);
@@ -3355,7 +3240,20 @@ nic_init(const device_t *info)
mac_bytes[5] = (mac & 0xff);
}
s->nic = network_attach(s, (uint8_t *) &s->eeprom.contents[7], rtl8139_do_receive, rtl8139_set_link_status);
for (uint32_t i = 0; i < 6; i++)
s->phys[MAC0 + i] = mac_bytes[i];
params.nwords = 64;
params.default_content = (uint16_t *) s->eeprom_data;
params.filename = filename;
snprintf(filename, sizeof(filename), "nmc93cxx_eeprom_%s_%d.nvr", info->internal_name, device_get_instance());
s->eeprom = device_add_parameters(&nmc93cxx_device, &params);
if (!s->eeprom) {
free(s);
return NULL;
}
s->nic = network_attach(s, (uint8_t *) &s->phys[MAC0], rtl8139_do_receive, rtl8139_set_link_status);
timer_add(&s->timer, rtl8139_timer, s, 0);
timer_on_auto(&s->timer, 1000000.0 / cpu_pci_speed);
@@ -3369,17 +3267,6 @@ nic_init(const device_t *info)
static void
nic_close(void *priv)
{
const RTL8139State *s = (RTL8139State *) priv;
FILE *fp = NULL;
char eeprom_filename[1024] = { 0 };
snprintf(eeprom_filename, sizeof(eeprom_filename), "eeprom_rtl8139c_plus_%d.nvr", s->inst);
fp = nvr_fopen(eeprom_filename, "wb");
if (fp) {
fwrite(s->eeprom.contents, 2, 64, fp);
fclose(fp);
fp = NULL;
}
free(priv);
}

3
src/pci.c
View File

@@ -424,6 +424,9 @@ pci_write(uint16_t port, uint8_t val, UNUSED(void *priv))
}
break;
case 0xcf9:
if (pci_flags & FLAG_TRC_CONTROLS_CPURST)
cpu_cpurst_on_sr = !(val & 0x10);
if (!(pci_trc_reg & 4) && (val & 4))
pci_trc_reset(val);

13
src/pit.c
View File

@@ -659,13 +659,14 @@ pit_read_reg(void *priv, uint8_t reg)
break;
case 0x07:
/* The SiS 551x datasheet is unclear about how exactly
this register is structured. */
this register is structured.
Update: But the SiS 5571 datasheet is clear. */
ret = (dev->counters[0].rm & 0x80) ? 0x01 : 0x00;
ret = (dev->counters[0].wm & 0x80) ? 0x02 : 0x00;
ret = (dev->counters[1].rm & 0x80) ? 0x04 : 0x00;
ret = (dev->counters[1].wm & 0x80) ? 0x08 : 0x00;
ret = (dev->counters[2].rm & 0x80) ? 0x10 : 0x00;
ret = (dev->counters[2].wm & 0x80) ? 0x20 : 0x00;
ret |= (dev->counters[1].rm & 0x80) ? 0x02 : 0x00;
ret |= (dev->counters[2].rm & 0x80) ? 0x04 : 0x00;
ret |= (dev->counters[0].wm & 0x80) ? 0x08 : 0x00;
ret |= (dev->counters[1].wm & 0x80) ? 0x10 : 0x00;
ret |= (dev->counters[2].wm & 0x80) ? 0x20 : 0x00;
break;
}

13
src/pit_fast.c
View File

@@ -522,13 +522,14 @@ pitf_read_reg(void *priv, uint8_t reg)
break;
case 0x07:
/* The SiS 551x datasheet is unclear about how exactly
this register is structured. */
this register is structured.
Update: But the SiS 5571 datasheet is clear. */
ret = (dev->counters[0].rm & 0x80) ? 0x01 : 0x00;
ret = (dev->counters[0].wm & 0x80) ? 0x02 : 0x00;
ret = (dev->counters[1].rm & 0x80) ? 0x04 : 0x00;
ret = (dev->counters[1].wm & 0x80) ? 0x08 : 0x00;
ret = (dev->counters[2].rm & 0x80) ? 0x10 : 0x00;
ret = (dev->counters[2].wm & 0x80) ? 0x20 : 0x00;
ret |= (dev->counters[1].rm & 0x80) ? 0x02 : 0x00;
ret |= (dev->counters[2].rm & 0x80) ? 0x04 : 0x00;
ret |= (dev->counters[0].wm & 0x80) ? 0x08 : 0x00;
ret |= (dev->counters[1].wm & 0x80) ? 0x10 : 0x00;
ret |= (dev->counters[2].wm & 0x80) ? 0x20 : 0x00;
break;
}

18
src/printer/prt_escp.c
View File

@@ -437,6 +437,7 @@ reset_printer(escp_t *dev)
dev->cpi = PAGE_CPI;
dev->curr_char_table = 1;
dev->font_style = 0;
dev->print_quality = QUALITY_DRAFT;
dev->extra_intra_space = 0.0;
dev->print_upper_control = 1;
dev->bg_remaining_bytes = 0;
@@ -508,9 +509,12 @@ update_font(escp_t *dev)
if (dev->fontface)
FT_Done_Face(dev->fontface);
if (dev->print_quality == QUALITY_DRAFT)
fn = FONT_FILE_DOTMATRIX;
else
if (dev->print_quality == QUALITY_DRAFT) {
if (dev->font_style & STYLE_ITALICS)
fn = FONT_FILE_DOTMATRIX_ITALIC;
else
fn = FONT_FILE_DOTMATRIX;
} else
switch (dev->lq_typeface) {
case TYPEFACE_ROMAN:
fn = FONT_FILE_ROMAN;
@@ -531,7 +535,7 @@ update_font(escp_t *dev)
fn = FONT_FILE_OCRB;
break;
default:
fn = FONT_FILE_DOTMATRIX;
fn = FONT_FILE_ROMAN;
}
/* Create a full pathname for the ROM file. */
@@ -592,7 +596,7 @@ update_font(escp_t *dev)
(uint16_t) (hpoints * 64), (uint16_t) (vpoints * 64),
dev->dpi, dev->dpi);
if ((dev->font_style & STYLE_ITALICS) || (dev->char_tables[dev->curr_char_table] == 0)) {
if ((dev->print_quality != QUALITY_DRAFT) && ((dev->font_style & STYLE_ITALICS) || (dev->char_tables[dev->curr_char_table] == 0))) {
/* Italics transformation. */
matrix.xx = 0x10000L;
matrix.xy = (FT_Fixed) (0.20 * 0x10000L);
@@ -1578,8 +1582,8 @@ handle_char(escp_t *dev, uint8_t ch)
FT_Render_Glyph(dev->fontface->glyph, FT_RENDER_MODE_NORMAL);
}
pen_x = PIXX + dev->fontface->glyph->bitmap_left;
pen_y = (uint16_t) (PIXY - dev->fontface->glyph->bitmap_top + dev->fontface->size->metrics.ascender / 64);
pen_x = PIXX + fmax(0.0, dev->fontface->glyph->bitmap_left);
pen_y = (uint16_t) (PIXY + fmax(0.0, -dev->fontface->glyph->bitmap_top + dev->fontface->size->metrics.ascender / 64));
if (dev->font_style & STYLE_SUBSCRIPT)
pen_y += dev->fontface->glyph->bitmap.rows / 2;

10
src/qt/qt_joystickconfiguration.cpp
View File

@@ -186,7 +186,7 @@ JoystickConfiguration::on_comboBoxDevice_currentIndexChanged(int index)
Models::AddEntry(model, plat_joystick_state[joystick].axis[d].name, 0);
}
int mapping = joystick_state[joystick_nr].pov_mapping[c][0];
int mapping = joystick_state[joystick_nr].pov_mapping[c / 2][c & 1];
int nr_povs = plat_joystick_state[joystick].nr_povs;
if (mapping & POV_X)
cbox->setCurrentIndex((mapping & 3) * 2);
@@ -195,14 +195,6 @@ JoystickConfiguration::on_comboBoxDevice_currentIndexChanged(int index)
else
cbox->setCurrentIndex(mapping + nr_povs * 2);
mapping = joystick_state[joystick_nr].pov_mapping[c][1];
if (mapping & POV_X)
cbox->setCurrentIndex((mapping & 3) * 2);
else if (mapping & POV_Y)
cbox->setCurrentIndex((mapping & 3) * 2 + 1);
else
cbox->setCurrentIndex(mapping + nr_povs * 2);
ui->ct->addWidget(label, row, 0);
ui->ct->addWidget(cbox, row, 1);

28
src/qt/qt_main.cpp
View File

@@ -94,6 +94,7 @@ main_thread_fn()
int frames;
QThread::currentThread()->setPriority(QThread::HighestPriority);
plat_set_thread_name(NULL, "main_thread_fn");
framecountx = 0;
// title_update = 1;
old_time = elapsed_timer.elapsed();
@@ -194,6 +195,23 @@ main(int argc, char *argv[])
QApplication::setFont(QFont(font_name, font_size.toInt()));
SetCurrentProcessExplicitAppUserModelID(L"86Box.86Box");
#endif
#ifndef Q_OS_MACOS
# ifdef RELEASE_BUILD
app.setWindowIcon(QIcon(":/settings/win/icons/86Box-green.ico"));
# elif defined ALPHA_BUILD
app.setWindowIcon(QIcon(":/settings/win/icons/86Box-red.ico"));
# elif defined BETA_BUILD
app.setWindowIcon(QIcon(":/settings/win/icons/86Box-yellow.ico"));
# else
app.setWindowIcon(QIcon(":/settings/win/icons/86Box-gray.ico"));
# endif
# ifdef Q_OS_UNIX
app.setDesktopFileName("net.86box.86Box");
# endif
#endif
if (!pc_init_modules()) {
ui_msgbox_header(MBX_FATAL, (void *) IDS_2121, (void *) IDS_2056);
return 6;
@@ -293,8 +311,6 @@ main(int argc, char *argv[])
// pc_reset_hard_init();
/* Set the PAUSE mode depending on the renderer. */
// plat_pause(0);
QTimer onesec;
QObject::connect(&onesec, &QTimer::timeout, &app, [] {
pc_onesec();
@@ -323,6 +339,14 @@ main(int argc, char *argv[])
QTimer::singleShot(0, &app, [] {
pc_reset_hard_init();
main_thread = new std::thread(main_thread_fn);
/* Set the PAUSE mode depending on the renderer. */
#ifdef USE_VNC
if (vnc_enabled && vid_api != 6)
plat_pause(1);
else
#endif
plat_pause(0);
});
auto ret = app.exec();

9
src/qt/qt_mainwindow.cpp
View File

@@ -196,15 +196,6 @@ MainWindow::MainWindow(QWidget *parent)
auto toolbar_label = new QLabel();
ui->toolBar->addWidget(toolbar_label);
#ifdef RELEASE_BUILD
this->setWindowIcon(QIcon(":/settings/win/icons/86Box-green.ico"));
#elif defined ALPHA_BUILD
this->setWindowIcon(QIcon(":/settings/win/icons/86Box-red.ico"));
#elif defined BETA_BUILD
this->setWindowIcon(QIcon(":/settings/win/icons/86Box-yellow.ico"));
#else
this->setWindowIcon(QIcon(":/settings/win/icons/86Box-gray.ico"));
#endif
this->setWindowFlag(Qt::MSWindowsFixedSizeDialogHint, vid_resize != 1);
this->setWindowFlag(Qt::WindowMaximizeButtonHint, vid_resize == 1);

48
src/qt/qt_platform.cpp
View File

@@ -50,6 +50,7 @@
#include "qt_util.hpp"
#ifdef Q_OS_UNIX
# include <pthread.h>
# include <sys/mman.h>
#endif
@@ -371,7 +372,7 @@ plat_pause(int p)
wchar_t title[1024];
wchar_t paused_msg[512];
if (p == dopause) {
if ((!!p) == dopause) {
#ifdef Q_OS_WINDOWS
if (source_hwnd)
PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDSTATUS, (WPARAM) !!p, (LPARAM) (HWND) main_window->winId());
@@ -742,3 +743,48 @@ plat_get_dpi(void)
{
return util::screenOfWidget(main_window)->devicePixelRatio();
}
void
plat_set_thread_name(void *thread, const char *name)
{
#ifdef Q_OS_WINDOWS
/* SetThreadDescription was added in 14393. Revisit if we ever start requiring 10. */
static void *kernel32_handle = NULL;
static HRESULT(WINAPI *pSetThreadDescription)(HANDLE hThread, PCWSTR lpThreadDescription) = NULL;
static dllimp_t kernel32_imports[] = {
// clang-format off
{ "SetThreadDescription", &pSetThreadDescription },
{ NULL, NULL }
// clang-format on
};
if (!kernel32_handle) {
kernel32_handle = dynld_module("kernel32.dll", kernel32_imports);
if (!kernel32_handle) {
kernel32_handle = kernel32_imports; /* store dummy pointer to avoid trying again */
pSetThreadDescription = NULL;
}
}
if (pSetThreadDescription) {
size_t len = strlen(name) + 1;
wchar_t wname[len + 1];
mbstowcs(wname, name, len);
pSetThreadDescription(thread ? (HANDLE) thread : GetCurrentThread(), wname);
}
#else
# ifdef Q_OS_DARWIN
if (thread) /* Apple pthread can only set self's name */
return;
char truncated[64];
# else
char truncated[16];
# endif
strncpy(truncated, name, sizeof(truncated) - 1);
# ifdef Q_OS_DARWIN
pthread_setname_np(truncated);
# else
pthread_setname_np(thread ? *((pthread_t *) thread) : pthread_self(), truncated);
# endif
#endif
}

2
src/qt/qt_renderercommon.cpp
View File

@@ -88,7 +88,7 @@ RendererCommon::onResize(int width, int height)
if (video_fullscreen_scale == FULLSCR_SCALE_INT43) {
gh = gw / r43;
gw = gw;
// gw = gw;
gsr = r43;
}

2
src/qt/qt_rendererstack.cpp
View File

@@ -144,7 +144,7 @@ int ignoreNextMouseEvent = 1;
void
RendererStack::mouseReleaseEvent(QMouseEvent *event)
{
if (!dopause && this->geometry().contains(event->pos()) &&
if (!dopause && this->geometry().contains(m_monitor_index >= 1 ? event->globalPos() : event->pos()) &&
(event->button() == Qt::LeftButton) && !mouse_capture &&
(isMouseDown & 1) && (kbd_req_capture || (mouse_get_buttons() != 0)) &&
(mouse_input_mode == 0)) {

4
src/qt/qt_settingsinput.cpp
View File

@@ -190,9 +190,9 @@ updateJoystickConfig(int type, int joystick_nr, QWidget *parent)
for (int c = 0; c < joystick_get_button_count(type); c++) {
joystick_state[joystick_nr].button_mapping[c] = jc.selectedButton(c);
}
for (int c = 0; c < joystick_get_button_count(type); c++) {
for (int c = 0; c < joystick_get_pov_count(type) * 2; c += 2) {
joystick_state[joystick_nr].pov_mapping[c][0] = get_pov(jc, c, joystick_nr);
joystick_state[joystick_nr].pov_mapping[c][1] = get_pov(jc, c, joystick_nr);
joystick_state[joystick_nr].pov_mapping[c][1] = get_pov(jc, c + 1, joystick_nr);
}
}
}

22
src/qt/qt_settingsotherperipherals.cpp
View File

@@ -23,6 +23,7 @@ extern "C" {
#include <86box/machine.h>
#include <86box/isamem.h>
#include <86box/isartc.h>
#include <86box/unittester.h>
}
#include "qt_deviceconfig.hpp"
@@ -44,7 +45,9 @@ SettingsOtherPeripherals::onCurrentMachineChanged(int machineId)
bool machineHasIsa = (machine_has_bus(machineId, MACHINE_BUS_ISA) > 0);
ui->checkBoxISABugger->setChecked((machineHasIsa && (bugger_enabled > 0)) ? true : false);
ui->checkBoxPOSTCard->setChecked(postcard_enabled > 0 ? true : false);
ui->checkBoxUnitTester->setChecked(unittester_enabled > 0 ? true : false);
ui->checkBoxISABugger->setEnabled(machineHasIsa);
ui->pushButtonConfigureUT->setEnabled(unittester_enabled > 0);
ui->comboBoxRTC->setEnabled(machineHasIsa);
ui->pushButtonConfigureRTC->setEnabled(machineHasIsa);
@@ -112,9 +115,10 @@ void
SettingsOtherPeripherals::save()
{
/* Other peripherals category */
bugger_enabled = ui->checkBoxISABugger->isChecked() ? 1 : 0;
postcard_enabled = ui->checkBoxPOSTCard->isChecked() ? 1 : 0;
isartc_type = ui->comboBoxRTC->currentData().toInt();
bugger_enabled = ui->checkBoxISABugger->isChecked() ? 1 : 0;
postcard_enabled = ui->checkBoxPOSTCard->isChecked() ? 1 : 0;
unittester_enabled = ui->checkBoxUnitTester->isChecked() ? 1 : 0;
isartc_type = ui->comboBoxRTC->currentData().toInt();
/* ISA memory boards. */
for (int i = 0; i < ISAMEM_MAX; i++) {
@@ -197,3 +201,15 @@ SettingsOtherPeripherals::on_pushButtonConfigureCard4_clicked()
{
DeviceConfig::ConfigureDevice(isamem_get_device(ui->comboBoxCard4->currentData().toInt()), 4, qobject_cast<Settings *>(Settings::settings));
}
void
SettingsOtherPeripherals::on_checkBoxUnitTester_stateChanged(int arg1)
{
ui->pushButtonConfigureUT->setEnabled(arg1 != 0);
}
void
SettingsOtherPeripherals::on_pushButtonConfigureUT_clicked()
{
DeviceConfig::ConfigureDevice(&unittester_device);
}

2
src/qt/qt_settingsotherperipherals.hpp
View File

@@ -30,6 +30,8 @@ private slots:
void on_comboBoxCard1_currentIndexChanged(int index);
void on_pushButtonConfigureRTC_clicked();
void on_comboBoxRTC_currentIndexChanged(int index);
void on_checkBoxUnitTester_stateChanged(int arg1);
void on_pushButtonConfigureUT_clicked();
private:
Ui::SettingsOtherPeripherals *ui;

24
src/qt/qt_settingsotherperipherals.ui
View File

@@ -192,6 +192,30 @@
</item>
</layout>
</item>
<item>
<layout class="QHBoxLayout" name="horizontalLayout_3">
<item>
<widget class="QCheckBox" name="checkBoxUnitTester">
<property name="text">
<string>86Box Unit Tester</string>
</property>
<property name="sizePolicy">
<sizepolicy hsizetype="MinimumExpanding" vsizetype="Fixed">
<horstretch>0</horstretch>
<verstretch>0</verstretch>
</sizepolicy>
</property>
</widget>
</item>
<item>
<widget class="QPushButton" name="pushButtonConfigureUT">
<property name="text">
<string>Configure</string>
</property>
</widget>
</item>
</layout>
</item>
<item>
<spacer name="verticalSpacer">
<property name="orientation">

6
src/qt/qt_winrawinputfilter.cpp
View File

@@ -53,17 +53,15 @@ extern "C" void win_joystick_handle(PRAWINPUT);
std::unique_ptr<WindowsRawInputFilter>
WindowsRawInputFilter::Register(MainWindow *window)
{
HWND wnd = (HWND) window->winId();
RAWINPUTDEVICE rid[2] = {
{.usUsagePage = 0x01,
.usUsage = 0x06,
.dwFlags = RIDEV_NOHOTKEYS,
.hwndTarget = wnd},
.hwndTarget = nullptr},
{ .usUsagePage = 0x01,
.usUsage = 0x02,
.dwFlags = 0,
.hwndTarget = wnd}
.hwndTarget = nullptr}
};
if (RegisterRawInputDevices(rid, 2, sizeof(rid[0])) == FALSE)

2
src/scsi/scsi.c
View File

@@ -85,7 +85,7 @@ static SCSI_CARD scsi_cards[] = {
{ &scsi_t130b_device, },
{ &aha1640_device, },
{ &buslogic_640a_device, },
{ &ncr53c90_mca_device, },
{ &ncr53c90a_mca_device, },
{ &spock_device, },
{ &tribble_device, },
{ &buslogic_958d_pci_device, },

17
src/scsi/scsi_cdrom.c
View File

@@ -990,7 +990,8 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev)
if (dev->current_cdb[0] == 0x42)
dev->callback += 40.0;
/* Account for seek time. */
bytes_per_second = 176.0 * 1024.0;
/* 44100 * 16 bits * 2 channels = 176400 bytes per second */
bytes_per_second = 176400.0;
bytes_per_second *= (double) dev->drv->cur_speed;
break;
case 0xc6 ... 0xc7:
@@ -1011,7 +1012,8 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev)
case CDROM_TYPE_SONY_CDU561_18k:
case CDROM_TYPE_SONY_CDU76S_100:
case CDROM_TYPE_TEXEL_DMXX24_100:
bytes_per_second = 176.0 * 1024.0;
/* 44100 * 16 bits * 2 channels = 176400 bytes per second */
bytes_per_second = 176400.0;
bytes_per_second *= (double) dev->drv->cur_speed;
break;
}
@@ -1023,7 +1025,8 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev)
case CDROM_TYPE_SONY_CDU76S_100:
case CDROM_TYPE_PIONEER_DRM604X_2403:
case CDROM_TYPE_TEXEL_DMXX24_100:
bytes_per_second = 176.0 * 1024.0;
/* 44100 * 16 bits * 2 channels = 176400 bytes per second */
bytes_per_second = 176400.0;
bytes_per_second *= (double) dev->drv->cur_speed;
break;
}
@@ -1037,7 +1040,8 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev)
case CDROM_TYPE_TEXEL_DMXX24_100:
if (dev->current_cdb[0] == 0xc2)
dev->callback += 40.0;
bytes_per_second = 176.0 * 1024.0;
/* 44100 * 16 bits * 2 channels = 176400 bytes per second */
bytes_per_second = 176400.0;
bytes_per_second *= (double) dev->drv->cur_speed;
break;
}
@@ -1049,7 +1053,8 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev)
case CDROM_TYPE_NEC_77_106:
case CDROM_TYPE_NEC_211_100:
case CDROM_TYPE_NEC_464_105:
bytes_per_second = 176.0 * 1024.0;
/* 44100 * 16 bits * 2 channels = 176400 bytes per second */
bytes_per_second = 176400.0;
bytes_per_second *= (double) dev->drv->cur_speed;
break;
}
@@ -1751,7 +1756,7 @@ scsi_cdrom_command(scsi_common_t *sc, uint8_t *cdb)
int used_len;
int alloc_length;
int msf;
int pos = 0;
int pos = dev->drv->seek_pos;
int size_idx;
int idx = 0;
uint32_t feature;

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