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SM(S)C FDC37C93x Super I/O chip rewrite, add the Acer V62x, and un-dev-branch the V-Tech Laser XT machines.

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This commit is contained in:
OBattler
2025-05-05 05:11:55 +02:00
parent dca7ed737c
commit 018bbfae43
17 changed files with 1810 additions and 666 deletions
Download Patch File Download Diff File Expand all files Collapse all files

61
src/chipset/intel_piix.c
View File

@@ -59,7 +59,6 @@ typedef struct piix_io_trap_t {
} piix_io_trap_t;
typedef struct _piix_ {
uint8_t cur_readout_reg;
uint8_t rev;
uint8_t type;
uint8_t func_shift;
@@ -67,7 +66,6 @@ typedef struct _piix_ {
uint8_t pci_slot;
uint8_t no_mirq0;
uint8_t regs[4][256];
uint8_t readout_regs[256];
uint16_t func0_id;
uint16_t nvr_io_base;
uint16_t acpi_io_base;
@@ -1185,31 +1183,6 @@ piix_read(int func, int addr, void *priv)
return ret;
}
static void
board_write(uint16_t port, uint8_t val, void *priv)
{
piix_t *dev = (piix_t *) priv;
if (port == 0x00e0)
dev->cur_readout_reg = val;
else if (port == 0x00e1)
dev->readout_regs[dev->cur_readout_reg] = val;
}
static uint8_t
board_read(uint16_t port, void *priv)
{
const piix_t *dev = (piix_t *) priv;
uint8_t ret = 0x64;
if (port == 0x00e0)
ret = dev->cur_readout_reg;
else if (port == 0x00e1)
ret = dev->readout_regs[dev->cur_readout_reg];
return ret;
}
static void
piix_reset_hard(piix_t *dev)
{
@@ -1624,40 +1597,6 @@ piix_init(const device_t *info)
if (dev->type < 3)
pci_enable_mirq(1);
dev->readout_regs[0] = 0xff;
dev->readout_regs[1] = 0x40;
dev->readout_regs[2] = 0xff;
/* Port E1 register 01 (TODO: Find how multipliers > 3.0 are defined):
Bit 6: 1 = can boot, 0 = no;
Bit 7, 1 = multiplier (00 = 2.5, 01 = 2.0, 10 = 3.0, 11 = 1.5);
Bit 5, 4 = bus speed (00 = 50 MHz, 01 = 66 MHz, 10 = 60 MHz, 11 = ????):
Bit 7, 5, 4, 1: 0000 = 125 MHz, 0010 = 166 MHz, 0100 = 150 MHz, 0110 = ??? MHz;
0001 = 100 MHz, 0011 = 133 MHz, 0101 = 120 MHz, 0111 = ??? MHz;
1000 = 150 MHz, 1010 = 200 MHz, 1100 = 180 MHz, 1110 = ??? MHz;
1001 = 75 MHz, 1011 = 100 MHz, 1101 = 90 MHz, 1111 = ??? MHz */
if (cpu_busspeed <= 40000000)
dev->readout_regs[1] |= 0x30;
else if ((cpu_busspeed > 40000000) && (cpu_busspeed <= 50000000))
dev->readout_regs[1] |= 0x00;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
dev->readout_regs[1] |= 0x20;
else if (cpu_busspeed > 60000000)
dev->readout_regs[1] |= 0x10;
if (cpu_dmulti <= 1.5)
dev->readout_regs[1] |= 0x82;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
dev->readout_regs[1] |= 0x02;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
dev->readout_regs[1] |= 0x00;
else if (cpu_dmulti > 2.5)
dev->readout_regs[1] |= 0x80;
io_sethandler(0x00e0, 0x0002, board_read, NULL, NULL, board_write, NULL, NULL, dev);
#if 0
device_add(&i8254_sec_device);
#endif

23
src/device/kbc_at.c
View File

@@ -509,9 +509,6 @@ kbc_scan_kbd_at(atkbc_t *dev)
}
}
static void
write_p2(atkbc_t *dev, uint8_t val);
static void
kbc_at_poll_at(atkbc_t *dev)
{
@@ -778,6 +775,7 @@ static void
write_p2(atkbc_t *dev, uint8_t val)
{
uint8_t old = dev->p2;
kbc_at_log("ATkbc: write P2: %02X (old: %02X)\n", val, dev->p2);
uint8_t kbc_ven = dev->flags & KBC_VEN_MASK;
@@ -851,6 +849,25 @@ write_p2(atkbc_t *dev, uint8_t val)
}
}
uint8_t
kbc_at_read_p(void *priv, uint8_t port, uint8_t mask)
{
atkbc_t *dev = (atkbc_t *) priv;
uint8_t *p = (port == 2) ? &dev->p2 : &dev->p1;
uint8_t ret = *p & mask;
return ret;
}
void
kbc_at_write_p(void *priv, uint8_t port, uint8_t mask, uint8_t val)
{
atkbc_t *dev = (atkbc_t *) priv;
uint8_t *p = (port == 2) ? &dev->p2 : &dev->p1;
*p = (*p & mask) | val;
}
static void
write_p2_fast_a20(atkbc_t *dev, uint8_t val)
{

19
src/floppy/fdc.c
View File

@@ -81,6 +81,7 @@ int fdc_current[FDC_MAX] = { 0, 0 };
volatile int fdcinited = 0;
// #define ENABLE_FDC_LOG 1
#ifdef ENABLE_FDC_LOG
int fdc_do_log = ENABLE_FDC_LOG;
@@ -395,6 +396,20 @@ fdc_update_rwc(fdc_t *fdc, int drive, int rwc)
fdc_rate(fdc, drive);
}
uint8_t
fdc_get_media_id(fdc_t *fdc, int id)
{
uint8_t ret = fdc->media_id & (1 << id);
return ret;
}
void
fdc_set_media_id(fdc_t *fdc, int id, int set)
{
fdc->media_id = (fdc->media_id & ~(1 << id)) | (set << id);
}
int
fdc_get_boot_drive(fdc_t *fdc)
{
@@ -1369,7 +1384,7 @@ fdc_read(uint16_t addr, void *priv)
} else if (!fdc->enh_mode)
ret = 0x20;
else
ret = fdc->rwc[drive] << 4;
ret = (fdc->rwc[drive] << 4) | (fdc->media_id << 6);
break;
case 4: /*Status*/
ret = fdc->stat;
@@ -2352,6 +2367,8 @@ fdc_reset(void *priv)
}
fdc->power_down = 0;
fdc->media_id = 0;
}
static void

5
src/include/86box/fdc.h
View File

@@ -119,6 +119,8 @@ typedef struct fdc_t {
uint8_t lock;
uint8_t dsr;
uint8_t media_id;
uint8_t params[15];
uint8_t specify[2];
uint8_t res[11];
@@ -166,6 +168,9 @@ extern void fdc_3f1_enable(fdc_t *fdc, int enable);
extern int fdc_get_bit_rate(fdc_t *fdc);
extern int fdc_get_bitcell_period(fdc_t *fdc);
extern uint8_t fdc_get_media_id(fdc_t *fdc, int id);
extern void fdc_set_media_id(fdc_t *fdc, int id, int set);
/* A few functions to communicate between Super I/O chips and the FDC. */
extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode);
extern int fdc_get_rwc(fdc_t *fdc, int drive);

1
src/include/86box/keyboard.h
View File

@@ -285,6 +285,7 @@ extern int keyboard_isfsexit(void);
extern int keyboard_isfsexit_up(void);
extern void keyboard_set_is_amstrad(int ams);
extern void kbc_at_set_ps2(void *priv, uint8_t ps2);
extern uint8_t kbc_at_read_p(void *priv, uint8_t port, uint8_t mask);
extern void kbc_at_write_p(void *priv, uint8_t port, uint8_t mask, uint8_t val);
extern void kbc_at_set_fast_reset(uint8_t new_fast_reset);

9
src/include/86box/machine.h
View File

@@ -806,6 +806,7 @@ extern int machine_at_p65up5_cp6nd_init(const machine_t *);
/* m_at_slot1.c */
extern int machine_at_m729_init(const machine_t *);
extern int machine_at_acerv62x_init(const machine_t *);
extern int machine_at_p65up5_cpknd_init(const machine_t *);
extern int machine_at_kn97_init(const machine_t *);
@@ -969,10 +970,14 @@ extern int machine_xt_compaq_deskpro_init(const machine_t *);
extern int machine_xt_compaq_portable_init(const machine_t *);
/* m_xt_laserxt.c */
#ifdef USE_LASERXT
extern int machine_xt_laserxt_init(const machine_t *);
#ifdef EMU_DEVICE_H
extern const device_t laserxt_device;
#endif
extern int machine_xt_lxt3_init(const machine_t *);
#endif /* USE_LASERXT */
#ifdef EMU_DEVICE_H
extern const device_t lxt3_device;
#endif
/* m_xt_philips.c */
extern int machine_xt_p3105_init(const machine_t *);

24
src/include/86box/sio.h
View File

@@ -48,14 +48,22 @@ extern const device_t fdc37c669_370_device;
extern const device_t fdc37c67x_device;
extern const device_t fdc37c931apm_device;
extern const device_t fdc37c931apm_compaq_device;
extern const device_t fdc37c932fr_device;
extern const device_t fdc37c932qf_device;
extern const device_t fdc37c932_device;
extern const device_t fdc37c935_device;
extern const device_t fdc37c935_370_device;
extern const device_t fdc37c935_no_nvr_device;
#define FDC37C93X_NORMAL 0x0002
#define FDC37C93X_FR 0x0003
#define FDC37C93X_APM 0x0030
#define FDC37C93X_CHIP_ID 0x00ff
#define FDC37C931 0x0100 /* Compaq KBC firmware and configuration registers on GPIO ports. */
#define FDC37C932 0x0200 /* AMI '5' Megakey KBC firmware. */
#define FDC37C933 0x0300 /* IBM KBC firmware. */
#define FDC37C935 0x0500 /* Phoenix Multikey/42 1.38 KBC firmware. */
#define FDC37C937 0x0700 /* Phoenix Multikey/42i 4.16 KBC firmware. */
#define FDC37C93X_KBC 0x0f00
#define FDC37C93X_NO_NVR 0x1000
#define FDC37C93X_370 0x2000
extern const device_t fdc37c93x_device;
extern const device_t fdc37m60x_device;
extern const device_t fdc37m60x_370_device;

6
src/machine/CMakeLists.txt
View File

@@ -20,6 +20,7 @@ add_library(mch OBJECT
machine_table.c
m_xt.c
m_xt_compaq.c
m_xt_laserxt.c
m_xt_philips.c
m_xt_t1000.c
m_xt_t1000_vid.c
@@ -64,11 +65,6 @@ if(DESKPRO386)
target_compile_definitions(mch PRIVATE USE_DESKPRO386)
endif()
if(LASERXT)
target_sources(mch PRIVATE m_xt_laserxt.c)
target_compile_definitions(mch PRIVATE USE_LASERXT)
endif()
if(OLIVETTI)
target_compile_definitions(mch PRIVATE USE_OLIVETTI)
endif()

33
src/machine/m_at_slot1.c
View File

@@ -40,6 +40,35 @@
#include <86box/clock.h>
#include <86box/snd_ac97.h>
int
machine_at_acerv62x_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerv62x/v62xc0s1.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 5, 0, 0, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_APM));
device_add(&sst_flash_29ee020_device);
return ret;
}
int
machine_at_p65up5_cpknd_init(const machine_t *model)
{
@@ -131,7 +160,7 @@ machine_at_spitfire_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -143,7 +172,7 @@ machine_at_spitfire_init(const machine_t *model)
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440lx_device);
device_add(&piix4e_device);
device_add(&fdc37c935_no_nvr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&lm78_device); /* no reporting in BIOS */

23
src/machine/m_at_socket7.c
View File

@@ -69,7 +69,8 @@ machine_at_acerv35n_init(const machine_t *model)
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
/* The chip is not marked FR but the BIOS accesses register 06h of GPIO. */
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_FR));
device_add(&sst_flash_29ee010_device);
return ret;
@@ -160,7 +161,7 @@ machine_at_m7shi_init(const machine_t *model)
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&intel_flash_bxt_device);
return ret;
@@ -568,7 +569,7 @@ machine_at_presario2240_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932qf_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -598,7 +599,7 @@ machine_at_presario4500_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c931apm_compaq_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C931 | FDC37C93X_APM));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -631,7 +632,7 @@ machine_at_dellhannibalp_init(const machine_t *model)
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -659,7 +660,7 @@ machine_at_p55va_init(const machine_t *model)
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_device);
return ret;
@@ -687,7 +688,7 @@ machine_at_brio80xx_init(const machine_t *model)
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c935_370_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_370));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -756,7 +757,7 @@ machine_at_pb810_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c935_370_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_370));
device_add(&intel_flash_bxt_device);
return ret;
@@ -851,7 +852,7 @@ machine_at_gw2kte_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -1553,7 +1554,7 @@ machine_at_thunderbolt_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1564,7 +1565,7 @@ machine_at_thunderbolt_init(const machine_t *model)
pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 0, 1, 2);
device_add(&i430tx_device);
device_add(&piix4_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 128);

8
src/machine/m_at_socket7_3v.c
View File

@@ -455,7 +455,7 @@ machine_at_pb640_init(const machine_t *model)
device_add(&piix_rev02_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&gd5440_onboard_pci_device);
device_add(machine_get_vid_device(machine));
device_add(&keyboard_ps2_intel_ami_pci_device);
device_add(&pc87306_device);
@@ -546,7 +546,7 @@ machine_at_acerm3a_init(const machine_t *model)
pci_register_slot(0x10, PCI_CARD_VIDEO, 4, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
@@ -700,7 +700,7 @@ machine_at_gw2kma_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -819,7 +819,7 @@ machine_at_vectra54_init(const machine_t *model)
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&fdc37c932_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;

4
src/machine/m_at_socket8.c
View File

@@ -188,7 +188,7 @@ machine_at_acerv60n_init(const machine_t *model)
pci_register_slot(0x0C, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
@@ -389,7 +389,7 @@ machine_at_m6mi_init(const machine_t *model)
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&intel_flash_bxt_device);
return ret;

3
src/machine/m_pcjr.c
View File

@@ -1566,7 +1566,8 @@ machine_pcjr_init(UNUSED(const machine_t *model))
device_add(&fdc_pcjr_device);
device_add(&ns8250_pcjr_device);
serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */
/* So that serial_standalone_init() won't do anything. */
serial_set_next_inst(SERIAL_MAX - 1);
/* "All the inputs are 'read' with one 'IN' from address hex 201." - PCjr Technical Reference (Nov. 83), p.2-119

461
src/machine/m_xt_laserxt.c
View File

@@ -1,6 +1,7 @@
/*This is the chipset used in the LaserXT series model*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
@@ -21,125 +22,411 @@
#include <86box/keyboard.h>
#include <86box/plat_unused.h>
static int laserxt_emspage[4];
static int laserxt_emscontrol[4];
static mem_mapping_t laserxt_ems_mapping[4];
static int laserxt_ems_baseaddr_index = 0;
static int laserxt_is_lxt3 = 0;
#define EMS_TOTAL_MAX 0x00100000
static uint32_t
get_laserxt_ems_addr(uint32_t addr)
typedef struct
{
if (laserxt_emspage[(addr >> 14) & 3] & 0x80) {
addr = (!laserxt_is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)) + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF);
}
uint8_t page;
uint8_t ctrl;
return addr;
uint32_t phys;
uint32_t virt;
mem_mapping_t mapping;
uint8_t *ram;
void *parent;
} lxt_ems_t;
typedef struct
{
int ems_base_idx;
lxt_ems_t ems[4];
uint16_t io_base;
uint32_t base;
uint32_t mem_size;
uint8_t *ram;
void *parent;
} lxt_ems_board_t;
typedef struct
{
int is_lxt3;
lxt_ems_board_t *ems_boards[2];
} lxt_t;
static void
ems_update_virt(lxt_ems_t *dev, uint8_t new_page)
{
lxt_ems_board_t *board = (lxt_ems_board_t *) dev->parent;
lxt_t *lxt = (lxt_t *) board->parent;
dev->page = new_page;
if (new_page & 0x80) {
if (lxt->is_lxt3) {
/* Point invalid pages at 1 MB which is outside the maximum. */
if ((new_page & 0x7f) >= 0x40)
dev->virt = EMS_TOTAL_MAX;
else
dev->virt = ((new_page & 0x7f) << 14);
} else
dev->virt = ((new_page & 0x0f) << 14) + ((new_page & 0x40) << 12);
if (dev->virt >= board->mem_size)
dev->virt = EMS_TOTAL_MAX;
} else
dev->virt = EMS_TOTAL_MAX;
dev->ram = board->ram + dev->virt;
if ((new_page & 0x80) && (dev->virt != EMS_TOTAL_MAX)) {
mem_mapping_enable(&dev->mapping);
mem_mapping_set_exec(&dev->mapping, dev->ram);
mem_mapping_set_p(&dev->mapping, dev->ram);
} else
mem_mapping_disable(&dev->mapping);
flushmmucache();
}
static void
laserxt_write(uint16_t port, uint8_t val, UNUSED(void *priv))
lxt_ems_out(uint16_t port, uint8_t val, void *priv)
{
uint32_t paddr;
uint32_t vaddr;
switch (port) {
case 0x0208:
case 0x4208:
case 0x8208:
case 0xC208:
laserxt_emspage[port >> 14] = val;
paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14);
if (val & 0x80) {
mem_mapping_enable(&laserxt_ems_mapping[port >> 14]);
vaddr = get_laserxt_ems_addr(paddr);
mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr);
} else {
mem_mapping_disable(&laserxt_ems_mapping[port >> 14]);
}
flushmmucache();
break;
case 0x0209:
case 0x4209:
case 0x8209:
case 0xC209:
laserxt_emscontrol[port >> 14] = val;
laserxt_ems_baseaddr_index = 0;
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint32_t saddrs[8] = { 0xc4000, 0xc8000, 0xcc000, 0xd0000,
0xd4000, 0xd8000, 0xdc000, 0xe0000 };
uint32_t saddr;
if (port & 0x0001) {
dev->ems[reg].ctrl = val;
if (reg < 0x03) {
dev->ems_base_idx = (dev->ems_base_idx & ~(0x04 >> (2 - reg))) |
((dev->ems[reg].ctrl & 0x80) >> (7 - reg));
saddr = saddrs[dev->ems_base_idx];
for (uint8_t i = 0; i < 4; i++) {
laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i);
uint32_t base = saddr + (i * 0x4000);
mem_mapping_set_addr(&dev->ems[i].mapping, base, 0x4000);
if (!(dev->ems[i].page & 0x80) || (dev->ems[i].virt == EMS_TOTAL_MAX))
mem_mapping_disable(&dev->ems[i].mapping);
}
}
mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000);
flushmmucache();
break;
default:
break;
flushmmucache();
} else if (!(port & 0x0001)) {
dev->ems[reg].page = val;
ems_update_virt(&dev->ems[reg], val);
}
}
static uint8_t
laserxt_read(uint16_t port, UNUSED(void *priv))
lxt_ems_in(uint16_t port, void *priv)
{
switch (port) {
case 0x0208:
case 0x4208:
case 0x8208:
case 0xC208:
return laserxt_emspage[port >> 14];
case 0x0209:
case 0x4209:
case 0x8209:
case 0xC209:
return laserxt_emscontrol[port >> 14];
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint8_t ret = 0xff;
default:
break;
}
return 0xff;
if (port & 0x0001)
ret = dev->ems[reg].ctrl;
else
ret = dev->ems[reg].page;
return ret;
}
static void
mem_write_laserxtems(uint32_t addr, uint8_t val, UNUSED(void *priv))
lxt_ems_write(uint32_t addr, uint8_t val, void *priv)
{
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
ram[addr] = val;
uint8_t *mem = (uint8_t *) priv;
mem[addr & 0x3fff] = val;
}
static uint8_t
mem_read_laserxtems(uint32_t addr, UNUSED(void *priv))
lxt_ems_read(uint32_t addr, void *priv)
{
uint8_t val = 0xFF;
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
val = ram[addr];
return val;
uint8_t *mem = (uint8_t *) priv;
uint8_t ret = 0xff;
ret = mem[addr & 0x3fff];
return ret;
}
static lxt_ems_board_t *
lxt_ems_init(lxt_t *parent, int en, uint16_t io, uint32_t mem)
{
lxt_ems_board_t *dev = (lxt_ems_board_t *) calloc(1, sizeof(lxt_ems_board_t));
if (en) {
dev->parent = parent;
if (io != 0x0000) {
io_sethandler(io , 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x4000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x8000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0xc000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
}
dev->ram = (uint8_t *) calloc(mem, sizeof(uint8_t));
dev->mem_size = mem;
for (uint8_t i = 0; i < 4; i++) {
uint8_t *ptr = dev->ram + (i << 14);
mem_mapping_add(&dev->ems[i].mapping, 0xe0000 + (i << 14), 0x4000,
lxt_ems_read, NULL, NULL,
lxt_ems_write, NULL, NULL,
ptr, 0, ptr);
mem_mapping_disable(&dev->ems[i].mapping);
dev->ems[i].page = 0x7f;
dev->ems[i].ctrl = (i == 3) ? 0x00 : 0x80;
dev->ems[i].parent = dev;
ems_update_virt(&(dev->ems[i]), dev->ems[i].page);
}
}
return dev;
}
static void
laserxt_init(int is_lxt3)
lxt_close(void *priv)
{
if (mem_size > 640) {
io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
mem_mapping_set_addr(&ram_low_mapping, 0, !is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10));
lxt_t *dev = (lxt_t *) priv;
int ems_boards = (1 - dev->is_lxt3) + 1;
for (int i = 0; i < ems_boards; i++)
if (dev->ems_boards[i] != NULL) {
if (dev->ems_boards[i]->ram != NULL)
free(dev->ems_boards[i]->ram);
free(dev->ems_boards[i]);
}
free(dev);
}
static void *
lxt_init(const device_t *info)
{
lxt_t * dev = (lxt_t *) calloc(1, sizeof(lxt_t));
int ems_boards = (1 - info->local) + 1;
int ems_en[2] = { 0 };
uint16_t ems_io[2] = { 0 };
uint32_t ems_mem[2] = { 0 };
char conf_str[512] = { 0 };
dev->is_lxt3 = info->local;
for (int i = 0; i < ems_boards; i++) {
sprintf(conf_str, "ems_%i_enable", i + 1);
ems_en[i] = device_get_config_int(conf_str);
sprintf(conf_str, "ems_%i_base", i + 1);
ems_io[i] = device_get_config_hex16(conf_str);
sprintf(conf_str, "ems_%i_mem_size", i + 1);
ems_mem[i] = device_get_config_int(conf_str) << 10;
dev->ems_boards[i] = lxt_ems_init(dev, ems_en[i], ems_io[i], ems_mem[i]);
}
for (uint8_t i = 0; i < 4; i++) {
laserxt_emspage[i] = 0x7F;
laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80;
mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL);
mem_mapping_disable(&laserxt_ems_mapping[i]);
}
mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
laserxt_is_lxt3 = is_lxt3;
return dev;
}
static const device_config_t laserxt_config[] = {
{
.name = "ems_1_base",
.description = "EMS 1 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_2_base",
.description = "EMS 2 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS 1 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_mem_size",
.description = "EMS 2 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS 1",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_enable",
.description = "Enable EMS 2",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t laserxt_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 0,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = laserxt_config
};
static const device_config_t lxt3_config[] = {
{
.name = "ems_1_base",
.description = "EMS Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 1024,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t lxt3_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 1,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = lxt3_config
};
static void
machine_xt_laserxt_common_init(const machine_t *model,int is_lxt3)
{
@@ -153,7 +440,7 @@ machine_xt_laserxt_common_init(const machine_t *model,int is_lxt3)
nmi_init();
standalone_gameport_type = &gameport_device;
laserxt_init(is_lxt3);
device_add(is_lxt3 ? &lxt3_device : &laserxt_device);
device_add(&keyboard_xt_lxt3_device);
}

3
src/machine/m_xt_zenith.c
View File

@@ -146,7 +146,8 @@ machine_xt_z184_init(const machine_t *model)
lpt2_remove();
lpt1_setup(LPT2_ADDR);
device_add(&ns8250_device);
serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */
/* So that serial_standalone_init() won't do anything. */
serial_set_next_inst(SERIAL_MAX - 1);
device_add(&cga_device);

61
src/machine/machine_table.c
View File

@@ -1709,7 +1709,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
#ifdef USE_LASERXT
{
.name = "[8088] VTech Laser Turbo XT",
.internal_name = "ltxt",
@@ -1742,14 +1741,13 @@ const machine_t machines[] = {
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &laserxt_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
#endif /* USE_LASERXT */
/* Has a standard PS/2 KBC (so, use IBM PS/2 Type 1). */
{
.name = "[8088] Xi8088",
@@ -2612,8 +2610,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
#ifdef USE_LASERXT
{
.name = "[8086] VTech Laser XT3",
.internal_name = "lxt3",
@@ -2637,23 +2633,22 @@ const machine_t machines[] = {
.bus_flags = MACHINE_PC,
.flags = MACHINE_FLAGS_NONE,
.ram = {
.min = 256,
.min = 512,
.max = 640,
.step = 256
.step = 64
},
.nvrmask = 0,
.kbc_device = &keyboard_xt_lxt3_device,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &lxt3_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
#endif /* USE_LASERXT */
/* 286 AT machines */
/* Has IBM AT KBC firmware. */
@@ -8156,7 +8151,10 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* I'm going to assume this as an AMIKey-2 like the other two 486SP3's. */
/*
This has an AMIKey (and an on-board NCR 53C810 PCI SCSI controller), thanks, eBay!
The keyboard port is AT.
*/
{
.name = "[i420TX] ASUS PCI/I-486SP3",
.internal_name = "486sp3",
@@ -10092,7 +10090,7 @@ const machine_t machines[] = {
.max_multi = 1.5
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE | MACHINE_SCSI | MACHINE_APM,
.flags = MACHINE_IDE /*| MACHINE_SCSI */ | MACHINE_APM,
.ram = {
.min = 2048,
.max = 524288,
@@ -14593,6 +14591,47 @@ const machine_t machines[] = {
},
/* 440FX */
/* Has a SM(S)C FDC37C935 Super I/O chip with on-chip KBC with Phoenix
MultiKey/42 (version 1.38) KBC firmware. */
{
.name = "[i440FX] Acer V62X",
.internal_name = "acerv62x",
.type = MACHINE_TYPE_SLOT1,
.chipset = MACHINE_CHIPSET_INTEL_440FX,
.init = machine_at_acerv62x_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SLOT1,
.block = CPU_BLOCK_NONE,
.min_bus = 60000000,
.max_bus = 83333333,
.min_voltage = 1800,
.max_voltage = 3500,
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_USB,
.ram = {
.min = 8192,
.max = 786432,
.step = 8192
},
.nvrmask = 511,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* The base board has a Holtek HT6542B KBC with AMIKey-2 (updated 'H') KBC firmware. */
{
.name = "[i440FX] ASUS P/I-P65UP5 (C-PKND)",

1732
src/sio/sio_fdc37c93x.c
View File

File diff suppressed because it is too large Load Diff