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[core] Refactor LT class into C methods

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This commit is contained in:
Kuba Szczodrzyński
2023-03-10 19:08:55 +01:00
parent 65cf460691
commit fd1afea1bc
40 changed files with 1373 additions and 976 deletions
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67
cores/common/base/api/lt_cpu.h Normal file
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@@ -0,0 +1,67 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
/**
* @brief Get CPU family ID (in ChipFamily enumeration).
*/
lt_cpu_family_t lt_get_cpu_family();
/**
* @brief Get CPU family name as string.
*/
const char *lt_get_cpu_family_name();
/**
* @brief Get CPU model ID (in ChipType enumeration).
*/
lt_cpu_model_t lt_get_cpu_model();
/**
* @brief Get CPU model name as string (uppercase).
*/
const char *lt_get_cpu_model_name();
/**
* @brief Get CPU model name as string (lowercase).
*/
const char *lt_get_cpu_model_code();
/**
* @brief Get CPU unique ID. This may be based on MAC, eFuse, etc. (family-specific).
* Note: the number is 24-bit (with the MSB being zero).
*/
uint32_t lt_get_cpu_unique_id();
/**
* @brief Get CPU ID based on the last three octets of MAC address.
* Note: the number is 24-bit (with the MSB being zero).
*/
uint32_t lt_get_cpu_mac_id();
/**
* @brief Get CPU core count.
*/
uint8_t lt_get_cpu_core_count();
/**
* @brief Get CPU core type name as string.
*/
const char *lt_get_cpu_core_type();
/**
* @brief Get CPU frequency in Hz.
*/
uint32_t lt_get_cpu_freq();
/**
* @brief Get CPU frequency in MHz.
*/
uint32_t lt_get_cpu_freq_mhz();
/**
* @brief Get CPU cycle count.
*/
uint32_t lt_get_cpu_cycle_count();

58
cores/common/base/api/lt_device.h Normal file
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@@ -0,0 +1,58 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
/**
* @brief Get LibreTuya version string.
*/
const char *lt_get_version();
/**
* @brief Get board code.
*/
const char *lt_get_board_code();
/**
* @brief Get device friendly name in format "LT-<family code>-<MAC ID>".
* Can be used as hostname.
*/
const char *lt_get_device_name();
/**
* @brief Reboot the CPU.
*/
void lt_reboot();
/**
* @brief Reboot the CPU with a watchdog timeout (if possible).
*
* @return whether WDT reboot is possible
*/
bool lt_reboot_wdt();
/**
* @brief Reboot the CPU and stay in download mode (if possible).
*
* @return whether download-mode reboot is possible
*/
bool lt_reboot_download_mode();
/**
* @brief Get the reason of last chip reboot.
*/
lt_reboot_reason_t lt_get_reboot_reason();
/**
* @brief Get a textual representation of a reboot reason.
*
* @param reason value to convert to text, pass 0 to read from lt_reboot_get_reason()
*/
const char *lt_get_reboot_reason_name(lt_reboot_reason_t reason);
/**
* @brief Reconfigure GPIO pins used for debugging
* (SWD/JTAG), so that they can be used as normal I/O.
*/
void lt_gpio_recover();

55
cores/common/base/api/lt_flash.h Normal file
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@@ -0,0 +1,55 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
/**
* @brief Read flash chip ID and return a lt_flash_id_t struct.
*/
lt_flash_id_t lt_flash_get_id();
/**
* @brief Get flash chip total size.
*
* The default implementation uses the least significant
* byte of the chip ID to determine the size.
*/
uint32_t lt_flash_get_size();
/**
* @brief Erase flash area. Flash can only be erased in blocks (usually 4 KiB).
*
* @param offset starting offset to erase (in bytes); must be multiple of the flash chip's block size
* @param length length of data to erase (in bytes); will be rounded up to block size
* @return whether erasing was successful
*/
bool lt_flash_erase(uint32_t offset, size_t length);
/**
* @brief Erase a single block of flash (usually 4 KiB).
*
* @param offset offset of the block (in bytes); must be multiple of the flash chip's block size
* @return whether erasing was successful
*/
bool lt_flash_erase_block(uint32_t offset);
/**
* @brief Read data from the flash.
*
* @param offset starting offset (in bytes)
* @param data pointer to where to store the data
* @param length length of data to read
* @return whether reading was successful (i.e. all bytes were successfully read)
*/
bool lt_flash_read(uint32_t offset, uint8_t *data, size_t length);
/**
* @brief Write data to the flash.
*
* @param offset starting offset (in bytes)
* @param data pointer to data to write
* @param length length of data to write
* @return whether writing was successful (i.e. all bytes were successfully written)
*/
bool lt_flash_write(uint32_t offset, uint8_t *data, size_t length);

13
cores/common/base/lt_family_api.h → cores/common/base/api/lt_init.h
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@@ -4,10 +4,6 @@
#include <libretuya.h>
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
/**
* @brief Initialize the family core (optional).
* This method is family-specific; the family core can do whatever it wants to.
@@ -28,12 +24,3 @@ void lt_init_variant() __attribute__((weak));
* This method is empty if not implemented, and shouldn't be called manually.
*/
void lt_init_arduino() __attribute__((weak));
/**
* @brief Get the reason of last chip reset.
*/
ResetReason lt_get_reset_reason();
#ifdef __cplusplus
} // extern "C"
#endif

30
cores/common/base/api/lt_mem.h Normal file
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@@ -0,0 +1,30 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
/**
* @brief Get total RAM size.
*/
uint32_t lt_get_ram_size();
/**
* @brief Get total heap size.
*/
uint32_t lt_get_heap_size();
/**
* @brief Get free heap size.
*/
uint32_t lt_get_heap_free();
/**
* @brief Get lowest level of free heap memory.
*/
uint32_t lt_get_heap_min_free();
/**
* @brief Get largest block of heap that can be allocated at once.
*/
uint32_t lt_get_heap_max_alloc();

60
cores/common/base/api/lt_ota.h Normal file
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@@ -0,0 +1,60 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
#include <uf2ota/uf2types.h>
/**
* @brief Get OTA type of the device's chip.
*/
lt_ota_type_t lt_ota_get_type();
/**
* @brief Check if the specified OTA image is valid.
*
* @param index OTA index to check; 0 for single-OTA chips, 1 or 2 for dual-OTA chips
* @return true if index is valid for the chip's OTA type, and there is a valid image; false otherwise
*/
bool lt_ota_is_valid(uint8_t index);
/**
* @brief Check if OTA rollback is possible (switching the stored index to another partition).
*
* Note that this is not the same as "switching" OTA with revert=true.
*
* @return true if 2nd image is valid and the chip is dual-OTA; false otherwise
*/
bool lt_ota_can_rollback();
/**
* @brief Get the currently running firmware's OTA index.
*
* @return OTA index if dual-OTA is supported, 0 otherwise
*/
uint8_t lt_ota_dual_get_current();
/**
* @brief Read the currently active OTA index, i.e. the one that will boot upon restart.
*
* @return OTA index if dual-OTA is supported, 0 otherwise
*/
uint8_t lt_ota_dual_get_stored();
/**
* @brief Check which UF2 OTA scheme should be used for applying firmware updates.
*
* @return OTA scheme of the target partition
*/
uf2_ota_scheme_t lt_ota_get_uf2_scheme();
/**
* @brief Try to switch OTA index to the other image. For single-OTA chips, only check if the upgrade image is valid.
*
* This can be used to "activate" the upgrade after flashing.
*
* @param revert switch if (and only if) the other image is already marked as active (i.e.
* switch back to the running image)
* @return false if the second image (or upgrade image) is not valid; false if writing failed; true otherwise
*/
bool lt_ota_switch(bool revert);

32
cores/common/base/lt_common_api.h → cores/common/base/api/lt_utils.h
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@@ -4,10 +4,6 @@
#include <libretuya.h>
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
// https://stackoverflow.com/a/3437484
#define MAX(a, b) \
({ \
@@ -22,14 +18,30 @@ extern "C" {
_a < _b ? _a : _b; \
})
/**
* @brief Generate random bytes using rand().
*
* @param buf destination pointer
* @param len how many bytes to generate
*/
void lt_rand_bytes(uint8_t *buf, size_t len);
/**
* @brief Print data pointed to by buf in hexdump-like format (hex+ASCII).
*
* @param buf source pointer
* @param len how many bytes to print
* @param offset increment printed offset by this value
* @param width how many bytes on a line
*/
void hexdump(
const uint8_t *buf,
size_t len,
#ifdef __cplusplus
void hexdump(const uint8_t *buf, size_t len, uint32_t offset = 0, uint8_t width = 16);
uint32_t offset = 0,
uint8_t width = 16
#else
void hexdump(const uint8_t *buf, size_t len, uint32_t offset, uint8_t width);
#endif
#ifdef __cplusplus
} // extern "C"
uint32_t offset,
uint8_t width
#endif
);

23
cores/common/base/api/lt_wdt.h Normal file
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@@ -0,0 +1,23 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
#include <libretuya.h>
/**
* @brief Enable the hardware watchdog.
*
* @param timeout watchdog timeout, milliseconds
* @return whether the chip has a hardware watchdog
*/
bool lt_wdt_enable(uint32_t timeout);
/**
* @brief Disable the hardware watchdog.
*/
void lt_wdt_disable();
/**
* @brief Feed/reset the hardware watchdog timer.
*/
void lt_wdt_feed();

1
cores/common/base/config/fal_cfg.h
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@@ -42,5 +42,6 @@ extern const struct fal_flash_dev flash0;
/**
* @brief "Root" partition entry, representing the entire flash.
* Declared and initialized in lt_main.c.
*/
extern fal_partition_t fal_root_part;

10
cores/common/base/libretuya.h
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@@ -36,17 +36,15 @@
)
// Types & macros
#include "lt_chip.h" // ChipType enum
#include "lt_config.h" // platform configuration options
#include "lt_types.h" // other types & enums
#include "lt_types.h" // types & enums
// Family-specific macros
#include <lt_family.h>
// Board variant (pin definitions)
#include LT_VARIANT_H
// APIs
#include "lt_common_api.h" // common APIs
#include "lt_family_api.h" // family-specific APIs
#include "lt_logger.h" // UART logger utility
#include "lt_posix_api.h" // POSIX compat functions
#include "lt_api.h" // main API function definitions
#include "lt_logger.h" // UART logger utility
#include "lt_posix_api.h" // POSIX compat functions
// printf silencing methods
#include <printf_port.h>

264
cores/common/base/lt_api.c Normal file
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@@ -0,0 +1,264 @@
/* Copyright (c) Kuba Szczodrzyński 2022-04-29. */
#include "lt_api.h"
#include <fal.h>
#if LT_HAS_FREERTOS
#include <FreeRTOS.h>
#include <task.h>
#endif
/* _____ _____ _ _
/ ____| __ \| | | |
| | | |__) | | | |
| | | ___/| | | |
| |____| | | |__| |
\_____|_| \____*/
lt_cpu_family_t lt_get_cpu_family() {
return FAMILY;
}
const char *lt_get_cpu_family_name() {
return STRINGIFY_MACRO(FAMILY) + 2;
}
__attribute__((weak)) lt_cpu_model_t lt_get_cpu_model() {
return MCU;
}
const char *lt_get_cpu_model_name() {
return STRINGIFY_MACRO(MCU);
}
const char *lt_get_cpu_model_code() {
return STRINGIFY_MACRO(MCULC);
}
__attribute__((weak)) uint8_t lt_get_cpu_core_count() {
return 1;
}
#if LT_HAS_FREERTOS
__attribute__((weak)) uint32_t lt_get_cpu_freq() {
return configCPU_CLOCK_HZ;
}
#endif
uint32_t lt_get_cpu_freq_mhz() {
return lt_get_cpu_freq() / 1000000;
}
#if LT_HAS_FREERTOS
__attribute__((weak)) uint32_t lt_get_cpu_cycle_count() {
return xTaskGetTickCount() * (configCPU_CLOCK_HZ / configTICK_RATE_HZ);
}
#endif
/*_____ _
| __ \ (_)
| | | | _____ ___ ___ ___
| | | |/ _ \ \ / / |/ __/ _ \
| |__| | __/\ V /| | (_| __/
|_____/ \___| \_/ |_|\___\__*/
static char *device_name = NULL;
const char *lt_get_version() {
return LT_VERSION_STR;
}
const char *lt_get_board_code() {
return LT_BOARD_STR;
}
const char *lt_get_device_name() {
if (device_name)
return device_name;
uint32_t chip_id = lt_get_cpu_mac_id();
uint8_t *id = (uint8_t *)&chip_id;
const char *model = lt_get_cpu_model_code();
uint8_t model_len = strlen(model);
device_name = (char *)malloc(3 + model_len + 1 + 6 + 1);
sprintf(device_name, "LT-%s-%02x%02x%02x", model, id[0], id[1], id[2]);
return device_name;
}
__attribute__((weak)) bool lt_reboot_wdt() {
if (!lt_wdt_enable(1L))
return false;
while (1) {}
}
__attribute__((weak)) bool lt_reboot_download_mode() {
return false;
}
const char *lt_get_reboot_reason_name(lt_reboot_reason_t reason) {
if (!reason)
reason = lt_get_reboot_reason();
switch (reason) {
case RESET_REASON_POWER:
return "Power-On";
case RESET_REASON_BROWNOUT:
return "Brownout";
case RESET_REASON_HARDWARE:
return "HW Reboot";
case RESET_REASON_SOFTWARE:
return "SW Reboot";
case RESET_REASON_WATCHDOG:
return "WDT Reset";
case RESET_REASON_CRASH:
return "Crash";
case RESET_REASON_SLEEP:
return "Sleep Wakeup";
default:
return "Unknown";
}
}
__attribute__((weak)) void lt_gpio_recover() {
// nop by default
}
/*______ _ _
| ____| | | |
| |__ | | __ _ ___| |__
| __| | |/ _` / __| '_ \
| | | | (_| \__ \ | | |
|_| |_|\__,_|___/_| |*/
__attribute__((weak)) uint32_t lt_flash_get_size() {
lt_flash_id_t id = lt_flash_get_id();
if (id.chip_size_id >= 0x14 && id.chip_size_id <= 0x19) {
return (1 << id.chip_size_id);
}
#ifdef FLASH_LENGTH
return FLASH_LENGTH;
#else
return 0;
#endif
}
bool lt_flash_erase(uint32_t offset, size_t length) {
return fal_partition_erase(fal_root_part, offset, length) >= 0;
}
bool lt_flash_erase_block(uint32_t offset) {
return fal_partition_erase(fal_root_part, offset, 1) >= 0;
}
bool lt_flash_read(uint32_t offset, uint8_t *data, size_t length) {
return fal_partition_write(fal_root_part, offset, data, length) == length;
}
bool lt_flash_write(uint32_t offset, uint8_t *data, size_t length) {
return fal_partition_read(fal_root_part, offset, data, length) == length;
}
/*__ __
| \/ |
| \ / | ___ _ __ ___ ___ _ __ _ _
| |\/| |/ _ \ '_ ` _ \ / _ \| '__| | | |
| | | | __/ | | | | | (_) | | | |_| |
|_| |_|\___|_| |_| |_|\___/|_| \__, |
__/ |
|__*/
#if LT_HAS_FREERTOS
__attribute__((weak)) uint32_t lt_get_heap_size() {
return configTOTAL_HEAP_SIZE;
}
__attribute__((weak)) uint32_t lt_get_heap_free() {
return xPortGetFreeHeapSize();
}
__attribute__((weak)) uint32_t lt_get_heap_min_free() {
return xPortGetMinimumEverFreeHeapSize();
}
#endif
__attribute__((weak)) uint32_t lt_get_heap_max_alloc() {
return 0;
}
/* ____ _______
/ __ \__ __|/\
| | | | | | / \
| | | | | | / /\ \
| |__| | | |/ ____ \
\____/ |_/_/ \*/
bool lt_ota_can_rollback() {
if (lt_ota_get_type() != OTA_TYPE_DUAL)
return false;
uint8_t current = lt_ota_dual_get_current();
return lt_ota_is_valid(current ^ 0b11);
}
uf2_ota_scheme_t lt_ota_get_uf2_scheme() {
if (lt_ota_get_type() == OTA_TYPE_SINGLE)
return UF2_SCHEME_DEVICE_SINGLE;
uint8_t current = lt_ota_dual_get_current();
// UF2_SCHEME_DEVICE_DUAL_1 or UF2_SCHEME_DEVICE_DUAL_2
return (uf2_ota_scheme_t)(current ^ 0b11);
}
/*_ _ _ _ _
| | | | | (_) |
| | | | |_ _| |___
| | | | __| | / __|
| |__| | |_| | \__ \
\____/ \__|_|_|__*/
void lt_rand_bytes(uint8_t *buf, size_t len) {
int *data = (int *)buf;
size_t i;
for (i = 0; len >= sizeof(int); len -= sizeof(int)) {
data[i++] = rand();
}
if (len) {
int rem = rand();
unsigned char *pRem = (unsigned char *)&rem;
memcpy(buf + i * sizeof(int), pRem, len);
}
}
void hexdump(const uint8_t *buf, size_t len, uint32_t offset, uint8_t width) {
uint16_t pos = 0;
while (pos < len) {
// print hex offset
printf("%06lx ", offset + pos);
// calculate current line width
uint8_t lineWidth = MIN(width, len - pos);
// print hexadecimal representation
for (uint8_t i = 0; i < lineWidth; i++) {
if (i % 8 == 0) {
printf(" ");
}
printf("%02x ", buf[pos + i]);
}
// print ascii representation
printf(" |");
for (uint8_t i = 0; i < lineWidth; i++) {
char c = buf[pos + i];
putchar((c >= 0x20 && c <= 0x7f) ? c : '.');
}
puts("|\r");
pos += lineWidth;
}
}
/*_ __ _ _ _
\ \ / / | | | | | |
\ \ /\ / /_ _| |_ ___| |__ __| | ___ __ _
\ \/ \/ / _` | __/ __| '_ \ / _` |/ _ \ / _` |
\ /\ / (_| | || (__| | | | (_| | (_) | (_| |
\/ \/ \__,_|\__\___|_| |_|\__,_|\___/ \__, |
__/ |
|___*/
__attribute__((weak)) bool lt_wdt_enable(uint32_t timeout) {
return false;
}
__attribute__((weak)) void lt_wdt_disable() {}
__attribute__((weak)) void lt_wdt_feed() {}

24
cores/common/base/lt_api.h Normal file
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@@ -0,0 +1,24 @@
/* Copyright (c) Kuba Szczodrzyński 2023-03-09. */
#pragma once
// This file collects all LibreTuya C API includes.
// The functions are implemented in lt_api.c, which is located
// in the common core, and in the family cores.
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
#include "api/lt_cpu.h"
#include "api/lt_device.h"
#include "api/lt_flash.h"
#include "api/lt_init.h"
#include "api/lt_mem.h"
#include "api/lt_ota.h"
#include "api/lt_utils.h"
#include "api/lt_wdt.h"
#ifdef __cplusplus
} // extern "C"
#endif

35
cores/common/base/lt_chip.h
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@@ -1,35 +0,0 @@
/* Copyright (c) Kuba Szczodrzyński 2022-05-28. */
#pragma once
#define CHIP_TYPE(family, chip_id) (((family >> 24) << 8) | chip_id)
#define CHIP_TYPE_ENUM(family, chip_id) (ChipType) CHIP_TYPE(family, chip_id)
typedef enum {
// used in UF2 Family ID
F_RTL8710A = 0x9FFFD543, // Realtek Ameba1
F_RTL8710B = 0x22E0D6FC, // Realtek AmebaZ (realtek-ambz)
F_RTL8720C = 0xE08F7564, // Realtek AmebaZ2
F_RTL8720D = 0x3379CFE2, // Realtek AmebaD
F_BK7231U = 0x675A40B0, // Beken 7231U/7231T
F_BK7231N = 0x7B3EF230, // Beken 7231N
F_BK7251 = 0x6A82CC42, // Beken 7251/7252
F_BL60X = 0xDE1270B7, // Boufallo 602
} ChipFamily;
typedef enum {
// Realtek AmebaZ
// IDs copied from rtl8710b_efuse.h
RTL8710BL = CHIP_TYPE(F_RTL8710B, 0xE0), // ???
RTL8710BN = CHIP_TYPE(F_RTL8710B, 0xFF), // CHIPID_8710BN / QFN32
RTL8710BU = CHIP_TYPE(F_RTL8710B, 0xFE), // CHIPID_8710BU / QFN48
RTL8710BX = CHIP_TYPE(F_RTL8710B, 0xF6), // found on an actual RTL8710BX
RTL8710L0 = CHIP_TYPE(F_RTL8710B, 0xFB), // CHIPID_8710BN_L0 / QFN32
RTL8711BN = CHIP_TYPE(F_RTL8710B, 0xFD), // CHIPID_8711BN / QFN48
RTL8711BU = CHIP_TYPE(F_RTL8710B, 0xFC), // CHIPID_8711BG / QFN68
// Beken 72XX
BK7231T = CHIP_TYPE(F_BK7231U, 0x1A), // *SCTRL_CHIP_ID = 0x7231a
BK7231N = CHIP_TYPE(F_BK7231N, 0x1C), // *SCTRL_CHIP_ID = 0x7231c
BL2028N = CHIP_TYPE(F_BK7231N, 0x1C), // *SCTRL_CHIP_ID = 0x7231c
BK7252 = CHIP_TYPE(F_BK7251, 0x00), // TODO
} ChipType;

55
cores/common/base/lt_common_api.c
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@@ -1,55 +0,0 @@
/* Copyright (c) Kuba Szczodrzyński 2022-04-29. */
#include "lt_common_api.h"
/**
* @brief Generate random bytes using rand().
*
* @param buf destination pointer
* @param len how many bytes to generate
*/
void lt_rand_bytes(uint8_t *buf, size_t len) {
int *data = (int *)buf;
size_t i;
for (i = 0; len >= sizeof(int); len -= sizeof(int)) {
data[i++] = rand();
}
if (len) {
int rem = rand();
unsigned char *pRem = (unsigned char *)&rem;
memcpy(buf + i * sizeof(int), pRem, len);
}
}
/**
* @brief Print data pointed to by buf in hexdump-like format (hex+ASCII).
*
* @param buf source pointer
* @param len how many bytes to print
* @param offset increment printed offset by this value
* @param width how many bytes on a line
*/
void hexdump(const uint8_t *buf, size_t len, uint32_t offset, uint8_t width) {
uint16_t pos = 0;
while (pos < len) {
// print hex offset
printf("%06lx ", offset + pos);
// calculate current line width
uint8_t lineWidth = MIN(width, len - pos);
// print hexadecimal representation
for (uint8_t i = 0; i < lineWidth; i++) {
if (i % 8 == 0) {
printf(" ");
}
printf("%02x ", buf[pos + i]);
}
// print ascii representation
printf(" |");
for (uint8_t i = 0; i < lineWidth; i++) {
char c = buf[pos + i];
putchar((c >= 0x20 && c <= 0x7f) ? c : '.');
}
puts("|\r");
pos += lineWidth;
}
}

2
cores/common/base/lt_main.c
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@@ -20,7 +20,7 @@ int lt_main(void) {
// initialize C library
__libc_init_array();
// inform about the reset reason
LT_I("Reset reason: %u", lt_get_reset_reason());
LT_I("Reset reason: %u", lt_get_reboot_reason());
// initialize FAL
fal_init();
// provide root partition

86
cores/common/base/lt_types.h
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@@ -1,15 +1,79 @@
/* Copyright (c) Kuba Szczodrzyński 2023-02-27. */
/* Copyright (c) Kuba Szczodrzyński 2022-05-28. */
#pragma once
#include <stdint.h>
#define CPU_MODEL(family, chip_id) (((family >> 24) << 8) | chip_id)
#define CPU_MODEL_ENUM(family, chip_id) (lt_cpu_model_t) CPU_MODEL(family, chip_id)
#define RESET_REASON_UNKNOWN REBOOT_REASON_UNKNOWN
#define RESET_REASON_POWER REBOOT_REASON_POWER
#define RESET_REASON_BROWNOUT REBOOT_REASON_BROWNOUT
#define RESET_REASON_HARDWARE REBOOT_REASON_HARDWARE
#define RESET_REASON_SOFTWARE REBOOT_REASON_SOFTWARE
#define RESET_REASON_WATCHDOG REBOOT_REASON_WATCHDOG
#define RESET_REASON_CRASH REBOOT_REASON_CRASH
#define RESET_REASON_SLEEP REBOOT_REASON_SLEEP
#define RESET_REASON_MAX REBOOT_REASON_MAX
typedef enum {
RESET_REASON_UNKNOWN = 0,
RESET_REASON_POWER = 1,
RESET_REASON_BROWNOUT = 2,
RESET_REASON_HARDWARE = 3,
RESET_REASON_SOFTWARE = 4,
RESET_REASON_WATCHDOG = 5,
RESET_REASON_CRASH = 6,
RESET_REASON_SLEEP = 7,
RESET_REASON_MAX = 8,
} ResetReason;
F_RTL8710A = 0x9FFFD543, // Realtek Ameba1
F_RTL8710B = 0x22E0D6FC, // Realtek AmebaZ (realtek-ambz)
F_RTL8720C = 0xE08F7564, // Realtek AmebaZ2
F_RTL8720D = 0x3379CFE2, // Realtek AmebaD
F_BK7231U = 0x675A40B0, // Beken 7231U/7231T
F_BK7231N = 0x7B3EF230, // Beken 7231N
F_BK7251 = 0x6A82CC42, // Beken 7251/7252
F_BL60X = 0xDE1270B7, // Boufallo 602
} lt_cpu_family_t;
typedef enum {
// Realtek AmebaZ
// IDs copied from rtl8710b_efuse.h
RTL8710BL = CPU_MODEL(F_RTL8710B, 0xE0), // ???
RTL8710BN = CPU_MODEL(F_RTL8710B, 0xFF), // CHIPID_8710BN / QFN32
RTL8710BU = CPU_MODEL(F_RTL8710B, 0xFE), // CHIPID_8710BU / QFN48
RTL8710BX = CPU_MODEL(F_RTL8710B, 0xF6), // found on an actual RTL8710BX
RTL8710L0 = CPU_MODEL(F_RTL8710B, 0xFB), // CHIPID_8710BN_L0 / QFN32
RTL8711BN = CPU_MODEL(F_RTL8710B, 0xFD), // CHIPID_8711BN / QFN48
RTL8711BU = CPU_MODEL(F_RTL8710B, 0xFC), // CHIPID_8711BG / QFN68
// Beken 72XX
BK7231T = CPU_MODEL(F_BK7231U, 0x1A), // *SCTRL_CHIP_ID = 0x7231a
BK7231N = CPU_MODEL(F_BK7231N, 0x1C), // *SCTRL_CHIP_ID = 0x7231c
BL2028N = CPU_MODEL(F_BK7231N, 0x1C), // *SCTRL_CHIP_ID = 0x7231c
BK7252 = CPU_MODEL(F_BK7251, 0x00), // TODO
} lt_cpu_model_t;
/**
* @brief Reset reason enumeration.
*/
typedef enum {
REBOOT_REASON_UNKNOWN = 1,
REBOOT_REASON_POWER = 2,
REBOOT_REASON_BROWNOUT = 3,
REBOOT_REASON_HARDWARE = 4,
REBOOT_REASON_SOFTWARE = 5,
REBOOT_REASON_WATCHDOG = 6,
REBOOT_REASON_CRASH = 7,
REBOOT_REASON_SLEEP = 8,
REBOOT_REASON_MAX = 9,
} lt_reboot_reason_t;
/**
* @brief Flash chip ID structure.
*/
typedef struct {
uint8_t manufacturer_id;
uint8_t chip_id;
uint8_t chip_size_id;
} lt_flash_id_t;
/**
* @brief Chip's OTA type enumeration.
*/
typedef enum {
OTA_TYPE_SINGLE = 0,
OTA_TYPE_DUAL = 1,
OTA_TYPE_FILE = 2,
} lt_ota_type_t;