Update project structure

boards/wr3.json

@@ -1,9 +1,13 @@
 {
 	"build": {
 		"mcu": "rtl8710bn",
+		"family": "rtl8710",
+		"variant": "wr3",
+		"ldscript_sdk": "rlx8711B-symbol-v02-img2_xip1_2M.ld",
 		"f_cpu": "125000000L",
 		"amb_ota1_offset": "0x0800B000",
-		"amb_ota2_offset": "0x080D0000"
+		"amb_ota2_offset": "0x080D0000",
+		"amb_boot_all": "boot_all.bin"
 	},
 	"frameworks": [
 		"realtek-ambz-sdk"

boards/wr3/bin/descript.ion

@@ -0,0 +1 @@
+boot_all.bin tysdk_for_rtl8710bn

boards/wr3/ld/rlx8711B-symbol-v02-img2_xip1.ld

@@ -0,0 +1,157 @@
+
+
+ENTRY(Reset_Handler)
+
+INCLUDE "export-rom_symbol_v01.txt"
+
+MEMORY
+{
+	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
+	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
+	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
+	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x2B000	/* MAIN RAM: 228 */
+	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
+	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
+
+	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 32k, 32 Bytes resvd for header*/
+	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
+	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
+	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0x75000-0x20	/* XIP1: 468k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x08080000+0x20, LENGTH = 0x75000-0x20	/* XIP2: 468k, 32 Bytes resvd for header */
+}
+
+
+
+SECTIONS
+{
+	.rom.text : { } > ROM
+	.rom.rodata : { } > ROM
+	.hal.rom.bss : { } > ROMBSS_RAM
+
+	/* image1 entry, this section should in RAM and fixed address for ROM */
+	.ram_image1.entry :
+	{
+		__ram_image1_text_start__ = .;
+		__ram_start_table_start__ = .;
+		KEEP(*(SORT(.image1.entry.data*)))
+		__ram_start_table_end__ = .;
+
+		__image1_validate_code__ = .;
+		KEEP(*(.image1.validate.rodata*))
+		KEEP(*(.image1.export.symb*))
+	} > BOOTLOADER_RAM
+
+	/*  Add . to assign the start address of the section */ 
+	/*  to prevent the change of the start address by ld doing section alignment */  
+	.ram_image1.text . :
+	{
+		/* image1 text */
+		*(.boot.ram.text*)    
+		*(.boot.rodata*)
+	} > BOOTLOADER_RAM
+
+	.ram_image1.data . :
+	{
+		__ram_image1_data_start__ = .;
+		KEEP(*(.boot.ram.data*))
+		__ram_image1_data_end__ = .;
+	
+		__ram_image1_text_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image1.bss . :
+	{
+		__image1_bss_start__ = .;
+		KEEP(*(.boot.ram.bss*))
+		KEEP(*(.boot.ram.end.bss*))
+		__image1_bss_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image2.entry :
+	{
+		__ram_image2_text_start__ = .;
+		__image2_entry_func__ = .;
+		KEEP(*(SORT(.image2.entry.data*)))
+
+		__image2_validate_code__ = .;
+		KEEP(*(.image2.validate.rodata*)) 
+
+	} > BD_RAM
+
+	.ram_image2.text :
+	{
+	  KEEP(*(.image2.ram.text*))
+	} > BD_RAM
+
+	.ram_image2.data : 
+	{
+		__data_start__ = .;
+		*(.data*)
+		__data_end__ = .;
+		__ram_image2_text_end__ = .;
+		. = ALIGN(16);	
+	} > BD_RAM
+  
+	.ram_image2.bss :
+	{
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+	} > BD_RAM
+
+	.ram_image2.skb.bss :
+	{
+		*(.bdsram.data*)
+		__bss_end__ = .;
+	} > BD_RAM
+
+	.ram_heap.data : 
+	{
+		*(.bfsram.data*)
+		*(.heap.stdlib*)
+	
+	} > BD_RAM
+
+	.ram_rdp.text : 
+	{
+		__rom_top_4k_start_ = .;
+		__rdp_text_start__ = .;
+		KEEP(*(.rdp.ram.text*))
+		KEEP(*(.rdp.ram.data*))
+		__rdp_text_end__ = .;
+		. = ALIGN(16);
+	
+	} > RDP_RAM
+
+	.xip_image1.text :
+	{
+		__flash_boot_text_start__ = .;
+
+		*(.flashboot.text*)
+
+		__flash_boot_text_end__ = .;
+
+		. = ALIGN(16);
+	} > XIPBOOT
+
+	.xip_image2.text : 
+	{
+		__flash_text_start__ = .;
+
+		*(.img2_custom_signature*)
+
+		*(.text*)    
+		*(.rodata*)
+		*(.debug_trace*)
+
+		__flash_text_end__ = .;
+	
+		. = ALIGN (16);
+	} > XIP1
+}
+
+SECTIONS 
+{ 
+	/* Bootloader symbol list */  
+  boot_export_symbol = 0x10002020;  
+} 

boards/wr3/ld/rlx8711B-symbol-v02-img2_xip1_2M.ld

@@ -0,0 +1,157 @@
+
+
+ENTRY(Reset_Handler)
+
+INCLUDE "export-rom_symbol_v01.txt"
+
+MEMORY
+{
+	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
+	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
+	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
+	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x39000	/* MAIN RAM: 228 */
+	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
+	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
+
+	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 32k, 32 Bytes resvd for header*/
+	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
+	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
+	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xC5000-0x20	/* XIP1: 2*468k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x080D0000+0x20, LENGTH = 0xC5000-0x20	/* XIP2: 2*468k, 32 Bytes resvd for header */
+}
+
+
+
+SECTIONS
+{
+	.rom.text : { } > ROM
+	.rom.rodata : { } > ROM
+	.hal.rom.bss : { } > ROMBSS_RAM
+
+	/* image1 entry, this section should in RAM and fixed address for ROM */
+	.ram_image1.entry :
+	{
+		__ram_image1_text_start__ = .;
+		__ram_start_table_start__ = .;
+		KEEP(*(SORT(.image1.entry.data*)))
+		__ram_start_table_end__ = .;
+
+		__image1_validate_code__ = .;
+		KEEP(*(.image1.validate.rodata*))
+		KEEP(*(.image1.export.symb*))
+	} > BOOTLOADER_RAM
+
+	/*  Add . to assign the start address of the section */ 
+	/*  to prevent the change of the start address by ld doing section alignment */  
+	.ram_image1.text . :
+	{
+		/* image1 text */
+		*(.boot.ram.text*)    
+		*(.boot.rodata*)
+	} > BOOTLOADER_RAM
+
+	.ram_image1.data . :
+	{
+		__ram_image1_data_start__ = .;
+		KEEP(*(.boot.ram.data*))
+		__ram_image1_data_end__ = .;
+	
+		__ram_image1_text_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image1.bss . :
+	{
+		__image1_bss_start__ = .;
+		KEEP(*(.boot.ram.bss*))
+		KEEP(*(.boot.ram.end.bss*))
+		__image1_bss_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image2.entry :
+	{
+		__ram_image2_text_start__ = .;
+		__image2_entry_func__ = .;
+		KEEP(*(SORT(.image2.entry.data*)))
+
+		__image2_validate_code__ = .;
+		KEEP(*(.image2.validate.rodata*)) 
+
+	} > BD_RAM
+
+	.ram_image2.text :
+	{
+	  KEEP(*(.image2.ram.text*))
+	} > BD_RAM
+
+	.ram_image2.data : 
+	{
+		__data_start__ = .;
+		*(.data*)
+		__data_end__ = .;
+		__ram_image2_text_end__ = .;
+		. = ALIGN(16);	
+	} > BD_RAM
+  
+	.ram_image2.bss :
+	{
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+	} > BD_RAM
+
+	.ram_image2.skb.bss :
+	{
+		*(.bdsram.data*)
+		__bss_end__ = .;
+	} > BD_RAM
+
+	.ram_heap.data : 
+	{
+		*(.bfsram.data*)
+		*(.heap.stdlib*)
+	
+	} > BD_RAM
+
+	.ram_rdp.text : 
+	{
+		__rom_top_4k_start_ = .;
+		__rdp_text_start__ = .;
+		KEEP(*(.rdp.ram.text*))
+		KEEP(*(.rdp.ram.data*))
+		__rdp_text_end__ = .;
+		. = ALIGN(16);
+	
+	} > RDP_RAM
+
+	.xip_image1.text :
+	{
+		__flash_boot_text_start__ = .;
+
+		*(.flashboot.text*)
+
+		__flash_boot_text_end__ = .;
+
+		. = ALIGN(16);
+	} > XIPBOOT
+
+	.xip_image2.text : 
+	{
+		__flash_text_start__ = .;
+
+		*(.img2_custom_signature*)
+
+		*(.text*)    
+		*(.rodata*)
+		*(.debug_trace*)
+
+		__flash_text_end__ = .;
+	
+		. = ALIGN (16);
+	} > XIP1
+}
+
+SECTIONS 
+{ 
+	/* Bootloader symbol list */  
+  boot_export_symbol = 0x10002020;  
+} 

boards/wr3/ld/rlx8711B-symbol-v02-img2_xip2.ld

@@ -0,0 +1,157 @@
+
+
+ENTRY(Reset_Handler)
+
+INCLUDE "export-rom_symbol_v01.txt"
+
+MEMORY
+{
+	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
+	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
+	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
+	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x2B000	/* MAIN RAM: 228 */
+	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
+	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
+
+	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 32k, 32 Bytes resvd for header*/
+	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
+	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
+	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0x75000-0x20	/* XIP1: 468k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x08080000+0x20, LENGTH = 0x75000-0x20	/* XIP2: 468k, 32 Bytes resvd for header */
+}
+
+
+
+SECTIONS
+{
+	.rom.text : { } > ROM
+	.rom.rodata : { } > ROM
+	.hal.rom.bss : { } > ROMBSS_RAM
+
+	/* image1 entry, this section should in RAM and fixed address for ROM */
+	.ram_image1.entry :
+	{
+		__ram_image1_text_start__ = .;
+		__ram_start_table_start__ = .;
+		KEEP(*(SORT(.image1.entry.data*)))
+		__ram_start_table_end__ = .;
+
+		__image1_validate_code__ = .;
+		KEEP(*(.image1.validate.rodata*))
+		KEEP(*(.image1.export.symb*))
+	} > BOOTLOADER_RAM
+
+	/*  Add . to assign the start address of the section */ 
+	/*  to prevent the change of the start address by ld doing section alignment */  
+	.ram_image1.text . :
+	{
+		/* image1 text */
+		*(.boot.ram.text*)    
+		*(.boot.rodata*)
+	} > BOOTLOADER_RAM
+
+	.ram_image1.data . :
+	{
+		__ram_image1_data_start__ = .;
+		KEEP(*(.boot.ram.data*))
+		__ram_image1_data_end__ = .;
+	
+		__ram_image1_text_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image1.bss . :
+	{
+		__image1_bss_start__ = .;
+		KEEP(*(.boot.ram.bss*))
+		KEEP(*(.boot.ram.end.bss*))
+		__image1_bss_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image2.entry :
+	{
+		__ram_image2_text_start__ = .;
+		__image2_entry_func__ = .;
+		KEEP(*(SORT(.image2.entry.data*)))
+
+		__image2_validate_code__ = .;
+		KEEP(*(.image2.validate.rodata*)) 
+
+	} > BD_RAM
+
+	.ram_image2.text :
+	{
+	  KEEP(*(.image2.ram.text*))
+	} > BD_RAM
+
+	.ram_image2.data : 
+	{
+		__data_start__ = .;
+		*(.data*)
+		__data_end__ = .;
+		__ram_image2_text_end__ = .;
+		. = ALIGN(16);	
+	} > BD_RAM
+  
+	.ram_image2.bss :
+	{
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+	} > BD_RAM
+
+	.ram_image2.skb.bss :
+	{
+		*(.bdsram.data*)
+		__bss_end__ = .;
+	} > BD_RAM
+
+	.ram_heap.data : 
+	{
+		*(.bfsram.data*)
+		*(.heap.stdlib*)
+	
+	} > BD_RAM
+
+	.ram_rdp.text : 
+	{
+		__rom_top_4k_start_ = .;
+		__rdp_text_start__ = .;
+		KEEP(*(.rdp.ram.text*))
+		KEEP(*(.rdp.ram.data*))
+		__rdp_text_end__ = .;
+		. = ALIGN(16);
+	
+	} > RDP_RAM
+
+	.xip_image1.text :
+	{
+		__flash_boot_text_start__ = .;
+
+		*(.flashboot.text*)
+
+		__flash_boot_text_end__ = .;
+
+		. = ALIGN(16);
+	} > XIPBOOT
+
+	.xip_image2.text : 
+	{
+		__flash_text_start__ = .;
+
+		*(.img2_custom_signature*)
+
+		*(.text*)    
+		*(.rodata*)
+		*(.debug_trace*)
+
+		__flash_text_end__ = .;
+	
+		. = ALIGN (16);
+	} > XIP2
+}
+
+SECTIONS 
+{ 
+	/* Bootloader symbol list */  
+  boot_export_symbol = 0x10002020;  
+} 

boards/wr3/ld/rlx8711B-symbol-v02-img2_xip2_2M.ld

@@ -0,0 +1,157 @@
+
+
+ENTRY(Reset_Handler)
+
+INCLUDE "export-rom_symbol_v01.txt"
+
+MEMORY
+{
+	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
+	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
+	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
+	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x39000	/* MAIN RAM: 228 */
+	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
+	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
+
+	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 32k, 32 Bytes resvd for header*/
+	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
+	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
+	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xC5000-0x20	/* XIP1: 2*468k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x080D0000+0x20, LENGTH = 0xC5000-0x20	/* XIP2: 2*468k, 32 Bytes resvd for header */
+}
+
+
+
+SECTIONS
+{
+	.rom.text : { } > ROM
+	.rom.rodata : { } > ROM
+	.hal.rom.bss : { } > ROMBSS_RAM
+
+	/* image1 entry, this section should in RAM and fixed address for ROM */
+	.ram_image1.entry :
+	{
+		__ram_image1_text_start__ = .;
+		__ram_start_table_start__ = .;
+		KEEP(*(SORT(.image1.entry.data*)))
+		__ram_start_table_end__ = .;
+
+		__image1_validate_code__ = .;
+		KEEP(*(.image1.validate.rodata*))
+		KEEP(*(.image1.export.symb*))
+	} > BOOTLOADER_RAM
+
+	/*  Add . to assign the start address of the section */ 
+	/*  to prevent the change of the start address by ld doing section alignment */  
+	.ram_image1.text . :
+	{
+		/* image1 text */
+		*(.boot.ram.text*)    
+		*(.boot.rodata*)
+	} > BOOTLOADER_RAM
+
+	.ram_image1.data . :
+	{
+		__ram_image1_data_start__ = .;
+		KEEP(*(.boot.ram.data*))
+		__ram_image1_data_end__ = .;
+	
+		__ram_image1_text_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image1.bss . :
+	{
+		__image1_bss_start__ = .;
+		KEEP(*(.boot.ram.bss*))
+		KEEP(*(.boot.ram.end.bss*))
+		__image1_bss_end__ = .;
+	} > BOOTLOADER_RAM
+
+	.ram_image2.entry :
+	{
+		__ram_image2_text_start__ = .;
+		__image2_entry_func__ = .;
+		KEEP(*(SORT(.image2.entry.data*)))
+
+		__image2_validate_code__ = .;
+		KEEP(*(.image2.validate.rodata*)) 
+
+	} > BD_RAM
+
+	.ram_image2.text :
+	{
+	  KEEP(*(.image2.ram.text*))
+	} > BD_RAM
+
+	.ram_image2.data : 
+	{
+		__data_start__ = .;
+		*(.data*)
+		__data_end__ = .;
+		__ram_image2_text_end__ = .;
+		. = ALIGN(16);	
+	} > BD_RAM
+  
+	.ram_image2.bss :
+	{
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+	} > BD_RAM
+
+	.ram_image2.skb.bss :
+	{
+		*(.bdsram.data*)
+		__bss_end__ = .;
+	} > BD_RAM
+
+	.ram_heap.data : 
+	{
+		*(.bfsram.data*)
+		*(.heap.stdlib*)
+	
+	} > BD_RAM
+
+	.ram_rdp.text : 
+	{
+		__rom_top_4k_start_ = .;
+		__rdp_text_start__ = .;
+		KEEP(*(.rdp.ram.text*))
+		KEEP(*(.rdp.ram.data*))
+		__rdp_text_end__ = .;
+		. = ALIGN(16);
+	
+	} > RDP_RAM
+
+	.xip_image1.text :
+	{
+		__flash_boot_text_start__ = .;
+
+		*(.flashboot.text*)
+
+		__flash_boot_text_end__ = .;
+
+		. = ALIGN(16);
+	} > XIPBOOT
+
+	.xip_image2.text : 
+	{
+		__flash_text_start__ = .;
+
+		*(.img2_custom_signature*)
+
+		*(.text*)    
+		*(.rodata*)
+		*(.debug_trace*)
+
+		__flash_text_end__ = .;
+	
+		. = ALIGN (16);
+	} > XIP2
+}
+
+SECTIONS 
+{ 
+	/* Bootloader symbol list */  
+  boot_export_symbol = 0x10002020;  
+} 

builder/frameworks/realtek-ambz-sdk.py

@@ -5,18 +5,21 @@ env = DefaultEnvironment()
 platform = env.PioPlatform()
 board = env.BoardConfig()
 
+mcu = board.get("build.mcu").upper()
+family = board.get("build.family").upper()
+variant = board.get("build.variant")
+ldscript = board.get("build.ldscript_sdk")
+
 SDK_DIR = platform.get_package_dir("framework-realtek-amb1")
+BOARD_DIR = join(platform.get_dir(), "boards", variant)
+FIXUPS_DIR = join(platform.get_dir(), "fixups", "realtek-ambz")
 assert isdir(SDK_DIR)
+assert isdir(env.subst(BOARD_DIR))
+assert isdir(env.subst(FIXUPS_DIR))
 
 ota1_offset = board.get("build.amb_ota1_offset")
 ota2_offset = board.get("build.amb_ota2_offset")
-
+boot_all = board.get("build.amb_boot_all")
-# Firmware name
-if env.get("PROGNAME", "program") == "program":
-    env.Replace(PROGNAME="firmware")
-env.Replace(
-    PROGSUFFIX=".elf",
-)
 
 # Outputs
 env.Replace(
@@ -38,7 +41,8 @@ env.Replace(
 
 # Flags
 env.Replace(
-    CCFLAGS=[
+    CFLAGS=[
+        "-std=gnu99",
         "-mcpu=cortex-m4",
         "-mthumb",
         "-mfloat-abi=hard",
@@ -47,19 +51,19 @@ env.Replace(
         "-w",
         "-O2",
         "-Wno-pointer-sign",
-        "-fno-common",
-        "-fmessage-length=0",
-        "-ffunction-sections",
         "-fdata-sections",
-        "-fomit-frame-pointer",
+        "-ffunction-sections",
+        "-fmessage-length=0",
+        "-fno-common",
         "-fno-short-enums",
-        "-std=gnu99",
+        "-fomit-frame-pointer",
         "-fsigned-char",
     ],
     CPPDEFINES=[
         "M3",
         "CONFIG_PLATFORM_8711B",
         ("F_CPU", "166000000L"),
+        ("LWIP_TIMEVAL_PRIVATE", "0"),
     ],
     LINKFLAGS=[
         "-mcpu=cortex-m4",
@@ -169,18 +173,12 @@ sources = [
     # app uart_adapter
     "+<" + SDK_DIR +"/component/common/application/uart_adapter/uart_adapter.c>",
     # cmsis
-    "+<" + SDK_DIR +"/component/soc/realtek/8711b/cmsis/device/app_start.c>",
+    # NOTE: a fixup is used instead, to remove default main()
+    # "+<" + SDK_DIR +"/component/soc/realtek/8711b/cmsis/device/app_start.c>",
     "+<" + SDK_DIR +"/component/soc/realtek/8711b/fwlib/ram_lib/startup.c>",
     "+<" + SDK_DIR +"/component/soc/realtek/8711b/cmsis/device/system_8195a.c>",
     # console
-    # "+<" + SDK_DIR +"/component/common/api/at_cmd/atcmd_lwip.c>",
+    "+<" + SDK_DIR +"/component/soc/realtek/8711b/app/monitor/ram/rtl_trace.c>",
-    # "+<" + SDK_DIR +"/component/common/api/at_cmd/atcmd_sys.c>",
-    # "+<" + SDK_DIR +"/component/common/api/at_cmd/atcmd_wifi.c>",
-    # "+<" + SDK_DIR +"/component/common/api/at_cmd/log_service.c>",
-    # "+<" + SDK_DIR +"/component/soc/realtek/8711b/app/monitor/ram/low_level_io.c>",
-    # "+<" + SDK_DIR +"/component/soc/realtek/8711b/app/monitor/ram/monitor.c>",
-    "+<" + SDK_DIR +"/component/soc/realtek/8711b/app/monitor/ram/rtl_consol.c>",
-    # "+<" + SDK_DIR +"/component/soc/realtek/8711b/app/monitor/ram/rtl_trace.c>",
     # network api wifi rtw_wpa_supplicant
     "+<" + SDK_DIR +"/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c>",
     "+<" + SDK_DIR +"/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_p2p_config.c>",
@@ -349,36 +347,6 @@ sources = [
     "+<" + SDK_DIR +"/component/soc/realtek/8711b/misc/rtl8710b_ota.c>",
     "+<" + SDK_DIR +"/component/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_pinmapcfg.c>",
     "+<" + SDK_DIR +"/component/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_sleepcfg.c>",
-    # utilities example
-    # "+<" + SDK_DIR +"/component/common/example/bcast/example_bcast.c>",
-    # "+<" + SDK_DIR +"/component/common/example/dct/example_dct.c>",
-    # "+<" + SDK_DIR +"/component/common/example/eap/example_eap.c>",
-    # "+<" + SDK_DIR +"/component/common/example/example_entry.c>",
-    # "+<" + SDK_DIR +"/component/common/example/get_beacon_frame/example_get_beacon_frame.c>",
-    # "+<" + SDK_DIR +"/component/common/example/high_load_memory_use/example_high_load_memory_use.c>",
-    # "+<" + SDK_DIR +"/component/common/example/http_client/example_http_client.c>",
-    # "+<" + SDK_DIR +"/component/common/example/httpc/example_httpc.c>",
-    # "+<" + SDK_DIR +"/component/common/example/httpd/example_httpd.c>",
-    # "+<" + SDK_DIR +"/component/common/example/http_download/example_http_download.c>",
-    # "+<" + SDK_DIR +"/component/common/example/mcast/example_mcast.c>",
-    # "+<" + SDK_DIR +"/component/common/example/mdns/example_mdns.c>",
-    # "+<" + SDK_DIR +"/component/common/example/mqtt/example_mqtt.c>",
-    # "+<" + SDK_DIR +"/component/common/example/nonblock_connect/example_nonblock_connect.c>",
-    # "+<" + SDK_DIR +"/component/common/example/rarp/example_rarp.c>",
-    # "+<" + SDK_DIR +"/component/common/example/sntp_showtime/example_sntp_showtime.c>",
-    # "+<" + SDK_DIR +"/component/common/example/socket_select/example_socket_select.c>",
-    # "+<" + SDK_DIR +"/component/common/example/socket_tcp_trx/example_socket_tcp_trx_1.c>",
-    # "+<" + SDK_DIR +"/component/common/example/socket_tcp_trx/example_socket_tcp_trx_2.c>",
-    # "+<" + SDK_DIR +"/component/common/example/ssl_download/example_ssl_download.c>",
-    # "+<" + SDK_DIR +"/component/common/example/ssl_server/example_ssl_server.c>",
-    # "+<" + SDK_DIR +"/component/common/example/tcp_keepalive/example_tcp_keepalive.c>",
-    # "+<" + SDK_DIR +"/component/common/example/uart_atcmd/example_uart_atcmd.c>",
-    # "+<" + SDK_DIR +"/component/common/example/wifi_mac_monitor/example_wifi_mac_monitor.c>",
-    # "+<" + SDK_DIR +"/component/common/example/wlan_fast_connect/example_wlan_fast_connect.c>",
-    # "+<" + SDK_DIR +"/component/common/example/wlan_scenario/example_wlan_scenario.c>",
-    # "+<" + SDK_DIR +"/component/common/example/websocket/example_wsclient.c>",
-    # "+<" + SDK_DIR +"/component/common/example/xml/example_xml.c>",
-    # "+<" + SDK_DIR +"/component/common/example/uart_firmware_update/example_uart_update.c>",
     # network - httpc
     "+<" + SDK_DIR +"/component/common/network/httpc/httpc_tls.c>",
     # network - httpd
@@ -391,14 +359,22 @@ sources = [
     # fmt: on
 ]
 
+# Fixups
+sources += [
+    "+<" + FIXUPS_DIR + "/app_start_patch.c>",
+    "+<" + FIXUPS_DIR + "/cmsis_ipsr.c>",
+    "+<" + FIXUPS_DIR + "/log_uart.c>",
+    "+<" + FIXUPS_DIR + "/wifi_mode.c>",
+]
+
 # Libs & linker config
 env.Append(
     LIBPATH=[
         # fmt: off
         join(SDK_DIR, "component", "soc", "realtek", "8711b", "misc", "bsp", "lib", "common", "GCC"),
-        # linker script path
-        join(SDK_DIR, "project", "realtek_amebaz_va0_example", "GCC-RELEASE"),
         # fmt: on
+        # linker script path
+        join(BOARD_DIR, "ld"),
     ],
     LIBS=[
         "_platform",
@@ -418,9 +394,7 @@ env.Append(
 )
 env.Replace(
     LDSCRIPT_PATH=[
-        # fmt: off
+        join(BOARD_DIR, "ld", ldscript),
-        join(SDK_DIR, "project", "realtek_amebaz_va0_example", "GCC-RELEASE", "rlx8711B-symbol-v02-img2_xip1.ld"),
-        # fmt: on
     ],
 )
 
@@ -565,15 +539,20 @@ actions.append(env.VerboseAction(package_ota, "Packaging OTA image - $IMG_OTA"))
 actions.append(env.VerboseAction("true", f"- OTA1 flash offset: {ota1_offset}"))
 actions.append(env.VerboseAction("true", f"- OTA2 flash offset: {ota2_offset}"))
 
+# Clone env to ignore options from child projects
+envsdk = env.Clone()
+
 # SDK library target
-target_sdk = env.BuildLibrary(join("$BUILD_DIR", "SDK"), SDK_DIR, sources)
+target_sdk = envsdk.BuildLibrary(
+    join("$BUILD_DIR", "ambz_sdk"),
+    SDK_DIR,
+    sources,
+)
 target_boot = env.StaticLibrary(
     join("$BUILD_DIR", "boot_all"),
     env.BinToObj(
         join("$BUILD_DIR", "boot_all.o"),
-        # fmt: off
+        join(BOARD_DIR, "bin", boot_all),
-        join(SDK_DIR, "component", "soc", "realtek", "8711b", "misc", "bsp", "image", "boot_all.bin"),
-        # fmt: on
     ),
 )
 env.Prepend(LIBS=[target_sdk, target_boot])

builder/main.py

@@ -2,17 +2,22 @@ from SCons.Script import Default, DefaultEnvironment
 
 env = DefaultEnvironment()
 
+# Firmware name
+if env.get("PROGNAME", "program") == "program":
+    env.Replace(PROGNAME="firmware")
+env.Replace(PROGSUFFIX=".elf")
+
 env.Replace(
-    AR="arm-none-eabi-ar",
+    AR="arm-none-eabi-gcc-ar",
     AS="arm-none-eabi-gcc",
     CC="arm-none-eabi-gcc",
     CXX="arm-none-eabi-g++",
-    NM="arm-none-eabi-nm",
+    NM="arm-none-eabi-gcc-nm",
     LINK="arm-none-eabi-gcc",
     LD="arm-none-eabi-gcc",
     OBJCOPY="arm-none-eabi-objcopy",
     OBJDUMP="arm-none-eabi-objdump",
-    RANLIB="arm-none-eabi-ranlib",
+    # RANLIB="arm-none-eabi-gcc-ranlib",
     SIZETOOL="arm-none-eabi-size",
 )
 

fixups/realtek-ambz/app_start_patch.c

@@ -0,0 +1,118 @@
+/*
+ *  Routines to access hardware
+ *
+ *  Copyright (c) 2013 Realtek Semiconductor Corp.
+ *
+ *  This module is a confidential and proprietary property of RealTek and
+ *  possession or use of this module requires written permission of RealTek.
+ */
+
+// NOTE: this file has the default main() function removed.
+
+#include "ameba_soc.h"
+#include "build_info.h"
+
+#if (defined(CONFIG_POST_SIM))
+void Simulation_Init(void);
+#endif
+
+#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
+extern void init_rom_wlan_ram_map(void);
+extern VOID wlan_network(VOID);
+#endif
+
+#ifdef CONFIG_MBED_ENABLED
+extern void __libc_fini_array (void);
+extern void __libc_init_array (void);
+extern  void SVC_Handler (void);
+extern  void PendSV_Handler (void);
+extern  void SysTick_Handler (void);
+
+void APP_StartMbed(void)
+{
+	InterruptForOSInit((VOID*)SVC_Handler,
+		(VOID*)PendSV_Handler,
+		(VOID*)SysTick_Handler);
+	__asm (
+		"ldr   r0, =SystemInit\n"
+		"blx   r0\n"
+		"ldr   r0, =_start\n"
+		"bx    r0\n"
+	);
+
+	for(;;);
+
+}
+#endif
+
+void APP_InitTrace(void)
+{
+	u32 debug[4];
+
+#if (defined(CONFIG_POST_SIM) || defined(CONFIG_CP))
+	return;
+#endif
+
+	debug[LEVEL_ERROR] = BIT(MODULE_BOOT);
+	debug[LEVEL_WARN]  = 0x0;
+	debug[LEVEL_INFO]  = BIT(MODULE_BOOT);
+	debug[LEVEL_TRACE] = 0x0;
+
+#ifdef CONFIG_DEBUG_ERR_MSG
+	debug[LEVEL_ERROR] = 0xFFFFFFFF;
+#endif
+#ifdef CONFIG_DEBUG_WARN_MSG
+	debug[LEVEL_WARN] = 0xFFFFFFFF;
+#endif
+#ifdef CONFIG_DEBUG_INFO_MSG
+	debug[LEVEL_INFO] = 0xFFFFFFFF;
+#endif
+
+	LOG_MASK(debug);
+
+	DBG_PRINTF(MODULE_BOOT, LEVEL_INFO, "APP_InitTrace: %x:%x:%x:%x\n",debug[0], debug[1], debug[2], debug[3]);
+	DBG_PRINTF(MODULE_BOOT, LEVEL_ERROR, "APP_InitTrace: %x:%x:%x:%x\n",debug[0], debug[1], debug[2], debug[3]);
+
+}
+
+extern void main(void);
+
+// The Main App entry point
+void APP_Start(void)
+{
+#if CONFIG_SOC_PS_MODULE
+	SOCPS_InitSYSIRQ();
+#endif
+
+#ifdef CONFIG_KERNEL
+#ifdef PLATFORM_FREERTOS
+	InterruptForOSInit((VOID*)vPortSVCHandler,
+		(VOID*)xPortPendSVHandler,
+		(VOID*)xPortSysTickHandler);
+#endif
+#endif
+
+#ifdef CONFIG_MBED_ENABLED
+	APP_StartMbed();
+#else
+
+#if 0//def CONFIG_APP_DEMO
+#ifdef PLATFORM_FREERTOS
+	xTaskCreate( (TaskFunction_t)main, "MAIN_APP__TASK", (2048 /4), (void *)NULL, (tskIDLE_PRIORITY + 1), NULL);
+	vTaskStartScheduler();
+#endif
+#else
+#if defined ( __ICCARM__ )
+	__iar_cstart_call_ctors(NULL);
+#endif
+	// force SP align to 8 byte not 4 byte (initial SP is 4 byte align)
+	__asm( 
+		"mov r0, sp\n"
+		"bic r0, r0, #7\n" 
+		"mov sp, r0\n"
+	);
+
+	main();
+#endif // end of #if CONFIG_APP_DEMO
+#endif  // end of else of "#ifdef CONFIG_MBED_ENABLED"
+}

fixups/realtek-ambz/cmsis_ipsr.c

@@ -0,0 +1,9 @@
+#include <stdint.h>
+
+// for some reason, cmsis_os.c does not link properly when this method is inlined in core_cmFunc.h
+// (or I am too stupid to understand this)
+__attribute__((weak)) uint32_t __get_IPSR()
+{
+	uint32_t result;
+    asm volatile ("MRS %0, ipsr" : "=r" (result) );
+}

fixups/realtek-ambz/log_uart.c

@@ -0,0 +1,28 @@
+#include "ameba_soc.h"
+#include "osdep_service.h"
+
+// usage:
+// extern int LOGUART_SetBaud(uint32_t BaudRate);
+
+int LOGUART_SetBaud(uint32_t BaudRate)
+{
+	UART_INTConfig(UART2_DEV, RUART_IER_ERBI | RUART_IER_ELSI, DISABLE);
+	UART_RxCmd(UART2_DEV, DISABLE);
+
+	UART_SetBaud(UART2_DEV, BaudRate);
+
+	UART_INTConfig(UART2_DEV, RUART_IER_ERBI | RUART_IER_ELSI, ENABLE);
+	UART_RxCmd(UART2_DEV, ENABLE);
+
+	return 1;
+}
+
+void LOGUART_SetBaud_FromFlash(void)
+{
+	// useless, nop
+}
+
+void ReRegisterPlatformLogUart(void)
+{
+	// useless, nop
+}

fixups/realtek-ambz/wifi_mode.c

@@ -0,0 +1,4 @@
+#include <wifi_conf.h>
+
+// wifi_mode is declared in atcmd_wifi.c, which is a part of the built-in trash console
+rtw_mode_t wifi_mode = RTW_MODE_STA;

platform.json

@@ -23,7 +23,10 @@
     "toolchain-gccarmnoneeabi": {
       "type": "toolchain",
       "optionalVersions": [
-        "~1.40804.0"
+        "~1.40804.0",
+        "~1.50401.0",
+        "~1.90301.0",
+        "~1.100301.0"
       ]
     }
   }

platform.py

@@ -5,5 +5,5 @@ class LibretuyaPlatform(PlatformBase):
     def configure_default_packages(self, options, targets):
         framework = options.get("pioframework")[0]
         if framework.startswith("realtek-ambz"):
-            self.packages["toolchain-gccarmnoneeabi"]["version"] = "~1.40804.0"
+            self.packages["toolchain-gccarmnoneeabi"]["version"] = "~1.50401.0"
         return super().configure_default_packages(options, targets)