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21 lines
440 B
Plaintext
21 lines
440 B
Plaintext
NV3/NV3T/NV4 hardware cursor
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Unlock extended CRTC registers
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CIO_CRE_HCUR_ADDR0
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Bits [6:0] = Address
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CIO_CRE_HCUR_ADDR1
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Bits [7:3] = Bits [11:7] of address
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Bit 1 = Cursor Doubling
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Bit 0 = Enable
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PRAMDAC_CU_START_POS (MMIO 0x680300)
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Bits [11:0] = X Pos
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Bits [27:16] = Y Pos
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CursorAddress >> 16 written to addr0
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(((CursorAddress >> 11) & 0x1F) << 3) | 1 (for enable) written to addr1
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Lock extended CRTC registers
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Enable - write |