mirror of
https://github.com/86Box/86Box.git
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497 lines
16 KiB
C
497 lines
16 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Defines graphics objects for Nvidia NV3 architecture-based GPU (RIVA 128/RIVA 128 ZX),
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* as well as for later GPUs if they use the same objects.
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* Note: These uint32_ts are basically object methods that are being submitted
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* They have different names so the user can use them more easily but different versions of the same class can be distinguished
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* ALL of these structures HAVE(?) to be a size of exactly 0x2000 bytes because that's what the hashtable expects and they need to actually map
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* directly to the PHYSICAL PGRAPH REGISTERS while sitting in RAMHT!!!!.
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*
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* Also, these class IDs don't relate to the internal architecture of the GPU.
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* Effectively, the NVIDIA drivers are faking shit. There are only 16 classes but the drivers recognise many more. See nv3_object_classes_driver.txt for the list of
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* classes recognised by the driver.
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* This is why the Class IDs you see here are not the same as you may see in other places.
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*
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* Todo: Is reserved* actually needed?
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*
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*
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* Authors: Connor Hyde <mario64crashed@gmail.com>
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*
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* Copyright 2024-2025 Connor Hyde
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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// This is slower, but these need to map *****EXACTLY***** to the registers in PGRAPH,
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// or everything FUCKS UP
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//
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// DO NOT REMOVE! DO NOT REMOVE! DO NOT REMOVE!
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#pragma pack(push, 1)
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// CLass names for debugging
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extern const char* nv3_class_names[];
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/* Class context switch method */
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typedef struct nv3_class_ctx_switch_method_s
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{
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union
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{
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uint32_t data;
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uint16_t instance;
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uint8_t channel_id : 6;
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uint16_t reserved : 9;
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bool reset_if_volatile; // ????
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} set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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} nv3_class_ctx_switch_method_t;
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/* 32-bit BGRA format colour for 2D acceleration */
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typedef struct nv3_color_32_s
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{
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uint8_t b;
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uint8_t g;
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uint8_t r;
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uint8_t a;
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} nv3_color_32_t;
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/* A4R4G4B4 */
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typedef struct nv3_color_16_a4r4g4b4_s
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{
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uint8_t a : 4;
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uint8_t r : 4;
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uint8_t g : 4;
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uint8_t b : 4;
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} nv3_color_16_a4r4g4b4_t;
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/* A1R5G5B5 format */
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typedef struct nv3_color_16_a1r5g5b5_s;
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{
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uint8_t a : 1;
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uint8_t r : 5;
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uint8_t g : 5;
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uint8_t b : 5;
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} nv3_color_16_a1r5g5b5_t;
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/* 565 format - NV3Tweak */
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typedef struct nv3_color_16_r5g6b5_s
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{
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uint8_t r : 5;
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uint8_t g : 6;
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uint8_t b : 5;
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} nv3_color_16_r5g6b5_t;
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/* Generic 16-bit position*/
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typedef struct nv3_position_16_s
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{
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union
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{
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uint32_t pos;
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uint16_t y;
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uint16_t x;
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} position;
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} nv3_position_16_t;
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/* Generic 16-bit size */
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typedef struct nv3_size_16_s
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{
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union
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{
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uint32_t size;
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uint16_t h;
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uint16_t w;
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} size;
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} nv3_size_16_t;
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/* Generic 32-bit colour + 16-bit position */
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typedef struct nv3_color_and_position_16_s
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{
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uint32_t color;
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nv3_position_16_t points;
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} nv3_color_and_position_16_t;
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/* Generic 16-bit clip region */
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typedef struct nv3_clip_16_s
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{
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// The bounds of the clipping area.
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uint16_t left;
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uint16_t top;
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uint16_t right;
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uint16_t bottom;
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} nv3_clip_16_t;
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/* In case your positions weren't HIGH PRECISION enough */
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typedef struct nv3_position_32_s
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{
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uint32_t x;
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uint32_t y;
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} nv3_position_32_t;
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// COLOUR FORMATS
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/*
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Object Class 0x01 (real hardware, also 0x41)
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0x12 (drivers)
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Beta factor
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*/
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typedef struct nv3_object_class_001
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100]; // Required for NV_CLASS Core Functionality
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uint32_t set_notify;
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uint8_t reserved2[0x1F8];
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uint8_t set_beta_factor_1d31; // 31:31 (?) value, 30:21 fraction
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uint8_t reserved3[0x1CFB]; // needs to be 0x2000 bytes
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// Put the rest of it here
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} nv3_beta_factor_t;
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/*
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Object class 0x02 (real hardware)
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0x14/0x43 (drivers)
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Also 0x42 in context IDs
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Render operation used for things like blending. Appears to be 8-bit i.e. a ROP3 with 256 possible operations.
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*/
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typedef struct nv3_object_class_002
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0xFF];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1F8];
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uint8_t rop; // ROP3 (ID = ????????)
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uint8_t reserved3[0x1CFB]; // needs to be 0x2000 bytes
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} nv3_render_operation_t;
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/*
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Object class 0x03 (real hardware)
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0x15 (drivers)
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Also 0x43 in context IDs
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A chroma/color key, like in video editing
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*/
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typedef struct nv3_object_class_003
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0xFF];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1F8];
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uint8_t color; // ROP3 (ID = ????????)
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uint8_t reserved3[0x1CFB]; // needs to be 0x2000 bytes
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} nv3_chroma_key_t;
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/*
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Object class 0x04 (real hardware)
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0x15 (drivers)
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Also 0x44 in context IDs
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Plane mask
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*/
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typedef struct nv3_object_class_004
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0xFF];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1F8];
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uint8_t color; // ROP3 (ID = ????????)
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uint8_t reserved3[0x1CFB]; // needs to be 0x2000 bytes
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} nv3_plane_mask_t;
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/*
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Object class 0x05 (real hardware)
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0x19/0x1E/0x47 (drivers)
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Also 0x45 in context IDs
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Clipping rectangle used for various blitting operations
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*/
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typedef struct nv3_object_class_005
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0xFF];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1F4];
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/* 16-bit precision */
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nv3_position_16_t position;
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nv3_size_16_t size;
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uint8_t reserved3[0x1CFB]; // needs to be 0x2000 bytes
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} nv3_clipping_rectangle_t;
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/*
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Object Class 0x06 (real hardware)
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0x?? (drivers)
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Also 0x46 in context IDs
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A pattern used for blits. Wahey!
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*/
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typedef struct nv3_object_class_006
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0xFF];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x200];
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uint32_t shape; // 0 = 8x8, 1 = 64x1, 2 = 1x64
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uint32_t color0; // Some 32-bit format (BGRA?)
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uint32_t color1; // BGRA?
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uint32_t pattern[2]; // BGRA?
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uint8_t reserved3[0x1CDF]; // needs to be 0x2000 bytes
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} nv3_pattern_t;
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/*
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Object Class 0x07 (real hardware)
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0x1E (drivers)
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Also 0x47 in context IDs
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A rectangle. Wahey!
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*/
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typedef struct nv3_object_class_007
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1FC];
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uint8_t color; // ROP3 (ID = ????????)
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uint8_t reserved3[0xF8];
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nv3_position_16_t position[16];
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nv3_size_16_t size[16];
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uint8_t reserved4[0x1B7F];
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} nv3_rectangle_t;
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/* In case your points weren't colourful enough */
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typedef struct nv3_object_class_008_cpoint_s
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{
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uint32_t color;
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nv3_position_16_t position;
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} nv3_object_class_008_cpoint_t;
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/*
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Object Class 0x08 (real hardware)
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0x1A (drivers)
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Also 0x48 in context IDs
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A point: the revolutionary 3d graphics technique...
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*/
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typedef struct nv3_object_class_008
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1FC];
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uint32_t color; // BGRA?
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nv3_position_16_t point[16]; // Boring points
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nv3_position_32_t point32[16]; // Allows you to have points with full 32-bit precision
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nv3_object_class_008_cpoint_t cpoint[16]; // Allows you to have c o l o r f u l points!
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uint8_t reserved3[0x1A7B];
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} nv3_point_t;
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/* Normal line... */
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typedef struct nv3_object_class_009_line_s
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{
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nv3_position_16_t start; // presumably unless it's in reverse order...TODO: check the order
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nv3_position_16_t end;
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} nv3_object_class_009_line_t;
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/* THIRTY TWO BIT PRECISION line */
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typedef struct nv3_object_class_009_line32_s
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{
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uint32_t x0;
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uint32_t x1;
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uint32_t y0;
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uint32_t y1;
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} nv3_object_class_009_line32_t;
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/* nv3_object_class_009_polyline_t not implemented because it's just a duplicate of nv3_object_class_009_line */
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/* nv3_object_class_009_polyline32_t not implemented because it's just a duplicate of nv3_object_class_009_line32 */
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/*
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Object Class 0x09 (real hardware)
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0x1B (drivers)
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Also 0x49 in context IDs
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It's a line, but also a polygon...
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*/
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typedef struct nv3_object_class_009
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1FC];
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uint32_t color; // BGRA?
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nv3_object_class_009_line_t line[16]; // List of line points (...)
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nv3_object_class_009_line32_t line32[8];
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nv3_object_class_009_line_t polyline[32];
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nv3_object_class_009_line32_t polyline32[16];
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nv3_color_and_position_16_t cpolyline[16]; // List of line points and colours.
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uint8_t reserved3[0x197b];
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} nv3_line_t;
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/*
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Object Class 0x0A (real hardware)
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0x1c (drivers)
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Also 0x4a in context IDs
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This one is where nvidia reinvents the line, but without the starting or ending pixel.
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Seriously.
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*/
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typedef struct nv3_object_class_00A
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1FC];
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uint32_t color; // BGRA?
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nv3_object_class_009_line_t line[16]; // List of line points (...)
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nv3_object_class_009_line32_t line32[8];
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nv3_object_class_009_line_t polyline[32];
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nv3_object_class_009_line32_t polyline32[16];
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nv3_color_and_position_16_t cpolyline[16]; // List of line points and colours.
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uint8_t reserved3[0x197b];
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} nv3_lin_t;
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/*
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Object Class 0x0B (real hardware)
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0x?? (drivers)
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Also 0x4b in context IDs.
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This is a triangle but seems to be obsolete. It's replaced with UD3D0Z / D3D5 Accelerated Triangle with Zeta Buffer. Does it even exist?
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*/
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typedef struct nv3_object_class_00B
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x1FC];
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uint32_t color; // BGRA?
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uint8_t reserved3[0x8];
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// The points of the triangle.
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nv3_position_16_t points[3];
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// Another way of filling out the points of the triangle
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uint32_t x0;
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uint32_t y0;
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uint32_t x1;
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uint32_t y1;
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uint32_t y2;
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uint32_t x2;
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nv3_position_16_t mesh[32]; // Some kind of mesh format. I guess a list of vertex positions?
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nv3_position_32_t mesh32[16];
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nv3_color_and_position_16_t ctriangle[3]; // Triangle with colour
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nv3_color_and_position_16_t ctrimesh[16]; // Some kind of mesh format. I guess a list of vertex positions? with colours
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uint8_t reserved4[0x19FB];
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} nv3_triangle_t;
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typedef struct nv3_object_class_00C_nclip_s
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{
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nv3_position_16_t position;
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nv3_size_16_t size;
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} nv3_object_class_00C_nclip_t;
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/*
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Object Class 0x0C (real hardware)
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0x0C (drivers)
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Also 0x4C in context IDs.
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GDI text acceleration for Windows 95.
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How the fuck does this even work?
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*/
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typedef struct nv3_object_class_00C
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved2[0x2F4];
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uint32_t color_a; // Color for Clip A
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nv3_object_class_00C_nclip_t rect_nclip[64];
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uint8_t reserved3[0x1F0];
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nv3_clip_16_t clip_b;
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uint32_t color_b; // Color for Clip B
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nv3_clip_16_t rect_clip[64];
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uint8_t reserved4[0x1E8];
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nv3_clip_16_t clip_c;
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uint32_t color1_c;
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nv3_size_16_t size_c;
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nv3_position_16_t point_c;
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uint32_t color1_c_bitmap[128];
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uint8_t reserved5[0x368];
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nv3_clip_16_t clip_d;
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uint32_t color1_d;
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nv3_size_16_t size_in_d;
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nv3_size_16_t size_out_d;
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nv3_position_16_t point_d;
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uint32_t mono_color1_d[128];
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uint8_t reserved6[0x364];
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nv3_clip_16_t clip_e;
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uint32_t color0_e;
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uint32_t color1_e;
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nv3_size_16_t size_in_e;
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nv3_size_16_t size_out_e;
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nv3_position_16_t point_e;
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uint32_t mono_color1_e[128];
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uint8_t reserved7[0xB7F];
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} nv3_win95_text_t;
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/*
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Object Class 0x0D (real hardware)
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0x?? (drivers)
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Also 0x4D in context IDs.
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Represents reformatting of an image in memory.
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*/
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typedef struct nv3_object_class_00D
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{
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nv3_class_ctx_switch_method_t set_notify_ctx_dma; // Set notifier context for DMA (context switch)
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uint8_t reserved2[0x100];
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uint32_t set_notify; // Set notifier
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uint8_t reserved3[0x204];
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uint32_t offset_in;
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uint32_t offset_out;
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uint32_t pitch_in;
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uint32_t pitch_out;
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uint32_t line_length_in; // Stride?
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uint32_t line_count;
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uint8_t format_input_bits; // 1 2 or 4 to increment by bits
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uint8_t format_output_bits; // 1 2 to 4 to increment by bits
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uint8_t reserved4[2];
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uint32_t buffer_notify; // Notify the Buffedr
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uint8_t reserved5[0x1CD3];
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} nv3_memory_to_memory_format;
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/* WHY IS THE FORMAT DIFFERENT TO THE REST OF THE GPU?
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They are making it look like a bitfield but it's hex?
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THEY ARE ALL LITTLE ENDIAN
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*/
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typedef enum nv3_object_class_01C_pixel_format_e
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{
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// Y8P4
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// 12-bits (Y8 - Planar YUV 8 bits (Y value only), 4 bits of indexed colour too?
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nv3_m2mt_pixel_format_le_y8_p4 = 0x1010000,
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// Y16P2
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// 16-bits (Y16) - Planar YUV 16 bits (Y value only), 2 bits of indexed colour too?
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nv3_m2mt_pixel_format_le_y16_p2 = 0x1010101,
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/* 1 unused bit, 555 15-bit format, p2(?)
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*/
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nv3_m2mt_pixel_format_x1r5g5b5_p2 = 0x1000000,
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// X8G8B8R8, 24-bit colour (or 24-bit colour with alpha)
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nv3_m2mt_pixel_format_x8g8b8r8 = 0x1,
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} nv3_object_class_01C_pixel_format;
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// TODO: PATCHCORDS!!!! TO LINK ALL OF THIS TOGETHER!!!
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#pragma pack(pop) // return packing to whatever it was before this disaster
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