mirror of
https://github.com/86Box/86Box.git
synced 2026-02-23 01:48:21 -07:00
a505894a10
- 86Box's own headers go to /86box - munt's public interface goes to /mt32emu - all slirp headers go to /slirp (might want to consider using only its public inteface) - single file headers from other projects go in include root
97 lines
2.9 KiB
C
97 lines
2.9 KiB
C
#include <stdint.h>
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/mem.h>
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#include "x86.h"
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#include "x86_flags.h"
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#include "386_common.h"
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#include "codegen.h"
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#include "codegen_accumulate.h"
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#include "codegen_ir.h"
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#include "codegen_ops.h"
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#include "codegen_ops_mmx_shift.h"
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#include "codegen_ops_helpers.h"
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uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLW*/
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uop_PSRLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAW*/
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uop_PSRAW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLW*/
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uop_PSLLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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}
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uint32_t ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLD*/
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uop_PSRLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAD*/
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uop_PSRAD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLD*/
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uop_PSLLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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}
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uint32_t ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLQ*/
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uop_PSRLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAQ*/
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uop_PSRAQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLQ*/
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uop_PSLLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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}
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