Alexander Babikov a07ffdecab Restore the debug register operation on 486+ ...

But put it behind a compile-time option due to performance hits
Also add the DE flag to CPUID on supported CPUs

2024-05-24 03:35:08 +05:00

..

catalyst_flash.c

Constification

2023-07-25 17:59:24 -04:00

CMakeLists.txt

Split the 286/386 interpreter away from the 486+ one (the 286/386 interpreter does not use the pccache's, readlookup's, and writelookup's as the emulated CPU's are too slow for them to be required, and also has more accurate FPU timings), also added a LPT status read function for future-proofing.

2023-08-08 19:39:52 +02:00

i2c_eeprom.c

i2c_eeprom: Random cleanups

2023-12-18 15:42:24 -03:00

intel_flash.c

Constification

2023-07-25 17:59:24 -04:00

mem.c

Restore the debug register operation on 486+

2024-05-24 03:35:08 +05:00

mmu_2386.c

Made LOCK instruction legality more accurate on 386, closes #4132.

2024-02-10 03:05:56 +01:00

rom.c

286/386 interpreter fixes - the correct opcode arrays are now used and fixed the debug registers.

2024-02-09 12:14:35 +01:00

row.c

Fix another mistake I made in row.c

2023-08-04 11:09:26 -04:00

smram.c

Constification

2023-07-25 17:59:24 -04:00

spd.c

Fixed DRB DIMM splitting (AMI Apollo now boots with 8 MB RAM), and extended the MB500N workaround to MR BIOS'es as well.

2024-05-09 00:47:45 +02:00

sst_flash.c

Added the Gateway Tomahawk (430TX machine).

2024-01-21 01:55:05 +01:00