From 5e6e81353ecf5844b10164709f298e2df602f79c Mon Sep 17 00:00:00 2001 From: win2kgamer <47463859+win2kgamer@users.noreply.github.com> Date: Wed, 18 Feb 2026 22:25:38 -0600 Subject: [PATCH 1/3] VL82C48x: Implement ROMSET register ROMMOV/ROMCS# functionality --- src/chipset/vl82c480.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c index cf3682754..e5e904567 100644 --- a/src/chipset/vl82c480.c +++ b/src/chipset/vl82c480.c @@ -77,6 +77,14 @@ vl82c480_recalc_shadow(vl82c480_t *dev) } } + /* Implement ROMCS# disable portion of ROMMOV behavior */ + if ((dev->regs[0x11] == 0x00) && ((dev->regs[0x0c] & 0x20) || (dev->regs[0x0c] & 0x10))) + mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + if (!(dev->regs[0x0f] & 0x0f) && !(dev->regs[0x0c] & 0x20)) { + mem_set_mem_state(0xc0000, 0x8000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + if (!(dev->regs[0x0f] & 0xf0) && !((dev->regs[0x0c] & 0x30) == 0x30)) { + mem_set_mem_state(0xc8000, 0x8000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + flushmmucache(); } @@ -146,6 +154,10 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv) case 0x07: dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x40) | (val & 0xbf); break; + case 0x0c: + dev->regs[dev->idx] = val; + vl82c480_recalc_shadow(dev); + break; case 0x0d ... 0x12: dev->regs[dev->idx] = val; vl82c480_recalc_shadow(dev); From 58323156c1b29537ed76265d43aa715d18be2290 Mon Sep 17 00:00:00 2001 From: win2kgamer <47463859+win2kgamer@users.noreply.github.com> Date: Wed, 18 Feb 2026 22:35:39 -0600 Subject: [PATCH 2/3] VL82C48x: Add logging and fix a compile-breaking mistake --- src/chipset/vl82c480.c | 41 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c index e5e904567..fccf8f1ab 100644 --- a/src/chipset/vl82c480.c +++ b/src/chipset/vl82c480.c @@ -12,11 +12,17 @@ * * Copyright 2020 Miran Grca. */ + +#ifdef ENABLE_VL82C48X_LOG +#include +#endif + #include #include #include #include #include +#define HAVE_STDARG_H #include <86box/86box.h> #include "cpu.h" #include <86box/timer.h> @@ -27,11 +33,31 @@ #include <86box/nmi.h> #include <86box/port_92.h> #include <86box/chipset.h> +#include <86box/log.h> + +#ifdef ENABLE_VL82C48X_LOG +int vl82c48x_do_log = ENABLE_VL82C48X_LOG; + +static void +vl82c48x_log(void *priv, const char *fmt, ...) +{ + if (vl82c48x_do_log) { + va_list ap; + va_start(ap, fmt); + log_out(priv, fmt, ap); + va_end(ap); + } +} +#else +# define vl82c48x_log(fmt, ...) +#endif typedef struct vl82c480_t { uint8_t idx; uint8_t regs[256]; uint32_t banks[4]; + + void * log; // New logging system } vl82c480_t; static int @@ -80,9 +106,9 @@ vl82c480_recalc_shadow(vl82c480_t *dev) /* Implement ROMCS# disable portion of ROMMOV behavior */ if ((dev->regs[0x11] == 0x00) && ((dev->regs[0x0c] & 0x20) || (dev->regs[0x0c] & 0x10))) mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - if (!(dev->regs[0x0f] & 0x0f) && !(dev->regs[0x0c] & 0x20)) { + if (!(dev->regs[0x0f] & 0x0f) && !(dev->regs[0x0c] & 0x20)) mem_set_mem_state(0xc0000, 0x8000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - if (!(dev->regs[0x0f] & 0xf0) && !((dev->regs[0x0c] & 0x30) == 0x30)) { + if (!(dev->regs[0x0f] & 0xf0) && !((dev->regs[0x0c] & 0x30) == 0x30)) mem_set_mem_state(0xc8000, 0x8000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); flushmmucache(); @@ -124,6 +150,8 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv) { vl82c480_t *dev = (vl82c480_t *) priv; + vl82c48x_log(dev->log, "[%04X:%08X] VL82c48x: [W] %04X = %02X\n", CS, cpu_state.pc, addr, val); + switch (addr) { case 0xec: dev->idx = val; @@ -207,6 +235,8 @@ vl82c480_read(uint16_t addr, void *priv) break; } + vl82c48x_log(dev->log, "[%04X:%08X] VL82c48x: [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret); + return ret; } @@ -215,6 +245,11 @@ vl82c480_close(void *priv) { vl82c480_t *dev = (vl82c480_t *) priv; + if (dev->log != NULL) { + log_close(dev->log); + dev->log = NULL; + } + free(dev); } @@ -229,6 +264,8 @@ vl82c480_init(const device_t *info) uint8_t min_j = (machines[machine].init == machine_at_monsoon_init) ? 2 : 2; uint8_t max_j = (machines[machine].init == machine_at_monsoon_init) ? 7 : 7; + dev->log = log_open("VL82c48x"); + dev->regs[0x00] = info->local; dev->regs[0x01] = 0xff; dev->regs[0x02] = 0x8a; From 4bab8b1fc5a66f53ad09c23d5646a76585bf0d67 Mon Sep 17 00:00:00 2001 From: win2kgamer <47463859+win2kgamer@users.noreply.github.com> Date: Wed, 18 Feb 2026 23:35:51 -0600 Subject: [PATCH 3/3] Mirror the ROMs for the HP Vectra 486VL and Siemens-Nixdorf D824 and remove the now unneeded Cirrus VBIOS hacks for them --- src/machine/m_at_socket1.c | 26 ++++++++++++++++++++++++-- src/video/vid_cl54xx.c | 11 ++--------- 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/src/machine/m_at_socket1.c b/src/machine/m_at_socket1.c index 563227f2e..7bb69d368 100644 --- a/src/machine/m_at_socket1.c +++ b/src/machine/m_at_socket1.c @@ -294,11 +294,13 @@ machine_at_vect486vl_init(const machine_t *model) // has HDC problems int ret; ret = bios_load_linear("roms/machines/vect486vl/aa0500.ami", - 0x000e0000, 131072, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; + memcpy(&rom[0x00020000], rom, 131072); + if (gfxcard[0] == VID_INTERNAL) device_add(machine_get_vid_device(machine)); @@ -311,6 +313,15 @@ machine_at_vect486vl_init(const machine_t *model) // has HDC problems device_add(&ide_isa_device); device_add_params(&fdc37c6xx_device, (void *) (FDC37C651 | FDC37C6XX_IDE_PRI)); + video_reset(gfxcard[0]); + + if (gfxcard[0] != VID_INTERNAL) { + for (uint16_t i = 0; i < 32768; i++) + rom[i] = mem_readb_phys(0x000c0000 + i); + } + mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000); + mem_mapping_set_exec(&bios_mapping, rom); + return ret; } @@ -321,11 +332,13 @@ machine_at_d824_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/d824/fts-biosupdated824noflashbiosepromv320-320334-160.bin", - 0x000e0000, 131072, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; + memcpy(&rom[0x00020000], rom, 131072); + if (gfxcard[0] == VID_INTERNAL) device_add(machine_get_vid_device(machine)); @@ -342,6 +355,15 @@ machine_at_d824_init(const machine_t *model) device_add(&ide_isa_device); device_add_params(&fdc37c6xx_device, (void *) FDC37C651); + video_reset(gfxcard[0]); + + if (gfxcard[0] != VID_INTERNAL) { + for (uint16_t i = 0; i < 32768; i++) + rom[i] = mem_readb_phys(0x000c0000 + i); + } + mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000); + mem_mapping_set_exec(&bios_mapping, rom); + return ret; } diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index ae2da7e15..edf49fe88 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -54,8 +54,6 @@ #define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" #define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" #define BIOS_GD5428_ONBOARD_ACER_PATH "roms/machines/acera1g/4alo001.bin" -#define BIOS_GD5428_ONBOARD_HP_PATH "roms/machines/vect486vl/aa0500.ami" -#define BIOS_GD5428_ONBOARD_SNI_PATH "roms/machines/d824/fts-biosupdated824noflashbiosepromv320-320334-160.bin" #define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN" #define BIOS_GD5428_BOCA_ISA_PATH_1 "roms/video/cirruslogic/boca_gd5428_1.30b_1.bin" #define BIOS_GD5428_BOCA_ISA_PATH_2 "roms/video/cirruslogic/boca_gd5428_1.30b_2.bin" @@ -4317,10 +4315,7 @@ gd54xx_init(const device_t *info) case CIRRUS_ID_CLGD5426: if (info->local & 0x200) - if (machines[machine].init == machine_at_vect486vl_init) - romfn = BIOS_GD5428_ISA_PATH; - else - romfn = NULL; + romfn = NULL; else { if (info->local & 0x100) romfn = BIOS_GD5426_DIAMOND_A1_ISA_PATH; @@ -4337,9 +4332,7 @@ gd54xx_init(const device_t *info) case CIRRUS_ID_CLGD5428: if (info->local & 0x200) { - if (machines[machine].init == machine_at_d824_init) - romfn = BIOS_GD5428_ISA_PATH; - else if (machines[machine].init == machine_at_acera1g_init) + if (machines[machine].init == machine_at_acera1g_init) romfn = BIOS_GD5428_ONBOARD_ACER_PATH; else romfn = NULL;