diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 982abda3f..c648ea4f4 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -1203,6 +1203,7 @@ extern int machine_at_spitfire_init(const machine_t *); extern int machine_at_ma30d_init(const machine_t *); /* i440EX */ +extern int machine_at_brio83xx_init(const machine_t *); extern int machine_at_p6i440e2_init(const machine_t *); /* i440BX */ diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index 870837713..578814a8f 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -344,6 +344,45 @@ machine_at_ma30d_init(const machine_t *model) } /* i440EX */ +int +machine_at_brio83xx_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/brio83xx/QHL0700.rom", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init_ex(model, 2); + + pci_init(PCI_CONFIG_TYPE_1); + // Actual settings! + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 1, 2, 3, 4); /* Onboard */ + pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4); /* Onboard */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* Onboard */ + pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4); /* Slot 01 */ + pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1); /* Slot 02 */ + pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2); /* Slot 03 */ + pci_register_slot(0x14, PCI_CARD_VIDEO, 1, 2, 3, 4); /* Onboard */ + + if (gfxcard[0] == VID_INTERNAL) + device_add(&s3_trio64v2_dx_onboard_pci_device); + + device_add(&i440ex_device); + device_add(&piix4_device); + + device_add_params(&fdc37c67x_device, (void *) (FDC37XXX5)); + + /* Chip not quite confirmed, but this does operate fine. */ + device_add(&sst_flash_29ee020_device); + + spd_register(SPD_TYPE_SDRAM, 0x3, 256); + + return ret; +} + int machine_at_p6i440e2_init(const machine_t *model) { diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index fcfc83839..a1feb86f6 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -18265,6 +18265,55 @@ const machine_t machines[] = { }, /* 440EX */ + /* Has a SM(S)C FDC37C675 Super I/O chip with on-chip KBC with Phoenix + MultiKey/42 (version 1.38) KBC firmware. */ + { + .name = "[i440EX] HP Brio 83xx", + .internal_name = "brio83xx", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440EX, + .init = machine_at_brio83xx_init, + .p1_handler = NULL, + .gpio_handler = NULL, + .available_flag = MACHINE_AVAILABLE, + .gpio_acpi_handler = NULL, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + /* NOTE: Range not confirmed. */ + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP | MACHINE_BUS_USB, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO | MACHINE_APM | MACHINE_ACPI | MACHINE_USB, + .ram = { + /* PC manual says 128 MB max, but 256 MB confirmed to work + and 512 MB confirmed to not work. */ + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .jumpered_ecp_dma = 0, + .default_jumpered_ecp_dma = -1, + .kbc_device = NULL, + .kbc_params = 0x00000000, + .kbc_p1 = 0x00000cf0, + .gpio = 0xffffffff, + .gpio_acpi = 0xffffffff, + .device = NULL, + .kbd_device = NULL, + .fdc_device = NULL, + .sio_device = NULL, + .vid_device = &s3_trio64v2_dx_onboard_pci_device, + .snd_device = NULL, + .net_device = NULL + }, + /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ {