diff --git a/.ci/build.sh b/.ci/build.sh index 728c09113..cf420d4dd 100755 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -24,8 +24,8 @@ # - For Windows (MSYS MinGW) builds: # - Packaging requires 7-Zip on Program Files # - Packaging the Ghostscript DLL requires 32-bit and/or 64-bit Ghostscript on Program Files -# - Packaging the FluidSynth DLL requires it to be at /home/86Box/dll32/libfluidsynth.dll -# and/or /home/86Box/dll64/libfluidsynth64.dll (for 32-bit and 64-bit builds respectively) +# - Packaging the XAudio2 DLL for FAudio requires it to be at /home/86Box/dll32/xaudio2*.dll +# and/or /home/86Box/dll64/xaudio2*.dll (for 32-bit and 64-bit builds respectively) # - For Linux builds: # - Only Debian and derivatives are supported # - dpkg and apt-get are called through sudo to manage dependencies; make sure those @@ -288,7 +288,6 @@ then echo [-] Using MSYSTEM [$MSYSTEM] # Install dependencies only if we're in a new build and/or architecture. - freetype_dll="$cache_dir/freetype.$MSYSTEM.dll" if check_buildtag "$MSYSTEM" then # Update databases and keyring only if we're in a new build. @@ -333,9 +332,6 @@ then # Clean pacman cache when running under Jenkins to save disk space. [ "$CI" = "true" ] && rm -rf /var/cache/pacman/pkg - # Generate a new freetype DLL for this architecture. - rm -f "$freetype_dll" - # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. save_buildtag "$MSYSTEM" @@ -595,7 +591,7 @@ else # ...and the ones we do want listed. Non-dev packages fill missing spots on the list. libpkgs="" longest_libpkg=0 - for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev + for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev do libpkgs="$libpkgs $pkg:$arch_deb" length=$(echo -n $pkg | sed 's/-dev$//' | sed "s/qtdeclarative/qt/" | wc -c) @@ -796,10 +792,6 @@ then sevenzip="$pf/7-Zip/7z.exe" [ "$arch" = "32" -a -d "/c/Program Files (x86)" ] && pf="/c/Program Files (x86)" - # Archive freetype from cache or generate it from local MSYS installation. - [ ! -e "$freetype_dll" ] && .ci/static2dll.sh -p freetype2 /$MSYSTEM/lib/libfreetype.a "$freetype_dll" - cp -p "$freetype_dll" archive_tmp/freetype.dll - # Archive Ghostscript DLL from local official distribution installation. for gs in "$pf"/gs/gs*.*.* do @@ -810,8 +802,8 @@ then "$sevenzip" e -y -o"archive_tmp" "$discord_zip" "lib/$arch_discord/discord_game_sdk.dll" [ ! -e "archive_tmp/discord_game_sdk.dll" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] - # Archive other DLLs from local directory. - cp -p "/home/$project/dll$arch/"* archive_tmp/ + # Archive XAudio2 DLL if required. + grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt || cp -p "/home/$project/dll$arch/xaudio2"* archive_tmp/ # Archive executable, while also stripping it if requested. if [ $strip -ne 0 ] @@ -1003,6 +995,11 @@ else ln -s "$relroot/usr/lib/libvulkan.so.1" "archive_tmp/usr/lib/libvulkan.so" ln -s "$relroot/usr/lib/$libdir/libvulkan.so.1" "archive_tmp/usr/lib/$libdir/libvulkan.so" + # The FluidSynth packaged by Debian bullseye is ABI incompatible with + # the newer version we compile, despite sharing a major version. Since we + # don't run into the one breaking ABI change they made, just symlink it. + ln -s "$(readlink "archive_tmp/usr/lib/libfluidsynth.so.3")" "archive_tmp/usr/lib/libfluidsynth.so.2" + # Archive Discord Game SDK library. 7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so" [ ! -e "archive_tmp/usr/lib/discord_game_sdk.so" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] diff --git a/.ci/dependencies_macports.txt b/.ci/dependencies_macports.txt index e78d4a6da..5ec71d07c 100644 --- a/.ci/dependencies_macports.txt +++ b/.ci/dependencies_macports.txt @@ -13,4 +13,5 @@ qt5 wget fluidsynth ghostscript +libslirp vde2 diff --git a/.ci/dependencies_msys.txt b/.ci/dependencies_msys.txt index df4932352..1b9ccdcc8 100644 --- a/.ci/dependencies_msys.txt +++ b/.ci/dependencies_msys.txt @@ -8,5 +8,6 @@ SDL2 zlib libpng rtmidi +libslirp qt5-static qt5-translations diff --git a/.ci/static2dll.sh b/.ci/static2dll.sh deleted file mode 100755 index 030898752..000000000 --- a/.ci/static2dll.sh +++ /dev/null @@ -1,160 +0,0 @@ -#!/bin/sh -# -# 86Box A hypervisor and IBM PC system emulator that specializes in -# running old operating systems and software designed for IBM -# PC systems and compatibles from 1981 through fairly recent -# system designs based on the PCI bus. -# -# This file is part of the 86Box distribution. -# -# Script for converting MinGW static libraries into a DLL. -# -# -# Authors: RichardG, -# -# Copyright 2021 RichardG. -# - -def_file="static2dll.def" -seen_file="static2dll.seen" -libs_file="static2dll.libs" - -find_lib() { - # Try to find a static library's file. - local msystem_lib="/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')/lib/lib" - if [ -e "$msystem_lib$1.a" ] - then - echo "$msystem_lib$1.a" - elif [ -e "$msystem_lib$1.dll.a" ] - then - echo "$msystem_lib$1.dll.a" - else - # Return dynamic reference to the library. - echo "-l$1" - return 1 - fi -} - -add_lib() { - # Always make sure this lib is listed after the last lib that depends on it. - old_libs=$(cat "$libs_file") - rm -f "$libs_file" - for lib in $old_libs - do - [ "$lib" != "$*" ] && echo "$lib" >> "$libs_file" - done - echo "$*" >> "$libs_file" - - # Add libstdc++ in the end if required. - if echo "$*" | grep -q "/" - then - grep -Eq -- "__cxa_|__gxx_" "$1" 2> /dev/null && add_lib -static -lstdc++ - fi - - # Add libiconv for libintl. - if echo "$*" | grep -q "libintl" - then - add_lib $(find_lib iconv) - fi - - # Add libuuid for glib. - if echo "$*" | grep -q "libglib" - then - add_lib $(find_lib uuid) - fi -} - -run_pkgconfig() { - local cache_file="static2dll.$1.cache" - if [ -e "$cache_file" ] - then - cat "$cache_file" - else - pkg-config --static --libs "$1" 2> /dev/null | tee "$cache_file" - fi -} - -parse_pkgconfig() { - # Parse arguments. - local layers=$1 - shift - local input_lib_name=$1 - shift - - # Don't process the same file again. - grep -q '^'$input_lib_name'$' "$seen_file" && return - echo $input_lib_name >> "$seen_file" - - echo "$layers" parse_pkgconfig $input_lib_name - - # Parse pkg-config arguments. - for arg in $* - do - local arg_base="$(echo $arg | cut -c1-2)" - if [ "x$arg_base" = "x-l" ] - then - # Don't process the same lib again. - local lib_name="$(echo $arg | cut -c3-)" - [ "x$lib_name" == "x$input_lib_name" ] && continue - - # Add lib path. - add_lib "$(find_lib $lib_name)" - - # Get this lib's dependencies through pkg-config. - local pkgconfig="$(run_pkgconfig "$lib_name")" - [ $? -eq 0 ] && parse_pkgconfig "$layers"'>' "$lib_name" $pkgconfig || echo $lib_name >> "$seen_file" - elif [ "x$(echo $arg_base | cut -c1)" = "x-" ] - then - # Ignore other arguments. - continue - else - # Add lib path. - add_lib "$arg" - fi - done -} - -# Parse arguments. -case $1 in - -p) # -p pkg_config_name static_lib_path out_dll - shift - base_pkgconfig=$(run_pkgconfig "$1") - base_path="$2" - base_name="$1" - ;; - - *) # pc_path static_lib_path out_dll - base_pkgconfig="$(grep ^Libs.private: $1 | cut -d: -f2-)" - base_path="$2" - base_name="$2" - ;; -esac - -# Check arguments. -if [ -z "$base_pkgconfig" -o -z "$base_path" -o -z "$base_name" ] -then - echo Usage: - echo static2dll.sh -p {pkgconfig_package_name} {static_lib_path} {out_dll_name} - echo static2dll.sh {pc_file_path} {static_lib_path} {out_dll_name} - exit 1 -fi - -# Produce .def file. -echo LIBRARY $(basename "$3") > "$def_file" -echo EXPORTS >> "$def_file" -nm "$base_path" | grep " [TC] " | sed "/ _/s// /" | awk '{ print $3 }' >> "$def_file" - -# Parse dependencies recursively. -rm -f "$seen_file" "$libs_file" "$libs_file.tmp" -touch "$seen_file" "$libs_file" -parse_pkgconfig '>' $base_name $base_pkgconfig - -# Produce final DLL. -dllwrap --def "$def_file" -o "$3" -Wl,--allow-multiple-definition "$base_path" $(cat "$libs_file") -status=$? -[ $status -eq 0 ] && rm -f "$def_file" "$seen_file" "$libs_file" "static2dll.*.cache" - -# Update final DLL timestamp. -touch -r "$base_path" "$3" - -exit $status diff --git a/.github/workflows/c-cpp.yml b/.github/workflows/c-cpp.yml index 16b56cc10..7b8b6eeb4 100644 --- a/.github/workflows/c-cpp.yml +++ b/.github/workflows/c-cpp.yml @@ -90,6 +90,8 @@ jobs: libpng:p openal:p rtmidi:p + libslirp:p + fluidsynth:p libvncserver:p - name: Checkout repository diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index 49ea8c890..5f703a65f 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -104,6 +104,8 @@ jobs: libpng:p openal:p rtmidi:p + libslirp:p + fluidsynth:p libvncserver:p ${{ matrix.ui.packages }} @@ -328,6 +330,8 @@ jobs: libc6-dev librtmidi-dev libopenal-dev + libslirp-dev + libfluidsynth-dev libvncserver-dev ${{ matrix.ui.packages }} @@ -413,6 +417,7 @@ jobs: libpng rtmidi openal-soft + fluidsynth libvncserver ${{ matrix.ui.packages }} diff --git a/.github/workflows/codeql.yml b/.github/workflows/codeql.yml index 107755af6..fcfb16341 100644 --- a/.github/workflows/codeql.yml +++ b/.github/workflows/codeql.yml @@ -107,6 +107,8 @@ jobs: libpng:p openal:p rtmidi:p + libslirp:p + fluidsynth:p libvncserver:p ${{ matrix.ui.packages }} @@ -191,6 +193,8 @@ jobs: libc6-dev librtmidi-dev libopenal-dev + libslirp-dev + libfluidsynth-dev libvncserver-dev ${{ matrix.ui.packages }} @@ -266,6 +270,7 @@ jobs: libpng rtmidi openal-soft + fluidsynth libvncserver ${{ matrix.ui.packages }} diff --git a/src/86box.c b/src/86box.c index a9bfb2f72..8db2fc75a 100644 --- a/src/86box.c +++ b/src/86box.c @@ -1275,7 +1275,9 @@ pc_run(void) #ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */ // if (gdbstub_step == GDBSTUB_EXEC) #endif - // mouse_process(); +#if 0 + mouse_process(); +#endif joystick_process(); endblit(); @@ -1416,6 +1418,9 @@ set_screen_size_monitor(int x, int y, int monitor_index) monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 3); monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 3); break; + + default: + break; } plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index); diff --git a/src/acpi.c b/src/acpi.c index 539da644b..495419f4e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -169,9 +169,9 @@ acpi_raise_smi(void *priv, int do_smi) } static uint32_t -acpi_reg_read_common_regs(int size, uint16_t addr, void *p) +acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -211,6 +211,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p) update_tsc(); #endif break; + + default: + break; } #ifdef ENABLE_ACPI_LOG @@ -221,9 +224,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_ali(int size, uint16_t addr, void *p) +acpi_reg_read_ali(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -277,7 +280,7 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p) ret = dev->regs.pmcntrl; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -289,9 +292,9 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_intel(int size, uint16_t addr, void *p) +acpi_reg_read_intel(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -374,7 +377,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p) ret = dev->regs.gporeg[addr & 3]; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -386,9 +389,9 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via_common(int size, uint16_t addr, void *p) +acpi_reg_read_via_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -470,7 +473,7 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p) ret = (dev->regs.gptren >> shift32) & 0xff; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -482,9 +485,9 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via(int size, uint16_t addr, void *p) +acpi_reg_read_via(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; @@ -527,7 +530,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p) ret = (dev->regs.gpi_val >> shift16) & 0xff; break; default: - ret = acpi_reg_read_via_common(size, addr, p); + ret = acpi_reg_read_via_common(size, addr, priv); break; } @@ -539,9 +542,9 @@ acpi_reg_read_via(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via_596b(int size, uint16_t addr, void *p) +acpi_reg_read_via_596b(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -577,7 +580,7 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p) ret = (dev->regs.gpo_val >> shift32) & 0xff; break; default: - ret = acpi_reg_read_via_common(size, addr, p); + ret = acpi_reg_read_via_common(size, addr, priv); break; } @@ -589,13 +592,13 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_smc(int size, uint16_t addr, void *p) +acpi_reg_read_smc(int size, uint16_t addr, void *priv) { uint32_t ret = 0x00000000; addr &= 0x0f; - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); #ifdef ENABLE_ACPI_LOG if (size != 1) @@ -605,9 +608,9 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p) } static uint32_t -acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) +acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; @@ -638,6 +641,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) /* Miscellaneous Control Register */ ret = dev->regs.glbctl & 0xff; break; + + default: + break; } acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); @@ -645,9 +651,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) } static void -acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int sus_typ; @@ -719,13 +725,16 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) } dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; break; + + default: + break; } } static void -acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -782,7 +791,7 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) dev->regs.pmcntrl = val & 1; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.gpcntrl &= ~0x0002; @@ -795,9 +804,9 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -878,7 +887,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gporeg[addr & 3] = val; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0002; @@ -892,9 +901,9 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -965,7 +974,7 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0002; @@ -986,9 +995,9 @@ acpi_i2c_set(acpi_t *dev) } static void -acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -1044,15 +1053,15 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; break; default: - acpi_reg_write_via_common(size, addr, val, p); + acpi_reg_write_via_common(size, addr, val, priv); break; } } static void -acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -1102,20 +1111,20 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; break; default: - acpi_reg_write_via_common(size, addr, val, p); + acpi_reg_write_via_common(size, addr, val, priv); break; } } static void -acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; addr &= 0x0f; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0001; @@ -1127,9 +1136,9 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; addr &= 0x07; @@ -1171,76 +1180,79 @@ acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) acpi_update_irq(dev); } break; + + default: + break; } } static uint32_t -acpi_reg_read_common(int size, uint16_t addr, void *p) +acpi_reg_read_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; if (dev->vendor == VEN_ALI) - ret = acpi_reg_read_ali(size, addr, p); + ret = acpi_reg_read_ali(size, addr, priv); else if (dev->vendor == VEN_VIA) - ret = acpi_reg_read_via(size, addr, p); + ret = acpi_reg_read_via(size, addr, priv); else if (dev->vendor == VEN_VIA_596B) - ret = acpi_reg_read_via_596b(size, addr, p); + ret = acpi_reg_read_via_596b(size, addr, priv); else if (dev->vendor == VEN_INTEL) - ret = acpi_reg_read_intel(size, addr, p); + ret = acpi_reg_read_intel(size, addr, priv); else if (dev->vendor == VEN_SMC) - ret = acpi_reg_read_smc(size, addr, p); + ret = acpi_reg_read_smc(size, addr, priv); return ret; } static void -acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; if (dev->vendor == VEN_ALI) - acpi_reg_write_ali(size, addr, val, p); + acpi_reg_write_ali(size, addr, val, priv); else if (dev->vendor == VEN_VIA) - acpi_reg_write_via(size, addr, val, p); + acpi_reg_write_via(size, addr, val, priv); else if (dev->vendor == VEN_VIA_596B) - acpi_reg_write_via_596b(size, addr, val, p); + acpi_reg_write_via_596b(size, addr, val, priv); else if (dev->vendor == VEN_INTEL) - acpi_reg_write_intel(size, addr, val, p); + acpi_reg_write_intel(size, addr, val, priv); else if (dev->vendor == VEN_SMC) - acpi_reg_write_smc(size, addr, val, p); + acpi_reg_write_smc(size, addr, val, priv); } static uint32_t -acpi_aux_reg_read_common(int size, uint16_t addr, void *p) +acpi_aux_reg_read_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; if (dev->vendor == VEN_SMC) - ret = acpi_aux_reg_read_smc(size, addr, p); + ret = acpi_aux_reg_read_smc(size, addr, priv); return ret; } static void -acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; if (dev->vendor == VEN_SMC) - acpi_aux_reg_write_smc(size, addr, val, p); + acpi_aux_reg_write_smc(size, addr, val, priv); } static uint32_t -acpi_reg_readl(uint16_t addr, void *p) +acpi_reg_readl(uint16_t addr, void *priv) { uint32_t ret = 0x00000000; - ret = acpi_reg_read_common(4, addr, p); - ret |= (acpi_reg_read_common(4, addr + 1, p) << 8); - ret |= (acpi_reg_read_common(4, addr + 2, p) << 16); - ret |= (acpi_reg_read_common(4, addr + 3, p) << 24); + ret = acpi_reg_read_common(4, addr, priv); + ret |= (acpi_reg_read_common(4, addr + 1, priv) << 8); + ret |= (acpi_reg_read_common(4, addr + 2, priv) << 16); + ret |= (acpi_reg_read_common(4, addr + 3, priv) << 24); acpi_log("ACPI: Read L %08X from %04X\n", ret, addr); @@ -1248,12 +1260,12 @@ acpi_reg_readl(uint16_t addr, void *p) } static uint16_t -acpi_reg_readw(uint16_t addr, void *p) +acpi_reg_readw(uint16_t addr, void *priv) { uint16_t ret = 0x0000; - ret = acpi_reg_read_common(2, addr, p); - ret |= (acpi_reg_read_common(2, addr + 1, p) << 8); + ret = acpi_reg_read_common(2, addr, priv); + ret |= (acpi_reg_read_common(2, addr + 1, priv) << 8); acpi_log("ACPI: Read W %08X from %04X\n", ret, addr); @@ -1261,11 +1273,11 @@ acpi_reg_readw(uint16_t addr, void *p) } static uint8_t -acpi_reg_read(uint16_t addr, void *p) +acpi_reg_read(uint16_t addr, void *priv) { uint8_t ret = 0x00; - ret = acpi_reg_read_common(1, addr, p); + ret = acpi_reg_read_common(1, addr, priv); acpi_log("ACPI: Read B %02X from %04X\n", ret, addr); @@ -1273,14 +1285,14 @@ acpi_reg_read(uint16_t addr, void *p) } static uint32_t -acpi_aux_reg_readl(uint16_t addr, void *p) +acpi_aux_reg_readl(uint16_t addr, void *priv) { uint32_t ret = 0x00000000; - ret = acpi_aux_reg_read_common(4, addr, p); - ret |= (acpi_aux_reg_read_common(4, addr + 1, p) << 8); - ret |= (acpi_aux_reg_read_common(4, addr + 2, p) << 16); - ret |= (acpi_aux_reg_read_common(4, addr + 3, p) << 24); + ret = acpi_aux_reg_read_common(4, addr, priv); + ret |= (acpi_aux_reg_read_common(4, addr + 1, priv) << 8); + ret |= (acpi_aux_reg_read_common(4, addr + 2, priv) << 16); + ret |= (acpi_aux_reg_read_common(4, addr + 3, priv) << 24); acpi_log("ACPI: Read Aux L %08X from %04X\n", ret, addr); @@ -1288,12 +1300,12 @@ acpi_aux_reg_readl(uint16_t addr, void *p) } static uint16_t -acpi_aux_reg_readw(uint16_t addr, void *p) +acpi_aux_reg_readw(uint16_t addr, void *priv) { uint16_t ret = 0x0000; - ret = acpi_aux_reg_read_common(2, addr, p); - ret |= (acpi_aux_reg_read_common(2, addr + 1, p) << 8); + ret = acpi_aux_reg_read_common(2, addr, priv); + ret |= (acpi_aux_reg_read_common(2, addr + 1, priv) << 8); acpi_log("ACPI: Read Aux W %04X from %04X\n", ret, addr); @@ -1301,11 +1313,11 @@ acpi_aux_reg_readw(uint16_t addr, void *p) } static uint8_t -acpi_aux_reg_read(uint16_t addr, void *p) +acpi_aux_reg_read(uint16_t addr, void *priv) { uint8_t ret = 0x00; - ret = acpi_aux_reg_read_common(1, addr, p); + ret = acpi_aux_reg_read_common(1, addr, priv); acpi_log("ACPI: Read Aux B %02X from %04X\n", ret, addr); @@ -1313,59 +1325,59 @@ acpi_aux_reg_read(uint16_t addr, void *p) } static void -acpi_reg_writel(uint16_t addr, uint32_t val, void *p) +acpi_reg_writel(uint16_t addr, uint32_t val, void *priv) { acpi_log("ACPI: Write L %08X to %04X\n", val, addr); - acpi_reg_write_common(4, addr, val & 0xff, p); - acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p); - acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p); - acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); + acpi_reg_write_common(4, addr, val & 0xff, priv); + acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv); + acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv); + acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv); } static void -acpi_reg_writew(uint16_t addr, uint16_t val, void *p) +acpi_reg_writew(uint16_t addr, uint16_t val, void *priv) { acpi_log("ACPI: Write W %04X to %04X\n", val, addr); - acpi_reg_write_common(2, addr, val & 0xff, p); - acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); + acpi_reg_write_common(2, addr, val & 0xff, priv); + acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv); } static void -acpi_reg_write(uint16_t addr, uint8_t val, void *p) +acpi_reg_write(uint16_t addr, uint8_t val, void *priv) { acpi_log("ACPI: Write B %02X to %04X\n", val, addr); - acpi_reg_write_common(1, addr, val, p); + acpi_reg_write_common(1, addr, val, priv); } static void -acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) +acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *priv) { acpi_log("ACPI: Write Aux L %08X to %04X\n", val, addr); - acpi_aux_reg_write_common(4, addr, val & 0xff, p); - acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p); - acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p); - acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); + acpi_aux_reg_write_common(4, addr, val & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv); } static void -acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) +acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *priv) { acpi_log("ACPI: Write Aux W %04X to %04X\n", val, addr); - acpi_aux_reg_write_common(2, addr, val & 0xff, p); - acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); + acpi_aux_reg_write_common(2, addr, val & 0xff, priv); + acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv); } static void -acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write(uint16_t addr, uint8_t val, void *priv) { acpi_log("ACPI: Write Aux B %02X to %04X\n", val, addr); - acpi_aux_reg_write_common(1, addr, val, p); + acpi_aux_reg_write_common(1, addr, val, priv); } void @@ -1374,9 +1386,9 @@ acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) int size; switch (dev->vendor) { + default: case VEN_ALI: case VEN_INTEL: - default: size = 0x040; break; case VEN_SMC: @@ -1545,9 +1557,9 @@ acpi_pwrbtn_timer(void *priv) } static void -acpi_apm_out(uint16_t port, uint8_t val, void *p) +acpi_apm_out(uint16_t port, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; acpi_log("[%04X:%08X] APM write: %04X = %02X (AX = %04X, BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, AX, BX, CX); @@ -1557,7 +1569,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) if (port == 0x0001) { acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); dev->apm->cmd = val; - // acpi_raise_smi(dev, dev->apm->do_smi); +#if 0 + acpi_raise_smi(dev, dev->apm->do_smi); +#endif if (dev->apm->do_smi) smi_raise(); dev->regs.ali_soft_smi = 1; @@ -1575,9 +1589,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) } static uint8_t -acpi_apm_in(uint16_t port, void *p) +acpi_apm_in(uint16_t port, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; port &= 0x0001; @@ -1731,6 +1745,9 @@ acpi_init(const device_t *info) dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; dev->suspend_types[4] = SUS_SUSPEND; break; + + default: + break; } timer_add(&dev->timer, acpi_timer_overflow, dev, 0); diff --git a/src/apm.c b/src/apm.c index 76fc24257..8ea3f435d 100644 --- a/src/apm.c +++ b/src/apm.c @@ -52,9 +52,9 @@ apm_set_do_smi(apm_t *dev, uint8_t do_smi) } static void -apm_out(uint16_t port, uint8_t val, void *p) +apm_out(uint16_t port, uint8_t val, void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; apm_log("[%04X:%08X] APM write: %04X = %02X (BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, BX, CX); @@ -69,9 +69,9 @@ apm_out(uint16_t port, uint8_t val, void *p) } static uint8_t -apm_in(uint16_t port, void *p) +apm_in(uint16_t port, void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; uint8_t ret = 0xff; port &= 0x0001; @@ -87,17 +87,17 @@ apm_in(uint16_t port, void *p) } static void -apm_reset(void *p) +apm_reset(void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; dev->cmd = dev->stat = 0x00; } static void -apm_close(void *p) +apm_close(void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; free(dev); } diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 4f7951047..9ab21e449 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -41,6 +41,9 @@ #include <86box/machine.h> #include <86box/chipset.h> #include <86box/spd.h> +#ifndef USE_DRB_HACK +#include <86box/row.h> +#endif #define MEM_STATE_SHADOW_R 0x01 #define MEM_STATE_SHADOW_W 0x02 @@ -158,6 +161,26 @@ i420ex_smram_handler_phase1(i420ex_t *dev) (regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20)); } +#ifndef USE_DRB_HACK +static void +i420ex_drb_recalc(i420ex_t *dev) +{ + int i; + uint32_t boundary; + + for (i = 4; i >= 0; i--) + row_disable(i); + + for (i = 0; i <= 4; i++) { + boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff; + row_set_boundary(i, boundary); + } + + flushmmucache(); +} +#endif + + static void i420ex_write(int func, int addr, uint8_t val, void *priv) { @@ -289,7 +312,12 @@ i420ex_write(int func, int addr, uint8_t val, void *priv) case 0x62: case 0x63: case 0x64: +#ifdef USE_DRB_HACK spd_write_drbs(dev->regs, 0x60, 0x64, 1); +#else + dev->regs[addr] = val; + i420ex_drb_recalc(dev); +#endif break; case 0x66: case 0x67: @@ -452,7 +480,7 @@ i420ex_reset(void *priv) i420ex_write(0, 0x59 + i, 0x00, priv); for (uint8_t i = 0; i <= 4; i++) - i420ex_write(0, 0x60 + i, 0x01, priv); + dev->regs[0x60 + i] = 0x01; dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */ dev->smram_locked = 0; @@ -530,6 +558,11 @@ i420ex_init(const device_t *info) device_add(&ide_pci_2ch_device); +#ifndef USE_DRB_HACK + row_device.local = 4 | (1 << 8) | (0x01 << 16) | (8 << 24); + device_add((const device_t *) &row_device); +#endif + i420ex_reset_hard(dev); return dev; diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index ab34ddd02..0d07914b2 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -1537,7 +1537,12 @@ i4x0_reset(void *priv) i4x0_write(0, 0x5a + i, 0x00, priv); for (uint8_t i = 0; i <= dev->max_drb; i++) - i4x0_write(0, 0x60 + i, dev->drb_default, priv); + dev->regs[0x60 + i] = dev->drb_default; + + if (dev->type >= INTEL_430NX) { + for (uint8_t i = 0; i < 4; i++) + dev->regs[0x68 + i] = 0x00; + } if (dev->type >= INTEL_430FX) { dev->regs[0x72] &= 0xef; /* Forcibly unlock the SMRAM register. */ @@ -1621,7 +1626,7 @@ i4x0_init(const device_t *info) regs[0x59] = 0x0f; regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02; dev->max_drb = 3; - dev->drb_unit = 4; + dev->drb_unit = 1; dev->drb_default = 0x02; break; case INTEL_430LX: diff --git a/src/chipset/intel_i450kx.c b/src/chipset/intel_i450kx.c index d2c82d4bd..eb126c80a 100644 --- a/src/chipset/intel_i450kx.c +++ b/src/chipset/intel_i450kx.c @@ -326,13 +326,6 @@ pb_write(int func, int addr, uint8_t val, void *priv) dev->pb_pci_conf[addr] = val & /*0x1a*/ 0x1f; break; - case 0xb4: - dev->pb_pci_conf[addr] = val & 0xe0; - break; - case 0xb5: - dev->pb_pci_conf[addr] = val & 0x1f; - break; - case 0xb8: case 0xb9: dev->pb_pci_conf[addr] = val; @@ -689,7 +682,7 @@ i450kx_reset(void *priv) dev->pb_pci_conf[0xb0] = 0x00; dev->pb_pci_conf[0xb1] = 0x00; #endif - dev->pb_pci_conf[0xb4] = 0x00; + dev->pb_pci_conf[0xb4] = 0xff; dev->pb_pci_conf[0xb5] = 0x00; dev->pb_pci_conf[0xb8] = 0x05; dev->pb_pci_conf[0xb9] = 0x00; diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c index 6c0c1d0d3..106d5f793 100644 --- a/src/chipset/sis_85c496.c +++ b/src/chipset/sis_85c496.c @@ -38,10 +38,17 @@ #include <86box/machine.h> #include <86box/chipset.h> #include <86box/spd.h> +#ifndef USE_DRB_HACK +#include <86box/row.h> +#endif typedef struct sis_85c496_t { uint8_t cur_reg; uint8_t rmsmiblk_count; +#ifndef USE_DRB_HACK + uint8_t drb_default; + uint8_t drb_bits; +#endif uint8_t regs[127]; uint8_t pci_conf[256]; smram_t *smram; @@ -184,6 +191,26 @@ sis_85c496_ide_handler(sis_85c496_t *dev) } } +#ifndef USE_DRB_HACK +static void +sis_85c496_drb_recalc(sis_85c496_t *dev) +{ + int i; + uint32_t boundary; + + for (i = 7; i >= 0; i--) + row_disable(i); + + for (i = 0; i <= 7; i++) { + boundary = ((uint32_t) dev->pci_conf[0x48 + i]); + row_set_boundary(i, boundary); + } + + flushmmucache(); +} +#endif + + /* 00 - 3F = PCI Configuration, 40 - 7F = 85C496, 80 - FF = 85C497 */ static void sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) @@ -259,10 +286,12 @@ sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) case 0x4d: case 0x4e: case 0x4f: -#if 0 - dev->pci_conf[addr] = val; -#endif +#ifdef USE_DRB_HACK spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1); +#else + dev->pci_conf[addr] = val; + sis_85c496_drb_recalc(dev); +#endif break; case 0x50: case 0x51: /* Exclusive Area 0 Setup */ @@ -552,7 +581,7 @@ sis_85c496_reset(void *priv) // sis_85c49x_pci_write(0, 0x5a, 0x06, dev); for (uint8_t i = 0; i < 8; i++) - sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev); + dev->pci_conf[0x48 + i] = 0x02; sis_85c49x_pci_write(0, 0x80, 0x00, dev); sis_85c49x_pci_write(0, 0x81, 0x00, dev); @@ -643,6 +672,11 @@ static void timer_add(&dev->rmsmiblk_timer, sis_85c496_rmsmiblk_count, dev, 0); +#ifndef USE_DRB_HACK + row_device.local = 7 | (1 << 8) | (0x02 << 16) | (7 << 24); + device_add((const device_t *) &row_device); +#endif + sis_85c496_reset(dev); return dev; diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c index c1716469e..055d91183 100644 --- a/src/chipset/vl82c480.c +++ b/src/chipset/vl82c480.c @@ -121,10 +121,13 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv) } break; +/* TODO: This is actually Fast A20 disable. */ +#if 0 case 0xee: if (mem_a20_alt) outb(0x92, inb(0x92) & ~2); break; +#endif default: break; @@ -146,10 +149,13 @@ vl82c480_read(uint16_t addr, void *priv) ret = dev->regs[dev->idx]; break; +/* TODO: This is actually Fast A20 enable. */ +#if 0 case 0xee: if (!mem_a20_alt) outb(0x92, inb(0x92) | 2); break; +#endif case 0xef: softresetx86(); diff --git a/src/codegen/codegen_ops.c b/src/codegen/codegen_ops.c index 46a49f118..894ebb100 100644 --- a/src/codegen/codegen_ops.c +++ b/src/codegen/codegen_ops.c @@ -128,6 +128,54 @@ RecompOpFn recomp_opcodes_0f[512] = { // clang-format on }; +RecompOpFn recomp_opcodes_0f_no_mmx[512] = { + // clang-format off + /*16-bit data*/ +/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ +/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*80*/ ropJO_w, ropJNO_w, ropJB_w, ropJNB_w, ropJE_w, ropJNE_w, ropJBE_w, ropJNBE_w, ropJS_w, ropJNS_w, ropJP_w, ropJNP_w, ropJL_w, ropJNL_w, ropJLE_w, ropJNLE_w, +/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, NULL, NULL, NULL, NULL, +/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_w_b, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_w_b, NULL, + +/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + + /*32-bit data*/ +/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ +/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*80*/ ropJO_l, ropJNO_l, ropJB_l, ropJNB_l, ropJE_l, ropJNE_l, ropJBE_l, ropJNBE_l, ropJS_l, ropJNS_l, ropJP_l, ropJNP_l, ropJL_l, ropJNL_l, ropJLE_l, ropJNLE_l, +/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, NULL, NULL, NULL, NULL, +/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_l_b, ropMOVZX_l_w, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_l_b, ropMOVSX_l_w, + +/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + // clang-format on +}; + RecompOpFn recomp_opcodes_d8[512] = { // clang-format off /*16-bit data*/ diff --git a/src/codegen/codegen_ops.h b/src/codegen/codegen_ops.h index f92ba4f6d..5c19fb666 100644 --- a/src/codegen/codegen_ops.h +++ b/src/codegen/codegen_ops.h @@ -7,6 +7,7 @@ typedef uint32_t (*RecompOpFn)(uint8_t opcode, uint32_t fetchdat, uint32_t op_32 extern RecompOpFn recomp_opcodes[512]; extern RecompOpFn recomp_opcodes_0f[512]; +extern RecompOpFn recomp_opcodes_0f_no_mmx[512]; extern RecompOpFn recomp_opcodes_d8[512]; extern RecompOpFn recomp_opcodes_d9[512]; extern RecompOpFn recomp_opcodes_da[512]; diff --git a/src/codegen/codegen_x86-64.c b/src/codegen/codegen_x86-64.c index c02e8a7c2..3934b4ac5 100644 --- a/src/codegen/codegen_x86-64.c +++ b/src/codegen/codegen_x86-64.c @@ -845,7 +845,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p switch (opcode) { case 0x0f: op_table = x86_dynarec_opcodes_0f; - recomp_op_table = recomp_opcodes_0f; + recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f; over = 1; break; diff --git a/src/codegen/codegen_x86.c b/src/codegen/codegen_x86.c index c4b32c8a2..712fbe087 100644 --- a/src/codegen/codegen_x86.c +++ b/src/codegen/codegen_x86.c @@ -1884,7 +1884,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p switch (opcode) { case 0x0f: op_table = x86_dynarec_opcodes_0f; - recomp_op_table = recomp_opcodes_0f; + recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f; over = 1; break; diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c index d49fcecbf..b0250fb7d 100644 --- a/src/codegen_new/codegen.c +++ b/src/codegen_new/codegen.c @@ -399,7 +399,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p last_prefix = 0x0f; #endif op_table = x86_dynarec_opcodes_0f; - recomp_op_table = recomp_opcodes_0f; + recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f; over = 1; break; @@ -634,11 +634,11 @@ generate_call: } opcode_3dnow = fastreadb(cs + opcode_pc); - if (recomp_opcodes_3DNOW[opcode_3dnow]) { + if (!fpu_softfloat && recomp_opcodes_3DNOW[opcode_3dnow]) { next_pc = opcode_pc + 1; op_table = (OpFn *) x86_dynarec_opcodes_3DNOW; - recomp_op_table = recomp_opcodes_3DNOW; + recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_3DNOW; opcode = opcode_3dnow; recomp_opcode_mask = 0xff; opcode_mask = 0xff; diff --git a/src/codegen_new/codegen_ops.c b/src/codegen_new/codegen_ops.c index 698a7899b..ae93aa80f 100644 --- a/src/codegen_new/codegen_ops.c +++ b/src/codegen_new/codegen_ops.c @@ -144,6 +144,54 @@ RecompOpFn recomp_opcodes_0f[512] = { // clang-format on }; +RecompOpFn recomp_opcodes_0f_no_mmx[512] = { + // clang-format off + /*16-bit data*/ +/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ +/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*80*/ ropJO_16, ropJNO_16, ropJB_16, ropJNB_16, ropJE_16, ropJNE_16, ropJBE_16, ropJNBE_16, ropJS_16, ropJNS_16, ropJP_16, ropJNP_16, ropJL_16, ropJNL_16, ropJLE_16, ropJNLE_16, +/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, ropSHLD_16_imm, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, ropSHRD_16_imm, NULL, NULL, NULL, +/*b0*/ NULL, NULL, ropLSS_16, NULL, ropLFS_16, ropLGS_16, ropMOVZX_16_8, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_16_8, NULL, + +/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + + /*32-bit data*/ +/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ +/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*80*/ ropJO_32, ropJNO_32, ropJB_32, ropJNB_32, ropJE_32, ropJNE_32, ropJBE_32, ropJNBE_32, ropJS_32, ropJNS_32, ropJP_32, ropJNP_32, ropJL_32, ropJNL_32, ropJLE_32, ropJNLE_32, +/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, ropSHLD_32_imm, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, ropSHRD_32_imm, NULL, NULL, NULL, +/*b0*/ NULL, NULL, ropLSS_32, NULL, ropLFS_32, ropLGS_32, ropMOVZX_32_8, ropMOVZX_32_16, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_32_8, ropMOVSX_32_16, + +/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + // clang-format on +}; + RecompOpFn recomp_opcodes_3DNOW[256] = { // clang-format off #if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64 diff --git a/src/codegen_new/codegen_ops.h b/src/codegen_new/codegen_ops.h index 9cef07e15..352d95f13 100644 --- a/src/codegen_new/codegen_ops.h +++ b/src/codegen_new/codegen_ops.h @@ -9,6 +9,7 @@ typedef uint32_t (*RecompOpFn)(codeblock_t *block, struct ir_data_t *ir, uint8_t extern RecompOpFn recomp_opcodes[512]; extern RecompOpFn recomp_opcodes_0f[512]; +extern RecompOpFn recomp_opcodes_0f_no_mmx[512]; extern RecompOpFn recomp_opcodes_3DNOW[256]; extern RecompOpFn recomp_opcodes_d8[512]; extern RecompOpFn recomp_opcodes_d9[512]; diff --git a/src/config.c b/src/config.c index bb200dcbd..32824c2d4 100644 --- a/src/config.c +++ b/src/config.c @@ -515,13 +515,8 @@ load_machine(void) cpu_use_dynarec = !!ini_section_get_int(cat, "cpu_use_dynarec", 0); fpu_softfloat = !!ini_section_get_int(cat, "fpu_softfloat", 0); - /*The IBM PS/2 model 70 type 4 BIOS does heavy tests to the FPU in 80-bit precision mode, requiring softfloat - otherwise it would always throw error 12903 on POST, so always disable dynarec and enable softfloat for this - machine only.*/ - if (!strcmp(machines[machine].internal_name, "ibmps2_m70_type4")) { - cpu_use_dynarec = 0; + if (machine_has_flags(machine, MACHINE_SOFTFLOAT_ONLY)) fpu_softfloat = 1; - } p = ini_section_get_string(cat, "time_sync", NULL); if (p != NULL) { @@ -898,11 +893,11 @@ load_ports(void) sprintf(temp, "serial%d_enabled", c + 1); com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1); - /* +#if 0 sprintf(temp, "serial%d_device", c + 1); p = (char *) ini_section_get_string(cat, temp, "none"); com_ports[c].device = com_device_get_from_internal_name(p); - */ +#endif sprintf(temp, "serial%d_passthrough_enabled", c + 1); serial_passthrough_enabled[c] = !!ini_section_get_int(cat, temp, 0); @@ -1080,8 +1075,8 @@ load_hard_disks(void) hdd[c].bus = hdd_string_to_bus(s, 0); switch (hdd[c].bus) { - case HDD_BUS_DISABLED: default: + case HDD_BUS_DISABLED: max_spt = max_hpc = max_tracks = 0; break; @@ -1311,8 +1306,10 @@ load_floppy_drives(void) else strncpy(floppyfns[c], p, 511); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ +#if 0 + if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); +#endif sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); ini_section_delete_var(cat, temp); @@ -1377,8 +1374,10 @@ load_floppy_and_cdrom_drives(void) else strncpy(floppyfns[c], p, 511); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ +#if 0 + if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); +#endif sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); sprintf(temp, "fdd_%02i_turbo", c + 1); @@ -2533,6 +2532,9 @@ save_network(void) case NET_TYPE_VDE: ini_section_set_string(cat, temp, "vde"); break; + + default: + break; } sprintf(temp, "net_%02i_host_device", c + 1); @@ -2542,7 +2544,9 @@ save_network(void) else ini_section_set_string(cat, temp, net_cards_conf[c].host_dev_name); } else { - /* ini_section_set_string(cat, temp, "none"); */ +#if 0 + ini_section_set_string(cat, temp, "none"); +#endif ini_section_delete_var(cat, temp); } @@ -2573,7 +2577,7 @@ save_ports(void) else ini_section_set_int(cat, temp, com_ports[c].enabled); - /* +#if 0 sprintf(temp, "serial%d_type", c + 1); if (!com_ports[c].enabled)) ini_section_delete_var(cat, temp); @@ -2586,7 +2590,7 @@ save_ports(void) else ini_section_set_string(cat, temp, (char *) com_device_get_internal_name(com_ports[c].device)); - */ +#endif sprintf(temp, "serial%d_passthrough_enabled", c + 1); if (serial_passthrough_enabled[c]) { diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 925594a11..e0419a9f7 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -70,6 +70,38 @@ static int in_rep = 0, repeating = 0, rep_c_flag = 0; static int oldc, clear_lock = 0; static int refresh = 0, cycdiff; +static int access_code = 0; +static int hlda = 0; +static int not_ready = 0; +static int bus_request_type = 0; +static int pic_data = -1; +static int last_was_code = 0; +static uint16_t mem_data = 0; +static uint32_t mem_seg = 0; +static uint16_t mem_addr = 0; +static int schedule_fetch = 1; +static int pasv = 0; + +#define BUS_OUT 1 +#define BUS_HIGH 2 +#define BUS_WIDE 4 +#define BUS_CODE 8 +#define BUS_IO 16 +#define BUS_MEM 32 +#define BUS_PIC 64 +#define BUS_ACCESS_TYPE (BUS_CODE | BUS_IO | BUS_MEM | BUS_PIC) + +#define BUS_CYCLE (biu_cycles & 3) +#define BUS_CYCLE_T1 biu_cycles = 0 +#define BUS_CYCLE_NEXT biu_cycles = (biu_cycles + 1) & 3 + +enum { + BUS_T1 = 0, + BUS_T2, + BUS_T3, + BUS_T4 +}; + /* Various things needed for 8087. */ #define OP_TABLE(name) ops_##name @@ -151,7 +183,7 @@ x808x_log(const char *fmt, ...) # define x808x_log(fmt, ...) #endif -static void pfq_add(int c, int add); +static void pfq_add(void); static void set_pzs(int bits); uint16_t @@ -172,62 +204,344 @@ clock_end(void) int diff = cycdiff - cycles; /* On 808x systems, clock speed is usually crystal frequency divided by an integer. */ - tsc += (uint64_t) diff * ((uint64_t) xt_cpu_multi >> 32ULL); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ + tsc += ((uint64_t) diff * ((uint64_t) xt_cpu_multi >> 32ULL)); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) timer_process(); } static void -fetch_and_bus(int c, int bus) -{ - if (refresh > 0) { - /* Finish the current fetch, if any. */ - cycles -= ((4 - (biu_cycles & 3)) & 3); - pfq_add((4 - (biu_cycles & 3)) & 3, 1); - /* Add 4 memory access cycles. */ - cycles -= 4; - pfq_add(4, 0); +process_timers(void) +{ + clock_end(); + clock_start(); +} - refresh--; +static void +cycles_forward(int c) +{ + cycles -= c; + + if (!is286) + process_timers(); +} + +static void +bus_outb(uint16_t port, uint8_t val) +{ + int old_cycles = cycles; + + cycles--; + outb(port, val); + resub_cycles(old_cycles); +} + +static void +bus_outw(uint16_t port, uint16_t val) +{ + int old_cycles = cycles; + + cycles--; + outw(port, val); + resub_cycles(old_cycles); +} + +static uint8_t +bus_inb(uint16_t port) +{ + int old_cycles = cycles; + uint8_t ret; + + cycles--; + ret = inb(port); + resub_cycles(old_cycles); + + return ret; +} + +static uint16_t +bus_inw(uint16_t port) +{ + int old_cycles = cycles; + uint16_t ret; + + cycles--; + ret = inw(port); + resub_cycles(old_cycles); + + return ret; +} + +static void +bus_do_io(int io_type) +{ + last_was_code = 0; + + x808x_log("(%02X) bus_do_io(%02X): %04X\n", opcode, io_type, cpu_state.eaaddr); + + if (io_type & BUS_OUT) { + if (io_type & BUS_WIDE) + bus_outw((uint16_t) cpu_state.eaaddr, AX); + else if (io_type & BUS_HIGH) + bus_outb(((uint16_t) cpu_state.eaaddr + 1) & 0xffff, AH); + else + bus_outb((uint16_t) cpu_state.eaaddr, AL); + } else { + if (io_type & BUS_WIDE) + AX = bus_inw((uint16_t) cpu_state.eaaddr); + else if (io_type & BUS_HIGH) + AH = bus_inb(((uint16_t) cpu_state.eaaddr + 1) & 0xffff); + else + AL = bus_inb((uint16_t) cpu_state.eaaddr); } - pfq_add(c, !bus); - if (bus < 2) { - clock_end(); - clock_start(); + process_timers(); +} + +static void +bus_writeb(uint32_t seg, uint32_t addr, uint8_t val) +{ + write_mem_b(seg + addr, val); +} + +static void +bus_writew(uint32_t seg, uint32_t addr, uint16_t val) +{ + write_mem_w(seg + addr, val); +} + +static uint8_t +bus_readb(uint32_t seg, uint32_t addr) +{ + uint8_t ret = read_mem_b(seg + addr); + + return ret; +} + +static uint16_t +bus_readw(uint32_t seg, uint32_t addr) +{ + uint16_t ret = read_mem_w(seg + addr); + + return ret; +} + +static void +bus_do_mem(int io_type) +{ + last_was_code = 0; + + if (io_type & BUS_OUT) { + if (io_type & BUS_WIDE) + bus_writew(mem_seg, (uint32_t) mem_addr, mem_data); + else if (io_type & BUS_HIGH) { + if (is186 && !is_nec) + bus_writeb(mem_seg, ((uint32_t) mem_addr) + 1, mem_data >> 8); + else + bus_writeb(mem_seg, (uint32_t) ((mem_addr + 1) & 0xffff), mem_data >> 8); + } else + bus_writeb(mem_seg, (uint32_t) mem_addr, mem_data & 0xff); + } else { + if (io_type & BUS_WIDE) + mem_data = bus_readw(mem_seg, (uint32_t) mem_addr); + else if (io_type & BUS_HIGH) { + if (is186 && !is_nec) + mem_data = (mem_data & 0x00ff) | (((uint16_t) bus_readb(mem_seg, ((uint32_t) mem_addr) + 1)) << 8); + else + mem_data = (mem_data & 0x00ff) | (((uint16_t) bus_readb(mem_seg, (uint32_t) ((mem_addr + 1) & 0xffff))) << 8); + } else + mem_data = (mem_data & 0xff00) | ((uint16_t) bus_readb(mem_seg, (uint32_t) mem_addr)); } } static void -wait(int c, int bus) +run_bus_cycle(int io_type) { - cycles -= c; - fetch_and_bus(c, bus); + int do_bus_access = (io_type != 0) && (!(io_type & BUS_CODE) || schedule_fetch); + + x808x_log("[%04X:%04X] %02X bus access %02X (%i)\n", CS, cpu_state.pc, opcode, io_type, do_bus_access); + + if (do_bus_access) { + if (not_ready > 0) { + x808x_log("[%04X:%04X] %02X TW x%i\n", CS, cpu_state.pc, opcode, not_ready); + cycles_forward(not_ready); + not_ready = 0; + } + + switch(BUS_CYCLE) { + case BUS_T1: + access_code = !!(io_type & BUS_CODE); + break; + case BUS_T3: + switch (io_type & BUS_ACCESS_TYPE) { + case BUS_CODE: + pfq_add(); + last_was_code = 1; + break; + case BUS_IO: + bus_do_io(io_type); + break; + case BUS_MEM: + bus_do_mem(io_type); + break; + case BUS_PIC: + pic_data = pic_irq_ack(); + last_was_code = 0; + break; + default: + break; + } + break; + default: + break; + } + } } -/* This is for external subtraction of cycles. */ +static void +run_dma_cycle(int idle) +{ + if (not_ready > 0) { + /* Subtract one not ready cycle. */ + not_ready--; + } else if (hlda > 0) { + hlda--; + /* DMAWAIT is two cycles in, the actual wait states + are inserted with one cycle of delay. */ + if (hlda == 0) { + /* Deassert READY. */ + not_ready = 6; + } + } else if ((refresh > 0) && (in_lock == 0) && (idle || (BUS_CYCLE >= BUS_T3))) { + /* Refresh pending and it's either non-bus cycle or T3-T4, + raise HLDA. */ + hlda = 2; + /* Decrease the refresh count. */ + refresh--; + } +} + +static void +cycles_idle(int c) +{ + int d; + + for (d = 0; d < c; d++) { + x808x_log("[%04X:%04X] %02X TI\n", CS, cpu_state.pc, opcode); + + cycles_forward(1); + run_dma_cycle(1); + } +} + +static void +cycles_biu(int bus, int init) +{ + /* T1, T2 = Nothing, T3 = Start and schedule, T4 = Nothing */ + pasv = (bus || ((BUS_CYCLE == BUS_T1) && schedule_fetch)) ? 0 : 1; + + x808x_log("cycles_biu(%i, %i): %i, %i, %i, %i\n", bus, init, prefetching, pfq_pos, pfq_size, BUS_CYCLE); + if (bus) { + /* CPU wants non-code bus access. */ + if (init) { + if (schedule_fetch) { + switch (BUS_CYCLE) { + case BUS_T1: + case BUS_T2: + BUS_CYCLE_T1; /* Simply abort the prefetch before actual scheduling, no penalty. */ + break; + case BUS_T3: + case BUS_T4: + cycles_idle(5 - BUS_CYCLE); /* Leftover BIU cycles + 2 idle cycles. */ + BUS_CYCLE_T1; /* Abort the prefetch. */ + break; + } + + schedule_fetch = 0; + access_code = 0; + } + } + + run_bus_cycle(bus_request_type); + } else { + /* CPU wants idle or code bus access. */ + if (schedule_fetch) + run_bus_cycle(BUS_CODE); + } + + if (BUS_CYCLE == BUS_T3) + schedule_fetch = prefetching && (pfq_pos < pfq_size); + + run_dma_cycle(pasv); + + BUS_CYCLE_NEXT; +} + +#ifdef REENIGNE_MODELING +static void +bus_init(void) +{ + /* Replacement for the old access() stuff. */ + if ((BUS_CYCLE == BUS_T4) && last_was_code && (opcode != 0x8f) && (opcode != 0xc7) && (opcode != 0xcc) && (opcode != 0xcd) && (opcode != 0xce) && ((opcode & 0xf0) != 0xa0)) + cycles_idle(1); + + cycles_idle(2); + + while ((BUS_CYCLE == BUS_T2) || (BUS_CYCLE == BUS_T3)) + cycles_idle(1); +} +#endif + +/* Bus: + 0 CPU cycles without bus access. + 1 CPU cycle T1-T4, bus access. + 2 CPU cycle Tw (wait state). + 3 CPU cycle Ti (idle). + */ +static void +wait(int c, int bus) +{ + int d; + + if (c < 0) + pclog("Negative cycles: %i!\n", c); + + x808x_log("[%04X:%04X] %02X %i cycles (%i)\n", CS, cpu_state.pc, opcode, c, bus); + + for (d = 0; d < c; d++) { + x808x_log("[%04X:%04X] %02X cycle %i BIU\n", CS, cpu_state.pc, opcode, d); + cycles_biu(bus, !d); + x808x_log("[%04X:%04X] %02X cycle %i EU\n", CS, cpu_state.pc, opcode, d); + cycles_forward(1); + } +} + +/* This is for external subtraction of cycles, ie. wait states. */ void sub_cycles(int c) { - if (c <= 0) - return; - - cycles -= c; - - if (!is286) - fetch_and_bus(c, 2); + if (is286) + cycles -= c; + else { + if (c > 0) + cycles_idle(c); + } } void resub_cycles(int old_cycles) { - int cyc_diff = 0; + int i, cyc_diff = 0; if (old_cycles > cycles) { cyc_diff = old_cycles - cycles; - cycles = old_cycles; - sub_cycles(cyc_diff); + + for (i = 0; i < cyc_diff; i++) { + if (not_ready > 0) + not_ready--; + } } + + process_timers(); } #undef readmemb @@ -238,53 +552,63 @@ resub_cycles(int old_cycles) static void cpu_io(int bits, int out, uint16_t port) { - int old_cycles = cycles; +#ifdef REENIGNE_MODELING + bus_init(); +#endif if (out) { - wait(4, 1); if (bits == 16) { if (is8086 && !(port & 1)) { - old_cycles = cycles; - outw(port, AX); - } else { + bus_request_type = BUS_IO | BUS_OUT | BUS_WIDE; + wait(4, 1); + } else { + bus_request_type = BUS_IO | BUS_OUT; + wait(4, 1); + schedule_fetch = 0; + bus_request_type = BUS_IO | BUS_OUT | BUS_HIGH; wait(4, 1); - old_cycles = cycles; - outb(port++, AL); - outb(port, AH); } } else { - old_cycles = cycles; - outb(port, AL); + bus_request_type = BUS_IO | BUS_OUT; + wait(4, 1); } } else { - wait(4, 1); if (bits == 16) { if (is8086 && !(port & 1)) { - old_cycles = cycles; - AX = inw(port); - } else { + bus_request_type = BUS_IO | BUS_WIDE; + wait(4, 1); + } else { + bus_request_type = BUS_IO; + wait(4, 1); + schedule_fetch = 0; + bus_request_type = BUS_IO | BUS_HIGH; wait(4, 1); - old_cycles = cycles; - AL = inb(port++); - AH = inb(port); } } else { - old_cycles = cycles; - AL = inb(port); + bus_request_type = BUS_IO; + wait(4, 1); } } - resub_cycles(old_cycles); + bus_request_type = 0; } /* Reads a byte from the memory and advances the BIU. */ static uint8_t -readmemb(uint32_t a) +readmemb(uint32_t s, uint16_t a) { uint8_t ret; +#ifdef REENIGNE_MODELING + bus_init(); +#endif + + mem_seg = s; + mem_addr = a; + bus_request_type = BUS_MEM; wait(4, 1); - ret = read_mem_b(a); + ret = mem_data & 0xff; + bus_request_type = 0; return ret; } @@ -298,6 +622,8 @@ readmembf(uint32_t a) a = cs + (a & 0xffff); ret = read_mem_b(a); + last_was_code = 1; + return ret; } @@ -307,14 +633,24 @@ readmemw(uint32_t s, uint16_t a) { uint16_t ret; - wait(4, 1); - if (is8086 && !(a & 1)) - ret = read_mem_w(s + a); - else { +#ifdef REENIGNE_MODELING + bus_init(); +#endif + + mem_seg = s; + mem_addr = a; + if (is8086 && !(a & 1)) { + bus_request_type = BUS_MEM | BUS_WIDE; + wait(4, 1); + } else { + bus_request_type = BUS_MEM | BUS_HIGH; + wait(4, 1); + schedule_fetch = 0; + bus_request_type = BUS_MEM; wait(4, 1); - ret = read_mem_b(s + a); - ret |= read_mem_b(s + ((is186 && !is_nec) ? (a + 1) : (a + 1) & 0xffff)) << 8; } + ret = mem_data; + bus_request_type = 0; return ret; } @@ -326,6 +662,8 @@ readmemwf(uint16_t a) ret = read_mem_w(cs + (a & 0xffff)); + last_was_code = 1; + return ret; } @@ -335,7 +673,7 @@ readmem(uint32_t s) if (opcode & 1) return readmemw(s, cpu_state.eaaddr); else - return (uint16_t) readmemb(s + cpu_state.eaaddr); + return (uint16_t) readmemb(s, cpu_state.eaaddr); } static uint32_t @@ -357,6 +695,8 @@ readmemq(uint32_t s, uint16_t a) temp = (uint64_t) (readmeml(s, a + 4)) << 32; temp |= readmeml(s, a); + last_was_code = 0; + return temp; } @@ -366,8 +706,16 @@ writememb(uint32_t s, uint32_t a, uint8_t v) { uint32_t addr = s + a; +#ifdef REENIGNE_MODELING + bus_init(); +#endif + + mem_seg = s; + mem_addr = a; + mem_data = v; + bus_request_type = BUS_MEM | BUS_OUT; wait(4, 1); - write_mem_b(addr, v); + bus_request_type = 0; if ((addr >= 0xf0000) && (addr <= 0xfffff)) last_addr = addr & 0xffff; @@ -379,15 +727,24 @@ writememw(uint32_t s, uint32_t a, uint16_t v) { uint32_t addr = s + a; - wait(4, 1); - if (is8086 && !(a & 1)) - write_mem_w(addr, v); - else { - write_mem_b(addr, v & 0xff); +#ifdef REENIGNE_MODELING + bus_init(); +#endif + + mem_seg = s; + mem_addr = a; + mem_data = v; + if (is8086 && !(a & 1)) { + bus_request_type = BUS_MEM | BUS_OUT | BUS_WIDE; + wait(4, 1); + } else { + bus_request_type = BUS_MEM | BUS_OUT | BUS_HIGH; + wait(4, 1); + schedule_fetch = 0; + bus_request_type = BUS_MEM | BUS_OUT; wait(4, 1); - addr = s + ((is186 && !is_nec) ? (a + 1) : ((a + 1) & 0xffff)); - write_mem_b(addr, v >> 8); } + bus_request_type = 0; if ((addr >= 0xf0000) && (addr <= 0xfffff)) last_addr = addr & 0xffff; @@ -420,21 +777,26 @@ static void pfq_write(void) { uint16_t tempw; + /* Byte fetch on odd addres on 8086 to simulate the HL toggle. */ + int fetch_word = is8086 && !(pfq_ip & 1); - if (is8086 && (pfq_pos < (pfq_size - 1))) { + if (fetch_word && (pfq_pos < (pfq_size - 1))) { /* The 8086 fetches 2 bytes at a time, and only if there's at least 2 bytes free in the queue. */ tempw = readmemwf(pfq_ip); *(uint16_t *) &(pfq[pfq_pos]) = tempw; pfq_ip = (pfq_ip + 2) & 0xffff; pfq_pos += 2; - } else if (!is8086 && (pfq_pos < pfq_size)) { + } else if (!fetch_word && (pfq_pos < pfq_size)) { /* The 8088 fetches 1 byte at a time, and only if there's at least 1 byte free in the queue. */ pfq[pfq_pos] = readmembf(pfq_ip); pfq_ip = (pfq_ip + 1) & 0xffff; pfq_pos++; } + + if (pfq_pos >= pfq_size) + pfq_pos = pfq_size; } static uint8_t @@ -446,12 +808,18 @@ pfq_read(void) for (int i = 0; i < (pfq_size - 1); i++) pfq[i] = pfq[i + 1]; pfq_pos--; + if (pfq_pos < 0) + pfq_pos = 0; cpu_state.pc = (cpu_state.pc + 1) & 0xffff; return temp; } /* Fetches a byte from the prefetch queue, or from memory if the queue has - been drained. */ + been drained. + + Cycles: 1 If fetching from the queue; + (4 - (biu_cycles & 3)) If fetching from the bus - fetch into the queue; + 1 If fetching from the bus - delay. */ static uint8_t pfq_fetchb_common(void) { @@ -461,7 +829,8 @@ pfq_fetchb_common(void) /* Reset prefetch queue internal position. */ pfq_ip = cpu_state.pc; /* Fill the queue. */ - wait(4 - (biu_cycles & 3), 0); + while (pfq_pos == 0) + wait(1, 0); } /* Fetch. */ @@ -469,6 +838,7 @@ pfq_fetchb_common(void) return temp; } +/* The timings are above. */ static uint8_t pfq_fetchb(void) { @@ -504,18 +874,10 @@ pfq_fetch(void) /* Adds bytes to the prefetch queue based on the instruction's cycle count. */ static void -pfq_add(int c, int add) +pfq_add(void) { - int d; - - if ((c <= 0) || (pfq_pos >= pfq_size)) - return; - - for (d = 0; d < c; d++) { - biu_cycles = (biu_cycles + 1) & 0x03; - if (prefetching && add && (biu_cycles == 0x00)) - pfq_write(); - } + if (prefetching && (pfq_pos < pfq_size)) + pfq_write(); } /* Clear the prefetch queue - called on reset and on anything that affects either CS or IP. */ @@ -524,6 +886,16 @@ pfq_clear(void) { pfq_pos = 0; prefetching = 0; + schedule_fetch = 0; + + BUS_CYCLE_T1; +} + +static void +pfq_suspend(void) +{ + pfq_clear(); + cycles_idle(3); } static void @@ -543,7 +915,7 @@ load_seg(uint16_t seg, x86seg *s) void reset_808x(int hard) { - biu_cycles = 0; + BUS_CYCLE_T1; in_rep = 0; in_lock = 0; completed = 1; @@ -573,10 +945,24 @@ reset_808x(int hard) rammask = 0xfffff; prefetching = 1; + + schedule_fetch = 1; + pasv = 0; + cpu_alu_op = 0; use_custom_nmi_vector = 0x00; custom_nmi_vector = 0x00000000; + + access_code = 0; + hlda = 0; + not_ready = 0; + bus_request_type = 0; + pic_data = -1; + last_was_code = 0; + mem_data = 0; + mem_seg = 0; + mem_addr = 0; } static void @@ -584,6 +970,7 @@ set_ip(uint16_t new_ip) { pfq_ip = cpu_state.pc = new_ip; prefetching = 1; + schedule_fetch = prefetching && (pfq_pos < pfq_size); } /* Memory refresh read - called by reads and writes on DMA channel 0. */ @@ -626,34 +1013,34 @@ do_mod_rm(void) if (cpu_mod == 3) return; - wait(1, 0); + wait(2, 0); if ((rmdat & 0xc7) == 0x06) { - wait(1, 0); cpu_state.eaaddr = pfq_fetchw(); easeg = ovr_seg ? *ovr_seg : ds; - wait(1, 0); + wait(2, 0); return; - } else - switch (cpu_rm) { - case 0: - case 3: - wait(2, 0); - break; - case 1: - case 2: - wait(3, 0); - break; - } + } else switch (cpu_rm) { + case 0: + case 3: + wait(2, 0); + break; + case 1: + case 2: + wait(3, 0); + break; + } cpu_state.eaaddr = (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm]; switch (rmdat & 0xc0) { case 0x40: - wait(3, 0); + wait(2, 0); cpu_state.eaaddr += sign_extend(pfq_fetchb()); + wait(1, 0); break; case 0x80: - wait(3, 0); + wait(2, 0); cpu_state.eaaddr += pfq_fetchw(); + wait(1, 0); break; } cpu_state.eaaddr &= 0xffff; @@ -677,7 +1064,7 @@ geteab(void) if (cpu_mod == 3) return (getr8(cpu_rm)); - return readmemb(easeg + cpu_state.eaaddr); + return readmemb(easeg, cpu_state.eaaddr); } /* Reads a word from the effective address. */ @@ -721,7 +1108,7 @@ read_ea(int memory_only, int bits) if (bits == 16) cpu_data = readmemw(easeg, cpu_state.eaaddr); else - cpu_data = readmemb(easeg + cpu_state.eaaddr); + cpu_data = readmemb(easeg, cpu_state.eaaddr); return; } if (!memory_only) { @@ -739,7 +1126,7 @@ read_ea2(int bits) if (bits == 16) cpu_data = readmemw(easeg, cpu_state.eaaddr); else - cpu_data = readmemb(easeg + cpu_state.eaaddr); + cpu_data = readmemb(easeg, cpu_state.eaaddr); } /* Writes a byte to the effective address. */ @@ -814,135 +1201,6 @@ pop(void) return readmemw(ss, cpu_state.eaaddr); } -static void -access(int num, int bits) -{ - switch (num) { - case 0: - case 61: - case 63: - case 64: - case 67: - case 69: - case 71: - case 72: - default: - break; - case 1: - case 6: - case 7: - case 8: - case 9: - case 17: - case 20: - case 21: - case 24: - case 28: - case 47: - case 48: - case 49: - case 50: - case 51: - case 55: - case 56: - case 62: - case 66: - case 68: - wait(1, 0); - break; - case 3: - case 11: - case 15: - case 22: - case 23: - case 25: - case 26: - case 35: - case 44: - case 45: - case 46: - case 52: - case 53: - case 54: - wait(2, 0); - break; - case 16: - case 18: - case 19: - case 27: - case 32: - case 37: - case 42: - wait(3, 0); - break; - case 10: - case 12: - case 13: - case 14: - case 29: - case 30: - case 33: - case 34: - case 39: - case 41: - case 60: - wait(4, 0); - break; - case 4: - case 70: - wait(5, 0); - break; - case 31: - case 38: - case 40: - wait(6, 0); - break; - case 5: - if (opcode == 0xcc) - wait(7, 0); - else - wait(4, 0); - break; - case 36: - wait(1, 0); - pfq_clear(); - wait(1, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 43: - wait(2, 0); - pfq_clear(); - wait(1, 0); - break; - case 57: - if (cpu_mod != 3) - wait(2, 0); - wait(4, 0); - break; - case 58: - if (cpu_mod != 3) - wait(1, 0); - wait(4, 0); - break; - case 59: - wait(2, 0); - pfq_clear(); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 65: - wait(1, 0); - pfq_clear(); - wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); - break; - } -} - /* Calls an interrupt. */ static void interrupt(uint16_t addr) @@ -954,26 +1212,24 @@ interrupt(uint16_t addr) addr <<= 2; cpu_state.eaaddr = addr; old_cs = CS; - access(5, 16); new_ip = readmemw(0, cpu_state.eaaddr); wait(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; - access(6, 16); new_cs = readmemw(0, cpu_state.eaaddr); prefetching = 0; pfq_clear(); ovr_seg = NULL; - access(39, 16); + wait(2, 0); tempf = cpu_state.flags & (is_nec ? 0x8fd7 : 0x0fd7); push(&tempf); cpu_state.flags &= ~(I_FLAG | T_FLAG); - access(40, 16); + wait(5, 0); push(&old_cs); old_ip = cpu_state.pc; load_cs(new_cs); - access(68, 16); + pfq_suspend(); set_ip(new_ip); - access(41, 16); + wait(2, 0); push(&old_ip); } @@ -992,28 +1248,26 @@ custom_nmi(void) cpu_state.eaaddr = 0x0002; old_cs = CS; - access(5, 16); (void) readmemw(0, cpu_state.eaaddr); new_ip = custom_nmi_vector & 0xffff; wait(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; - access(6, 16); (void) readmemw(0, cpu_state.eaaddr); new_cs = custom_nmi_vector >> 16; prefetching = 0; pfq_clear(); ovr_seg = NULL; - access(39, 16); + wait(2, 0); tempf = cpu_state.flags & (is_nec ? 0x8fd7 : 0x0fd7); push(&tempf); cpu_state.flags &= ~(I_FLAG | T_FLAG); - access(40, 16); + wait(5, 0); push(&old_cs); old_ip = cpu_state.pc; load_cs(new_cs); - access(68, 16); + pfq_suspend(); set_ip(new_ip); - access(41, 16); + wait(2, 0); push(&old_ip); } @@ -1027,6 +1281,18 @@ irq_pending(void) return temp; } +static int +bus_pic_ack(void) +{ + int old_in_lock = in_lock; + + in_lock = 1; + bus_request_type = BUS_PIC; + wait(4, 1); + in_lock = old_in_lock; + return pic_data; +} + static void check_interrupts(void) { @@ -1034,11 +1300,13 @@ check_interrupts(void) if (irq_pending()) { if ((cpu_state.flags & T_FLAG) && !noint) { + wait(2, 0); interrupt(1); return; } if (nmi && nmi_enable && nmi_mask) { nmi_enable = 0; + wait(2, 0); if (use_custom_nmi_vector) custom_nmi(); else @@ -1052,26 +1320,61 @@ check_interrupts(void) repeating = 0; completed = 1; ovr_seg = NULL; - wait(3, 0); + wait(4, 0); /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); + temp = bus_pic_ack(); wait(1, 0); /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); + temp = bus_pic_ack(); wait(1, 0); in_lock = 0; clear_lock = 0; - wait(1, 0); + if (BUS_CYCLE != BUS_T3) + wait(1, 0); + wait(5, 0); /* Here is where temp should be filled, but we cheat. */ - wait(3, 0); opcode = 0x00; interrupt(temp); } } } +static uint16_t tmpc; + +static int +rep_setup(void) +{ + if (repeating) + return 0; + wait(2, 0); + if (in_rep == 0) + return 0; + wait(4, 0); + tmpc = CX; + if (tmpc == 0) + return 1; + wait(3, 0); + return 0; +} + +static int +rep_interrupt(void) +{ + if (!irq_pending()) { + repeating = 1; + completed = 0; + return 0; + } + completed = 1; + CX = tmpc; + pfq_clear(); + if (is_nec && (ovr_seg != NULL)) + set_ip(cpu_state.pc - 3); + else + set_ip(cpu_state.pc - 2); + return 1; +} + static int rep_action(int bits) { @@ -1082,7 +1385,6 @@ rep_action(int bits) wait(2, 0); t = CX; if (irq_pending() && (repeating != 0)) { - access(71, bits); pfq_clear(); if (is_nec && (ovr_seg != NULL)) set_ip(cpu_state.pc - 3); @@ -1108,9 +1410,9 @@ static uint16_t jump(uint16_t delta) { uint16_t old_ip; - access(67, 8); - pfq_clear(); - wait(5, 0); + wait(1, 0); + pfq_suspend(); + cycles_idle(1); old_ip = cpu_state.pc; set_ip((cpu_state.pc + delta) & 0xffff); return old_ip; @@ -1132,8 +1434,6 @@ jump_near(void) static void jcc(uint8_t opcode, int cond) { - /* int8_t offset; */ - wait(1, 0); cpu_data = pfq_fetchb(); wait(1, 0); @@ -1536,7 +1836,7 @@ lods(int bits) if (bits == 16) cpu_data = readmemw((ovr_seg ? *ovr_seg : ds), cpu_state.eaaddr); else - cpu_data = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); + cpu_data = readmemb((ovr_seg ? *ovr_seg : ds), cpu_state.eaaddr); SI = string_increment(bits); } @@ -1658,6 +1958,7 @@ execx86(int cycs) uint16_t tempw_int, size, tempbp, lowbound; uint16_t highbound, regval, orig_sp, wordtopush; uint16_t immediate, old_flags; + uint16_t tmpa; int bits; uint32_t dest_seg, i, carry, nibble; uint32_t srcseg, byteaddr; @@ -1669,7 +1970,8 @@ execx86(int cycs) if (!repeating) { cpu_state.oldpc = cpu_state.pc; - opcode = pfq_fetchb(); + // opcode = pfq_fetchb(); + opcode = pfq_fetchb_common(); handled = 0; oldc = cpu_state.flags & C_FLAG; if (clear_lock) { @@ -1680,7 +1982,7 @@ execx86(int cycs) } completed = 1; - // pclog("[%04X:%04X] Opcode: %02X\n", CS, cpu_state.pc, opcode); + x808x_log("[%04X:%04X] Opcode: %02X\n", CS, cpu_state.pc, opcode); if (is186) { switch (opcode) { case 0x60: /*PUSHA/PUSH R*/ @@ -1820,7 +2122,7 @@ execx86(int cycs) SI += (cpu_state.flags & D_FLAG) ? -2 : 2; } else { wait(4, 0); - outb(DX, readmemb(dest_seg + SI)); + outb(DX, readmemb(dest_seg, SI)); SI += (cpu_state.flags & D_FLAG) ? -1 : 1; } if (in_rep == 0) @@ -1858,7 +2160,6 @@ execx86(int cycs) do_mod_rm(); if (cpu_mod == 3) wait(1, 0); - access(53, bits); cpu_data = get_ea(); cpu_src = pfq_fetchb(); @@ -1937,7 +2238,6 @@ execx86(int cycs) wait(4, 0); --cpu_src; } - access(17, bits); set_ea(cpu_data); handled = 1; break; @@ -1955,7 +2255,7 @@ execx86(int cycs) case 0x0E: case 0x16: case 0x1E: /* PUSH seg */ - access(29, 16); + wait(3, 0); push(&(_opseg[(opcode >> 3) & 0x03]->seg)); break; case 0x07: @@ -2229,7 +2529,7 @@ execx86(int cycs) AX = 0; for (i = 0; i < bit_length; i++) { byteaddr = (ds) + SI; - AX |= (!!(readmemb(byteaddr) & (1 << bit_offset))) << i; + AX |= (!!(readmemb((ds), SI) & (1 << bit_offset))) << i; bit_offset++; if (bit_offset == 8) { SI++; @@ -2251,19 +2551,16 @@ execx86(int cycs) cpu_state.pc = (cpu_state.pc - 1) & 0xffff; break; } - } else - handled = 0; - if (handled) - break; - access(22, 16); - if (opcode == 0x0F) { - load_cs(pop()); - pfq_pos = 0; - } else - load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); - wait(1, 0); - /* All POP segment instructions suppress interrupts for one instruction. */ - noint = 1; + } else { + wait(1, 0); + if (opcode == 0x0F) { + load_cs(pop()); + pfq_pos = 0; + } else + load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); + /* All POP segment instructions suppress interrupts for one instruction. */ + noint = 1; + } break; case 0x26: /*ES:*/ @@ -2310,7 +2607,6 @@ execx86(int cycs) /* alu rm, r / r, rm */ bits = 8 << (opcode & 1); do_mod_rm(); - access(46, bits); tempw = get_ea(); cpu_alu_op = (opcode >> 3) & 7; if ((opcode & 2) == 0) { @@ -2320,22 +2616,19 @@ execx86(int cycs) cpu_dest = get_reg(cpu_reg); cpu_src = tempw; } - if (cpu_mod != 3) - wait(2, 0); wait(1, 0); + if (cpu_mod != 3) + wait(1, 0); alu_op(bits); + wait(1, 0); if (cpu_alu_op != 7) { if ((opcode & 2) == 0) { - access(10, bits); - set_ea(cpu_data); if (cpu_mod == 3) - wait(1, 0); - } else { + wait(2, 0); + set_ea(cpu_data); + } else set_reg(cpu_reg, cpu_data); - wait(1, 0); - } - } else - wait(1, 0); + } break; case 0x04: @@ -2485,7 +2778,7 @@ execx86(int cycs) case 0x55: case 0x56: case 0x57: - access(30, 16); + wait(3, 0); push(&(cpu_state.regs[opcode & 0x07].w)); break; case 0x58: @@ -2496,9 +2789,8 @@ execx86(int cycs) case 0x5D: case 0x5E: case 0x5F: - access(23, 16); - cpu_state.regs[opcode & 0x07].w = pop(); wait(1, 0); + cpu_state.regs[opcode & 0x07].w = pop(); break; case 0x60: /*JO alias*/ @@ -2561,18 +2853,14 @@ execx86(int cycs) /* alu rm, imm */ bits = 8 << (opcode & 1); do_mod_rm(); - access(47, bits); cpu_data = get_ea(); cpu_dest = cpu_data; if (cpu_mod != 3) - wait(3, 0); - if (opcode == 0x81) { - if (cpu_mod == 3) - wait(1, 0); + wait(1, 0); + wait(1, 0); + if (opcode == 0x81) cpu_src = pfq_fetchw(); - } else { - if (cpu_mod == 3) - wait(1, 0); + else { if (opcode == 0x83) cpu_src = sign_extend(pfq_fetchb()); else @@ -2582,7 +2870,8 @@ execx86(int cycs) cpu_alu_op = (rmdat & 0x38) >> 3; alu_op(bits); if (cpu_alu_op != 7) { - access(11, bits); + if (cpu_mod != 3) + wait(1, 0); set_ea(cpu_data); } else { if (cpu_mod != 3) @@ -2595,11 +2884,10 @@ execx86(int cycs) /* TEST rm, reg */ bits = 8 << (opcode & 1); do_mod_rm(); - access(48, bits); cpu_data = get_ea(); test(bits, cpu_data, get_reg(cpu_reg)); - if (cpu_mod == 3) - wait(2, 0); + if (cpu_mod != 3) + wait(1, 0); wait(2, 0); break; case 0x86: @@ -2607,12 +2895,12 @@ execx86(int cycs) /* XCHG rm, reg */ bits = 8 << (opcode & 1); do_mod_rm(); - access(49, bits); cpu_data = get_ea(); cpu_src = get_reg(cpu_reg); set_reg(cpu_reg, cpu_data); wait(3, 0); - access(12, bits); + if (cpu_mod != 3) + wait(3, 0); set_ea(cpu_src); break; @@ -2622,7 +2910,8 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); wait(1, 0); - access(13, bits); + if (cpu_mod != 3) + wait(3, 0); set_ea(get_reg(cpu_reg)); break; case 0x8A: @@ -2630,18 +2919,17 @@ execx86(int cycs) /* MOV reg, rm */ bits = 8 << (opcode & 1); do_mod_rm(); - access(50, bits); set_reg(cpu_reg, get_ea()); wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); break; case 0x8C: /*MOV w,sreg*/ do_mod_rm(); - if (cpu_mod == 3) - wait(1, 0); - access(14, 16); + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); seteaw(_opseg[(rmdat & 0x18) >> 3]->seg); break; @@ -2650,12 +2938,11 @@ execx86(int cycs) cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); break; case 0x8E: /*MOV sreg,w*/ do_mod_rm(); - access(51, 16); tempw = geteaw(); if ((rmdat & 0x18) == 0x08) { load_cs(tempw); @@ -2664,22 +2951,22 @@ execx86(int cycs) load_seg(tempw, _opseg[(rmdat & 0x18) >> 3]); wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); if (((rmdat & 0x18) >> 3) == 2) noint = 1; break; case 0x8F: /*POPW*/ do_mod_rm(); - wait(1, 0); + wait(2, 0); cpu_src = cpu_state.eaaddr; - access(24, 16); + if (cpu_mod != 3) + wait(1, 0); + wait(1, 0); if (cpu_mod != 3) wait(2, 0); cpu_data = pop(); cpu_state.eaaddr = cpu_src; - wait(2, 0); - access(15, 16); seteaw(cpu_data); break; @@ -2717,14 +3004,14 @@ execx86(int cycs) new_ip = pfq_fetchw(); wait(1, 0); new_cs = pfq_fetchw(); - pfq_clear(); - access(31, 16); + wait(1, 0); + pfq_suspend(); push(&(CS)); - access(60, 16); + wait(4, 0); cpu_state.oldpc = cpu_state.pc; load_cs(new_cs); set_ip(new_ip); - access(32, 16); + wait(1, 0); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x9B: /*WAIT*/ @@ -2746,7 +3033,7 @@ execx86(int cycs) #endif break; case 0x9C: /*PUSHF*/ - access(33, 16); + wait(4, 0); if (is_nec) tempw = (cpu_state.flags & 0x8fd7) | 0x7000; else @@ -2754,12 +3041,11 @@ execx86(int cycs) push(&tempw); break; case 0x9D: /*POPF*/ - access(25, 16); + wait(1, 0); if (is_nec) cpu_state.flags = pop() | 0x8002; else cpu_state.flags = pop() | 0x0002; - wait(1, 0); break; case 0x9E: /*SAHF*/ wait(1, 0); @@ -2775,20 +3061,18 @@ execx86(int cycs) case 0xA1: /* MOV A, [iw] */ bits = 8 << (opcode & 1); - wait(1, 0); + wait(2, 0); cpu_state.eaaddr = pfq_fetchw(); - access(1, bits); set_accum(bits, readmem((ovr_seg ? *ovr_seg : ds))); - wait(1, 0); break; case 0xA2: case 0xA3: /* MOV [iw], A */ bits = 8 << (opcode & 1); - wait(1, 0); + wait(2, 0); cpu_state.eaaddr = pfq_fetchw(); - access(7, bits); writemem((ovr_seg ? *ovr_seg : ds), get_accum(bits)); + wait(2, 0); break; case 0xA4: @@ -2796,37 +3080,33 @@ execx86(int cycs) case 0xAC: case 0xAD: /* LODS */ bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if ((opcode & 8) == 0 && in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); - if ((opcode & 8) != 0) - wait(1, 0); + if (rep_setup()) break; - } - if (in_rep != 0 && (opcode & 8) != 0) + if (in_rep != 0 && (BUS_CYCLE == BUS_T4)) wait(1, 0); - access(20, bits); lods(bits); if ((opcode & 8) == 0) { - access(27, bits); + wait(1, 0); stos(bits); - } else { + } else set_accum(bits, cpu_data); - if (in_rep != 0) + wait(3, 0); + if (in_rep == 0) + break; + --tmpc; + if (rep_interrupt()) + break; + CX = tmpc; + if (tmpc == 0) { + completed = 1; + wait(1, 0); + if ((opcode & 8) != 0) + wait(2, 0); + } else { + wait(2, 0); + if ((opcode & 8) != 0) wait(2, 0); } - if (in_rep == 0) { - wait(3, 0); - if ((opcode & 8) != 0) - wait(1, 0); - break; - } - repeating = 1; - clock_end(); break; case 0xA6: @@ -2834,40 +3114,39 @@ execx86(int cycs) case 0xAE: case 0xAF: /* SCAS */ bits = 8 << (opcode & 1); - if (!repeating) - wait(1, 0); - if (rep_action(bits)) { - wait(2, 0); + if (rep_setup()) break; - } - if (in_rep != 0) - wait(1, 0); - wait(1, 0); - cpu_dest = get_accum(bits); + tmpa = AX; if ((opcode & 8) == 0) { - access(21, bits); - lods(bits); wait(1, 0); - cpu_dest = cpu_data; + lods(bits); + tmpa = cpu_data; } - access(2, bits); + wait(2, 0); cpu_state.eaaddr = DI; cpu_data = readmem(es); - DI = string_increment(bits); + DI = string_increment(bits); cpu_src = cpu_data; + cpu_dest = tmpa; sub(bits); wait(2, 0); if (in_rep == 0) { + wait(2, 0); + break; + } + --tmpc; + CX = tmpc; + if ((!!(cpu_state.flags & (rep_c_flag ? C_FLAG : Z_FLAG))) == (in_rep == 1)) { wait(3, 0); break; } - if ((!!(cpu_state.flags & (rep_c_flag ? C_FLAG : Z_FLAG))) == (in_rep == 1)) { - completed = 1; - wait(4, 0); + if (rep_interrupt()) break; - } - repeating = 1; - clock_end(); + wait(4, 0); + if (tmpc == 0) + completed = 1; + else + wait(1, 0); break; case 0xA8: @@ -2883,24 +3162,24 @@ execx86(int cycs) case 0xAA: case 0xAB: /* STOS */ bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if (in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); + if (rep_setup()) break; - } cpu_data = AX; - access(28, bits); + if (in_rep == 0 && (BUS_CYCLE == BUS_T4)) + wait(1, 0); stos(bits); - if (in_rep == 0) { - wait(3, 0); + wait(3, 0); + if (in_rep == 0) break; - } - repeating = 1; - clock_end(); + --tmpc; + if (rep_interrupt()) + break; + CX = tmpc; + if (tmpc == 0) { + completed = 1; + wait(1, 0); + } else + wait(2, 0); break; case 0xB0: @@ -2942,32 +3221,27 @@ execx86(int cycs) case 0xCB: /* RET */ bits = 8 + (opcode & 0x08); - if ((opcode & 9) != 1) - wait(1, 0); + wait(1, 0); if (!(opcode & 1)) { cpu_src = pfq_fetchw(); - wait(1, 0); + wait(2, 0); } if ((opcode & 9) == 9) - wait(1, 0); + wait(2, 0); pfq_clear(); - access(26, bits); new_ip = pop(); - wait(2, 0); - if ((opcode & 8) == 0) + wait(1, 0); + if ((opcode & 8) == 0) { new_cs = CS; - else { - access(42, bits); - new_cs = pop(); if (opcode & 1) wait(1, 0); + } else { + wait(2, 0); + new_cs = pop(); } - if (!(opcode & 1)) { + if (!(opcode & 1)) SP += cpu_src; - wait(1, 0); - } load_cs(new_cs); - access(72, bits); set_ip(new_ip); break; @@ -2976,13 +3250,12 @@ execx86(int cycs) /* LsS rw, rmd */ do_mod_rm(); bits = 16; - access(52, bits); read_ea(1, bits); cpu_state.regs[cpu_reg].w = cpu_data; - access(57, bits); + if (cpu_mod != 3) + wait(2, 0); read_ea2(bits); load_seg(cpu_data, (opcode & 0x01) ? &cpu_state.seg_ds : &cpu_state.seg_es); - wait(1, 0); break; case 0xC6: @@ -2991,40 +3264,40 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); cpu_data = pfq_fetch(); - if (cpu_mod == 3) - wait(1, 0); - access(16, bits); + wait(2, 0); set_ea(cpu_data); break; case 0xCC: /*INT 3*/ + wait(7, 0); interrupt(3); break; case 0xCD: /*INT*/ wait(1, 0); - interrupt(pfq_fetchb()); + temp = pfq_fetchb(); + wait(1, 0); + if (BUS_CYCLE != BUS_T4) + wait(1, 0); + wait(1, 0); + + interrupt(temp); break; case 0xCE: /*INTO*/ wait(3, 0); if (cpu_state.flags & V_FLAG) { - wait(2, 0); + wait(5, 0); interrupt(4); } break; case 0xCF: /*IRET*/ - access(43, 8); - new_ip = pop(); wait(3, 0); - access(44, 8); + pfq_clear(); + new_ip = pop(); new_cs = pop(); load_cs(new_cs); - access(62, 8); set_ip(new_ip); - access(45, 8); if (is_nec) cpu_state.flags = pop() | 0x8002; else @@ -3041,10 +3314,9 @@ execx86(int cycs) /* rot rm */ bits = 8 << (opcode & 1); do_mod_rm(); + cpu_data = get_ea(); if (cpu_mod == 3) wait(1, 0); - access(53, bits); - cpu_data = get_ea(); if ((opcode & 2) == 0) { cpu_src = 1; wait((cpu_mod != 3) ? 4 : 0, 0); @@ -3125,7 +3397,6 @@ execx86(int cycs) wait(4, 0); --cpu_src; } - access(17, bits); set_ea(cpu_data); break; @@ -3159,9 +3430,8 @@ execx86(int cycs) break; case 0xD7: /*XLATB*/ cpu_state.eaaddr = (BX + AL) & 0xffff; - access(4, 8); - AL = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); - wait(1, 0); + wait(4, 0); + AL = readmemb((ovr_seg ? *ovr_seg : ds), cpu_state.eaaddr); break; case 0xD8: @@ -3174,11 +3444,12 @@ execx86(int cycs) case 0xDF: /* esc i, r, rm */ do_mod_rm(); - access(54, 16); tempw = cpu_state.pc; - if (!hasfpu) - geteaw(); - else { + geteaw(); + wait(1, 0); + if (cpu_mod != 3) + wait(1, 0); + if (hasfpu) { if (fpu_softfloat) { switch (opcode) { case 0xD8: @@ -3237,9 +3508,6 @@ execx86(int cycs) } cpu_state.pc = tempw; /* Do this as the x87 code advances it, which is needed on the 286+ core, but not here. */ - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); break; case 0xE0: @@ -3272,43 +3540,46 @@ execx86(int cycs) case 0xE4: case 0xE5: + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetchb(); + cpu_state.eaaddr = cpu_data; + wait(1, 0); + cpu_io(bits, 0, cpu_state.eaaddr); + break; case 0xE6: case 0xE7: + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetchb(); + cpu_state.eaaddr = cpu_data; + cpu_data = (bits == 16) ? AX : AL; + wait(2, 0); + cpu_io(bits, 1, cpu_state.eaaddr); + break; case 0xEC: case 0xED: + bits = 8 << (opcode & 1); + cpu_data = DX; + cpu_state.eaaddr = cpu_data; + wait(1, 0); + cpu_io(bits, 0, cpu_state.eaaddr); + break; case 0xEE: case 0xEF: bits = 8 << (opcode & 1); - if ((opcode & 0x0e) != 0x0c) - wait(1, 0); - if ((opcode & 8) == 0) - cpu_data = pfq_fetchb(); - else - cpu_data = DX; + wait(2, 0); + cpu_data = DX; cpu_state.eaaddr = cpu_data; - if ((opcode & 2) == 0) { - access(3, bits); - if (opcode & 1) - cpu_io(16, 0, cpu_data); - else - cpu_io(8, 0, cpu_data); - wait(1, 0); - } else { - if ((opcode & 8) == 0) - access(8, bits); - else - access(9, bits); - if (opcode & 1) - cpu_io(16, 1, cpu_data); - else - cpu_io(8, 1, cpu_data); - } + cpu_data = (bits == 16) ? AX : AL; + cpu_io(bits, 1, cpu_state.eaaddr); + wait(1, 0); break; case 0xE8: /*CALL rel 16*/ wait(1, 0); cpu_state.oldpc = jump_near(); - access(34, 8); + wait(2, 0); push((uint16_t *) &(cpu_state.oldpc)); break; case 0xE9: /*JMP rel 16*/ @@ -3321,8 +3592,8 @@ execx86(int cycs) wait(1, 0); tempw = pfq_fetchw(); load_cs(tempw); - access(70, 8); pfq_clear(); + wait(4, 0); set_ip(addr); break; case 0xEB: /*JMP rel*/ @@ -3349,17 +3620,22 @@ execx86(int cycs) case 0xF4: /*HLT*/ if (!repeating) { - wait(1, 0); + if ((BUS_CYCLE == BUS_T4) || !last_was_code) + cpu_data = 1; + else + cpu_data = 2; + wait(2, 0); pfq_clear(); } wait(1, 0); if (irq_pending()) { - wait(cycles & 1, 0); + wait(1, 0); + if (cpu_data == 2) + wait(1, 0); check_interrupts(); } else { repeating = 1; completed = 0; - clock_end(); } break; case 0xF5: /*CMC*/ @@ -3371,15 +3647,12 @@ execx86(int cycs) case 0xF7: bits = 8 << (opcode & 1); do_mod_rm(); - access(55, bits); cpu_data = get_ea(); switch (rmdat & 0x38) { case 0x00: case 0x08: /* TEST */ wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); cpu_src = pfq_fetch(); wait(1, 0); test(bits, cpu_data, cpu_src); @@ -3396,7 +3669,8 @@ execx86(int cycs) cpu_dest = 0; sub(bits); } - access(18, bits); + if (cpu_mod != 3) + wait(2, 0); set_ea(cpu_data); break; case 0x20: /* MUL */ @@ -3418,8 +3692,6 @@ execx86(int cycs) } set_sf(bits); set_pf(); - if (cpu_mod != 3) - wait(1, 0); /* NOTE: When implementing the V20, care should be taken to not change the zero flag. */ if (is_nec) @@ -3427,8 +3699,6 @@ execx86(int cycs) break; case 0x30: /* DIV */ case 0x38: /* IDIV */ - if (cpu_mod != 3) - wait(1, 0); cpu_src = cpu_data; if (x86_div(AL, AH)) wait(1, 0); @@ -3460,7 +3730,6 @@ execx86(int cycs) /* misc */ bits = 8 << (opcode & 1); do_mod_rm(); - access(56, bits); read_ea(((rmdat & 0x38) == 0x18) || ((rmdat & 0x38) == 0x28), bits); switch (rmdat & 0x38) { case 0x00: /* INC rm */ @@ -3477,62 +3746,60 @@ execx86(int cycs) do_af(); set_pzs(bits); wait(2, 0); - access(19, bits); set_ea(cpu_data); break; case 0x10: /* CALL rm */ cpu_data_opff_rm(); - access(63, bits); - wait(1, 0); + wait(2, 0); pfq_clear(); - wait(4, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(1, 0); /* Wait. */ + wait(5, 0); cpu_state.oldpc = cpu_state.pc; set_ip(cpu_data); wait(2, 0); - access(35, bits); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x18: /* CALL rmd */ new_ip = cpu_data; - access(58, bits); + wait(3, 0); read_ea2(bits); if (!(opcode & 1)) cpu_data |= 0xff00; new_cs = cpu_data; - access(36, bits); + wait(1, 0); + pfq_clear(); push(&(CS)); - access(64, bits); wait(4, 0); cpu_state.oldpc = cpu_state.pc; load_cs(new_cs); set_ip(new_ip); - access(37, bits); + wait(1, 0); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x20: /* JMP rm */ cpu_data_opff_rm(); - access(65, bits); + wait(2, 0); + pfq_clear(); + if (BUS_CYCLE != BUS_T4) + wait(1, 0); set_ip(cpu_data); break; case 0x28: /* JMP rmd */ new_ip = cpu_data; - access(59, bits); + wait(3, 0); + pfq_clear(); + wait(1, 0); read_ea2(bits); if (!(opcode & 1)) cpu_data |= 0xff00; new_cs = cpu_data; load_cs(new_cs); - access(66, bits); set_ip(new_ip); break; case 0x30: /* PUSH rm */ case 0x38: if (cpu_mod != 3) wait(1, 0); - access(38, bits); + wait(4, 0); push((uint16_t *) &(cpu_data)); break; } diff --git a/src/cpu/808x/CMakeLists.txt b/src/cpu/808x/CMakeLists.txt new file mode 100644 index 000000000..d29bdf4e0 --- /dev/null +++ b/src/cpu/808x/CMakeLists.txt @@ -0,0 +1,16 @@ +# +# 86Box A hypervisor and IBM PC system emulator that specializes in +# running old operating systems and software designed for IBM +# PC systems and compatibles from 1981 through fairly recent +# system designs based on the PCI bus. +# +# This file is part of the 86Box distribution. +# +# CMake build script. +# +# Authors: David Hrdlička, +# +# Copyright 2020-2021 David Hrdlička. +# + +add_library(808x OBJECT queue.c) diff --git a/src/cpu/808x/queue.c b/src/cpu/808x/queue.c new file mode 100644 index 000000000..2eebde0ce --- /dev/null +++ b/src/cpu/808x/queue.c @@ -0,0 +1,190 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * 808x CPU emulation, mostly ported from reenigne's XTCE, which + * is cycle-accurate. + * + * Authors: gloriouscow, + * Miran Grca, + * + * Copyright 2023 gloriouscow. + * Copyright 2023 Miran Grca. + */ +#include +#include +#include +#include +#include +#include + +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include "x86.h" +#include <86box/machine.h> +#include <86box/io.h> +#include <86box/mem.h> +#include <86box/rom.h> +#include <86box/nmi.h> +#include <86box/pic.h> +#include <86box/ppi.h> +#include <86box/timer.h> +#include <86box/gdbstub.h> +// #include "808x.h" +#include "queue.h" + +/* TODO: Move to cpu.h so this can eventually be reused for 286+ as well. */ +#define QUEUE_MAX 6 + +typedef struct queue_t +{ + size_t size; + size_t len; + size_t back; + size_t front; + uint8_t q[QUEUE_MAX]; + uint16_t preload; + queue_delay_t delay; +} queue_t; + +static queue_t queue; + +#ifdef ENABLE_QUEUE_LOG +int queue_do_log = ENABLE_QUEUE_LOG; + +static void +queue_log(const char *fmt, ...) +{ + va_list ap; + + if (queue_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define queue_log(fmt, ...) +#endif + +void +queue_set_size(size_t size) +{ + if (size > QUEUE_MAX) + fatal("Requested prefetch queue of %i bytes is too big\n", size); + + queue.size = size; +} + +size_t +queue_get_len(void) +{ + return queue.len; +} + +int +queue_is_full(void) +{ + return (queue.len != queue.size); +} + +uint16_t +queue_get_preload(void) +{ + uint16_t ret = queue.preload; + queue.preload = 0x0000; + + return ret; +} + +int +queue_has_preload(void) +{ + return (queue.preload & FLAG_PRELOADED) ? 1 : 0; +} + +void +queue_set_preload(void) +{ + uint8_t byte; + + if (queue.len > 0) { + byte = queue_pop(); + queue.preload = ((uint16_t) byte) | FLAG_PRELOADED; + } else + fatal("Tried to preload with empty queue\n"); +} + +void +queue_push8(uint8_t byte) +{ + if (queue.len < queue.size) { + queue.q[queue.front] = byte; + queue.front = (queue.front + 1) % queue.size; + queue.len++; + + if (queue.len == 3) + queue.delay = DELAY_WRITE; + else + queue.delay = DELAY_NONE; + } else + fatal("Queue overrun\n"); +} + +void +queue_push16(uint16_t word) +{ + queue_push8((uint8_t) (word & 0xff)); + queue_push8((uint8_t) ((word >> 8) & 0xff)); +} + +uint8_t +queue_pop(void) +{ + uint8_t byte = 0xff; + + if (queue.len > 0) { + byte = queue.q[queue.back]; + + queue.back = (queue.back + 1) % queue.size; + queue.len--; + + if (queue.len >= 3) + queue.delay = DELAY_READ; + else + queue.delay = DELAY_NONE; + } else + fatal("Queue underrun\n"); + + return byte; +} + +queue_delay_t +queue_get_delay(void) +{ + return queue.delay; +} + +void +queue_flush(void) +{ + memset(&queue, 0x00, sizeof(queue_t)); + + queue.delay = DELAY_NONE; +} + +void +queue_init(void) +{ + queue_flush(); + + if (is8086) + queue_set_size(6); + else + queue_set_size(4); +} diff --git a/src/cpu/808x/queue.h b/src/cpu/808x/queue.h new file mode 100644 index 000000000..544455784 --- /dev/null +++ b/src/cpu/808x/queue.h @@ -0,0 +1,43 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Prefetch queue implementation header. + * + * Authors: gloriouscow, + * Miran Grca, + * + * Copyright 2023 gloriouscow. + * Copyright 2023 Miran Grca. + */ +#ifndef EMU_QUEUE_H +#define EMU_QUEUE_H + +typedef enum queue_delay_t +{ + DELAY_READ, + DELAY_WRITE, + DELAY_NONE +} queue_delay_t; + +#define FLAG_PRELOADED 0x8000 + +extern void queue_set_size(size_t size); +extern size_t queue_get_len(void); +extern int queue_is_full(void); +extern uint16_t queue_get_preload(void); +extern int queue_has_preload(void); +extern void queue_set_preload(void); +extern void queue_push8(uint8_t byte); +extern void queue_push16(uint16_t word); +extern uint8_t queue_pop(void); +extern queue_delay_t queue_get_delay(void); +extern void queue_flush(void); + +extern void queue_init(void); + +#endif /*EMU_QUEUE_H*/ diff --git a/src/cpu/CMakeLists.txt b/src/cpu/CMakeLists.txt index 18aa06023..e4d8e71b2 100644 --- a/src/cpu/CMakeLists.txt +++ b/src/cpu/CMakeLists.txt @@ -14,7 +14,7 @@ # add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c - 386_dynarec.c x86seg.c x87.c x87_timings.c 8080.c) + 386_dynarec.c x86_ops_mmx.c x86seg.c x87.c x87_timings.c 8080.c) if(AMD_K5) target_compile_definitions(cpu PRIVATE USE_AMD_K5) @@ -35,3 +35,6 @@ endif() add_subdirectory(softfloat) target_link_libraries(86Box softfloat) + +add_subdirectory(808x) +target_link_libraries(86Box 808x) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 257d23845..d633b9bb2 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -1646,6 +1646,7 @@ cpu_set(void) cpu_exec = exec386; else cpu_exec = execx86; + mmx_init(); gdbstub_cpu_init(); } diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 692600005..3d6d0622a 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -850,4 +850,9 @@ extern void cpu_fast_off_reset(void); extern void smi_raise(void); extern void nmi_raise(void); +extern MMX_REG *MMP[8]; +extern uint16_t *MMEP[8]; + +extern void mmx_init(void); + #endif /*EMU_CPU_H*/ diff --git a/src/cpu/x86_ops_3dnow.h b/src/cpu/x86_ops_3dnow.h index eb7a35ace..ff657d708 100644 --- a/src/cpu/x86_ops_3dnow.h +++ b/src/cpu/x86_ops_3dnow.h @@ -36,17 +36,20 @@ static int opPAVGUSB(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] + src.b[0] + 1) >> 1; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] + src.b[1] + 1) >> 1; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] + src.b[2] + 1) >> 1; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] + src.b[3] + 1) >> 1; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] + src.b[4] + 1) >> 1; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] + src.b[5] + 1) >> 1; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] + src.b[6] + 1) >> 1; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] + src.b[7] + 1) >> 1; + dst->b[0] = (dst->b[0] + src.b[0] + 1) >> 1; + dst->b[1] = (dst->b[1] + src.b[1] + 1) >> 1; + dst->b[2] = (dst->b[2] + src.b[2] + 1) >> 1; + dst->b[3] = (dst->b[3] + src.b[3] + 1) >> 1; + dst->b[4] = (dst->b[4] + src.b[4] + 1) >> 1; + dst->b[5] = (dst->b[5] + src.b[5] + 1) >> 1; + dst->b[6] = (dst->b[6] + src.b[6] + 1) >> 1; + dst->b[7] = (dst->b[7] + src.b[7] + 1) >> 1; + + MMX_SETEXP(cpu_reg); return 0; } @@ -54,11 +57,14 @@ static int opPF2ID(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].sl[0] = (int32_t) src.f[0]; - cpu_state.MM[cpu_reg].sl[1] = (int32_t) src.f[1]; + dst->sl[0] = (int32_t) src.f[0]; + dst->sl[1] = (int32_t) src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -66,11 +72,14 @@ static int opPF2IW(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].sw[0] = (int32_t) src.f[0]; - cpu_state.MM[cpu_reg].sw[1] = (int32_t) src.f[1]; + dst->sw[0] = (int32_t) src.f[0]; + dst->sw[1] = (int32_t) src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -78,13 +87,16 @@ static int opPFACC(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); float tempf; MMX_GETSRC(); - tempf = cpu_state.MM[cpu_reg].f[0] + cpu_state.MM[cpu_reg].f[1]; - cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1]; - cpu_state.MM[cpu_reg].f[0] = tempf; + tempf = dst->f[0] + dst->f[1]; + dst->f[1] = src.f[0] + src.f[1]; + dst->f[0] = tempf; + + MMX_SETEXP(cpu_reg); return 0; } @@ -92,13 +104,16 @@ static int opPFNACC(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); float tempf; MMX_GETSRC(); - tempf = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1]; - cpu_state.MM[cpu_reg].f[1] = src.f[0] - src.f[1]; - cpu_state.MM[cpu_reg].f[0] = tempf; + tempf = dst->f[0] - dst->f[1]; + dst->f[1] = src.f[0] - src.f[1]; + dst->f[0] = tempf; + + MMX_SETEXP(cpu_reg); return 0; } @@ -106,13 +121,16 @@ static int opPFPNACC(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); float tempf; MMX_GETSRC(); - tempf = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1]; - cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1]; - cpu_state.MM[cpu_reg].f[0] = tempf; + tempf = dst->f[0] - dst->f[1]; + dst->f[1] = src.f[0] + src.f[1]; + dst->f[0] = tempf; + + MMX_SETEXP(cpu_reg); return 0; } @@ -120,15 +138,18 @@ static int opPSWAPD(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); float tempf, tempf2; MMX_GETSRC(); /* We have to do this in case source and destination overlap. */ - tempf = src.f[0]; - tempf2 = src.f[1]; - cpu_state.MM[cpu_reg].f[1] = tempf; - cpu_state.MM[cpu_reg].f[0] = tempf2; + tempf = src.f[0]; + tempf2 = src.f[1]; + dst->f[1] = tempf; + dst->f[0] = tempf2; + + MMX_SETEXP(cpu_reg); return 0; } @@ -136,11 +157,14 @@ static int opPFADD(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] += src.f[0]; - cpu_state.MM[cpu_reg].f[1] += src.f[1]; + dst->f[0] += src.f[0]; + dst->f[1] += src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -148,11 +172,14 @@ static int opPFCMPEQ(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] == src.f[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] == src.f[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->f[0] == src.f[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->f[1] == src.f[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -160,11 +187,14 @@ static int opPFCMPGE(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] >= src.f[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] >= src.f[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->f[0] >= src.f[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->f[1] >= src.f[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -172,11 +202,14 @@ static int opPFCMPGT(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] > src.f[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] > src.f[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->f[0] > src.f[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->f[1] > src.f[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -184,13 +217,16 @@ static int opPFMAX(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - if (src.f[0] > cpu_state.MM[cpu_reg].f[0]) - cpu_state.MM[cpu_reg].f[0] = src.f[0]; - if (src.f[1] > cpu_state.MM[cpu_reg].f[1]) - cpu_state.MM[cpu_reg].f[1] = src.f[1]; + if (src.f[0] > dst->f[0]) + dst->f[0] = src.f[0]; + if (src.f[1] > dst->f[1]) + dst->f[1] = src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -198,13 +234,16 @@ static int opPFMIN(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - if (src.f[0] < cpu_state.MM[cpu_reg].f[0]) - cpu_state.MM[cpu_reg].f[0] = src.f[0]; - if (src.f[1] < cpu_state.MM[cpu_reg].f[1]) - cpu_state.MM[cpu_reg].f[1] = src.f[1]; + if (src.f[0] < dst->f[0]) + dst->f[0] = src.f[0]; + if (src.f[1] < dst->f[1]) + dst->f[1] = src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -212,24 +251,29 @@ static int opPFMUL(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] *= src.f[0]; - cpu_state.MM[cpu_reg].f[1] *= src.f[1]; + dst->f[0] *= src.f[0]; + dst->f[1] *= src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } static int opPFRCP(uint32_t fetchdat) { + MMX_REG *dst = MMX_GETREGP(cpu_reg); + union { uint32_t i; float f; } src; if (cpu_mod == 3) { - src.f = cpu_state.MM[cpu_rm].f[0]; + src.f = (MMX_GETREG(cpu_rm)).f[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_READ(cpu_state.ea_seg); @@ -239,8 +283,10 @@ opPFRCP(uint32_t fetchdat) CLOCK_CYCLES(2); } - cpu_state.MM[cpu_reg].f[0] = 1.0 / src.f; - cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0]; + dst->f[0] = 1.0 / src.f; + dst->f[1] = dst->f[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -249,11 +295,14 @@ static int opPFRCPIT1(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] = src.f[0]; - cpu_state.MM[cpu_reg].f[1] = src.f[1]; + dst->f[0] = src.f[0]; + dst->f[1] = src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -261,24 +310,29 @@ static int opPFRCPIT2(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] = src.f[0]; - cpu_state.MM[cpu_reg].f[1] = src.f[1]; + dst->f[0] = src.f[0]; + dst->f[1] = src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } static int opPFRSQRT(uint32_t fetchdat) { + MMX_REG *dst = MMX_GETREGP(cpu_reg); + union { uint32_t i; float f; } src; if (cpu_mod == 3) { - src.f = cpu_state.MM[cpu_rm].f[0]; + src.f = (MMX_GETREG(cpu_rm)).f[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_READ(cpu_state.ea_seg); @@ -288,8 +342,10 @@ opPFRSQRT(uint32_t fetchdat) CLOCK_CYCLES(2); } - cpu_state.MM[cpu_reg].f[0] = 1.0 / sqrt(src.f); - cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0]; + dst->f[0] = 1.0 / sqrt(src.f); + dst->f[1] = dst->f[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -308,11 +364,14 @@ static int opPFSUB(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] -= src.f[0]; - cpu_state.MM[cpu_reg].f[1] -= src.f[1]; + dst->f[0] -= src.f[0]; + dst->f[1] -= src.f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -320,11 +379,14 @@ static int opPFSUBR(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] = src.f[0] - cpu_state.MM[cpu_reg].f[0]; - cpu_state.MM[cpu_reg].f[1] = src.f[1] - cpu_state.MM[cpu_reg].f[1]; + dst->f[0] = src.f[0] - dst->f[0]; + dst->f[1] = src.f[1] - dst->f[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -332,11 +394,14 @@ static int opPI2FD(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] = (float) src.sl[0]; - cpu_state.MM[cpu_reg].f[1] = (float) src.sl[1]; + dst->f[0] = (float) src.sl[0]; + dst->f[1] = (float) src.sl[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -344,37 +409,46 @@ static int opPI2FW(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); MMX_GETSRC(); - cpu_state.MM[cpu_reg].f[0] = (float) src.sw[0]; - cpu_state.MM[cpu_reg].f[1] = (float) src.sw[1]; + dst->f[0] = (float) src.sw[0]; + dst->f[1] = (float) src.sw[1]; + + MMX_SETEXP(cpu_reg); return 0; } static int opPMULHRW(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] = (((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[1] = (((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[2] = (((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[3] = (((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) + 0x8000) >> 16; + src = MMX_GETREG(cpu_rm); + + dst->w[0] = (((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16; + dst->w[1] = (((int32_t) dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16; + dst->w[2] = (((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16; + dst->w[3] = (((int32_t) dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16; CLOCK_CYCLES(1); } else { - MMX_REG src; - SEG_CHECK_READ(cpu_state.ea_seg); src.l[0] = readmeml(easeg, cpu_state.eaaddr); src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].w[0] = ((int32_t) (cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) (cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) (cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) (cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16; + dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16; + dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16; + dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16; + dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } diff --git a/src/cpu/x86_ops_i686.h b/src/cpu/x86_ops_i686.h index 9e00249ca..f2b07a1c4 100644 --- a/src/cpu/x86_ops_i686.h +++ b/src/cpu/x86_ops_i686.h @@ -43,6 +43,132 @@ opSYSEXIT(uint32_t fetchdat) return ret; } +static int +sf_fx_save_stor_common(uint32_t fetchdat, int bits) +{ + uint8_t fxinst = 0; + uint32_t tag_byte; + unsigned index; + floatx80 reg; + + if (CPUID < 0x650) + return ILLEGAL(fetchdat); + + FP_ENTER(); + + if (bits == 32) { + fetch_ea_32(fetchdat); + } else { + fetch_ea_16(fetchdat); + } + + if (cpu_state.eaaddr & 0xf) { + x386_dynarec_log("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr); + x86gpf(NULL, 0); + return cpu_state.abrt; + } + + fxinst = (rmdat >> 3) & 7; + + if ((fxinst > 1) || (cpu_mod == 3)) { + x86illegal(); + return cpu_state.abrt; + } + + FP_ENTER(); + + if (fxinst == 1) { + /* FXRSTOR */ + fpu_state.cwd = readmemw(easeg, cpu_state.eaaddr); + fpu_state.swd = readmemw(easeg, cpu_state.eaaddr + 2); + fpu_state.tos = (fpu_state.swd >> 11) & 7; + + /* always set bit 6 as '1 */ + fpu_state.cwd = (fpu_state.cwd & ~FPU_CW_Reserved_Bits) | 0x0040; + + /* Restore x87 FPU Opcode */ + /* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */ + fpu_state.foo = readmemw(easeg, cpu_state.eaaddr + 6) & 0x7FF; + + fpu_state.fip = readmeml(easeg, cpu_state.eaaddr + 8); + fpu_state.fcs = readmemw(easeg, cpu_state.eaaddr + 12); + + tag_byte = readmemb(easeg, cpu_state.eaaddr + 4); + + fpu_state.fdp = readmeml(easeg, cpu_state.eaaddr + 16); + fpu_state.fds = readmemw(easeg, cpu_state.eaaddr + 20); + + /* load i387 register file */ + for (index = 0; index < 8; index++) { + reg.fraction = readmemq(easeg, cpu_state.eaaddr + (index * 16) + 32); + reg.exp = readmemw(easeg, cpu_state.eaaddr + (index * 16) + 40); + + // update tag only if it is not empty + FPU_save_regi_tag(reg, IS_TAG_EMPTY(index) ? X87_TAG_EMPTY : FPU_tagof(reg), index); + } + + fpu_state.tag = unpack_FPU_TW(tag_byte); + + /* check for unmasked exceptions */ + if (fpu_state.swd & ~fpu_state.cwd & FPU_CW_Exceptions_Mask) { + /* set the B and ES bits in the status-word */ + fpu_state.swd |= (FPU_SW_Summary | FPU_SW_Backward); + } else { + /* clear the B and ES bits in the status-word */ + fpu_state.swd &= ~(FPU_SW_Summary | FPU_SW_Backward); + } + + CLOCK_CYCLES((cr0 & 1) ? 34 : 44); + } else { + /* FXSAVE */ + writememw(easeg, cpu_state.eaaddr, i387_get_control_word()); + writememw(easeg, cpu_state.eaaddr + 2, i387_get_status_word()); + writememw(easeg, cpu_state.eaaddr + 4, pack_FPU_TW(fpu_state.tag)); + + /* x87 FPU Opcode (16 bits) */ + /* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */ + writememw(easeg, cpu_state.eaaddr + 6, fpu_state.foo); + + /* + * x87 FPU IP Offset (32/64 bits) + * The contents of this field differ depending on the current + * addressing mode (16/32/64 bit) when the FXSAVE instruction was executed: + * + 64-bit mode - 64-bit IP offset + * + 32-bit mode - 32-bit IP offset + * + 16-bit mode - low 16 bits are IP offset; high 16 bits are reserved. + * x87 CS FPU IP Selector + * + 16 bit, in 16/32 bit mode only + */ + writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip); + writememl(easeg, cpu_state.eaaddr + 12, fpu_state.fcs); + + /* + * x87 FPU Instruction Operand (Data) Pointer Offset (32/64 bits) + * The contents of this field differ depending on the current + * addressing mode (16/32 bit) when the FXSAVE instruction was executed: + * + 64-bit mode - 64-bit offset + * + 32-bit mode - 32-bit offset + * + 16-bit mode - low 16 bits are offset; high 16 bits are reserved. + * x87 DS FPU Instruction Operand (Data) Pointer Selector + * + 16 bit, in 16/32 bit mode only + */ + writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp); + writememl(easeg, cpu_state.eaaddr + 20, fpu_state.fds); + + /* store i387 register file */ + for (index = 0; index < 8; index++) { + const floatx80 fp = FPU_read_regi(index); + + writememq(easeg, cpu_state.eaaddr + (index * 16) + 32, fp.fraction); + writememw(easeg, cpu_state.eaaddr + (index * 16) + 40, fp.exp); + } + + CLOCK_CYCLES((cr0 & 1) ? 56 : 67); + } + + return cpu_state.abrt; +} + static int fx_save_stor_common(uint32_t fetchdat, int bits) { @@ -253,12 +379,18 @@ fx_save_stor_common(uint32_t fetchdat, int bits) static int opFXSAVESTOR_a16(uint32_t fetchdat) { + if (fpu_softfloat) + return sf_fx_save_stor_common(fetchdat, 16); + return fx_save_stor_common(fetchdat, 16); } static int opFXSAVESTOR_a32(uint32_t fetchdat) { + if (fpu_softfloat) + return sf_fx_save_stor_common(fetchdat, 32); + return fx_save_stor_common(fetchdat, 32); } diff --git a/src/cpu/x86_ops_mmx.c b/src/cpu/x86_ops_mmx.c new file mode 100644 index 000000000..1afc4fba2 --- /dev/null +++ b/src/cpu/x86_ops_mmx.c @@ -0,0 +1,50 @@ +#include +#include +#include +#include +#include +#include +#include +#ifndef INFINITY +# define INFINITY (__builtin_inff()) +#endif +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include "x86.h" +#include "x87.h" +#include <86box/nmi.h> +#include <86box/mem.h> +#include <86box/smram.h> +#include <86box/pic.h> +#include <86box/pit.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/keyboard.h> +#include <86box/timer.h> +#include "386_common.h" +#include "x86_flags.h" +#include "x86seg.h" + +MMX_REG *MMP[8]; +uint16_t *MMEP[8]; + +static uint16_t MME[8]; + +#define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r]) +void +mmx_init(void) +{ + memset(MME, 0xff, sizeof(MME)); + + for (uint8_t i = 0; i < 8; i++) { + if (fpu_softfloat) { + MMP[i] = (MMX_REG *) &fpu_state.st_space[i].fraction; + MMEP[i] = (uint16_t *) &fpu_state.st_space[i].exp; + } else { + MMP[i] = &(cpu_state.MM[i]); + MMEP[i] = &(MME[i]); + } + } +} diff --git a/src/cpu/x86_ops_mmx.h b/src/cpu/x86_ops_mmx.h index d270b728f..47751d059 100644 --- a/src/cpu/x86_ops_mmx.h +++ b/src/cpu/x86_ops_mmx.h @@ -3,9 +3,15 @@ #define USATB(val) (((val) < 0) ? 0 : (((val) > 255) ? 255 : (val))) #define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val))) +#define MMX_GETREGP(r) MMP[r] +#define MMX_GETREG(r) *(MMP[r]) + +#define MMX_SETEXP(r) \ + *(MMEP[r]) = 0xffff + #define MMX_GETSRC() \ if (cpu_mod == 3) { \ - src = cpu_state.MM[cpu_rm]; \ + src = MMX_GETREG(cpu_rm); \ CLOCK_CYCLES(1); \ } else { \ SEG_CHECK_READ(cpu_state.ea_seg); \ diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h index e473f8ec5..642e99c8a 100644 --- a/src/cpu/x86_ops_mmx_arith.h +++ b/src/cpu/x86_ops_mmx_arith.h @@ -2,19 +2,25 @@ static int opPADDB_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] += src.b[0]; - cpu_state.MM[cpu_reg].b[1] += src.b[1]; - cpu_state.MM[cpu_reg].b[2] += src.b[2]; - cpu_state.MM[cpu_reg].b[3] += src.b[3]; - cpu_state.MM[cpu_reg].b[4] += src.b[4]; - cpu_state.MM[cpu_reg].b[5] += src.b[5]; - cpu_state.MM[cpu_reg].b[6] += src.b[6]; - cpu_state.MM[cpu_reg].b[7] += src.b[7]; + dst->b[0] += src.b[0]; + dst->b[1] += src.b[1]; + dst->b[2] += src.b[2]; + dst->b[3] += src.b[3]; + dst->b[4] += src.b[4]; + dst->b[5] += src.b[5]; + dst->b[6] += src.b[6]; + dst->b[7] += src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -22,19 +28,25 @@ static int opPADDB_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] += src.b[0]; - cpu_state.MM[cpu_reg].b[1] += src.b[1]; - cpu_state.MM[cpu_reg].b[2] += src.b[2]; - cpu_state.MM[cpu_reg].b[3] += src.b[3]; - cpu_state.MM[cpu_reg].b[4] += src.b[4]; - cpu_state.MM[cpu_reg].b[5] += src.b[5]; - cpu_state.MM[cpu_reg].b[6] += src.b[6]; - cpu_state.MM[cpu_reg].b[7] += src.b[7]; + dst->b[0] += src.b[0]; + dst->b[1] += src.b[1]; + dst->b[2] += src.b[2]; + dst->b[3] += src.b[3]; + dst->b[4] += src.b[4]; + dst->b[5] += src.b[5]; + dst->b[6] += src.b[6]; + dst->b[7] += src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -43,15 +55,21 @@ static int opPADDW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] += src.w[0]; - cpu_state.MM[cpu_reg].w[1] += src.w[1]; - cpu_state.MM[cpu_reg].w[2] += src.w[2]; - cpu_state.MM[cpu_reg].w[3] += src.w[3]; + dst->w[0] += src.w[0]; + dst->w[1] += src.w[1]; + dst->w[2] += src.w[2]; + dst->w[3] += src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -59,15 +77,21 @@ static int opPADDW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] += src.w[0]; - cpu_state.MM[cpu_reg].w[1] += src.w[1]; - cpu_state.MM[cpu_reg].w[2] += src.w[2]; - cpu_state.MM[cpu_reg].w[3] += src.w[3]; + dst->w[0] += src.w[0]; + dst->w[1] += src.w[1]; + dst->w[2] += src.w[2]; + dst->w[3] += src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -76,13 +100,19 @@ static int opPADDD_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] += src.l[0]; - cpu_state.MM[cpu_reg].l[1] += src.l[1]; + dst->l[0] += src.l[0]; + dst->l[1] += src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -90,13 +120,19 @@ static int opPADDD_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] += src.l[0]; - cpu_state.MM[cpu_reg].l[1] += src.l[1]; + dst->l[0] += src.l[0]; + dst->l[1] += src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -105,19 +141,25 @@ static int opPADDSB_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]); + dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -125,19 +167,25 @@ static int opPADDSB_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]); + dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -146,19 +194,25 @@ static int opPADDUSB_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]); + dst->b[0] = USATB(dst->b[0] + src.b[0]); + dst->b[1] = USATB(dst->b[1] + src.b[1]); + dst->b[2] = USATB(dst->b[2] + src.b[2]); + dst->b[3] = USATB(dst->b[3] + src.b[3]); + dst->b[4] = USATB(dst->b[4] + src.b[4]); + dst->b[5] = USATB(dst->b[5] + src.b[5]); + dst->b[6] = USATB(dst->b[6] + src.b[6]); + dst->b[7] = USATB(dst->b[7] + src.b[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -166,19 +220,25 @@ static int opPADDUSB_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]); + dst->b[0] = USATB(dst->b[0] + src.b[0]); + dst->b[1] = USATB(dst->b[1] + src.b[1]); + dst->b[2] = USATB(dst->b[2] + src.b[2]); + dst->b[3] = USATB(dst->b[3] + src.b[3]); + dst->b[4] = USATB(dst->b[4] + src.b[4]); + dst->b[5] = USATB(dst->b[5] + src.b[5]); + dst->b[6] = USATB(dst->b[6] + src.b[6]); + dst->b[7] = USATB(dst->b[7] + src.b[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -187,15 +247,21 @@ static int opPADDSW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]); + dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -203,15 +269,21 @@ static int opPADDSW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]); + dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -220,15 +292,21 @@ static int opPADDUSW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]); + dst->w[0] = USATW(dst->w[0] + src.w[0]); + dst->w[1] = USATW(dst->w[1] + src.w[1]); + dst->w[2] = USATW(dst->w[2] + src.w[2]); + dst->w[3] = USATW(dst->w[3] + src.w[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -236,15 +314,21 @@ static int opPADDUSW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]); + dst->w[0] = USATW(dst->w[0] + src.w[0]); + dst->w[1] = USATW(dst->w[1] + src.w[1]); + dst->w[2] = USATW(dst->w[2] + src.w[2]); + dst->w[3] = USATW(dst->w[3] + src.w[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -253,20 +337,26 @@ static int opPMADDWD_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - cpu_state.MM[cpu_reg].l[0] = 0x80000000; + if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000) + dst->l[0] = 0x80000000; else - cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]); + dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]); - if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - cpu_state.MM[cpu_reg].l[1] = 0x80000000; + if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000) + dst->l[1] = 0x80000000; else - cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]); + dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -274,20 +364,26 @@ static int opPMADDWD_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - cpu_state.MM[cpu_reg].l[0] = 0x80000000; + if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000) + dst->l[0] = 0x80000000; else - cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]); + dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]); - if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - cpu_state.MM[cpu_reg].l[1] = 0x80000000; + if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000) + dst->l[1] = 0x80000000; else - cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]); + dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -295,114 +391,126 @@ opPMADDWD_a32(uint32_t fetchdat) static int opPMULLW_a16(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0]; - cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1]; - cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2]; - cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3]; - CLOCK_CYCLES(1); - } else { - MMX_REG src; + dst = MMX_GETREGP(cpu_reg); + + if (cpu_mod == 3) + src = MMX_GETREG(cpu_rm); + else { SEG_CHECK_READ(cpu_state.ea_seg); src.l[0] = readmeml(easeg, cpu_state.eaaddr); src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].w[0] *= src.w[0]; - cpu_state.MM[cpu_reg].w[1] *= src.w[1]; - cpu_state.MM[cpu_reg].w[2] *= src.w[2]; - cpu_state.MM[cpu_reg].w[3] *= src.w[3]; - CLOCK_CYCLES(2); + CLOCK_CYCLES(1); } + dst->w[0] *= src.w[0]; + dst->w[1] *= src.w[1]; + dst->w[2] *= src.w[2]; + dst->w[3] *= src.w[3]; + CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_reg); + return 0; } static int opPMULLW_a32(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0]; - cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1]; - cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2]; - cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3]; - CLOCK_CYCLES(1); - } else { - MMX_REG src; + dst = MMX_GETREGP(cpu_reg); + + if (cpu_mod == 3) + src = MMX_GETREG(cpu_rm); + else { SEG_CHECK_READ(cpu_state.ea_seg); src.l[0] = readmeml(easeg, cpu_state.eaaddr); src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].w[0] *= src.w[0]; - cpu_state.MM[cpu_reg].w[1] *= src.w[1]; - cpu_state.MM[cpu_reg].w[2] *= src.w[2]; - cpu_state.MM[cpu_reg].w[3] *= src.w[3]; - CLOCK_CYCLES(2); + CLOCK_CYCLES(1); } + dst->w[0] *= src.w[0]; + dst->w[1] *= src.w[1]; + dst->w[2] *= src.w[2]; + dst->w[3] *= src.w[3]; + CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_reg); + return 0; } static int opPMULHW_a16(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16; - CLOCK_CYCLES(1); - } else { - MMX_REG src; + dst = MMX_GETREGP(cpu_reg); + + if (cpu_mod == 3) + src = MMX_GETREG(cpu_rm); + else { SEG_CHECK_READ(cpu_state.ea_seg); src.l[0] = readmeml(easeg, cpu_state.eaaddr); src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16; - CLOCK_CYCLES(2); + CLOCK_CYCLES(1); } + dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16; + dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16; + dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16; + dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16; + CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_reg); + return 0; } static int opPMULHW_a32(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16; - CLOCK_CYCLES(1); - } else { - MMX_REG src; + dst = MMX_GETREGP(cpu_reg); + + if (cpu_mod == 3) + src = MMX_GETREG(cpu_rm); + else { SEG_CHECK_READ(cpu_state.ea_seg); src.l[0] = readmeml(easeg, cpu_state.eaaddr); src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16; - CLOCK_CYCLES(2); + CLOCK_CYCLES(1); } + dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16; + dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16; + dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16; + dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16; + CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_reg); + return 0; } @@ -410,19 +518,25 @@ static int opPSUBB_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] -= src.b[0]; - cpu_state.MM[cpu_reg].b[1] -= src.b[1]; - cpu_state.MM[cpu_reg].b[2] -= src.b[2]; - cpu_state.MM[cpu_reg].b[3] -= src.b[3]; - cpu_state.MM[cpu_reg].b[4] -= src.b[4]; - cpu_state.MM[cpu_reg].b[5] -= src.b[5]; - cpu_state.MM[cpu_reg].b[6] -= src.b[6]; - cpu_state.MM[cpu_reg].b[7] -= src.b[7]; + dst->b[0] -= src.b[0]; + dst->b[1] -= src.b[1]; + dst->b[2] -= src.b[2]; + dst->b[3] -= src.b[3]; + dst->b[4] -= src.b[4]; + dst->b[5] -= src.b[5]; + dst->b[6] -= src.b[6]; + dst->b[7] -= src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -430,19 +544,25 @@ static int opPSUBB_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] -= src.b[0]; - cpu_state.MM[cpu_reg].b[1] -= src.b[1]; - cpu_state.MM[cpu_reg].b[2] -= src.b[2]; - cpu_state.MM[cpu_reg].b[3] -= src.b[3]; - cpu_state.MM[cpu_reg].b[4] -= src.b[4]; - cpu_state.MM[cpu_reg].b[5] -= src.b[5]; - cpu_state.MM[cpu_reg].b[6] -= src.b[6]; - cpu_state.MM[cpu_reg].b[7] -= src.b[7]; + dst->b[0] -= src.b[0]; + dst->b[1] -= src.b[1]; + dst->b[2] -= src.b[2]; + dst->b[3] -= src.b[3]; + dst->b[4] -= src.b[4]; + dst->b[5] -= src.b[5]; + dst->b[6] -= src.b[6]; + dst->b[7] -= src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -451,15 +571,21 @@ static int opPSUBW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] -= src.w[0]; - cpu_state.MM[cpu_reg].w[1] -= src.w[1]; - cpu_state.MM[cpu_reg].w[2] -= src.w[2]; - cpu_state.MM[cpu_reg].w[3] -= src.w[3]; + dst->w[0] -= src.w[0]; + dst->w[1] -= src.w[1]; + dst->w[2] -= src.w[2]; + dst->w[3] -= src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -467,15 +593,21 @@ static int opPSUBW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] -= src.w[0]; - cpu_state.MM[cpu_reg].w[1] -= src.w[1]; - cpu_state.MM[cpu_reg].w[2] -= src.w[2]; - cpu_state.MM[cpu_reg].w[3] -= src.w[3]; + dst->w[0] -= src.w[0]; + dst->w[1] -= src.w[1]; + dst->w[2] -= src.w[2]; + dst->w[3] -= src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -484,13 +616,19 @@ static int opPSUBD_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] -= src.l[0]; - cpu_state.MM[cpu_reg].l[1] -= src.l[1]; + dst->l[0] -= src.l[0]; + dst->l[1] -= src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -498,13 +636,19 @@ static int opPSUBD_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] -= src.l[0]; - cpu_state.MM[cpu_reg].l[1] -= src.l[1]; + dst->l[0] -= src.l[0]; + dst->l[1] -= src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -513,20 +657,25 @@ static int opPSUBSB_a16(uint32_t fetchdat) { MMX_REG src; - pclog("opPSUBSB_a16(%08X)\n", fetchdat); + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]); + dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -534,20 +683,25 @@ static int opPSUBSB_a32(uint32_t fetchdat) { MMX_REG src; - pclog("opPSUBSB_a32(%08X)\n", fetchdat); + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]); + dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -556,19 +710,25 @@ static int opPSUBUSB_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]); + dst->b[0] = USATB(dst->b[0] - src.b[0]); + dst->b[1] = USATB(dst->b[1] - src.b[1]); + dst->b[2] = USATB(dst->b[2] - src.b[2]); + dst->b[3] = USATB(dst->b[3] - src.b[3]); + dst->b[4] = USATB(dst->b[4] - src.b[4]); + dst->b[5] = USATB(dst->b[5] - src.b[5]); + dst->b[6] = USATB(dst->b[6] - src.b[6]); + dst->b[7] = USATB(dst->b[7] - src.b[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -576,19 +736,25 @@ static int opPSUBUSB_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]); + dst->b[0] = USATB(dst->b[0] - src.b[0]); + dst->b[1] = USATB(dst->b[1] - src.b[1]); + dst->b[2] = USATB(dst->b[2] - src.b[2]); + dst->b[3] = USATB(dst->b[3] - src.b[3]); + dst->b[4] = USATB(dst->b[4] - src.b[4]); + dst->b[5] = USATB(dst->b[5] - src.b[5]); + dst->b[6] = USATB(dst->b[6] - src.b[6]); + dst->b[7] = USATB(dst->b[7] - src.b[7]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -597,15 +763,21 @@ static int opPSUBSW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]); + dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -613,15 +785,21 @@ static int opPSUBSW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]); + dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -630,15 +808,21 @@ static int opPSUBUSW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]); + dst->w[0] = USATW(dst->w[0] - src.w[0]); + dst->w[1] = USATW(dst->w[1] - src.w[1]); + dst->w[2] = USATW(dst->w[2] - src.w[2]); + dst->w[3] = USATW(dst->w[3] - src.w[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -646,15 +830,21 @@ static int opPSUBUSW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]); + dst->w[0] = USATW(dst->w[0] - src.w[0]); + dst->w[1] = USATW(dst->w[1] - src.w[1]); + dst->w[2] = USATW(dst->w[2] - src.w[2]); + dst->w[3] = USATW(dst->w[3] - src.w[3]); + + MMX_SETEXP(cpu_reg); return 0; } diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h index 40ae66a9c..b3081b8e8 100644 --- a/src/cpu/x86_ops_mmx_cmp.h +++ b/src/cpu/x86_ops_mmx_cmp.h @@ -2,20 +2,25 @@ static int opPCMPEQB_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; + dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0; + dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0; + dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0; + dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0; + dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0; + dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0; + dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0; + dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -23,20 +28,25 @@ static int opPCMPEQB_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; + dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0; + dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0; + dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0; + dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0; + dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0; + dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0; + dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0; + dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -45,20 +55,25 @@ static int opPCMPGTB_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; + dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0; + dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0; + dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0; + dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0; + dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0; + dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0; + dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0; + dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -66,20 +81,25 @@ static int opPCMPGTB_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; + dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0; + dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0; + dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0; + dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0; + dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0; + dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0; + dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0; + dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -88,16 +108,21 @@ static int opPCMPEQW_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; + dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0; + dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0; + dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0; + dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -105,16 +130,21 @@ static int opPCMPEQW_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; + dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0; + dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0; + dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0; + dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -123,16 +153,21 @@ static int opPCMPGTW_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; + dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0; + dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0; + dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0; + dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -140,16 +175,21 @@ static int opPCMPGTW_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; + dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0; + dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0; + dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0; + dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -158,14 +198,19 @@ static int opPCMPEQD_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -173,14 +218,19 @@ static int opPCMPEQD_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -189,14 +239,19 @@ static int opPCMPGTD_a16(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } @@ -204,14 +259,19 @@ static int opPCMPGTD_a32(uint32_t fetchdat) { MMX_REG src; - + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; + dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0; + + MMX_SETEXP(cpu_reg); return 0; } diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h index c22c820c1..26d7c1693 100644 --- a/src/cpu/x86_ops_mmx_logic.h +++ b/src/cpu/x86_ops_mmx_logic.h @@ -2,24 +2,38 @@ static int opPAND_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q &= src.q; + dst->q &= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } static int opPAND_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q &= src.q; + dst->q &= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } @@ -27,24 +41,38 @@ static int opPANDN_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; + dst->q = ~dst->q & src.q; + + MMX_SETEXP(cpu_reg); + return 0; } static int opPANDN_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; + dst->q = ~dst->q & src.q; + + MMX_SETEXP(cpu_reg); + return 0; } @@ -52,24 +80,38 @@ static int opPOR_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q |= src.q; + dst->q |= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } static int opPOR_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q |= src.q; + dst->q |= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } @@ -77,23 +119,37 @@ static int opPXOR_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q ^= src.q; + dst->q ^= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } static int opPXOR_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].q ^= src.q; + dst->q ^= src.q; + + MMX_SETEXP(cpu_reg); + return 0; } diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h index bb51573e6..65bbb0c01 100644 --- a/src/cpu/x86_ops_mmx_mov.h +++ b/src/cpu/x86_ops_mmx_mov.h @@ -1,88 +1,112 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) { + uint32_t dst; + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; - cpu_state.MM[cpu_reg].l[1] = 0; + op->l[0] = cpu_state.regs[cpu_rm].l; + op->l[1] = 0; CLOCK_CYCLES(1); } else { - uint32_t dst; - SEG_CHECK_READ(cpu_state.ea_seg); dst = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; - cpu_state.MM[cpu_reg].l[0] = dst; - cpu_state.MM[cpu_reg].l[1] = 0; + op->l[0] = dst; + op->l[1] = 0; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } static int opMOVD_l_mm_a32(uint32_t fetchdat) { + uint32_t dst; + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; - cpu_state.MM[cpu_reg].l[1] = 0; + op->l[0] = cpu_state.regs[cpu_rm].l; + op->l[1] = 0; CLOCK_CYCLES(1); } else { - uint32_t dst; - SEG_CHECK_READ(cpu_state.ea_seg); dst = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; - cpu_state.MM[cpu_reg].l[0] = dst; - cpu_state.MM[cpu_reg].l[1] = 0; + op->l[0] = dst; + op->l[1] = 0; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } static int opMOVD_mm_l_a16(uint32_t fetchdat) { + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } static int opMOVD_mm_l_a32(uint32_t fetchdat) { + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } @@ -91,45 +115,59 @@ opMOVD_mm_l_a32(uint32_t fetchdat) static int opMOVD_mm_l_a16_cx(uint32_t fetchdat) { + MMX_REG *op; + if (in_smm) return opSMINT(fetchdat); MMX_ENTER(); fetch_ea_16(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } static int opMOVD_mm_l_a32_cx(uint32_t fetchdat) { + MMX_REG *op; + if (in_smm) return opSMINT(fetchdat); MMX_ENTER(); fetch_ea_32(fetchdat); + + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } #endif @@ -137,81 +175,121 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat) static int opMOVQ_q_mm_a16(uint32_t fetchdat) { + uint64_t dst; + MMX_REG src; + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); + + src = MMX_GETREG(cpu_rm); + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; + op->q = src.q; CLOCK_CYCLES(1); } else { - uint64_t dst; - SEG_CHECK_READ(cpu_state.ea_seg); dst = readmemq(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; - cpu_state.MM[cpu_reg].q = dst; + + op->q = dst; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } static int opMOVQ_q_mm_a32(uint32_t fetchdat) { + uint64_t dst; + MMX_REG src; + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); + + src = MMX_GETREG(cpu_rm); + op = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; + op->q = src.q; CLOCK_CYCLES(1); } else { - uint64_t dst; - SEG_CHECK_READ(cpu_state.ea_seg); dst = readmemq(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; - cpu_state.MM[cpu_reg].q = dst; + + op->q = dst; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } static int opMOVQ_mm_q_a16(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; + MMX_ENTER(); fetch_ea_16(fetchdat); + + src = MMX_GETREG(cpu_reg); + dst = MMX_GETREGP(cpu_rm); + if (cpu_mod == 3) { - cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q; + dst->q = src.q; CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_rm); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q); + writememq(easeg, cpu_state.eaaddr, src.q); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } static int opMOVQ_mm_q_a32(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; + MMX_ENTER(); fetch_ea_32(fetchdat); + + src = MMX_GETREG(cpu_reg); + dst = MMX_GETREGP(cpu_rm); + if (cpu_mod == 3) { - cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q; + dst->q = src.q; CLOCK_CYCLES(1); + + MMX_SETEXP(cpu_rm); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q); + writememq(easeg, cpu_state.eaaddr, src.q); if (cpu_state.abrt) return 1; + CLOCK_CYCLES(2); } + return 0; } diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h index f0180db91..90590638b 100644 --- a/src/cpu/x86_ops_mmx_pack.h +++ b/src/cpu/x86_ops_mmx_pack.h @@ -1,45 +1,61 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) { + uint32_t usrc; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + src = MMX_GETREG(cpu_rm); + dst = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0]; + dst->l[1] = src.l[0]; CLOCK_CYCLES(1); } else { - uint32_t src; - SEG_CHECK_READ(cpu_state.ea_seg); - src = readmeml(easeg, cpu_state.eaaddr); + usrc = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].l[1] = src; + dst->l[1] = usrc; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } static int opPUNPCKLDQ_a32(uint32_t fetchdat) { + uint32_t usrc; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + src = MMX_GETREG(cpu_rm); + dst = MMX_GETREGP(cpu_reg); + if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0]; + dst->l[1] = src.l[0]; CLOCK_CYCLES(1); } else { - uint32_t src; - SEG_CHECK_READ(cpu_state.ea_seg); - src = readmeml(easeg, cpu_state.eaaddr); + usrc = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 0; - cpu_state.MM[cpu_reg].l[1] = src; + dst->l[1] = usrc; CLOCK_CYCLES(2); } + + MMX_SETEXP(cpu_reg); + return 0; } @@ -47,13 +63,19 @@ static int opPUNPCKHDQ_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; - cpu_state.MM[cpu_reg].l[1] = src.l[1]; + dst->l[0] = dst->l[1]; + dst->l[1] = src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -61,13 +83,19 @@ static int opPUNPCKHDQ_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; - cpu_state.MM[cpu_reg].l[1] = src.l[1]; + dst->l[0] = dst->l[1]; + dst->l[1] = src.l[1]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -76,19 +104,25 @@ static int opPUNPCKLBW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[7] = src.b[3]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; - cpu_state.MM[cpu_reg].b[5] = src.b[2]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; - cpu_state.MM[cpu_reg].b[3] = src.b[1]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; - cpu_state.MM[cpu_reg].b[1] = src.b[0]; - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; + dst->b[7] = src.b[3]; + dst->b[6] = dst->b[3]; + dst->b[5] = src.b[2]; + dst->b[4] = dst->b[2]; + dst->b[3] = src.b[1]; + dst->b[2] = dst->b[1]; + dst->b[1] = src.b[0]; + dst->b[0] = dst->b[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -96,19 +130,25 @@ static int opPUNPCKLBW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[7] = src.b[3]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; - cpu_state.MM[cpu_reg].b[5] = src.b[2]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; - cpu_state.MM[cpu_reg].b[3] = src.b[1]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; - cpu_state.MM[cpu_reg].b[1] = src.b[0]; - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; + dst->b[7] = src.b[3]; + dst->b[6] = dst->b[3]; + dst->b[5] = src.b[2]; + dst->b[4] = dst->b[2]; + dst->b[3] = src.b[1]; + dst->b[2] = dst->b[1]; + dst->b[1] = src.b[0]; + dst->b[0] = dst->b[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -117,19 +157,25 @@ static int opPUNPCKHBW_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4]; - cpu_state.MM[cpu_reg].b[1] = src.b[4]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5]; - cpu_state.MM[cpu_reg].b[3] = src.b[5]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6]; - cpu_state.MM[cpu_reg].b[5] = src.b[6]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7]; - cpu_state.MM[cpu_reg].b[7] = src.b[7]; + dst->b[0] = dst->b[4]; + dst->b[1] = src.b[4]; + dst->b[2] = dst->b[5]; + dst->b[3] = src.b[5]; + dst->b[4] = dst->b[6]; + dst->b[5] = src.b[6]; + dst->b[6] = dst->b[7]; + dst->b[7] = src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -137,19 +183,25 @@ static int opPUNPCKHBW_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4]; - cpu_state.MM[cpu_reg].b[1] = src.b[4]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5]; - cpu_state.MM[cpu_reg].b[3] = src.b[5]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6]; - cpu_state.MM[cpu_reg].b[5] = src.b[6]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7]; - cpu_state.MM[cpu_reg].b[7] = src.b[7]; + dst->b[0] = dst->b[4]; + dst->b[1] = src.b[4]; + dst->b[2] = dst->b[5]; + dst->b[3] = src.b[5]; + dst->b[4] = dst->b[6]; + dst->b[5] = src.b[6]; + dst->b[6] = dst->b[7]; + dst->b[7] = src.b[7]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -158,15 +210,21 @@ static int opPUNPCKLWD_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[3] = src.w[1]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1]; - cpu_state.MM[cpu_reg].w[1] = src.w[0]; - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0]; + dst->w[3] = src.w[1]; + dst->w[2] = dst->w[1]; + dst->w[1] = src.w[0]; + dst->w[0] = dst->w[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -174,15 +232,21 @@ static int opPUNPCKLWD_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[3] = src.w[1]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1]; - cpu_state.MM[cpu_reg].w[1] = src.w[0]; - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0]; + dst->w[3] = src.w[1]; + dst->w[2] = dst->w[1]; + dst->w[1] = src.w[0]; + dst->w[0] = dst->w[0]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -191,15 +255,21 @@ static int opPUNPCKHWD_a16(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2]; - cpu_state.MM[cpu_reg].w[1] = src.w[2]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3]; - cpu_state.MM[cpu_reg].w[3] = src.w[3]; + dst->w[0] = dst->w[2]; + dst->w[1] = src.w[2]; + dst->w[2] = dst->w[3]; + dst->w[3] = src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -207,15 +277,21 @@ static int opPUNPCKHWD_a32(uint32_t fetchdat) { MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSRC(); - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2]; - cpu_state.MM[cpu_reg].w[1] = src.w[2]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3]; - cpu_state.MM[cpu_reg].w[3] = src.w[3]; + dst->w[0] = dst->w[2]; + dst->w[1] = src.w[2]; + dst->w[2] = dst->w[3]; + dst->w[3] = src.w[3]; + + MMX_SETEXP(cpu_reg); return 0; } @@ -223,42 +299,52 @@ opPUNPCKHWD_a32(uint32_t fetchdat) static int opPACKSSWB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]); + dst = MMX_GETREGP(cpu_reg); + + MMX_GETSRC(); + + dst->sb[0] = SSATB(dst->sw[0]); + dst->sb[1] = SSATB(dst->sw[1]); + dst->sb[2] = SSATB(dst->sw[2]); + dst->sb[3] = SSATB(dst->sw[3]); + dst->sb[4] = SSATB(src.sw[0]); + dst->sb[5] = SSATB(src.sw[1]); + dst->sb[6] = SSATB(src.sw[2]); + dst->sb[7] = SSATB(src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } static int opPACKSSWB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]); + dst = MMX_GETREGP(cpu_reg); + + MMX_GETSRC(); + + dst->sb[0] = SSATB(dst->sw[0]); + dst->sb[1] = SSATB(dst->sw[1]); + dst->sb[2] = SSATB(dst->sw[2]); + dst->sb[3] = SSATB(dst->sw[3]); + dst->sb[4] = SSATB(src.sw[0]); + dst->sb[5] = SSATB(src.sw[1]); + dst->sb[6] = SSATB(src.sw[2]); + dst->sb[7] = SSATB(src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -266,42 +352,52 @@ opPACKSSWB_a32(uint32_t fetchdat) static int opPACKUSWB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]); - cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]); - cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]); - cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]); + dst = MMX_GETREGP(cpu_reg); + + MMX_GETSRC(); + + dst->b[0] = USATB(dst->sw[0]); + dst->b[1] = USATB(dst->sw[1]); + dst->b[2] = USATB(dst->sw[2]); + dst->b[3] = USATB(dst->sw[3]); + dst->b[4] = USATB(src.sw[0]); + dst->b[5] = USATB(src.sw[1]); + dst->b[6] = USATB(src.sw[2]); + dst->b[7] = USATB(src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } static int opPACKUSWB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]); - cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]); - cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]); - cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]); + dst = MMX_GETREGP(cpu_reg); + + MMX_GETSRC(); + + dst->b[0] = USATB(dst->sw[0]); + dst->b[1] = USATB(dst->sw[1]); + dst->b[2] = USATB(dst->sw[2]); + dst->b[3] = USATB(dst->sw[3]); + dst->b[4] = USATB(src.sw[0]); + dst->b[5] = USATB(src.sw[1]); + dst->b[6] = USATB(src.sw[2]); + dst->b[7] = USATB(src.sw[3]); + + MMX_SETEXP(cpu_reg); return 0; } @@ -309,34 +405,48 @@ opPACKUSWB_a32(uint32_t fetchdat) static int opPACKSSDW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; + MMX_REG dst2; MMX_ENTER(); fetch_ea_16(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]); + dst = MMX_GETREGP(cpu_reg); + dst2 = *dst; + + MMX_GETSRC(); + + dst->sw[0] = SSATW(dst2.sl[0]); + dst->sw[1] = SSATW(dst2.sl[1]); + dst->sw[2] = SSATW(src.sl[0]); + dst->sw[3] = SSATW(src.sl[1]); + + MMX_SETEXP(cpu_reg); return 0; } static int opPACKSSDW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; + MMX_REG dst2; MMX_ENTER(); fetch_ea_32(fetchdat); - MMX_GETSRC(); - dst = cpu_state.MM[cpu_reg]; - cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]); + dst = MMX_GETREGP(cpu_reg); + dst2 = *dst; + + MMX_GETSRC(); + + dst->sw[0] = SSATW(dst2.sl[0]); + dst->sw[1] = SSATW(dst2.sl[1]); + dst->sw[2] = SSATW(src.sl[0]); + dst->sw[3] = SSATW(src.sl[1]); + + MMX_SETEXP(cpu_reg); return 0; } diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h index c9ddc9b93..c0c80e87e 100644 --- a/src/cpu/x86_ops_mmx_shift.h +++ b/src/cpu/x86_ops_mmx_shift.h @@ -1,6 +1,6 @@ #define MMX_GETSHIFT() \ if (cpu_mod == 3) { \ - shift = cpu_state.MM[cpu_rm].b[0]; \ + shift = (MMX_GETREG(cpu_rm)).b[0]; \ CLOCK_CYCLES(1); \ } else { \ SEG_CHECK_READ(cpu_state.ea_seg); \ @@ -16,37 +16,39 @@ opPSxxW_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; + MMX_REG *dst; cpu_state.pc += 2; MMX_ENTER(); + dst = MMX_GETREGP(reg); switch (op) { case 0x10: /*PSRLW*/ if (shift > 15) - cpu_state.MM[reg].q = 0; + dst->q = 0; else { - cpu_state.MM[reg].w[0] >>= shift; - cpu_state.MM[reg].w[1] >>= shift; - cpu_state.MM[reg].w[2] >>= shift; - cpu_state.MM[reg].w[3] >>= shift; + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; } break; case 0x20: /*PSRAW*/ if (shift > 15) shift = 15; - cpu_state.MM[reg].sw[0] >>= shift; - cpu_state.MM[reg].sw[1] >>= shift; - cpu_state.MM[reg].sw[2] >>= shift; - cpu_state.MM[reg].sw[3] >>= shift; + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; break; case 0x30: /*PSLLW*/ if (shift > 15) - cpu_state.MM[reg].q = 0; + dst->q = 0; else { - cpu_state.MM[reg].w[0] <<= shift; - cpu_state.MM[reg].w[1] <<= shift; - cpu_state.MM[reg].w[2] <<= shift; - cpu_state.MM[reg].w[3] <<= shift; + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; } break; default: @@ -55,6 +57,8 @@ opPSxxW_imm(uint32_t fetchdat) return 0; } + MMX_SETEXP(reg); + CLOCK_CYCLES(1); return 0; } @@ -62,126 +66,162 @@ opPSxxW_imm(uint32_t fetchdat) static int opPSLLW_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].w[0] <<= shift; - cpu_state.MM[cpu_reg].w[1] <<= shift; - cpu_state.MM[cpu_reg].w[2] <<= shift; - cpu_state.MM[cpu_reg].w[3] <<= shift; + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSLLW_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].w[0] <<= shift; - cpu_state.MM[cpu_reg].w[1] <<= shift; - cpu_state.MM[cpu_reg].w[2] <<= shift; - cpu_state.MM[cpu_reg].w[3] <<= shift; + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRLW_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].w[0] >>= shift; - cpu_state.MM[cpu_reg].w[1] >>= shift; - cpu_state.MM[cpu_reg].w[2] >>= shift; - cpu_state.MM[cpu_reg].w[3] >>= shift; + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRLW_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].w[0] >>= shift; - cpu_state.MM[cpu_reg].w[1] >>= shift; - cpu_state.MM[cpu_reg].w[2] >>= shift; - cpu_state.MM[cpu_reg].w[3] >>= shift; + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRAW_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) shift = 15; - cpu_state.MM[cpu_reg].sw[0] >>= shift; - cpu_state.MM[cpu_reg].sw[1] >>= shift; - cpu_state.MM[cpu_reg].sw[2] >>= shift; - cpu_state.MM[cpu_reg].sw[3] >>= shift; + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } static int opPSRAW_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 15) shift = 15; - cpu_state.MM[cpu_reg].sw[0] >>= shift; - cpu_state.MM[cpu_reg].sw[1] >>= shift; - cpu_state.MM[cpu_reg].sw[2] >>= shift; - cpu_state.MM[cpu_reg].sw[3] >>= shift; + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } @@ -192,31 +232,34 @@ opPSxxD_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; + MMX_REG *dst; cpu_state.pc += 2; MMX_ENTER(); + dst = MMX_GETREGP(reg); + switch (op) { case 0x10: /*PSRLD*/ if (shift > 31) - cpu_state.MM[reg].q = 0; + dst->q = 0; else { - cpu_state.MM[reg].l[0] >>= shift; - cpu_state.MM[reg].l[1] >>= shift; + dst->l[0] >>= shift; + dst->l[1] >>= shift; } break; case 0x20: /*PSRAD*/ if (shift > 31) shift = 31; - cpu_state.MM[reg].sl[0] >>= shift; - cpu_state.MM[reg].sl[1] >>= shift; + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; break; case 0x30: /*PSLLD*/ if (shift > 31) - cpu_state.MM[reg].q = 0; + dst->q = 0; else { - cpu_state.MM[reg].l[0] <<= shift; - cpu_state.MM[reg].l[1] <<= shift; + dst->l[0] <<= shift; + dst->l[1] <<= shift; } break; default: @@ -225,6 +268,8 @@ opPSxxD_imm(uint32_t fetchdat) return 0; } + MMX_SETEXP(reg); + CLOCK_CYCLES(1); return 0; } @@ -232,114 +277,150 @@ opPSxxD_imm(uint32_t fetchdat) static int opPSLLD_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].l[0] <<= shift; - cpu_state.MM[cpu_reg].l[1] <<= shift; + dst->l[0] <<= shift; + dst->l[1] <<= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSLLD_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].l[0] <<= shift; - cpu_state.MM[cpu_reg].l[1] <<= shift; + dst->l[0] <<= shift; + dst->l[1] <<= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRLD_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].l[0] >>= shift; - cpu_state.MM[cpu_reg].l[1] >>= shift; + dst->l[0] >>= shift; + dst->l[1] >>= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRLD_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else { - cpu_state.MM[cpu_reg].l[0] >>= shift; - cpu_state.MM[cpu_reg].l[1] >>= shift; + dst->l[0] >>= shift; + dst->l[1] >>= shift; } + MMX_SETEXP(cpu_reg); + return 0; } static int opPSRAD_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) shift = 31; - cpu_state.MM[cpu_reg].sl[0] >>= shift; - cpu_state.MM[cpu_reg].sl[1] >>= shift; + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } static int opPSRAD_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 31) shift = 31; - cpu_state.MM[cpu_reg].sl[0] >>= shift; - cpu_state.MM[cpu_reg].sl[1] >>= shift; + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } @@ -350,27 +431,32 @@ opPSxxQ_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; + MMX_REG *dst; cpu_state.pc += 2; + MMX_ENTER(); + dst = MMX_GETREGP(reg); + switch (op) { case 0x10: /*PSRLW*/ if (shift > 63) - cpu_state.MM[reg].q = 0; + dst->q = 0; else - cpu_state.MM[reg].q >>= shift; + dst->q >>= shift; break; case 0x20: /*PSRAW*/ if (shift > 63) shift = 63; - cpu_state.MM[reg].sq >>= shift; + + dst->sq >>= shift; break; case 0x30: /*PSLLW*/ if (shift > 63) - cpu_state.MM[reg].q = 0; + dst->q = 0; else - cpu_state.MM[reg].q <<= shift; + dst->q <<= shift; break; default: cpu_state.pc = cpu_state.oldpc; @@ -378,6 +464,8 @@ opPSxxQ_imm(uint32_t fetchdat) return 0; } + MMX_SETEXP(reg); + CLOCK_CYCLES(1); return 0; } @@ -385,34 +473,46 @@ opPSxxQ_imm(uint32_t fetchdat) static int opPSLLQ_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else - cpu_state.MM[cpu_reg].q <<= shift; + dst->q <<= shift; + + MMX_SETEXP(cpu_reg); return 0; } static int opPSLLQ_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else - cpu_state.MM[cpu_reg].q <<= shift; + dst->q <<= shift; + + MMX_SETEXP(cpu_reg); return 0; } @@ -420,34 +520,46 @@ opPSLLQ_a32(uint32_t fetchdat) static int opPSRLQ_a16(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else - cpu_state.MM[cpu_reg].q >>= shift; + dst->q >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } static int opPSRLQ_a32(uint32_t fetchdat) { + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = MMX_GETREGP(cpu_reg); + MMX_GETSHIFT(); if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; + dst->q = 0; else - cpu_state.MM[cpu_reg].q >>= shift; + dst->q >>= shift; + + MMX_SETEXP(cpu_reg); return 0; } diff --git a/src/cpu/x87.c b/src/cpu/x87.c index 98ceb105b..181b7b9ca 100644 --- a/src/cpu/x87.c +++ b/src/cpu/x87.c @@ -439,6 +439,79 @@ FPU_tagof(const floatx80 reg) return X87_TAG_VALID; } +uint8_t +pack_FPU_TW(uint16_t twd) +{ + uint8_t tag_byte = 0; + + if ((twd & 0x0003) != 0x0003) tag_byte |= 0x01; + if ((twd & 0x000c) != 0x000c) tag_byte |= 0x02; + if ((twd & 0x0030) != 0x0030) tag_byte |= 0x04; + if ((twd & 0x00c0) != 0x00c0) tag_byte |= 0x08; + if ((twd & 0x0300) != 0x0300) tag_byte |= 0x10; + if ((twd & 0x0c00) != 0x0c00) tag_byte |= 0x20; + if ((twd & 0x3000) != 0x3000) tag_byte |= 0x40; + if ((twd & 0xc000) != 0xc000) tag_byte |= 0x80; + + return tag_byte; +} + +uint16_t +unpack_FPU_TW(uint16_t tag_byte) +{ + uint32_t twd = 0; + + /* FTW + * + * Note that the original format for FTW can be recreated from the stored + * FTW valid bits and the stored 80-bit FP data (assuming the stored data + * was not the contents of MMX registers) using the following table: + + | Exponent | Exponent | Fraction | J,M bits | FTW valid | x87 FTW | + | all 1s | all 0s | all 0s | | | | + ------------------------------------------------------------------- + | 0 | 0 | 0 | 0x | 1 | S 10 | + | 0 | 0 | 0 | 1x | 1 | V 00 | + ------------------------------------------------------------------- + | 0 | 0 | 1 | 00 | 1 | S 10 | + | 0 | 0 | 1 | 10 | 1 | V 00 | + ------------------------------------------------------------------- + | 0 | 1 | 0 | 0x | 1 | S 10 | + | 0 | 1 | 0 | 1x | 1 | S 10 | + ------------------------------------------------------------------- + | 0 | 1 | 1 | 00 | 1 | Z 01 | + | 0 | 1 | 1 | 10 | 1 | S 10 | + ------------------------------------------------------------------- + | 1 | 0 | 0 | 1x | 1 | S 10 | + | 1 | 0 | 0 | 1x | 1 | S 10 | + ------------------------------------------------------------------- + | 1 | 0 | 1 | 00 | 1 | S 10 | + | 1 | 0 | 1 | 10 | 1 | S 10 | + ------------------------------------------------------------------- + | all combinations above | 0 | E 11 | + + * + * The J-bit is defined to be the 1-bit binary integer to the left of + * the decimal place in the significand. + * + * The M-bit is defined to be the most significant bit of the fractional + * portion of the significand (i.e., the bit immediately to the right of + * the decimal place). When the M-bit is the most significant bit of the + * fractional portion of the significand, it must be 0 if the fraction + * is all 0's. + */ + + for (int index = 7; index >= 0; index--, twd <<= 2, tag_byte <<= 1) { + if (tag_byte & 0x80) { + const floatx80 *fpu_reg = &fpu_state.st_space[index & 7]; + twd |= FPU_tagof(*fpu_reg); + } else { + twd |= X87_TAG_EMPTY; + } + } + + return (twd >> 2); +} #ifdef ENABLE_808X_LOG void diff --git a/src/cpu/x87.h b/src/cpu/x87.h index 5d460bc4b..66d51dbd9 100644 --- a/src/cpu/x87.h +++ b/src/cpu/x87.h @@ -10,9 +10,14 @@ static __inline void x87_set_mmx(void) { uint64_t *p; - cpu_state.TOP = 0; - p = (uint64_t *) cpu_state.tag; - *p = 0x0101010101010101ull; + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } else { + cpu_state.TOP = 0; + p = (uint64_t *) cpu_state.tag; + *p = 0x0101010101010101ull; + } cpu_state.ismmx = 1; } @@ -20,8 +25,13 @@ static __inline void x87_emms(void) { uint64_t *p; - p = (uint64_t *) cpu_state.tag; - *p = 0; + if (fpu_softfloat) { + fpu_state.tag = 0xffff; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } else { + p = (uint64_t *) cpu_state.tag; + *p = 0; + } cpu_state.ismmx = 0; } @@ -141,6 +151,8 @@ void FPU_stack_underflow(uint32_t fetchdat, int stnr, int pop_stack); int FPU_handle_NaN32(floatx80 a, float32 b, floatx80 *r, struct float_status_t *status); int FPU_handle_NaN64(floatx80 a, float64 b, floatx80 *r, struct float_status_t *status); int FPU_tagof(const floatx80 reg); +uint8_t pack_FPU_TW(uint16_t twd); +uint16_t unpack_FPU_TW(uint16_t tag_byte); static __inline uint16_t i387_get_control_word(void) diff --git a/src/ddma.c b/src/ddma.c index 7623dc0df..098b1c573 100644 --- a/src/ddma.c +++ b/src/ddma.c @@ -34,6 +34,7 @@ #include <86box/pit.h> #include <86box/dma.h> #include <86box/ddma.h> +#include <86box/plat_unused.h> #ifdef ENABLE_DDMA_LOG int ddma_do_log = ENABLE_DDMA_LOG; @@ -54,9 +55,9 @@ ddma_log(const char *fmt, ...) #endif static uint8_t -ddma_reg_read(uint16_t addr, void *p) +ddma_reg_read(uint16_t addr, void *priv) { - ddma_channel_t *dev = (ddma_channel_t *) p; + ddma_channel_t *dev = (ddma_channel_t *) priv; uint8_t ret = 0xff; int ch = dev->channel; int dmab = (ch >= 4) ? 0xc0 : 0x00; @@ -80,15 +81,18 @@ ddma_reg_read(uint16_t addr, void *p) case 0x09: ret = inb(dmab + 0x08); break; + + default: + break; } return ret; } static void -ddma_reg_write(uint16_t addr, uint8_t val, void *p) +ddma_reg_write(uint16_t addr, uint8_t val, void *priv) { - ddma_channel_t *dev = (ddma_channel_t *) p; + ddma_channel_t *dev = (ddma_channel_t *) priv; int ch = dev->channel; int page_regs[4] = { 7, 3, 1, 2 }; int dmab = (ch >= 4) ? 0xc0 : 0x00; @@ -138,6 +142,9 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p) case 0x0f: outb(dmab + 0x0a, (val << 2) | (ch & 3)); break; + + default: + break; } } @@ -163,7 +170,7 @@ ddma_close(void *priv) } static void * -ddma_init(const device_t *info) +ddma_init(UNUSED(const device_t *info)) { ddma_t *dev; diff --git a/src/device.c b/src/device.c index 7d8f5e88e..47dae84cf 100644 --- a/src/device.c +++ b/src/device.c @@ -88,46 +88,46 @@ device_init(void) } void -device_set_context(device_context_t *c, const device_t *d, int inst) +device_set_context(device_context_t *c, const device_t *dev, int inst) { void *sec; void *single_sec; memset(c, 0, sizeof(device_context_t)); - c->dev = d; + c->dev = dev; c->instance = inst; if (inst) { - sprintf(c->name, "%s #%i", d->name, inst); + sprintf(c->name, "%s #%i", dev->name, inst); /* If this is the first instance and a numbered section is not present, but a non-numbered section of the same name is, rename the non-numbered section to numbered. */ if (inst == 1) { sec = config_find_section(c->name); - single_sec = config_find_section((char *) d->name); + single_sec = config_find_section((char *) dev->name); if ((sec == NULL) && (single_sec != NULL)) config_rename_section(single_sec, c->name); } } else - sprintf(c->name, "%s", d->name); + sprintf(c->name, "%s", dev->name); } static void -device_context_common(const device_t *d, int inst) +device_context_common(const device_t *dev, int inst) { memcpy(&device_prev, &device_current, sizeof(device_context_t)); - device_set_context(&device_current, d, inst); + device_set_context(&device_current, dev, inst); } void -device_context(const device_t *d) +device_context(const device_t *dev) { - device_context_common(d, 0); + device_context_common(dev, 0); } void -device_context_inst(const device_t *d, int inst) +device_context_inst(const device_t *dev, int inst) { - device_context_common(d, inst); + device_context_common(dev, inst); } void @@ -137,13 +137,13 @@ device_context_restore(void) } static void * -device_add_common(const device_t *d, const device_t *cd, void *p, void *params, int inst) +device_add_common(const device_t *dev, const device_t *cd, void *p, void *params, int inst) { void *priv = NULL; int c; for (c = 0; c < 256; c++) { - if (!inst && (devices[c] == (device_t *) d)) { + if (!inst && (devices[c] == (device_t *) dev)) { device_log("DEVICE: device already exists!\n"); return (NULL); } @@ -157,17 +157,17 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, /* Do this so that a chained device_add will not identify the same ID its master device is already trying to assign. */ - devices[c] = (device_t *) d; + devices[c] = (device_t *) dev; if (p == NULL) { memcpy(&device_prev, &device_current, sizeof(device_context_t)); device_set_context(&device_current, cd, inst); - if (d->init != NULL) { - priv = (d->flags & DEVICE_EXTPARAMS) ? d->init_ext(d, params) : d->init(d); + if (dev->init != NULL) { + priv = (dev->flags & DEVICE_EXTPARAMS) ? dev->init_ext(dev, params) : dev->init(dev); if (priv == NULL) { - if (d->name) - device_log("DEVICE: device '%s' init failed\n", d->name); + if (dev->name) + device_log("DEVICE: device '%s' init failed\n", dev->name); else device_log("DEVICE: device init failed\n"); @@ -178,8 +178,8 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, } } - if (d->name) - device_log("DEVICE: device '%s' init successful\n", d->name); + if (dev->name) + device_log("DEVICE: device '%s' init successful\n", dev->name); else device_log("DEVICE: device init successful\n"); @@ -192,114 +192,114 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, } char * -device_get_internal_name(const device_t *d) +device_get_internal_name(const device_t *dev) { - if (d == NULL) + if (dev == NULL) return ""; - return (char *) d->internal_name; + return (char *) dev->internal_name; } void * -device_add(const device_t *d) +device_add(const device_t *dev) { - return device_add_common(d, d, NULL, NULL, 0); + return device_add_common(dev, dev, NULL, NULL, 0); } void * -device_add_parameters(const device_t *d, void *params) +device_add_parameters(const device_t *dev, void *params) { - return device_add_common(d, d, NULL, params, 0); + return device_add_common(dev, dev, NULL, params, 0); } /* For devices that do not have an init function (internal video etc.) */ void -device_add_ex(const device_t *d, void *priv) +device_add_ex(const device_t *dev, void *priv) { - device_add_common(d, d, priv, NULL, 0); + device_add_common(dev, dev, priv, NULL, 0); } void -device_add_ex_parameters(const device_t *d, void *priv, void *params) +device_add_ex_parameters(const device_t *dev, void *priv, void *params) { - device_add_common(d, d, priv, params, 0); + device_add_common(dev, dev, priv, params, 0); } void * -device_add_inst(const device_t *d, int inst) +device_add_inst(const device_t *dev, int inst) { - return device_add_common(d, d, NULL, NULL, inst); + return device_add_common(dev, dev, NULL, NULL, inst); } void * -device_add_inst_parameters(const device_t *d, int inst, void *params) +device_add_inst_parameters(const device_t *dev, int inst, void *params) { - return device_add_common(d, d, NULL, params, inst); + return device_add_common(dev, dev, NULL, params, inst); } /* For devices that do not have an init function (internal video etc.) */ void -device_add_inst_ex(const device_t *d, void *priv, int inst) +device_add_inst_ex(const device_t *dev, void *priv, int inst) { - device_add_common(d, d, priv, NULL, inst); + device_add_common(dev, dev, priv, NULL, inst); } void -device_add_inst_ex_parameters(const device_t *d, void *priv, int inst, void *params) +device_add_inst_ex_parameters(const device_t *dev, void *priv, int inst, void *params) { - device_add_common(d, d, priv, params, inst); + device_add_common(dev, dev, priv, params, inst); } /* These eight are to add a device with another device's context - will be used to add machines' internal devices. */ void * -device_cadd(const device_t *d, const device_t *cd) +device_cadd(const device_t *dev, const device_t *cd) { - return device_add_common(d, cd, NULL, NULL, 0); + return device_add_common(dev, cd, NULL, NULL, 0); } void * -device_cadd_parameters(const device_t *d, const device_t *cd, void *params) +device_cadd_parameters(const device_t *dev, const device_t *cd, void *params) { - return device_add_common(d, cd, NULL, params, 0); + return device_add_common(dev, cd, NULL, params, 0); } /* For devices that do not have an init function (internal video etc.) */ void -device_cadd_ex(const device_t *d, const device_t *cd, void *priv) +device_cadd_ex(const device_t *dev, const device_t *cd, void *priv) { - device_add_common(d, cd, priv, NULL, 0); + device_add_common(dev, cd, priv, NULL, 0); } void -device_cadd_ex_parameters(const device_t *d, const device_t *cd, void *priv, void *params) +device_cadd_ex_parameters(const device_t *dev, const device_t *cd, void *priv, void *params) { - device_add_common(d, cd, priv, params, 0); + device_add_common(dev, cd, priv, params, 0); } void * -device_cadd_inst(const device_t *d, const device_t *cd, int inst) +device_cadd_inst(const device_t *dev, const device_t *cd, int inst) { - return device_add_common(d, cd, NULL, NULL, inst); + return device_add_common(dev, cd, NULL, NULL, inst); } void * -device_cadd_inst_parameters(const device_t *d, const device_t *cd, int inst, void *params) +device_cadd_inst_parameters(const device_t *dev, const device_t *cd, int inst, void *params) { - return device_add_common(d, cd, NULL, params, inst); + return device_add_common(dev, cd, NULL, params, inst); } /* For devices that do not have an init function (internal video etc.) */ void -device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) +device_cadd_inst_ex(const device_t *dev, const device_t *cd, void *priv, int inst) { - device_add_common(d, cd, priv, NULL, inst); + device_add_common(dev, cd, priv, NULL, inst); } void -device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void *params) +device_cadd_inst_ex_parameters(const device_t *dev, const device_t *cd, void *priv, int inst, void *params) { - device_add_common(d, cd, priv, params, inst); + device_add_common(dev, cd, priv, params, inst); } void @@ -328,11 +328,11 @@ device_reset_all(uint32_t match_flags) } void * -device_get_priv(const device_t *d) +device_get_priv(const device_t *dev) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) + if (devices[c] == dev) return (device_priv[c]); } } @@ -341,15 +341,15 @@ device_get_priv(const device_t *d) } int -device_available(const device_t *d) +device_available(const device_t *dev) { device_config_t *config = NULL; device_config_bios_t *bios = NULL; int roms_present = 0; int i = 0; - if (d != NULL) { - config = (device_config_t *) d->config; + if (dev != NULL) { + config = (device_config_t *) dev->config; if (config != NULL) { while (config->type != -1) { if (config->type == CONFIG_BIOS) { @@ -372,8 +372,8 @@ device_available(const device_t *d) } /* No CONFIG_BIOS field present, use the classic available(). */ - if (d->available != NULL) - return (d->available()); + if (dev->available != NULL) + return (dev->available()); else return 1; } @@ -383,13 +383,13 @@ device_available(const device_t *d) } const char * -device_get_bios_file(const device_t *d, const char *internal_name, int file_no) +device_get_bios_file(const device_t *dev, const char *internal_name, int file_no) { device_config_t *config = NULL; device_config_bios_t *bios = NULL; - if (d != NULL) { - config = (device_config_t *) d->config; + if (dev != NULL) { + config = (device_config_t *) dev->config; if (config != NULL) { while (config->type != -1) { if (config->type == CONFIG_BIOS) { @@ -416,18 +416,18 @@ device_get_bios_file(const device_t *d, const char *internal_name, int file_no) } int -device_has_config(const device_t *d) +device_has_config(const device_t *dev) { int c = 0; device_config_t *config; - if (d == NULL) + if (dev == NULL) return 0; - if (d->config == NULL) + if (dev->config == NULL) return 0; - config = (device_config_t *) d->config; + config = (device_config_t *) dev->config; while (config->type != -1) { if (config->type != CONFIG_MAC) @@ -439,11 +439,11 @@ device_has_config(const device_t *d) } int -device_poll(const device_t *d, int x, int y, int z, int b) +device_poll(const device_t *dev, int x, int y, int z, int b) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) { + if (devices[c] == dev) { if (devices[c]->poll) return (devices[c]->poll(x, y, z, b, 0, 0, device_priv[c])); } @@ -454,11 +454,11 @@ device_poll(const device_t *d, int x, int y, int z, int b) } void -device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd) +device_register_pci_slot(const device_t *dev, int device, int type, int inta, int intb, int intc, int intd) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) { + if (devices[c] == dev) { if (devices[c]->register_pci_slot) devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); return; @@ -470,38 +470,38 @@ device_register_pci_slot(const device_t *d, int device, int type, int inta, int } void -device_get_name(const device_t *d, int bus, char *name) +device_get_name(const device_t *dev, int bus, char *name) { char *sbus = NULL; char *fbus; char *tname; char pbus[8] = { 0 }; - if (d == NULL) + if (dev == NULL) return; name[0] = 0x00; if (bus) { - if (d->flags & DEVICE_ISA) - sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; - else if (d->flags & DEVICE_CBUS) + if (dev->flags & DEVICE_ISA) + sbus = (dev->flags & DEVICE_AT) ? "ISA16" : "ISA"; + else if (dev->flags & DEVICE_CBUS) sbus = "C-BUS"; - else if (d->flags & DEVICE_MCA) + else if (dev->flags & DEVICE_MCA) sbus = "MCA"; - else if (d->flags & DEVICE_EISA) + else if (dev->flags & DEVICE_EISA) sbus = "EISA"; - else if (d->flags & DEVICE_VLB) + else if (dev->flags & DEVICE_VLB) sbus = "VLB"; - else if (d->flags & DEVICE_PCI) + else if (dev->flags & DEVICE_PCI) sbus = "PCI"; - else if (d->flags & DEVICE_AGP) + else if (dev->flags & DEVICE_AGP) sbus = "AGP"; - else if (d->flags & DEVICE_AC97) + else if (dev->flags & DEVICE_AC97) sbus = "AMR"; - else if (d->flags & DEVICE_COM) + else if (dev->flags & DEVICE_COM) sbus = "COM"; - else if (d->flags & DEVICE_LPT) + else if (dev->flags & DEVICE_LPT) sbus = "LPT"; if (sbus != NULL) { @@ -515,7 +515,7 @@ device_get_name(const device_t *d, int bus, char *name) sbus = "ISA"; else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) { sbus = NULL; - strcat(name, d->name); + strcat(name, dev->name); return; } @@ -525,17 +525,17 @@ device_get_name(const device_t *d, int bus, char *name) strcat(pbus, ")"); /* Allocate the temporary device name string and set it to all zeroes. */ - tname = (char *) malloc(strlen(d->name) + 1); - memset(tname, 0x00, strlen(d->name) + 1); + tname = (char *) malloc(strlen(dev->name) + 1); + memset(tname, 0x00, strlen(dev->name) + 1); /* First strip the bus string with parentheses. */ - fbus = strstr(d->name, pbus); - if (fbus == d->name) - strcat(tname, d->name + strlen(pbus) + 1); + fbus = strstr(dev->name, pbus); + if (fbus == dev->name) + strcat(tname, dev->name + strlen(pbus) + 1); else if (fbus == NULL) - strcat(tname, d->name); + strcat(tname, dev->name); else { - strncat(tname, d->name, fbus - d->name - 1); + strncat(tname, dev->name, fbus - dev->name - 1); strcat(tname, fbus + strlen(pbus)); } @@ -556,9 +556,9 @@ device_get_name(const device_t *d, int bus, char *name) free(tname); tname = NULL; } else - strcat(name, d->name); + strcat(name, dev->name); } else - strcat(name, d->name); + strcat(name, dev->name); } void @@ -771,7 +771,7 @@ device_is_valid(const device_t *device, int m) if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) return 0; - if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) + if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2_PORTS)) return 0; if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) diff --git a/src/device/kbc_at.c b/src/device/kbc_at.c index 7ece0cabc..ee5a6d17e 100644 --- a/src/device/kbc_at.c +++ b/src/device/kbc_at.c @@ -81,7 +81,9 @@ #define KBC_VEN_ACER 0x20 #define KBC_VEN_NCR 0x24 #define KBC_VEN_ALI 0x28 -#define KBC_VEN_MASK 0x3c +#define KBC_VEN_SIEMENS 0x2c +#define KBC_VEN_COMPAQ 0x30 +#define KBC_VEN_MASK 0x7c #define FLAG_CLOCK 0x01 #define FLAG_CACHE 0x02 @@ -747,6 +749,12 @@ write_p2(atkbc_t *dev, uint8_t val) flushmmucache(); if (kbc_ven == KBC_VEN_ALI) smbase = 0x00030000; + /* Yes, this is a hack, but until someone gets ahold of the real PCD-2L + and can find out what they actually did to make it boot from FFFFF0 + correctly despite A20 being gated when the CPU is reset, this will + have to do. */ + else if (kbc_ven == KBC_VEN_SIEMENS) + loadcs(0xF000); } } } @@ -974,6 +982,8 @@ write64_generic(void *priv, uint8_t val) } else if (((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_GREEN)) /* (B0 or F0) | (0x08 or 0x0c) */ kbc_delay_to_ob(dev, ((dev->p1 | fixed_bits) & 0xf0) | (((dev->flags & KBC_VEN_MASK) == KBC_VEN_ACER) ? 0x08 : 0x0c), 0, 0x00); + else if (kbc_ven == KBC_VEN_COMPAQ) + kbc_delay_to_ob(dev, dev->p1 | (hasfpu ? 0x00 : 0x04), 0, 0x00); else /* (B0 or F0) | (0x04 or 0x44) */ kbc_delay_to_ob(dev, dev->p1 | fixed_bits, 0, 0x00); @@ -1031,7 +1041,7 @@ write60_ami(void *priv, uint8_t val) switch (dev->command) { /* 0x40 - 0x5F are aliases for 0x60-0x7F */ case 0x40 ... 0x5f: - kbc_at_log("ATkbc: AMI - alias write to %08X\n", dev->command); + kbc_at_log("ATkbc: AMI - alias write to %02X\n", dev->command & 0x1f); dev->mem[(dev->command & 0x1f) + 0x20] = val; if (dev->command == 0x60) write_cmd(dev, val); @@ -1170,7 +1180,7 @@ write64_ami(void *priv, uint8_t val) break; case 0xaf: /* set extended controller RAM */ - if (kbc_ven != KBC_VEN_ALI) { + if ((kbc_ven != KBC_VEN_SIEMENS) && (kbc_ven != KBC_VEN_ALI)) { kbc_at_log("ATkbc: set extended controller RAM\n"); dev->wantdata = 1; dev->state = STATE_KBC_PARAM; @@ -1282,6 +1292,39 @@ write64_ami(void *priv, uint8_t val) return write64_generic(dev, val); } +static uint8_t +write64_siemens(void *priv, uint8_t val) +{ + atkbc_t *dev = (atkbc_t *) priv; + + switch (val) { + case 0x92: /*Siemens Award - 92 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 92 sent by PCD-2L BIOS\n"); + return 0; + + case 0x94: /*Siemens Award - 94 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 94 sent by PCD-2L BIOS\n"); + return 0; + + case 0x9a: /*Siemens Award - 9A sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 9A sent by PCD-2L BIOS\n"); + return 0; + + case 0x9c: /*Siemens Award - 9C sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 9C sent by PCD-2L BIOS\n"); + return 0; + + case 0xa9: /*Siemens Award - A9 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - A9 sent by PCD-2L BIOS\n"); + return 0; + + default: + break; + } + + return write64_ami(dev, val); +} + static uint8_t write60_quadtel(void *priv, UNUSED(uint8_t val)) { @@ -1729,13 +1772,15 @@ static void kbc_at_write(uint16_t port, uint8_t val, void *priv) { atkbc_t *dev = (atkbc_t *) priv; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; + uint8_t fast_a20 = (kbc_ven != KBC_VEN_SIEMENS); kbc_at_log("ATkbc: [%04X:%08X] write(%04X) = %02X\n", CS, cpu_state.pc, port, val); switch (port) { case 0x60: dev->status &= ~STAT_CD; - if (dev->wantdata && (dev->command == 0xd1)) { + if (fast_a20 && dev->wantdata && (dev->command == 0xd1)) { kbc_at_log("ATkbc: write P2\n"); #if 0 @@ -1765,7 +1810,7 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv) case 0x64: dev->status |= STAT_CD; - if (val == 0xd1) { + if (fast_a20 && (val == 0xd1)) { kbc_at_log("ATkbc: write P2\n"); dev->wantdata = 1; dev->state = STATE_KBC_PARAM; @@ -1915,10 +1960,18 @@ kbc_at_init(const device_t *info) kbc_award_revision = 0x42; switch (dev->flags & KBC_VEN_MASK) { + case KBC_VEN_SIEMENS: + kbc_ami_revision = '8'; + kbc_award_revision = 0x42; + dev->write60_ven = write60_ami; + dev->write64_ven = write64_siemens; + break; + case KBC_VEN_ACER: case KBC_VEN_GENERIC: case KBC_VEN_NCR: case KBC_VEN_IBM_PS1: + case KBC_VEN_COMPAQ: dev->write64_ven = write64_generic; break; @@ -2008,6 +2061,20 @@ const device_t keyboard_at_device = { .config = NULL }; +const device_t keyboard_at_siemens_device = { + .name = "PC/AT Keyboard", + .internal_name = "keyboard_at", + .flags = DEVICE_KBC, + .local = KBC_TYPE_ISA | KBC_VEN_SIEMENS, + .init = kbc_at_init, + .close = kbc_at_close, + .reset = kbc_at_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t keyboard_at_ami_device = { .name = "PC/AT Keyboard (AMI)", .internal_name = "keyboard_at_ami", @@ -2078,6 +2145,20 @@ const device_t keyboard_at_ncr_device = { .config = NULL }; +const device_t keyboard_at_compaq_device = { + .name = "PC/AT Keyboard (Compaq)", + .internal_name = "keyboard_at_compaq", + .flags = DEVICE_KBC, + .local = KBC_TYPE_ISA | KBC_VEN_COMPAQ, + .init = kbc_at_init, + .close = kbc_at_close, + .reset = kbc_at_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t keyboard_ps2_device = { .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2", diff --git a/src/device/serial_passthrough.c b/src/device/serial_passthrough.c index a8c531f07..b703cd67c 100644 --- a/src/device/serial_passthrough.c +++ b/src/device/serial_passthrough.c @@ -119,6 +119,8 @@ static void serial_passthrough_speed_changed(void *priv) { serial_passthrough_t *dev = (serial_passthrough_t *) priv; + if (!dev) + return; timer_stop(&dev->host_to_serial_timer); /* FIXME: do something to dev->baudrate */ @@ -132,9 +134,11 @@ static void serial_passthrough_dev_close(void *priv) { serial_passthrough_t *dev = (serial_passthrough_t *) priv; + if (!dev) + return; /* Detach passthrough device from COM port */ - if (dev && dev->serial && dev->serial->sd) + if (dev->serial && dev->serial->sd) memset(dev->serial->sd, 0, sizeof(serial_device_t)); plat_serpt_close(dev); @@ -184,6 +188,10 @@ serial_passthrough_dev_init(const device_t *info) /* Attach passthrough device to a COM port */ dev->serial = serial_attach_ex(dev->port, serial_passthrough_rcr_cb, serial_passthrough_write, serial_passthrough_transmit_period, serial_passthrough_lcr_callback, dev); + if (!dev->serial) { + free(dev); + return NULL; + } strncpy(dev->host_serial_path, device_get_config_string("host_serial_path"), 1023); #ifdef _WIN32 diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index 9fc6b58d5..014212b1d 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -70,7 +70,7 @@ #define CMD_SET_PARAMETERS 0x91 #define CMD_READ_PARAMETERS 0xec -typedef struct { +typedef struct drive_t { int cfg_spt; int cfg_hpc; int current_cylinder; @@ -81,7 +81,7 @@ typedef struct { int hdd_num; } drive_t; -typedef struct { +typedef struct esdi_t { uint8_t status; uint8_t error; int secount; @@ -821,9 +821,9 @@ loadhd(esdi_t *esdi, int hdd_num, int d, UNUSED(const char *fn)) } static void -esdi_rom_write(uint32_t addr, uint8_t val, void *p) +esdi_rom_write(uint32_t addr, uint8_t val, void *priv) { - rom_t *rom = (rom_t *) p; + rom_t *rom = (rom_t *) priv; addr &= rom->mask; diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index 6e7edb1be..712ab900b 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -96,7 +96,8 @@ #define CMD_ADAPTER 0 typedef struct esdi_drive_t { - int spt, hpc; + int spt; + int hpc; int tracks; int sectors; int present; @@ -139,7 +140,7 @@ typedef struct esdi_t { uint32_t rba; - struct { + struct cmds { int req_in_progress; } cmds[3]; diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index ea771235e..041d8ffc4 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -110,7 +110,7 @@ #define IDE_TIME 10.0 -typedef struct { +typedef struct ide_board_t { int bit32; int cur_dev; int irq; @@ -123,7 +123,7 @@ typedef struct { ide_t *ide[2]; } ide_board_t; -typedef struct { +typedef struct ide_bm_t { int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); void (*set_irq)(int channel, void *priv); void *priv; @@ -244,6 +244,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x10: period = (50.0 / 3.0); break; + + default: + break; } break; case 0x100: /* Single Word DMA */ @@ -257,6 +260,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x04: period = (25.0 / 3.0); break; + + default: + break; } break; case 0x200: /* Multiword DMA */ @@ -270,6 +276,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x04: period = (50.0 / 3.0); break; + + default: + break; } break; case 0x300: /* Ultra DMA */ @@ -292,8 +301,14 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x20: period = 100.0; break; + + default: + break; } break; + + default: + break; } period = (1.0 / period); /* get us for 1 byte */ @@ -2576,6 +2591,9 @@ ide_callback(void *priv) case 0xFF: goto abort_cmd; + + default: + break; } abort_cmd: @@ -3043,6 +3061,9 @@ ide_init(const device_t *info) if (info->local & 1) ide_board_init(1, 15, 0x170, 0x376, info->local); break; + + default: + break; } return ide_drives; diff --git a/src/disk/hdc_ide_cmd640.c b/src/disk/hdc_ide_cmd640.c index cc642b3bb..6299bf7f4 100644 --- a/src/disk/hdc_ide_cmd640.c +++ b/src/disk/hdc_ide_cmd640.c @@ -37,7 +37,7 @@ #include <86box/zip.h> #include <86box/mo.h> -typedef struct { +typedef struct cmd640_t { uint8_t vlb_idx; uint8_t id; uint8_t in_cfg; diff --git a/src/disk/hdc_ide_cmd646.c b/src/disk/hdc_ide_cmd646.c index af5af2557..00f765bf7 100644 --- a/src/disk/hdc_ide_cmd646.c +++ b/src/disk/hdc_ide_cmd646.c @@ -37,7 +37,7 @@ #include <86box/zip.h> #include <86box/mo.h> -typedef struct { +typedef struct cmd646_t { uint8_t vlb_idx; uint8_t single_channel; uint8_t in_cfg; diff --git a/src/disk/hdc_ide_opti611.c b/src/disk/hdc_ide_opti611.c index 2f893f07e..4e44c55f8 100644 --- a/src/disk/hdc_ide_opti611.c +++ b/src/disk/hdc_ide_opti611.c @@ -30,11 +30,11 @@ #include <86box/hdc_ide.h> #include <86box/plat_unused.h> -typedef struct -{ - uint8_t tries, - in_cfg, cfg_locked, - regs[19]; +typedef struct opti611_t { + uint8_t tries; + uint8_t in_cfg; + uint8_t cfg_locked; + uint8_t regs[19]; } opti611_t; static void opti611_ide_handler(opti611_t *dev); diff --git a/src/disk/hdc_ide_sff8038i.c b/src/disk/hdc_ide_sff8038i.c index e6eb6d6d9..fb16c8788 100644 --- a/src/disk/hdc_ide_sff8038i.c +++ b/src/disk/hdc_ide_sff8038i.c @@ -462,29 +462,27 @@ sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base) } static void -sff_reset(void *p) +sff_reset(void *priv) { - int i = 0; - #ifdef ENABLE_SFF_LOG sff_log("SFF8038i: Reset\n"); #endif - for (i = 0; i < CDROM_NUM; i++) { + for (uint8_t i = 0; i < CDROM_NUM; i++) { if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv) scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); } - for (i = 0; i < ZIP_NUM; i++) { + for (uint8_t i = 0; i < ZIP_NUM; i++) { if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) zip_reset((scsi_common_t *) zip_drives[i].priv); } - for (i = 0; i < MO_NUM; i++) { + for (uint8_t i = 0; i < MO_NUM; i++) { if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) mo_reset((scsi_common_t *) mo_drives[i].priv); } - sff_bus_master_set_irq(0x00, p); - sff_bus_master_set_irq(0x01, p); + sff_bus_master_set_irq(0x00, priv); + sff_bus_master_set_irq(0x01, priv); } void @@ -543,9 +541,9 @@ sff_set_irq_pin(sff8038i_t *dev, int irq_pin) } static void -sff_close(void *p) +sff_close(void *priv) { - sff8038i_t *dev = (sff8038i_t *) p; + sff8038i_t *dev = (sff8038i_t *) priv; free(dev); @@ -554,9 +552,8 @@ sff_close(void *p) next_id = 0; } -static void - * - sff_init(UNUSED(const device_t *info)) +static void * +sff_init(UNUSED(const device_t *info)) { sff8038i_t *dev = (sff8038i_t *) malloc(sizeof(sff8038i_t)); memset(dev, 0, sizeof(sff8038i_t)); diff --git a/src/disk/hdc_st506_at.c b/src/disk/hdc_st506_at.c index eaf9832a5..b202ebe47 100644 --- a/src/disk/hdc_st506_at.c +++ b/src/disk/hdc_st506_at.c @@ -74,7 +74,7 @@ #define CMD_DIAGNOSE 0x90 #define CMD_SET_PARAMETERS 0x91 -typedef struct { +typedef struct drive_t { int8_t present; /* drive is present */ int8_t hdd_num; /* drive number in system */ int8_t steprate; /* current servo step rate */ @@ -89,7 +89,7 @@ typedef struct { int16_t curcyl; /* current track number */ } drive_t; -typedef struct { +typedef struct mfm_t { uint8_t precomp; /* 1: precomp/error register */ uint8_t error; uint8_t secount; /* 2: sector count register */ @@ -435,6 +435,9 @@ mfm_write(uint16_t port, uint8_t val, void *priv) mfm->fdisk = val; irq_update(mfm); break; + + default: + break; } } diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index 743f25410..c895aab45 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -229,7 +229,7 @@ enum { STATE_DONE }; -typedef struct { +typedef struct drive_t { int8_t present; uint8_t hdd_num; @@ -247,7 +247,7 @@ typedef struct { uint16_t cfg_cyl; } drive_t; -typedef struct { +typedef struct hdc_t { uint8_t type; /* controller type */ uint8_t spt; /* sectors-per-track for controller */ @@ -290,7 +290,7 @@ typedef struct { } hdc_t; /* Supported drives table for the Xebec controller. */ -typedef struct { +typedef struct hd_type_t { uint16_t tracks; uint8_t hpc; uint8_t spt; @@ -508,6 +508,9 @@ st506_callback(void *priv) case STATE_DONE: st506_complete(dev); break; + + default: + break; } break; @@ -534,6 +537,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -570,6 +576,9 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_complete(dev); break; + + default: + break; } break; @@ -602,6 +611,9 @@ st506_callback(void *priv) timer_advance_u64(&dev->timer, ST506_TIME); break; + + default: + break; } break; @@ -645,6 +657,9 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_complete(dev); break; + + default: + break; } break; @@ -737,6 +752,9 @@ st506_callback(void *priv) } dev->state = STATE_SEND_DATA; break; + + default: + break; } break; @@ -832,6 +850,9 @@ st506_callback(void *priv) } dev->state = STATE_RECEIVE_DATA; break; + + default: + break; } break; @@ -887,6 +908,9 @@ st506_callback(void *priv) } st506_complete(dev); break; + + default: + break; } break; @@ -906,6 +930,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -946,6 +973,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -987,6 +1017,9 @@ st506_callback(void *priv) case STATE_RECEIVED_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1008,6 +1041,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } else { st506_error(dev, ERR_BAD_COMMAND); @@ -1120,6 +1156,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1139,6 +1178,9 @@ st506_callback(void *priv) /* FIXME: ignore the results. */ st506_complete(dev); break; + + default: + break; } break; @@ -1161,6 +1203,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1205,6 +1250,9 @@ st506_read(uint16_t port, void *priv) timer_set_delay_u64(&dev->timer, ST506_TIME); } break; + + default: + break; } break; @@ -1217,6 +1265,9 @@ st506_read(uint16_t port, void *priv) case 2: /* read option jumpers */ ret = dev->switches; break; + + default: + break; } st506_xt_log("ST506: read(%04x) = %02x\n", port, ret); @@ -1257,6 +1308,9 @@ st506_write(uint16_t port, uint8_t val, void *priv) timer_set_delay_u64(&dev->timer, ST506_TIME); } break; + + default: + break; } break; @@ -1282,6 +1336,9 @@ st506_write(uint16_t port, uint8_t val, void *priv) picintc(1 << dev->irq); } break; + + default: + break; } } @@ -1561,6 +1618,9 @@ st506_init(const device_t *info) case 19: /* v2.0 */ fn = ST11_BIOS_FILE_NEW; break; + + default: + break; } dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); @@ -1665,6 +1725,9 @@ st506_init(const device_t *info) dev->base = 0x01f0; dev->switches = 0x0c; break; + + default: + break; } /* Load the ROM BIOS. */ diff --git a/src/disk/hdc_xta.c b/src/disk/hdc_xta.c index 7b4fc432f..99e638335 100644 --- a/src/disk/hdc_xta.c +++ b/src/disk/hdc_xta.c @@ -182,7 +182,7 @@ enum { /* The device control block (6 bytes) */ #pragma pack(push, 1) -typedef struct { +typedef struct dcb_t { uint8_t cmd; /* [7:5] class, [4:0] opcode */ uint8_t head : 5; /* [4:0] head number */ @@ -202,7 +202,7 @@ typedef struct { /* The (configured) Drive Parameters. */ #pragma pack(push, 1) -typedef struct { +typedef struct dprm_t { uint8_t cyl_high; /* (MSB) number of cylinders */ uint8_t cyl_low; /* (LSB) number of cylinders */ uint8_t heads; /* number of heads per cylinder */ @@ -215,7 +215,7 @@ typedef struct { #pragma pack(pop) /* Define an attached drive. */ -typedef struct { +typedef struct drive_t { int8_t id; /* drive ID on bus */ int8_t present; /* drive is present */ int8_t hdd_num; /* index to global disk table */ @@ -232,7 +232,7 @@ typedef struct { uint16_t cfg_tracks; } drive_t; -typedef struct { +typedef struct hdc_t { const char *name; /* controller name */ uint16_t base; /* controller base I/O address */ @@ -436,6 +436,9 @@ do_fmt: /* This saves us a LOT of code. */ goto do_fmt; + + default: + break; } /* De-activate the status icon. */ @@ -497,6 +500,10 @@ hdc_callback(void *priv) case STATE_SDONE: set_intr(dev); + break; + + default: + break; } break; @@ -606,6 +613,9 @@ do_send: /* This saves us a LOT of code. */ dev->state = STATE_SEND; goto do_send; + + default: + break; } break; @@ -710,6 +720,9 @@ do_recv: /* This saves us a LOT of code. */ dev->state = STATE_RECV; goto do_recv; + + default: + break; } break; @@ -758,6 +771,9 @@ do_recv: dev->status &= ~STAT_REQ; set_intr(dev); break; + + default: + break; } break; @@ -802,6 +818,9 @@ do_recv: dev->data, dev->buf_len); set_intr(dev); break; + + default: + break; } break; @@ -815,6 +834,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -834,6 +856,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -847,6 +872,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -900,6 +928,9 @@ hdc_read(uint16_t port, void *priv) case 2: /* "read option jumpers" */ ret = 0xff; /* all switches off */ break; + + default: + break; } return ret; @@ -963,6 +994,9 @@ hdc_write(uint16_t port, uint8_t val, void *priv) #endif dev->intr = val; break; + + default: + break; } } @@ -1000,12 +1034,16 @@ xta_init(const device_t *info) dev->irq = 5; dev->dma = 3; break; + + default: + break; } xta_log("%s: initializing (I/O=%04X, IRQ=%d, DMA=%d", dev->name, dev->base, dev->irq, dev->dma); if (dev->rom_addr != 0x000000) xta_log(", BIOS=%06X", dev->rom_addr); + xta_log(")\n"); /* Load any disks for this device class. */ diff --git a/src/disk/hdc_xtide.c b/src/disk/hdc_xtide.c index 5caa2337e..91bf5a2e3 100644 --- a/src/disk/hdc_xtide.c +++ b/src/disk/hdc_xtide.c @@ -52,7 +52,7 @@ #define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin" #define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin" -typedef struct { +typedef struct xtide_t { void *ide_board; uint8_t data_high; rom_t bios_rom; @@ -85,6 +85,9 @@ xtide_write(uint16_t port, uint8_t val, void *priv) case 0xe: ide_write_devctl(0x0, val, xtide->ide_board); return; + + default: + break; } } diff --git a/src/disk/hdd.c b/src/disk/hdd.c index 751121690..a4b8a6f73 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -107,8 +107,8 @@ hdd_bus_to_string(int bus, UNUSED(int cdrom)) char *s = "none"; switch (bus) { - case HDD_BUS_DISABLED: default: + case HDD_BUS_DISABLED: break; case HDD_BUS_MFM: @@ -165,7 +165,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ fatal("hdd_seek_get_time(): hdd->num_zones < 0)\n"); return 0.0; } - for (int i = 0; i < hdd->num_zones; i++) { + for (uint32_t i = 0; i < hdd->num_zones; i++) { zone = &hdd->zones[i]; if (zone->end_sector >= dst_addr) break; diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 0e61271a9..4d3e354f2 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -40,8 +40,7 @@ #define HDD_IMAGE_HDX 2 #define HDD_IMAGE_VHD 3 -typedef struct -{ +typedef struct hdd_image_t { FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */ MVHDMeta *vhd; /* Used for HDD_IMAGE_VHD. */ uint32_t base; diff --git a/src/disk/mo.c b/src/disk/mo.c index 9cf46afab..d7dbba895 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -498,6 +498,9 @@ mo_atapi_phase_to_scsi(mo_t *dev) return 1; case 3: return 7; + + default: + break; } } else { if ((dev->phase & 3) == 3) @@ -569,6 +572,9 @@ mo_mode_sense_read(mo_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) else return mo_mode_sense_pages_default.pages[page][pos]; break; + + default: + break; } return 0; @@ -1419,6 +1425,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); break; + + default: + break; } if (!dev->sector_len) { @@ -1512,6 +1521,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if ((dev->sector_pos >= dev->drv->medium_size) /* || @@ -1637,6 +1649,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case 3: /* Load the disk (close tray). */ mo_reload(dev->id); break; + + default: + break; } mo_command_complete(dev); @@ -1744,6 +1759,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_SEEK_10: pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; break; + + default: + break; } mo_seek(dev, pos); mo_command_complete(dev); @@ -1782,6 +1800,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_ERASE_12: dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); break; + + default: + break; } /*Erase all remaining sectors*/ @@ -1804,6 +1825,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_ERASE_12: dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } dev->sector_pos += previous_pos; @@ -1958,6 +1982,9 @@ mo_phase_data_out(scsi_common_t *sc) return 0; } break; + + default: + break; } mo_command_stop((scsi_common_t *) dev); diff --git a/src/disk/zip.c b/src/disk/zip.c index 768963695..648182cc3 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -643,6 +643,9 @@ zip_atapi_phase_to_scsi(zip_t *dev) return 1; case 3: return 7; + + default: + break; } } else { if ((dev->phase & 3) == 3) @@ -713,13 +716,11 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) return 0x60; return dev->ms_pages_saved.pages[page][pos]; - break; case 1: if (dev->drv->is_250) return zip_250_mode_sense_pages_changeable.pages[page][pos]; else return zip_mode_sense_pages_changeable.pages[page][pos]; - break; case 2: if (dev->drv->is_250) { if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) @@ -734,6 +735,8 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) else return zip_mode_sense_pages_default.pages[page][pos]; } + + default: break; } @@ -962,7 +965,7 @@ zip_data_command_finish(zip_t *dev, int len, int block_len, int alloc_len, int d } static void -zip_sense_clear(zip_t *dev, int command) +zip_sense_clear(zip_t *dev, UNUSED(int command)) { zip_sense_key = zip_asc = zip_ascq = 0; } @@ -1116,7 +1119,7 @@ zip_data_phase_error(zip_t *dev) } static int -zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out) +zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out) { *len = 0; @@ -1251,7 +1254,9 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb) static void zip_seek(zip_t *dev, uint32_t pos) { - /* zip_log("ZIP %i: Seek %08X\n", dev->id, pos); */ +#if 0 + zip_log("ZIP %i: Seek %08X\n", dev->id, pos); +#endif dev->sector_pos = pos; } @@ -1513,6 +1518,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if (!dev->sector_len) { @@ -1597,6 +1605,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if ((dev->sector_pos >= dev->drv->medium_size) /* || @@ -1775,6 +1786,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) case 3: /* Load the disc (close tray). */ zip_reload(dev->id); break; + + default: + break; } zip_command_complete(dev); @@ -1911,6 +1925,9 @@ atapi_out: case GPCMD_SEEK_10: pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; break; + + default: + break; } zip_seek(dev, pos); zip_command_complete(dev); @@ -2177,6 +2194,9 @@ zip_phase_data_out(scsi_common_t *sc) return 0; } break; + + default: + break; } zip_command_stop((scsi_common_t *) dev); diff --git a/src/dma.c b/src/dma.c index 710ea0abf..9dc984125 100644 --- a/src/dma.c +++ b/src/dma.c @@ -31,6 +31,7 @@ #include <86box/io.h> #include <86box/pic.h> #include <86box/dma.h> +#include <86box/plat_unused.h> dma_t dma[8]; uint8_t dma_e; @@ -50,9 +51,9 @@ static uint16_t dma_sg_base; static uint16_t dma16_buffer[65536]; static uint32_t dma_mask; -static struct { - int xfr_command, - xfr_channel; +static struct dma_ps2_t { + int xfr_command; + int xfr_channel; int byte_ptr; int is_ps2; @@ -228,6 +229,9 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv) dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -258,6 +262,9 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv) dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -284,6 +291,9 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv) dev->ptr %= (mem_size * 1024); dev->ptr0 = val & 0xff; break; + + default: + break; } } @@ -325,6 +335,9 @@ dma_sg_read(uint16_t port, void *priv) case 0x23: ret = dev->ptr >> 24; break; + + default: + break; } dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret); @@ -356,6 +369,9 @@ dma_sg_readw(uint16_t port, void *priv) case 0x22: ret = dev->ptr >> 16; break; + + default: + break; } dma_log("DMA S/G WORD read : %04X %04X\n", port, ret); @@ -384,6 +400,9 @@ dma_sg_readl(uint16_t port, void *priv) case 0x20: ret = dev->ptr0 | (dev->ptr & 0xffffff00); break; + + default: + break; } dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret); @@ -392,7 +411,7 @@ dma_sg_readl(uint16_t port, void *priv) } static void -dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) +dma_ext_mode_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = (val & 0x03); @@ -416,11 +435,14 @@ dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) case 0x03: dma[channel].transfer_mode = 0x0102; break; + + default: + break; } } static uint8_t -dma_sg_int_status_read(uint16_t addr, void *priv) +dma_sg_int_status_read(UNUSED(uint16_t addr), UNUSED(void *priv)) { uint8_t ret = 0x00; @@ -433,7 +455,7 @@ dma_sg_int_status_read(uint16_t addr, void *priv) } static uint8_t -dma_read(uint16_t addr, void *priv) +dma_read(uint16_t addr, UNUSED(void *priv)) { int channel = (addr >> 1) & 3; uint8_t temp; @@ -468,13 +490,16 @@ dma_read(uint16_t addr, void *priv) case 0xd: /*Temporary register*/ return 0; + + default: + break; } return (dmaregs[0][addr & 0xf]); } static void -dma_write(uint16_t addr, uint8_t val, void *priv) +dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = (addr >> 1) & 3; @@ -562,11 +587,14 @@ dma_write(uint16_t addr, uint8_t val, void *priv) case 0xf: /*Mask write*/ dma_m = (dma_m & 0xf0) | (val & 0xf); return; + + default: + break; } } static uint8_t -dma_ps2_read(uint16_t addr, void *priv) +dma_ps2_read(uint16_t addr, UNUSED(void *priv)) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t temp = 0xff; @@ -589,6 +617,9 @@ dma_ps2_read(uint16_t addr, void *priv) temp = (dma_c->ac >> 16) & 0xff; dma_ps2.byte_ptr = 0; break; + + default: + break; } break; @@ -626,12 +657,15 @@ dma_ps2_read(uint16_t addr, void *priv) fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); } break; + + default: + break; } return temp; } static void -dma_ps2_write(uint16_t addr, uint8_t val, void *priv) +dma_ps2_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t mode; @@ -654,6 +688,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) if (!(dma_m & (1 << dma_ps2.xfr_channel))) dma_ps2_run(dma_ps2.xfr_channel); break; + + default: + break; } break; @@ -683,6 +720,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); dma_ps2.byte_ptr = 0; break; + + default: + break; } dma_c->ab = dma_c->ac; break; @@ -719,11 +759,14 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); } break; + + default: + break; } } static uint8_t -dma16_read(uint16_t addr, void *priv) +dma16_read(uint16_t addr, UNUSED(void *priv)) { int channel = ((addr >> 2) & 3) + 4; uint8_t temp; @@ -760,13 +803,16 @@ dma16_read(uint16_t addr, void *priv) temp |= dma_stat >> 4; dma_stat &= ~0xf0; return temp; + + default: + break; } return (dmaregs[1][addr & 0xf]); } static void -dma16_write(uint16_t addr, uint8_t val, void *priv) +dma16_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = ((addr >> 2) & 3) + 4; addr >>= 1; @@ -855,6 +901,9 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) case 0xf: /*Mask write*/ dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); return; + + default: + break; } } @@ -864,7 +913,7 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) } static void -dma_page_write(uint16_t addr, uint8_t val, void *priv) +dma_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; @@ -897,7 +946,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv) } static uint8_t -dma_page_read(uint16_t addr, void *priv) +dma_page_read(uint16_t addr, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; uint8_t ret = 0xff; @@ -917,7 +966,7 @@ dma_page_read(uint16_t addr, void *priv) } static void -dma_high_page_write(uint16_t addr, uint8_t val, void *priv) +dma_high_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; @@ -937,7 +986,7 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv) } static uint8_t -dma_high_page_read(uint16_t addr, void *priv) +dma_high_page_read(uint16_t addr, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; uint8_t ret = 0xff; diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index e29d5d2f8..99767d857 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -203,9 +203,9 @@ fdc_get_current_drive(void) } void -fdc_ctrl_reset(void *p) +fdc_ctrl_reset(void *priv) { - fdc_t *fdc = (fdc_t *) p; + fdc_t *fdc = (fdc_t *) priv; fdc->stat = 0x80; fdc->pnum = fdc->ptot = 0; @@ -227,8 +227,8 @@ int fdc_get_compare_condition(fdc_t *fdc) { switch (fdc->interrupt) { - case 0x11: default: + case 0x11: return 0; case 0x19: return 1; @@ -517,6 +517,9 @@ fdc_update_rate(fdc_t *fdc, int drive) case 2: fdc->bit_rate = 2000; break; + + default: + break; } break; case 2: /*Double density*/ @@ -525,6 +528,9 @@ fdc_update_rate(fdc_t *fdc, int drive) case 3: /*Extended density*/ fdc->bit_rate = 1000; break; + + default: + break; } fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/ @@ -544,8 +550,9 @@ fdc_get_bit_rate(fdc_t *fdc) return 2; case 1000: return 3; + default: - return 2; + break; } return 2; } @@ -566,6 +573,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 0; case 2: return 1; + + default: + break; } } @@ -575,6 +585,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 1; case 3: return 0; + + default: + break; } } else { switch (fdc->densel_force) { @@ -582,6 +595,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 0; case 1: return 1; + + default: + break; } } @@ -592,6 +608,9 @@ fdc_get_densel(fdc_t *fdc, int drive) case 1: case 2: return fdc->densel_polarity ? 0 : 1; + + default: + break; } return 0; @@ -1230,6 +1249,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->perp |= (fdc->params[0] & 0x03); } return; + + default: + break; } } else fdc->stat = 0x90 | (fdc->stat & 0xf); @@ -1242,6 +1264,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) if (fdc->flags & FDC_FLAG_PS1) fdc->noprec = !!(val & 0x04); return; + + default: + break; } } @@ -1300,6 +1325,9 @@ fdc_read(uint16_t addr, void *priv) case 3: ret |= 0x61; break; + + default: + break; } } else { if (is486 || !fdc->enable_3f1) @@ -1684,6 +1712,9 @@ fdc_callback(void *priv) fdc->stat = 0x90; } break; + + default: + break; } fdc->inread = 1; return; @@ -1787,6 +1818,9 @@ fdc_callback(void *priv) fdc->paramstogo = 1; fdc->interrupt = 0; return; + + default: + break; } } diff --git a/src/floppy/fdc_magitronic.c b/src/floppy/fdc_magitronic.c index 5ebd9de42..084ce8c81 100644 --- a/src/floppy/fdc_magitronic.c +++ b/src/floppy/fdc_magitronic.c @@ -35,7 +35,7 @@ #define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define DRIVE_SELECT (int) (real_drive(dev->fdc_controller, i)) -typedef struct { +typedef struct b215_t { fdc_t *fdc_controller; rom_t rom; } b215_t; @@ -58,7 +58,7 @@ b215_read(UNUSED(uint16_t addr), void *priv) */ int drive_spec[2]; - for (int i = 0; i <= 1; i++) { + for (uint8_t i = 0; i <= 1; i++) { if (fdd_is_525(DRIVE_SELECT)) { if (!fdd_is_dd(DRIVE_SELECT)) drive_spec[i] = 1; diff --git a/src/floppy/fdc_monster.c b/src/floppy/fdc_monster.c index 91598b897..1629ac1c4 100644 --- a/src/floppy/fdc_monster.c +++ b/src/floppy/fdc_monster.c @@ -37,7 +37,7 @@ #define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define ROM_MONSTER_FDC "roms/floppy/monster-fdc/floppy_bios.bin" -typedef struct { +typedef struct monster_fdc_t { rom_t bios_rom; fdc_t *fdc_pri; fdc_t *fdc_sec; diff --git a/src/floppy/fdc_pii15xb.c b/src/floppy/fdc_pii15xb.c index 8bbda7991..5fd38d250 100644 --- a/src/floppy/fdc_pii15xb.c +++ b/src/floppy/fdc_pii15xb.c @@ -80,7 +80,7 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be. #define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom" #define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom" -typedef struct { +typedef struct pii_t { rom_t bios_rom; } pii_t; diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index c59e04052..f2c0ffbbc 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -125,30 +125,30 @@ enum { FMT_POSTTRK_GAP4 }; -typedef struct { +typedef struct sliding_buffer_t { uint8_t buffer[10]; uint32_t pos; uint32_t len; } sliding_buffer_t; -typedef struct { +typedef struct find_t { uint32_t bits_obtained; uint16_t bytes_obtained; uint16_t sync_marks; uint32_t sync_pos; } find_t; -typedef struct { +typedef struct split_byte_t { unsigned nibble0 : 4; unsigned nibble1 : 4; } split_byte_t; -typedef union { +typedef union decoded_t { uint8_t byte; split_byte_t nibbles; } decoded_t; -typedef struct { +typedef struct sector_t { uint8_t c; uint8_t h; uint8_t r; @@ -179,7 +179,7 @@ typedef struct { * If bits 6, 5 are 0, and bit 7 is 1, the extra bitcell count * specifies the entire bitcell count */ -typedef struct { +typedef struct d86f_t { FILE *f; uint8_t state; uint8_t fill; @@ -369,43 +369,43 @@ d86f_index_hole_pos(int drive, int side) } uint32_t -null_index_hole_pos(int drive, int side) +null_index_hole_pos(UNUSED(int drive), UNUSED(int side)) { return 0; } uint16_t -null_disk_flags(int drive) +null_disk_flags(UNUSED(int drive)) { return 0x09; } uint16_t -null_side_flags(int drive) +null_side_flags(UNUSED(int drive)) { return 0x0A; } void -null_writeback(int drive) +null_writeback(UNUSED(int drive)) { return; } void -null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) +null_set_sector(UNUSED(int drive), UNUSED(int side), UNUSED(uint8_t c), UNUSED(uint8_t h), UNUSED(uint8_t r), UNUSED(uint8_t n)) { return; } void -null_write_data(int drive, int side, uint16_t pos, uint8_t data) +null_write_data(UNUSED(int drive), UNUSED(int side), UNUSED(uint16_t pos), UNUSED(uint8_t data)) { return; } int -null_format_conditions(int drive) +null_format_conditions(UNUSED(int drive)) { return 0; } @@ -419,7 +419,7 @@ d86f_extra_bit_cells(int drive, int side) } int32_t -null_extra_bit_cells(int drive, int side) +null_extra_bit_cells(UNUSED(int drive), UNUSED(int side)) { return 0; } @@ -433,7 +433,7 @@ common_encoded_data(int drive, int side) } void -common_read_revolution(int drive) +common_read_revolution(UNUSED(int drive)) { return; } @@ -637,9 +637,9 @@ d86f_get_array_size(int drive, int side, int words) array_size = 0; else switch (hole) { + default: case 0: case 1: - default: array_size = 12500; switch (rm) { case 1: @@ -830,7 +830,7 @@ d86f_has_extra_bit_cells(int drive) } uint32_t -d86f_header_size(int drive) +d86f_header_size(UNUSED(int drive)) { return 8; } @@ -902,15 +902,14 @@ d86f_wrong_densel(int drive) is_3mode = 1; switch (d86f_hole(drive)) { - case 0: default: + case 0: if (fdd_is_dd(drive)) return 0; if (fdd_get_densel(drive)) return 1; else return 0; - break; case 1: if (fdd_is_dd(drive)) @@ -923,7 +922,6 @@ d86f_wrong_densel(int drive) else return 1; } - break; case 2: if (fdd_is_dd(drive) || !fdd_is_ed(drive)) @@ -932,7 +930,6 @@ d86f_wrong_densel(int drive) return 0; else return 1; - break; } } @@ -983,6 +980,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b) case 0xfc: return result | d86f_encode_get_clock(0x01); + + default: + break; } } else { switch (b.byte) { @@ -993,6 +993,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b) case 0xfc: return result | d86f_encode_get_clock(0xd7); + + default: + break; } } } @@ -1040,6 +1043,9 @@ d86f_get_bitcell_period(int drive) case 5: rate = 2000.0; break; + + default: + break; } if (!mfm) @@ -1194,7 +1200,7 @@ d86f_put_bit(int drive, int side, int bit) } static uint8_t -decodefm(int drive, uint16_t dat) +decodefm(UNUSED(int drive), uint16_t dat) { uint8_t temp = 0; @@ -1542,6 +1548,9 @@ d86f_compare_byte(int drive, uint8_t received_byte, uint8_t disk_byte) if ((received_byte >= disk_byte) || (received_byte == 0xFF)) dev->satisfying_bytes++; break; + + default: + break; } } @@ -1850,7 +1859,7 @@ endian_swap(uint16_t word) } void -d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, int do_write) +d86f_format_finish(int drive, int side, int mfm, UNUSED(uint16_t sc), uint16_t gap_fill, int do_write) { d86f_t *dev = d86f[drive]; @@ -1871,7 +1880,7 @@ d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, } void -d86f_format_turbo_finish(int drive, int side, int do_write) +d86f_format_turbo_finish(int drive, UNUSED(int side), int do_write) { d86f_t *dev = d86f[drive]; @@ -2071,13 +2080,14 @@ d86f_format_track(int drive, int side, int do_write) /* Sector within allotted amount, change state to SECTOR_ID_SYNC. */ dev->format_state = FMT_SECTOR_ID_SYNC; fdc_request_next_sector_id(d86f_fdc); - break; } else { dev->format_state = FMT_POSTTRK_GAP4; dev->sector_count = 0; - break; } break; + + default: + break; } } } @@ -2922,8 +2932,8 @@ d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, ui } else { if (!thin_track) { switch ((dev->disk_flags >> 1) & 3) { - case 0: default: + case 0: dev->side_flags[side] = 0x0A; break; @@ -3174,7 +3184,7 @@ d86f_stop(int drive) } int -d86f_common_command(int drive, int sector, int track, int side, int rate, int sector_size) +d86f_common_command(int drive, int sector, int track, int side, UNUSED(int rate), int sector_size) { d86f_t *dev = d86f[drive]; @@ -3258,7 +3268,7 @@ d86f_comparesector(int drive, int sector, int track, int side, int rate, int sec } void -d86f_readaddress(int drive, int side, int rate) +d86f_readaddress(int drive, UNUSED(int side), UNUSED(int rate)) { d86f_t *dev = d86f[drive]; @@ -3308,7 +3318,7 @@ d86f_add_track(int drive, int track, int side) } void -d86f_common_format(int drive, int side, int rate, uint8_t fill, int proxy) +d86f_common_format(int drive, int side, UNUSED(int rate), uint8_t fill, int proxy) { d86f_t *dev = d86f[drive]; uint16_t temp; @@ -3753,8 +3763,8 @@ d86f_load(int drive, char *fn) } } else { switch ((dev->disk_flags >> 1) >> 3) { - case 0: default: + case 0: dev->side_flags[1] = 0x0a; break; diff --git a/src/game/gameport.c b/src/game/gameport.c index 32dbc332e..413a1ff5a 100644 --- a/src/game/gameport.c +++ b/src/game/gameport.c @@ -37,7 +37,7 @@ #include <86box/joystick_tm_fcs.h> #include <86box/plat_unused.h> -typedef struct { +typedef struct g_axis_t { pc_timer_t timer; int axis_nr; struct _joystick_instance_ *joystick; @@ -116,9 +116,10 @@ static uint8_t gameport_pnp_rom[] = { }; static const isapnp_device_config_t gameport_pnp_defaults[] = { {.activate = 1, - .io = { - { .base = 0x200 }, - }} + .io = { + { .base = 0x200 }, + } + } }; const device_t *standalone_gameport_type; diff --git a/src/game/joystick_sw_pad.c b/src/game/joystick_sw_pad.c index 27ae94290..5c91ee1e9 100644 --- a/src/game/joystick_sw_pad.c +++ b/src/game/joystick_sw_pad.c @@ -67,8 +67,7 @@ #include <86box/joystick_sw_pad.h> #include <86box/plat_unused.h> -typedef struct -{ +typedef struct sw_data { pc_timer_t poll_timer; int poll_left; int poll_clock; diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h index 4d8359569..11be67278 100644 --- a/src/include/86box/acpi.h +++ b/src/include/86box/acpi.h @@ -59,8 +59,7 @@ extern "C" { #define VEN_VIA 0x01106 #define VEN_VIA_596B 0x11106 -typedef struct -{ +typedef struct acpi_regs_t { uint8_t acpitst; uint8_t auxen; uint8_t auxsts; @@ -111,8 +110,7 @@ typedef struct uint32_t pad0; } acpi_regs_t; -typedef struct -{ +typedef struct acpi_t { acpi_regs_t regs; uint8_t gpireg2_default; uint8_t pad[3]; diff --git a/src/include/86box/apm.h b/src/include/86box/apm.h index d9e1a165d..2d5f0f117 100644 --- a/src/include/86box/apm.h +++ b/src/include/86box/apm.h @@ -21,8 +21,7 @@ extern "C" { #endif -typedef struct -{ +typedef struct apm_t { uint8_t cmd; uint8_t stat; uint8_t do_smi; diff --git a/src/include/86box/cdrom.h b/src/include/86box/cdrom.h index 82098e54e..69b4e90f3 100644 --- a/src/include/86box/cdrom.h +++ b/src/include/86box/cdrom.h @@ -114,7 +114,7 @@ static const struct { /* To shut up the GCC compilers. */ struct cdrom; -typedef struct { +typedef struct subchannel_t { uint8_t attr; uint8_t track; uint8_t index; @@ -126,7 +126,7 @@ typedef struct { uint8_t rel_f; } subchannel_t; -typedef struct { +typedef struct track_info_t { int number; uint8_t attr; uint8_t m; @@ -135,7 +135,7 @@ typedef struct { } track_info_t; /* Define the various CD-ROM drive operations (ops). */ -typedef struct { +typedef struct cdrom_ops_t { void (*get_tracks)(struct cdrom *dev, int *first, int *last); void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti); void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc); diff --git a/src/include/86box/config.h b/src/include/86box/config.h index 388cf9605..72b0a709f 100644 --- a/src/include/86box/config.h +++ b/src/include/86box/config.h @@ -27,7 +27,7 @@ extern "C" { #endif #if 0 -typedef struct { +typedef struct storage_cfg_t { uint8_t id; uint8_t bus_type; /* Bus type: IDE, SCSI, etc. */ uint8_t bus, : 4; /* ID of the bus (for example, for IDE, @@ -47,7 +47,7 @@ typedef struct { uint32_t tracks; } storage_cfg_t; -typedef struct { +typedef struct config_t { /* General configuration */ int vid_resize; /* Window is resizable or not */ int vid_renderer; /* Renderer */ diff --git a/src/include/86box/ddma.h b/src/include/86box/ddma.h index 48cc9a6ed..01c2e980d 100644 --- a/src/include/86box/ddma.h +++ b/src/include/86box/ddma.h @@ -21,15 +21,13 @@ extern "C" { #endif -typedef struct -{ +typedef struct ddma_channel_t { uint16_t io_base; int channel; int enable; } ddma_channel_t; -typedef struct -{ +typedef struct ddma_t { ddma_channel_t channels[8]; } ddma_t; diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 295126c22..74dd5ee3d 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -86,12 +86,12 @@ enum { #define BIOS_INTERLEAVED_INVERT 8 #define BIOS_HIGH_BIT_INVERT 16 -typedef struct { +typedef struct device_config_selection_t { const char *description; int value; } device_config_selection_t; -typedef struct { +typedef struct device_config_bios_t { const char *name; const char *internal_name; int bios_type; @@ -103,13 +103,13 @@ typedef struct { const char *files[9]; } device_config_bios_t; -typedef struct { +typedef struct device_config_spinner_t { int16_t min; int16_t max; int16_t step; } device_config_spinner_t; -typedef struct { +typedef struct device_config_t { const char *name; const char *description; int type; @@ -144,7 +144,7 @@ typedef struct _device_ { const device_config_t *config; } device_t; -typedef struct { +typedef struct device_context_t { const device_t *dev; char name[2048]; int instance; diff --git a/src/include/86box/disksizes.h b/src/include/86box/disksizes.h index a32990bd9..b5cd1bc30 100644 --- a/src/include/86box/disksizes.h +++ b/src/include/86box/disksizes.h @@ -22,7 +22,7 @@ extern "C" { #endif -typedef struct { +typedef struct disk_size_t { int hole; int sides; int data_rate; diff --git a/src/include/86box/dma.h b/src/include/86box/dma.h index 7e46cdd56..7ead53ba0 100644 --- a/src/include/86box/dma.h +++ b/src/include/86box/dma.h @@ -43,7 +43,7 @@ #define DMA_OVER 0x10000 #define DMA_VERIFY 0x20000 -typedef struct { +typedef struct dma_t { uint8_t m; uint8_t mode; uint8_t page; diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index b0e530754..9441bdfc4 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -56,7 +56,7 @@ extern int fdc_type; #define FDC_FLAG_TER 0x2000 /* Is Tertiary */ #define FDC_FLAG_QUA 0x3000 /* Is Quaternary */ -typedef struct { +typedef struct fdc_t { uint8_t dor; uint8_t stat; uint8_t command; diff --git a/src/include/86box/fdd.h b/src/include/86box/fdd.h index 7e9edd624..e21cbb73e 100644 --- a/src/include/86box/fdd.h +++ b/src/include/86box/fdd.h @@ -65,7 +65,7 @@ extern int fdd_get_from_internal_name(char *s); extern int fdd_current_track(int drive); -typedef struct { +typedef struct DRIVE { int id; void (*seek)(int drive, int track); diff --git a/src/include/86box/fifo8.h b/src/include/86box/fifo8.h index 811f0522f..9f88ec408 100644 --- a/src/include/86box/fifo8.h +++ b/src/include/86box/fifo8.h @@ -1,7 +1,7 @@ #ifndef EMU_FIFO8_H #define EMU_FIFO8_H -typedef struct { +typedef struct Fifo8 { /* All fields are private */ uint8_t *data; uint32_t capacity; diff --git a/src/include/86box/gameport.h b/src/include/86box/gameport.h index 7556fa0d5..3b779e4e3 100644 --- a/src/include/86box/gameport.h +++ b/src/include/86box/gameport.h @@ -34,7 +34,7 @@ #define GAMEPORT_SIO 0x1000000 -typedef struct { +typedef struct plat_joystick_t { char name[260]; int a[8]; @@ -68,7 +68,7 @@ typedef struct { int nr_sliders; } plat_joystick_t; -typedef struct { +typedef struct joystick_t { int axis[8]; int button[32]; int pov[4]; @@ -79,7 +79,7 @@ typedef struct { int pov_mapping[4][2]; } joystick_t; -typedef struct { +typedef struct joystick_if_t { const char *name; const char *internal_name; diff --git a/src/include/86box/hdc_ide_sff8038i.h b/src/include/86box/hdc_ide_sff8038i.h index 8f0a0896a..490a13a42 100644 --- a/src/include/86box/hdc_ide_sff8038i.h +++ b/src/include/86box/hdc_ide_sff8038i.h @@ -20,8 +20,7 @@ #ifndef EMU_HDC_IDE_SFF8038I_H #define EMU_HDC_IDE_SFF8038I_H -typedef struct -{ +typedef struct sff8038i_t { uint8_t command; uint8_t status; uint8_t ptr0; diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index 6f6b085f2..9874fb4aa 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -87,7 +87,7 @@ enum { #define HDD_MAX_ZONES 16 #define HDD_MAX_CACHE_SEG 16 -typedef struct { +typedef struct hdd_preset_t { const char *name; const char *internal_name; uint32_t zones; @@ -101,7 +101,7 @@ typedef struct { double track_seek_ms; } hdd_preset_t; -typedef struct { +typedef struct hdd_cache_seg_t { uint32_t id; uint32_t lba_addr; uint32_t ra_addr; @@ -110,7 +110,7 @@ typedef struct { uint8_t valid; } hdd_cache_seg_t; -typedef struct { +typedef struct hdd_cache_t { // Read cache hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG]; uint32_t num_segments; @@ -126,7 +126,7 @@ typedef struct { uint64_t write_start_time; } hdd_cache_t; -typedef struct { +typedef struct hdd_zone_t { uint32_t cylinders; uint32_t sectors_per_track; double sector_time_usec; @@ -136,7 +136,7 @@ typedef struct { } hdd_zone_t; /* Define the virtual Hard Disk. */ -typedef struct { +typedef struct hard_disk_t { uint8_t id; union { uint8_t channel; /* Needed for Settings to reduce the number of if's */ diff --git a/src/include/86box/isapnp.h b/src/include/86box/isapnp.h index 7259b5710..71c1bb29a 100644 --- a/src/include/86box/isapnp.h +++ b/src/include/86box/isapnp.h @@ -31,25 +31,25 @@ enum { ISAPNP_CARD_NO_KEY = 3 /* cheat code for Crystal CS423x */ }; -typedef struct { +typedef struct isapnp_device_config_t { uint8_t activate; - struct { + struct pnp_mem_t { uint32_t base : 24; uint32_t size : 24; } mem[4]; - struct { + struct pnp_mem32_t { uint32_t base; uint32_t size; } mem32[4]; - struct { + struct pnp_io_t { uint16_t base; } io[8]; - struct { + struct pnp_irq_t { uint8_t irq : 4; uint8_t level : 1; uint8_t type : 1; } irq[2]; - struct { + struct pnp_dma_t { uint8_t dma : 3; } dma[2]; } isapnp_device_config_t; diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index 500bb2843..f09507601 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -39,7 +39,7 @@ enum { }; /* Used by the AT / PS/2 keyboard controller, common device, keyboard, and mouse. */ -typedef struct { +typedef struct kbc_at_port_t { uint8_t wantcmd; uint8_t dat; @@ -51,7 +51,7 @@ typedef struct { } kbc_at_port_t; /* Used by the AT / PS/2 common device, keyboard, and mouse. */ -typedef struct { +typedef struct atkbc_dev_t { const char *name; /* name of this device */ uint8_t type; @@ -88,7 +88,7 @@ typedef struct { kbc_at_port_t *port; } atkbc_dev_t; -typedef struct { +typedef struct scancode { const uint8_t mk[4]; const uint8_t brk[4]; } scancode; @@ -228,11 +228,13 @@ extern const device_t keyboard_xt_olivetti_device; extern const device_t keyboard_xt_zenith_device; extern const device_t keyboard_xtclone_device; extern const device_t keyboard_at_device; +extern const device_t keyboard_at_siemens_device; extern const device_t keyboard_at_ami_device; extern const device_t keyboard_at_tg_ami_device; extern const device_t keyboard_at_toshiba_device; extern const device_t keyboard_at_olivetti_device; extern const device_t keyboard_at_ncr_device; +extern const device_t keyboard_at_compaq_device; extern const device_t keyboard_ps2_device; extern const device_t keyboard_ps2_ps1_device; extern const device_t keyboard_ps2_ps1_pci_device; diff --git a/src/include/86box/lpt.h b/src/include/86box/lpt.h index a22644b48..4c1c793ae 100644 --- a/src/include/86box/lpt.h +++ b/src/include/86box/lpt.h @@ -17,8 +17,7 @@ #define LPT6_IRQ 5 #endif -typedef struct -{ +typedef struct lpt_device_t { const char *name; const char *internal_name; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index d695ac357..7e17c270f 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -30,14 +30,16 @@ #define MACHINE_BUS_CARTRIDGE 0x00000004 /* sys has two cartridge bays */ #define MACHINE_BUS_ISA16 0x00000008 /* sys has ISA16 bus - PC/AT architecture */ #define MACHINE_BUS_CBUS 0x00000010 /* sys has C-BUS bus */ -#define MACHINE_BUS_PS2 0x00000020 /* system has PS/2 keyboard and mouse ports */ -#define MACHINE_BUS_EISA 0x00000040 /* sys has EISA bus */ -#define MACHINE_BUS_VLB 0x00000080 /* sys has VL bus */ -#define MACHINE_BUS_MCA 0x00000100 /* sys has MCA bus */ -#define MACHINE_BUS_PCI 0x00000200 /* sys has PCI bus */ -#define MACHINE_BUS_PCMCIA 0x00000400 /* sys has PCMCIA bus */ -#define MACHINE_BUS_AGP 0x00000800 /* sys has AGP bus */ -#define MACHINE_BUS_AC97 0x00001000 /* sys has AC97 bus (ACR/AMR/CNR slot) */ +#define MACHINE_BUS_PS2_LATCH 0x00000020 /* system has PS/2 keyboard controller IRQ latch */ +#define MACHINE_BUS_PS2_PORTS 0x00000040 /* system has PS/2 keyboard and mouse ports */ +#define MACHINE_BUS_PS2 (MACHINE_BUS_PS2_LATCH | MACHINE_BUS_PS2_PORTS) +#define MACHINE_BUS_EISA 0x00000080 /* sys has EISA bus */ +#define MACHINE_BUS_VLB 0x00000100 /* sys has VL bus */ +#define MACHINE_BUS_MCA 0x00000200 /* sys has MCA bus */ +#define MACHINE_BUS_PCI 0x00000400 /* sys has PCI bus */ +#define MACHINE_BUS_PCMCIA 0x00000800 /* sys has PCMCIA bus */ +#define MACHINE_BUS_AGP 0x00001000 /* sys has AGP bus */ +#define MACHINE_BUS_AC97 0x00002000 /* sys has AC97 bus (ACR/AMR/CNR slot) */ /* Aliases. */ #define MACHINE_CASSETTE (MACHINE_BUS_CASSETTE) /* sys has cassette port */ #define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */ @@ -98,19 +100,20 @@ #define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */ #define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */ /* Feature flags for internal storage controllers. */ -#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ -#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ -#define MACHINE_XTA 0x00040000 /* sys has int XTA */ -#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ -#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ -#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ -#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ -#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ -#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ -#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ -#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ -#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ -#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */ +#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ +#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ +#define MACHINE_XTA 0x00040000 /* sys has int XTA */ +#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ +#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ +#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ +#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ +#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ +#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ +#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ +#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ +#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ +#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */ +#define MACHINE_SOFTFLOAT_ONLY 0x20000000 /* sys requires softfloat FPU */ /* Combined flags. */ #define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */ #define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */ @@ -541,9 +544,8 @@ extern int machine_at_cmdpc_init(const machine_t *); extern int machine_at_portableii_init(const machine_t *); extern int machine_at_portableiii_init(const machine_t *); extern int machine_at_portableiii386_init(const machine_t *); -#if defined(DEV_BRANCH) && defined(USE_DESKPRO386) extern int machine_at_deskpro386_init(const machine_t *); -#endif +extern int machine_at_deskpro386_01_1988_init(const machine_t *); /* m_at_socket4.c */ extern void machine_at_premiere_common_init(const machine_t *, int); diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h index 6948dc556..e7c57881b 100644 --- a/src/include/86box/machine_status.h +++ b/src/include/86box/machine_status.h @@ -1,20 +1,20 @@ #ifndef EMU_MACHINE_STATUS_H #define EMU_MACHINE_STATUS_H -typedef struct { +typedef struct dev_status_empty_active_t { atomic_bool_t empty; atomic_bool_t active; } dev_status_empty_active_t; -typedef struct { +typedef struct dev_status_active_t { atomic_bool_t active; } dev_status_active_t; -typedef struct { +typedef struct dev_status_empty_t { atomic_bool_t empty; } dev_status_empty_t; -typedef struct { +typedef struct machine_status_t { dev_status_empty_active_t fdd[FDD_NUM]; dev_status_empty_active_t cdrom[CDROM_NUM]; dev_status_empty_active_t zip[ZIP_NUM]; diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index 18def5e76..57ab009e3 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -158,20 +158,21 @@ #define mem_set_access_smram_bus(smm, base, size, is_smram) \ mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram) -typedef struct { +typedef struct state_t { uint16_t x : 5; uint16_t w : 5; uint16_t r : 5; uint16_t pad : 1; } state_t; -typedef union { +typedef union mem_state_t { uint16_t vals[4]; state_t states[4]; } mem_state_t; typedef struct _mem_mapping_ { - struct _mem_mapping_ *prev, *next; + struct _mem_mapping_ *prev; + struct _mem_mapping_ *next; int enable; diff --git a/src/include/86box/mo.h b/src/include/86box/mo.h index 28312e2f5..a11c4d636 100644 --- a/src/include/86box/mo.h +++ b/src/include/86box/mo.h @@ -27,7 +27,7 @@ #define MO_TIME 10.0 -typedef struct { +typedef struct mo_type_t { uint32_t sectors; uint16_t bytes_per_sector; } mo_type_t; @@ -48,8 +48,7 @@ static const mo_type_t mo_types[KNOWN_MO_TYPES] = { { 637041, 1024}, }; -typedef struct -{ +typedef struct mo_drive_type_t { const char vendor[9]; const char model[16]; const char revision[5]; @@ -89,7 +88,7 @@ enum { MO_BUS_USB = 7 }; -typedef struct { +typedef struct mo_drive_t { uint8_t id; union { @@ -121,7 +120,7 @@ typedef struct { } mo_drive_t; -typedef struct { +typedef struct mo_t { mode_sense_pages_t ms_pages_saved; mo_drive_t *drv; diff --git a/src/include/86box/net_dp8390.h b/src/include/86box/net_dp8390.h index bc3220c69..e9e1e6c71 100644 --- a/src/include/86box/net_dp8390.h +++ b/src/include/86box/net_dp8390.h @@ -36,7 +36,7 @@ #define DP8390_FLAG_CHECK_CR 0x02 #define DP8390_FLAG_CLEAR_IRQ 0x04 -typedef struct { +typedef struct dp8390_t { /* Page 0 */ /* Command Register - 00h read/write */ diff --git a/src/include/86box/net_event.h b/src/include/86box/net_event.h index 61eaad166..48580a359 100644 --- a/src/include/86box/net_event.h +++ b/src/include/86box/net_event.h @@ -1,7 +1,7 @@ #ifndef EMU_NET_EVENT_H #define EMU_NET_EVENT_H -typedef struct { +typedef struct net_evt_t { #ifdef _WIN32 HANDLE handle; #else diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 19ec5fa37..d7958ee9a 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -93,7 +93,7 @@ enum { NET_QUEUE_TX_HOST = 2 }; -typedef struct { +typedef struct netcard_conf_t { uint16_t device_num; int net_type; char host_dev_name[128]; @@ -111,7 +111,7 @@ typedef struct netpkt { int len; } netpkt_t; -typedef struct { +typedef struct netqueue_t { netpkt_t packets[NET_QUEUE_LEN]; int head; int tail; diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index 3fcb74f6f..60c0d8742 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -91,13 +91,30 @@ enum { typedef union { uint32_t addr; - uint8_t addr_regs[4]; + uint8_t addr_regs[4]; } bar_t; + +#define PCI_IO_ON 0x01 +#define PCI_IO_DEV0 0x02 + + extern int pci_burst_time; extern int agp_burst_time; extern int pci_nonburst_time; extern int agp_nonburst_time; +extern int pci_take_over_io; + +extern uint32_t pci_base; +extern uint32_t pci_size; + + +extern void pci_type2_write(uint16_t port, uint8_t val, void *priv); +extern void pci_type2_writew(uint16_t port, uint16_t val, void *priv); +extern void pci_type2_writel(uint16_t port, uint32_t val, void *priv); +extern uint8_t pci_type2_read(uint16_t port, void *priv); +extern uint16_t pci_type2_readw(uint16_t port, void *priv); +extern uint32_t pci_type2_readl(uint16_t port, void *priv); extern void pci_set_irq_routing(int pci_int, int irq); extern void pci_set_irq_level(int pci_int, int level); diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index 044f20dad..bb6c26969 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -19,7 +19,7 @@ #ifndef EMU_PIT_H #define EMU_PIT_H -typedef struct { +typedef struct ctr_t { uint8_t m; uint8_t ctrl; uint8_t read_status; @@ -44,13 +44,13 @@ typedef struct { int do_read_status; union { - int count; + int32_t count; struct { - int units : 4; - int tens : 4; - int hundreds : 4; - int thousands : 4; - int myriads : 4; + int32_t units : 4; + int32_t tens : 4; + int32_t hundreds : 4; + int32_t thousands : 4; + int32_t myriads : 4; }; }; @@ -77,7 +77,7 @@ enum { PIT_8254_FAST = 3 }; -typedef struct { +typedef struct pit_intf_t { uint8_t (*read)(uint16_t addr, void *priv); void (*write)(uint16_t addr, uint8_t val, void *priv); /* Gets a counter's count. */ diff --git a/src/include/86box/pit_fast.h b/src/include/86box/pit_fast.h index d1bca1265..a7caeabe7 100644 --- a/src/include/86box/pit_fast.h +++ b/src/include/86box/pit_fast.h @@ -19,7 +19,7 @@ #ifndef EMU_PIT_FAST_H #define EMU_PIT_FAST_H -typedef struct { +typedef struct ctrf_t { uint8_t m; uint8_t ctrl; uint8_t read_status; @@ -45,13 +45,13 @@ typedef struct { int rereadlatch; union { - int count; + int32_t count; struct { - int units : 4; - int tens : 4; - int hundreds : 4; - int thousands : 4; - int myriads : 4; + int32_t units : 4; + int32_t tens : 4; + int32_t hundreds : 4; + int32_t thousands : 4; + int32_t myriads : 4; }; }; @@ -62,7 +62,7 @@ typedef struct { void (*out_func)(int new_out, int old_out); } ctrf_t; -typedef struct { +typedef struct pitf_t { int flags; ctrf_t counters[3]; diff --git a/src/include/86box/plat_dir.h b/src/include/86box/plat_dir.h index ba1ac180f..485314f46 100644 --- a/src/include/86box/plat_dir.h +++ b/src/include/86box/plat_dir.h @@ -39,7 +39,7 @@ struct dirent { }; # define d_namlen d_reclen -typedef struct { +typedef struct DIR_t { short flags; /* internal flags */ short offset; /* offset of entry into dir */ long handle; /* open handle to Win32 system */ diff --git a/src/include/86box/plat_dynld.h b/src/include/86box/plat_dynld.h index 986e72424..44891d4ac 100644 --- a/src/include/86box/plat_dynld.h +++ b/src/include/86box/plat_dynld.h @@ -18,7 +18,7 @@ #ifndef PLAT_DYNLD_H #define PLAT_DYNLD_H -typedef struct { +typedef struct dllimp_t { const char *name; void *func; } dllimp_t; diff --git a/src/include/86box/port_6x.h b/src/include/86box/port_6x.h index 71633f601..e0c4b0508 100644 --- a/src/include/86box/port_6x.h +++ b/src/include/86box/port_6x.h @@ -20,8 +20,7 @@ #define EMU_PORT_6X_H #ifdef _TIMER_H_ -typedef struct -{ +typedef struct port_6x_t { uint8_t refresh; uint8_t flags; diff --git a/src/include/86box/port_92.h b/src/include/86box/port_92.h index dd33d0681..2dd4319be 100644 --- a/src/include/86box/port_92.h +++ b/src/include/86box/port_92.h @@ -20,8 +20,7 @@ #define EMU_PORT_92_H #ifdef _TIMER_H_ -typedef struct -{ +typedef struct port_92_t { uint8_t reg; uint8_t flags; diff --git a/src/include/86box/rom.h b/src/include/86box/rom.h index 91f813a95..5da516aef 100644 --- a/src/include/86box/rom.h +++ b/src/include/86box/rom.h @@ -32,7 +32,7 @@ #define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP) #define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX) -typedef struct { +typedef struct rom_t { uint8_t *rom; int sz; uint32_t mask; diff --git a/src/include/86box/row.h b/src/include/86box/row.h new file mode 100644 index 000000000..9dab7d4c3 --- /dev/null +++ b/src/include/86box/row.h @@ -0,0 +1,46 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Definitions for the SMRAM interface. + * + * + * + * Authors: Miran Grca, + * + * Copyright 2016-2020 Miran Grca. + */ + +#ifndef EMU_ROW_H +# define EMU_ROW_H + +typedef struct _row_ +{ + struct _smram_ *prev; + struct _smram_ *next; + + uint8_t *buf; + + mem_mapping_t mapping; + + uint32_t host_base; + uint32_t host_size; + uint32_t ram_base; + uint32_t ram_size; + uint32_t ram_mask; + uint32_t boundary; +} row_t; + + +extern void row_disable(uint8_t row_id); +extern void row_set_boundary(uint8_t row_id, uint32_t boundary); + + +extern device_t row_device; + + +#endif /*EMU_ROW_H*/ diff --git a/src/include/86box/scsi_cdrom.h b/src/include/86box/scsi_cdrom.h index ea7f5f334..64c24c10e 100644 --- a/src/include/86box/scsi_cdrom.h +++ b/src/include/86box/scsi_cdrom.h @@ -22,7 +22,7 @@ #define CDROM_TIME 10.0 #ifdef SCSI_DEVICE_H -typedef struct { +typedef struct scsi_cdrom_t { /* Common block. */ mode_sense_pages_t ms_pages_saved; diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index 5af0919f9..7256970cd 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -338,7 +338,7 @@ #define MODE_SELECT_PHASE_PAGE_HEADER 3 #define MODE_SELECT_PHASE_PAGE 4 -typedef struct { +typedef struct mode_sense_pages_t { uint8_t pages[0x40][0x40]; } mode_sense_pages_t; @@ -384,7 +384,7 @@ typedef struct scsi_common_s { double callback; } scsi_common_t; -typedef struct { +typedef struct scsi_device_t { int32_t buffer_length; uint8_t status; diff --git a/src/include/86box/scsi_disk.h b/src/include/86box/scsi_disk.h index b8ce9892c..ebf21c073 100644 --- a/src/include/86box/scsi_disk.h +++ b/src/include/86box/scsi_disk.h @@ -16,7 +16,7 @@ #ifndef SCSI_DISK_H #define SCSI_DISK_H -typedef struct { +typedef struct scsi_disk_t { mode_sense_pages_t ms_pages_saved; hard_disk_t *drv; diff --git a/src/include/86box/scsi_x54x.h b/src/include/86box/scsi_x54x.h index 77ec136be..213873c5a 100644 --- a/src/include/86box/scsi_x54x.h +++ b/src/include/86box/scsi_x54x.h @@ -203,13 +203,13 @@ typedef struct addr24_s { } addr24_t; /* Structure for the INQUIRE_SETUP_INFORMATION reply. */ -typedef struct { +typedef struct ReplyInquireSetupInformationSynchronousValue_t { uint8_t uOffset : 4; uint8_t uTransferPeriod : 3; uint8_t fSynchronous : 1; } ReplyInquireSetupInformationSynchronousValue; -typedef struct { +typedef struct ReplyInquireSetupInformation_t { uint8_t fSynchronousInitiationEnabled : 1; uint8_t fParityCheckingEnabled : 1; uint8_t uReserved1 : 6; @@ -223,24 +223,24 @@ typedef struct { uint8_t VendorSpecificData[28]; } ReplyInquireSetupInformation; -typedef struct { +typedef struct MailboxInit_t { uint8_t Count; addr24_t Address; } MailboxInit_t; -typedef struct { +typedef struct Mailbox_t { uint8_t CmdStatus; addr24_t CCBPointer; } Mailbox_t; -typedef struct { +typedef struct Mailbox32_t { uint32_t CCBPointer; union { - struct { + struct out_t { uint8_t Reserved[3]; uint8_t ActionCode; } out; - struct { + struct in_t { uint8_t HostStatus; uint8_t TargetStatus; uint8_t Reserved; @@ -255,7 +255,7 @@ typedef struct { Bytes 16 and 17 Reserved (must be 0) Bytes 18 through 18+n-1, where n=size of CDB Command Descriptor Block */ -typedef struct { +typedef struct CCB32_t { uint8_t Opcode; uint8_t Reserved1 : 3, ControlByte : 2, @@ -277,7 +277,7 @@ typedef struct { uint32_t SensePointer; } CCB32; -typedef struct { +typedef struct CCB_t { uint8_t Opcode; uint8_t Lun : 3; uint8_t ControlByte : 2; @@ -294,7 +294,7 @@ typedef struct { uint8_t Cdb[12]; } CCB; -typedef struct { +typedef struct CCBC_t { uint8_t Opcode; uint8_t Pad1 : 3, ControlByte : 2, @@ -309,7 +309,7 @@ typedef struct { uint8_t Cdb[12]; } CCBC; -typedef union { +typedef union CCBU_t { CCB32 new; CCB old; CCBC common; @@ -320,26 +320,25 @@ typedef struct { uint8_t *RequestSenseBuffer; uint32_t CCBPointer; int Is24bit; - uint8_t TargetID, - LUN, - HostStatus, - TargetStatus, - MailboxCompletionCode; + uint8_t TargetID; + uint8_t LUN; + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t MailboxCompletionCode; } Req_t; -typedef struct -{ +typedef struct BIOSCMD_t { uint8_t command; uint8_t lun : 3, reserved : 2, id : 3; union { - struct { + struct chs_t { uint16_t cyl; uint8_t head; uint8_t sec; } chs; - struct { + struct lba_t { uint8_t lba0; /* MSB */ uint8_t lba1; uint8_t lba2; @@ -350,12 +349,12 @@ typedef struct addr24_t dma_address; } BIOSCMD; -typedef struct { +typedef struct SGE32_t { uint32_t Segment; uint32_t SegmentPointer; } SGE32; -typedef struct { +typedef struct SGE_t { addr24_t Segment; addr24_t SegmentPointer; } SGE; @@ -368,92 +367,111 @@ typedef struct { #define X54X_MBX_24BIT 16 #define X54X_ISAPNP 32 -typedef struct { +typedef struct x54x_t { /* 32 bytes */ - char vendor[16], /* name of device vendor */ - name[16]; /* name of device */ + char vendor[16]; /* name of device vendor */ + char name[16]; /* name of device */ /* 24 bytes */ - int8_t type, /* type of device */ - IrqEnabled, Irq, - DmaChannel, - HostID; + int8_t type; /* type of device */ + int8_t IrqEnabled; + int8_t Irq; + int8_t DmaChannel; + int8_t HostID; - uint8_t callback_phase : 4, - callback_sub_phase : 4, - scsi_cmd_phase, bus, - sync, - parity, shram_mode, - Geometry, Control, - Command, CmdParam, - BusOnTime, BusOffTime, - ATBusSpeed, setup_info_len, - max_id, pci_slot, - temp_cdb[12]; + uint8_t callback_phase : 4; + uint8_t callback_sub_phase : 4; + uint8_t scsi_cmd_phase; + uint8_t bus; + uint8_t sync; + uint8_t parity; + uint8_t shram_mode; + uint8_t Geometry; + uint8_t Control; + uint8_t Command; + uint8_t CmdParam; + uint8_t BusOnTime; + uint8_t BusOffTime; + uint8_t ATBusSpeed; + uint8_t setup_info_len; + uint8_t max_id; + uint8_t pci_slot; + uint8_t temp_cdb[12]; - volatile uint8_t /* for multi-threading, keep */ - Status, - Interrupt, /* these volatile */ - MailboxIsBIOS, ToRaise, - flags; + /* for multi-threading, keep these volatile */ + volatile uint8_t Status; + volatile uint8_t Interrupt; + volatile uint8_t MailboxIsBIOS; + volatile uint8_t ToRaise; + volatile uint8_t flags; /* 65928 bytes */ - uint8_t pos_regs[8], /* MCA */ - CmdBuf[128], - DataBuf[65536], - shadow_ram[128], - dma_buffer[128], - cmd_33_buf[4096]; + uint8_t pos_regs[8]; /* MCA */ + uint8_t CmdBuf[128]; + uint8_t DataBuf[65536]; + uint8_t shadow_ram[128]; + uint8_t dma_buffer[128]; + uint8_t cmd_33_buf[4096]; /* 16 bytes */ char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */ - uint8_t *rom1, /* main BIOS image */ - *rom2, /* SCSI-Select image */ - *nvr; /* EEPROM buffer */ + uint8_t *rom1; /* main BIOS image */ + uint8_t *rom2; /* SCSI-Select image */ + uint8_t *nvr; /* EEPROM buffer */ /* 6 words = 12 bytes */ - uint16_t DataReply, DataReplyLeft, - rom_ioaddr, /* offset in BIOS of I/O addr */ - rom_shram, /* index to shared RAM */ - rom_shramsz, /* size of shared RAM */ - rom_fwhigh, /* offset in BIOS of ver ID */ - pnp_len, /* length of the PnP ROM */ - pnp_offset, /* offset in the microcode ROM of the PnP ROM */ - cmd_33_len, /* length of the SCSISelect code decompressor program */ - cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ + uint16_t DataReply; + uint16_t DataReplyLeft; + uint16_t rom_ioaddr; /* offset in BIOS of I/O addr */ + uint16_t rom_shram; /* index to shared RAM */ + uint16_t rom_shramsz; /* size of shared RAM */ + uint16_t rom_fwhigh; /* offset in BIOS of ver ID */ + uint16_t pnp_len; /* length of the PnP ROM */ + uint16_t pnp_offset; /* offset in the microcode ROM of the PnP ROM */ + uint16_t cmd_33_len; /* length of the SCSISelect code decompressor program */ + uint16_t cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ /* 16 + 20 + 52 = 88 bytes */ - volatile int - MailboxOutInterrupts, - PendingInterrupt, Lock, - target_data_len, pad0; + volatile int MailboxOutInterrupts; + volatile int PendingInterrupt; + volatile int Lock; + volatile int target_data_len; + volatile int pad0; - uint32_t Base, fdc_address, rom_addr, /* address of BIOS ROM */ - CmdParamLeft, Outgoing, - transfer_size; + uint32_t Base; + uint32_t fdc_address; + uint32_t rom_addr; /* address of BIOS ROM */ + uint32_t CmdParamLeft; + uint32_t Outgoing; + uint32_t transfer_size; - volatile uint32_t - MailboxInit, - MailboxCount, - MailboxOutAddr, MailboxOutPosCur, - MailboxInAddr, MailboxInPosCur, - MailboxReq, - BIOSMailboxInit, BIOSMailboxCount, - BIOSMailboxOutAddr, BIOSMailboxOutPosCur, - BIOSMailboxReq, - Residue, card_bus; /* Basically a copy of device flags */ + volatile uint32_t MailboxInit; + volatile uint32_t MailboxCount; + volatile uint32_t MailboxOutAddr; + volatile uint32_t MailboxOutPosCur; + volatile uint32_t MailboxInAddr; + volatile uint32_t MailboxInPosCur; + volatile uint32_t MailboxReq; + volatile uint32_t BIOSMailboxInit; + volatile uint32_t BIOSMailboxCount; + volatile uint32_t BIOSMailboxOutAddr; + volatile uint32_t BIOSMailboxOutPosCur; + volatile uint32_t BIOSMailboxReq; + volatile uint32_t Residue; + volatile uint32_t card_bus; /* Basically a copy of device flags */ /* 8 bytes */ uint64_t temp_period; /* 16 bytes */ - double media_period, ha_bps; /* bytes per second */ + double media_period; + double ha_bps; /* bytes per second */ /* 8 bytes */ - char *bios_path, /* path to BIOS image file */ - *mcode_path, /* path to microcode image file, needed by the AHA-1542CP */ - *nvr_path; /* path to NVR image file */ + char *bios_path; /* path to BIOS image file */ + char *mcode_path; /* path to microcode image file, needed by the AHA-1542CP */ + char *nvr_path; /* path to NVR image file */ /* 56 bytes */ /* Pointer to a structure of vendor-specific data that only the vendor-specific code can understand */ @@ -486,12 +504,13 @@ typedef struct { /* Pointer to a function that resets vendor-specific data */ void (*ven_reset)(void *p); - rom_t bios, /* BIOS memory descriptor */ - uppersck; /* BIOS memory descriptor */ + rom_t bios; /* BIOS memory descriptor */ + rom_t uppersck; /* BIOS memory descriptor */ mem_mapping_t mmio_mapping; - pc_timer_t timer, ResetCB; + pc_timer_t timer; + pc_timer_t ResetCB; Req_t Req; diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 5402cd77b..b27e54c5e 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -107,7 +107,7 @@ typedef struct serial_device_s { serial_t *serial; } serial_device_t; -typedef struct { +typedef struct serial_port_s { uint8_t enabled; } serial_port_t; diff --git a/src/include/86box/smbus.h b/src/include/86box/smbus.h index 0f7c3fa92..340d1d00e 100644 --- a/src/include/86box/smbus.h +++ b/src/include/86box/smbus.h @@ -29,7 +29,7 @@ enum { SMBUS_VIA = 1 }; -typedef struct { +typedef struct smbus_piix4_t { uint32_t local; uint16_t io_base; int clock; @@ -47,7 +47,7 @@ typedef struct { void *i2c; } smbus_piix4_t; -typedef struct { +typedef struct smbus_ali7101_t { uint32_t local; uint16_t io_base; uint8_t stat; diff --git a/src/include/86box/snd_ac97.h b/src/include/86box/snd_ac97.h index fcd6f251f..ee75d56c4 100644 --- a/src/include/86box/snd_ac97.h +++ b/src/include/86box/snd_ac97.h @@ -103,21 +103,21 @@ enum { AC97_CODEC_AK4540 = 7 }; -typedef struct { +typedef struct ac97_vendor_reg_t { const uint16_t index; const uint16_t value; const uint16_t write_mask; } ac97_vendor_reg_t; -typedef struct { - uint32_t vendor_id; - uint32_t min_rate; - uint32_t max_rate; - uint32_t misc_flags; - uint16_t reset_flags; - uint16_t extid_flags; - uint16_t powerdown_mask; - uint16_t regs[64]; +typedef struct ac97_codec_t { + uint32_t vendor_id; + uint32_t min_rate; + uint32_t max_rate; + uint32_t misc_flags; + uint16_t reset_flags; + uint16_t extid_flags; + uint16_t powerdown_mask; + uint16_t regs[64]; uint8_t codec_id; uint8_t vendor_reg_page_max; const ac97_vendor_reg_t *vendor_regs; diff --git a/src/include/86box/snd_ad1848.h b/src/include/86box/snd_ad1848.h index 049999da0..be7831fb4 100644 --- a/src/include/86box/snd_ad1848.h +++ b/src/include/86box/snd_ad1848.h @@ -30,7 +30,7 @@ enum { AD1848_TYPE_CS4236 = 4 }; -typedef struct { +typedef struct ad1848_t { uint8_t type; uint8_t index; uint8_t xindex; diff --git a/src/include/86box/snd_opl.h b/src/include/86box/snd_opl.h index ff4e1f4a8..3a3f93ad5 100644 --- a/src/include/86box/snd_opl.h +++ b/src/include/86box/snd_opl.h @@ -31,7 +31,7 @@ enum fm_driver { FM_DRV_MAX = 2 }; -typedef struct { +typedef struct fm_drv_t { uint8_t (*read)(uint16_t port, void *priv); void (*write)(uint16_t port, uint8_t val, void *priv); int32_t *(*update)(void *priv); diff --git a/src/include/86box/usb.h b/src/include/86box/usb.h index 8fc844363..7c2e13ee9 100644 --- a/src/include/86box/usb.h +++ b/src/include/86box/usb.h @@ -56,16 +56,14 @@ typedef struct usb_params_t void* parent_priv; } usb_params_t; -typedef union -{ +typedef union { uint32_t l; uint16_t w[2]; uint8_t b[4]; } ohci_mmio_t; /* USB Host Controller device struct */ -typedef struct usb_t -{ +typedef struct usb_t { uint8_t uhci_io[32]; ohci_mmio_t ohci_mmio[1024]; uint16_t uhci_io_base; @@ -88,14 +86,12 @@ typedef struct usb_t #pragma pack(push, 1) /* Base USB descriptor struct. */ -typedef struct usb_desc_base_t -{ +typedef struct usb_desc_base_t { uint8_t bLength; uint8_t bDescriptorType; } usb_desc_base_t; -enum usb_desc_setup_req_types -{ +enum usb_desc_setup_req_types { USB_SETUP_TYPE_DEVICE = 0x0, USB_SETUP_TYPE_INTERFACE = 0x1, USB_SETUP_TYPE_ENDPOING = 0x2, @@ -106,8 +102,7 @@ enum usb_desc_setup_req_types #define USB_SETUP_DEV_TO_HOST 0x80 -typedef struct usb_desc_setup_t -{ +typedef struct usb_desc_setup_t { uint8_t bmRequestType; uint8_t bRequest; uint16_t wValue; @@ -115,8 +110,7 @@ typedef struct usb_desc_setup_t uint16_t wLength; } usb_desc_setup_t; -typedef struct usb_desc_endpoint_t -{ +typedef struct usb_desc_endpoint_t { usb_desc_base_t base; uint8_t bEndpointAddress; uint8_t bmAttributes; @@ -124,8 +118,7 @@ typedef struct usb_desc_endpoint_t uint8_t bInterval; } usb_desc_endpoint_t; -typedef struct usb_desc_hid_t -{ +typedef struct usb_desc_hid_t { usb_desc_base_t base; uint16_t bcdHID; @@ -135,8 +128,7 @@ typedef struct usb_desc_hid_t uint16_t wDescriptorLength; } usb_desc_hid_t; -typedef struct usb_desc_interface_t -{ +typedef struct usb_desc_interface_t { usb_desc_base_t base; uint8_t bInterfaceNumber; @@ -148,14 +140,12 @@ typedef struct usb_desc_interface_t uint8_t iInterface; } usb_desc_interface_t; -typedef struct usb_desc_string_t -{ +typedef struct usb_desc_string_t { usb_desc_base_t base; uint16_t bString[]; } usb_desc_string_t; -typedef struct usb_desc_conf_t -{ +typedef struct usb_desc_conf_t { usb_desc_base_t base; uint16_t wTotalLength; @@ -166,8 +156,7 @@ typedef struct usb_desc_conf_t uint8_t bMaxPower; } usb_desc_conf_t; -typedef struct usb_desc_device_t -{ +typedef struct usb_desc_device_t { usb_desc_base_t base; uint16_t bcdUSB; @@ -187,8 +176,7 @@ typedef struct usb_desc_device_t #pragma pack(pop) /* USB endpoint device struct. Incomplete and unused. */ -typedef struct usb_device_t -{ +typedef struct usb_device_t { usb_desc_device_t device_desc; struct { usb_desc_conf_t conf_desc; diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index e6510e3f1..b21da9fba 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -24,6 +24,8 @@ typedef struct ibm8514_t { int force_old_addr; int type; + int local; + int bpp; uint32_t vram_size; uint32_t vram_mask; @@ -32,6 +34,7 @@ typedef struct ibm8514_t { uint8_t dac_mask, dac_status; uint32_t *map8; int dac_addr, dac_pos, dac_r, dac_g; + int internal_pitch; struct { uint16_t subsys_cntl; @@ -58,7 +61,7 @@ typedef struct ibm8514_t { uint8_t pix_trans[2]; int poly_draw; int ssv_state; - int x1, x2, y1, y2; + int16_t x1, x2, x3, y1, y2; int sys_cnt, sys_cnt2; int temp_cnt; int16_t cx, cy, oldcy; @@ -80,6 +83,7 @@ typedef struct ibm8514_t { uint16_t scratch; int fill_state, xdir, ydir; + uint32_t ge_offset; } accel; uint16_t test; @@ -90,7 +94,7 @@ typedef struct ibm8514_t { dispon, hdisp_on, linecountff, vc, linepos, oddeven, cursoron, blink, scrollcache, firstline, lastline, firstline_draw, lastline_draw, - displine, fullchange, x_add, y_add; + displine, fullchange; uint32_t ma, maback; uint8_t *vram, *changedvram, linedbl; @@ -103,11 +107,13 @@ typedef struct ibm8514_t { int disp_cntl, interlace; uint8_t subsys_cntl, subsys_stat; - volatile int force_busy, force_busy2; + atomic_int force_busy, force_busy2; int blitter_busy; uint64_t blitter_time; uint64_t status_time; int pitch; + int ext_pitch; + int ext_crt_pitch; } ibm8514_t; #endif /*VIDEO_8514A_H*/ diff --git a/src/include/86box/vid_ati_eeprom.h b/src/include/86box/vid_ati_eeprom.h index 1fa083eaa..7de5170d8 100644 --- a/src/include/86box/vid_ati_eeprom.h +++ b/src/include/86box/vid_ati_eeprom.h @@ -43,6 +43,7 @@ typedef struct ati_eeprom_t { } ati_eeprom_t; void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type); +void ati_eeprom_load_mach8(ati_eeprom_t *eeprom, char *fn); void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat); int ati_eeprom_read(ati_eeprom_t *eeprom); diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 93fb9f17c..f8dafdd20 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -31,8 +31,9 @@ # define FLAG_NOSKEW 16 # define FLAG_ADDR_BY16 32 # define FLAG_RAMDAC_SHIFT 64 -# define FLAG_128K_MASK 128 - +# define FLAG_ATI 128 +# define FLAG_S3_911_16BIT 256 +# define FLAG_512K_MASK 512 struct monitor_t; typedef struct { diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index 069718b9f..550ae7cd6 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -36,6 +36,7 @@ typedef struct xga_t { mem_mapping_t linear_mapping; mem_mapping_t video_mapping; rom_t bios_rom; + rom_t vga_bios_rom; xga_hwcursor_t hwcursor, hwcursor_latch; PALETTE extpal; @@ -57,7 +58,7 @@ typedef struct xga_t { uint8_t clk_sel_1, clk_sel_2; uint8_t hwc_control; uint8_t bus_arb; - uint8_t select_pos_isa; + uint8_t isa_pos_enable; uint8_t hwcursor_oddeven; uint8_t cfg_reg_instance; uint8_t rowcount; @@ -70,6 +71,8 @@ typedef struct xga_t { uint8_t sprite_data[1024]; uint8_t scrollcache; uint8_t direct_color; + uint8_t dma_channel; + uint8_t instance_isa, instance_num, ext_mem_addr; uint8_t *vram, *changedvram; int16_t hwc_pos_x; diff --git a/src/include/86box/vid_xga_device.h b/src/include/86box/vid_xga_device.h index a92c6d3c6..7aa274d30 100644 --- a/src/include/86box/vid_xga_device.h +++ b/src/include/86box/vid_xga_device.h @@ -17,6 +17,11 @@ #ifndef VIDEO_XGA_DEVICE_H #define VIDEO_XGA_DEVICE_H +extern int xga_has_vga; + +#ifdef EMU_DEVICE_H extern const device_t xga_device; extern const device_t xga_isa_device; +extern const device_t inmos_isa_device; +#endif #endif /*VIDEO_XGA_DEVICE_H*/ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 4c94fabfd..00925b31a 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -60,50 +60,59 @@ enum { #define VIDEO_FLAG_TYPE_CGA 0 #define VIDEO_FLAG_TYPE_MDA 1 #define VIDEO_FLAG_TYPE_SPECIAL 2 -#define VIDEO_FLAG_TYPE_NONE 3 -#define VIDEO_FLAG_TYPE_MASK 3 +#define VIDEO_FLAG_TYPE_8514 3 +#define VIDEO_FLAG_TYPE_XGA 4 +#define VIDEO_FLAG_TYPE_NONE 5 +#define VIDEO_FLAG_TYPE_MASK 7 -typedef struct { +typedef struct video_timings_t { int type; - int write_b, write_w, write_l; - int read_b, read_w, read_l; + int write_b; + int write_w; + int write_l; + int read_b; + int read_w; + int read_l; } video_timings_t; -typedef struct { - int w, h; +typedef struct bitmap_t { + int w; + int h; uint32_t *dat; uint32_t *line[2112]; } bitmap_t; -typedef struct { - uint8_t r, g, b; +typedef struct rgb_t { + uint8_t r; + uint8_t g; + uint8_t b; } rgb_t; -typedef struct { +typedef struct dbcs_font_t { uint8_t chr[32]; } dbcs_font_t; struct blit_data_struct; typedef struct monitor_t { - char name[512]; - int mon_xsize; - int mon_ysize; - int mon_scrnsz_x; - int mon_scrnsz_y; - int mon_efscrnsz_y; - int mon_unscaled_size_x; - int mon_unscaled_size_y; - int mon_res_x; - int mon_res_y; - int mon_bpp; - bitmap_t *target_buffer; - int mon_video_timing_read_b, - mon_video_timing_read_w, - mon_video_timing_read_l; - int mon_video_timing_write_b, - mon_video_timing_write_w, - mon_video_timing_write_l; + char name[512]; + int mon_xsize; + int mon_ysize; + int mon_scrnsz_x; + int mon_scrnsz_y; + int mon_efscrnsz_y; + int mon_unscaled_size_x; + int mon_unscaled_size_y; + int mon_res_x; + int mon_res_y; + int mon_bpp; + bitmap_t *target_buffer; + int mon_video_timing_read_b; + int mon_video_timing_read_w; + int mon_video_timing_read_l; + int mon_video_timing_write_b; + int mon_video_timing_write_w; + int mon_video_timing_write_l; int mon_overscan_x; int mon_overscan_y; int mon_force_resize; @@ -137,10 +146,14 @@ extern int video_fullscreen_scale_maximized; typedef rgb_t PALETTE[256]; -// extern int changeframecount; +#if 0 +extern int changeframecount; +#endif extern volatile int screenshots; -// extern bitmap_t *buffer32; +#if 0 +extern bitmap_t *buffer32; +#endif #define buffer32 (monitors[monitor_index_global].target_buffer) #define pal_lookup (monitors[monitor_index_global].mon_pal_lookup) #define overscan_x (monitors[monitor_index_global].mon_overscan_x) @@ -163,12 +176,14 @@ extern volatile int screenshots; #define efscrnsz_y (monitors[monitor_index_global].mon_efscrnsz_y) #define unscaled_size_x (monitors[monitor_index_global].mon_unscaled_size_x) #define unscaled_size_y (monitors[monitor_index_global].mon_unscaled_size_y) -extern PALETTE cgapal; -extern PALETTE cgapal_mono[6]; -// extern uint32_t pal_lookup[256]; -extern int video_fullscreen; -extern int video_fullscreen_scale; -extern int video_fullscreen_first; +extern PALETTE cgapal; +extern PALETTE cgapal_mono[6]; +#if 0 +extern uint32_t pal_lookup[256]; +#endif +extern int video_fullscreen; +extern int video_fullscreen_scale; +extern int video_fullscreen_first; extern uint8_t fontdat[2048][8]; extern uint8_t fontdatm[2048][16]; extern uint8_t fontdatw[512][32]; @@ -176,23 +191,24 @@ extern uint8_t fontdat8x12[256][16]; extern uint8_t fontdat12x18[256][36]; extern dbcs_font_t *fontdatksc5601; extern dbcs_font_t *fontdatksc5601_user; -extern uint32_t *video_6to8, - *video_8togs, - *video_8to32, - *video_15to32, - *video_16to32; -extern int enable_overscan; -extern int force_43; -extern int vid_resize; -extern int herc_blend; -extern int vid_cga_contrast; -extern int video_grayscale; -extern int video_graytype; +extern uint32_t *video_6to8; +extern uint32_t *video_8togs; +extern uint32_t *video_8to32; +extern uint32_t *video_15to32; +extern uint32_t *video_16to32; +extern int enable_overscan; +extern int force_43; +extern int vid_resize; +extern int herc_blend; +extern int vid_cga_contrast; +extern int video_grayscale; +extern int video_graytype; extern double cpuclock; extern int emu_fps; extern int frames; extern int readflash; +extern int ibm8514_has_vga; /* Function handler pointers. */ extern void (*video_recalctimings)(void); @@ -219,6 +235,8 @@ extern int video_card_get_flags(int card); extern int video_is_mda(void); extern int video_is_cga(void); extern int video_is_ega_vga(void); +extern int video_is_8514(void); +extern int video_is_xga(void); extern void video_inform_monitor(int type, const video_timings_t *ptr, int monitor_index); extern int video_get_type_monitor(int monitor_index); @@ -277,8 +295,12 @@ extern uint32_t video_color_transform(uint32_t color); /* IBM XGA */ extern void xga_device_add(void); -/* IBM 8514/A and generic clones*/ +/* IBM 8514/A and clones*/ extern void ibm8514_device_add(void); +extern const device_t mach8_isa_device; +extern const device_t mach32_isa_device; +extern const device_t mach32_vlb_device; +extern const device_t mach32_pci_device; /* ATi Mach64 */ extern const device_t mach64gx_isa_device; diff --git a/src/ini.c b/src/ini.c index 0921b61ff..4ea2b6477 100644 --- a/src/ini.c +++ b/src/ini.c @@ -42,7 +42,7 @@ typedef struct _list_ { struct _list_ *next; } list_t; -typedef struct { +typedef struct section_t { list_t list; char name[128]; @@ -50,7 +50,7 @@ typedef struct { list_t entry_head; } section_t; -typedef struct { +typedef struct entry_t { list_t list; char name[128]; diff --git a/src/io.c b/src/io.c index 99b4954f8..173e6707b 100644 --- a/src/io.c +++ b/src/io.c @@ -29,6 +29,7 @@ #include <86box/timer.h> #include "cpu.h" #include <86box/m_amstrad.h> +#include <86box/pci.h> #define NPORTS 65536 /* PC/AT supports 64K ports */ @@ -47,10 +48,11 @@ typedef struct _io_ { } io_t; typedef struct { - uint8_t enable; - uint16_t base, size; - void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - *priv; + uint8_t enable; + uint16_t base; + uint16_t size; + void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv); + void *priv; } io_trap_t; int initialized = 0; @@ -286,15 +288,25 @@ inb(uint16_t port) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->inb) { - ret &= p->inb(port, p->priv); - found |= 1; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_read(port, NULL); + found = 1; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_read(port, NULL); + found = 1; + qfound = 1; + } else { + p = io[port]; + while (p) { + q = p->next; + if (p->inb) { + ret &= p->inb(port, p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } if (amstrad_latch & 0x80000000) { @@ -310,8 +322,10 @@ inb(uint16_t port) cycles -= io_delay; /* TriGem 486-BIOS MHz output. */ - /* if (port == 0x1ed) - ret = 0xfe; */ +#if 0 + if (port == 0x1ed) + ret = 0xfe; +#endif io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); @@ -326,15 +340,25 @@ outb(uint16_t port, uint8_t val) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->outb) { - p->outb(port, val, p->priv); - found |= 1; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_write(port, val, NULL); + found = 1; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_write(port, val, NULL); + found = 1; + qfound = 1; + } else { + p = io[port]; + while (p) { + q = p->next; + if (p->outb) { + p->outb(port, val, p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } if (!found) { @@ -360,32 +384,42 @@ inw(uint16_t port) int qfound = 0; uint8_t ret8[2]; - p = io[port]; - while (p) { - q = p->next; - if (p->inw) { - ret &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - ret8[0] = ret & 0xff; - ret8[1] = (ret >> 8) & 0xff; - for (uint8_t i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_readw(port, NULL); + found = 2; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_readw(port, NULL); + found = 2; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->inb && !p->inw) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; + if (p->inw) { + ret &= p->inw(port, p->priv); + found |= 2; qfound++; } p = q; } + + ret8[0] = ret & 0xff; + ret8[1] = (ret >> 8) & 0xff; + for (uint8_t i = 0; i < 2; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } + } + ret = (ret8[1] << 8) | ret8[0]; } - ret = (ret8[1] << 8) | ret8[0]; if (amstrad_latch & 0x80000000) { if (port & 0x80) @@ -412,28 +446,38 @@ outw(uint16_t port, uint16_t val) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->outw) { - p->outw(port, val, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - for (uint8_t i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_writew(port, val, NULL); + found = 2; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_writew(port, val, NULL); + found = 2; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->outb && !p->outw) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; + if (p->outw) { + p->outw(port, val, p->priv); + found |= 2; qfound++; } p = q; } + + for (uint8_t i = 0; i < 2; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } + } } if (!found) { @@ -460,59 +504,69 @@ inl(uint16_t port) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->inl) { - ret &= p->inl(port, p->priv); - found |= 4; - qfound++; - } - p = q; - } - - ret16[0] = ret & 0xffff; - ret16[1] = (ret >> 16) & 0xffff; - p = io[port & 0xffff]; - while (p) { - q = p->next; - if (p->inw && !p->inl) { - ret16[0] &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - p = io[(port + 2) & 0xffff]; - while (p) { - q = p->next; - if (p->inw && !p->inl) { - ret16[1] &= p->inw(port + 2, p->priv); - found |= 2; - qfound++; - } - p = q; - } - ret = (ret16[1] << 16) | ret16[0]; - - ret8[0] = ret & 0xff; - ret8[1] = (ret >> 8) & 0xff; - ret8[2] = (ret >> 16) & 0xff; - ret8[3] = (ret >> 24) & 0xff; - for (uint8_t i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_readl(port, NULL); + found = 4; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_readl(port, NULL); + found = 4; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->inb && !p->inw && !p->inl) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; + if (p->inl) { + ret &= p->inl(port, p->priv); + found |= 4; qfound++; } p = q; } + + ret16[0] = ret & 0xffff; + ret16[1] = (ret >> 16) & 0xffff; + p = io[port & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[0] &= p->inw(port, p->priv); + found |= 2; + qfound++; + } + p = q; + } + + p = io[(port + 2) & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[1] &= p->inw(port + 2, p->priv); + found |= 2; + qfound++; + } + p = q; + } + ret = (ret16[1] << 16) | ret16[0]; + + ret8[0] = ret & 0xff; + ret8[1] = (ret >> 8) & 0xff; + ret8[2] = (ret >> 16) & 0xff; + ret8[3] = (ret >> 24) & 0xff; + for (uint8_t i = 0; i < 4; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw && !p->inl) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } + } + ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; } - ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; if (amstrad_latch & 0x80000000) { if (port & 0x80) @@ -540,42 +594,52 @@ outl(uint16_t port, uint32_t val) int qfound = 0; int i = 0; - p = io[port]; - if (p) { - while (p) { - q = p->next; - if (p->outl) { - p->outl(port, val, p->priv); - found |= 4; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_writel(port, val, NULL); + found = 4; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_writel(port, val, NULL); + found = 4; + qfound = 1; + } else { + p = io[port]; + if (p) { + while (p) { + q = p->next; + if (p->outl) { + p->outl(port, val, p->priv); + found |= 4; + qfound++; + } + p = q; } - p = q; } - } - for (i = 0; i < 4; i += 2) { - p = io[(port + i) & 0xffff]; - while (p) { - q = p->next; - if (p->outw && !p->outl) { - p->outw(port + i, val >> (i << 3), p->priv); - found |= 2; - qfound++; + for (i = 0; i < 4; i += 2) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outw && !p->outl) { + p->outw(port + i, val >> (i << 3), p->priv); + found |= 2; + qfound++; + } + p = q; } - p = q; } - } - for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while (p) { - q = p->next; - if (p->outb && !p->outw && !p->outl) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; + for (i = 0; i < 4; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw && !p->outl) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } } diff --git a/src/ioapic.c b/src/ioapic.c index 1fed64220..c3939f249 100644 --- a/src/ioapic.c +++ b/src/ioapic.c @@ -27,8 +27,9 @@ #include <86box/machine.h> #include <86box/mem.h> #include <86box/chipset.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct ioapic_t { uint8_t dummy; } ioapic_t; @@ -51,7 +52,7 @@ ioapic_log(const char *fmt, ...) #endif static void -ioapic_write(uint16_t port, uint8_t val, void *priv) +ioapic_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { uint32_t pcmp; @@ -83,8 +84,9 @@ ioapic_write(uint16_t port, uint8_t val, void *priv) } static void -ioapic_reset(ioapic_t *dev) +ioapic_reset(UNUSED(ioapic_t *dev)) { + // } static void @@ -99,7 +101,7 @@ ioapic_close(void *priv) } static void * -ioapic_init(const device_t *info) +ioapic_init(UNUSED(const device_t *info)) { ioapic_t *dev = (ioapic_t *) malloc(sizeof(ioapic_t)); memset(dev, 0, sizeof(ioapic_t)); diff --git a/src/log.c b/src/log.c index 02bb6132e..b5267d70b 100644 --- a/src/log.c +++ b/src/log.c @@ -35,10 +35,11 @@ #include <86box/log.h> #ifndef RELEASE_BUILD -typedef struct -{ - char buff[1024], *dev_name; - int seen, suppr_seen; +typedef struct log_t { + char buff[1024]; + char *dev_name; + int seen; + int suppr_seen; } log_t; extern FILE *stdlog; /* file to log output to */ diff --git a/src/lpt.c b/src/lpt.c index f4d2ad67c..f4fc7192f 100644 --- a/src/lpt.c +++ b/src/lpt.c @@ -124,6 +124,9 @@ lpt_write(uint16_t port, uint8_t val, void *priv) dev->ctrl = val; dev->enable_irq = val & 0x10; break; + + default: + break; } } @@ -154,6 +157,9 @@ lpt_read(uint16_t port, void *priv) else ret = 0xe0 | dev->ctrl | dev->enable_irq; break; + + default: + break; } return ret; diff --git a/src/machine/m_at.c b/src/machine/m_at.c index 92f8c0f5f..9fc53ebcd 100644 --- a/src/machine/m_at.c +++ b/src/machine/m_at.c @@ -246,7 +246,14 @@ machine_at_siemens_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_ibm_common_init(model); + machine_at_common_init_ex(model, 1); + + device_add(&keyboard_at_siemens_device); + + mem_remap_top(384); + + if (fdc_type == FDC_INTERNAL) + device_add(&fdc_at_device); return ret; } diff --git a/src/machine/m_at_compaq.c b/src/machine/m_at_compaq.c index dd8370a4f..3676a9d92 100644 --- a/src/machine/m_at_compaq.c +++ b/src/machine/m_at_compaq.c @@ -31,6 +31,7 @@ #include <86box/mem.h> #include <86box/rom.h> #include <86box/device.h> +#include <86box/keyboard.h> #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> @@ -41,22 +42,28 @@ #include <86box/vid_cga.h> #include <86box/vid_cga_comp.h> + +static video_timings_t timing_compaq_plasma = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; + enum { COMPAQ_PORTABLEII = 0, COMPAQ_PORTABLEIII, COMPAQ_PORTABLEIII386, - COMPAQ_DESKPRO386 + COMPAQ_DESKPRO386, + COMPAQ_DESKPRO386_01_1988 }; #define CGA_RGB 0 #define CGA_COMPOSITE 1 -#define COMPOSITE_OLD 0 -#define COMPOSITE_NEW 1 - /*Very rough estimate*/ #define VID_CLOCK (double) (651 * 416 * 60) +static uint8_t cga_crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + /* Mapping of attributes to colours */ static uint32_t amber; static uint32_t black; @@ -72,6 +79,8 @@ static uint32_t normcols[256][2]; */ static int8_t cpq_st_display_internal = -1; +static uint8_t mdaattr[256][2][2]; + static void compaq_plasma_display_set(uint8_t internal) { @@ -85,21 +94,13 @@ compaq_plasma_display_get(void) } typedef struct compaq_plasma_t { - mem_mapping_t plasma_mapping; cga_t cga; uint8_t port_23c6; uint8_t internal_monitor; - uint8_t attrmap; /* Attribute mapping register */ - int linepos, displine; - uint8_t *vram; - uint64_t dispontime, dispofftime; - int dispon, fullchange; + uint8_t attrmap; } compaq_plasma_t; -static uint8_t cga_crtcmask[32] = { - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; +static int compaq_machine_type = 0; /* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */ static mem_mapping_t ram_mapping; @@ -121,8 +122,18 @@ compaq_plasma_recalctimings(compaq_plasma_t *self) disptime = 651; _dispontime = 640; _dispofftime = disptime - _dispontime; - self->dispontime = (uint64_t) (_dispontime * (cpuclock / VID_CLOCK) * (double) (1ULL << 32)); - self->dispofftime = (uint64_t) (_dispofftime * (cpuclock / VID_CLOCK) * (double) (1ULL << 32)); + self->cga.dispontime = (uint64_t) (_dispontime * (cpuclock / VID_CLOCK) * (double) (1ULL << 32)); + self->cga.dispofftime = (uint64_t) (_dispofftime * (cpuclock / VID_CLOCK) * (double) (1ULL << 32)); +} + +static void +compaq_plasma_waitstates(void *p) +{ + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; + int ws; + + ws = ws_array[cycles & 0xf]; + sub_cycles(ws); } static void @@ -130,7 +141,8 @@ compaq_plasma_write(uint32_t addr, uint8_t val, void *priv) { compaq_plasma_t *self = (compaq_plasma_t *) priv; - self->vram[addr & 0x7fff] = val; + self->cga.vram[addr & 0x7fff] = val; + compaq_plasma_waitstates(&self->cga); } static uint8_t @@ -139,206 +151,12 @@ compaq_plasma_read(uint32_t addr, void *priv) compaq_plasma_t *self = (compaq_plasma_t *) priv; uint8_t ret; - ret = (self->vram[addr & 0x7fff]); + compaq_plasma_waitstates(&self->cga); + ret = (self->cga.vram[addr & 0x7fff]); return ret; } -/* Draw a row of text in 80-column mode */ -static void -compaq_plasma_text80(compaq_plasma_t *self) -{ - uint32_t cols[2]; - int c; - uint8_t chr; - uint8_t attr; - int drawcursor; - int cursorline; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; - - sc = (self->displine) & 15; - addr = ((ma & ~1) + (self->displine >> 4) * 80) * 2; - ma += (self->displine >> 4) * 80; - - if ((self->cga.crtc[10] & 0x60) == 0x20) - cursorline = 0; - else - cursorline = ((self->cga.crtc[10] & 0x0F) * 2 <= sc) && ((self->cga.crtc[11] & 0x0F) * 2 >= sc); - - for (uint8_t x = 0; x < 80; x++) { - chr = self->vram[(addr + 2 * x) & 0x7FFF]; - attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); - - blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - - if (self->cga.cgamode & 0x20) { /* Blink */ - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) - cols[1] = cols[0]; - } else { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) { - for (c = 0; c < 8; c++) - ((uint32_t *) buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } else { - for (c = 0; c < 8; c++) - ((uint32_t *) buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - ++ma; - } -} - -/* Draw a row of text in 40-column mode */ -static void -compaq_plasma_text40(compaq_plasma_t *self) -{ - uint32_t cols[2]; - int c; - uint8_t chr; - uint8_t attr; - int drawcursor; - int cursorline; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; - - sc = (self->displine) & 15; - addr = ((ma & ~1) + (self->displine >> 4) * 40) * 2; - ma += (self->displine >> 4) * 40; - - if ((self->cga.crtc[10] & 0x60) == 0x20) - cursorline = 0; - else - cursorline = ((self->cga.crtc[10] & 0x0F) * 2 <= sc) && ((self->cga.crtc[11] & 0x0F) * 2 >= sc); - - for (uint8_t x = 0; x < 40; x++) { - chr = self->vram[(addr + 2 * x) & 0x7FFF]; - attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); - - blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - - if (self->cga.cgamode & 0x20) { /* Blink */ - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) - cols[1] = cols[0]; - } else { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) { - for (c = 0; c < 8; c++) { - ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } - } else { - for (c = 0; c < 8; c++) { - ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ++ma; - } -} - -/* Draw a line in CGA 640x200 or Compaq Plasma 640x400 mode */ -static void -compaq_plasma_cgaline6(compaq_plasma_t *self) -{ - uint8_t dat; - uint32_t ink = 0; - uint16_t addr; - uint32_t fg = (self->cga.cgacol & 0x0F) ? amber : black; - uint32_t bg = black; - - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - - if ((self->cga.crtc[9] == 3) || (self->port_23c6 & 1)) /* 640*400 */ { - addr = ((self->displine) & 1) * 0x2000 + ((self->displine >> 1) & 1) * 0x4000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); - } else { - addr = ((self->displine >> 1) & 1) * 0x2000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); - } - for (uint8_t x = 0; x < 80; x++) { - dat = self->vram[addr & 0x7FFF]; - addr++; - - for (uint8_t c = 0; c < 8; c++) { - ink = (dat & 0x80) ? fg : bg; - if (!(self->cga.cgamode & 8)) - ink = black; - ((uint32_t *) buffer32->line[self->displine])[x * 8 + c] = ink; - dat <<= 1; - } - } -} - -/* Draw a line in CGA 320x200 mode. Here the CGA colours are converted to - * dither patterns: colour 1 to 25% grey, colour 2 to 50% grey */ -static void -compaq_plasma_cgaline4(compaq_plasma_t *self) -{ - uint8_t dat; - uint8_t pattern; - uint32_t ink0 = 0; - uint32_t ink1 = 0; - uint16_t addr; - - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - - /* 320*200 */ - addr = ((self->displine >> 1) & 1) * 0x2000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); - - for (uint8_t x = 0; x < 80; x++) { - dat = self->vram[addr & 0x7FFF]; - addr++; - - for (uint8_t c = 0; c < 4; c++) { - pattern = (dat & 0xC0) >> 6; - if (!(self->cga.cgamode & 8)) - pattern = 0; - - switch (pattern & 3) { - case 0: - ink0 = ink1 = black; - break; - case 1: - if (self->displine & 1) { - ink0 = black; - ink1 = black; - } else { - ink0 = amber; - ink1 = black; - } - break; - case 2: - if (self->displine & 1) { - ink0 = black; - ink1 = amber; - } else { - ink0 = amber; - ink1 = black; - } - break; - case 3: - ink0 = ink1 = amber; - break; - } - ((uint32_t *) buffer32->line[self->displine])[x * 8 + 2 * c] = ink0; - ((uint32_t *) buffer32->line[self->displine])[x * 8 + 2 * c + 1] = ink1; - dat <<= 2; - } - } -} - static void compaq_plasma_out(uint16_t addr, uint8_t val, void *priv) { @@ -348,7 +166,7 @@ compaq_plasma_out(uint16_t addr, uint8_t val, void *priv) switch (addr) { /* Emulated CRTC, register select */ case 0x3d4: - self->cga.crtcreg = val & 31; + cga_out(addr, val, &self->cga); break; /* Emulated CRTC, value */ @@ -366,33 +184,26 @@ compaq_plasma_out(uint16_t addr, uint8_t val, void *priv) if (old != val) { if (self->cga.crtcreg < 0xe || self->cga.crtcreg > 0x10) { - self->fullchange = changeframecount; + self->cga.fullchange = changeframecount; compaq_plasma_recalctimings(self); } } break; - case 0x3d8: - self->cga.cgamode = val; - break; - case 0x3d9: - self->cga.cgacol = val; + cga_out(addr, val, &self->cga); break; case 0x13c6: - if (val & 8) - compaq_plasma_display_set(1); - else - compaq_plasma_display_set(0); + compaq_plasma_display_set((val & 8) ? 1 : 0); break; case 0x23c6: self->port_23c6 = val; if (val & 8) /* Disable internal CGA */ - mem_mapping_disable(&self->plasma_mapping); + mem_mapping_disable(&self->cga.mapping); else - mem_mapping_enable(&self->plasma_mapping); + mem_mapping_enable(&self->cga.mapping); break; } } @@ -405,31 +216,38 @@ compaq_plasma_in(uint16_t addr, void *priv) switch (addr) { case 0x3d4: - ret = self->cga.crtcreg; + case 0x3da: + ret = cga_in(addr, &self->cga); break; case 0x3d5: if (self->cga.crtcreg == 0x12) { - ret = self->attrmap & 0x0F; + ret = self->attrmap & 0x0f; if (self->internal_monitor) ret |= 0x30; /* Plasma / CRT */ } else - ret = self->cga.crtc[self->cga.crtcreg]; - break; - - case 0x3da: - ret = self->cga.cgastat; + ret = cga_in(addr, &self->cga); break; case 0x13c6: - if (compaq_plasma_display_get()) - ret = 8; - else - ret = 0; + ret = compaq_plasma_display_get() ? 8 : 0; + ret |= 4; + break; + + case 0x1bc6: + ret = 0; + if (compaq_plasma_display_get()) { + if ((self->cga.cgamode & 0x12) == 0x12) { + if (self->port_23c6 & 8) + ret |= 0x40; + else + ret |= 0x20; + } + } break; case 0x23c6: - ret = self->port_23c6; + ret = 0; break; } @@ -440,56 +258,242 @@ static void compaq_plasma_poll(void *p) { compaq_plasma_t *self = (compaq_plasma_t *) p; + uint8_t chr, attr; + uint8_t sc; + uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; + uint16_t addr; + int drawcursor; + int x, c; + int cursorline; + int blink = 0; + int underline = 0; + uint32_t ink = 0; + uint32_t fg = (self->cga.cgacol & 0x0f) ? amber : black; + uint32_t bg = black; + uint32_t cols[2]; + uint8_t dat2, pattern; + uint32_t ink0 = 0, ink1 = 0; /* Switch between internal plasma and external CRT display. */ - if (cpq_st_display_internal != -1 && cpq_st_display_internal != self->internal_monitor) { + if ((cpq_st_display_internal != -1) && (cpq_st_display_internal != self->internal_monitor)) { self->internal_monitor = cpq_st_display_internal; compaq_plasma_recalctimings(self); } + /* graphic mode and not mode 40h */ if (!self->internal_monitor && !(self->port_23c6 & 1)) { cga_poll(&self->cga); return; } - if (!self->linepos) { - timer_advance_u64(&self->cga.timer, self->dispofftime); + /* mode 40h or text mode */ + if (!self->cga.linepos) { + timer_advance_u64(&self->cga.timer, self->cga.dispofftime); self->cga.cgastat |= 1; - self->linepos = 1; - if (self->dispon) { - if (self->displine == 0) + self->cga.linepos = 1; + if (self->cga.cgadispon) { + if (self->cga.displine == 0) { video_wait_for_buffer(); + } + if (self->cga.cgamode & 2) { + if (self->cga.cgamode & 0x10) { + /* 640x400 mode */ + if (self->port_23c6 & 1) /* 640*400 */ { + addr = ((self->cga.displine) & 1) * 0x2000 + ((self->cga.displine >> 1) & 1) * 0x4000 + (self->cga.displine >> 2) * 80 + ((ma & ~1) << 1); + } else { + addr = ((self->cga.displine >> 1) & 1) * 0x2000 + (self->cga.displine >> 2) * 80 + ((ma & ~1) << 1); + } + for (x = 0; x < 80; x++) { + dat2 = self->cga.vram[(addr & 0x7FFF)]; + addr++; - /* Graphics */ - if (self->cga.cgamode & 0x02) { - if (self->cga.cgamode & 0x10) - compaq_plasma_cgaline6(self); + for (c = 0; c < 8; c++) { + ink = (dat2 & 0x80) ? fg : bg; + if (!(self->cga.cgamode & 8)) + ink = black; + ((uint32_t *) buffer32->line[self->cga.displine])[x * 8 + c] = ink; + dat2 <<= 1; + } + } + } else { + addr = ((self->cga.displine >> 1) & 1) * 0x2000 + (self->cga.displine >> 2) * 80 + ((ma & ~1) << 1); + for (x = 0; x < 80; x++) { + dat2 = self->cga.vram[(addr & 0x7fff)]; + addr++; + + for (c = 0; c < 4; c++) { + pattern = (dat2 & 0xC0) >> 6; + if (!(self->cga.cgamode & 8)) + pattern = 0; + + switch (pattern & 3) { + case 0: + ink0 = ink1 = black; + break; + case 1: + if (self->cga.displine & 1) { + ink0 = black; + ink1 = black; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 2: + if (self->cga.displine & 1) { + ink0 = black; + ink1 = amber; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 3: + ink0 = ink1 = amber; + break; + } + buffer32->line[self->cga.displine][x * 8 + 2 * c] = ink0; + buffer32->line[self->cga.displine][x * 8 + 2 * c + 1] = ink1; + dat2 <<= 2; + } + } + } + } else if (self->cga.cgamode & 1) { + /* 80-col */ + sc = self->cga.displine & 0x0f; + addr = ((ma & ~1) + (self->cga.displine >> 4) * 80) * 2; + ma += (self->cga.displine >> 4) * 80; + + if ((self->cga.crtc[0x0a] & 0x60) == 0x20) + cursorline = 0; else - compaq_plasma_cgaline4(self); - } else if (self->cga.cgamode & 0x01) /* High-res text */ - compaq_plasma_text80(self); - else - compaq_plasma_text40(self); + cursorline = ((self->cga.crtc[0x0a] & 0x0f) * 2 <= sc) && ((self->cga.crtc[0x0b] & 0x0F) * 2 >= sc); + + /* for each text column */ + for (x = 0; x < 80; x++) { + /* video output enabled */ + if (self->cga.cgamode & 8) { + chr = self->cga.vram[(addr + 2 * x) & 0x7fff]; + attr = self->cga.vram[(addr + 2 * x + 1) & 0x7fff]; + } else + chr = attr = 0; + /* check if cursor has to be drawn */ + drawcursor = ((ma == ca) && cursorline && self->cga.cursoron); + underline = ((self->port_23c6 & 0x40) && (attr & 0x1) && !(attr & 0x6)); + if (underline) { + /* set forecolor to white */ + attr |= 7; + } + blink = 0; + /* blink active */ + if (self->cga.cgamode & 0x20) { + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + /* attribute 7 active and not cursor */ + if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + blink = 1; + } + } else { + /* Set intensity bit */ + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + blink = (attr & 0x80) * 8 + 7 + 16; + } + /* character underline active and 7th row of pixels in character height being drawn */ + if (underline && (sc == 7)) { + /* for each pixel in character width */ + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c] = cols[(fontdatm[chr + self->cga.fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } else { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c] = cols[(fontdatm[chr + self->cga.fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + + ++ma; + } + } else { /* 40-col */ + sc = self->cga.displine & 0x0f; + addr = ((ma & ~1) + (self->cga.displine >> 4) * 40) * 2; + ma += (self->cga.displine >> 4) * 40; + + if ((self->cga.crtc[0x0a] & 0x60) == 0x20) + cursorline = 0; + else + cursorline = ((self->cga.crtc[0x0a] & 0x0f) * 2 <= sc) && ((self->cga.crtc[0x0b] & 0x0F) * 2 >= sc); + + for (x = 0; x < 40; x++) { + if (self->cga.cgamode & 8) { + chr = self->cga.vram[(addr + 2 * x) & 0x7fff]; + attr = self->cga.vram[(addr + 2 * x + 1) & 0x7fff]; + } else { + chr = attr = 0; + } + drawcursor = ((ma == ca) && cursorline && self->cga.cursoron); + underline = ((self->port_23c6 & 0x40) && (attr & 0x1) && !(attr & 0x6)); + if (underline) { + /* set forecolor to white */ + attr |= 7; + } + blink = 0; + /* blink active */ + if (self->cga.cgamode & 0x20) { + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + /* attribute 7 active and not cursor */ + if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + blink = 1; + } + } else { + /* Set intensity bit */ + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + blink = (attr & 0x80) * 8 + 7 + 16; + } + /* character underline active and 7th row of pixels in character height being drawn */ + if (underline && (sc == 7)) { + /* for each pixel in character width */ + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 4) + (c * 2)] = buffer32->line[self->cga.displine][(x << 4) + (c * 2) + 1] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[self->cga.displine][(x << 4) + c * 2] = buffer32->line[self->cga.displine][(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[self->cga.displine][(x << 4) + c * 2] = buffer32->line[self->cga.displine][(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ++ma; + } + } } - self->displine++; + self->cga.displine++; /* Hardcode a fixed refresh rate and VSYNC timing */ - if (self->displine == 400) { /* Start of VSYNC */ + if (self->cga.displine == 400) { /* Start of VSYNC */ self->cga.cgastat |= 8; - self->dispon = 0; + self->cga.cgadispon = 0; } - if (self->displine == 416) { /* End of VSYNC */ - self->displine = 0; + if (self->cga.displine == 416) { /* End of VSYNC */ + self->cga.displine = 0; self->cga.cgastat &= ~8; - self->dispon = 1; + self->cga.cgadispon = 1; } } else { - if (self->dispon) + if (self->cga.cgadispon) self->cga.cgastat &= ~1; - timer_advance_u64(&self->cga.timer, self->dispontime); - self->linepos = 0; + timer_advance_u64(&self->cga.timer, self->cga.dispontime); + self->cga.linepos = 0; - if (self->displine == 400) { + if (self->cga.displine == 400) { /* Hardcode 640x400 window size */ if ((640 != xsize) || (400 != ysize) || video_force_resize_get()) { xsize = 640; @@ -515,14 +519,41 @@ compaq_plasma_poll(void *p) video_bpp = 1; else video_bpp = 2; - } else video_bpp = 0; + self->cga.cgablink++; } } } +static void +compaq_plasma_mdaattr_rebuild(void) +{ + int c; + + for (c = 0; c < 256; c++) { + mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = 16; + if (c & 8) + mdaattr[c][0][1] = 15 + 16; + else + mdaattr[c][0][1] = 7 + 16; + } + + mdaattr[0x70][0][1] = 16; + mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = 16 + 15; + mdaattr[0xF0][0][1] = 16; + mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = 16 + 15; + mdaattr[0x78][0][1] = 16 + 7; + mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = 16 + 15; + mdaattr[0xF8][0][1] = 16 + 7; + mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = 16 + 15; + mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = 16; + mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = 16; + mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = 16; + mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = 16; +} + static void compaq_plasma_recalcattrs(compaq_plasma_t *self) { @@ -537,10 +568,10 @@ compaq_plasma_recalcattrs(compaq_plasma_t *self) * are bold */ /* Set up colours */ - amber = makecol(0xff, 0x7D, 0x00); - black = makecol(0x64, 0x19, 0x00); + amber = makecol(0xff, 0x7d, 0x00); + black = makecol(0x64, 0x0c, 0x00); - /* Initialise the attribute mapping. Start by defaulting everything + /* Initialize the attribute mapping. Start by defaulting everything * to black on amber, and with bold set by bit 3 */ for (n = 0; n < 256; n++) { blinkcols[n][0] = normcols[n][0] = amber; @@ -607,36 +638,37 @@ compaq_plasma_recalcattrs(compaq_plasma_t *self) static void * compaq_plasma_init(const device_t *info) { - int display_type; compaq_plasma_t *self = malloc(sizeof(compaq_plasma_t)); memset(self, 0, sizeof(compaq_plasma_t)); - display_type = device_get_config_int("display_type"); - self->cga.composite = (display_type != CGA_RGB); - self->cga.revision = device_get_config_int("composite_type"); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_compaq_plasma); + loadfont_ex("roms/machines/portableiii/K Combined.bin", 1, 0x4bb2); - self->vram = malloc(0x8000); + self->cga.composite = 0; + self->cga.revision = 0; + + self->cga.vram = malloc(0x8000); self->internal_monitor = 1; cga_comp_init(self->cga.revision); timer_add(&self->cga.timer, compaq_plasma_poll, self, 1); - mem_mapping_add(&self->plasma_mapping, 0xb8000, 0x08000, compaq_plasma_read, NULL, NULL, compaq_plasma_write, NULL, NULL, NULL /*self->cga.vram*/, MEM_MAPPING_EXTERNAL, self); + mem_mapping_add(&self->cga.mapping, 0xb8000, 0x08000, compaq_plasma_read, NULL, NULL, compaq_plasma_write, NULL, NULL, NULL /*self->cga.vram*/, MEM_MAPPING_EXTERNAL, self); io_sethandler(0x03d0, 0x0010, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); io_sethandler(0x13c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); + io_sethandler(0x1bc6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); io_sethandler(0x23c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); /* Default attribute mapping is 4 */ self->attrmap = 4; compaq_plasma_recalcattrs(self); - self->cga.cgastat = 0xF4; - self->cga.vram = self->vram; - + self->cga.cgastat = 0xf4; overscan_x = overscan_y = 16; self->cga.rgb_type = device_get_config_int("rgb_type"); cga_palette = (self->cga.rgb_type << 1); cgapal_rebuild(); + compaq_plasma_mdaattr_rebuild(); return self; } @@ -646,8 +678,7 @@ compaq_plasma_close(void *p) { compaq_plasma_t *self = (compaq_plasma_t *) p; - free(self->vram); - + free(self->cga.vram); free(self); } @@ -661,38 +692,10 @@ compaq_plasma_speed_changed(void *p) const device_config_t compaq_plasma_config[] = { // clang-format off - { - .name = "display_type", - .description = "Display type", - .type = CONFIG_SELECTION, - .default_string = "", - .default_int = CGA_RGB, - .file_filter = "", - .spinner = { 0 }, - .selection = { - { .description = "RGB", .value = CGA_RGB }, - { .description = "Composite", .value = CGA_COMPOSITE }, - { .description = "" } - } - }, - { - .name = "composite_type", - .description = "Composite type", - .type = CONFIG_SELECTION, - .default_string = "", - .default_int = COMPOSITE_OLD, - .file_filter = "", - .spinner = { 0 }, - { - { .description = "Old", .value = COMPOSITE_OLD }, - { .description = "New", .value = COMPOSITE_NEW }, - { .description = "" } - } - }, { .name = "rgb_type", - .description = "RGB type", - .type = CONFIG_SELECTION, + .description = "RGB type", + .type = CONFIG_SELECTION, .default_string = "", .default_int = 0, .file_filter = "", @@ -702,7 +705,6 @@ const device_config_t compaq_plasma_config[] = { { .description = "Green Monochrome", .value = 1 }, { .description = "Amber Monochrome", .value = 2 }, { .description = "Gray Monochrome", .value = 3 }, - { .description = "Color (no brown)", .value = 4 }, { .description = "" } } }, @@ -781,26 +783,36 @@ write_raml(uint32_t addr, uint32_t val, void *priv) static void machine_at_compaq_init(const machine_t *model, int type) { - if (type != COMPAQ_DESKPRO386) + compaq_machine_type = type; + + if ((type != COMPAQ_DESKPRO386) && (type != COMPAQ_DESKPRO386_01_1988)) mem_remap_top(384); if (fdc_type == FDC_INTERNAL) device_add(&fdc_at_device); - mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000, - read_ram, read_ramw, read_raml, - write_ram, write_ramw, write_raml, - 0xa0000 + ram, MEM_MAPPING_INTERNAL, NULL); + if ((type == COMPAQ_DESKPRO386) || (type == COMPAQ_DESKPRO386_01_1988) || (type == COMPAQ_PORTABLEIII386)) + mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000, + read_ram, read_ramw, read_raml, + write_ram, write_ramw, write_raml, + 0xa0000 + ram, MEM_MAPPING_EXTERNAL, NULL); + else + mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000, + read_ram, read_ramw, read_raml, + write_ram, write_ramw, write_raml, + 0xa0000 + ram, MEM_MAPPING_INTERNAL, NULL); video_reset(gfxcard[0]); switch (type) { case COMPAQ_PORTABLEII: + machine_at_init(model); break; case COMPAQ_PORTABLEIII: if (gfxcard[0] == VID_INTERNAL) device_add(&compaq_plasma_device); + machine_at_init(model); break; case COMPAQ_PORTABLEIII386: @@ -808,15 +820,17 @@ machine_at_compaq_init(const machine_t *model, int type) device_add(&ide_isa_device); if (gfxcard[0] == VID_INTERNAL) device_add(&compaq_plasma_device); + machine_at_init(model); break; case COMPAQ_DESKPRO386: + case COMPAQ_DESKPRO386_01_1988: if (hdc_current == 1) device_add(&ide_isa_device); + machine_at_common_init(model); + device_add(&keyboard_at_compaq_device); break; } - - machine_at_init(model); } int @@ -841,9 +855,9 @@ machine_at_portableiii_init(const machine_t *model) { int ret; - ret = bios_load_interleavedr("roms/machines/portableiii/Compaq Portable III - BIOS - 106779-002 - Even.bin", - "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", - 0x000f8000, 65536, 0); + ret = bios_load_linearr("roms/machines/portableiii/K Combined.bin", + 0x000f8000, 65536, 0); + if (bios_only || !ret) return ret; @@ -858,9 +872,8 @@ machine_at_portableiii386_init(const machine_t *model) { int ret; - ret = bios_load_interleavedr("roms/machines/portableiii/Compaq Portable III - BIOS - 106779-002 - Even.bin", - "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", - 0x000f8000, 65536, 0); + ret = bios_load_linearr("roms/machines/portableiii/K Combined.bin", + 0x000f8000, 65536, 0); if (bios_only || !ret) return ret; @@ -870,14 +883,13 @@ machine_at_portableiii386_init(const machine_t *model) return ret; } -#if defined(DEV_BRANCH) && defined(USE_DESKPRO386) int machine_at_deskpro386_init(const machine_t *model) { int ret; ret = bios_load_linearr("roms/machines/deskpro386/1986-09-04-HI.json.bin", - 0x000fc000, 65536, 0); + 0x000f8000, 65536, 0); if (bios_only || !ret) return ret; @@ -886,4 +898,19 @@ machine_at_deskpro386_init(const machine_t *model) return ret; } -#endif + +int +machine_at_deskpro386_01_1988_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linearr("roms/machines/deskpro386/1988-01-28.json.bin", + 0x000f8000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_at_compaq_init(model, COMPAQ_DESKPRO386_01_1988); + + return ret; +} diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index 3cedb669a..f13fe72cd 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -200,8 +200,8 @@ machine_at_p2bls_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); /* SCSI */ - pci_register_slot(0x07, PCI_CARD_NORMAL, 3, 4, 1, 2); /* LAN */ + pci_register_slot(0x06, PCI_CARD_SCSI, 4, 1, 2, 3); + pci_register_slot(0x07, PCI_CARD_NETWORK, 3, 4, 1, 2); pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3); diff --git a/src/machine/machine.c b/src/machine/machine.c index 893700c7e..d48cbdf21 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -41,6 +41,7 @@ #include <86box/video.h> #include <86box/machine.h> #include <86box/isamem.h> +#include <86box/pci.h> int bios_only = 0; int machine; @@ -103,6 +104,8 @@ machine_init_ex(int m) /* Reset the fast off stuff. */ cpu_fast_off_reset(); + + pci_take_over_io = 0x00000000; } /* All good, boot the machine! */ diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index ea5d06a70..b9945b865 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -2587,8 +2587,8 @@ const machine_t machines[] = { .cpu = { .package = CPU_PKG_286, .block = CPU_BLOCK_NONE, - .min_bus = 6000000, - .max_bus = 8000000, + .min_bus = 0, + .max_bus = 0, .min_voltage = 0, .max_voltage = 0, .min_multi = 0, @@ -2904,8 +2904,8 @@ const machine_t machines[] = { .cpu = { .package = CPU_PKG_286, .block = CPU_BLOCK_NONE, - .min_bus = 6000000, - .max_bus = 8000000, + .min_bus = 0, + .max_bus = 0, .min_voltage = 0, .max_voltage = 0, .min_multi = 0, @@ -2943,8 +2943,8 @@ const machine_t machines[] = { .cpu = { .package = CPU_PKG_286, .block = CPU_BLOCK_NONE, - .min_bus = 6000000, - .max_bus = 8000000, + .min_bus = 0, + .max_bus = 0, .min_voltage = 0, .max_voltage = 0, .min_multi = 0, @@ -4670,9 +4670,8 @@ const machine_t machines[] = { .net_device = NULL }, /* Uses Compaq KBC firmware. */ -#if defined(DEV_BRANCH) && defined(USE_DESKPRO386) { - .name = "[ISA] Compaq Deskpro 386", + .name = "[ISA] Compaq Deskpro 386 (September 1986)", .internal_name = "deskpro386", .type = MACHINE_TYPE_386DX, .chipset = MACHINE_CHIPSET_DISCRETE, @@ -4692,13 +4691,51 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_AT, - .flags = MACHINE_IDE | MACHINE_APM, + .flags = MACHINE_IDE, .ram = { - .min = 1024, - .max = 14336, - .step = 1024 + .min = 640, + .max = 16384, + .step = 128 }, - .nvrmask = 127, + .nvrmask = 63, + .kbc_device = NULL, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .fdc_device = NULL, + .sio_device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, + { + .name = "[ISA] Compaq Deskpro 386 (January 1988)", + .internal_name = "deskpro386_01_1988", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_deskpro386_01_1988_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 640, + .max = 16384, + .step = 128 + }, + .nvrmask = 63, .kbc_device = NULL, .kbc_p1 = 0, .gpio = 0, @@ -4709,7 +4746,6 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, -#endif /* defined(DEV_BRANCH) && defined(USE_DESKPRO386) */ { .name = "[ISA] Compaq Portable III (386)", .internal_name = "portableiii386", @@ -4731,7 +4767,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_AT, - .flags = MACHINE_IDE | MACHINE_VIDEO | MACHINE_APM, + .flags = MACHINE_IDE | MACHINE_VIDEO, .ram = { .min = 1024, .max = 14336, @@ -5492,7 +5528,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2_MCA, - .flags = MACHINE_VIDEO, + .flags = MACHINE_VIDEO | MACHINE_SOFTFLOAT_ONLY, .ram = { .min = 2048, .max = 65536, @@ -6799,7 +6835,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PCI, + .bus_flags = MACHINE_BUS_PS2_LATCH | MACHINE_PCI, .flags = MACHINE_IDE_DUAL | MACHINE_APM, .ram = { .min = 1024, @@ -6877,7 +6913,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PCI, + .bus_flags = MACHINE_BUS_PS2_LATCH | MACHINE_PCI, .flags = MACHINE_IDE_DUAL | MACHINE_APM, .ram = { .min = 1024, diff --git a/src/mem/CMakeLists.txt b/src/mem/CMakeLists.txt index 6aad80544..001e7b5bc 100644 --- a/src/mem/CMakeLists.txt +++ b/src/mem/CMakeLists.txt @@ -14,4 +14,4 @@ # add_library(mem OBJECT catalyst_flash.c i2c_eeprom.c intel_flash.c mem.c rom.c - smram.c spd.c sst_flash.c) + row.c smram.c spd.c sst_flash.c) diff --git a/src/mem/catalyst_flash.c b/src/mem/catalyst_flash.c index 5e473f540..46294a60a 100644 --- a/src/mem/catalyst_flash.c +++ b/src/mem/catalyst_flash.c @@ -55,19 +55,22 @@ enum { }; typedef struct flash_t { - uint8_t command, pad, - pad0, pad1, - *array; + uint8_t command; + uint8_t pad; + uint8_t pad0; + uint8_t pad1; + uint8_t *array; - mem_mapping_t mapping, mapping_h[2]; + mem_mapping_t mapping; + mem_mapping_t mapping_h[2]; } flash_t; static char flash_path[1024]; static uint8_t -flash_read(uint32_t addr, void *p) +flash_read(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint8_t ret = 0xff; addr &= biosmask; @@ -86,6 +89,9 @@ flash_read(uint32_t addr, void *p) else if (addr == 0x00001) ret = 0xB4; /* 28F010 */ break; + + default: + break; } return ret; @@ -141,13 +147,15 @@ flash_write(uint32_t addr, uint8_t val, void *p) } static void -flash_writew(uint32_t addr, uint16_t val, void *p) +flash_writew(UNUSED(uint32_t addr), UNUSED(uint16_t val), UNUSED(void *priv)) { + // } static void -flash_writel(uint32_t addr, uint32_t val, void *p) +flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv)) { + // } static void @@ -179,7 +187,7 @@ catalyst_flash_reset(void *priv) } static void * -catalyst_flash_init(const device_t *info) +catalyst_flash_init(UNUSED(const device_t *info)) { FILE *f; flash_t *dev; diff --git a/src/mem/i2c_eeprom.c b/src/mem/i2c_eeprom.c index e29d16139..7d83bbe88 100644 --- a/src/mem/i2c_eeprom.c +++ b/src/mem/i2c_eeprom.c @@ -23,13 +23,18 @@ #include #include <86box/86box.h> #include <86box/i2c.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct i2c_eeprom_t { void *i2c; - uint8_t addr, *data, writable; + uint8_t addr; + uint8_t *data; + uint8_t writable; - uint32_t addr_mask, addr_register; - uint8_t addr_len, addr_pos; + uint32_t addr_mask; + uint32_t addr_register; + uint8_t addr_len; + uint8_t addr_pos; } i2c_eeprom_t; #ifdef ENABLE_I2C_EEPROM_LOG @@ -51,7 +56,7 @@ i2c_eeprom_log(const char *fmt, ...) #endif static uint8_t -i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) +i2c_eeprom_start(UNUSED(void *bus), uint8_t addr, uint8_t read, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; @@ -66,7 +71,7 @@ i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -i2c_eeprom_read(void *bus, uint8_t addr, void *priv) +i2c_eeprom_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; uint8_t ret = dev->data[dev->addr_register]; @@ -79,7 +84,7 @@ i2c_eeprom_read(void *bus, uint8_t addr, void *priv) } static uint8_t -i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv) +i2c_eeprom_write(UNUSED(void *bus), uint8_t addr, uint8_t data, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; @@ -104,7 +109,7 @@ i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv) } static void -i2c_eeprom_stop(void *bus, uint8_t addr, void *priv) +i2c_eeprom_stop(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; diff --git a/src/mem/intel_flash.c b/src/mem/intel_flash.c index af7a71eea..ce529670e 100644 --- a/src/mem/intel_flash.c +++ b/src/mem/intel_flash.c @@ -58,25 +58,30 @@ enum { }; typedef struct flash_t { - uint8_t command, status, - pad, flags, - *array; + uint8_t command; + uint8_t status; + uint8_t pad; + uint8_t flags; + uint8_t *array; - uint16_t flash_id, pad16; + uint16_t flash_id; + uint16_t pad16; - uint32_t program_addr, - block_start[BLOCKS_NUM], block_end[BLOCKS_NUM], - block_len[BLOCKS_NUM]; + uint32_t program_addr; + uint32_t block_start[BLOCKS_NUM]; + uint32_t block_end[BLOCKS_NUM]; + uint32_t block_len[BLOCKS_NUM]; - mem_mapping_t mapping[4], mapping_h[16]; + mem_mapping_t mapping[4]; + mem_mapping_t mapping_h[16]; } flash_t; static char flash_path[1024]; static uint8_t -flash_read(uint32_t addr, void *p) +flash_read(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint8_t ret = 0xff; if (dev->flags & FLAG_INV_A16) @@ -84,8 +89,8 @@ flash_read(uint32_t addr, void *p) addr &= biosmask; switch (dev->command) { - case CMD_READ_ARRAY: default: + case CMD_READ_ARRAY: ret = dev->array[addr]; break; @@ -105,9 +110,9 @@ flash_read(uint32_t addr, void *p) } static uint16_t -flash_readw(uint32_t addr, void *p) +flash_readw(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint16_t *q; uint16_t ret = 0xffff; @@ -123,8 +128,8 @@ flash_readw(uint32_t addr, void *p) if (dev->flags & FLAG_WORD) switch (dev->command) { - case CMD_READ_ARRAY: default: + case CMD_READ_ARRAY: break; case CMD_IID: @@ -143,9 +148,9 @@ flash_readw(uint32_t addr, void *p) } static uint32_t -flash_readl(uint32_t addr, void *p) +flash_readl(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint32_t *q; if (dev->flags & FLAG_INV_A16) @@ -158,10 +163,9 @@ flash_readl(uint32_t addr, void *p) } static void -flash_write(uint32_t addr, uint8_t val, void *p) +flash_write(uint32_t addr, uint8_t val, void *priv) { - flash_t *dev = (flash_t *) p; - int i; + flash_t *dev = (flash_t *) priv; uint32_t bb_mask = biosmask & 0xffffe000; if (biosmask == 0x7ffff) bb_mask &= 0xffff8000; @@ -175,7 +179,7 @@ flash_write(uint32_t addr, uint8_t val, void *p) switch (dev->command) { case CMD_ERASE_SETUP: if (val == CMD_ERASE_CONFIRM) { - for (i = 0; i < 6; i++) { + for (uint8_t i = 0; i < 6; i++) { if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); } @@ -200,7 +204,7 @@ flash_write(uint32_t addr, uint8_t val, void *p) dev->status = 0; break; case CMD_ERASE_SETUP: - for (i = 0; i < 7; i++) { + for (uint8_t i = 0; i < 7; i++) { if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) dev->program_addr = i; } @@ -209,6 +213,9 @@ flash_write(uint32_t addr, uint8_t val, void *p) case CMD_PROGRAM_SETUP_ALT: dev->program_addr = addr; break; + + default: + break; } } } @@ -266,16 +273,19 @@ flash_writew(uint32_t addr, uint16_t val, void *p) case CMD_PROGRAM_SETUP_ALT: dev->program_addr = addr; break; + + default: + break; } } } static void -flash_writel(uint32_t addr, uint32_t val, void *p) +flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv)) { #if 0 - flash_writew(addr, val & 0xffff, p); - flash_writew(addr + 2, (val >> 16) & 0xffff, p); + flash_writew(addr, val & 0xffff, priv); + flash_writew(addr + 2, (val >> 16) & 0xffff, priv); #endif } @@ -522,10 +532,10 @@ intel_flash_init(const device_t *info) } static void -intel_flash_close(void *p) +intel_flash_close(void *priv) { FILE *f; - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; f = nvr_fopen(flash_path, "wb"); fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); diff --git a/src/mem/mem.c b/src/mem/mem.c index 3008e658c..b23ab3253 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -1776,7 +1776,7 @@ mem_write_phys(void *src, uint32_t addr, int transfer_size) } uint8_t -mem_read_ram(uint32_t addr, void *priv) +mem_read_ram(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1790,7 +1790,7 @@ mem_read_ram(uint32_t addr, void *priv) } uint16_t -mem_read_ramw(uint32_t addr, void *priv) +mem_read_ramw(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1804,7 +1804,7 @@ mem_read_ramw(uint32_t addr, void *priv) } uint32_t -mem_read_raml(uint32_t addr, void *priv) +mem_read_raml(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1818,7 +1818,7 @@ mem_read_raml(uint32_t addr, void *priv) } uint8_t -mem_read_ram_2gb(uint32_t addr, void *priv) +mem_read_ram_2gb(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1831,7 +1831,7 @@ mem_read_ram_2gb(uint32_t addr, void *priv) } uint16_t -mem_read_ram_2gbw(uint32_t addr, void *priv) +mem_read_ram_2gbw(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1844,7 +1844,7 @@ mem_read_ram_2gbw(uint32_t addr, void *priv) } uint32_t -mem_read_ram_2gbl(uint32_t addr, void *priv) +mem_read_ram_2gbl(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1858,71 +1858,71 @@ mem_read_ram_2gbl(uint32_t addr, void *priv) #ifdef USE_NEW_DYNAREC static inline int -page_index(page_t *p) +page_index(page_t *page) { - return ((uintptr_t) p - (uintptr_t) pages) / sizeof(page_t); + return ((uintptr_t) page - (uintptr_t) pages) / sizeof(page_t); } void -page_add_to_evict_list(page_t *p) +page_add_to_evict_list(page_t *page) { - pages[purgable_page_list_head].evict_prev = page_index(p); - p->evict_next = purgable_page_list_head; - p->evict_prev = 0; + pages[purgable_page_list_head].evict_prev = page_index(page); + page->evict_next = purgable_page_list_head; + page->evict_prev = 0; purgable_page_list_head = pages[purgable_page_list_head].evict_prev; purgeable_page_count++; } void -page_remove_from_evict_list(page_t *p) +page_remove_from_evict_list(page_t *page) { - if (!page_in_evict_list(p)) + if (!page_in_evict_list(page)) fatal("page_remove_from_evict_list: not in evict list!\n"); - if (p->evict_prev) - pages[p->evict_prev].evict_next = p->evict_next; + if (page->evict_prev) + pages[page->evict_prev].evict_next = page->evict_next; else - purgable_page_list_head = p->evict_next; - if (p->evict_next) - pages[p->evict_next].evict_prev = p->evict_prev; - p->evict_prev = EVICT_NOT_IN_LIST; + purgable_page_list_head = page->evict_next; + if (page->evict_next) + pages[page->evict_next].evict_prev = page->evict_prev; + page->evict_prev = EVICT_NOT_IN_LIST; purgeable_page_count--; } void -mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) +mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; uint64_t byte_mask = (uint64_t) 1 << (addr & PAGE_BYTE_MASK_MASK); - p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - p->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + if ((page->code_present_mask & mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); + page->byte_dirty_mask[byte_offset] |= byte_mask; + if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } void -mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) +mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; @@ -1930,34 +1930,34 @@ mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) if ((addr & 0xf) == 0xf) mask |= (mask << 1); - *(uint16_t *) &p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + *(uint16_t *) &page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + if ((page->code_present_mask & mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK) { - p->byte_dirty_mask[byte_offset + 1] |= 1; - if ((p->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->byte_dirty_mask[byte_offset + 1] |= 1; + if ((page->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } else byte_mask |= (byte_mask << 1); - p->byte_dirty_mask[byte_offset] |= byte_mask; + page->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } void -mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) +mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; @@ -1965,79 +1965,79 @@ mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) if ((addr & 0xf) >= 0xd) mask |= (mask << 1); - *(uint32_t *) &p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - p->byte_dirty_mask[byte_offset] |= byte_mask; - if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask))) - page_add_to_evict_list(p); + *(uint32_t *) &page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + page->byte_dirty_mask[byte_offset] |= byte_mask; + if (!page_in_evict_list(page) && ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask))) + page_add_to_evict_list(page); if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK - 3)) { uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3)); - p->byte_dirty_mask[byte_offset + 1] |= byte_mask_2; - if ((p->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->byte_dirty_mask[byte_offset + 1] |= byte_mask_2; + if ((page->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } } #else void -mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) +mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + page->mem[addr & 0xfff] = val; } } void -mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) +mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); if ((addr & 0xf) == 0xf) mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint16_t *) &p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint16_t *) &page->mem[addr & 0xfff] = val; } } void -mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) +mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); if ((addr & 0xf) >= 0xd) mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint32_t *) &p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint32_t *) &page->mem[addr & 0xfff] = val; } } #endif void -mem_write_ram(uint32_t addr, uint8_t val, void *priv) +mem_write_ram(uint32_t addr, uint8_t val, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -2065,7 +2065,7 @@ mem_write_ramw(uint32_t addr, uint16_t val, void *priv) } void -mem_write_raml(uint32_t addr, uint32_t val, void *priv) +mem_write_raml(uint32_t addr, uint32_t val, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -2079,7 +2079,7 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv) } static uint8_t -mem_read_remapped(uint32_t addr, void *priv) +mem_read_remapped(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2088,7 +2088,7 @@ mem_read_remapped(uint32_t addr, void *priv) } static uint16_t -mem_read_remappedw(uint32_t addr, void *priv) +mem_read_remappedw(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2097,7 +2097,7 @@ mem_read_remappedw(uint32_t addr, void *priv) } static uint32_t -mem_read_remappedl(uint32_t addr, void *priv) +mem_read_remappedl(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2106,7 +2106,7 @@ mem_read_remappedl(uint32_t addr, void *priv) } static uint8_t -mem_read_remapped2(uint32_t addr, void *priv) +mem_read_remapped2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2115,7 +2115,7 @@ mem_read_remapped2(uint32_t addr, void *priv) } static uint16_t -mem_read_remappedw2(uint32_t addr, void *priv) +mem_read_remappedw2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2124,7 +2124,7 @@ mem_read_remappedw2(uint32_t addr, void *priv) } static uint32_t -mem_read_remappedl2(uint32_t addr, void *priv) +mem_read_remappedl2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2133,7 +2133,7 @@ mem_read_remappedl2(uint32_t addr, void *priv) } static void -mem_write_remapped(uint32_t addr, uint8_t val, void *priv) +mem_write_remapped(uint32_t addr, uint8_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xA0000 + (addr - remap_start_addr); @@ -2157,7 +2157,7 @@ mem_write_remappedw(uint32_t addr, uint16_t val, void *priv) } static void -mem_write_remappedl(uint32_t addr, uint32_t val, void *priv) +mem_write_remappedl(uint32_t addr, uint32_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xA0000 + (addr - remap_start_addr); @@ -2169,7 +2169,7 @@ mem_write_remappedl(uint32_t addr, uint32_t val, void *priv) } static void -mem_write_remapped2(uint32_t addr, uint8_t val, void *priv) +mem_write_remapped2(uint32_t addr, uint8_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xD0000 + (addr - remap_start_addr2); @@ -2193,7 +2193,7 @@ mem_write_remappedw2(uint32_t addr, uint16_t val, void *priv) } static void -mem_write_remappedl2(uint32_t addr, uint32_t val, void *priv) +mem_write_remappedl2(uint32_t addr, uint32_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xD0000 + (addr - remap_start_addr2); @@ -2208,7 +2208,7 @@ void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) { #ifdef USE_NEW_DYNAREC - page_t *p; + page_t *page; start_addr &= ~PAGE_MASK_MASK; end_addr = (end_addr + PAGE_MASK_MASK) & ~PAGE_MASK_MASK; @@ -2217,15 +2217,15 @@ mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) if ((start_addr >> 12) >= pages_sz) continue; - p = &pages[start_addr >> 12]; - if (p) { - p->dirty_mask = 0xffffffffffffffffULL; + page = &pages[start_addr >> 12]; + if (page) { + page->dirty_mask = 0xffffffffffffffffULL; - if ((p->mem != page_ff) && p->byte_dirty_mask) - memset(p->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); + if ((page->mem != page_ff) && page->byte_dirty_mask) + memset(page->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); - if (!page_in_evict_list(p)) - page_add_to_evict_list(p); + if (!page_in_evict_list(page)) + page_add_to_evict_list(page); } } #else @@ -2598,7 +2598,9 @@ mem_a20_init(void) if (is6117) rammask |= 0x03000000; flushmmucache(); - // mem_a20_state = mem_a20_key | mem_a20_alt; +#if 0 + mem_a20_state = mem_a20_key | mem_a20_alt; +#endif } else { rammask = 0xfffff; flushmmucache(); diff --git a/src/mem/rom.c b/src/mem/rom.c index 80881c723..2ace87de7 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -384,7 +384,7 @@ rom_reset(uint32_t addr, int sz) } uint8_t -bios_read(uint32_t addr, void *priv) +bios_read(uint32_t addr, UNUSED(void *priv)) { uint8_t ret = 0xff; @@ -397,7 +397,7 @@ bios_read(uint32_t addr, void *priv) } uint16_t -bios_readw(uint32_t addr, void *priv) +bios_readw(uint32_t addr, UNUSED(void *priv)) { uint16_t ret = 0xffff; @@ -410,7 +410,7 @@ bios_readw(uint32_t addr, void *priv) } uint32_t -bios_readl(uint32_t addr, void *priv) +bios_readl(uint32_t addr, UNUSED(void *priv)) { uint32_t ret = 0xffffffff; @@ -442,7 +442,7 @@ bios_add(void) mem_mapping_add(&bios_mapping, 0xe0000, 0x20000, bios_read, bios_readw, bios_readl, NULL, NULL, NULL, - &rom[0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); + &rom[biosmask + 1 - 0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); mem_set_mem_state_both(0x0e0000, 0x20000, MEM_READ_ROMCS | MEM_WRITE_ROMCS); @@ -524,7 +524,7 @@ bios_load(const char *fn1, const char *fn2, uint32_t addr, int sz, int off, int } int -bios_load_linear_combined(const char *fn1, const char *fn2, int sz, int off) +bios_load_linear_combined(const char *fn1, const char *fn2, int sz, UNUSED(int off)) { uint8_t ret = 0; diff --git a/src/mem/row.c b/src/mem/row.c new file mode 100644 index 000000000..2152c1f54 --- /dev/null +++ b/src/mem/row.c @@ -0,0 +1,343 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * DRAM row handling. + * + * Authors: Miran Grca, + * + * Copyright 2016-2020 Miran Grca. + */ +#include +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include "x86_ops.h" +#include "x86.h" +#include <86box/config.h> +#include <86box/device.h> +#include <86box/io.h> +#include <86box/mem.h> +#include <86box/spd.h> +#include <86box/row.h> + + +/* 0 1 2 3 4 5 6 7 */ +static uint8_t rows_num, rows_default, + rows_bits; +static uint32_t row_unit; +static uint8_t drb_defaults[16]; +static row_t *rows; + + +static uint8_t +row_read(uint32_t addr, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addreadlookup(mem_logical_addr, new_addr); + + return dev->buf[new_addr]; +} + + +static uint16_t +row_readw(uint32_t addr, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addreadlookup(mem_logical_addr, new_addr); + + return *(uint16_t *) &(dev->buf[new_addr]); +} + + +static uint32_t +row_readl(uint32_t addr, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addreadlookup(mem_logical_addr, new_addr); + + return *(uint32_t *) &(dev->buf[new_addr]); +} + + +static void +row_write(uint32_t addr, uint8_t val, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addwritelookup(mem_logical_addr, new_addr); + mem_write_ramb_page(new_addr, val, &pages[addr >> 12]); +} + + +static void +row_writew(uint32_t addr, uint16_t val, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addwritelookup(mem_logical_addr, new_addr); + mem_write_ramw_page(new_addr, val, &pages[addr >> 12]); +} + + +static void +row_writel(uint32_t addr, uint32_t val, void *priv) +{ + row_t *dev = (row_t *) priv; + uint32_t new_addr = ((addr - dev->host_base) & dev->ram_mask) + dev->ram_base; + + addwritelookup(mem_logical_addr, new_addr); + mem_write_raml_page(new_addr, val, &pages[addr >> 12]); +} + + +void +row_allocate(uint8_t row_id, uint8_t set) +{ + uint32_t c, offset; + + /* Do nothing if size is either zero or invalid. */ + if ((rows[row_id].host_size == 0x00000000) || (rows[row_id].host_size == 0xffffffff)) + return; + + if (rows[row_id].ram_size == 0x00000000) + return; + + for (c = (rows[row_id].host_base >> 12); c < ((rows[row_id].host_base + rows[row_id].host_size) >> 12); c++) { + offset = c - (rows[row_id].host_base >> 12); + + pages[c].mem = set ? (rows[row_id].buf + rows[row_id].ram_base + ((offset << 12) & rows[row_id].ram_mask)) : page_ff; + pages[c].write_b = set ? mem_write_ramb_page : NULL; + pages[c].write_w = set ? mem_write_ramw_page : NULL; + pages[c].write_l = set ? mem_write_raml_page : NULL; +#ifdef USE_NEW_DYNAREC + pages[c].evict_prev = EVICT_NOT_IN_LIST; + pages[c].byte_dirty_mask = &byte_dirty_mask[offset * 64]; + pages[c].byte_code_present_mask = &byte_code_present_mask[offset * 64]; +#endif + } + + if (rows[row_id].host_base >= 0x00100000) { + mem_set_mem_state_both(rows[row_id].host_base, rows[row_id].host_base + rows[row_id].host_size, + set ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL)); + } else { + if (0x000a0000 > rows[row_id].host_base) { + mem_set_mem_state_both(rows[row_id].host_base, 0x000a0000 - rows[row_id].host_base, + set ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL)); + } + if ((rows[row_id].host_base + rows[row_id].host_size) > 0x00100000) { + mem_set_mem_state_both(0x00100000, (rows[row_id].host_base + rows[row_id].host_size) - 0x00100000, + set ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL)); + } + } + + if (set) { + mem_mapping_set_addr(&rows[row_id].mapping, rows[row_id].host_base, rows[row_id].host_size); + mem_mapping_set_exec(&rows[row_id].mapping, rows[row_id].buf + rows[row_id].ram_base); + mem_mapping_set_mask(&rows[row_id].mapping, rows[row_id].ram_mask); + if ((rows[row_id].host_base == rows[row_id].ram_base) && (rows[row_id].host_size == rows[row_id].ram_size)) { +#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) + mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram,mem_read_ramw,mem_read_raml, + mem_write_ram,mem_write_ramw,mem_write_raml); +#else + if (rows[row_id].buf == ram2) { + mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram_2gb,mem_read_ram_2gbw,mem_read_ram_2gbl, + mem_write_ram,mem_write_ramw,mem_write_raml); + } else { + mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram,mem_read_ramw,mem_read_raml, + mem_write_ram,mem_write_ramw,mem_write_raml); + } +#endif + } else { + mem_mapping_set_handler(&rows[row_id].mapping, row_read, row_readw, row_readl, + row_write, row_writew, row_writel); + } + } else + mem_mapping_disable(&rows[row_id].mapping); +} + + +void +row_disable(uint8_t row_id) +{ + row_allocate(row_id, 0); +} + + +void +row_set_boundary(uint8_t row_id, uint32_t boundary) +{ + if (row_id >= rows_num) + return; + + boundary &= ((1 << rows_bits) - 1); + + rows[row_id].host_size = boundary * row_unit; + if (row_id == 0) + rows[row_id].host_base = 0x00000000; + else { + rows[row_id].host_base = rows[row_id - 1].boundary * row_unit; + if (rows[row_id - 1].boundary > boundary) + rows[row_id].host_size = 0x00000000; + else + rows[row_id].host_size -= rows[row_id].host_base; + } + + rows[row_id].boundary = boundary; + + row_allocate(row_id, 1); +} + + +void +row_reset(void *priv) +{ + int i; + uint32_t boundary, shift; + + for (i = (rows_num - 1); i >= 0; i--) + row_disable(i); + + for (i = 0; i < rows_num; i++) { + shift = (i & 1) << 2; + boundary = ((uint32_t) drb_defaults[i]) + (((((uint32_t) drb_defaults[(i >> 1) + 8]) >> shift) & 0xf) << 8); + row_set_boundary(i, boundary); + } +} + + +void +row_close(void *priv) +{ + free(rows); + rows = NULL; +} + + +void * +row_init(const device_t *info) +{ + uint32_t cur_drb = 0, cur_drbe = 0; + uint32_t last_drb = 0, last_drbe = 0; + uint8_t phys_drbs[16]; + int i, max = info->local & 0xff; + int c; + uint32_t shift, drb; + uint32_t boundary, mask; + row_t *new_rows = NULL; + + rows_bits = ((info->local >> 24) & 0xff); + mask = (1 << rows_bits) - 1; + row_unit = ((info->local >> 8) & 0xff); + memset(phys_drbs, 0x00, 16); + spd_write_drbs(phys_drbs, 0x00, max, row_unit); + row_unit <<= 20; + rows_default = (info->local >> 16) & 0xff; + memset(drb_defaults, 0x00, 16); + for (i = 0; i < 8; i++) + drb_defaults[i] = rows_default; + + new_rows = calloc(max + 1, sizeof(row_t)); + rows_num = max + 1; + + rows = new_rows; + + mem_mapping_disable(&ram_low_mapping); + mem_mapping_disable(&ram_mid_mapping); + mem_mapping_disable(&ram_high_mapping); +#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) + if (mem_size > 1048576) + mem_mapping_disable(&ram_2gb_mapping); +#endif + + for (c = 0; c < pages_sz; c++) { + pages[c].mem = page_ff; + pages[c].write_b = NULL; + pages[c].write_w = NULL; + pages[c].write_l = NULL; +#ifdef USE_NEW_DYNAREC + pages[c].evict_prev = EVICT_NOT_IN_LIST; + pages[c].byte_dirty_mask = &byte_dirty_mask[c * 64]; + pages[c].byte_code_present_mask = &byte_code_present_mask[c * 64]; +#endif + } + + /* Set all memory space above the default allocated area to external. */ + boundary = ((uint32_t) rows_default) * row_unit; + mem_set_mem_state_both(boundary, (mem_size << 10) - boundary, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + + for (i = 0; i <= max; i++) { + cur_drb = phys_drbs[i]; + cur_drbe = phys_drbs[(i >> 1) + 8]; + + shift = (i & 1) << 2; + drb = (cur_drb & mask) + (((cur_drbe >> shift) & 0x03) << 8); + rows[i].ram_size = drb * row_unit; + + shift = ((i - 1) & 1) << 2; + drb = (last_drb & mask) + (((last_drbe >> shift) & 0x03) << 8); + rows[i].ram_base = drb * row_unit; + rows[i].ram_size -= rows[i].ram_base; + + rows[i].buf = ram; +#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) + if (rows[i].ram_base >= (1 << 30)) { + rows[i].ram_base -= (1 << 30); + rows[i].buf = ram2; + } +#endif + + rows[i].ram_mask = rows[i].ram_size - 1; + + mem_mapping_add(&rows[i].mapping, rows[i].ram_base, rows[i].ram_size, + row_read, row_readw, row_readl, + row_write, row_writew, row_writel, + rows[i].buf + rows[i].ram_base, MEM_MAPPING_INTERNAL, &(rows[i])); + mem_mapping_disable(&rows[i].mapping); + + shift = (i & 1) << 2; + boundary = ((uint32_t) drb_defaults[i]) + ((((uint32_t) drb_defaults[(i >> 1) + 8]) >> shift) << 8); + row_set_boundary(i, boundary); + + last_drb = cur_drb; + last_drbe = cur_drbe; + } + + flushmmucache(); + + return new_rows; +} + + +/* NOTE: NOT const, so that we can patch it at init. */ +device_t row_device = { + .name = "DRAM Rows", + .internal_name = "dram_rows", + .flags = DEVICE_AT, + .local = 0x0000, + .init = row_init, + .close = row_close, + .reset = row_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; diff --git a/src/mem/spd.c b/src/mem/spd.c index c39a3bffd..6d3e88a93 100644 --- a/src/mem/spd.c +++ b/src/mem/spd.c @@ -27,6 +27,7 @@ #include <86box/spd.h> #include <86box/version.h> #include <86box/machine.h> +#include <86box/plat_unused.h> #define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x)) @@ -54,7 +55,7 @@ spd_log(const char *fmt, ...) #endif static void -spd_close(void *priv) +spd_close(UNUSED(void *priv)) { spd_log("SPD: close()\n"); @@ -67,7 +68,7 @@ spd_close(void *priv) } static void * -spd_init(const device_t *info) +spd_init(UNUSED(const device_t *info)) { spd_log("SPD: init()\n"); @@ -181,7 +182,6 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) uint8_t slot; uint8_t slot_count; uint8_t row; - uint8_t i; uint16_t min_module_size; uint16_t rows[SPD_MAX_SLOTS]; uint16_t asym; @@ -262,7 +262,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) edo_data->dram_width = 8; edo_data->spd_rev = 0x12; - for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); + for (int i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); i < sizeof(edo_data->part_no); i++) edo_data->part_no[i] = ' '; /* part number should be space-padded */ edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); @@ -270,9 +270,9 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) edo_data->mfg_year = 20; edo_data->mfg_week = 17; - for (i = 0; i < 63; i++) + for (uint8_t i = 0; i < 63; i++) edo_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) + for (uint8_t i = 0; i < 129; i++) edo_data->checksum2 += spd_modules[slot]->data[i]; break; @@ -316,7 +316,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) sdram_data->ca_hold = sdram_data->data_hold = 0x08; sdram_data->spd_rev = 0x12; - for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); + for (int i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); i < sizeof(sdram_data->part_no); i++) sdram_data->part_no[i] = ' '; /* part number should be space-padded */ sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); @@ -327,11 +327,14 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) sdram_data->freq = 100; sdram_data->features = 0xFF; - for (i = 0; i < 63; i++) + for (uint8_t i = 0; i < 63; i++) sdram_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) + for (uint8_t i = 0; i < 129; i++) sdram_data->checksum2 += spd_modules[slot]->data[i]; break; + + default: + break; } row++; @@ -388,7 +391,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit /* Write DRB register, adding the previous DRB's value. */ if (row == 0) regs[drb] = 0; - else if ((apollo) && (drb == apollo)) + else if (apollo && (drb == apollo)) regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */ else regs[drb] = regs[drb - 1]; @@ -398,7 +401,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit } } -/* Needed for 430LX. */ +/* Needed for 430NX. */ void spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit) { @@ -444,8 +447,9 @@ spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t row_val += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */ regs[drb] = row_val & 0xff; drb = reg_min + 8 + (row >> 1); - shift = (row & 0x01) << 3; - regs[drb] = (((row_val & 0xfff) >> 8) << shift); + shift = (row & 0x01) << 2; + /* Limit to 1 GB space, per the 430NX datasheet. */ + regs[drb] = (regs[drb] & ~(0xf << shift)) | (((row_val >> 8) & 3) << shift); spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]); } } diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c index d9be436e9..dbb91d358 100644 --- a/src/mem/sst_flash.c +++ b/src/mem/sst_flash.c @@ -35,21 +35,31 @@ #include <86box/m_xt_xi8088.h> typedef struct sst_t { - uint8_t manufacturer, id, has_bbp, is_39, - page_bytes, sdp, bbp_first_8k, bbp_last_8k; + uint8_t manufacturer; + uint8_t id; + uint8_t has_bbp; + uint8_t is_39; + uint8_t page_bytes; + uint8_t sdp; + uint8_t bbp_first_8k; + uint8_t bbp_last_8k; - int command_state, id_mode, - dirty; + int command_state; + int id_mode; + int dirty; - uint32_t size, mask, - page_mask, page_base, - last_addr; + uint32_t size; + uint32_t mask; + uint32_t page_mask; + uint32_t page_base; + uint32_t last_addr; - uint8_t page_buffer[128], - page_dirty[128]; + uint8_t page_buffer[128]; + uint8_t page_dirty[128]; uint8_t *array; - mem_mapping_t mapping[8], mapping_h[8]; + mem_mapping_t mapping[8]; + mem_mapping_t mapping_h[8]; pc_timer_t page_write_timer; } sst_t; @@ -252,9 +262,9 @@ sst_page_write(void *priv) } static uint8_t -sst_read_id(uint32_t addr, void *p) +sst_read_id(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint8_t ret = 0x00; if ((addr & 0xffff) == 0) @@ -291,9 +301,9 @@ sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val) } static void -sst_write(uint32_t addr, uint8_t val, void *p) +sst_write(uint32_t addr, uint8_t val, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; switch (dev->command_state) { case 0: @@ -359,19 +369,22 @@ sst_write(uint32_t addr, uint8_t val, void *p) dev->bbp_last_8k = 0xff; dev->command_state = 0; break; + + default: + break; } } static uint8_t -sst_read(uint32_t addr, void *p) +sst_read(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint8_t ret = 0xff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read_id(addr, p); + ret = sst_read_id(addr, priv); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = dev->array[addr - biosaddr]; @@ -381,15 +394,15 @@ sst_read(uint32_t addr, void *p) } static uint16_t -sst_readw(uint32_t addr, void *p) +sst_readw(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint16_t ret = 0xffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8); + ret = sst_read(addr, priv) | (sst_read(addr + 1, priv) << 8); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = *(uint16_t *) &dev->array[addr - biosaddr]; @@ -399,15 +412,15 @@ sst_readw(uint32_t addr, void *p) } static uint32_t -sst_readl(uint32_t addr, void *p) +sst_readl(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint32_t ret = 0xffffffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16); + ret = sst_readw(addr, priv) | (sst_readw(addr + 2, priv) << 16); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = *(uint32_t *) &dev->array[addr - biosaddr]; @@ -499,10 +512,10 @@ sst_init(const device_t *info) } static void -sst_close(void *p) +sst_close(void *priv) { FILE *f; - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; if (dev->dirty) { f = nvr_fopen(flash_path, "wb"); diff --git a/src/network/CMakeLists.txt b/src/network/CMakeLists.txt index 54ec1edce..9f6d49a17 100644 --- a/src/network/CMakeLists.txt +++ b/src/network/CMakeLists.txt @@ -16,7 +16,7 @@ set(net_sources) list(APPEND net_sources network.c net_pcap.c net_slirp.c net_dp8390.c net_3c501.c net_3c503.c net_ne2000.c net_pcnet.c net_wd8003.c net_plip.c net_event.c net_null.c) -option(SLIRP_EXTERNAL "Link against the system-provided libslirp library" OFF) +option(SLIRP_EXTERNAL "Link against the system-provided libslirp library" ON) mark_as_advanced(SLIRP_EXTERNAL) if(SLIRP_EXTERNAL) diff --git a/src/nmi.c b/src/nmi.c index 4fde00765..fbe3bee19 100644 --- a/src/nmi.c +++ b/src/nmi.c @@ -7,11 +7,12 @@ #include #include <86box/io.h> #include <86box/nmi.h> +#include <86box/plat_unused.h> int nmi_mask; void -nmi_write(uint16_t port, uint8_t val, void *p) +nmi_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { nmi_mask = val & 0x80; } diff --git a/src/nvr_at.c b/src/nvr_at.c index 52bc7c9b5..7d0b18ae4 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -297,23 +297,30 @@ #define FLAG_P6RP4_HACK 0x10 #define FLAG_PIIX4 0x20 -typedef struct { +typedef struct local_t { int8_t stat; - uint8_t cent, def, - flags, read_addr, - wp_0d, wp_32, - pad, pad0; + uint8_t cent; + uint8_t def; + uint8_t flags; + uint8_t read_addr; + uint8_t wp_0d; + uint8_t wp_32; + uint8_t pad; + uint8_t pad0; - uint8_t addr[8], wp[2], - bank[8], *lock; + uint8_t addr[8]; + uint8_t wp[2]; + uint8_t bank[8]; + uint8_t *lock; - int16_t count, state; + int16_t count; + int16_t state; - uint64_t ecount, - rtc_time; - pc_timer_t update_timer, - rtc_timer; + uint64_t ecount; + uint64_t rtc_time; + pc_timer_t update_timer; + pc_timer_t rtc_timer; } local_t; static uint8_t nvr_at_inited = 0; @@ -650,8 +657,10 @@ nvr_write(uint16_t addr, uint8_t val, void *priv) return; if (addr & 1) { - // if (local->bank[addr_id] == 0xff) - // return; +#if 0 + if (local->bank[addr_id] == 0xff) + return; +#endif nvr_reg_write(local->addr[addr_id], val, priv); } else { local->addr[addr_id] = (val & (nvr->size - 1)); @@ -1065,6 +1074,9 @@ nvr_at_init(const device_t *info) nvr->irq = -1; local->cent = RTC_CENTURY_ELT; break; + + default: + break; } local->read_addr = 1; diff --git a/src/nvr_ps2.c b/src/nvr_ps2.c index dd87cbb80..a06ffb7bb 100644 --- a/src/nvr_ps2.c +++ b/src/nvr_ps2.c @@ -49,7 +49,7 @@ #include <86box/nvr_ps2.h> #include <86box/rom.h> -typedef struct { +typedef struct ps2_nvr_t { int addr; uint8_t *ram; @@ -76,6 +76,9 @@ ps2_nvr_read(uint16_t port, void *priv) case 0x76: ret = nvr->ram[nvr->addr]; break; + + default: + break; } return ret; @@ -98,6 +101,9 @@ ps2_nvr_write(uint16_t port, uint8_t val, void *priv) case 0x76: nvr->ram[nvr->addr] = val; break; + + default: + break; } } diff --git a/src/pci.c b/src/pci.c index 5b6a40138..5b4282c5a 100644 --- a/src/pci.c +++ b/src/pci.c @@ -34,9 +34,12 @@ #include <86box/dma.h> #include <86box/pci.h> #include <86box/keyboard.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t bus, id, type; +typedef struct pci_card_t { + uint8_t bus; + uint8_t id; + uint8_t type; uint8_t irq_routing[4]; void *priv; @@ -44,7 +47,7 @@ typedef struct { uint8_t (*read)(int func, int addr, void *priv); } pci_card_t; -typedef struct { +typedef struct pci_mirq_t { uint8_t enabled; uint8_t irq_line; } pci_mirq_t; @@ -53,6 +56,10 @@ int pci_burst_time; int agp_burst_time; int pci_nonburst_time; int agp_nonburst_time; +int pci_take_over_io; + +uint32_t pci_base = 0xc000; +uint32_t pci_size = 0x1000; static pci_card_t pci_cards[32]; static uint8_t pci_pmc = 0; @@ -74,8 +81,6 @@ static int pci_bus; static int pci_enable; static int pci_key; static int trc_reg = 0; -static uint32_t pci_base = 0xc000; -static uint32_t pci_size = 0x1000; static void pci_reset_regs(void); @@ -141,7 +146,7 @@ pci_relocate_slot(int type, int new_slot) } static void -pci_cf8_write(uint16_t port, uint32_t val, void *priv) +pci_cf8_write(UNUSED(uint16_t port), uint32_t val, UNUSED(void *priv)) { pci_log("cf8 write: %08X\n", val); pci_index = val & 0xff; @@ -152,13 +157,13 @@ pci_cf8_write(uint16_t port, uint32_t val, void *priv) } static uint32_t -pci_cf8_read(uint16_t port, void *priv) +pci_cf8_read(UNUSED(uint16_t port), UNUSED(void *priv)) { return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); } static void -pci_write(uint16_t port, uint8_t val, void *priv) +pci_write(uint16_t port, uint8_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -191,11 +196,14 @@ pci_write(uint16_t port, uint8_t val, void *priv) #endif break; + + default: + break; } } static void -pci_writew(uint16_t port, uint16_t val, void *priv) +pci_writew(uint16_t port, uint16_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -229,11 +237,14 @@ pci_writew(uint16_t port, uint16_t val, void *priv) #endif break; + + default: + break; } } static void -pci_writel(uint16_t port, uint32_t val, void *priv) +pci_writel(uint16_t port, uint32_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -269,11 +280,14 @@ pci_writel(uint16_t port, uint32_t val, void *priv) #endif break; + + default: + break; } } static uint8_t -pci_read(uint16_t port, void *priv) +pci_read(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint8_t ret = 0xff; @@ -302,6 +316,10 @@ pci_read(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %02X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -310,7 +328,7 @@ pci_read(uint16_t port, void *priv) } static uint16_t -pci_readw(uint16_t port, void *priv) +pci_readw(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint16_t ret = 0xffff; @@ -341,6 +359,10 @@ pci_readw(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %04X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -349,7 +371,7 @@ pci_readw(uint16_t port, void *priv) } static uint32_t -pci_readl(uint16_t port, void *priv) +pci_readl(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint32_t ret = 0xffffffff; @@ -382,6 +404,10 @@ pci_readl(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %08X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -389,19 +415,17 @@ pci_readl(uint16_t port, void *priv) return ret; } -static void pci_type2_write(uint16_t port, uint8_t val, void *priv); -static uint8_t pci_type2_read(uint16_t port, void *priv); - void pci_set_pmc(uint8_t pmc) { pci_log("pci_set_pmc(%02X)\n", pmc); - // pci_reset_regs(); +#if 0 + pci_reset_regs(); +#endif if (!pci_pmc && (pmc & 0x01)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; io_removehandler(0x0cf8, 1, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); @@ -414,13 +438,11 @@ pci_set_pmc(uint8_t pmc) io_sethandler(0x0cfc, 4, pci_read, pci_readw, pci_readl, pci_write, pci_writew, pci_writel, NULL); } else if (pci_pmc && !(pmc & 0x01)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Redellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; if (pci_key) { - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io |= PCI_IO_ON; } io_removehandler(0x0cf8, 1, @@ -439,67 +461,97 @@ pci_set_pmc(uint8_t pmc) } static void -pci_type2_write(uint16_t port, uint8_t val, void *priv) +pci_type2_write_reg(uint16_t port, uint8_t val) { uint8_t slot = 0; - if (port == 0xcf8) { - pci_func = (val >> 1) & 7; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - if (!pci_key && (val & 0xf0)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - } else if (pci_key && !(val & 0xf0)) - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - - pci_key = val & 0xf0; - } else if (port == 0xcfa) { - pci_bus = val; - - pci_log("Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); - - /* Evidently, writing here, we should also enable the - configuration space. */ - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - - /* Mark as enabled. */ - pci_key |= 0x100; - } else if (port == 0xcfb) { - pci_log("Write %02X to port 0CFB\n", val); - pci_set_pmc(val); - } else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; - - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); -#ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); -#endif - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Writing to empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); #endif } +#ifdef ENABLE_PCI_LOG + else + pci_log("Writing to unassigned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); +#endif +} + +void +pci_type2_write(uint16_t port, uint8_t val, UNUSED(void *priv)) +{ + switch (port) { + case 0xcf8: + pci_func = (val >> 1) & 7; + + if (val & 0xf0) { + pci_log("CF8: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io |= PCI_IO_ON; + } else { + pci_log("CF8: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; + } + + pci_key = val & 0xf0; + break; + case 0xcfa: + pci_bus = val; + + pci_log("CFA: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + + /* Evidently, writing here, we should also enable the + configuration space. */ + pci_take_over_io |= PCI_IO_ON; + + /* Mark as enabled. */ + pci_key |= 0x100; + break; + case 0xcfb: + pci_log("Write %02X to port 0CFB\n", val); + pci_set_pmc(val); + break; + + case 0xc000 ... 0xc0ff: + if (pci_take_over_io == 0x00000000) + break; + + pci_type2_write_reg(port, val); + break; + + case 0xc100 ... 0xcfff: + if (!(pci_take_over_io & PCI_IO_ON)) + break; + + pci_type2_write_reg(port, val); + break; + + default: + break; + } } -static void +void +pci_type2_writew(uint16_t port, uint16_t val, void *priv) +{ + pci_type2_write(port, val & 0xff, priv); + pci_type2_write(port + 1, val >> 8, priv); +} + +void pci_type2_writel(uint16_t port, uint32_t val, void *priv) +{ + pci_type2_writew(port, val & 0xffff, priv); + pci_type2_writew(port + 2, val >> 16, priv); +} + +static void +pci_type2_cfb_writel(uint16_t port, uint32_t val, void *priv) { for (uint8_t i = 0; i < 4; i++) { /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, @@ -510,41 +562,88 @@ pci_type2_writel(uint16_t port, uint32_t val, void *priv) } static uint8_t -pci_type2_read(uint16_t port, void *priv) +pci_type2_read_reg(uint16_t port) { uint8_t slot = 0; uint8_t ret = 0xff; - if (port == 0xcf8) - ret = pci_key | (pci_func << 1); - else if (port == 0xcfa) - ret = pci_bus; - else if (port == 0xcfb) - ret = pci_pmc; - else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); -#ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); -#endif - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Reading from empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); +#endif + } +#ifdef ENABLE_PCI_LOG + else + pci_log("Reading from unasisgned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); #endif - pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func); + pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func); + + return ret; +} + +uint8_t +pci_type2_read(uint16_t port, UNUSED(void *priv)) +{ + uint8_t ret = 0xff; + + switch (port) { + case 0xcf8: + ret = pci_key | (pci_func << 1); + break; + case 0xcfa: + ret = pci_bus; + break; + case 0xcfb: + ret = pci_pmc; + break; + + case 0xc000 ... 0xc0ff: + if (pci_take_over_io == 0x00000000) + break; + + ret = pci_type2_read_reg(port); + break; + + case 0xc100 ... 0xcfff: + if (!(pci_take_over_io & PCI_IO_ON)) + break; + + ret = pci_type2_read_reg(port); + break; + + default: + break; } return ret; } +uint16_t +pci_type2_readw(uint16_t port, void *priv) +{ + uint16_t ret = pci_type2_read(port, priv); + ret |= ((uint16_t) pci_type2_read(port + 1, priv)) << 8; + + return ret; +} + +uint32_t +pci_type2_readl(uint16_t port, void *priv) +{ + uint32_t ret = pci_type2_readw(port, priv); + ret |= ((uint32_t) pci_type2_readw(port + 2, priv)) << 16; + + return ret; +} + void pci_set_irq_routing(int pci_int, int irq) { @@ -826,9 +925,7 @@ pci_reset_regs(void) { pci_index = pci_card = pci_func = pci_bus = pci_key = 0; - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_take_over_io &= ~PCI_IO_ON; } void @@ -899,19 +996,19 @@ pci_slots_clear(void) } uint32_t -trc_readl(uint16_t port, void *priv) +trc_readl(UNUSED(uint16_t port), UNUSED(void *priv)) { return 0xffffffff; } uint16_t -trc_readw(uint16_t port, void *priv) +trc_readw(UNUSED(uint16_t port), UNUSED(void *priv)) { return 0xffff; } uint8_t -trc_read(uint16_t port, void *priv) +trc_read(UNUSED(uint16_t port), UNUSED(void *priv)) { return trc_reg & 0xfb; } @@ -939,17 +1036,19 @@ trc_reset(uint8_t val) } void -trc_writel(uint16_t port, uint32_t val, void *priv) +trc_writel(UNUSED(uint16_t port), UNUSED(uint32_t val), UNUSED(void *priv)) { + // } void -trc_writew(uint16_t port, uint16_t val, void *priv) +trc_writew(UNUSED(uint16_t port), UNUSED(uint16_t val), UNUSED(void *priv)) { + // } void -trc_write(uint16_t port, uint8_t val, void *priv) +trc_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { pci_log("TRC Write: %02X\n", val); @@ -993,7 +1092,7 @@ pci_init(int type) pci_pmc = 0x00; io_sethandler(0x0cfb, 1, - pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_writel, NULL); + pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_cfb_writel, NULL); } if (type & PCI_NO_IRQ_STEERING) { @@ -1004,6 +1103,8 @@ pci_init(int type) pic_elcr_set_enabled(1); } + pci_take_over_io = 0x00000000; + if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) { pci_log("PCI: Configuration mechanism #1\n"); io_sethandler(0x0cf8, 1, @@ -1024,9 +1125,7 @@ pci_init(int type) pci_base = 0xc100; pci_size = 0x0f00; - io_sethandler(0xc000, 0x0100, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_take_over_io |= PCI_IO_DEV0; } } diff --git a/src/pci_dummy.c b/src/pci_dummy.c index b85df7ab9..3d437247d 100644 --- a/src/pci_dummy.c +++ b/src/pci_dummy.c @@ -9,14 +9,15 @@ #include <86box/io.h> #include <86box/pci.h> #include <86box/pci_dummy.h> +#include <86box/plat_unused.h> -typedef struct -{ +typedef struct pci_dummy_t { uint8_t pci_regs[256]; bar_t pci_bar[2]; - uint8_t card, interrupt_on; + uint8_t card; + uint8_t interrupt_on; } pci_dummy_t; static void @@ -29,12 +30,12 @@ pci_dummy_interrupt(int set, pci_dummy_t *dev) } static uint8_t -pci_dummy_read(uint16_t Port, void *p) +pci_dummy_read(uint16_t port, void *priv) { - pci_dummy_t *dev = (pci_dummy_t *) p; + pci_dummy_t *dev = (pci_dummy_t *) priv; uint8_t ret = 0xff; - switch (Port & 0x20) { + switch (port & 0x20) { case 0x00: ret = 0x1a; break; @@ -60,48 +61,54 @@ pci_dummy_read(uint16_t Port, void *p) dev->interrupt_on = 0; } break; + + default: + break; } return ret; } static uint16_t -pci_dummy_readw(uint16_t Port, void *p) +pci_dummy_readw(uint16_t port, void *priv) { - return pci_dummy_read(Port, p); + return pci_dummy_read(port, priv); } static uint32_t -pci_dummy_readl(uint16_t Port, void *p) +pci_dummy_readl(uint16_t port, void *priv) { - return pci_dummy_read(Port, p); + return pci_dummy_read(port, priv); } static void -pci_dummy_write(uint16_t Port, uint8_t Val, void *p) +pci_dummy_write(uint16_t port, UNUSED(uint8_t val), void *priv) { - pci_dummy_t *dev = (pci_dummy_t *) p; + pci_dummy_t *dev = (pci_dummy_t *) priv; - switch (Port & 0x20) { + switch (port & 0x20) { case 0x06: if (!dev->interrupt_on) { dev->interrupt_on = 1; pci_dummy_interrupt(1, dev); } break; + + default: + break; } } static void -pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) +pci_dummy_writew(uint16_t port, uint16_t val, void *priv) { - pci_dummy_write(Port, Val & 0xFF, p); + pci_dummy_write(port, val & 0xFF, priv); } static void -pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) +pci_dummy_writel(uint16_t port, uint32_t val, void *priv) { - pci_dummy_write(Port, Val & 0xFF, p); + pci_dummy_write(port, val & 0xFF, priv); } static void @@ -172,7 +179,9 @@ pci_dummy_pci_read(int func, int addr, void *priv) break; } - // pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret); +#if 0 + pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret); +#endif return ret; } @@ -183,7 +192,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) pci_dummy_t *dev = (pci_dummy_t *) priv; uint8_t valxor; - // pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val); +#if 0 + pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val); +#endif if (func == 0x00) switch (addr) { @@ -225,6 +236,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val); dev->pci_regs[addr] = val; return; + + default: + break; } } @@ -252,7 +266,7 @@ pci_dummy_close(void *priv) } static void * -pci_dummy_card_init(const device_t *info) +pci_dummy_card_init(UNUSED(const device_t *info)) { pci_dummy_t *dev = (pci_dummy_t *) calloc(1, sizeof(pci_dummy_t)); diff --git a/src/pic.c b/src/pic.c index ffb370ce2..8a57d15b9 100644 --- a/src/pic.c +++ b/src/pic.c @@ -37,6 +37,7 @@ #include <86box/apm.h> #include <86box/nvr.h> #include <86box/acpi.h> +#include <86box/plat_unused.h> enum { STATE_NONE = 0, @@ -140,7 +141,7 @@ pic_elcr_write(uint16_t port, uint8_t val, void *priv) } uint8_t -pic_elcr_read(uint16_t port, void *priv) +pic_elcr_read(UNUSED(uint16_t port), void *priv) { pic_t *dev = (pic_t *) priv; @@ -191,8 +192,8 @@ find_best_interrupt(pic_t *dev) { uint8_t b; uint8_t intr; - int j; - int ret = -1; + uint8_t j; + int8_t ret = -1; for (uint8_t i = 0; i < 8; i++) { j = (i + dev->priority) & 7; @@ -334,7 +335,7 @@ pic_acknowledge(pic_t *dev) static uint8_t pic_non_specific_find(pic_t *dev) { - int j; + uint8_t j; uint8_t b; uint8_t irq = 0xff; @@ -398,7 +399,7 @@ pic_command(pic_t *dev) } uint8_t -pic_latch_read(uint16_t addr, void *priv) +pic_latch_read(UNUSED(uint16_t addr), UNUSED(void *priv)) { uint8_t ret = 0xff; @@ -495,6 +496,9 @@ pic_write(uint16_t addr, uint8_t val, void *priv) dev->imr = val; update_pending(); break; + + default: + break; } } else { if (val & 0x10) { @@ -531,14 +535,12 @@ pic_write(uint16_t addr, uint8_t val, void *priv) void pic_set_pci(void) { - int i; - - for (i = 0x0024; i < 0x0040; i += 4) { + for (uint8_t i = 0x0024; i < 0x0040; i += 4) { io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } - for (i = 0x1120; i < 0x1140; i += 4) { + for (uint16_t i = 0x1120; i < 0x1140; i += 4) { io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } @@ -584,7 +586,7 @@ pic_reset_hard(void) /* The situation is as follows: There is a giant mess when it comes to these latches on real hardware, to the point that there's even boards with board-level latched that get used in place of the latches on the chipset, therefore, I'm just doing this here for the sake of simplicity. */ - if (machine_has_bus(machine, MACHINE_BUS_PS2)) { + if (machine_has_bus(machine, MACHINE_BUS_PS2_LATCH)) { pic_kbd_latch(0x01); pic_mouse_latch(0x01); } else { @@ -628,7 +630,7 @@ picint_common(uint16_t num, int level, int set) /* Make sure to ignore all slave IRQ's, and in case of AT+, translate IRQ 2 to IRQ 9. */ for (uint8_t i = 0; i < 8; i++) { - b = (1 << i); + b = (uint8_t) (1 << i); raise = num & b; if (pic.icw3 & b) { @@ -779,7 +781,7 @@ pic_irq_ack_read(pic_t *dev, int phase) uint8_t pic_irq_ack(void) { - int ret; + uint8_t ret; /* Needed for Xi8088. */ if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) { diff --git a/src/pit.c b/src/pit.c index cf339607d..3fe959c7f 100644 --- a/src/pit.c +++ b/src/pit.c @@ -41,6 +41,7 @@ #include <86box/sound.h> #include <86box/snd_speaker.h> #include <86box/video.h> +#include <86box/plat_unused.h> pit_intf_t pit_devs[2]; @@ -171,6 +172,9 @@ ctr_tick(ctr_t *ctr) case 3: ctr_decrease_count(ctr); break; + + default: + break; } break; case 1: @@ -189,6 +193,9 @@ ctr_tick(ctr_t *ctr) case 6: ctr_decrease_count(ctr); break; + + default: + break; } break; case 2: @@ -211,6 +218,9 @@ ctr_tick(ctr_t *ctr) } } break; + + default: + break; } break; case 3: @@ -254,6 +264,9 @@ ctr_tick(ctr_t *ctr) ctr->newcount = 0; } break; + + default: + break; } break; case 4: @@ -279,6 +292,9 @@ ctr_tick(ctr_t *ctr) ctr->state = 0; ctr_set_out(ctr, 1); break; + + default: + break; } } break; @@ -369,6 +385,9 @@ ctr_latch_count(ctr_t *ctr) ctr->rl = count; ctr->latched = 2; break; + + default: + break; } pit_log("latched counter = %04X\n", ctr->rl & 0xffff); @@ -439,6 +458,9 @@ pit_ctr_set_gate(void *data, int counter_id, int gate) ctr_set_out(ctr, 1); } break; + + default: + break; } } @@ -487,9 +509,9 @@ pit_ctr_set_using_timer(void *data, int counter_id, int using_timer) } static void -pit_timer_over(void *p) +pit_timer_over(void *priv) { - pit_t *dev = (pit_t *) p; + pit_t *dev = (pit_t *) priv; dev->clock ^= 1; @@ -602,8 +624,14 @@ pit_write(uint16_t addr, uint8_t val, void *priv) else ctr->wm |= 0x80; break; + + default: + break; } break; + + default: + break; } } @@ -675,8 +703,14 @@ pit_read(uint16_t addr, void *priv) else ctr->rm |= 0x80; break; + + default: + break; } break; + + default: + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -714,7 +748,7 @@ pit_refresh_timer_at(int new_out, int old_out) } void -pit_speaker_timer(int new_out, int old_out) +pit_speaker_timer(int new_out, UNUSED(int old_out)) { int l; @@ -734,7 +768,7 @@ pit_speaker_timer(int new_out, int old_out) } void -pit_nmi_timer_ps2(int new_out, int old_out) +pit_nmi_timer_ps2(int new_out, UNUSED(int old_out)) { nmi = new_out; @@ -893,8 +927,8 @@ pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(i pit_intf_t *pit_intf = &pit_devs[0]; switch (type) { - case PIT_8253: default: + case PIT_8253: pit = device_add(&i8253_device); *pit_intf = pit_classic_intf; break; @@ -937,8 +971,8 @@ pit_ps2_init(int type) pit_intf_t *ps2_pit = &pit_devs[1]; switch (type) { - case PIT_8254: default: + case PIT_8254: pit = device_add(&i8254_ps2_device); *ps2_pit = pit_classic_intf; break; diff --git a/src/pit_fast.c b/src/pit_fast.c index 4e7bc77c7..1bd75f2aa 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -207,6 +207,9 @@ pitf_ctr_load(ctrf_t *ctr) case 5: /*Hardware triggered stobe*/ ctr->enabled = 1; break; + + default: + break; } if (ctr->load_func != NULL) @@ -266,6 +269,9 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) } ctr->enabled = gate; break; + + default: + break; } ctr->gate = gate; ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; @@ -327,7 +333,10 @@ pitf_over(ctrf_t *ctr) if (ctr->using_timer) timer_advance_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST)); } - // if (!t) pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST); +#if 0 + if (!t) + pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST); +#endif break; case 4: /*Software triggered strove*/ if (!ctr->thit) { @@ -356,6 +365,9 @@ pitf_over(ctrf_t *ctr) if (ctr->using_timer) timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); break; + + default: + break; } ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; if (ctr->using_timer && !ctr->running) @@ -366,8 +378,10 @@ static __inline void pitf_ctr_latch_count(ctrf_t *ctr) { ctr->rl = pitf_read_timer(ctr); - // pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]); - // pit->ctrl |= 0x30; +#if 0 + pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]); + pit->ctrl |= 0x30; +#endif ctr->rereadlatch = 0; ctr->rm = 3; ctr->latched = 1; @@ -472,8 +486,14 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) ctr->l |= val; ctr->wm = 0; break; + + default: + break; } break; + + default: + break; } } @@ -530,8 +550,14 @@ pitf_read(uint16_t addr, void *priv) else ctr->rm = 0; break; + + default: + break; } break; + + default: + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -540,9 +566,9 @@ pitf_read(uint16_t addr, void *priv) } static void -pitf_timer_over(void *p) +pitf_timer_over(void *priv) { - ctrf_t *ctr = (ctrf_t *) p; + ctrf_t *ctr = (ctrf_t *) priv; pitf_over(ctr); } diff --git a/src/port_6x.c b/src/port_6x.c index 2bfebcee0..323d8e0c8 100644 --- a/src/port_6x.c +++ b/src/port_6x.c @@ -36,6 +36,7 @@ #include <86box/ppi.h> #include <86box/video.h> #include <86box/port_6x.h> +#include <86box/plat_unused.h> #define PS2_REFRESH_TIME (16 * TIMER_USEC) @@ -68,11 +69,14 @@ port_6x_write(uint16_t port, uint8_t val, void *priv) if (dev->flags & PORT_6X_TURBO) xi8088_turbo_set(!!(val & 0x04)); break; + + default: + break; } } static uint8_t -port_61_read_simple(uint16_t port, void *priv) +port_61_read_simple(UNUSED(uint16_t port), UNUSED(void *priv)) { uint8_t ret = ppi.pb & 0x1f; @@ -83,7 +87,7 @@ port_61_read_simple(uint16_t port, void *priv) } static uint8_t -port_61_read(uint16_t port, void *priv) +port_61_read(UNUSED(uint16_t port), void *priv) { port_6x_t *dev = (port_6x_t *) priv; uint8_t ret = 0xff; @@ -106,7 +110,7 @@ port_61_read(uint16_t port, void *priv) } static uint8_t -port_62_read(uint16_t port, void *priv) +port_62_read(UNUSED(uint16_t port), UNUSED(void *priv)) { uint8_t ret = 0xff; diff --git a/src/port_92.c b/src/port_92.c index fd0471b0e..80afe9e58 100644 --- a/src/port_92.c +++ b/src/port_92.c @@ -29,6 +29,7 @@ #include <86box/mem.h> #include <86box/pit.h> #include <86box/port_92.h> +#include <86box/plat_unused.h> #define PORT_92_INV 1 #define PORT_92_WORD 2 @@ -74,7 +75,7 @@ port_92_readw(uint16_t port, void *priv) TODO: ALi M1543(c) behavior. */ static void -port_92_pulse(void *priv) +port_92_pulse(UNUSED(void *priv)) { softresetx86(); /* Pulse reset! */ cpu_set_edx(); @@ -174,7 +175,7 @@ port_92_remove(void *priv) } static void -port_92_reset(void *priv) +port_92_reset(UNUSED(void *priv)) { cpu_alt_reset = 0; diff --git a/src/printer/CMakeLists.txt b/src/printer/CMakeLists.txt index c774258e2..dea0c7fbe 100644 --- a/src/printer/CMakeLists.txt +++ b/src/printer/CMakeLists.txt @@ -20,4 +20,15 @@ if(APPLE) if (NOT GHOSTSCRIPT_LIB) message(WARNING "Could not find ghostscript. The library will not be bundled and any related features will not work.") endif() -endif () \ No newline at end of file +endif() + +find_package(PkgConfig REQUIRED) +pkg_check_modules(FREETYPE REQUIRED IMPORTED_TARGET freetype2) +target_link_libraries(86Box PkgConfig::FREETYPE) +if(STATIC_BUILD) + if(QT) + # Qt provides its own version of harfbuzz which leads to duplicated symbols. + target_link_options(86Box PRIVATE "LINKER:--allow-multiple-definition") + endif() + target_link_libraries(86Box -static ${FREETYPE_STATIC_LIBRARIES}) +endif() diff --git a/src/printer/png.c b/src/printer/png.c index 49da1ee18..2134f3343 100644 --- a/src/printer/png.c +++ b/src/printer/png.c @@ -92,13 +92,13 @@ png_log(const char *fmt, ...) #endif static void -error_handler(png_structp arg, const char *str) +error_handler(UNUSED(png_structp arg), UNUSED(const char *str)) { png_log("PNG: stream 0x%08lx error '%s'\n", arg, str); } static void -warning_handler(png_structp arg, const char *str) +warning_handler(UNUSED(png_structp arg), UNUSED(const char *str)) { png_log("PNG: stream 0x%08lx warning '%s'\n", arg, str); } diff --git a/src/printer/prt_cpmap.c b/src/printer/prt_cpmap.c index ba9e71085..f2916eef8 100644 --- a/src/printer/prt_cpmap.c +++ b/src/printer/prt_cpmap.c @@ -572,7 +572,7 @@ static const struct { void select_codepage(uint16_t code, uint16_t *curmap) { - int i = 0; + uint16_t i = 0; const uint16_t *map_to_use; map_to_use = maps[0].map; diff --git a/src/printer/prt_escp.c b/src/printer/prt_escp.c index f1697e074..b4099bc63 100644 --- a/src/printer/prt_escp.c +++ b/src/printer/prt_escp.c @@ -65,7 +65,6 @@ #include <86box/pit.h> #include <86box/path.h> #include <86box/plat.h> -#include <86box/plat_dynld.h> #include <86box/ui.h> #include <86box/lpt.h> #include <86box/video.h> @@ -85,45 +84,8 @@ #define PAGE_CPI 10.0 /* standard 10 cpi */ #define PAGE_LPI 6.0 /* standard 6 lpi */ -#ifdef _WIN32 -# define PATH_FREETYPE_DLL "freetype.dll" -#elif defined __APPLE__ -# define PATH_FREETYPE_DLL "libfreetype.6.dylib" -#else -# define PATH_FREETYPE_DLL "libfreetype.so.6" -#endif - /* FreeType library handles - global so they can be shared. */ -FT_Library ft_lib = NULL; -void *ft_handle = NULL; - -static int (*ft_Init_FreeType)(FT_Library *alibrary); -static int (*ft_Done_Face)(FT_Face face); -static int (*ft_New_Face)(FT_Library library, const char *filepathname, - FT_Long face_index, FT_Face *aface); -static int (*ft_Set_Char_Size)(FT_Face face, FT_F26Dot6 char_width, - FT_F26Dot6 char_height, - FT_UInt horz_resolution, - FT_UInt vert_resolution); -static int (*ft_Set_Transform)(FT_Face face, FT_Matrix *matrix, - FT_Vector *delta); -static int (*ft_Get_Char_Index)(FT_Face face, FT_ULong charcode); -static int (*ft_Load_Glyph)(FT_Face face, FT_UInt glyph_index, - FT_Int32 load_flags); -static int (*ft_Render_Glyph)(FT_GlyphSlot slot, - FT_Render_Mode render_mode); - -static dllimp_t ft_imports[] = { - {"FT_Init_FreeType", &ft_Init_FreeType }, - { "FT_New_Face", &ft_New_Face }, - { "FT_Done_Face", &ft_Done_Face }, - { "FT_Set_Char_Size", &ft_Set_Char_Size }, - { "FT_Set_Transform", &ft_Set_Transform }, - { "FT_Get_Char_Index", &ft_Get_Char_Index}, - { "FT_Load_Glyph", &ft_Load_Glyph }, - { "FT_Render_Glyph", &ft_Render_Glyph }, - { NULL, NULL } -}; +FT_Library ft_lib = NULL; /* The fonts. */ #define FONT_DEFAULT 0 @@ -181,7 +143,7 @@ static dllimp_t ft_imports[] = { #define PIXX ((unsigned) floor(dev->curr_x * dev->dpi + 0.5)) #define PIXY ((unsigned) floor(dev->curr_y * dev->dpi + 0.5)) -typedef struct { +typedef struct psurface_t { int8_t dirty; /* has the page been printed on? */ char pad; @@ -192,7 +154,7 @@ typedef struct { uint8_t *pixels; /* grayscale pixel data */ } psurface_t; -typedef struct { +typedef struct escp_t { const char *name; void *lpt; @@ -204,12 +166,12 @@ typedef struct { uint8_t color; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bottom_margin; + double page_width; /* all in inches */ + double page_height; + double left_margin; + double top_margin; + double right_margin; + double bottom_margin; uint16_t dpi; double cpi; /* defined chars per inch */ double lpi; /* defined lines per inch */ @@ -255,7 +217,8 @@ typedef struct { char fontpath[1024]; char pagepath[1024]; psurface_t *page; - double curr_x, curr_y; /* print head position (inch) */ + double curr_x; /* print head position (x, inch) */ + double curr_y; /* print head position (y, inch) */ uint16_t current_font; FT_Face fontface; int8_t lq_typeface; @@ -543,7 +506,7 @@ update_font(escp_t *dev) /* Release current font if we have one. */ if (dev->fontface) - ft_Done_Face(dev->fontface); + FT_Done_Face(dev->fontface); if (dev->print_quality == QUALITY_DRAFT) fn = FONT_FILE_DOTMATRIX; @@ -579,7 +542,7 @@ update_font(escp_t *dev) escp_log("Temp file=%s\n", path); /* Load the new font. */ - if (ft_New_Face(ft_lib, path, 0, &dev->fontface)) { + if (FT_New_Face(ft_lib, path, 0, &dev->fontface)) { escp_log("ESC/P: unable to load font '%s'\n", path); dev->fontface = NULL; } @@ -625,7 +588,7 @@ update_font(escp_t *dev) dev->actual_cpi /= 2.0 / 3.0; } - ft_Set_Char_Size(dev->fontface, + FT_Set_Char_Size(dev->fontface, (uint16_t) (hpoints * 64), (uint16_t) (vpoints * 64), dev->dpi, dev->dpi); @@ -635,7 +598,7 @@ update_font(escp_t *dev) matrix.xy = (FT_Fixed) (0.20 * 0x10000L); matrix.yx = 0; matrix.yy = 0x10000L; - ft_Set_Transform(dev->fontface, &matrix, 0); + FT_Set_Transform(dev->fontface, &matrix, 0); } } @@ -1610,9 +1573,9 @@ handle_char(escp_t *dev, uint8_t ch) /* ok, so we need to print the character now */ if (ft_lib) { - char_index = ft_Get_Char_Index(dev->fontface, dev->curr_cpmap[ch]); - ft_Load_Glyph(dev->fontface, char_index, FT_LOAD_DEFAULT); - ft_Render_Glyph(dev->fontface->glyph, FT_RENDER_MODE_NORMAL); + char_index = FT_Get_Char_Index(dev->fontface, dev->curr_cpmap[ch]); + FT_Load_Glyph(dev->fontface, char_index, FT_LOAD_DEFAULT); + FT_Render_Glyph(dev->fontface->glyph, FT_RENDER_MODE_NORMAL); } pen_x = PIXX + dev->fontface->glyph->bitmap_left; @@ -1985,23 +1948,12 @@ read_status(void *priv) static void * escp_init(void *lpt) { - const char *fn = PATH_FREETYPE_DLL; - escp_t *dev; - - /* Dynamically load FreeType. */ - if (ft_handle == NULL) { - ft_handle = dynld_module(fn, ft_imports); - if (ft_handle == NULL) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2111, (wchar_t *) IDS_2132); - return (NULL); - } - } + escp_t *dev; /* Initialize FreeType. */ if (ft_lib == NULL) { - if (ft_Init_FreeType(&ft_lib)) { + if (FT_Init_FreeType(&ft_lib)) { ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2111, (wchar_t *) IDS_2132); - dynld_close(ft_lib); ft_lib = NULL; return (NULL); } diff --git a/src/printer/prt_ps.c b/src/printer/prt_ps.c index 6c72e48de..caa166a10 100644 --- a/src/printer/prt_ps.c +++ b/src/printer/prt_ps.c @@ -51,7 +51,9 @@ #elif defined __APPLE__ # define PATH_GHOSTSCRIPT_DLL "libgs.dylib" #else -# define PATH_GHOSTSCRIPT_DLL "libgs.so.9" +# define PATH_GHOSTSCRIPT_DLL "libgs.so.9" +# define PATH_GHOSTSCRIPT_DLL_ALT1 "libgs.so.10" +# define PATH_GHOSTSCRIPT_DLL_ALT2 "libgs.so" #endif #define POSTSCRIPT_BUFFER_LENGTH 65536 @@ -236,9 +238,9 @@ timeout_timer(void *priv) } static void -ps_write_data(uint8_t val, void *p) +ps_write_data(uint8_t val, void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; @@ -285,9 +287,9 @@ process_data(ps_t *dev) } static void -ps_write_ctrl(uint8_t val, void *p) +ps_write_ctrl(uint8_t val, void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; @@ -317,9 +319,9 @@ ps_write_ctrl(uint8_t val, void *p) } static uint8_t -ps_read_status(void *p) +ps_read_status(void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; uint8_t ret = 0x9f; if (!dev->ack) @@ -341,12 +343,21 @@ ps_init(void *lpt) /* Try loading the DLL. */ ghostscript_handle = dynld_module(PATH_GHOSTSCRIPT_DLL, ghostscript_imports); - if (ghostscript_handle == NULL) +#ifdef PATH_GHOSTSCRIPT_DLL_ALT1 + if (ghostscript_handle == NULL) { + ghostscript_handle = dynld_module(PATH_GHOSTSCRIPT_DLL_ALT1, ghostscript_imports); +# ifdef PATH_GHOSTSCRIPT_DLL_ALT2 + if (ghostscript_handle == NULL) + ghostscript_handle = dynld_module(PATH_GHOSTSCRIPT_DLL_ALT2, ghostscript_imports); +# endif + } +#endif + if (ghostscript_handle == NULL) { ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2115, (wchar_t *) IDS_2133); - else { - if (gsapi_revision(&rev, sizeof(rev)) == 0) + } else { + if (gsapi_revision(&rev, sizeof(rev)) == 0) { pclog("Loaded %s, rev %ld (%ld)\n", rev.product, rev.revision, rev.revisiondate); - else { + } else { dynld_close(ghostscript_handle); ghostscript_handle = NULL; } @@ -368,9 +379,9 @@ ps_init(void *lpt) } static void -ps_close(void *p) +ps_close(void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; diff --git a/src/printer/prt_text.c b/src/printer/prt_text.c index 54e5fe6d5..6fe0f531a 100644 --- a/src/printer/prt_text.c +++ b/src/printer/prt_text.c @@ -81,7 +81,7 @@ #define PAGE_CPI 10.0 /* standard 10 cpi */ #define PAGE_LPI 6.0 /* standard 6 lpi */ -typedef struct { +typedef struct psurface_t { int8_t dirty; /* has the page been printed on? */ char pad; @@ -91,7 +91,7 @@ typedef struct { char *chars; /* character data */ } psurface_t; -typedef struct { +typedef struct prnt_t { const char *name; void *lpt; @@ -104,23 +104,23 @@ typedef struct { pc_timer_t timeout_timer; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bot_margin; + double page_width; /* all in inches */ + double page_height; + double left_margin; + double top_margin; + double right_margin; + double bot_margin; /* internal page data */ psurface_t *page; - uint8_t max_chars, - max_lines; - uint8_t curr_x, /* print head position (chars) */ - curr_y; + uint8_t max_chars; + uint8_t max_lines; + uint8_t curr_x; /* print head position (x, chars) */ + uint8_t curr_y; /* print head position (y, chars) */ /* font data */ - double cpi, /* defined chars per inch */ - lpi; /* defined lines per inch */ + double cpi; /* defined chars per inch */ + double lpi; /* defined lines per inch */ /* handshake data */ uint8_t data; diff --git a/src/qt/cocoa_keyboard.hpp b/src/qt/cocoa_keyboard.hpp index eaf0cdfe0..da3161bb2 100644 --- a/src/qt/cocoa_keyboard.hpp +++ b/src/qt/cocoa_keyboard.hpp @@ -127,3 +127,9 @@ static std::array cocoa_keycodes = { /* key names in parentheses 0x150, /* DownArrow */ 0x148, /* UpArrow */ }; + +// https://developer.apple.com/documentation/appkit/nseventmodifierflags/ +qint32 NSEventModifierFlagCommand = 1 << 20; + +qint32 nvk_Delete = 0x75; +qint32 nvk_Insert = 0x72; \ No newline at end of file diff --git a/src/qt/qt_filefield.cpp b/src/qt/qt_filefield.cpp index b6db5e611..9272e31a1 100644 --- a/src/qt/qt_filefield.cpp +++ b/src/qt/qt_filefield.cpp @@ -31,6 +31,12 @@ FileField::FileField(QWidget *parent) fileName_ = ui->label->text(); emit fileSelected(ui->label->text(), true); }); + + connect(ui->label, &QLineEdit::textChanged, this, [this]() { + fileName_ = ui->label->text(); + emit fileTextEntered(ui->label->text(), true); + }); + this->setFixedWidth(this->sizeHint().width() + ui->pushButton->sizeHint().width()); } diff --git a/src/qt/qt_filefield.hpp b/src/qt/qt_filefield.hpp index ee011a38b..e3569fd31 100644 --- a/src/qt/qt_filefield.hpp +++ b/src/qt/qt_filefield.hpp @@ -19,12 +19,14 @@ public: void setFilter(const QString &filter) { filter_ = filter; } QString selectedFilter() const { return selectedFilter_; } + void setselectedFilter(const QString &selectedFilter) { selectedFilter_ = selectedFilter; } void setCreateFile(bool createFile) { createFile_ = createFile; } bool createFile() { return createFile_; } signals: void fileSelected(const QString &fileName, bool precheck = false); + void fileTextEntered(const QString &fileName, bool precheck = false); private slots: void on_pushButton_clicked(); diff --git a/src/qt/qt_harddiskdialog.cpp b/src/qt/qt_harddiskdialog.cpp index 6489b9c77..b640c086e 100644 --- a/src/qt/qt_harddiskdialog.cpp +++ b/src/qt/qt_harddiskdialog.cpp @@ -84,6 +84,13 @@ HarddiskDialog::HarddiskDialog(bool existing, QWidget *parent) ui->lineEditSize->setValidator(new QIntValidator()); ui->buttonBox->button(QDialogButtonBox::Ok)->setEnabled(false); + filters = QStringList({ tr("Raw image") % util::DlgFilter({ "img" }, true), + tr("HDI image") % util::DlgFilter({ "hdi" }, true), + tr("HDX image") % util::DlgFilter({ "hdx" }, true), + tr("Fixed-size VHD") % util::DlgFilter({ "vhd" }, true), + tr("Dynamic-size VHD") % util::DlgFilter({ "vhd" }, true), + tr("Differencing VHD") % util::DlgFilter({ "vhd" }, true) }); + if (existing) { ui->fileField->setFilter(tr("Hard disk images") % util::DlgFilter({ "hd?", "im?", "vhd" }) % tr("All files") % util::DlgFilter({ "*" }, true)); @@ -99,24 +106,26 @@ HarddiskDialog::HarddiskDialog(bool existing, QWidget *parent) connect(ui->fileField, &FileField::fileSelected, this, &HarddiskDialog::onExistingFileSelected); } else { - QStringList filters({ tr("Raw image") % util::DlgFilter({ "img" }, true), - tr("HDI image") % util::DlgFilter({ "hdi" }, true), - tr("HDX image") % util::DlgFilter({ "hdx" }, true), - tr("Fixed-size VHD") % util::DlgFilter({ "vhd" }, true), - tr("Dynamic-size VHD") % util::DlgFilter({ "vhd" }, true), - tr("Differencing VHD") % util::DlgFilter({ "vhd" }, true) }); - ui->fileField->setFilter(filters.join(";;")); setWindowTitle(tr("Add New Hard Disk")); ui->fileField->setCreateFile(true); - connect(ui->fileField, &FileField::fileSelected, this, [this, filters] { + // Enable the OK button as long as the filename length is non-zero + connect(ui->fileField, &FileField::fileTextEntered, this, [this] { + ui->buttonBox->button(QDialogButtonBox::Ok)->setEnabled((this->fileName().length() > 0)); + }); + + connect(ui->fileField, &FileField::fileSelected, this, [this] { int filter = filters.indexOf(ui->fileField->selectedFilter()); if (filter > -1) ui->comboBoxFormat->setCurrentIndex(filter); ui->buttonBox->button(QDialogButtonBox::Ok)->setEnabled(true); }); + // Set the default format to Dynamic-size VHD. Do it last after everything is set up + // so the currentIndexChanged signal can do what is needed + ui->comboBoxFormat->setCurrentIndex(DEFAULT_DISK_FORMAT); + ui->fileField->setselectedFilter(filters.value(DEFAULT_DISK_FORMAT)); } } @@ -179,6 +188,7 @@ HarddiskDialog::on_comboBoxFormat_currentIndexChanged(int index) ui->comboBoxBlockSize->show(); ui->labelBlockSize->show(); } + ui->fileField->setselectedFilter(filters.value(index)); } /* If the disk geometry requested in the 86Box GUI is not compatible with the internal VHD geometry, diff --git a/src/qt/qt_harddiskdialog.hpp b/src/qt/qt_harddiskdialog.hpp index 0d5fa13bc..9de61c51b 100644 --- a/src/qt/qt_harddiskdialog.hpp +++ b/src/qt/qt_harddiskdialog.hpp @@ -52,6 +52,11 @@ private: bool disallowSizeModifications = false; + QStringList filters; + // "Dynamic-size VHD" is number 4 in the `filters` list and the + // comboBoxFormat model + const uint8_t DEFAULT_DISK_FORMAT = 4; + bool checkAndAdjustCylinders(); bool checkAndAdjustHeads(); bool checkAndAdjustSectors(); diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 7d37c0c84..04317800d 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1092,6 +1092,11 @@ MainWindow::processMacKeyboardInput(bool down, const QKeyEvent *event) if (mac_iso_swap) nvk = (nvk == 0x0a) ? 0x32 : 0x0a; } + // Special case for command + forward delete to send insert. + if ((event->nativeModifiers() & NSEventModifierFlagCommand) && + ((event->nativeVirtualKey() == nvk_Delete) || event->key() == Qt::Key_Delete)) { + nvk = nvk_Insert; // Qt::Key_Help according to event->key() + } processKeyboardInput(down, nvk); } @@ -1294,7 +1299,7 @@ MainWindow::keyReleaseEvent(QKeyEvent *event) fs_on_signal = false; } - if (!send_keyboard_input) + if (!send_keyboard_input || event->isAutoRepeat()) return; #ifdef Q_OS_MACOS diff --git a/src/qt/qt_settingsdisplay.cpp b/src/qt/qt_settingsdisplay.cpp index e64dc74dd..5f2f81c58 100644 --- a/src/qt/qt_settingsdisplay.cpp +++ b/src/qt/qt_settingsdisplay.cpp @@ -36,7 +36,7 @@ SettingsDisplay::SettingsDisplay(QWidget *parent) { ui->setupUi(this); - videoCard[0] = gfxcard[0]; + videoCard[0] = gfxcard[0]; videoCard[1] = gfxcard[1]; onCurrentMachineChanged(machine); } @@ -102,6 +102,11 @@ SettingsDisplay::onCurrentMachineChanged(int machineId) ui->comboBoxVideoSecondary->setEnabled(true); ui->pushButtonConfigureSecondary->setEnabled(true); } + if (video_card_get_flags(gfxcard[0]) != VIDEO_FLAG_TYPE_8514) + ibm8514_has_vga = 0; + if (video_card_get_flags(gfxcard[0]) != VIDEO_FLAG_TYPE_XGA) + xga_has_vga = 0; + ui->comboBoxVideo->setCurrentIndex(selectedRow); if (gfxcard[1] == 0) ui->pushButtonConfigureSecondary->setEnabled(false); @@ -123,10 +128,12 @@ SettingsDisplay::on_pushButtonConfigureVoodoo_clicked() void SettingsDisplay::on_pushButtonConfigureXga_clicked() { - if (machine_has_bus(machineId, MACHINE_BUS_MCA) > 0) { - DeviceConfig::ConfigureDevice(&xga_device, 0, qobject_cast(Settings::settings)); - } else { - DeviceConfig::ConfigureDevice(&xga_isa_device, 0, qobject_cast(Settings::settings)); + if (!xga_has_vga) { + if (machine_has_bus(machineId, MACHINE_BUS_MCA) > 0) { + DeviceConfig::ConfigureDevice(&xga_device, 0, qobject_cast(Settings::settings)); + } else { + DeviceConfig::ConfigureDevice(&xga_isa_device, 0, qobject_cast(Settings::settings)); + } } } @@ -139,7 +146,6 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index) auto curVideoCard_2 = videoCard[1]; videoCard[0] = ui->comboBoxVideo->currentData().toInt(); ui->pushButtonConfigure->setEnabled(video_card_has_config(videoCard[0]) > 0); - bool machineHasPci = machine_has_bus(machineId, MACHINE_BUS_PCI) > 0; ui->checkBoxVoodoo->setEnabled(machineHasPci); if (machineHasPci) { @@ -149,16 +155,16 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index) bool hasIsa16 = machine_has_bus(machineId, MACHINE_BUS_ISA16) > 0; bool has_MCA = machine_has_bus(machineId, MACHINE_BUS_MCA) > 0; - ui->checkBox8514->setEnabled(hasIsa16 || has_MCA); + ui->checkBox8514->setEnabled((hasIsa16 || has_MCA) && !ibm8514_has_vga); if (hasIsa16 || has_MCA) { ui->checkBox8514->setChecked(ibm8514_enabled); } - ui->checkBoxXga->setEnabled(hasIsa16 || has_MCA); + ui->checkBoxXga->setEnabled((hasIsa16 || has_MCA) && !xga_has_vga); if (hasIsa16 || has_MCA) ui->checkBoxXga->setChecked(xga_enabled); - ui->pushButtonConfigureXga->setEnabled((hasIsa16 || has_MCA) && ui->checkBoxXga->isChecked()); + ui->pushButtonConfigureXga->setEnabled((hasIsa16 || has_MCA) && ui->checkBoxXga->isChecked() && !xga_has_vga); int c = 2; @@ -187,7 +193,7 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index) c++; } - if (videoCard[1] == 0 || (machine_has_flags(machineId, MACHINE_VIDEO_ONLY) > 0)) { + if ((videoCard[1] == 0) || (machine_has_flags(machineId, MACHINE_VIDEO_ONLY) > 0)) { ui->comboBoxVideoSecondary->setCurrentIndex(0); ui->pushButtonConfigureSecondary->setEnabled(false); } @@ -202,7 +208,7 @@ SettingsDisplay::on_checkBoxVoodoo_stateChanged(int state) void SettingsDisplay::on_checkBoxXga_stateChanged(int state) { - ui->pushButtonConfigureXga->setEnabled(state == Qt::Checked); + ui->pushButtonConfigureXga->setEnabled((state == Qt::Checked) && !xga_has_vga); } void diff --git a/src/qt/qt_settingsmachine.cpp b/src/qt/qt_settingsmachine.cpp index 76c89c6c1..569d1f6c3 100644 --- a/src/qt/qt_settingsmachine.cpp +++ b/src/qt/qt_settingsmachine.cpp @@ -110,11 +110,7 @@ SettingsMachine::save() cpu = ui->comboBoxSpeed->currentData().toInt(); fpu_type = ui->comboBoxFPU->currentData().toInt(); cpu_use_dynarec = ui->checkBoxDynamicRecompiler->isChecked() ? 1 : 0; - fpu_softfloat = (ui->checkBoxFPUSoftfloat->isChecked() && !cpu_use_dynarec) ? 1 : 0; - if (!strcmp(machines[machine].internal_name, "ibmps2_m70_type4")) { - cpu_use_dynarec = 0; - fpu_softfloat = 1; - } + fpu_softfloat = ui->checkBoxFPUSoftfloat->isChecked() ? 1 : 0; int64_t temp_mem_size; if (machine_get_ram_granularity(machine) < 1024) { @@ -281,25 +277,17 @@ SettingsMachine::on_comboBoxSpeed_currentIndexChanged(int index) if (!(flags & CPU_SUPPORTS_DYNAREC)) { ui->checkBoxDynamicRecompiler->setChecked(false); ui->checkBoxDynamicRecompiler->setEnabled(false); - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(cpu_use_dynarec ? false : true); } else if (flags & CPU_REQUIRES_DYNAREC) { ui->checkBoxDynamicRecompiler->setChecked(true); ui->checkBoxDynamicRecompiler->setEnabled(false); - ui->checkBoxFPUSoftfloat->setChecked(false); - ui->checkBoxFPUSoftfloat->setEnabled(false); } else { ui->checkBoxDynamicRecompiler->setChecked(cpu_use_dynarec); ui->checkBoxDynamicRecompiler->setEnabled(true); - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(cpu_use_dynarec ? false : true); } -#else - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(true); #endif // win_settings_machine_recalc_fpu + int machineId = ui->comboBoxMachine->currentData().toInt(); auto *modelFpu = ui->comboBoxFPU->model(); int removeRows = modelFpu->rowCount(); @@ -317,6 +305,10 @@ SettingsMachine::on_comboBoxSpeed_currentIndexChanged(int index) ui->comboBoxFPU->setEnabled(modelFpu->rowCount() > 1); ui->comboBoxFPU->setCurrentIndex(-1); ui->comboBoxFPU->setCurrentIndex(selectedFpuRow); + + ui->checkBoxFPUSoftfloat->setChecked(machine_has_flags(machineId, MACHINE_SOFTFLOAT_ONLY) ? true : fpu_softfloat); + ui->checkBoxFPUSoftfloat->setEnabled(machine_has_flags(machineId, MACHINE_SOFTFLOAT_ONLY) ? false : true); + } void diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index b20a4b4ab..d100902d2 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -976,7 +976,9 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev) break; case 0xc6: case 0xc7: - if ((!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "TOSHIBA_CD-ROM_DRIVEXM_3433"))) { + if (!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "TOSHIBA_CD-ROM_DRIVEXM_3433") || + !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "TOSHIBA_CD-ROM_XM-3301TA_0272") || + !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "TOSHIBA_CD-ROM_XM-5701TA_3136")) { bytes_per_second = 176.0 * 1024.0; bytes_per_second *= (double) dev->drv->cur_speed; } @@ -1000,7 +1002,15 @@ scsi_cdrom_command_common(scsi_cdrom_t *dev) break; case 0xc3: if (!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "SONY_CD-ROM_CDU-541_1.0i") || - !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "SONY_CD-ROM_CDU-76S_1.00")) { + !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "SONY_CD-ROM_CDU-76S_1.00") || + !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "PIONEER_CD-ROM_DRM-604X_2403")) { + bytes_per_second = 176.0 * 1024.0; + bytes_per_second *= (double) dev->drv->cur_speed; + } + break; + case 0xde: + if (!strcmp(cdrom_drive_types[dev->drv->type].internal_name, "NEC_CD-ROM_DRIVE74_1.00") || + !strcmp(cdrom_drive_types[dev->drv->type].internal_name, "NEC_CD-ROM_DRIVE464_1.05")) { bytes_per_second = 176.0 * 1024.0; bytes_per_second *= (double) dev->drv->cur_speed; } diff --git a/src/scsi/scsi_pcscsi.c b/src/scsi/scsi_pcscsi.c index f3dc6ebaf..c0244ed4f 100644 --- a/src/scsi/scsi_pcscsi.c +++ b/src/scsi/scsi_pcscsi.c @@ -379,9 +379,9 @@ esp_get_cmd(esp_t *dev, uint32_t maxlen) dma_set_drq(dev->DmaChannel, 0); } else { esp_pci_dma_memory_rw(dev, buf, dmalen, WRITE_TO_DEVICE); - dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); - fifo8_push_all(&dev->cmdfifo, buf, dmalen); } + dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); + fifo8_push_all(&dev->cmdfifo, buf, dmalen); } else { dmalen = MIN(fifo8_num_used(&dev->fifo), maxlen); esp_log("ESP Get command, dmalen = %i\n", dmalen); @@ -545,6 +545,8 @@ esp_hard_reset(esp_t *dev) dev->do_cmd = 0; dev->rregs[ESP_CFG1] = dev->mca ? dev->HostID : 7; esp_log("ESP Reset\n"); + for (uint8_t i = 0; i < 16; i++) + scsi_device_reset(&scsi_devices[dev->bus][i]); timer_stop(&dev->timer); } @@ -569,7 +571,6 @@ esp_do_nodma(esp_t *dev, scsi_device_t *sd) esp_do_cmd(dev); } else { dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); - ; esp_log("CDB offset = %i used\n", dev->cmdfifo_cdb_offset); dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; @@ -665,7 +666,7 @@ esp_do_dma(esp_t *dev, scsi_device_t *sd) count = tdbc = esp_get_tc(dev); - if (dev->mca) { /*See the comment in the esp_do_busid_cmd() function.*/ + if (dev->mca) { if (sd->buffer_length < 0) { if (dev->dma_enabled) goto done; @@ -713,7 +714,7 @@ esp_do_dma(esp_t *dev, scsi_device_t *sd) return; } - esp_log("ESP SCSI dmaleft = %d, async_len = %i, buffer length = %d\n", esp_get_tc(dev), sd->buffer_length); + esp_log("ESP SCSI dmaleft = %d, buffer length = %d\n", esp_get_tc(dev), sd->buffer_length); /* Make sure count is never bigger than buffer_length. */ if (count > dev->xfer_counter) @@ -1082,6 +1083,9 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) esp_pci_soft_reset(dev); break; case CMD_BUSRESET: + for (uint8_t i = 0; i < 16; i++) + scsi_device_reset(&scsi_devices[dev->bus][i]); + if (!(dev->wregs[ESP_CFG1] & CFG1_RESREPT)) { dev->rregs[ESP_RINTR] |= INTR_RST; esp_log("ESP Bus Reset with IRQ\n"); diff --git a/src/sio/sio_82091aa.c b/src/sio/sio_82091aa.c index 4011f7ecf..800bf1b1a 100644 --- a/src/sio/sio_82091aa.c +++ b/src/sio/sio_82091aa.c @@ -35,9 +35,10 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t cur_reg, has_ide, - regs[81]; +typedef struct i82091aa_t { + uint8_t cur_reg; + uint8_t has_ide; + uint8_t regs[81]; uint16_t base_address; fdc_t *fdc; serial_t *uart[2]; @@ -71,6 +72,9 @@ lpt1_handler(i82091aa_t *dev) case 3: lpt_port = 0x000; break; + + default: + break; } if ((dev->regs[0x20] & 0x01) && lpt_port) @@ -112,6 +116,9 @@ serial_handler(i82091aa_t *dev, int uart) case 0x07: uart_port = COM3_ADDR; break; + + default: + break; } if (dev->regs[reg] & 0x01) @@ -193,6 +200,9 @@ i82091aa_write(uint16_t port, uint8_t val, void *priv) if (dev->has_ide && (valxor & 0x03)) ide_handler(dev); break; + + default: + break; } } diff --git a/src/sio/sio_acc3221.c b/src/sio/sio_acc3221.c index f5c671c3a..10250d602 100644 --- a/src/sio/sio_acc3221.c +++ b/src/sio/sio_acc3221.c @@ -31,6 +31,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> typedef struct acc3221_t { int reg_idx; @@ -344,9 +345,9 @@ acc3221_serial2_handler(acc3221_t *dev) } static void -acc3221_write(uint16_t addr, uint8_t val, void *p) +acc3221_write(uint16_t addr, uint8_t val, void *priv) { - acc3221_t *dev = (acc3221_t *) p; + acc3221_t *dev = (acc3221_t *) priv; uint8_t old; if (!(addr & 1)) @@ -405,14 +406,17 @@ acc3221_write(uint16_t addr, uint8_t val, void *p) ide_pri_enable(); } break; + + default: + break; } } } static uint8_t -acc3221_read(uint16_t addr, void *p) +acc3221_read(uint16_t addr, void *priv) { - acc3221_t *dev = (acc3221_t *) p; + acc3221_t *dev = (acc3221_t *) priv; if (!(addr & 1)) return dev->reg_idx; @@ -448,7 +452,7 @@ acc3221_close(void *priv) } static void * -acc3221_init(const device_t *info) +acc3221_init(UNUSED(const device_t *info)) { acc3221_t *dev = (acc3221_t *) malloc(sizeof(acc3221_t)); memset(dev, 0, sizeof(acc3221_t)); diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index 68d674b11..25fb1aa65 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -37,13 +37,14 @@ #define AB_RST 0x80 -typedef struct { - uint8_t chip_id, is_apm, - tries, - regs[48], - ld_regs[13][256]; - int locked, - cur_reg; +typedef struct ali5123_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t regs[48]; + uint8_t ld_regs[13][256]; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[3]; } ali5123_t; @@ -125,6 +126,9 @@ ali5123_serial_handler(ali5123_t *dev, int uart) case 0x05: serial_set_clock_src(dev->uart[uart], 2000000.0); break; + + default: + break; } } @@ -256,6 +260,10 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) case 0x07: if (dev->cur_reg == 0xf0) val &= 0xbf; + break; + + default: + break; } dev->ld_regs[cur_ld][dev->cur_reg] = val; } @@ -288,6 +296,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) ali5123_serial_handler(dev, 2); } break; + + default: + break; } return; @@ -332,6 +343,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x08) fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3); break; + + default: + break; } break; case 3: @@ -346,6 +360,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_lpt_handler(dev); break; + + default: + break; } break; case 4: @@ -361,6 +378,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, 0); break; + + default: + break; } break; case 5: @@ -376,6 +396,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 2 : 1); break; + + default: + break; } break; case 0x0b: @@ -391,8 +414,14 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 1 : 2); break; + + default: + break; } break; + + default: + break; } } diff --git a/src/sio/sio_detect.c b/src/sio/sio_detect.c index 36c12cd54..01c41224a 100644 --- a/src/sio/sio_detect.c +++ b/src/sio/sio_detect.c @@ -26,8 +26,9 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct sio_detect_t { uint8_t regs[2]; } sio_detect_t; @@ -62,7 +63,7 @@ sio_detect_close(void *priv) } static void * -sio_detect_init(const device_t *info) +sio_detect_init(UNUSED(const device_t *info)) { sio_detect_t *dev = (sio_detect_t *) malloc(sizeof(sio_detect_t)); memset(dev, 0, sizeof(sio_detect_t)); diff --git a/src/sio/sio_f82c710.c b/src/sio/sio_f82c710.c index ad347fb03..fc0eb2aae 100644 --- a/src/sio/sio_f82c710.c +++ b/src/sio/sio_f82c710.c @@ -151,6 +151,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0xc0: uart2_int = COM2_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x30) { @@ -163,6 +166,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x30: uart2_int = COM1_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x0c) { @@ -175,6 +181,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x0c: lpt1_int = LPT2_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x03) { @@ -187,6 +196,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x03: lpt1_int = LPT1_IRQ; break; + + default: + break; } if (dev->regs[0] & 1) { diff --git a/src/sio/sio_fdc37c669.c b/src/sio/sio_fdc37c669.c index 219213d69..3a1bcf5af 100644 --- a/src/sio/sio_fdc37c669.c +++ b/src/sio/sio_fdc37c669.c @@ -32,11 +32,13 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, tries, - regs[42]; - int locked, rw_locked, - cur_reg; +typedef struct fdc37c669_t { + uint8_t id; + uint8_t tries; + uint8_t regs[42]; + int locked; + int rw_locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; } fdc37c669_t; @@ -62,6 +64,9 @@ make_port(fdc37c669_t *dev, uint8_t reg) case 0x25: mask = 0xfe; break; + + default: + break; } p = ((uint16_t) (dev->regs[reg] & mask)) << 2; @@ -217,6 +222,9 @@ fdc37c669_write(uint16_t port, uint8_t val, void *priv) serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); } break; + + default: + break; } } diff --git a/src/sio/sio_fdc37c67x.c b/src/sio/sio_fdc37c67x.c index 35c7ccc5b..3cfa5a38d 100644 --- a/src/sio/sio_fdc37c67x.c +++ b/src/sio/sio_fdc37c67x.c @@ -33,19 +33,23 @@ #include <86box/fdc.h> #include "cpu.h" #include <86box/sio.h> +#include <86box/plat_unused.h> #define AB_RST 0x80 -typedef struct { - uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, sio_base; - int locked, - cur_reg; +typedef struct fdc37c67x_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t gpio_regs[2]; + uint8_t auxio_reg; + uint8_t regs[48]; + uint8_t ld_regs[11][256]; + uint16_t gpio_base; /* Set to EA */ + uint16_t auxio_base; + uint16_t sio_base; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; } fdc37c67x_t; @@ -65,7 +69,7 @@ make_port(fdc37c67x_t *dev, uint8_t ld) } static uint8_t -fdc37c67x_auxio_read(uint16_t port, void *priv) +fdc37c67x_auxio_read(UNUSED(uint16_t port), void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; @@ -73,7 +77,7 @@ fdc37c67x_auxio_read(uint16_t port, void *priv) } static void -fdc37c67x_auxio_write(uint16_t port, uint8_t val, void *priv) +fdc37c67x_auxio_write(UNUSED(uint16_t port), uint8_t val, void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; @@ -168,7 +172,7 @@ fdc37c67x_auxio_handler(fdc37c67x_t *dev) } static void -fdc37c67x_sio_handler(fdc37c67x_t *dev) +fdc37c67x_sio_handler(UNUSED(fdc37c67x_t *dev)) { #if 0 if (dev->sio_base) { @@ -207,6 +211,9 @@ fdc37c67x_gpio_handler(fdc37c67x_t *dev) case 3: ld_port = 0xea; /* Default */ break; + + default: + break; } dev->gpio_base = ld_port; if (ld_port > 0x0000) @@ -279,6 +286,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0x02: case 0x07: return; + + default: + break; } dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; } @@ -306,6 +316,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0x26: case 0x27: fdc37c67x_sio_handler(dev); + + default: + break; } return; @@ -359,6 +372,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x18) fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); break; + + default: + break; } break; case 3: @@ -375,6 +391,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 4: @@ -391,6 +410,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 5: @@ -407,6 +429,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 8: @@ -423,8 +448,14 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0xb5: fdc37c67x_smi_handler(dev); break; + + default: + break; } break; + + default: + break; } } @@ -570,7 +601,9 @@ fdc37c67x_init(const device_t *info) dev->chip_id = info->local & 0xff; dev->gpio_regs[0] = 0xff; - // dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#if 0 + dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#endif dev->gpio_regs[1] = (dev->chip_id == 0x30) ? 0xff : 0xfd; fdc37c67x_reset(dev); diff --git a/src/sio/sio_fdc37c6xx.c b/src/sio/sio_fdc37c6xx.c index 8400ca1e0..10eccf97c 100644 --- a/src/sio/sio_fdc37c6xx.c +++ b/src/sio/sio_fdc37c6xx.c @@ -35,12 +35,15 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t max_reg, chip_id, - tries, has_ide, - regs[16]; - int cur_reg, - com3_addr, com4_addr; +typedef struct fdc37c6xx_t { + uint8_t max_reg; + uint8_t chip_id; + uint8_t tries; + uint8_t has_ide; + uint8_t regs[16]; + int cur_reg; + int com3_addr; + int com4_addr; fdc_t *fdc; serial_t *uart[2]; } fdc37c6xx_t; @@ -65,6 +68,9 @@ set_com34_addr(fdc37c6xx_t *dev) dev->com3_addr = 0x220; dev->com4_addr = 0x228; break; + + default: + break; } } @@ -92,6 +98,9 @@ set_serial_addr(fdc37c6xx_t *dev, int port) case 3: serial_setup(dev->uart[port], dev->com4_addr, COM4_IRQ); break; + + default: + break; } } @@ -115,6 +124,9 @@ lpt1_handler(fdc37c6xx_t *dev) lpt1_init(LPT2_ADDR); lpt1_irq(7 /*5*/); break; + + default: + break; } } @@ -206,6 +218,9 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x20) fdc_set_swap(dev->fdc, (dev->regs[5] & 0x20) >> 5); break; + + default: + break; } } } else if ((port == FDC_PRIMARY_ADDR) && (val == 0x55)) diff --git a/src/sio/sio_fdc37c93x.c b/src/sio/sio_fdc37c93x.c index 80f451e06..0330297fb 100644 --- a/src/sio/sio_fdc37c93x.c +++ b/src/sio/sio_fdc37c93x.c @@ -35,10 +35,11 @@ #include <86box/apm.h> #include <86box/acpi.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define AB_RST 0x80 -typedef struct { +typedef struct access_bus_t { uint8_t control; uint8_t status; uint8_t own_addr; @@ -47,16 +48,19 @@ typedef struct { uint16_t base; } access_bus_t; -typedef struct { - uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, nvr_sec_base; - int locked, - cur_reg; +typedef struct fdc37c93x_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t gpio_regs[2]; + uint8_t auxio_reg; + uint8_t regs[48]; + uint8_t ld_regs[11][256]; + uint16_t gpio_base; /* Set to EA */ + uint16_t auxio_base; + uint16_t nvr_sec_base; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; access_bus_t *access_bus; @@ -87,7 +91,7 @@ make_port_sec(fdc37c93x_t *dev, uint8_t ld) } static uint8_t -fdc37c93x_auxio_read(uint16_t port, void *priv) +fdc37c93x_auxio_read(UNUSED(uint16_t port), void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; @@ -95,7 +99,7 @@ fdc37c93x_auxio_read(uint16_t port, void *priv) } static void -fdc37c93x_auxio_write(uint16_t port, uint8_t val, void *priv) +fdc37c93x_auxio_write(UNUSED(uint16_t port), uint8_t val, void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; @@ -239,6 +243,9 @@ fdc37c93x_gpio_handler(fdc37c93x_t *dev) case 3: ld_port = 0xea; /* Default */ break; + + default: + break; } dev->gpio_base = ld_port; if (ld_port > 0x0000) @@ -266,6 +273,9 @@ fdc37c93x_access_bus_read(uint16_t port, void *priv) case 3: ret = (dev->clock & 0x87); break; + + default: + break; } return ret; @@ -290,6 +300,9 @@ fdc37c93x_access_bus_write(uint16_t port, uint8_t val, void *priv) dev->clock &= 0x80; dev->clock |= (val & 0x07); break; + + default: + break; } } @@ -410,6 +423,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (!dev->is_apm) return; break; + + default: + break; } dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; } @@ -436,6 +452,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if ((valxor & 0x40) && (dev->chip_id != 0x02)) fdc37c93x_access_bus_handler(dev); break; + + default: + break; } return; @@ -489,6 +508,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x18) fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); break; + + default: + break; } break; case 3: @@ -503,6 +525,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_lpt_handler(dev); break; + + default: + break; } break; case 4: @@ -517,6 +542,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_serial_handler(dev, 0); break; + + default: + break; } break; case 5: @@ -531,6 +559,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_serial_handler(dev, 1); break; + + default: + break; } break; case 6: @@ -554,8 +585,8 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) nvr_lock_set(0xe0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x08), dev->nvr); if (dev->ld_regs[6][dev->cur_reg] & 0x80) switch ((dev->ld_regs[6][dev->cur_reg] >> 4) & 0x07) { - case 0x00: default: + case 0x00: nvr_bank_set(0, 0xff, dev->nvr); nvr_bank_set(1, 1, dev->nvr); break; @@ -588,6 +619,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) } } break; + + default: + break; } break; case 8: @@ -600,6 +634,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_auxio_handler(dev); break; + + default: + break; } break; case 9: @@ -614,6 +651,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_access_bus_handler(dev); break; + + default: + break; } break; case 10: @@ -628,8 +668,14 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_acpi_handler(dev); break; + + default: + break; } break; + + default: + break; } } @@ -783,7 +829,7 @@ access_bus_close(void *priv) } static void * -access_bus_init(const device_t *info) +access_bus_init(UNUSED(const device_t *info)) { access_bus_t *dev = (access_bus_t *) malloc(sizeof(access_bus_t)); memset(dev, 0, sizeof(access_bus_t)); @@ -830,7 +876,9 @@ fdc37c93x_init(const device_t *info) is_compaq = (info->local >> 8) & 0x02; dev->gpio_regs[0] = 0xff; - // dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#if 0 + dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#endif dev->gpio_regs[1] = (dev->chip_id == 0x30) ? 0xff : 0xfd; if (dev->chip_id == 0x30) { diff --git a/src/sio/sio_fdc37m60x.c b/src/sio/sio_fdc37m60x.c index af238c51f..190e65453 100644 --- a/src/sio/sio_fdc37m60x.c +++ b/src/sio/sio_fdc37m60x.c @@ -68,9 +68,12 @@ fdc37m60x_log(const char *fmt, ...) # define fdc37m60x_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function; +typedef struct fdc37m60x_t { + uint8_t index; + uint8_t regs[256]; + uint8_t device_regs[10][256]; + uint8_t cfg_lock; + uint8_t ide_function; uint16_t sio_index_port; fdc_t *fdc; @@ -141,6 +144,9 @@ fdc37m60x_write(uint16_t addr, uint8_t val, void *priv) dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val; fdc37m60x_logical_device_handler(dev); break; + + default: + break; } } } else { @@ -242,6 +248,9 @@ fdc37m60x_logical_device_handler(fdc37m60x_t *dev) case 0x05: fdc37m60x_uart_handler(1, dev); break; + + default: + break; } } diff --git a/src/sio/sio_it8661f.c b/src/sio/sio_it8661f.c index 9b3baa188..5e5ccb655 100644 --- a/src/sio/sio_it8661f.c +++ b/src/sio/sio_it8661f.c @@ -32,16 +32,19 @@ #include <86box/fdc.h> #include <86box/fdd_common.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define LDN dev->regs[7] -typedef struct -{ +typedef struct it8661f_t { fdc_t *fdc_controller; serial_t *uart[2]; - uint8_t index, regs[256], device_regs[6][256]; - int unlocked, enumerator; + uint8_t index; + uint8_t regs[256]; + uint8_t device_regs[6][256]; + int unlocked; + int enumerator; } it8661f_t; static uint8_t mb_pnp_key[32] = { 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }; @@ -99,6 +102,9 @@ it8661_fdc(uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[0][addr] = val & 0x0f; break; + + default: + break; } fdc_set_base(dev->fdc_controller, (dev->device_regs[0][0x60] << 8) | (dev->device_regs[0][0x61])); @@ -140,6 +146,9 @@ it8661_serial(int uart, uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[1 + uart][addr] = val & 3; break; + + default: + break; } serial_setup(dev->uart[uart], (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), dev->device_regs[1 + uart][0x70] & 0x0f); @@ -177,6 +186,9 @@ it8661_lpt(uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[3][addr] = val & 3; break; + + default: + break; } lpt1_init((dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61])); @@ -201,6 +213,9 @@ it8661_ldn(uint16_t addr, uint8_t val, it8661f_t *dev) case 3: it8661_lpt(addr, val, dev); break; + + default: + break; } } @@ -246,6 +261,9 @@ it8661f_write(uint16_t addr, uint8_t val, void *priv) } } break; + + default: + break; } return; @@ -300,7 +318,7 @@ it8661f_close(void *priv) } static void * -it8661f_init(const device_t *info) +it8661f_init(UNUSED(const device_t *info)) { it8661f_t *dev = (it8661f_t *) malloc(sizeof(it8661f_t)); memset(dev, 0, sizeof(it8661f_t)); diff --git a/src/sio/sio_pc87306.c b/src/sio/sio_pc87306.c index 088467eeb..656b36d92 100644 --- a/src/sio/sio_pc87306.c +++ b/src/sio/sio_pc87306.c @@ -34,10 +34,12 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t tries, - regs[29], gpio[2]; +typedef struct pc87306_t { + uint8_t tries; + uint8_t regs[29]; + uint8_t gpio[2]; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -112,6 +114,9 @@ lpt1_handler(pc87306_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (dev->regs[0x1b] & 0x10) @@ -165,6 +170,9 @@ serial_handler(pc87306_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x220, irq); break; + + default: + break; } break; case 3: @@ -181,8 +189,14 @@ serial_handler(pc87306_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x228, irq); break; + + default: + break; } break; + + default: + break; } } @@ -324,6 +338,9 @@ pc87306_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); } break; + + default: + break; } } @@ -392,7 +409,7 @@ pc87306_close(void *priv) } static void * -pc87306_init(const device_t *info) +pc87306_init(UNUSED(const device_t *info)) { pc87306_t *dev = (pc87306_t *) malloc(sizeof(pc87306_t)); memset(dev, 0, sizeof(pc87306_t)); diff --git a/src/sio/sio_pc87307.c b/src/sio/sio_pc87307.c index 78cfdcd99..e66467d62 100644 --- a/src/sio/sio_pc87307.c +++ b/src/sio/sio_pc87307.c @@ -35,13 +35,17 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pcregs[16], gpio[2][4], - pm[8]; - uint16_t gpio_base, gpio_base2, - pm_base; +typedef struct pc87307_t { + uint8_t id; + uint8_t pm_idx; + uint8_t regs[48]; + uint8_t ld_regs[256][208]; + uint8_t pcregs[16]; + uint8_t gpio[2][4]; + uint8_t pm[8]; + uint16_t gpio_base; + uint16_t gpio_base2; + uint16_t pm_base; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -74,6 +78,9 @@ pc87307_gpio_read(uint16_t port, void *priv) mask = dev->gpio[bank][0x0001]; ret = (ret & mask) | (pins & ~mask); break; + + default: + break; } return ret; @@ -122,6 +129,9 @@ pc87307_pm_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); serial_handler(dev, 0); break; + + default: + break; } } } @@ -307,6 +317,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0x60: @@ -333,6 +346,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0x61: @@ -364,6 +380,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; pm_handler(dev); break; + + default: + break; } break; case 0x63: @@ -396,6 +415,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0xf0: @@ -416,12 +438,18 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; break; + + default: + break; } break; case 0xf1: if (dev->regs[0x07] == 0x03) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; break; + + default: + break; } } @@ -519,8 +547,10 @@ pc87307_reset(pc87307_t *dev) dev->ld_regs[0x08][0x44] = 0x04; dev->ld_regs[0x08][0x45] = 0x04; - // dev->gpio[0] = 0xff; - // dev->gpio[1] = 0xfb; +#if 0 + dev->gpio[0] = 0xff; + dev->gpio[1] = 0xfb; +#endif dev->gpio[0][0] = 0xff; dev->gpio[0][1] = 0x00; dev->gpio[0][2] = 0x00; diff --git a/src/sio/sio_pc87309.c b/src/sio/sio_pc87309.c index dfa41f601..edd1fb0b8 100644 --- a/src/sio/sio_pc87309.c +++ b/src/sio/sio_pc87309.c @@ -35,10 +35,12 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pm[8]; +typedef struct pc87309_t { + uint8_t id; + uint8_t pm_idx; + uint8_t regs[48]; + uint8_t ld_regs[256][208]; + uint8_t pm[8]; uint16_t pm_base; int cur_reg; fdc_t *fdc; @@ -64,6 +66,9 @@ pc87309_pm_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); serial_handler(dev, 0); break; + + default: + break; } } else dev->pm_idx = val & 0x07; @@ -221,6 +226,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0x60: @@ -244,6 +252,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0x63: @@ -275,6 +286,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; break; + + default: + break; } break; case 0x70: @@ -296,6 +310,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0xf0: @@ -316,12 +333,18 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; break; + + default: + break; } break; case 0xf1: if (dev->regs[0x07] == 0x00) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; break; + + default: + break; } } diff --git a/src/sio/sio_pc87310.c b/src/sio/sio_pc87310.c index eacbadf89..d567bd4d5 100644 --- a/src/sio/sio_pc87310.c +++ b/src/sio/sio_pc87310.c @@ -40,6 +40,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define HAS_IDE_FUNCTIONALITY dev->ide_function @@ -61,9 +62,10 @@ pc87310_log(const char *fmt, ...) # define pc87310_log(fmt, ...) #endif -typedef struct { - uint8_t tries, ide_function, - reg; +typedef struct pc87310_t { + uint8_t tries; + uint8_t ide_function; + uint8_t reg; fdc_t *fdc; serial_t *uart[2]; } pc87310_t; @@ -97,6 +99,9 @@ lpt1_handler(pc87310_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (lpt_port) @@ -127,7 +132,7 @@ serial_handler(pc87310_t *dev, int uart) } static void -pc87310_write(uint16_t port, uint8_t val, void *priv) +pc87310_write(UNUSED(uint16_t port), uint8_t val, void *priv) { pc87310_t *dev = (pc87310_t *) priv; uint8_t valxor; @@ -189,7 +194,7 @@ pc87310_write(uint16_t port, uint8_t val, void *priv) } uint8_t -pc87310_read(uint16_t port, void *priv) +pc87310_read(UNUSED(uint16_t port), void *priv) { pc87310_t *dev = (pc87310_t *) priv; uint8_t ret = 0xff; @@ -219,7 +224,9 @@ pc87310_reset(pc87310_t *dev) serial_handler(dev, 0); serial_handler(dev, 1); fdc_reset(dev->fdc); - // ide_pri_enable(); +#if 0 + ide_pri_enable(); +#endif } static void diff --git a/src/sio/sio_pc87311.c b/src/sio/sio_pc87311.c index c795da8a9..143712692 100644 --- a/src/sio/sio_pc87311.c +++ b/src/sio/sio_pc87311.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define HAS_IDE_FUNCTIONALITY dev->ide_function @@ -64,10 +65,13 @@ pc87311_log(const char *fmt, ...) # define pc87311_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; - uint16_t base, irq; +typedef struct pc87311_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; + uint16_t base; + uint16_t irq; fdc_t *fdc_controller; serial_t *uart[2]; @@ -102,15 +106,21 @@ pc87311_write(uint16_t addr, uint8_t val, void *priv) case 0x02: POWER_TEST = val; break; + + default: + break; } break; + + default: + break; } pc87311_enable(dev); } static uint8_t -pc87311_read(uint16_t addr, void *priv) +pc87311_read(UNUSED(uint16_t addr), void *priv) { pc87311_t *dev = (pc87311_t *) priv; @@ -181,6 +191,9 @@ pc87311_uart_handler(uint8_t num, pc87311_t *dev) dev->base = com4(dev); dev->irq = COM4_IRQ; break; + + default: + break; } serial_setup(dev->uart[num & 1], dev->base, dev->irq); pc87311_log("PC87311-UART%01x: BASE %04x IRQ %01x\n", num & 1, dev->base, dev->irq); @@ -203,6 +216,9 @@ pc87311_lpt_handler(pc87311_t *dev) dev->base = LPT2_ADDR; dev->irq = LPT2_IRQ; break; + + default: + break; } lpt1_init(dev->base); lpt1_irq(dev->irq); diff --git a/src/sio/sio_pc87332.c b/src/sio/sio_pc87332.c index 7f48b899b..5cbf9f694 100644 --- a/src/sio/sio_pc87332.c +++ b/src/sio/sio_pc87332.c @@ -35,9 +35,11 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t tries, has_ide, - fdc_on, regs[15]; +typedef struct pc87332_t { + uint8_t tries; + uint8_t has_ide; + uint8_t fdc_on; + uint8_t regs[15]; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -69,6 +71,9 @@ lpt1_handler(pc87332_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (lpt_port) @@ -105,6 +110,9 @@ serial_handler(pc87332_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x220, COM3_IRQ); break; + + default: + break; } break; case 3: @@ -121,8 +129,14 @@ serial_handler(pc87332_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x228, COM4_IRQ); break; + + default: + break; } break; + + default: + break; } } @@ -238,6 +252,9 @@ pc87332_write(uint16_t port, uint8_t val, void *priv) lpt1_handler(dev); } break; + + default: + break; } } diff --git a/src/sio/sio_prime3b.c b/src/sio/sio_prime3b.c index a204fde5b..32be854c7 100644 --- a/src/sio/sio_prime3b.c +++ b/src/sio/sio_prime3b.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define FSR dev->regs[0xa0] #define ASR dev->regs[0xa1] @@ -56,10 +57,13 @@ prime3b_log(const char *fmt, ...) # define prime3b_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; - uint16_t com3_addr, com4_addr; +typedef struct prime3b_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; + uint16_t com3_addr; + uint16_t com4_addr; fdc_t *fdc_controller; serial_t *uart[2]; @@ -121,17 +125,23 @@ prime3b_write(uint16_t addr, uint8_t val, void *priv) dev->com3_addr = 0x220; dev->com4_addr = 0x228; break; + + default: + break; } break; case 0xa5: /* ECP Register */ dev->regs[0xa5] = val; break; + + default: + break; } } } static uint8_t -prime3b_read(uint16_t addr, void *priv) +prime3b_read(UNUSED(uint16_t addr), void *priv) { prime3b_t *dev = (prime3b_t *) priv; diff --git a/src/sio/sio_prime3c.c b/src/sio/sio_prime3c.c index eae3fe1b2..160f23aab 100644 --- a/src/sio/sio_prime3c.c +++ b/src/sio/sio_prime3c.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #ifdef ENABLE_PRIME3C_LOG int prime3c_do_log = ENABLE_PRIME3C_LOG; @@ -75,9 +76,11 @@ prime3c_log(const char *fmt, ...) /* IDE functionality(Note on Init) */ #define HAS_IDE_FUNCTIONALITY dev->ide_function -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; +typedef struct prime3c_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; fdc_t *fdc_controller; serial_t *uart[2]; @@ -189,14 +192,20 @@ prime3c_write(uint16_t addr, uint8_t val, void *priv) case 0xd8: dev->regs[dev->index] = val; break; + + default: + break; } } break; + + default: + break; } } static uint8_t -prime3c_read(uint16_t addr, void *priv) +prime3c_read(UNUSED(uint16_t addr), void *priv) { prime3c_t *dev = (prime3c_t *) priv; diff --git a/src/sio/sio_um8669f.c b/src/sio/sio_um8669f.c index bd153a9e4..256c614ae 100644 --- a/src/sio/sio_um8669f.c +++ b/src/sio/sio_um8669f.c @@ -37,6 +37,7 @@ #include <86box/gameport.h> #include <86box/sio.h> #include <86box/isapnp.h> +#include <86box/plat_unused.h> /* This ROM was reconstructed out of many assumptions, some of which based on the IT8671F. */ static uint8_t um8669f_pnp_rom[] = { @@ -112,7 +113,8 @@ um8669f_log(const char *fmt, ...) #endif typedef struct um8669f_t { - int locked, cur_reg_108; + int locked; + int cur_reg_108; void *pnp_card; isapnp_device_config_t *pnp_config[5]; @@ -184,6 +186,9 @@ um8669f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *pri um8669f_log("UM8669F: Game port disabled\n"); gameport_remap(dev->gameport, 0); } + + default: + break; } } @@ -263,7 +268,7 @@ um8669f_close(void *priv) } static void * -um8669f_init(const device_t *info) +um8669f_init(UNUSED(const device_t *info)) { um8669f_log("UM8669F: init()\n"); diff --git a/src/sio/sio_vt82c686.c b/src/sio/sio_vt82c686.c index b03207041..f22af07df 100644 --- a/src/sio/sio_vt82c686.c +++ b/src/sio/sio_vt82c686.c @@ -31,10 +31,17 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t cur_reg, last_val, regs[25], - fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; +typedef struct vt82c686_t { + uint8_t cur_reg; + uint8_t last_val; + uint8_t regs[25]; + uint8_t fdc_dma; + uint8_t fdc_irq; + uint8_t uart_irq[2]; + uint8_t lpt_dma; + uint8_t lpt_irq; fdc_t *fdc; serial_t *uart[2]; } vt82c686_t; @@ -189,6 +196,9 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv) dev->regs[reg] &= 0xf7; vt82c686_fdc_handler(dev); break; + + default: + break; } } @@ -242,6 +252,9 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv) if (val & 0x02) io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); break; + + default: + break; } } @@ -272,7 +285,7 @@ vt82c686_close(void *priv) } static void * -vt82c686_init(const device_t *info) +vt82c686_init(UNUSED(const device_t *info)) { vt82c686_t *dev = (vt82c686_t *) malloc(sizeof(vt82c686_t)); memset(dev, 0, sizeof(vt82c686_t)); diff --git a/src/sio/sio_w83787f.c b/src/sio/sio_w83787f.c index 280bab6e9..1870741c7 100644 --- a/src/sio/sio_w83787f.c +++ b/src/sio/sio_w83787f.c @@ -74,13 +74,16 @@ w83787_log(const char *fmt, ...) #define HAS_IDE_FUNCTIONALITY dev->ide_function -typedef struct { - uint8_t tries, regs[42]; +typedef struct w83787f_t { + uint8_t tries; + uint8_t regs[42]; uint16_t reg_init; - int locked, rw_locked, - cur_reg, - key, ide_function, - ide_start; + int locked; + int rw_locked; + int cur_reg; + int key; + int ide_function; + int ide_start; fdc_t *fdc; serial_t *uart[2]; void *gameport; @@ -342,6 +345,9 @@ w83787f_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x20) w83787f_remap(dev); break; + + default: + break; } } diff --git a/src/sio/sio_w83877f.c b/src/sio/sio_w83877f.c index 4f8b45118..8cbb82876 100644 --- a/src/sio/sio_w83877f.c +++ b/src/sio/sio_w83877f.c @@ -56,13 +56,16 @@ #define PRTIQS (dev->regs[0x27] & 0x0f) #define ECPIRQ ((dev->regs[0x27] >> 5) & 0x07) -typedef struct { - uint8_t tries, regs[42]; - uint16_t reg_init; - int locked, rw_locked, - cur_reg, - base_address, key, - key_times; +typedef struct w83877f_t { + uint8_t tries; + uint8_t regs[42]; + uint16_t reg_init; + int locked; + int rw_locked; + int cur_reg; + int base_address; + int key; + int key_times; fdc_t *fdc; serial_t *uart[2]; } w83877f_t; @@ -140,6 +143,9 @@ make_port(w83877f_t *dev, uint8_t reg) if ((p < 0x100) || (p > 0x3F8)) p = COM2_ADDR; break; + + default: + break; } return p; @@ -358,6 +364,9 @@ w83877f_write(uint16_t port, uint8_t val, void *priv) w83877f_serial_handler(dev, 0); } break; + + default: + break; } } diff --git a/src/sio/sio_w83977f.c b/src/sio/sio_w83977f.c index 30a4c8b52..063f0ca69 100644 --- a/src/sio/sio_w83977f.c +++ b/src/sio/sio_w83977f.c @@ -36,13 +36,17 @@ #define HEFRAS (dev->regs[0x26] & 0x40) -typedef struct { - uint8_t id, tries, - regs[48], - dev_regs[256][208]; - int locked, rw_locked, - cur_reg, base_address, - type, hefras; +typedef struct w83977f_t { + uint8_t id; + uint8_t tries; + uint8_t regs[48]; + uint8_t dev_regs[256][208]; + int locked; + int rw_locked; + int cur_reg; + int base_address; + int type; + int hefras; fdc_t *fdc; serial_t *uart[2]; } w83977f_t; @@ -145,6 +149,9 @@ w83977f_serial_handler(w83977f_t *dev, int uart) case 0x03: clock_src = 24000000.0 / 1.625; break; + + default: + break; } serial_set_clock_src(dev->uart[uart], clock_src); @@ -194,8 +201,10 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) switch (dev->cur_reg) { case 0x02: - /* if (valxor & 0x02) - softresetx86(); */ +#if 0 + if (valxor & 0x02) + softresetx86(); +#endif break; case 0x22: if (valxor & 0x20) @@ -226,6 +235,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0x60: @@ -242,6 +254,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0x70: @@ -257,6 +272,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0xf0: @@ -281,6 +299,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x03) w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0xf1: @@ -298,6 +319,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x01)) fdc_set_swwp(dev->fdc, (val & 0x01) ? 1 : 0); break; + + default: + break; } break; case 0xf2: @@ -315,6 +339,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x03)) fdc_update_rwc(dev->fdc, 0, val & 0x03); break; + + default: + break; } break; case 0xf4: @@ -329,8 +356,14 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x18)) fdc_update_drvrate(dev->fdc, dev->cur_reg & 0x03, (val & 0x18) >> 3); break; + + default: + break; } break; + + default: + break; } } diff --git a/src/sound/CMakeLists.txt b/src/sound/CMakeLists.txt index c530d7ac8..ec4f8823b 100644 --- a/src/sound/CMakeLists.txt +++ b/src/sound/CMakeLists.txt @@ -85,12 +85,13 @@ if(RTMIDI) endif() if(FLUIDSYNTH) - if(APPLE) - find_library(FLUIDSYNTH_LIB fluidsynth) - if (NOT FLUIDSYNTH_LIB) - message(WARNING "Could not find fluid synth. The library will not be bundled and any related features will not work.") - endif() - endif () + find_package(PkgConfig REQUIRED) + pkg_check_modules(FLUIDSYNTH REQUIRED IMPORTED_TARGET fluidsynth) + target_link_libraries(86Box PkgConfig::FLUIDSYNTH) + if(STATIC_BUILD) + target_link_libraries(86Box -static ${FLUIDSYNTH_STATIC_LIBRARIES} -fopenmp) + endif() + target_compile_definitions(snd PRIVATE USE_FLUIDSYNTH) target_sources(snd PRIVATE midi_fluidsynth.c) endif() diff --git a/src/sound/midi_fluidsynth.c b/src/sound/midi_fluidsynth.c index 2372203d7..efe8159fc 100644 --- a/src/sound/midi_fluidsynth.c +++ b/src/sound/midi_fluidsynth.c @@ -8,104 +8,33 @@ # ifdef __unix__ # include # endif +# define FLUIDSYNTH_NOT_A_DLL +# include # include <86box/86box.h> # include <86box/config.h> # include <86box/device.h> # include <86box/midi.h> -# include <86box/plat.h> -# include <86box/plat_dynld.h> # include <86box/thread.h> # include <86box/sound.h> -# include <86box/ui.h> - -# define FLUID_CHORUS_DEFAULT_N 3 -# define FLUID_CHORUS_DEFAULT_LEVEL 2.0f -# define FLUID_CHORUS_DEFAULT_SPEED 0.3f -# define FLUID_CHORUS_DEFAULT_DEPTH 8.0f -# define FLUID_CHORUS_DEFAULT_TYPE FLUID_CHORUS_MOD_SINE # define RENDER_RATE 100 # define BUFFER_SEGMENTS 10 -enum fluid_chorus_mod { - FLUID_CHORUS_MOD_SINE = 0, - FLUID_CHORUS_MOD_TRIANGLE = 1 -}; - -enum fluid_interp { - FLUID_INTERP_NONE = 0, - FLUID_INTERP_LINEAR = 1, - FLUID_INTERP_DEFAULT = 4, - FLUID_INTERP_4THORDER = 4, - FLUID_INTERP_7THORDER = 7, - FLUID_INTERP_HIGHEST = 7 -}; +/* Check the FluidSynth version to determine wheteher to use the older reverb/chorus + control functions that were deprecated in 2.2.0, or their newer replacements */ +# if (FLUIDSYNTH_VERSION_MAJOR < 2) || ((FLUIDSYNTH_VERSION_MAJOR == 2) && (FLUIDSYNTH_VERSION_MINOR < 2)) +# define USE_OLD_FLUIDSYNTH_API +# endif extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); -static void *fluidsynth_handle; /* handle to FluidSynth DLL */ - -/* Pointers to the real functions. */ -// clang-format off -static void *(*f_new_fluid_settings)(void); -static void (*f_delete_fluid_settings)(void *settings); -static int (*f_fluid_settings_setnum)(void *settings, const char *name, double val); -static int (*f_fluid_settings_getnum)(void *settings, const char *name, double *val); -static void *(*f_new_fluid_synth)(void *settings); -static int (*f_delete_fluid_synth)(void *synth); -static int (*f_fluid_synth_noteon)(void *synth, int chan, int key, int vel); -static int (*f_fluid_synth_noteoff)(void *synth, int chan, int key); -static int (*f_fluid_synth_cc)(void *synth, int chan, int ctrl, int val); -static int (*f_fluid_synth_channel_pressure)(void *synth, int chan, int val); -static int (*f_fluid_synth_sysex)(void *synth, const char *data, int len, char *response, int *response_len, int *handled, int dryrun); -static int (*f_fluid_synth_pitch_bend)(void *synth, int chan, int val); -static int (*f_fluid_synth_program_change)(void *synth, int chan, int program); -static int (*f_fluid_synth_sfload)(void *synth, const char *filename, int reset_presets); -static int (*f_fluid_synth_set_interp_method)(void *synth, int chan, int interp_method); -static void (*f_fluid_synth_set_reverb)(void *synth, double roomsize, double damping, double width, double level); -static void (*f_fluid_synth_set_reverb_on)(void *synth, int on); -static void (*f_fluid_synth_set_chorus)(void *synth, int nr, double level, double speed, double depth_ms, int type); -static void (*f_fluid_synth_set_chorus_on)(void *synth, int on); -static int (*f_fluid_synth_write_s16)(void *synth, int len, void *lout, int loff, int lincr, void *rout, int roff, int rincr); -static int (*f_fluid_synth_write_float)(void *synth, int len, void *lout, int loff, int lincr, void *rout, int roff, int rincr); -static char *(*f_fluid_version_str)(void); -// clang-format on - -static dllimp_t fluidsynth_imports[] = { - // clang-format off - { "new_fluid_settings", &f_new_fluid_settings }, - { "delete_fluid_settings", &f_delete_fluid_settings }, - { "fluid_settings_setnum", &f_fluid_settings_setnum }, - { "fluid_settings_getnum", &f_fluid_settings_getnum }, - { "new_fluid_synth", &f_new_fluid_synth }, - { "delete_fluid_synth", &f_delete_fluid_synth }, - { "fluid_synth_noteon", &f_fluid_synth_noteon }, - { "fluid_synth_noteoff", &f_fluid_synth_noteoff }, - { "fluid_synth_cc", &f_fluid_synth_cc }, - { "fluid_synth_channel_pressure", &f_fluid_synth_channel_pressure }, - { "fluid_synth_sysex", &f_fluid_synth_sysex }, - { "fluid_synth_pitch_bend", &f_fluid_synth_pitch_bend }, - { "fluid_synth_program_change", &f_fluid_synth_program_change }, - { "fluid_synth_sfload", &f_fluid_synth_sfload }, - { "fluid_synth_set_interp_method", &f_fluid_synth_set_interp_method }, - { "fluid_synth_set_reverb", &f_fluid_synth_set_reverb }, - { "fluid_synth_set_reverb_on", &f_fluid_synth_set_reverb_on }, - { "fluid_synth_set_chorus", &f_fluid_synth_set_chorus }, - { "fluid_synth_set_chorus_on", &f_fluid_synth_set_chorus_on }, - { "fluid_synth_write_s16", &f_fluid_synth_write_s16 }, - { "fluid_synth_write_float", &f_fluid_synth_write_float }, - { "fluid_version_str", &f_fluid_version_str }, - { NULL, NULL }, - // clang-format on -}; - typedef struct fluidsynth { - void *settings; - void *synth; - int samplerate; - int sound_font; + fluid_settings_t *settings; + fluid_synth_t *synth; + int samplerate; + int sound_font; thread_t *thread_h; event_t *event, *start_event; @@ -153,7 +82,7 @@ fluidsynth_thread(void *param) float *buf = (float *) ((uint8_t *) data->buffer + buf_pos); memset(buf, 0, buf_size); if (data->synth) - f_fluid_synth_write_float(data->synth, buf_size / (2 * sizeof(float)), buf, 0, 2, buf, 1, 2); + fluid_synth_write_float(data->synth, buf_size / (2 * sizeof(float)), buf, 0, 2, buf, 1, 2); buf_pos += buf_size; if (buf_pos >= data->buf_size) { givealbuffer_midi(data->buffer, data->buf_size / sizeof(float)); @@ -163,7 +92,7 @@ fluidsynth_thread(void *param) int16_t *buf = (int16_t *) ((uint8_t *) data->buffer_int16 + buf_pos); memset(buf, 0, buf_size); if (data->synth) - f_fluid_synth_write_s16(data->synth, buf_size / (2 * sizeof(int16_t)), buf, 0, 2, buf, 1, 2); + fluid_synth_write_s16(data->synth, buf_size / (2 * sizeof(int16_t)), buf, 0, 2, buf, 1, 2); buf_pos += buf_size; if (buf_pos >= data->buf_size) { givealbuffer_midi(data->buffer_int16, data->buf_size / sizeof(int16_t)); @@ -187,24 +116,24 @@ fluidsynth_msg(uint8_t *msg) switch (cmd) { case 0x80: /* Note Off */ - f_fluid_synth_noteoff(data->synth, chan, param1); + fluid_synth_noteoff(data->synth, chan, param1); break; case 0x90: /* Note On */ - f_fluid_synth_noteon(data->synth, chan, param1, param2); + fluid_synth_noteon(data->synth, chan, param1, param2); break; case 0xA0: /* Aftertouch */ break; case 0xB0: /* Control Change */ - f_fluid_synth_cc(data->synth, chan, param1, param2); + fluid_synth_cc(data->synth, chan, param1, param2); break; case 0xC0: /* Program Change */ - f_fluid_synth_program_change(data->synth, chan, param1); + fluid_synth_program_change(data->synth, chan, param1); break; case 0xD0: /* Channel Pressure */ - f_fluid_synth_channel_pressure(data->synth, chan, param1); + fluid_synth_channel_pressure(data->synth, chan, param1); break; case 0xE0: /* Pitch Bend */ - f_fluid_synth_pitch_bend(data->synth, chan, (param2 << 7) | param1); + fluid_synth_pitch_bend(data->synth, chan, (param2 << 7) | param1); break; case 0xF0: /* SysEx */ break; @@ -218,7 +147,7 @@ fluidsynth_sysex(uint8_t *data, unsigned int len) { fluidsynth_t *d = &fsdev; - f_fluid_synth_sysex(d->synth, (const char *) data, len, 0, 0, 0, 0); + fluid_synth_sysex(d->synth, (const char *) data, len, 0, 0, 0, 0); } void * @@ -229,31 +158,12 @@ fluidsynth_init(const device_t *info) memset(data, 0, sizeof(fluidsynth_t)); - /* Try loading the DLL. */ -# ifdef _WIN32 -# if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) - fluidsynth_handle = dynld_module("libfluidsynth.dll", fluidsynth_imports); -# else - fluidsynth_handle = dynld_module("libfluidsynth64.dll", fluidsynth_imports); -# endif -# elif defined __APPLE__ - fluidsynth_handle = dynld_module("libfluidsynth.dylib", fluidsynth_imports); -# else - fluidsynth_handle = dynld_module("libfluidsynth.so.3", fluidsynth_imports); - if (fluidsynth_handle == NULL) - fluidsynth_handle = dynld_module("libfluidsynth.so.2", fluidsynth_imports); -# endif - if (fluidsynth_handle == NULL) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2080, (wchar_t *) IDS_2134); - return NULL; - } + data->settings = new_fluid_settings(); - data->settings = f_new_fluid_settings(); + fluid_settings_setnum(data->settings, "synth.sample-rate", 44100); + fluid_settings_setnum(data->settings, "synth.gain", device_get_config_int("output_gain") / 100.0f); - f_fluid_settings_setnum(data->settings, "synth.sample-rate", 44100); - f_fluid_settings_setnum(data->settings, "synth.gain", device_get_config_int("output_gain") / 100.0f); - - data->synth = f_new_fluid_synth(data->settings); + data->synth = new_fluid_synth(data->settings); const char *sound_font = (char *) device_get_config_string("sound_font"); # ifdef __unix__ @@ -261,10 +171,14 @@ fluidsynth_init(const device_t *info) sound_font = (access("/usr/share/sounds/sf2/FluidR3_GM.sf2", F_OK) == 0 ? "/usr/share/sounds/sf2/FluidR3_GM.sf2" : (access("/usr/share/soundfonts/default.sf2", F_OK) == 0 ? "/usr/share/soundfonts/default.sf2" : "")); # endif - data->sound_font = f_fluid_synth_sfload(data->synth, sound_font, 1); + data->sound_font = fluid_synth_sfload(data->synth, sound_font, 1); if (device_get_config_int("chorus")) { - f_fluid_synth_set_chorus_on(data->synth, 1); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_chorus_on(data->synth, -1, 1); +# else + fluid_synth_set_chorus_on(data->synth, 1); +# endif int chorus_voices = device_get_config_int("chorus_voices"); double chorus_level = device_get_config_int("chorus_level") / 100.0; @@ -277,21 +191,48 @@ fluidsynth_init(const device_t *info) else chorus_waveform = FLUID_CHORUS_MOD_TRIANGLE; - f_fluid_synth_set_chorus(data->synth, chorus_voices, chorus_level, chorus_speed, chorus_depth, chorus_waveform); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_set_chorus_group_nr(data->synth, -1, chorus_voices); + fluid_synth_set_chorus_group_level(data->synth, -1, chorus_level); + fluid_synth_set_chorus_group_speed(data->synth, -1, chorus_speed); + fluid_synth_set_chorus_group_depth(data->synth, -1, chorus_depth); + fluid_synth_set_chorus_group_type(data->synth, -1, chorus_waveform); +# else + fluid_synth_set_chorus(data->synth, chorus_voices, chorus_level, chorus_speed, chorus_depth, chorus_waveform); +# endif } else - f_fluid_synth_set_chorus_on(data->synth, 0); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_chorus_on(data->synth, -1, 0); +# else + fluid_synth_set_chorus_on(data->synth, 0); +# endif if (device_get_config_int("reverb")) { - f_fluid_synth_set_reverb_on(data->synth, 1); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_reverb_on(data->synth, -1, 1); +# else + fluid_synth_set_reverb_on(data->synth, 1); +# endif double reverb_room_size = device_get_config_int("reverb_room_size") / 100.0; double reverb_damping = device_get_config_int("reverb_damping") / 100.0; - int reverb_width = device_get_config_int("reverb_width"); + double reverb_width = device_get_config_int("reverb_width") / 10.0; double reverb_level = device_get_config_int("reverb_level") / 100.0; - f_fluid_synth_set_reverb(data->synth, reverb_room_size, reverb_damping, reverb_width, reverb_level); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_set_reverb_group_roomsize(data->synth, -1, reverb_room_size); + fluid_synth_set_reverb_group_damp(data->synth, -1, reverb_damping); + fluid_synth_set_reverb_group_width(data->synth, -1, reverb_width); + fluid_synth_set_reverb_group_level(data->synth, -1, reverb_level); +# else + fluid_synth_set_reverb(data->synth, reverb_room_size, reverb_damping, reverb_width, reverb_level); +# endif } else - f_fluid_synth_set_reverb_on(data->synth, 0); +# ifndef USE_OLD_FLUIDSYNTH_API + fluid_synth_reverb_on(data->synth, -1, 0); +# else + fluid_synth_set_reverb_on(data->synth, 0); +# endif int interpolation = device_get_config_int("interpolation"); int fs_interpolation = FLUID_INTERP_4THORDER; @@ -305,10 +246,10 @@ fluidsynth_init(const device_t *info) else if (interpolation == 3) fs_interpolation = FLUID_INTERP_7THORDER; - f_fluid_synth_set_interp_method(data->synth, -1, fs_interpolation); + fluid_synth_set_interp_method(data->synth, -1, fs_interpolation); double samplerate; - f_fluid_settings_getnum(data->settings, "synth.sample-rate", &samplerate); + fluid_settings_getnum(data->settings, "synth.sample-rate", &samplerate); data->samplerate = (int) samplerate; if (sound_is_float) { data->buf_size = (data->samplerate / RENDER_RATE) * 2 * sizeof(float) * BUFFER_SEGMENTS; @@ -357,12 +298,12 @@ fluidsynth_close(void *p) thread_wait(data->thread_h); if (data->synth) { - f_delete_fluid_synth(data->synth); + delete_fluid_synth(data->synth); data->synth = NULL; } if (data->settings) { - f_delete_fluid_settings(data->settings); + delete_fluid_settings(data->settings); data->settings = NULL; } @@ -375,12 +316,6 @@ fluidsynth_close(void *p) free(data->buffer_int16); data->buffer_int16 = NULL; } - - /* Unload the DLL if possible. */ - if (fluidsynth_handle != NULL) { - dynld_close(fluidsynth_handle); - fluidsynth_handle = NULL; - } } static const device_config_t fluidsynth_config[] = { @@ -407,7 +342,7 @@ static const device_config_t fluidsynth_config[] = { .name = "chorus", .description = "Chorus", .type = CONFIG_BINARY, - .default_int = 0 + .default_int = 1 }, { .name = "chorus_voices", @@ -429,7 +364,7 @@ static const device_config_t fluidsynth_config[] = { .min = 0, .max = 100 }, - .default_int = 100 + .default_int = 20 }, { .name = "chorus_speed", @@ -437,7 +372,7 @@ static const device_config_t fluidsynth_config[] = { .type = CONFIG_SPINNER, .spinner = { - .min = 30, + .min = 10, .max = 500 }, .default_int = 30 @@ -449,7 +384,7 @@ static const device_config_t fluidsynth_config[] = { .spinner = { .min = 0, - .max = 210 + .max = 2560 }, .default_int = 80 }, @@ -474,7 +409,7 @@ static const device_config_t fluidsynth_config[] = { .name = "reverb", .description = "Reverb", .type = CONFIG_BINARY, - .default_int = 0 + .default_int = 1 }, { .name = "reverb_room_size", @@ -483,7 +418,7 @@ static const device_config_t fluidsynth_config[] = { .spinner = { .min = 0, - .max = 120 + .max = 100 }, .default_int = 20 }, @@ -505,9 +440,9 @@ static const device_config_t fluidsynth_config[] = { .spinner = { .min = 0, - .max = 100 + .max = 1000 }, - .default_int = 1 + .default_int = 5 }, { .name = "reverb_level", diff --git a/src/sound/snd_adlibgold.c b/src/sound/snd_adlibgold.c index c1b2c3867..e4330cba3 100644 --- a/src/sound/snd_adlibgold.c +++ b/src/sound/snd_adlibgold.c @@ -20,7 +20,7 @@ typedef struct adgold_t { int adgold_irq_status; - int irq, dma, hdma; + int irq, dma; uint8_t adgold_eeprom[0x1a]; @@ -547,6 +547,7 @@ adgold_read(uint16_t addr, void *p) temp = adgold->adgold_mma_status; adgold->adgold_mma_status &= ~0xf3; /*JUKEGOLD expects timer status flags to auto-clear*/ adgold_update_irq_status(adgold); + picintc(1 << adgold->irq); break; case 5: if (adgold->adgold_mma_addr >= 0xf) @@ -652,7 +653,8 @@ adgold_timer_poll(void *p) { adgold_t *adgold = (adgold_t *) p; - timer_advance_u64(&adgold->adgold_mma_timer_count, (uint64_t) ((double) TIMER_USEC * 1.88964)); + /*A small timer period will result in hangs.*/ + timer_on_auto(&adgold->adgold_mma_timer_count, 4.88964); if (adgold->adgold_midi_ctrl & 0x3f) { if ((adgold->adgold_midi_ctrl & 0x3f) != 0x3f) { @@ -925,7 +927,7 @@ adgold_init(const device_t *info) adgold->adgold_eeprom[0x10] = 0xff; adgold->adgold_eeprom[0x11] = 0x20; adgold->adgold_eeprom[0x12] = 0x00; - adgold->adgold_eeprom[0x13] = 0xa0; + adgold->adgold_eeprom[0x13] = 0x00; adgold->adgold_eeprom[0x14] = 0x00; adgold->adgold_eeprom[0x15] = 0x388 / 8; /*Present at 388-38f*/ adgold->adgold_eeprom[0x16] = 0x00; @@ -957,6 +959,7 @@ adgold_init(const device_t *info) break; } adgold->adgold_eeprom[0x13] |= (adgold->dma << 3); + adgold->adgold_eeprom[0x14] |= (adgold->dma << 4); memcpy(adgold->adgold_38x_regs, adgold->adgold_eeprom, 0x19); adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f]; adgold->vol_r = attenuation[adgold->adgold_eeprom[0x05] & 0x3f]; diff --git a/src/timer.c b/src/timer.c index 2d75e532e..dde6fbdbc 100644 --- a/src/timer.c +++ b/src/timer.c @@ -159,12 +159,12 @@ timer_init(void) } void -timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer) +timer_add(pc_timer_t *timer, void (*callback)(void *p), void *priv, int start_timer) { memset(timer, 0, sizeof(pc_timer_t)); timer->callback = callback; - timer->p = p; + timer->p = priv; timer->flags = 0; timer->prev = timer->next = NULL; if (start_timer) diff --git a/src/unix/unix.c b/src/unix/unix.c index 4579f21d0..c9be5d80f 100644 --- a/src/unix/unix.c +++ b/src/unix/unix.c @@ -36,6 +36,7 @@ #include <86box/unix_sdl.h> #include <86box/timer.h> #include <86box/nvr.h> +#include <86box/version.h> #include <86box/video.h> #include <86box/ui.h> #include <86box/gdbstub.h> diff --git a/src/upi42.c b/src/upi42.c index e35a0752f..79f4ec9c2 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -18,6 +18,7 @@ #include #include #include +#include <86box/plat_unused.h> #ifdef UPI42_STANDALONE # define fatal(...) \ @@ -160,7 +161,7 @@ upi42_op_MOV_A_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_A_PSW(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_A_PSW(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->psw; upi42_mirror_f0(upi42); @@ -168,7 +169,7 @@ upi42_op_MOV_A_PSW(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_PSW_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_PSW_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw = upi42->a; upi42_mirror_f0(upi42); @@ -176,28 +177,28 @@ upi42_op_MOV_PSW_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_A_T(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_A_T(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->t; return 1; } static int -upi42_op_MOV_T_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_T_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->t = upi42->a; return 1; } static int -upi42_op_MOV_STS_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_STS_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts = (upi42->a & 0xf0) | (upi42->sts & 0x0f); return 1; } static int -upi42_op_MOVP_A_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOVP_A_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->rom[(upi42->pc & 0xff00) | upi42->a]; upi42->cycs--; @@ -205,7 +206,7 @@ upi42_op_MOVP_A_indA(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOVP3_A_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOVP3_A_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->rom[0x300 | upi42->a]; upi42->cycs--; @@ -242,7 +243,7 @@ upi42_op_XCHD_A_indRr(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_SWAP_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SWAP_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a << 4) | (upi42->a >> 4); return 1; @@ -258,7 +259,7 @@ upi42_op_IN_A_Pp(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) +upi42_op_IN_A_DBB(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->dbb_in; upi42->sts &= ~0x02; /* clear IBF */ @@ -266,7 +267,7 @@ upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_OUTL_Pp_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->ports_out[fetchdat & 3] = upi42->a; upi42->cycs--; @@ -274,7 +275,7 @@ upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_OUT_DBB_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_OUT_DBB_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbb_out = upi42->a; upi42->sts |= 0x01; /* set OBF */ @@ -397,21 +398,21 @@ upi42_op_ORLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_RR_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RR_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a << 7) | (upi42->a >> 1); return 1; } static int -upi42_op_RL_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RL_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a >> 7) | (upi42->a << 1); return 1; } static int -upi42_op_RRC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RRC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { uint8_t temp = upi42->a; upi42->a = (upi42->psw & 0x80) | (temp >> 1); @@ -420,7 +421,7 @@ upi42_op_RRC_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_RLC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RLC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { uint8_t temp = upi42->a; upi42->a = (temp << 1) | (upi42->psw >> 7); @@ -429,7 +430,7 @@ upi42_op_RLC_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_INC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_INC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a++; return 1; @@ -450,7 +451,7 @@ upi42_op_INC_indRr(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_DEC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DEC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a--; return 1; @@ -533,21 +534,21 @@ upi42_op_ADDC_A_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = 0; return 1; } static int -upi42_op_CPL_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = ~upi42->a; return 1; } static int -upi42_op_DA_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DA_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { if (((upi42->a & 0x0f) > 9) || (upi42->psw & 0x40)) upi42->a += 6; @@ -560,21 +561,21 @@ upi42_op_DA_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_C(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_C(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x80; return 1; } static int -upi42_op_CPL_C(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_C(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw ^= 0x80; return 1; } static int -upi42_op_CLR_F0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_F0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x20; upi42_mirror_f0(upi42); @@ -582,7 +583,7 @@ upi42_op_CLR_F0(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CPL_F0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_F0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw ^= 0x20; upi42_mirror_f0(upi42); @@ -590,21 +591,21 @@ upi42_op_CPL_F0(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_F1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_F1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts &= ~0x08; return 1; } static int -upi42_op_CPL_F1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_F1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts ^= 0x08; return 1; } static int -upi42_op_EN_I(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_I(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->i = 1; upi42->skip_timer_inc = 1; @@ -612,7 +613,7 @@ upi42_op_EN_I(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_DIS_I(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DIS_I(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->i = 0; upi42->skip_timer_inc = 1; @@ -620,21 +621,21 @@ upi42_op_DIS_I(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_EN_TCNTI(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_TCNTI(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->tcnti = 1; return 1; } static int -upi42_op_DIS_TCNTI(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DIS_TCNTI(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->tcnti = upi42->tcnti_raise = 0; return 1; } static int -upi42_op_STRT_T(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STRT_T(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_timer = 1; upi42->prescaler = 0; @@ -643,7 +644,7 @@ upi42_op_STRT_T(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_STRT_CNT(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STRT_CNT(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_counter = 1; upi42->skip_timer_inc = 1; @@ -651,7 +652,7 @@ upi42_op_STRT_CNT(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_STOP_TCNT(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STOP_TCNT(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_timer = upi42->run_counter = 0; upi42->skip_timer_inc = 1; @@ -659,35 +660,35 @@ upi42_op_STOP_TCNT(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_SEL_PMB0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_PMB0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbf = 0; return 1; } static int -upi42_op_SEL_PMB1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_PMB1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbf = 1; return 1; } static int -upi42_op_SEL_RB0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_RB0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x10; return 1; } static int -upi42_op_SEL_RB1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_RB1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw |= 0x10; return 1; } static int -upi42_op_NOP(upi42_t *upi42, uint32_t fetchdat) +upi42_op_NOP(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { return 1; } @@ -741,7 +742,7 @@ upi42_op_JMP_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_JMPP_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_JMPP_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->pc = (upi42->pc & 0xff00) | upi42->a; upi42->cycs--; @@ -774,27 +775,27 @@ UPI42_COND_JMP_IMM(JNIBF, !(upi42->sts & 0x02), ) UPI42_COND_JMP_IMM(JOBF, upi42->sts & 0x01, ) static int -upi42_op_EN_A20(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_A20(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { /* Enable fast A20 until reset. */ return 1; } static int -upi42_op_EN_DMA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_DMA(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { return 1; } static int -upi42_op_EN_FLAGS(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_FLAGS(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->flags = 1; return 1; } static int -upi42_op_SUSPEND(upi42_t *upi42, uint32_t fetchdatr) +upi42_op_SUSPEND(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { /* Inhibit execution until reset. */ upi42->suspend = 1; @@ -923,6 +924,8 @@ upi42_port_read(void *priv, int port) /* Apply special meanings. */ switch (port) { + default: + break; } upi42_log("UPI42: port_read(%d) = %02X\n", port, ret); @@ -944,7 +947,7 @@ upi42_port_write(void *priv, int port, uint8_t val) /* NOTE: The dbb/sts/cmd functions use I/O handler signatures; port is ignored. */ uint8_t -upi42_dbb_read(uint16_t port, void *priv) +upi42_dbb_read(UNUSED(uint16_t port), void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -955,7 +958,7 @@ upi42_dbb_read(uint16_t port, void *priv) } void -upi42_dbb_write(uint16_t port, uint8_t val, void *priv) +upi42_dbb_write(UNUSED(uint16_t port), uint8_t val, void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -967,7 +970,7 @@ upi42_dbb_write(uint16_t port, uint8_t val, void *priv) } uint8_t -upi42_sts_read(uint16_t port, void *priv) +upi42_sts_read(UNUSED(uint16_t port), void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -977,7 +980,7 @@ upi42_sts_read(uint16_t port, void *priv) } void -upi42_cmd_write(uint16_t port, uint8_t val, void *priv) +upi42_cmd_write(UNUSED(uint16_t port), uint8_t val, void *priv) { upi42_t *upi42 = (upi42_t *) priv; diff --git a/src/usb.c b/src/usb.c index 5f2b95084..e715268af 100644 --- a/src/usb.c +++ b/src/usb.c @@ -31,6 +31,7 @@ #include <86box/timer.h> #include <86box/usb.h> #include <86box/dma.h> +#include <86box/plat_unused.h> #ifdef ENABLE_USB_LOG int usb_do_log = ENABLE_USB_LOG; @@ -51,8 +52,7 @@ usb_log(const char *fmt, ...) #endif /* OHCI registers */ -enum -{ +enum { OHCI_HcRevision = 0x00 /* 0x00 */, OHCI_HcControl = 0x01 /* 0x04 */, OHCI_HcCommandStatus = 0x02 /* 0x08 */, @@ -79,8 +79,7 @@ enum OHCI_HcRhPortStatus3 = 0x17 /* 0x5c */ }; -enum -{ +enum { OHCI_aHcRevision = 0x00, OHCI_aHcControl = 0x04, OHCI_aHcCommandStatus = 0x08, @@ -108,8 +107,7 @@ enum }; /* OHCI HcInterruptEnable/Disable bits */ -enum -{ +enum { OHCI_HcInterruptEnable_SO = 1 << 0, OHCI_HcInterruptEnable_WDH = 1 << 1, OHCI_HcInterruptEnable_SF = 1 << 2, @@ -120,8 +118,7 @@ enum }; /* OHCI HcControl bits */ -enum -{ +enum { OHCI_HcControl_ControlBulkServiceRatio = 1 << 0, OHCI_HcControl_PeriodicListEnable = 1 << 1, OHCI_HcControl_IsochronousEnable = 1 << 2, @@ -147,9 +144,9 @@ usb_interrupt_ohci(usb_t *dev, uint32_t level) } static uint8_t -uhci_reg_read(uint16_t addr, void *p) +uhci_reg_read(uint16_t addr, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t ret; uint8_t *regs = dev->uhci_io; @@ -161,9 +158,9 @@ uhci_reg_read(uint16_t addr, void *p) } static void -uhci_reg_write(uint16_t addr, uint8_t val, void *p) +uhci_reg_write(uint16_t addr, uint8_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t *regs = dev->uhci_io; addr &= 0x0000001f; @@ -185,13 +182,16 @@ uhci_reg_write(uint16_t addr, uint8_t val, void *p) case 0x0c: regs[0x0c] = (val & 0x7f); break; + + default: + break; } } static void -uhci_reg_writew(uint16_t addr, uint16_t val, void *p) +uhci_reg_writew(uint16_t addr, uint16_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint16_t *regs = (uint16_t *) dev->uhci_io; addr &= 0x0000001f; @@ -212,8 +212,8 @@ uhci_reg_writew(uint16_t addr, uint16_t val, void *p) regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); break; default: - uhci_reg_write(addr, val & 0xff, p); - uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); + uhci_reg_write(addr, val & 0xff, priv); + uhci_reg_write(addr + 1, (val >> 8) & 0xff, priv); break; } } @@ -260,9 +260,9 @@ typedef struct #define ENDPOINT_DESC_LIMIT 32 static uint8_t -ohci_mmio_read(uint32_t addr, void *p) +ohci_mmio_read(uint32_t addr, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t ret = 0x00; #ifdef ENABLE_USB_LOG uint32_t old_addr = addr; @@ -301,15 +301,15 @@ ohci_mmio_read(uint32_t addr, void *p) } static uint16_t -ohci_mmio_readw(uint32_t addr, void *p) +ohci_mmio_readw(uint32_t addr, void *priv) { - return ohci_mmio_read(addr, p) | (ohci_mmio_read(addr + 1, p) << 8); + return ohci_mmio_read(addr, priv) | (ohci_mmio_read(addr + 1, priv) << 8); } static uint32_t -ohci_mmio_readl(uint32_t addr, void *p) +ohci_mmio_readl(uint32_t addr, void *priv) { - return ohci_mmio_readw(addr, p) | (ohci_mmio_readw(addr + 2, p) << 16); + return ohci_mmio_readw(addr, priv) | (ohci_mmio_readw(addr + 2, priv) << 16); } static void @@ -367,7 +367,7 @@ static int ohci_copy_td_input(usb_t* dev, usb_td_t *td, } #endif -static int ohci_copy_td_output(usb_t* dev, usb_td_t *td, +static int ohci_copy_td_output(UNUSED(usb_t* dev), usb_td_t *td, uint8_t *buf, int len) { uint32_t ptr; @@ -504,6 +504,9 @@ ohci_service_transfer_desc(usb_t* dev, usb_ed_t* endpoint_desc) switch (device_result) { case USB_ERROR_NAK: return 1; + + default: + break; } dev->ohci_interrupt_counter = 0; } @@ -676,9 +679,9 @@ ohci_soft_reset(usb_t* dev) } static void -ohci_mmio_write(uint32_t addr, uint8_t val, void *p) +ohci_mmio_write(uint32_t addr, uint8_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t old; #ifdef ENABLE_USB_LOG @@ -888,8 +891,10 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p) if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x04) && (old & 0x04)) dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x04; - /* if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x02)) - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x02; */ +#if 0 + if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x02)) + dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x02; +#endif return; case OHCI_aHcRhPortStatus1 + 1: if ((val & 0x02) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) { @@ -924,23 +929,26 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p) case OHCI_aHcPeriodCurrentED: dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0xf0); return; + + default: + break; } dev->ohci_mmio[addr >> 2].b[addr & 3] = val; } static void -ohci_mmio_writew(uint32_t addr, uint16_t val, void *p) +ohci_mmio_writew(uint32_t addr, uint16_t val, void *priv) { - ohci_mmio_write(addr, val & 0xff, p); - ohci_mmio_write(addr + 1, val >> 8, p); + ohci_mmio_write(addr, val & 0xff, priv); + ohci_mmio_write(addr + 1, val >> 8, priv); } static void -ohci_mmio_writel(uint32_t addr, uint32_t val, void *p) +ohci_mmio_writel(uint32_t addr, uint32_t val, void *priv) { - ohci_mmio_writew(addr, val & 0xffff, p); - ohci_mmio_writew(addr + 2, val >> 16, p); + ohci_mmio_writew(addr, val & 0xffff, priv); + ohci_mmio_writew(addr + 2, val >> 16, priv); } void @@ -964,7 +972,7 @@ usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type) switch (bus_type) { case USB_BUS_OHCI: { - for (int i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { if (!dev->ohci_devices[i]) { uint32_t old = dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].l; dev->ohci_devices[i] = device; @@ -981,8 +989,11 @@ usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type) } } break; + + default: + break; } - return 255; + return 0xff; } void @@ -1011,6 +1022,9 @@ usb_detach_device(usb_t *dev, uint8_t port, uint8_t bus_type) } break; + + default: + break; } return; } @@ -1046,7 +1060,7 @@ usb_close(void *priv) } static void * -usb_init_ext(const device_t *info, void *params) +usb_init_ext(UNUSED(const device_t *info), void *params) { usb_t *dev; diff --git a/src/video/CMakeLists.txt b/src/video/CMakeLists.txt index 70ef72b7a..2395040ab 100644 --- a/src/video/CMakeLists.txt +++ b/src/video/CMakeLists.txt @@ -18,7 +18,7 @@ add_library(vid OBJECT agpgart.c video.c vid_table.c vid_cga.c vid_cga_comp.c vid_incolor.c vid_colorplus.c vid_genius.c vid_pgc.c vid_im1024.c vid_sigma.c vid_wy700.c vid_ega.c vid_ega_render.c vid_svga.c vid_8514a.c vid_svga_render.c vid_ddc.c vid_vga.c vid_ati_eeprom.c vid_ati18800.c - vid_ati28800.c vid_ati_mach64.c vid_ati68860_ramdac.c vid_bt48x_ramdac.c + vid_ati28800.c vid_ati_mach8.c vid_ati_mach64.c vid_ati68860_ramdac.c vid_bt48x_ramdac.c vid_av9194.c vid_icd2061.c vid_ics2494.c vid_ics2595.c vid_cl54xx.c vid_et3000.c vid_et4000.c vid_sc1148x_ramdac.c vid_sc1502x_ramdac.c vid_et4000w32.c vid_stg_ramdac.c vid_ht216.c vid_oak_oti.c vid_paradise.c diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 9ec196d86..115105d7a 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -7,13 +7,13 @@ * This file is part of the 86Box distribution. * * Emulation of the 8514/A card from IBM for the MCA bus and - * generic ISA bus clones without vendor extensions. + * ISA bus clones. * * * * Authors: TheCollector1995. * - * Copyright 2022 TheCollector1995. + * Copyright 2022-2023 TheCollector1995. */ #include #include @@ -21,6 +21,7 @@ #include #include #include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> @@ -42,17 +43,53 @@ static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *p); static uint8_t ibm8514_accel_inb(uint16_t port, void *p); static uint16_t ibm8514_accel_inw(uint16_t port, void *p); +#ifdef ENABLE_IBM8514_LOG +int ibm8514_do_log = ENABLE_IBM8514_LOG; + +static void +ibm8514_log(const char *fmt, ...) +{ + va_list ap; + + if (ibm8514_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define ibm8514_log(fmt, ...) +#endif + #define READ_PIXTRANS_WORD(cx, n) \ if ((cmd <= 1) || (cmd == 5)) { \ - temp = dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & dev->vram_mask]; \ - temp |= (dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + if (dev->local) { \ + temp = svga->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & svga->vram_mask]; \ + temp |= (svga->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & svga->vram_mask] << 8); \ + } else { \ + temp = dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } \ } else { \ - temp = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ - temp |= (dev->vram[(dev->accel.dest + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + if (dev->local) { \ + temp = svga->vram[(dev->accel.dest + (cx) + (n)) & svga->vram_mask]; \ + temp |= (svga->vram[(dev->accel.dest + (cx) + (n + 1)) & svga->vram_mask] << 8); \ + } else { \ + temp = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[(dev->accel.dest + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } \ } #define READ(addr, dat) \ - dat = dev->vram[(addr) & (dev->vram_mask)]; + if (dev->local) { \ + if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + dat = vram_w[(addr) & (svga->vram_mask >> 1)]; \ + } else { \ + dat = (svga->vram[(addr) & (svga->vram_mask)]); \ + } \ + } else { \ + dat = (dev->vram[(addr) & (dev->vram_mask)]); \ + } #define MIX(mixmode, dest_dat, src_dat) \ { \ @@ -157,8 +194,20 @@ static uint16_t ibm8514_accel_inw(uint16_t port, void *p); } #define WRITE(addr, dat) \ - dev->vram[((addr)) & (dev->vram_mask)] = dat; \ - dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = changeframecount; + if (dev->local) { \ + if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + vram_w[((addr)) & (svga->vram_mask >> 1)] = dat; \ + svga->changedvram[(((addr)) & (svga->vram_mask >> 1)) >> 11] = changeframecount; \ + } else { \ + svga->vram[((addr)) & (svga->vram_mask)] = dat; \ + svga->changedvram[(((addr)) & (svga->vram_mask)) >> 12] = changeframecount; \ + } \ + } else { \ + dev->vram[((addr)) & (dev->vram_mask)] = dat; \ + dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = changeframecount; \ + } + +int ibm8514_has_vga = 0; int ibm8514_cpu_src(svga_t *svga) @@ -557,10 +606,11 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->accel.short_stroke = val; dev->accel.cx = dev->accel.cur_x; dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + + if (dev->accel.cur_y >= 0x600) + dev->accel.cy |= ~0x5ff; if (dev->accel.cmd & 0x1000) { ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); @@ -573,15 +623,16 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) break; case 0x9ee9: case 0xdee9: + dev->accel.ssv_state = 1; if (len == 1) { dev->accel.short_stroke = (dev->accel.short_stroke & 0xff) | (val << 8); dev->accel.cx = dev->accel.cur_x; dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + if (dev->accel.cur_y >= 0x600) + dev->accel.cy |= ~0x5ff; if (dev->accel.cmd & 0x1000) { ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); @@ -701,10 +752,14 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->accel.multifunc_cntl = val; dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; if ((dev->accel.multifunc_cntl >> 12) == 1) { - dev->accel.clip_top = val & 0x3ff; + dev->accel.clip_top = val & 0x7ff; + if (val & 0x400) + dev->accel.clip_top |= ~0x3ff; } if ((dev->accel.multifunc_cntl >> 12) == 2) { - dev->accel.clip_left = val & 0x3ff; + dev->accel.clip_left = val & 0x7ff; + if (val & 0x400) + dev->accel.clip_left |= ~0x3ff; } if (port == 0xfee8) dev->accel.cmd_back = 1; @@ -820,24 +875,24 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x2e9: if (len != 1) { dev->htotal = (dev->htotal & 0xff) | (val << 8); - // pclog("IBM 8514/A: H_TOTAL write 02E8 = %d\n", dev->htotal + 1); + ibm8514_log("IBM 8514/A: H_TOTAL write 02E8 = %d\n", dev->htotal + 1); svga_recalctimings(svga); } break; case 0x6e8: dev->hdisp = val; - // pclog("IBM 8514/A: H_DISP write 06E8 = %d\n", dev->hdisp + 1); + ibm8514_log("IBM 8514/A: H_DISP write 06E8 = %d\n", dev->hdisp + 1); svga_recalctimings(svga); break; case 0xae8: - // pclog("IBM 8514/A: H_SYNC_STRT write 0AE8 = %d\n", val + 1); + ibm8514_log("IBM 8514/A: H_SYNC_STRT write 0AE8 = %d\n", val + 1); svga_recalctimings(svga); break; case 0xee8: - // pclog("IBM 8514/A: H_SYNC_WID write 0EE8 = %d\n", val + 1); + ibm8514_log("IBM 8514/A: H_SYNC_WID write 0EE8 = %d\n", val + 1); svga_recalctimings(svga); break; @@ -852,7 +907,7 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x12e9: if (len == 1) { dev->vtotal = (dev->vtotal & 0xff) | ((val & 0x1f) << 8); - // pclog("IBM 8514/A: V_TOTAL write 12E8 = %d\n", dev->vtotal); + ibm8514_log("IBM 8514/A: V_TOTAL write 12E8 = %d\n", dev->vtotal); svga_recalctimings(svga); } break; @@ -868,7 +923,7 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x16e9: if (len == 1) { dev->vdisp = (dev->vdisp & 0xff) | ((val & 0x1f) << 8); - // pclog("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp); + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp); svga_recalctimings(svga); } break; @@ -884,21 +939,21 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x1ae9: if (len == 1) { dev->vsyncstart = (dev->vsyncstart & 0xff) | ((val & 0x1f) << 8); - // pclog("IBM 8514/A: V_SYNC_STRT write 1AE8 = %d\n", dev->vsyncstart); + ibm8514_log("IBM 8514/A: V_SYNC_STRT write 1AE8 = %d\n", dev->vsyncstart); svga_recalctimings(svga); } break; case 0x1ee8: dev->vsyncwidth = val; - // pclog("IBM 8514/A: V_SYNC_WID write 1EE8 = %02x\n", val); + ibm8514_log("IBM 8514/A: V_SYNC_WID write 1EE8 = %02x\n", val); svga_recalctimings(svga); break; case 0x22e8: dev->disp_cntl = val & 0x7e; dev->interlace = !!(val & 0x10); - // pclog("IBM 8514/A: DISP_CNTL write 22E8 = %02x, SCANMODULOS = %d\n", dev->disp_cntl, dev->scanmodulos); + ibm8514_log("IBM 8514/A: DISP_CNTL write 22E8 = %02x, SCANMODULOS = %d\n", dev->disp_cntl, dev->scanmodulos); svga_recalctimings(svga); break; @@ -922,7 +977,7 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) dev->accel.advfunc_cntl = val & 7; ibm8514_on = (dev->accel.advfunc_cntl & 1); vga_on = !ibm8514_on; - //pclog("IBM 8514/A: VGA ON = %i, val = %02x\n", vga_on, val); + ibm8514_log("IBM 8514/A: VGA ON = %i, val = %02x\n", vga_on, val); svga_recalctimings(svga); break; } @@ -1105,26 +1160,33 @@ void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len) { ibm8514_t *dev = &svga->dev8514; - uint8_t src_dat = 0; - uint8_t dest_dat; - uint8_t old_dest_dat; - int frgd_mix; - int bkgd_mix; - uint16_t clip_b = dev->accel.multifunc[3] & 0x7ff; - uint16_t clip_r = dev->accel.multifunc[4] & 0x7ff; + uint16_t *vram_w = (uint16_t *)svga->vram; + uint16_t src_dat = 0, dest_dat, old_dest_dat; + int frgd_mix, bkgd_mix; + uint16_t clip_b = dev->accel.multifunc[3]; + uint16_t clip_r = dev->accel.multifunc[4]; int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; - uint8_t mix_mask = 0x80; - uint8_t compare = dev->accel.color_cmp & 0xff; + uint16_t mix_mask = ((svga->bpp == 8) || (svga->bpp == 24)) ? 0x80 : 0x8000; + uint16_t compare = dev->accel.color_cmp; int compare_mode = dev->accel.multifunc[0x0a] & 0x38; int cmd = dev->accel.cmd >> 13; - uint8_t wrt_mask = dev->accel.wrt_mask & 0xff; - uint8_t rd_mask = ((dev->accel.rd_mask & 0x01) << 7) | ((dev->accel.rd_mask & 0xfe) >> 1); - uint8_t rd_mask_polygon = dev->accel.rd_mask & 0xff; - uint8_t frgd_color = dev->accel.frgd_color; - uint8_t bkgd_color = dev->accel.bkgd_color; + uint16_t wrt_mask = dev->accel.wrt_mask; + uint16_t rd_mask = dev->accel.rd_mask; + uint16_t rd_mask_polygon = dev->accel.rd_mask; + uint16_t frgd_color = dev->accel.frgd_color; + uint16_t bkgd_color = dev->accel.bkgd_color; uint32_t old_mix_dat; int and3 = dev->accel.cur_x & 3; - uint8_t poly_src = 0; + uint16_t poly_src = 0; + + if ((svga->bpp == 8) || (svga->bpp == 24)) { + compare &= 0xff; + frgd_color &= 0xff; + bkgd_color &= 0xff; + rd_mask = ((dev->accel.rd_mask & 0x01) << 7) | ((dev->accel.rd_mask & 0xfe) >> 1); + rd_mask &= 0xff; + rd_mask_polygon &= 0xff; + } if (dev->accel.cmd & 0x100) { dev->force_busy = 1; @@ -1147,6 +1209,11 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } else { count >>= 3; } + + if (((svga->bpp == 15) || (svga->bpp == 16))) { + if ((dev->accel.cmd & 0x200) && (count == 2)) + count >>= 1; + } } if (pixcntl == 1) { @@ -1246,7 +1313,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -1255,17 +1322,26 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); if (dev->accel.ssv_draw) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + if ((dev->accel.cmd & 4) && dev->accel.ssv_len) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } } } } mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (!dev->accel.ssv_len) break; @@ -1303,10 +1379,116 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat dev->accel.ssv_len--; } + } else { + while (count-- && (dev->accel.ssv_len >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + } - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; + READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + if (dev->accel.ssv_draw) { + if ((dev->accel.cmd & 4) && dev->accel.ssv_len) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; + + if (!dev->accel.ssv_len) + break; + + if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { + dev->accel.err_term += dev->accel.destx_distp; + /*Step minor axis*/ + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cy--; + break; + case 0x20: + dev->accel.cy--; + break; + case 0x40: + dev->accel.cx--; + break; + case 0x60: + dev->accel.cx++; + break; + case 0x80: + dev->accel.cy++; + break; + case 0xa0: + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cx--; + break; + case 0xe0: + dev->accel.cx++; + break; + } + } else + dev->accel.err_term += dev->accel.desty_axstp; + + /*Step major axis*/ + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cx--; + break; + case 0x20: + dev->accel.cx++; + break; + case 0x40: + dev->accel.cy--; + break; + case 0x60: + dev->accel.cy--; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cy++; + break; + } + + dev->accel.ssv_len--; + } } + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; break; case 1: /*Draw line*/ @@ -1315,11 +1497,11 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat dev->accel.cx = dev->accel.cur_x; dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x & 0x400) { - dev->accel.cx |= ~0x3ff; + if (dev->accel.cur_x >= 0x600) { + dev->accel.cx |= ~0x5ff; } - if (dev->accel.cur_y & 0x400) { - dev->accel.cy |= ~0x3ff; + if (dev->accel.cur_y >= 0x600) { + dev->accel.cy |= ~0x5ff; } dev->accel.sy = dev->accel.maj_axis_pcnt; @@ -1392,7 +1574,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -1477,7 +1659,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.sy == 0) { break; @@ -1538,7 +1723,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -1561,7 +1746,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat dev->accel.temp_cnt--; mix_dat >>= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.sy == 0) { break; @@ -1654,7 +1842,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -1677,7 +1865,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.sy == 0) { break; @@ -1767,14 +1958,18 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - dev->accel.cy = dev->accel.cur_y & 0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + dev->accel.cy |= ~0x5ff; - dev->accel.dest = dev->accel.cy * dev->pitch; + if (dev->local && dev->accel.ge_offset && (svga->bpp == 24)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.fill_state = 0; if (cmd == 4) @@ -1822,7 +2017,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!(dev->accel.cmd & 0x40) && (frgd_mix == 2) && (bkgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { if (!(dev->accel.sx & 1)) { dev->accel.output = 1; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->pitch; + if (dev->local && dev->accel.ge_offset && (svga->bpp == 24)) + dev->accel.newdest_out = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); + else + dev->accel.newdest_out = (dev->accel.cy + 1) * dev->pitch; } } } @@ -1864,7 +2062,7 @@ rect_fill_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -1939,7 +2137,10 @@ rect_fill_pix: mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; switch (dev->accel.cmd & 0xe0) { case 0x00: @@ -2033,7 +2234,7 @@ rect_fill_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -2052,7 +2253,10 @@ rect_fill_pix: mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) dev->accel.cx++; @@ -2077,7 +2281,11 @@ rect_fill_pix: else dev->accel.cy--; - dev->accel.dest = dev->accel.cy * dev->pitch; + if (dev->local && dev->accel.ge_offset && (svga->bpp == 24)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.sy--; return; } @@ -2107,7 +2315,7 @@ rect_fill_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -2125,7 +2333,10 @@ rect_fill_pix: } } mix_dat >>= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) dev->accel.cx++; @@ -2148,9 +2359,9 @@ rect_fill_pix: if (dev->accel.cmd & 2) { if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; } } @@ -2159,7 +2370,11 @@ rect_fill_pix: else dev->accel.cy--; - dev->accel.dest = dev->accel.cy * dev->pitch; + if (dev->local && dev->accel.ge_offset && (svga->bpp == 24)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.sy--; return; } @@ -2262,7 +2477,10 @@ rect_fill_pix: } mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) dev->accel.cx++; @@ -2333,7 +2551,7 @@ rect_fill_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -2358,7 +2576,10 @@ rect_fill_pix: mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) dev->accel.cx++; @@ -2671,8 +2892,12 @@ rect_fill: if (!cpu_input) { dev->accel.cx = dev->accel.cur_x; dev->accel.cy = dev->accel.cur_y; - dev->accel.oldcy = dev->accel.cy; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + if (dev->accel.cur_y >= 0x600) + dev->accel.cy |= ~0x5ff; + dev->accel.oldcy = dev->accel.cy; dev->accel.sy = 0; if (ibm8514_cpu_src(svga)) { @@ -2687,9 +2912,6 @@ rect_fill: } while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cur_x > 1023) - dev->accel.cx = 0; - if ((dev->accel.cx) >= dev->accel.clip_left && ((dev->accel.cx) <= clip_r) && (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: @@ -2699,7 +2921,7 @@ rect_fill: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: src_dat = 0; @@ -2726,7 +2948,10 @@ rect_fill: mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.sy == dev->accel.maj_axis_pcnt) { break; @@ -2813,21 +3038,21 @@ rect_fill: dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; - dev->accel.dx = dev->accel.destx_distp & 0x3ff; - dev->accel.dy = dev->accel.desty_axstp & 0x3ff; + dev->accel.dx = dev->accel.destx_distp; + dev->accel.dy = dev->accel.desty_axstp; - if (dev->accel.destx_distp & 0x400) - dev->accel.dx |= ~0x3ff; - if (dev->accel.desty_axstp & 0x400) - dev->accel.dy |= ~0x3ff; + if (dev->accel.destx_distp >= 0x600) + dev->accel.dx |= ~0x5ff; + if (dev->accel.desty_axstp >= 0x600) + dev->accel.dy |= ~0x5ff; - dev->accel.cx = dev->accel.cur_x & 0x3ff; - dev->accel.cy = dev->accel.cur_y & 0x3ff; + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + if (dev->accel.cur_y >= 0x600) + dev->accel.cy |= ~0x5ff; dev->accel.src = dev->accel.cy * dev->pitch; dev->accel.dest = dev->accel.dy * dev->pitch; @@ -2876,7 +3101,7 @@ bitblt_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: READ(dev->accel.src + dev->accel.cx, src_dat); @@ -2900,12 +3125,18 @@ bitblt_pix: mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; else + cpu_dat >>= 8; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; dev->accel.cx--; + } dev->accel.sx--; if (dev->accel.sx < 0) { @@ -2916,16 +3147,23 @@ bitblt_pix: } if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx) + 1; dev->accel.cx -= (dev->accel.sx) + 1; - } else + } else { + dev->accel.dx += (dev->accel.sx) + 1; dev->accel.cx += (dev->accel.sx) + 1; + } - if (dev->accel.cmd & 0x80) + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; dev->accel.cy++; - else + } else { + dev->accel.dy--; dev->accel.cy--; + } - dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.src = dev->accel.cy * dev->pitch; + dev->accel.dest = dev->accel.dy * dev->pitch; dev->accel.sy--; return; } @@ -2952,7 +3190,7 @@ bitblt_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: READ(dev->accel.src + dev->accel.cx, src_dat); @@ -2974,7 +3212,10 @@ bitblt_pix: } } mix_dat >>= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) { dev->accel.dx++; @@ -3003,12 +3244,12 @@ bitblt_pix: if (dev->accel.cmd & 2) { if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - dev->accel.dx = dev->accel.destx_distp & 0x3ff; - if (dev->accel.destx_distp & 0x400) - dev->accel.dx |= ~0x3ff; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.cx |= ~0x5ff; + dev->accel.dx = dev->accel.destx_distp; + if (dev->accel.destx_distp >= 0x600) + dev->accel.dx |= ~0x5ff; } } @@ -3056,7 +3297,7 @@ bitblt_pix: src_dat = frgd_color; break; case 2: - src_dat = cpu_dat & 0xff; + src_dat = cpu_dat; break; case 3: READ(dev->accel.src + dev->accel.cx, src_dat); @@ -3079,7 +3320,10 @@ bitblt_pix: } mix_dat <<= 1; mix_dat |= 1; - cpu_dat >>= 8; + if ((svga->bpp == 15) || (svga->bpp == 16)) + cpu_dat >>= 16; + else + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) { dev->accel.dx++; @@ -3123,7 +3367,7 @@ bitblt: count = dev->accel.maj_axis_pcnt + 1; dev->accel.temp_cnt = 8; while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { + if (!dev->accel.temp_cnt) { mix_dat >>= 8; dev->accel.temp_cnt = 8; } @@ -3197,7 +3441,7 @@ bitblt: } else { dev->accel.temp_cnt = 8; while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { + if (!dev->accel.temp_cnt) { dev->accel.temp_cnt = 8; mix_dat = old_mix_dat; } @@ -3269,6 +3513,32 @@ bitblt: } } } else { + if ((svga->bpp == 24) && dev->local && (dev->accel.cmd == 0xc2b5)) { + int64_t x, cx, dx; + + cx = (int64_t)dev->accel.cx; + dx = (int64_t)dev->accel.dx; + + while (1) { + if (((dx) >= (((int64_t)dev->accel.clip_left) * 3) && (dx) <= (((uint64_t)clip_r) * 3) && dev->accel.dy >= (dev->accel.clip_top << 1) && dev->accel.dy <= (clip_b << 1))) { + READ(dev->accel.src + (dev->accel.ge_offset << 2) + cx, src_dat); + READ(dev->accel.dest + (dev->accel.ge_offset << 2) + dx, dest_dat); + + dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask); + + WRITE(dev->accel.dest + (dev->accel.ge_offset << 2) + dx, dest_dat); + } + + cx++; + dx++; + + dev->accel.sx--; + if (dev->accel.sx < 0) + return; + } + return; + } + while (count-- && dev->accel.sy >= 0) { if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { if (pixcntl == 3) { @@ -3309,7 +3579,13 @@ bitblt: MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + if (dev->accel.cmd & 4) { + if (dev->accel.sx > 0) { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } else { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } } } mix_dat <<= 1; @@ -3547,7 +3823,7 @@ ibm8514_recalctimings(svga_t *svga) if (ibm8514_on) { dev->h_disp = (dev->hdisp + 1) << 3; - dev->pitch = dev->h_disp; + dev->pitch = (dev->accel.advfunc_cntl & 4) ? 1024 : 640; dev->h_total = (dev->htotal + 1); dev->v_total = (dev->vtotal + 1); dev->v_syncstart = (dev->vsyncstart + 1); @@ -3555,46 +3831,9 @@ ibm8514_recalctimings(svga_t *svga) dev->dispend = ((dev->vdisp >> 1) + 1); if (dev->dispend == 766) dev->dispend = 768; - //pclog("HDISP = %d, VTOTAL = %d, DISPEND = %d, hires = %02x\n", dev->h_disp, dev->v_total, dev->dispend, dev->accel.advfunc_cntl & 4); - { -#if 0 - if (dev->dispend == 480) { - dev->h_disp = 640; - dev->rowoffset = 128; - dev->pitch = 1024; - } else if ((dev->dispend == 600) || (dev->dispend == 598)) { - dev->h_disp = 800; - dev->rowoffset = 128; - dev->dispend = 600; - dev->pitch = 1024; - if (!dev->vtotal) - dev->v_total = 816; - if (!dev->vsyncstart) - dev->v_syncstart = dev->dispend; - } else { - if (dev->accel.advfunc_cntl & 4) { - if (!dev->hdisp) { - dev->rowoffset = 128; - dev->h_disp = 1024; - dev->pitch = dev->h_disp; - } - if (!dev->vtotal) - dev->v_total = 816; - if (!dev->vsyncstart) - dev->v_syncstart = dev->dispend; - } else { - dev->rowoffset = 128; - dev->h_disp = 640; - dev->dispend = 480; - dev->pitch = 1024; - if (!dev->vtotal) - dev->v_total = 816; - if (!dev->vsyncstart) - dev->v_syncstart = dev->dispend; - } - } -#endif - } + + if (dev->dispend == 598) + dev->dispend = 600; if (dev->accel.advfunc_cntl & 4) { if (!vga_on && dev->ibm_mode) { @@ -3617,15 +3856,21 @@ ibm8514_recalctimings(svga_t *svga) dev->v_syncstart >>= 1; dev->v_total >>= 1; } - dev->rowoffset = 0x80; - dev->pitch = 1024; - // pclog("1024x768 clock mode, hdisp = %d, htotal = %d, vtotal = %d, vsyncstart = %d, interlace = %02x\n", dev->h_disp, dev->h_total, dev->v_total, dev->v_syncstart, dev->interlace); + if (ibm8514_has_vga) { + dev->pitch = dev->ext_pitch; + dev->rowoffset = dev->ext_crt_pitch; + } else + dev->rowoffset = 128; + + ibm8514_log("1024x768 clock mode, hdisp = %d, htotal = %d, vtotal = %d, vsyncstart = %d, interlace = %02x\n", dev->h_disp, dev->h_total, dev->v_total, dev->v_syncstart, dev->interlace); svga->clock = (cpuclock * (double) (1ULL << 32)) / 44900000.0; } else { if (!vga_on && dev->ibm_mode) { - dev->h_disp = 640; - dev->dispend = 480; + if (dev->h_disp == 1024) { + dev->h_disp = 640; + dev->dispend = 480; + } } if (dev->interlace) { @@ -3636,15 +3881,19 @@ ibm8514_recalctimings(svga_t *svga) dev->v_syncstart >>= 1; dev->v_total >>= 1; } - dev->rowoffset = 0x80; - dev->pitch = 1024; + + if (ibm8514_has_vga) { + dev->pitch = dev->ext_pitch; + dev->rowoffset = dev->ext_crt_pitch; + } else + dev->rowoffset = 128; svga->clock = (cpuclock * (double) (1ULL << 32)) / 25175000.0; } svga->render = ibm8514_render_8bpp; - //pclog("Pitch = %d, mode = %d.\n", dev->pitch, dev->ibm_mode); + ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, mode = %d, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->ibm_mode, dev->accel.advfunc_cntl & 4, ibm8514_has_vga); } - // pclog("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); + ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); } static uint8_t @@ -3697,6 +3946,7 @@ static void dev->type = info->flags; dev->ibm_mode = 1; + dev->bpp = 8; ibm8514_io_set(svga); @@ -3770,7 +4020,7 @@ const device_t ibm8514_mca_device = { void ibm8514_device_add(void) { - if (!ibm8514_enabled) + if (!ibm8514_enabled || (ibm8514_enabled && ibm8514_has_vga)) return; if (machine_has_bus(machine, MACHINE_BUS_MCA)) diff --git a/src/video/vid_ati_eeprom.c b/src/video/vid_ati_eeprom.c index 2e10216e4..10b37212d 100644 --- a/src/video/vid_ati_eeprom.c +++ b/src/video/vid_ati_eeprom.c @@ -45,6 +45,26 @@ ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type) fclose(f); } +void +ati_eeprom_load_mach8(ati_eeprom_t *eeprom, char *fn) +{ + FILE *f; + int size; + eeprom->type = 0; + strncpy(eeprom->fn, fn, sizeof(eeprom->fn) - 1); + f = nvr_fopen(eeprom->fn, "rb"); + size = 128; + if (!f) { /*The ATI Graphics Ultra bios expects an immediate write to nvram if none is present at boot time otherwise + it would hang the machine.*/ + memset(eeprom->data, 0, size); + f = nvr_fopen(eeprom->fn, "wb"); + fwrite(eeprom->data, 1, size, f); + } + if (fread(eeprom->data, 1, size, f) != size) + memset(eeprom->data, 0, size); + fclose(f); +} + void ati_eeprom_save(ati_eeprom_t *eeprom) { diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 273dbdcf6..8c32929ce 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -172,7 +172,7 @@ typedef struct mach64_t { uint32_t write_mask; uint32_t chain_mask; - uint32_t linear_base, old_linear_base; + uint32_t linear_base; uint32_t io_base; struct @@ -185,6 +185,7 @@ typedef struct mach64_t { int src_x_start, src_y_start; int xinc, yinc; int x_count, y_count; + int xx_count; int src_x_count, src_y_count; int src_width1, src_height1; int src_width2, src_height2; @@ -487,35 +488,35 @@ mach64_recalctimings(svga_t *svga) case BPP_4: if (mach64->type != MACH64_GX) svga->render = svga_render_4bpp_highres; - svga->hdisp *= 8; + svga->hdisp <<= 3; break; case BPP_8: if (mach64->type != MACH64_GX) svga->render = svga_render_8bpp_highres; - svga->hdisp *= 8; - svga->rowoffset /= 2; + svga->hdisp <<= 3; + svga->rowoffset >>= 1; break; case BPP_15: if (mach64->type != MACH64_GX) svga->render = svga_render_15bpp_highres; - svga->hdisp *= 8; + svga->hdisp <<= 3; break; case BPP_16: if (mach64->type != MACH64_GX) svga->render = svga_render_16bpp_highres; - svga->hdisp *= 8; + svga->hdisp <<= 3; break; case BPP_24: if (mach64->type != MACH64_GX) svga->render = svga_render_24bpp_highres; - svga->hdisp *= 8; + svga->hdisp <<= 3; svga->rowoffset = (svga->rowoffset * 3) / 2; break; case BPP_32: if (mach64->type != MACH64_GX) svga->render = svga_render_32bpp_highres; - svga->hdisp *= 8; - svga->rowoffset *= 2; + svga->hdisp <<= 3; + svga->rowoffset <<= 1; break; } @@ -530,7 +531,7 @@ mach64_updatemapping(mach64_t *mach64) { svga_t *svga = &mach64->svga; - if (!(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + if (mach64->pci && !(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { mach64_log("Update mapping - PCI disabled\n"); mem_mapping_disable(&svga->mapping); mem_mapping_disable(&mach64->linear_mapping); @@ -543,47 +544,60 @@ mach64_updatemapping(mach64_t *mach64) mem_mapping_disable(&mach64->mmio_mapping); switch (svga->gdcreg[6] & 0xc) { case 0x0: /*128k at A0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); - mem_mapping_set_p(&mach64->svga.mapping, mach64); + mem_mapping_set_handler(&svga->mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); + mem_mapping_set_p(&svga->mapping, mach64); mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); mem_mapping_enable(&mach64->mmio_mapping); svga->banked_mask = 0xffff; break; case 0x4: /*64k at A0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); - mem_mapping_set_p(&mach64->svga.mapping, mach64); + mem_mapping_set_handler(&svga->mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); + mem_mapping_set_p(&svga->mapping, mach64); mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); svga->banked_mask = 0xffff; break; case 0x8: /*32k at B0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); - mem_mapping_set_p(&mach64->svga.mapping, svga); + mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); + mem_mapping_set_p(&svga->mapping, svga); mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); svga->banked_mask = 0x7fff; break; case 0xC: /*32k at B8000*/ - mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); - mem_mapping_set_p(&mach64->svga.mapping, svga); + mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); + mem_mapping_set_p(&svga->mapping, svga); mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); svga->banked_mask = 0x7fff; break; } + + mach64_log("Mach64 linear aperture = %08x.\n", mach64->linear_base); if (mach64->linear_base) { if (mach64->type == MACH64_GX) { if ((mach64->config_cntl & 3) == 2) { /*8 MB aperture*/ mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); - } else { + } else if ((mach64->config_cntl & 3) == 1) { /*4 MB aperture*/ mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (4 << 20) - 0x4000); mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((4 << 20) - 0x4000), 0x4000); + } else { + /*Disable aperture on reserved values*/ + mem_mapping_disable(&mach64->linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping); } } else { - /*2*8 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping_2, mach64->linear_base + ((16 << 20) - 0x4000), 0x4000); + if ((mach64->config_cntl & 3) == 2) { + /*2*8 MB aperture*/ + mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping_2, mach64->linear_base + ((16 << 20) - 0x4000), 0x4000); + } else { + /*Disable aperture on reserved values*/ + mem_mapping_disable(&mach64->linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping_2); + } } } else { mem_mapping_disable(&mach64->linear_mapping); @@ -621,7 +635,7 @@ mach64_wait_fifo_idle(mach64_t *mach64) } #define READ8(addr, var) \ - switch ((addr) &3) { \ + switch ((addr) & 3) { \ case 0: \ ret = (var) &0xff; \ break; \ @@ -637,7 +651,7 @@ mach64_wait_fifo_idle(mach64_t *mach64) } #define WRITE8(addr, var, val) \ - switch ((addr) &3) { \ + switch ((addr) & 3) { \ case 0: \ var = (var & 0xffffff00) | (val); \ break; \ @@ -1181,8 +1195,13 @@ mach64_start_fill(mach64_t *mach64) { mach64->accel.dst_x = 0; mach64->accel.dst_y = 0; + mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff; - mach64->accel.dst_y_start = mach64->dst_y_x & 0xfff; + if (((mach64->dst_y_x >> 16) & 0x1000)) + mach64->accel.dst_x_start |= ~0xfff; + mach64->accel.dst_y_start = mach64->dst_y_x & 0x3fff; + if (mach64->dst_y_x & 0x4000) + mach64->accel.dst_y_start |= ~0x3fff; mach64->accel.dst_width = (mach64->dst_height_width >> 16) & 0x1fff; mach64->accel.dst_height = mach64->dst_height_width & 0x1fff; @@ -1193,11 +1212,18 @@ mach64_start_fill(mach64_t *mach64) } mach64->accel.x_count = mach64->accel.dst_width; + mach64->accel.xx_count = 0; mach64->accel.src_x = 0; mach64->accel.src_y = 0; + mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff; - mach64->accel.src_y_start = mach64->src_y_x & 0xfff; + if (((mach64->src_y_x >> 16) & 0x1000)) + mach64->accel.src_x_start |= ~0xfff; + mach64->accel.src_y_start = mach64->src_y_x & 0x3fff; + if (mach64->src_y_x & 0x4000) + mach64->accel.src_y_start |= ~0x3fff; + if (mach64->src_cntl & SRC_LINEAR_EN) mach64->accel.src_x_count = 0x7ffffff; /*Essentially infinite*/ else @@ -1219,11 +1245,11 @@ mach64_start_fill(mach64_t *mach64) mach64->src_height1_width1, mach64->src_height2_width2); - mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; - mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; + mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) << 3; + mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) << 3; - mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; - mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; + mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) << 3; + mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) << 3; mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; mach64->accel.mix_bg = mach64->dp_mix & 0x1f; @@ -1308,16 +1334,24 @@ void mach64_start_line(mach64_t *mach64) { mach64->accel.dst_x = (mach64->dst_y_x >> 16) & 0xfff; - mach64->accel.dst_y = mach64->dst_y_x & 0xfff; + if (((mach64->dst_y_x >> 16) & 0x1000)) + mach64->accel.dst_x |= ~0xfff; + mach64->accel.dst_y = mach64->dst_y_x & 0x3fff; + if (mach64->dst_y_x & 0x4000) + mach64->accel.dst_y |= ~0x3fff; mach64->accel.src_x = (mach64->src_y_x >> 16) & 0xfff; - mach64->accel.src_y = mach64->src_y_x & 0xfff; + if (((mach64->src_y_x >> 16) & 0x1000)) + mach64->accel.src_x |= ~0xfff; + mach64->accel.src_y = mach64->src_y_x & 0x3fff; + if (mach64->src_y_x & 0x4000) + mach64->accel.src_y |= ~0x3fff; - mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; - mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; + mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) << 3; + mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) << 3; - mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; - mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; + mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) << 3; + mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) << 3; mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; mach64->accel.mix_bg = mach64->dp_mix & 0x1f; @@ -1344,9 +1378,6 @@ mach64_start_line(mach64_t *mach64) else mach64->accel.dst_offset >>= mach64->accel.dst_size; - /* mach64->accel.src_pitch *= mach64_inc[mach64->accel.src_pix_width]; - mach64->accel.dst_pitch *= mach64_inc[mach64->accel.dst_pix_width];*/ - mach64->accel.source_host = ((mach64->dp_src & 7) == SRC_HOST) || (((mach64->dp_src >> 8) & 7) == SRC_HOST); for (uint8_t y = 0; y < 8; y++) { @@ -1446,6 +1477,7 @@ mach64_start_line(mach64_t *mach64) break; \ case 0x17: \ dest_dat = (dest_dat + src_dat) >> 1; \ + break; \ } #define WRITE(addr, width) \ @@ -1483,24 +1515,31 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) mach64_log("mach64_blit : return as not busy\n"); return; } + switch (mach64->accel.op) { case OP_RECT: while (count) { + uint8_t write_mask = 0; uint32_t src_dat = 0; uint32_t dest_dat; uint32_t host_dat = 0; uint32_t old_dest_dat; int mix = 0; - int dst_x = (mach64->accel.dst_x + mach64->accel.dst_x_start) & 0xfff; - int dst_y = (mach64->accel.dst_y + mach64->accel.dst_y_start) & 0xfff; + int dst_x; + int dst_y; int src_x; - int src_y = (mach64->accel.src_y + mach64->accel.src_y_start) & 0xfff; + int src_y; + + dst_x = (mach64->accel.dst_x + mach64->accel.dst_x_start) & 0xfff; + dst_y = (mach64->accel.dst_y + mach64->accel.dst_y_start) & 0x3fff; if (mach64->src_cntl & SRC_LINEAR_EN) src_x = mach64->accel.src_x; else src_x = (mach64->accel.src_x + mach64->accel.src_x_start) & 0xfff; + src_y = (mach64->accel.src_y + mach64->accel.src_y_start) & 0x3fff; + if (mach64->accel.source_host) { host_dat = cpu_dat; switch (mach64->accel.host_size) { @@ -1525,7 +1564,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) mix = cpu_dat & 1; cpu_dat >>= 1; } else { - mix = cpu_dat >> 31; + mix = cpu_dat >> 0x1f; cpu_dat <<= 1; } break; @@ -1544,7 +1583,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) break; } - if (dst_x >= mach64->accel.sc_left && dst_x <= mach64->accel.sc_right && dst_y >= mach64->accel.sc_top && dst_y <= mach64->accel.sc_bottom) { + if ((dst_x) >= mach64->accel.sc_left && (dst_x) <= mach64->accel.sc_right && (dst_y) >= mach64->accel.sc_top && (dst_y) <= mach64->accel.sc_bottom) { switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) { case SRC_HOST: src_dat = host_dat; @@ -1553,24 +1592,42 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, src_dat, mach64->accel.src_size); break; case SRC_FG: - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - if ((mach64->accel.x_count % 3) == 2) - src_dat = mach64->accel.dp_frgd_clr & 0xff; - else if ((mach64->accel.x_count % 3) == 1) - src_dat = (mach64->accel.dp_frgd_clr >> 8) & 0xff; - else if ((mach64->accel.x_count % 3) == 0) - src_dat = (mach64->accel.dp_frgd_clr >> 16) & 0xff; + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + if (mach64->accel.xinc == -1) { + if ((mach64->accel.xx_count % 3) == 2) + src_dat = mach64->accel.dp_frgd_clr & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + src_dat = (mach64->accel.dp_frgd_clr >> 8) & 0xff; + else + src_dat = (mach64->accel.dp_frgd_clr >> 16) & 0xff; + } else { + if ((mach64->accel.xx_count % 3) == 2) + src_dat = (mach64->accel.dp_frgd_clr >> 16) & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + src_dat = (mach64->accel.dp_frgd_clr >> 8) & 0xff; + else + src_dat = mach64->accel.dp_frgd_clr & 0xff; + } } else src_dat = mach64->accel.dp_frgd_clr; break; case SRC_BG: - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - if ((mach64->accel.x_count % 3) == 2) - src_dat = mach64->accel.dp_bkgd_clr & 0xff; - else if ((mach64->accel.x_count % 3) == 1) - src_dat = (mach64->accel.dp_bkgd_clr >> 8) & 0xff; - else if ((mach64->accel.x_count % 3) == 0) - src_dat = (mach64->accel.dp_bkgd_clr >> 16) & 0xff; + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + if (mach64->accel.xinc == -1) { + if ((mach64->accel.xx_count % 3) == 2) + src_dat = mach64->accel.dp_bkgd_clr & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + src_dat = (mach64->accel.dp_bkgd_clr >> 8) & 0xff; + else + src_dat = (mach64->accel.dp_bkgd_clr >> 16) & 0xff; + } else { + if ((mach64->accel.xx_count % 3) == 2) + src_dat = (mach64->accel.dp_bkgd_clr >> 16) & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + src_dat = (mach64->accel.dp_bkgd_clr >> 8) & 0xff; + else + src_dat = mach64->accel.dp_bkgd_clr & 0xff; + } } else src_dat = mach64->accel.dp_bkgd_clr; break; @@ -1595,7 +1652,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) } if (!(mach64->dst_cntl & DST_POLYGON_EN) || mach64->accel.poly_draw) { - READ(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, dest_dat, mach64->accel.dst_size); + READ(mach64->accel.dst_offset + ((dst_y) * mach64->accel.dst_pitch) + (dst_x), dest_dat, mach64->accel.dst_size); switch (mach64->accel.clr_cmp_fn) { case 1: /*TRUE*/ @@ -1612,19 +1669,30 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (!cmp_clr) { old_dest_dat = dest_dat; MIX - dest_dat - = (dest_dat & mach64->accel.write_mask) | (old_dest_dat & ~mach64->accel.write_mask); + + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + if (mach64->accel.xinc == -1) { + if ((mach64->accel.xx_count % 3) == 2) + write_mask = mach64->accel.write_mask & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + write_mask = (mach64->accel.write_mask >> 8) & 0xff; + else + write_mask = (mach64->accel.write_mask >> 16) & 0xff; + } else { + if ((mach64->accel.xx_count % 3) == 2) + write_mask = (mach64->accel.write_mask >> 16) & 0xff; + else if ((mach64->accel.xx_count % 3) == 1) + write_mask = (mach64->accel.write_mask >> 8) & 0xff; + else + write_mask = mach64->accel.write_mask & 0xff; + } + dest_dat = (dest_dat & write_mask) | (old_dest_dat & ~write_mask); + } else { + dest_dat = (dest_dat & mach64->accel.write_mask) | (old_dest_dat & ~mach64->accel.write_mask); + } } - WRITE(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, mach64->accel.dst_size); - } - } - - if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) != (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - mach64->accel.dp_frgd_clr = ((mach64->accel.dp_frgd_clr >> 8) & 0xffff) | (mach64->accel.dp_frgd_clr << 16); - mach64->accel.dp_bkgd_clr = ((mach64->accel.dp_bkgd_clr >> 8) & 0xffff) | (mach64->accel.dp_bkgd_clr << 16); - mach64->accel.write_mask = ((mach64->accel.write_mask >> 8) & 0xffff) | (mach64->accel.write_mask << 16); + WRITE(mach64->accel.dst_offset + ((dst_y) * mach64->accel.dst_pitch) + (dst_x), mach64->accel.dst_size); } } @@ -1636,14 +1704,18 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) mach64->accel.src_x = 0; if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) { mach64->accel.src_x_start = (mach64->src_y_x_start >> 16) & 0xfff; + if ((mach64->src_y_x_start >> 16) & 0x1000) + mach64->accel.src_x_start |= ~0xfff; mach64->accel.src_x_count = mach64->accel.src_width2; } else mach64->accel.src_x_count = mach64->accel.src_width1; } } + mach64->accel.xx_count++; mach64->accel.x_count--; if (mach64->accel.x_count <= 0) { + mach64->accel.xx_count = 0; mach64->accel.x_count = mach64->accel.dst_width; mach64->accel.dst_x = 0; mach64->accel.dst_y += mach64->accel.yinc; @@ -1657,7 +1729,9 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (mach64->accel.src_y_count <= 0) { mach64->accel.src_y = 0; if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) { - mach64->accel.src_y_start = mach64->src_y_x_start & 0xfff; + mach64->accel.src_y_start = mach64->src_y_x_start & 0x3fff; + if (mach64->src_y_x_start & 0x4000) + mach64->accel.src_y_start |= ~0x3fff; mach64->accel.src_y_count = mach64->accel.src_height2; } else mach64->accel.src_y_count = mach64->accel.src_height1; @@ -1702,7 +1776,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (mach64->accel.source_host) { host_dat = cpu_dat; - switch (mach64->accel.src_size) { + switch (mach64->accel.host_size) { case 0: cpu_dat >>= 8; count -= 8; @@ -1783,12 +1857,10 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (!cmp_clr) MIX - if (!(mach64->dst_cntl & DST_Y_MAJOR)) - { - if (x == 0) - dest_dat &= ~1; - } - else { + if (!(mach64->dst_cntl & DST_Y_MAJOR)) { + if (!x) + dest_dat &= ~1; + } else { if (x == (mach64->accel.x_count - 1)) dest_dat &= ~1; } @@ -1831,7 +1903,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (mach64->accel.source_host) { host_dat = cpu_dat; - switch (mach64->accel.src_size) { + switch (mach64->accel.host_size) { case 0: cpu_dat >>= 8; count -= 8; @@ -1909,7 +1981,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) if (!cmp_clr) MIX - WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); + WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); } mach64->accel.x_count--; @@ -2347,6 +2419,7 @@ mach64_ext_readb(uint32_t addr, void *p) mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); else mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 24) << 4); + READ8(addr, mach64->config_cntl); break; case 0xe0: @@ -2667,11 +2740,15 @@ mach64_ext_readb(uint32_t addr, void *p) case 0x310: case 0x311: - if (!FIFO_EMPTY) - wake_fifo_thread(mach64); - ret = 0; - if (FIFO_FULL) - ret = 0xff; + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + ret = 0; + } else { + if (!FIFO_EMPTY) + wake_fifo_thread(mach64); + ret = 0; + if (FIFO_FULL) + ret = 0xff; + } break; case 0x320: @@ -2697,7 +2774,10 @@ mach64_ext_readb(uint32_t addr, void *p) break; case 0x338: - ret = FIFO_EMPTY ? 0 : 1; + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) + ret = 0; + else + ret = FIFO_EMPTY ? 0 : 1; break; default: @@ -2876,7 +2956,10 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *p) mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val); } else if (addr & 0x300) { - mach64_queue(mach64, addr & 0x3ff, val, FIFO_WRITE_BYTE); + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) + mach64_accel_write_fifo(mach64, addr & 0x3ff, val); + else + mach64_queue(mach64, addr & 0x3ff, val, FIFO_WRITE_BYTE); } else switch (addr & 0x3ff) { case 0x00: @@ -3099,7 +3182,10 @@ mach64_ext_writew(uint32_t addr, uint16_t val, void *p) mach64_ext_writeb(addr, val, p); mach64_ext_writeb(addr + 1, val >> 8, p); } else if (addr & 0x300) { - mach64_queue(mach64, addr & 0x3fe, val, FIFO_WRITE_WORD); + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) + mach64_accel_write_fifo_w(mach64, addr & 0x3fe, val); + else + mach64_queue(mach64, addr & 0x3fe, val, FIFO_WRITE_WORD); } else switch (addr & 0x3fe) { default: @@ -3120,7 +3206,10 @@ mach64_ext_writel(uint32_t addr, uint32_t val, void *p) mach64_ext_writew(addr, val, p); mach64_ext_writew(addr + 2, val >> 16, p); } else if (addr & 0x300) { - mach64_queue(mach64, addr & 0x3fc, val, FIFO_WRITE_DWORD); + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) + mach64_accel_write_fifo_l(mach64, addr & 0x3fc, val); + else + mach64_queue(mach64, addr & 0x3fc, val, FIFO_WRITE_DWORD); } else switch (addr & 0x3fc) { default: @@ -4210,9 +4299,8 @@ mach64_common_init(const device_t *info) mach64_io_set(mach64); - if (info->flags & DEVICE_PCI) { + if (info->flags & DEVICE_PCI) mach64->card = pci_add_card(PCI_ADD_VIDEO, mach64_pci_read, mach64_pci_write, mach64); - } mach64->pci_regs[PCI_REG_COMMAND] = 3; mach64->pci_regs[0x30] = 0x00; @@ -4252,7 +4340,7 @@ mach64gx_init(const device_t *info) mach64->type = MACH64_GX; mach64->pci = !!(info->flags & DEVICE_PCI); mach64->pci_id = (int) 'X' | ((int) 'G' << 8); - mach64->config_chip_id = 0x020000d7; + mach64->config_chip_id = 0x000000d7; mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/ mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/ if (info->flags & DEVICE_PCI) @@ -4282,10 +4370,7 @@ mach64vt2_init(const device_t *info) mach64_t *mach64 = mach64_common_init(info); svga_t *svga = &mach64->svga; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); mach64->type = MACH64_VT2; mach64->pci = 1; @@ -4299,8 +4384,7 @@ mach64vt2_init(const device_t *info) rom_init(&mach64->bios_rom, BIOS_ROMVT2_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - if (info->flags & DEVICE_PCI) - mem_mapping_disable(&mach64->bios_rom.mapping); + mem_mapping_disable(&mach64->bios_rom.mapping); svga->vblank_start = mach64_vblank_start; diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c new file mode 100644 index 000000000..9c0cbb616 --- /dev/null +++ b/src/video/vid_ati_mach8.c @@ -0,0 +1,5566 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of the 8514/A-compatible Mach8 and Mach32 graphics + * chips from ATI for the ISA/VLB/MCA/PCI buses. + * + * + * + * Authors: TheCollector1995. + * + * Copyright 2022-2023 TheCollector1995. + */ +#include +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/io.h> +#include <86box/mem.h> +#include <86box/timer.h> +#include <86box/mca.h> +#include <86box/pci.h> +#include <86box/rom.h> +#include <86box/plat.h> +#include <86box/thread.h> +#include <86box/video.h> +#include <86box/i2c.h> +#include <86box/vid_ddc.h> +#include <86box/vid_svga.h> +#include <86box/vid_svga_render.h> +#include <86box/vid_ati_eeprom.h> + +#define BIOS_MACH8_ROM_PATH "roms/video/mach8/BIOS.BIN" +#define BIOS_MACH32_ISA_ROM_PATH "roms/video/mach32/MACH32ISA.VBI" +#define BIOS_MACH32_VLB_ROM_PATH "roms/video/mach32/MACH32VLB.VBI" +#define BIOS_MACH32_PCI_ROM_PATH "roms/video/mach32/MACH32PCI.BIN" + +typedef struct mach_t { + ati_eeprom_t eeprom; + svga_t svga; + + rom_t bios_rom; + mem_mapping_t mmio_linear_mapping; + + int mca_bus; + int pci_bus; + int vlb_bus; + uint8_t regs[256]; + uint8_t pci_regs[256]; + uint8_t int_line; + int card; + int index; + + uint32_t memory; + + uint16_t config1; + uint16_t config2; + + uint8_t pos_regs[8]; + uint8_t cursor_col_0, cursor_col_1; + uint8_t ext_cur_col_0_r, ext_cur_col_1_r; + uint8_t ext_cur_col_0_g, ext_cur_col_1_g; + uint16_t cursor_offset_lo, cursor_offset_hi; + uint16_t cursor_x, cursor_y; + uint16_t misc; + uint16_t memory_aperture; + uint16_t local_cntl; + uint32_t linear_base; + uint8_t ap_size; + uint8_t bank_w, bank_r; + + struct { + uint8_t line_idx; + int16_t line_array[6]; + uint8_t patt_idx; + uint8_t patt_len; + uint8_t pix_trans[2]; + uint8_t eeprom_control; + uint16_t dest_x_end; + uint16_t dest_x_start; + uint16_t dest_y_end; + uint16_t src_x_end; + uint16_t src_x_start; + uint16_t src_x, src_y; + int16_t bres_count; + uint16_t clock_sel; + uint16_t crt_offset_lo; + uint16_t crt_offset_hi; + uint16_t dest_cmp_fn; + uint16_t dp_config; + uint16_t ext_ge_config; + uint16_t ge_offset_lo; + uint16_t ge_offset_hi; + uint16_t linedraw_opt; + uint16_t max_waitstates; + uint8_t patt_data_idx; + uint8_t patt_data[0x18]; + uint16_t scan_to_x; + uint16_t scratch0; + uint16_t scratch1; + uint16_t test; + uint16_t pattern; + uint8_t test2[2], test3[2]; + int src_y_dir; + int cmd_type; + int block_write_mono_pattern_enable; + int mono_pattern_enable; + int16_t cx_end_line, cy_end_line; + int16_t cx, cx_end, cy_end, dx, dx_end, dy_end; + int16_t dx_start, dy_start; + int16_t cy, sx_start, sx_end; + int16_t sx, x_count, xx_count, xxx_count; + int16_t sy, y_count; + int16_t err; + int16_t width, src_width; + int16_t height; + int poly_src, temp_cnt; + int stepx, stepy, src_stepx; + uint8_t color_pattern[16]; + uint8_t color_pattern_full[32]; + uint16_t color_pattern_word[8]; + int mono_pattern[8][8]; + uint32_t ge_offset; + uint32_t crt_offset; + uint32_t patt_len_reg; + int poly_fill; + uint16_t dst_clr_cmp_mask; + int clip_overrun; + int color_pattern_idx; + } accel; + + atomic_int force_busy, force_busy2; +} mach_t; + +static video_timings_t timing_gfxultra_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_mach32_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; +static video_timings_t timing_mach32_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; + + +static void mach_accel_outb(uint16_t port, uint8_t val, void *p); +static void mach_accel_outw(uint16_t port, uint16_t val, void *p); +static uint8_t mach_accel_inb(uint16_t port, void *p); +static uint16_t mach_accel_inw(uint16_t port, void *p); + +static void mach32_updatemapping(mach_t *mach); + +#ifdef ENABLE_MACH_LOG +int mach_do_log = ENABLE_MACH_LOG; + +static void +mach_log(const char *fmt, ...) +{ + va_list ap; + + if (mach_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define mach_log(fmt, ...) +#endif + +#define READ_PIXTRANS_BYTE_IO(cx, n, vgacore) \ + if ((mach->accel.cmd_type == 2) || (mach->accel.cmd_type == 5)) { \ + if (vgacore) { \ + if ((svga->bpp == 15) || (svga->bpp == 16)) \ + if (n == 0) \ + mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (svga->vram_mask >> 1)] & 0xff; \ + else \ + mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (svga->vram_mask >> 1)] >> 8; \ + else \ + mach->accel.pix_trans[(n)] = svga->vram[(dev->accel.dest + (cx) + (n)) & svga->vram_mask]; \ + } else \ + mach->accel.pix_trans[(n)] = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ + } + +#define READ_PIXTRANS_WORD(cx, n, vgacore) \ + if ((cmd == 0) || (cmd == 1) || (cmd == 5) || (mach->accel.cmd_type == -1)) { \ + if (vgacore) { \ + if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + temp = vram_w[((dev->accel.cy * dev->pitch) + (cx) + (n)) & (svga->vram_mask >> 1)]; \ + } else { \ + temp = svga->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & svga->vram_mask]; \ + temp |= (svga->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & svga->vram_mask] << 8); \ + } \ + } else { \ + temp = dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } \ + } else if ((mach->accel.cmd_type == 2) || (mach->accel.cmd_type == 5)) { \ + if ((svga->bpp == 8) || (svga->bpp == 24)) { \ + if (vgacore) { \ + temp = svga->vram[((dev->accel.dest) + (cx) + (n)) & svga->vram_mask]; \ + temp |= (svga->vram[((dev->accel.dest) + (cx) + (n + 1)) & svga->vram_mask] << 8); \ + } else { \ + temp = dev->vram[((dev->accel.dest) + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[((dev->accel.dest) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } \ + } else if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + temp = vram_w[((dev->accel.dest) + (cx) + (n)) & (svga->vram_mask >> 1)]; \ + } \ + } else if ((mach->accel.cmd_type == 3) || (mach->accel.cmd_type == 4)) { \ + if ((svga->bpp == 8) || (svga->bpp == 24)) { \ + if (vgacore) { \ + temp = svga->vram[((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (cx) + (n)) & svga->vram_mask]; \ + temp |= (svga->vram[((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (cx) + (n + 1)) & svga->vram_mask] << 8); \ + } else { \ + temp = dev->vram[((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } \ + } else if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + temp = vram_w[((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (cx) + (n)) & (svga->vram_mask >> 1)]; \ + } \ + } + +#define READ(addr, dat, vgacore) \ + if ((svga->bpp == 8) || (svga->bpp == 24)) \ + dat = vgacore ? (svga->vram[(addr) & (svga->vram_mask)]) : (dev->vram[(addr) & (dev->vram_mask)]); \ + else if ((svga->bpp == 15) || (svga->bpp == 16)) \ + dat = vram_w[(addr) & (svga->vram_mask >> 1)]; + +#define MIX(mixmode, dest_dat, src_dat) \ + { \ + switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \ + case 0x00: \ + dest_dat = ~dest_dat; \ + break; \ + case 0x01: \ + dest_dat = 0; \ + break; \ + case 0x02: \ + dest_dat = ~0; \ + break; \ + case 0x03: \ + dest_dat = dest_dat; \ + break; \ + case 0x04: \ + dest_dat = ~src_dat; \ + break; \ + case 0x05: \ + dest_dat = src_dat ^ dest_dat; \ + break; \ + case 0x06: \ + dest_dat = ~(src_dat ^ dest_dat); \ + break; \ + case 0x07: \ + dest_dat = src_dat; \ + break; \ + case 0x08: \ + dest_dat = ~(src_dat & dest_dat); \ + break; \ + case 0x09: \ + dest_dat = ~src_dat | dest_dat; \ + break; \ + case 0x0a: \ + dest_dat = src_dat | ~dest_dat; \ + break; \ + case 0x0b: \ + dest_dat = src_dat | dest_dat; \ + break; \ + case 0x0c: \ + dest_dat = src_dat & dest_dat; \ + break; \ + case 0x0d: \ + dest_dat = src_dat & ~dest_dat; \ + break; \ + case 0x0e: \ + dest_dat = ~src_dat & dest_dat; \ + break; \ + case 0x0f: \ + dest_dat = ~(src_dat | dest_dat); \ + break; \ + case 0x10: \ + dest_dat = MIN(src_dat, dest_dat); \ + break; \ + case 0x11: \ + dest_dat = dest_dat - src_dat; \ + break; \ + case 0x12: \ + dest_dat = src_dat - dest_dat; \ + break; \ + case 0x13: \ + dest_dat = src_dat + dest_dat; \ + break; \ + case 0x14: \ + dest_dat = MAX(src_dat, dest_dat); \ + break; \ + case 0x15: \ + dest_dat = (dest_dat - src_dat) / 2; \ + break; \ + case 0x16: \ + dest_dat = (src_dat - dest_dat) / 2; \ + break; \ + case 0x17: \ + dest_dat = (dest_dat + src_dat) / 2; \ + break; \ + case 0x18: \ + dest_dat = MAX(0, (dest_dat - src_dat)); \ + break; \ + case 0x19: \ + dest_dat = MAX(0, (dest_dat - src_dat)); \ + break; \ + case 0x1a: \ + dest_dat = MAX(0, (src_dat - dest_dat)); \ + break; \ + case 0x1b: \ + dest_dat = MIN(0xff, (dest_dat + src_dat)); \ + break; \ + case 0x1c: \ + dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ + break; \ + case 0x1d: \ + dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ + break; \ + case 0x1e: \ + dest_dat = MAX(0, (src_dat - dest_dat)) / 2; \ + break; \ + case 0x1f: \ + dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \ + break; \ + } \ + } + + +#define WRITE(addr, dat, vgacore) \ + if ((svga->bpp == 8) || (svga->bpp == 24)) { \ + if (vgacore) { \ + svga->vram[((addr)) & (svga->vram_mask)] = dat; \ + svga->changedvram[(((addr)) & (svga->vram_mask)) >> 12] = changeframecount; \ + } else { \ + dev->vram[((addr)) & (dev->vram_mask)] = dat; \ + dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = changeframecount; \ + } \ + } else if ((svga->bpp == 15) || (svga->bpp == 16)) { \ + vram_w[((addr)) & (svga->vram_mask >> 1)] = dat; \ + svga->changedvram[(((addr)) & (svga->vram_mask >> 1)) >> 11] = changeframecount; \ + } + + +static int +mach_pixel_write(mach_t *mach) +{ + if (mach->accel.dp_config & 1) + return 1; + + return 0; +} + +static int +mach_pixel_read(mach_t *mach) +{ + if (mach->accel.dp_config & 1) + return 0; + + return 1; +} + +static void +mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint32_t cpu_dat, mach_t *mach, ibm8514_t *dev, int len) +{ + svga_t *svga = &mach->svga; + int compare_mode; + int poly_src = 0; + uint16_t rd_mask = dev->accel.rd_mask; + uint16_t wrt_mask = dev->accel.wrt_mask; + uint16_t dest_cmp_clr = dev->accel.color_cmp; + int frgd_sel, bkgd_sel, mono_src; + int compare = 0; + uint16_t src_dat = 0, dest_dat = 0; + uint16_t old_dest_dat; + uint16_t *vram_w = (uint16_t *) svga->vram; + uint16_t mix = 0; + int16_t clip_l = dev->accel.clip_left & 0x7ff; + int16_t clip_t = dev->accel.clip_top & 0x7ff; + int16_t clip_r = dev->accel.multifunc[4] & 0x7ff; + int16_t clip_b = dev->accel.multifunc[3] & 0x7ff; + uint32_t mono_dat0 = 0, mono_dat1 = 0; + + if ((svga->bpp == 8) || (svga->bpp == 24)) { + rd_mask &= 0xff; + dest_cmp_clr &= 0xff; + } + + compare_mode = (mach->accel.dest_cmp_fn >> 3) & 7; + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + mach->accel.ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)); + + if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { + mach->force_busy = 1; + mach->force_busy2 = 1; + dev->force_busy = 1; + dev->force_busy2 = 1; + } + + if (cpu_input) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + if ((mach->accel.dp_config & 0x200) && (count == 2)) { + count >>= 1; + } + } + } + + if ((svga->bpp == 8) || (svga->bpp == 15) || (svga->bpp == 16) || (svga->bpp == 24)) { + if (svga->bpp == 24) + mach_log("24BPP: CMDType=%d, cwh(%d,%d,%d,%d), dpconfig=%04x\n", cmd_type, clip_l, clip_r, clip_t, clip_b, mach->accel.dp_config); + else + mach_log("BPP=%d, CMDType = %d, offs=%08x, DPCONFIG = %04x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, dstx = %d, dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monpattern = %x.\n", svga->bpp, cmd_type, mach->accel.ge_offset, mach->accel.dp_config, count, cpu_input, mono_src, frgd_sel, dev->accel.cur_x, mach->accel.dest_x_end, dev->ext_pitch, dev->ext_crt_pitch, mach->accel.dp_config & 1, mach->accel.mono_pattern_enable); + } + + switch (cmd_type) { + case 1: /*Extended Raw Linedraw from bres_count register (0x96ee)*/ + if (!cpu_input) { + dev->accel.dx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.dx |= ~0x5ff; + dev->accel.dy = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + dev->accel.dy |= ~0x5ff; + + dev->accel.cx = dev->accel.destx_distp; + if (dev->accel.destx_distp >= 0x600) + dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.desty_axstp; + if (dev->accel.desty_axstp >= 0x600) + dev->accel.cy |= ~0x5ff; + + mach->accel.width = mach->accel.bres_count; + dev->accel.sx = 0; + mach->accel.poly_fill = 0; + + mach->accel.color_pattern_idx = ((dev->accel.cx + (dev->accel.cy << 3)) & mach->accel.patt_len); + + mach->accel.stepx = (mach->accel.linedraw_opt & 0x20) ? 1 : -1; + mach->accel.stepy = (mach->accel.linedraw_opt & 0x80) ? 1 : -1; + + mach_log("Extended bresenham, CUR(%d,%d), DEST(%d,%d), width = %d, options = %04x, dpconfig = %04x, opt_ena = %03x.\n", dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, mach->accel.width, mach->accel.linedraw_opt, mach->accel.dp_config, mach->accel.max_waitstates & 0x100); + + if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { + if (mach_pixel_write(mach)) { + dev->data_available = 0; + dev->data_available2 = 0; + return; + } else if (mach_pixel_read(mach)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + } + + if (frgd_sel == 5) { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; + } + + /*The destination coordinates should match the pattern index.*/ + if (mach->accel.color_pattern_idx != mach->accel.patt_idx) + mach->accel.color_pattern_idx = mach->accel.patt_idx; + } + + if (mono_src == 1) { + count = mach->accel.width; + mix_dat = mach->accel.patt_data[0x10]; + dev->accel.temp_cnt = 8; + } + + if (mach->accel.linedraw_opt & 0x08) { /*Vector Line*/ + while (count--) { + switch (mono_src) { + case 0: + mix = 1; + break; + case 1: + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + case 3: + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } + mix = (mix & rd_mask) == rd_mask; + break; + } + + if ((((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b))) { + if (mach->accel.linedraw_opt & 0x02) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src, dev->local); + } + poly_src = ((poly_src & rd_mask) == rd_mask); + if (poly_src) + mach->accel.poly_fill = !mach->accel.poly_fill; + } + + if (!mach->accel.poly_fill || !(mach->accel.linedraw_opt & 0x02)) { + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } + if (mono_src == 3) { + src_dat = (src_dat & rd_mask) == rd_mask; + } + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.dx) + ((dev->accel.dy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if (mach->accel.dp_config & 0x10) { + if (mach->accel.linedraw_opt & 0x04) { + if (dev->accel.sx < mach->accel.width) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + } else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + } + } + + if ((mono_src == 1) && !count) + break; + else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + switch (mach->accel.linedraw_opt & 0xe0) { + case 0x00: + dev->accel.cx++; + dev->accel.dx++; + break; + case 0x20: + dev->accel.cx++; + dev->accel.dx++; + dev->accel.cy--; + dev->accel.dy--; + break; + case 0x40: + dev->accel.cy--; + dev->accel.dy--; + break; + case 0x60: + dev->accel.cx--; + dev->accel.dx--; + dev->accel.cy--; + dev->accel.dy--; + break; + case 0x80: + dev->accel.cx--; + dev->accel.dx--; + break; + case 0xa0: + dev->accel.cx--; + dev->accel.dx--; + dev->accel.cy++; + dev->accel.dy++; + break; + case 0xc0: + dev->accel.cy++; + dev->accel.dy++; + break; + case 0xe0: + dev->accel.cx++; + dev->accel.dx++; + dev->accel.cy++; + dev->accel.dy++; + break; + } + + dev->accel.sx++; + } + } else { /*Bresenham*/ + while (count--) { + switch (mono_src) { + case 0: + mix = 1; + break; + case 1: + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + case 3: + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } + mix = (mix & rd_mask) == rd_mask; + break; + } + + if ((((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b))) { + if (mach->accel.linedraw_opt & 0x02) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src, dev->local); + } + poly_src = ((poly_src & rd_mask) == rd_mask); + if (poly_src) + mach->accel.poly_fill = !mach->accel.poly_fill; + } + + if (!mach->accel.poly_fill || !(mach->accel.linedraw_opt & 0x02)) { + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), mix, dev->local); + } + if (mono_src == 3) { + src_dat = (src_dat & rd_mask) == rd_mask; + } + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.dx) + ((dev->accel.dy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if (mach->accel.dp_config & 0x10) { + if (mach->accel.linedraw_opt & 0x04) { + if (dev->accel.sx < mach->accel.width) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + } else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.dy) * (dev->pitch)) + (dev->accel.dx), dest_dat, dev->local); + } + } + } + } + + if ((mono_src == 1) && !count) + break; + else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (mach->accel.linedraw_opt & 0x40) { + dev->accel.dy += mach->accel.stepy; + if ((frgd_sel == 3) || (bkgd_sel == 3)) + dev->accel.cy += mach->accel.stepy; + + if (dev->accel.err_term >= 0) { + dev->accel.err_term += dev->accel.destx_distp; + dev->accel.dx += mach->accel.stepx; + if ((frgd_sel == 3) || (bkgd_sel == 3)) + dev->accel.cx += mach->accel.stepx; + } else { + dev->accel.err_term += dev->accel.desty_axstp; + } + } else { + dev->accel.dx += mach->accel.stepx; + if ((frgd_sel == 3) || (bkgd_sel == 3)) + dev->accel.cx += mach->accel.stepx; + + if (dev->accel.err_term >= 0) { + dev->accel.err_term += dev->accel.destx_distp; + dev->accel.dy += mach->accel.stepy; + if ((frgd_sel == 3) || (bkgd_sel == 3)) + dev->accel.cy += mach->accel.stepy; + } else { + dev->accel.err_term += dev->accel.desty_axstp; + } + } + + dev->accel.sx++; + } + } + dev->accel.cur_x = dev->accel.dx; + dev->accel.cur_y = dev->accel.dy; + break; + + case 2: /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ + if (!cpu_input) { + mach->accel.stepx = 0; + mach->accel.stepy = 0; + + dev->accel.dx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.dx |= ~0x5ff; + + dev->accel.dy = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + dev->accel.dy |= ~0x5ff; + + /*Destination Width*/ + if (mach->accel.dest_x_start != dev->accel.dx) + mach->accel.dest_x_start = dev->accel.dx; + + mach->accel.dx_start = mach->accel.dest_x_start; + if (mach->accel.dest_x_start >= 0x600) + mach->accel.dx_start |= ~0x5ff; + + mach->accel.dx_end = mach->accel.dest_x_end; + if (mach->accel.dest_x_end >= 0x600) + mach->accel.dx_end |= ~0x5ff; + + if (mach->accel.dx_end > mach->accel.dx_start) { + mach->accel.width = (mach->accel.dx_end - mach->accel.dx_start); + mach->accel.stepx = 1; + } else if (mach->accel.dx_end < mach->accel.dx_start) { + mach->accel.width = (mach->accel.dx_start - mach->accel.dx_end); + mach->accel.stepx = -1; + if (dev->accel.dx > 0) + dev->accel.dx--; + mach_log("BitBLT: Dst Negative X, dxstart = %d, end = %d, width = %d, dx = %d, dpconfig = %04x.\n", mach->accel.dest_x_start, mach->accel.dest_x_end, mach->accel.width, dev->accel.dx, mach->accel.dp_config); + } else { + mach->accel.stepx = 1; + mach->accel.width = 0; + mach_log("BitBLT: Dst Indeterminate X, dpconfig = %04x, destxend = %d, destxstart = %d.\n", mach->accel.dp_config, mach->accel.dest_x_end, mach->accel.dest_x_start); + } + + dev->accel.sx = 0; + mach->accel.poly_fill = 0; + mach->accel.color_pattern_idx = ((dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len); + if ((svga->bpp == 24) && (mono_src != 1)) { + if (mach->accel.color_pattern_idx == mach->accel.patt_len) + mach->accel.color_pattern_idx = mach->accel.patt_data_idx; + } else if ((svga->bpp == 24) && (frgd_sel == 5) && (mono_src == 1) && (mach->accel.patt_len_reg & 0x4000)) + mach->accel.color_pattern_idx = 0; + + /*Height*/ + mach->accel.dy_start = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + mach->accel.dy_start |= ~0x5ff; + mach->accel.dy_end = mach->accel.dest_y_end; + if (mach->accel.dest_y_end >= 0x600) + mach->accel.dy_end |= ~0x5ff; + + if (mach->accel.dy_end > mach->accel.dy_start) { + mach->accel.height = (mach->accel.dy_end - mach->accel.dy_start); + mach->accel.stepy = 1; + } else if (mach->accel.dy_end < mach->accel.dy_start) { + mach->accel.height = (mach->accel.dy_start - mach->accel.dy_end); + mach->accel.stepy = -1; + } else { + mach->accel.height = 0; + mach->accel.stepy = 1; + } + + dev->accel.sy = 0; + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); + else + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); + + mach->accel.src_stepx = 0; + + /*Source Width*/ + dev->accel.cx = mach->accel.src_x; + if (mach->accel.src_x >= 0x600) + dev->accel.cx |= ~0x5ff; + + dev->accel.cy = mach->accel.src_y; + if (mach->accel.src_y >= 0x600) + dev->accel.cy |= ~0x5ff; + + mach->accel.sx_start = mach->accel.src_x_start; + if (mach->accel.src_x_start >= 0x600) + mach->accel.sx_start |= ~0x5ff; + + mach->accel.sx_end = mach->accel.src_x_end; + if (mach->accel.src_x_end >= 0x600) + mach->accel.sx_end |= ~0x5ff; + + if (mach->accel.sx_end > mach->accel.sx_start) { + mach->accel.src_width = (mach->accel.sx_end - mach->accel.sx_start); + mach->accel.src_stepx = 1; + mach_log("BitBLT: Src Positive X: wh(%d,%d), srcwidth = %d, coordinates: %d,%d px, start: %d, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n", mach->accel.width, mach->accel.height, mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_start, mach->accel.src_x_end, mach->accel.src_stepx, mach->accel.dp_config, mach->accel.src_width & 1); + } else if (mach->accel.sx_end < mach->accel.sx_start) { + mach->accel.src_width = (mach->accel.sx_start - mach->accel.sx_end); + mach->accel.src_stepx = -1; + if (dev->accel.cx > 0) + dev->accel.cx--; + mach_log("BitBLT: Src Negative X: width = %d, coordinates: %d,%d px, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n", mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_end, mach->accel.src_stepx, mach->accel.dp_config, mach->accel.src_width & 1); + } else { + mach->accel.src_stepx = 1; + mach->accel.src_width = 0; + mach_log("BitBLT: Src Indeterminate X: width = %d, coordinates: %d,%d px, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n", mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_end, mach->accel.src_stepx, mach->accel.dp_config, mach->accel.src_width & 1); + } + mach->accel.sx = 0; + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + else + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + + if ((svga->bpp == 24) && (frgd_sel == 5)) { + mach_log("BitBLT=%04x, WH(%d,%d), SRCWidth=%d, c(%d,%d), s(%d,%d).\n", mach->accel.dp_config, mach->accel.width, mach->accel.height, mach->accel.src_width, dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy); + } else + mach_log("BitBLT=%04x, Pitch=%d, C(%d,%d), SRCWidth=%d, WH(%d,%d), geoffset=%08x.\n", mach->accel.dp_config, dev->ext_pitch, dev->accel.cx, dev->accel.cy, mach->accel.src_width, mach->accel.width, mach->accel.height, (mach->accel.ge_offset << 2)); + + if (mono_src == 1) { + if ((mach->accel.mono_pattern_enable) && !(mach->accel.patt_len_reg & 0x4000)) { + mono_dat0 = mach->accel.patt_data[0x10]; + mono_dat0 |= (mach->accel.patt_data[0x11] << 8); + mono_dat0 |= (mach->accel.patt_data[0x12] << 16); + mono_dat0 |= (mach->accel.patt_data[0x13] << 24); + mono_dat1 = mach->accel.patt_data[0x14]; + mono_dat1 |= (mach->accel.patt_data[0x15] << 8); + mono_dat1 |= (mach->accel.patt_data[0x16] << 16); + mono_dat1 |= (mach->accel.patt_data[0x17] << 24); + + for (uint8_t y = 0; y < 8; y++) { + for (uint8_t x = 0; x < 8; x++) { + uint32_t temp = (y & 4) ? mono_dat1 : mono_dat0; + mach->accel.mono_pattern[y][7 - x] = (temp >> (x + ((y & 3) << 3))) & 1; + } + } + } + } + + if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { + if (mach_pixel_write(mach)) { + dev->data_available = 0; + dev->data_available2 = 0; + return; + } else if (mach_pixel_read(mach)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + } + + if (mono_src == 1) { + if (!mach->accel.mono_pattern_enable && !(mach->accel.patt_len_reg & 0x4000)) { + count = mach->accel.width; + mix_dat = mach->accel.patt_data[0x10] ^ ((mach->accel.patt_idx & 1) ? 0xff : 0); + dev->accel.temp_cnt = 8; + } + } + + if (frgd_sel == 5) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + for (int x = 0; x <= mach->accel.patt_len; x += 2) { + mach->accel.color_pattern_word[x + (mach->accel.color_pattern_idx & 1)] = (mach->accel.patt_data[x & mach->accel.patt_len] & 0xff); + mach->accel.color_pattern_word[x + (mach->accel.color_pattern_idx & 1)] |= (mach->accel.patt_data[(x + 1) & mach->accel.patt_len] << 8); + } + } else { + if ((svga->bpp == 24) && (mach->accel.patt_len < 3)) { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x]; + mach_log("BITBLT: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern[x], mach->accel.patt_data_idx, mach->accel.patt_len); + } + } else { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; + } + } + } + + /*The destination coordinates should match the pattern index.*/ + if (mach->accel.color_pattern_idx != mach->accel.patt_idx) + mach->accel.color_pattern_idx = mach->accel.patt_idx; + } + + if ((mach->accel.dy_end == mach->accel.dy_start)) { + mach_log("No DEST.\n"); + return; + } + + if ((mono_src == 3) || (bkgd_sel == 3) || (frgd_sel == 3)) { + if (mach->accel.sx_end == mach->accel.sx_start) { + mach_log("No SRC.\n"); + return; + } + } + + if (cpu_input) { + if (mach->accel.dp_config == 0x3251) { + if (dev->accel.sy == mach->accel.height) + return; + } + } + + while (count--) { + switch (mono_src) { + case 0: + mix = 1; + break; + case 1: + if (mach->accel.mono_pattern_enable) { + mix = mach->accel.mono_pattern[dev->accel.dy & 7][dev->accel.dx & 7]; + } else { + if ((svga->bpp == 24) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) + mix = 1; + else { + if (!dev->accel.temp_cnt) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + case 3: + READ(dev->accel.src + ((dev->accel.cx)), mix, dev->local); + mix = (mix & rd_mask) == rd_mask; + break; + } + + if (((dev->accel.dx) >= (clip_l) && (dev->accel.dx) <= (clip_r) && + (dev->accel.dy) >= (clip_t) && (dev->accel.dy) <= (clip_b))) { + if (mach->accel.dp_config & 0x02) { + READ(dev->accel.src + (dev->accel.cx), poly_src, dev->local); + poly_src = ((poly_src & rd_mask) == rd_mask); + if (poly_src) + mach->accel.poly_fill = !mach->accel.poly_fill; + } + + if (!mach->accel.poly_fill || !(mach->accel.dp_config & 0x02)) { + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + READ(dev->accel.src + (dev->accel.cx), src_dat, dev->local); + if (mono_src == 3) { + src_dat = (src_dat & rd_mask) == rd_mask; + } + } + break; + case 5: + if (mix) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + src_dat = mach->accel.color_pattern_word[mach->accel.color_pattern_idx]; + } else { + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + } + } else + src_dat = 0; + break; + } + } + + if ((svga->bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) { + if (dev->accel.sy & 1) { + READ(dev->accel.dest + dev->accel.dx - dev->ext_pitch, dest_dat, dev->local); + } else { + READ(dev->accel.dest + dev->accel.dx, dest_dat, dev->local); + } + } else { + READ(dev->accel.dest + dev->accel.dx, dest_dat, dev->local); + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if (mach->accel.dp_config & 0x10) { + if ((svga->bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) { + if (dev->accel.sy & 1) { + WRITE(dev->accel.dest + dev->accel.dx - dev->ext_pitch, dest_dat, dev->local); + } else { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat, dev->local); + } + } else { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat, dev->local); + } + } + } + + if ((svga->bpp == 8) || (svga->bpp == 24)) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if ((mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3)) { + dev->accel.cx += mach->accel.src_stepx; + mach->accel.sx++; + if (mach->accel.sx >= mach->accel.src_width) { + mach->accel.sx = 0; + if (mach->accel.src_stepx == -1) + dev->accel.cx += mach->accel.src_width; + else + dev->accel.cx -= mach->accel.src_width; + dev->accel.cy += (mach->accel.src_y_dir ? 1 : -1); + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + else + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + } + } + + dev->accel.dx += mach->accel.stepx; + + if ((svga->bpp == 8) || ((svga->bpp == 24) && (mach->accel.patt_len >= 3) && (mono_src != 1))) + mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + + if ((svga->bpp == 24) && (mach->accel.color_pattern_idx == mach->accel.patt_len) && (mach->accel.patt_len >= 3) && (mono_src != 1)) { + mach->accel.color_pattern_idx = mach->accel.patt_data_idx; + } else if ((svga->bpp == 24) && (mach->accel.patt_len < 3)) { + if (mach->accel.patt_len == 2) { + mach->accel.color_pattern_idx++; + if (mach->accel.color_pattern_idx == 3) + mach->accel.color_pattern_idx = 0; + } else { + mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + } + } else if ((svga->bpp == 24) && (mach->accel.patt_len_reg & 0x4000) && (frgd_sel == 5)) { + mach->accel.color_pattern_idx++; + if (mach->accel.color_pattern_idx == 3) + mach->accel.color_pattern_idx = 0; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + } + + dev->accel.sx++; + if (dev->accel.sx >= mach->accel.width) { + mach->accel.poly_fill = 0; + dev->accel.sx = 0; + if (mach->accel.stepx == -1) + dev->accel.dx += mach->accel.width; + else + dev->accel.dx -= mach->accel.width; + + dev->accel.dy += mach->accel.stepy; + dev->accel.sy++; + + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); + else { + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); + } + if ((mono_src == 1) && (svga->bpp == 24) && (frgd_sel == 5)) + mach->accel.color_pattern_idx = 0; + else + mach->accel.color_pattern_idx = ((dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len); + + if ((svga->bpp == 24) && (mach->accel.color_pattern_idx == mach->accel.patt_len) && (mono_src != 1)) + mach->accel.color_pattern_idx = 0; + if ((mono_src == 1) && !mach->accel.mono_pattern_enable && !(mach->accel.patt_len_reg & 0x4000)) { + dev->accel.cur_x = dev->accel.dx; + dev->accel.cur_y = dev->accel.dy; + return; + } + if (dev->accel.sy >= mach->accel.height) { + if ((mono_src == 2) || (mono_src == 3) || (frgd_sel == 2) || (frgd_sel == 3) || (bkgd_sel == 2) || (bkgd_sel == 3)) + return; + if ((mono_src == 1) && (frgd_sel == 5) && (svga->bpp == 24) && (mach->accel.patt_len_reg & 0x4000)) + return; + dev->accel.cur_x = dev->accel.dx; + dev->accel.cur_y = dev->accel.dy; + return; + } + } + } + break; + + case 3: /*Direct Linedraw (Polyline) from linedraw indexes (0xfeee)*/ + case 4: + if (!cpu_input) { + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; + + if (dev->accel.cur_x >= 0x600) { + mach_log("Linedraw XOver = %d.\n", dev->accel.cur_x); + dev->accel.cx |= ~0x5ff; + } + if (dev->accel.cur_y >= 0x600) { + mach_log("Linedraw YOver = %d.\n", dev->accel.cur_y); + dev->accel.cy |= ~0x5ff; + } + + dev->accel.dx = ABS(mach->accel.cx_end_line - dev->accel.cx) << 1; + dev->accel.dy = ABS(mach->accel.cy_end_line - dev->accel.cy) << 1; + + mach->accel.stepx = (mach->accel.cx_end_line < dev->accel.cx) ? -1 : 1; + mach->accel.stepy = (mach->accel.cy_end_line < dev->accel.cy) ? -1 : 1; + + dev->accel.sx = 0; + + mach_log("Linedraw: c(%d,%d), d(%d,%d), cend(%d,%d).\n", dev->accel.cur_x, dev->accel.cur_y, dev->accel.dx, dev->accel.dy, mach->accel.cx_end_line, mach->accel.cy_end_line); + + if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { + if (mach_pixel_write(mach)) { + dev->data_available = 0; + dev->data_available2 = 0; + return; + } else if (mach_pixel_read(mach)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + } + + if (frgd_sel == 5) { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; + } + } + + if (mono_src == 1) { + mix_dat = mach->accel.patt_data[0x10]; + dev->accel.temp_cnt = 8; + } + + count = (dev->accel.dx > dev->accel.dy) ? (dev->accel.dx >> 1) : (dev->accel.dy >> 1); + mach->accel.width = count; + + if (dev->accel.dx > dev->accel.dy) { + mach->accel.err = (dev->accel.dy - dev->accel.dx) >> 1; + if (mono_src == 1) { + while (count--) { + if (!dev->accel.temp_cnt) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + + if ((((dev->accel.cx) >= clip_l) && ((dev->accel.cx) <= clip_r) && ((dev->accel.cy) >= clip_t) && ((dev->accel.cy) <= clip_b))) { + mach->accel.clip_overrun = 0; + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + src_dat = 0; + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } else + mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f); + + if (!count) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (mach->accel.err >= 0) { + dev->accel.cy += mach->accel.stepy; + mach->accel.err -= dev->accel.dx; + } + dev->accel.cx += mach->accel.stepx; + mach->accel.err += dev->accel.dy; + } + } else { + while (count--) { + switch (mono_src) { + case 0: + case 3: + mix = 1; + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + } + + if ((((dev->accel.cx) >= clip_l) && ((dev->accel.cx) <= clip_r) && ((dev->accel.cy) >= clip_t) && ((dev->accel.cy) <= clip_b))) { + mach->accel.clip_overrun = 0; + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + src_dat = 0; + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { + if (mach->accel.linedraw_opt & 0x04) { + if (dev->accel.sx < mach->accel.width) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } + } else + mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f); + + if (dev->accel.sx >= mach->accel.width) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (mach->accel.err >= 0) { + dev->accel.cy += mach->accel.stepy; + mach->accel.err -= dev->accel.dx; + } + dev->accel.cx += mach->accel.stepx; + mach->accel.err += dev->accel.dy; + + dev->accel.sx++; + } + } + } else { + mach->accel.err = (dev->accel.dx - dev->accel.dy) >> 1; + if (mono_src == 1) { + while (count--) { + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + + if ((((dev->accel.cx) >= clip_l) && ((dev->accel.cx) <= clip_r) && ((dev->accel.cy) >= clip_t) && ((dev->accel.cy) <= clip_b))) { + mach->accel.clip_overrun = 0; + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + src_dat = 0; + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } else + mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f); + + if (!count) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (mach->accel.err >= 0) { + dev->accel.cx += mach->accel.stepx; + mach->accel.err -= dev->accel.dy; + } + dev->accel.cy += mach->accel.stepy; + mach->accel.err += dev->accel.dx; + } + } else { + while (count--) { + switch (mono_src) { + case 0: + case 3: + mix = 1; + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + } + + if ((((dev->accel.cx) >= clip_l) && ((dev->accel.cx) <= clip_r) && ((dev->accel.cy) >= clip_t) && ((dev->accel.cy) <= clip_b))) { + mach->accel.clip_overrun = 0; + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + src_dat = 0; + } + break; + case 5: + if (mix) { + src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { + if (mach->accel.linedraw_opt & 0x04) { + if (dev->accel.sx < mach->accel.width) { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } else { + if ((svga->bpp == 15) || (svga->bpp == 16)) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat, dev->local); + } + } + } + } else + mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f); + + if (dev->accel.sx >= mach->accel.width) + break; + + if (svga->bpp == 8) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (mach->accel.err >= 0) { + dev->accel.cx += mach->accel.stepx; + mach->accel.err -= dev->accel.dy; + } + dev->accel.cy += mach->accel.stepy; + mach->accel.err += dev->accel.dx; + + dev->accel.sx++; + } + } + } + mach->accel.line_array[(cmd_type == 4) ? 4 : 0] = dev->accel.cx; + mach->accel.line_array[(cmd_type == 4) ? 5 : 1] = dev->accel.cy; + dev->accel.cur_x = mach->accel.line_array[(cmd_type == 4) ? 4 : 0]; + dev->accel.cur_y = mach->accel.line_array[(cmd_type == 4) ? 5 : 1]; + break; + + case 5: /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ + if (!cpu_input) { + mach->accel.stepx = 0; + mach->accel.stepy = 0; + + dev->accel.dx = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + dev->accel.dx |= ~0x5ff; + dev->accel.dy = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + dev->accel.dy |= ~0x5ff; + + /*Destination Width*/ + mach->accel.dx_start = dev->accel.cur_x; + if (dev->accel.cur_x >= 0x600) + mach->accel.dx_start |= ~0x5ff; + mach->accel.dx_end = mach->accel.scan_to_x; + if (mach->accel.scan_to_x >= 0x600) + mach->accel.dx_end |= ~0x5ff; + + if (mach->accel.dx_end > mach->accel.dx_start) { + mach->accel.width = (mach->accel.dx_end - mach->accel.dx_start); + mach->accel.stepx = 1; + } else if (mach->accel.dx_end < mach->accel.dx_start) { + mach->accel.width = (mach->accel.dx_start - mach->accel.dx_end); + mach->accel.stepx = -1; + if (dev->accel.dx > 0) + dev->accel.dx--; + } else { + mach->accel.stepx = 1; + mach->accel.width = 0; + } + + dev->accel.sx = 0; + if ((svga->bpp == 24) && (mach->accel.patt_len < 0x17)) + mach->accel.color_pattern_idx = 0; + + /*Step Y*/ + mach->accel.dy_start = dev->accel.cur_y; + if (dev->accel.cur_y >= 0x600) + mach->accel.dy_start |= ~0x5ff; + mach->accel.dy_end = mach->accel.dest_y_end; + if (mach->accel.dest_y_end >= 0x600) + mach->accel.dy_end |= ~0x5ff; + + if (mach->accel.dy_end > mach->accel.dy_start) { + mach->accel.stepy = 1; + } else if (mach->accel.dy_end < mach->accel.dy_start) { + mach->accel.stepy = -1; + } else { + mach->accel.stepy = 0; + } + + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); + else + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); + + mach->accel.src_stepx = 0; + + /*Source Width*/ + dev->accel.cx = mach->accel.src_x; + if (mach->accel.src_x >= 0x600) + dev->accel.cx |= ~0x5ff; + dev->accel.cy = mach->accel.src_y; + if (mach->accel.src_y >= 0x600) + dev->accel.cy |= ~0x5ff; + + mach->accel.sx_start = mach->accel.src_x_start; + if (mach->accel.src_x_start >= 0x600) + mach->accel.sx_start |= ~0x5ff; + + mach->accel.sx_end = mach->accel.src_x_end; + if (mach->accel.src_x_end >= 0x600) + mach->accel.sx_end |= ~0x5ff; + + if (mach->accel.sx_end > mach->accel.sx_start) { + mach->accel.src_width = (mach->accel.sx_end - mach->accel.sx_start); + mach->accel.src_stepx = 1; + } else if (mach->accel.sx_end < mach->accel.sx_start) { + mach->accel.src_width = (mach->accel.sx_start - mach->accel.sx_end); + mach->accel.src_stepx = -1; + if (dev->accel.cx > 0) + dev->accel.cx--; + } else { + mach->accel.src_stepx = 1; + mach->accel.src_width = 0; + } + + mach->accel.sx = 0; + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + else + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + + if ((svga->bpp == 24) && (frgd_sel == 5)) { + if (mach->accel.patt_len == 0x17) + mach->accel.color_pattern_idx = 0; + dev->accel.x1 = dev->accel.dx + mach->accel.width; + if (dev->accel.x1 == dev->pitch) { + dev->accel.x2 = mach->accel.width & 1; + } else if ((dev->accel.x1 == mach->accel.width) && (dev->accel.dy & 1) && !dev->accel.y1 && dev->accel.x2) { + if (mach->accel.patt_len == 0x17) + mach->accel.color_pattern_idx = 3; + dev->accel.x3 = 1; + } else + dev->accel.x3 = 0; + } else + mach_log("ScanToX=%04x, Pitch=%d, C(%d,%d), SRCWidth=%d, WH(%d,%d), geoffset=%08x.\n", mach->accel.dp_config, dev->ext_pitch, dev->accel.cx, dev->accel.cy, mach->accel.src_width, mach->accel.width, mach->accel.height, (mach->accel.ge_offset << 1)); + + dev->accel.y1 = 0; + + if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { + if (mach_pixel_write(mach)) { + dev->data_available = 0; + dev->data_available2 = 0; + return; + } else if (mach_pixel_read(mach)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + } + + if (mono_src == 1) { + count = mach->accel.width; + mix_dat = mach->accel.patt_data[0x10]; + dev->accel.temp_cnt = 8; + } + + if (frgd_sel == 5) { + if (svga->bpp != 24) { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; + } + } else { + if (mach->accel.patt_len == 0x17) { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern_full[x] = mach->accel.patt_data[x]; + mach_log("ScanToX: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern_full[x], mach->accel.patt_data_idx, mach->accel.patt_len); + } + } else { + for (int x = 0; x <= mach->accel.patt_len; x++) { + mach->accel.color_pattern[x] = mach->accel.patt_data[x]; + mach_log("ScanToX: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern[x], mach->accel.patt_data_idx, mach->accel.patt_len); + } + } + } + } + + while (count--) { + switch (mono_src) { + case 0: + mix = 1; + break; + case 1: + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; + } + mix = (mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + break; + case 2: + if (mach->accel.dp_config & 0x1000) { + mix = mix_dat >> 0x1f; + mix_dat <<= 1; + } else { + if (mach->accel.dp_config & 0x200) { + mix = mix_dat & 1; + mix_dat >>= 1; + } else { + mix = mix_dat & 0x80; + mix_dat <<= 1; + mix_dat |= 1; + } + } + break; + case 3: + READ(dev->accel.src + (dev->accel.cx), mix, dev->local); + mix = (mix & rd_mask) == rd_mask; + break; + } + + if ((dev->accel.dx) >= (clip_l) && (dev->accel.dx) <= (clip_r) && + (dev->accel.dy) >= (clip_t) && (dev->accel.dy) <= (clip_b)) { + switch (mix ? frgd_sel : bkgd_sel) { + case 0: + src_dat = dev->accel.bkgd_color; + break; + case 1: + src_dat = dev->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + if (mach_pixel_read(mach)) + src_dat = cpu_dat; + else { + READ(dev->accel.src + (dev->accel.cx), src_dat, dev->local); + if (mono_src == 3) { + src_dat = (src_dat & rd_mask) == rd_mask; + } + } + break; + case 5: + if (mix) { + if (svga->bpp == 24) { + if (mach->accel.patt_len == 0x17) + src_dat = mach->accel.color_pattern_full[mach->accel.color_pattern_idx]; + else + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + } else + src_dat = mach->accel.color_pattern[(dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len]; + } else + src_dat = 0; + break; + } + + READ(dev->accel.dest + (dev->accel.dx), dest_dat, dev->local); + + switch (compare_mode) { + case 1: + compare = 1; + break; + case 2: + compare = ((dest_dat) >= dest_cmp_clr) ? 0 : 1; + break; + case 3: + compare = ((dest_dat) < dest_cmp_clr) ? 0 : 1; + break; + case 4: + compare = ((dest_dat) != dest_cmp_clr) ? 0 : 1; + break; + case 5: + compare = ((dest_dat) == dest_cmp_clr) ? 0 : 1; + break; + case 6: + compare = ((dest_dat) <= dest_cmp_clr) ? 0 : 1; + break; + case 7: + compare = ((dest_dat) > dest_cmp_clr) ? 0 : 1; + break; + } + + if (!compare) { + if (mach_pixel_write(mach)) { + old_dest_dat = dest_dat; + MIX(mix, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } + } + + if (mach->accel.dp_config & 0x10) { + WRITE(dev->accel.dest + (dev->accel.dx), dest_dat, dev->local); + } + } + + if ((svga->bpp == 8) || (svga->bpp == 24)) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + dev->accel.cx += mach->accel.src_stepx; + mach->accel.sx++; + if (mach->accel.sx >= mach->accel.src_width) { + mach->accel.sx = 0; + if (mach->accel.src_stepx == -1) { + dev->accel.cx += mach->accel.src_width; + } else + dev->accel.cx -= mach->accel.src_width; + dev->accel.cy += (mach->accel.src_y_dir ? 1 : -1); + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + else + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + } + + dev->accel.dx += mach->accel.stepx; + if ((svga->bpp == 24) && (mach->accel.patt_len == 0x17)) { + mach->accel.color_pattern_idx++; + if (dev->accel.x3) { + if (mach->accel.color_pattern_idx == 9) + mach->accel.color_pattern_idx = 3; + } else { + if (mach->accel.color_pattern_idx == 6) + mach->accel.color_pattern_idx = 0; + } + } else if ((svga->bpp == 24) && (mach->accel.patt_len < 3)) { + mach->accel.color_pattern_idx++; + if (mach->accel.color_pattern_idx == 3) + mach->accel.color_pattern_idx = 0; + } else + mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + + dev->accel.sx++; + if (dev->accel.sx >= mach->accel.width) { + dev->accel.sx = 0; + dev->accel.dy += mach->accel.stepy; + if ((svga->bpp == 15) || (svga->bpp == 16)) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); + else + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); + if (mach->accel.line_idx == 2) { + mach->accel.line_array[0] = dev->accel.dx; + mach->accel.line_array[4] = dev->accel.dx; + } + return; + } + } + break; + } +} + +static void +mach_accel_out_pixtrans(mach_t *mach, ibm8514_t *dev, uint16_t port, uint16_t val, uint16_t len) +{ + int frgd_sel, bkgd_sel, mono_src; + + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + if ((mach->accel.dp_config & 4) && (mach->accel.cmd_type != 5)) { + val = (val >> 8) | (val << 8); + } + + switch (mach->accel.dp_config & 0x200) { + case 0x000: /*8-bit size*/ + if ((mono_src == 2)) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if ((mach->accel.dp_config & 0x1000) && dev->local) + val = (val >> 8) | (val << 8); + mach_accel_start(mach->accel.cmd_type, 1, 8, val | (val << 16), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, val | (val << 16), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, val | (val << 16), mach, dev, len); + break; + case 0x200: /*16-bit size*/ + if ((mono_src == 2)) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if (mach->accel.dp_config & 0x1000) + val = (val >> 8) | (val << 8); + mach_accel_start(mach->accel.cmd_type, 1, 16, val | (val << 16), 0, mach, dev, len); + } else { + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, val | (val << 16), mach, dev, len); + } + } else { + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, val | (val << 16), mach, dev, len); + } + break; + } +} + +static void +mach_out(uint16_t addr, uint8_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + svga_t *svga = &mach->svga; + ibm8514_t *dev = &svga->dev8514; + uint8_t old; + uint8_t rs2; + + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x1ce: + mach->index = val; + break; + case 0x1cf: + old = mach->regs[mach->index]; + mach->regs[mach->index] = val; + mach_log("ATI VGA write reg=0x%02X, val=0x%02X\n", mach->index, val); + switch (mach->index) { + case 0xa3: + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + break; + case 0xa7: + if ((old ^ val) & 0x80) + svga_recalctimings(svga); + break; + case 0xad: + if (dev->local) { + if ((old ^ val) & 0x0c) + svga_recalctimings(svga); + } + break; + case 0xb0: + if ((old ^ val) & 0x60) + svga_recalctimings(svga); + break; + case 0xae: + case 0xb2: + case 0xbe: + mach_log("ATI VGA write reg=0x%02X, val=0x%02X\n", mach->index, val); + if (mach->regs[0xbe] & 0x08) { /* Read/write bank mode */ + mach->bank_r = (((mach->regs[0xb2] & 1) << 3) | ((mach->regs[0xb2] & 0xe0) >> 5)); + mach->bank_w = ((mach->regs[0xb2] & 0x1e) >> 1); + if (dev->local) { + mach->bank_r |= (((mach->regs[0xae] & 0x0c) << 2)); + mach->bank_w |= (((mach->regs[0xae] & 3) << 4)); + } + if (ibm8514_on) + mach_log("Separate B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]); + } else { /* Single bank mode */ + mach->bank_w = ((mach->regs[0xb2] & 0x1e) >> 1); + if (dev->local) { + mach->bank_w |= (((mach->regs[0xae] & 3) << 4)); + } + mach->bank_r = mach->bank_w; + if (ibm8514_on) + mach_log("Single B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]); + } + svga->read_bank = mach->bank_r << 16; + svga->write_bank = mach->bank_w << 16; + + if (mach->index == 0xbe) { + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + } + break; + case 0xbd: + if ((old ^ val) & 4) { + mach32_updatemapping(mach); + } + break; + case 0xb3: + ati_eeprom_write(&mach->eeprom, val & 8, val & 2, val & 1); + break; + case 0xb6: + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + break; + case 0xb8: + if (dev->local) { + if ((old ^ val) & 0x40) + svga_recalctimings(svga); + } else { + if ((old ^ val) & 0xc0) + svga_recalctimings(svga); + } + break; + case 0xb9: + if ((old ^ val) & 2) + svga_recalctimings(svga); + break; + } + break; + + case 0x2ea: + case 0x2eb: + case 0x2ec: + case 0x2ed: + rs2 = !!(mach->accel.ext_ge_config & 0x1000); + if (dev->local) { + if (mach->pci_bus) + ati68860_ramdac_out((addr & 3) | (rs2 << 2), val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + } else + svga_out(addr, val, svga); + return; + + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + rs2 = !!(mach->accel.ext_ge_config & 0x1000); + if (dev->local) { + if (mach->pci_bus) + ati68860_ramdac_out((addr & 3) | (rs2 << 2), val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + } else + svga_out(addr, val, svga); + return; + + case 0x3CF: + if (svga->gdcaddr == 6) { + uint8_t old_val = svga->gdcreg[6]; + svga->gdcreg[6] = val; + if ((svga->gdcreg[6] & 0xc) != (old_val & 0xc)) + mach32_updatemapping(mach); + return; + } + break; + + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; + } + svga_out(addr, val, svga); +} + +static uint8_t +mach_in(uint16_t addr, void *p) +{ + mach_t *mach = (mach_t *) p; + svga_t *svga = &mach->svga; + ibm8514_t *dev = &svga->dev8514; + uint8_t temp; + uint8_t rs2; + + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x1ce: + temp = mach->index; + break; + case 0x1cf: + switch (mach->index) { + case 0xa8: + temp = (svga->vc >> 8) & 3; + break; + case 0xa9: + temp = svga->vc & 0xff; + break; + case 0xb0: + temp = mach->regs[0xb0] | 0x80; + if (dev->local) { /*Mach32 VGA 1MB memory*/ + temp |= 0x08; + temp &= ~0x10; + } else { /*ATI 28800 VGA 512kB memory*/ + temp &= ~0x08; + temp |= 0x10; + } + break; + case 0xb7: + temp = mach->regs[0xb7] & ~8; + if (ati_eeprom_read(&mach->eeprom)) + temp |= 8; + break; + + default: + temp = mach->regs[mach->index]; + break; + } + break; + + case 0x2ea: + case 0x2eb: + case 0x2ec: + case 0x2ed: + rs2 = !!(mach->accel.ext_ge_config & 0x1000); + if (dev->local) { + if (mach->pci_bus) + return ati68860_ramdac_in((addr & 3) | (rs2 << 2), svga->ramdac, svga); + else + return svga_in(addr, svga); + } + return svga_in(addr, svga); + + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + rs2 = !!(mach->accel.ext_ge_config & 0x1000); + if (dev->local) { + if (mach->pci_bus) + return ati68860_ramdac_in((addr & 3) | (rs2 << 2), svga->ramdac, svga); + else + return svga_in(addr, svga); + } + return svga_in(addr, svga); + + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + temp = svga->crtc[svga->crtcreg]; + break; + case 0x3DA: + svga->attrff = 0; + if (svga->cgastat & 0x01) + svga->cgastat &= ~0x38; + else + svga->cgastat ^= 0x38; + return svga->cgastat; + + default: + temp = svga_in(addr, svga); + break; + } + return temp; +} + +static void +mach_recalctimings(svga_t *svga) +{ + mach_t *mach = (mach_t *) svga->p; + ibm8514_t *dev = &svga->dev8514; + + if (vga_on && !ibm8514_on) { + switch (((mach->regs[0xbe] & 0x10) >> 1) | ((mach->regs[0xb9] & 2) << 1) | ((svga->miscout & 0x0c) >> 2)) { + case 0x00: + svga->clock = (cpuclock * (double) (1ull << 32)) / 42954000.0; + break; + case 0x01: + svga->clock = (cpuclock * (double) (1ull << 32)) / 48771000.0; + break; + case 0x02: + mach_log("clock 2\n"); + break; + case 0x03: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + case 0x04: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x05: + svga->clock = (cpuclock * (double) (1ull << 32)) / 56640000.0; + break; + case 0x06: + mach_log("clock 2\n"); + break; + case 0x07: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + break; + case 0x08: + svga->clock = (cpuclock * (double) (1ull << 32)) / 30240000.0; + break; + case 0x09: + svga->clock = (cpuclock * (double) (1ull << 32)) / 32000000.0; + break; + case 0x0A: + svga->clock = (cpuclock * (double) (1ull << 32)) / 37500000.0; + break; + case 0x0B: + svga->clock = (cpuclock * (double) (1ull << 32)) / 39000000.0; + break; + case 0x0C: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x0D: + svga->clock = (cpuclock * (double) (1ull << 32)) / 56644000.0; + break; + case 0x0E: + svga->clock = (cpuclock * (double) (1ull << 32)) / 75000000.0; + break; + case 0x0F: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + default: + break; + } + } + + if (mach->regs[0xa3] & 0x10) + svga->ma_latch |= 0x10000; + + if (mach->regs[0xb0] & 0x40) + svga->ma_latch |= 0x20000; + + if (dev->local) { + if (mach->regs[0xad] & 0x04) + svga->ma_latch |= 0x40000; + + if (mach->regs[0xad] & 0x08) + svga->ma_latch |= 0x80000; + + if (mach->regs[0xb8] & 0x40) + svga->clock *= 2; + } else { + switch (mach->regs[0xb8] & 0xc0) { + case 0x40: + svga->clock *= 2; + break; + case 0x80: + svga->clock *= 3; + break; + case 0xc0: + svga->clock *= 4; + break; + } + } + + if (mach->regs[0xa7] & 0x80) + svga->clock *= 3; + + if (mach->regs[0xb6] & 0x10) { + svga->hdisp <<= 1; + svga->htotal <<= 1; + svga->rowoffset <<= 1; + svga->gdcreg[5] &= ~0x40; + } + + if (mach->regs[0xb0] & 0x20) { + svga->gdcreg[5] |= 0x40; + } + + if (vga_on && !ibm8514_on) { + if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + switch (svga->gdcreg[5] & 0x60) { + case 0x00: + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_4bpp_lowres; + else + svga->render = svga_render_4bpp_highres; + break; + case 0x20: /*4 colours*/ + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_2bpp_lowres; + else + svga->render = svga_render_2bpp_highres; + break; + case 0x40: + case 0x60: /*256+ colours*/ + switch (svga->bpp) { + case 8: + svga->map8 = svga->pallook; + if (svga->lowres) + svga->render = svga_render_8bpp_lowres; + else { + svga->render = svga_render_8bpp_highres; + svga->ma_latch <<= 1; + svga->rowoffset <<= 1; + } + break; + + } + break; + } + } + } + } else if (dev->local) { + if (ibm8514_on) { + svga->hdisp_time = svga->hdisp = (dev->hdisp + 1) << 3; + dev->pitch = (dev->accel.advfunc_cntl & 4) ? 1024 : 640; + svga->htotal = (dev->htotal + 1); + svga->vtotal = (dev->vtotal + 1); + svga->vsyncstart = (dev->vsyncstart + 1); + svga->rowcount = !!(dev->disp_cntl & 0x08); + svga->dispend = ((dev->vdisp >> 1) + 1); + svga->interlace = dev->interlace; + svga->split = 0xffffff; + svga->vblankstart = svga->dispend; + + if (svga->dispend == 766) { + svga->dispend = 768; + svga->vblankstart = svga->dispend; + } + + if (svga->dispend == 598) { + svga->dispend = 600; + svga->vblankstart = svga->dispend; + } + + if (dev->accel.advfunc_cntl & 4) { + if (dev->ibm_mode) { + if (svga->hdisp == 8) { + svga->hdisp = 1024; + svga->dispend = 768; + svga->vtotal = 1536; + svga->vsyncstart = 1536; + } + } + + if (svga->interlace) { + svga->dispend >>= 1; + svga->vsyncstart >>= 2; + svga->vtotal >>= 2; + } else { + svga->vsyncstart >>= 1; + svga->vtotal >>= 1; + } + + dev->pitch = dev->ext_pitch; + svga->rowoffset = dev->ext_crt_pitch; + + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + } else { + if (dev->ibm_mode) { + if ((svga->hdisp == 1024) && !dev->internal_pitch) { + svga->hdisp = 640; + svga->dispend = 480; + } + } + + if (svga->interlace) { + svga->dispend >>= 1; + svga->vsyncstart >>= 2; + svga->vtotal >>= 2; + } else { + svga->vsyncstart >>= 1; + svga->vtotal >>= 1; + } + + dev->pitch = dev->ext_pitch; + svga->rowoffset = dev->ext_crt_pitch; + + svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; + } + switch (svga->bpp) { + case 8: + default: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + break; + case 16: + svga->render = svga_render_16bpp_highres; + break; + case 24: + svga->render = svga_render_24bpp_highres; + break; + } + mach_log("BPP=%d, VRAM Mask=%08x, NormalPitch=%d, CRTPitch=%d, VSYNCSTART=%d, VTOTAL=%d, ROWCOUNT=%d, mode=%d, highres bit=%x, has_vga?=%d, override=%d.\n", svga->bpp, svga->vram_mask, dev->pitch, dev->ext_crt_pitch, svga->vsyncstart, svga->vtotal, svga->rowcount, dev->ibm_mode, dev->accel.advfunc_cntl & 4, ibm8514_has_vga, svga->override); + } + mach_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", svga->hdisp, svga->vtotal, svga->htotal, svga->dispend, svga->rowoffset, svga->split, svga->vsyncstart, svga->split); + } +} + +static void +mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, uint32_t val, int len) +{ + int frgd_sel, bkgd_sel, mono_src; + switch (port) { + case 0x82e8: + case 0xc2e8: + if (len == 1) { + dev->accel.cur_y = (dev->accel.cur_y & 0x700) | val; + } else { + dev->accel.cur_y = val & 0x7ff; + } + break; + case 0x82e9: + case 0xc2e9: + if (len == 1) { + dev->accel.cur_y = (dev->accel.cur_y & 0xff) | ((val & 0x07) << 8); + } + break; + + case 0x86e8: + case 0xc6e8: + if (len == 1) { + dev->accel.cur_x = (dev->accel.cur_x & 0x700) | val; + } else { + dev->accel.cur_x = val & 0x7ff; + } + break; + case 0x86e9: + case 0xc6e9: + if (len == 1) { + dev->accel.cur_x = (dev->accel.cur_x & 0xff) | ((val & 0x07) << 8); + } + break; + + case 0x8ae8: + case 0xcae8: + if (len == 1) + dev->accel.desty_axstp = (dev->accel.desty_axstp & 0x3f00) | val; + else { + mach->accel.src_y = val; + dev->accel.desty_axstp = val & 0x3fff; + if (val & 0x2000) + dev->accel.desty_axstp |= ~0x1fff; + } + break; + case 0x8ae9: + case 0xcae9: + if (len == 1) { + dev->accel.desty_axstp = (dev->accel.desty_axstp & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + dev->accel.desty_axstp |= ~0x1fff; + } + break; + + case 0x8ee8: + case 0xcee8: + if (len == 1) + dev->accel.destx_distp = (dev->accel.destx_distp & 0x3f00) | val; + else { + mach->accel.src_x = val; + dev->accel.destx_distp = val & 0x3fff; + if (val & 0x2000) + dev->accel.destx_distp |= ~0x1fff; + } + break; + case 0x8ee9: + case 0xcee9: + if (len == 1) { + dev->accel.destx_distp = (dev->accel.destx_distp & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + dev->accel.destx_distp |= ~0x1fff; + } + break; + + case 0x92e8: + if (len != 1) + dev->test = val; + case 0xd2e8: + mach_log("92E8 = %04x\n", val); + if (len == 1) + dev->accel.err_term = (dev->accel.err_term & 0x3f00) | val; + else { + dev->accel.err_term = val & 0x3fff; + if (val & 0x2000) + dev->accel.err_term |= ~0x1fff; + } + break; + case 0x92e9: + case 0xd2e9: + if (len == 1) { + dev->accel.err_term = (dev->accel.err_term & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + dev->accel.err_term |= ~0x1fff; + } + break; + + case 0x96e8: + case 0xd6e8: + if (len == 1) + dev->accel.maj_axis_pcnt = (dev->accel.maj_axis_pcnt & 0x0700) | val; + else { + mach->accel.test = val & 0x1fff; + dev->accel.maj_axis_pcnt = val & 0x07ff; + } + break; + case 0x96e9: + case 0xd6e9: + if (len == 1) { + dev->accel.maj_axis_pcnt = (dev->accel.maj_axis_pcnt & 0xff) | ((val & 0x07) << 8); + } + break; + + case 0x9ae8: + case 0xdae8: + dev->accel.ssv_state = 0; + if (len == 1) + dev->accel.cmd = (dev->accel.cmd & 0xff00) | val; + else { + dev->data_available = 0; + dev->data_available2 = 0; + dev->accel.cmd = val; + mach_log("CMD8514 = %04x.\n", val); + mach->accel.cmd_type = -1; + if (port == 0xdae8) { + if (dev->accel.cmd & 0x100) + dev->accel.cmd_back = 0; + } + ibm8514_accel_start(-1, 0, -1, 0, svga, len); + } + break; + case 0x9ae9: + case 0xdae9: + if (len == 1) { + dev->data_available = 0; + dev->data_available2 = 0; + dev->accel.cmd = (dev->accel.cmd & 0xff) | (val << 8); + mach->accel.cmd_type = -1; + if (port == 0xdae9) { + if (dev->accel.cmd & 0x100) + dev->accel.cmd_back = 0; + } + ibm8514_accel_start(-1, 0, -1, 0, svga, len); + } + break; + + case 0x9ee8: + case 0xdee8: + dev->accel.ssv_state = 1; + if (len == 1) + dev->accel.short_stroke = (dev->accel.short_stroke & 0xff00) | val; + else { + dev->accel.short_stroke = val; + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; + + if (dev->accel.cur_x >= 0x600) { + dev->accel.cx |= ~0x5ff; + } + if (dev->accel.cur_y >= 0x600) { + dev->accel.cy |= ~0x5ff; + } + + if (dev->accel.cmd & 0x1000) { + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); + } else { + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); + } + } + break; + case 0x9ee9: + case 0xdee9: + if (len == 1) { + dev->accel.short_stroke = (dev->accel.short_stroke & 0xff) | (val << 8); + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; + + if (dev->accel.cur_x >= 0x600) { + dev->accel.cx |= ~0x5ff; + } + if (dev->accel.cur_y >= 0x600) { + dev->accel.cy |= ~0x5ff; + } + + if (dev->accel.cmd & 0x1000) { + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); + } else { + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); + ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); + } + } + break; + + case 0xa2e8: + case 0xe2e8: + if (port == 0xe2e8) { + if (dev->accel.cmd_back) { + if (len == 1) + dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; + else + dev->accel.bkgd_color = val; + } else { + if (len == 1) { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[1] = val; + } + } else { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach_accel_out_pixtrans(mach, dev, port, val, len); + } else { + if (ibm8514_cpu_dest(svga)) + break; + ibm8514_accel_out_pixtrans(svga, port, val, len); + } + } + } + } else { + if (len == 1) + dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; + else + dev->accel.bkgd_color = val; + } + break; + case 0xa2e9: + case 0xe2e9: + if (port == 0xe2e9) { + if (dev->accel.cmd_back) { + if (len == 1) + dev->accel.bkgd_color = (dev->accel.bkgd_color & 0xff00) | (val << 8); + } else { + if (len == 1) { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[0] = val; + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + switch (mach->accel.dp_config & 0x200) { + case 0x000: /*8-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + case 0x200: /*16-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if (mach->accel.dp_config & 0x1000) + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev, len); + else + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + } + } + } + } + } else { + if (len == 1) + dev->accel.bkgd_color = (dev->accel.bkgd_color & 0xff00) | (val << 8); + } + break; + + case 0xa6e8: + case 0xe6e8: + if (port == 0xe6e8) { + if (dev->accel.cmd_back) { + if (len == 1) + dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; + else + dev->accel.frgd_color = val; + } else { + if (len == 1) { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[1] = val; + } + } else { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach_accel_out_pixtrans(mach, dev, port, val, len); + } else { + if (ibm8514_cpu_dest(svga)) + break; + ibm8514_accel_out_pixtrans(svga, port, val, len); + } + } + } + } else { + if (len == 1) + dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; + else + dev->accel.frgd_color = val; + } + break; + case 0xa6e9: + case 0xe6e9: + if (port == 0xe6e9) { + if (dev->accel.cmd_back) { + if (len == 1) + dev->accel.frgd_color = (dev->accel.frgd_color & 0xff00) | (val << 8); + } else { + if (len == 1) { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[0] = val; + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + switch (mach->accel.dp_config & 0x200) { + case 0x000: /*8-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + case 0x200: /*16-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if (mach->accel.dp_config & 0x1000) + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev, len); + else + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + } + } + } + } + } else { + if (len == 1) + dev->accel.frgd_color = (dev->accel.frgd_color & 0xff00) | (val << 8); + } + break; + + case 0xaae8: + case 0xeae8: + if (len == 1) + dev->accel.wrt_mask = (dev->accel.wrt_mask & 0x00ff) | val; + else + dev->accel.wrt_mask = val; + break; + case 0xaae9: + case 0xeae9: + if (len == 1) + dev->accel.wrt_mask = (dev->accel.wrt_mask & 0xff00) | (val << 8); + break; + + case 0xaee8: + case 0xeee8: + if (len == 1) + dev->accel.rd_mask = (dev->accel.rd_mask & 0x00ff) | val; + else + dev->accel.rd_mask = val; + break; + case 0xaee9: + case 0xeee9: + if (len == 1) + dev->accel.rd_mask = (dev->accel.rd_mask & 0xff00) | (val << 8); + break; + + case 0xb2e8: + case 0xf2e8: + if (len == 1) + dev->accel.color_cmp = (dev->accel.color_cmp & 0x00ff) | val; + else + dev->accel.color_cmp = val; + break; + case 0xb2e9: + case 0xf2e9: + if (len == 1) + dev->accel.color_cmp = (dev->accel.color_cmp & 0xff00) | (val << 8); + break; + + case 0xb6e8: + case 0xf6e8: + dev->accel.bkgd_mix = val & 0xff; + break; + + case 0xbae8: + case 0xfae8: + dev->accel.frgd_mix = val & 0xff; + break; + + case 0xbee8: + case 0xfee8: + if (len == 1) + dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff00) | val; + else { + dev->accel.multifunc_cntl = val; + dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; + if ((dev->accel.multifunc_cntl >> 12) == 1) { + dev->accel.clip_top = val & 0x7ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 2) { + dev->accel.clip_left = val & 0x7ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 3) { + dev->accel.multifunc[3] = val & 0x7ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 4) { + dev->accel.multifunc[4] = val & 0x7ff; + } + mach_log("CLIPBOTTOM=%d, CLIPRIGHT=%d, bpp=%d, pitch=%d.\n", dev->accel.multifunc[3], dev->accel.multifunc[4], svga->bpp, dev->pitch); + if ((dev->accel.multifunc_cntl >> 12) == 5) { + if (!dev->local || !dev->ext_crt_pitch) + dev->ext_crt_pitch = 128; + svga_recalctimings(svga); + } + if (port == 0xfee8) + dev->accel.cmd_back = 1; + else + dev->accel.cmd_back = 0; + } + break; + case 0xbee9: + case 0xfee9: + if (len == 1) { + dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff) | (val << 8); + dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; + if ((dev->accel.multifunc_cntl >> 12) == 1) { + dev->accel.clip_top = dev->accel.multifunc_cntl & 0x7ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 2) { + dev->accel.clip_left = dev->accel.multifunc_cntl & 0x7ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 5) { + if (!dev->local || !dev->ext_crt_pitch) + dev->ext_crt_pitch = 128; + svga_recalctimings(svga); + } + if (port == 0xfee9) + dev->accel.cmd_back = 1; + else + dev->accel.cmd_back = 0; + } + break; + +/*ATI Mach8/32 specific registers*/ + case 0x82ee: + mach->accel.patt_data_idx = val & 0x1f; + mach_log("Pattern Data Index = %d.\n", val & 0x1f); + break; + + case 0x8eee: + if (len == 1) { + mach->accel.patt_data[mach->accel.patt_data_idx] = val; + } else { + mach->accel.patt_data[mach->accel.patt_data_idx] = val & 0xff; + mach->accel.patt_data[mach->accel.patt_data_idx + 1] = (val >> 8) & 0xff; + if (mach->accel.mono_pattern_enable) + mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & 0x17; + else { + frgd_sel = (mach->accel.dp_config >> 13) & 7; + mono_src = (mach->accel.dp_config >> 5) & 3; + if ((svga->bpp == 24) && (mach->accel.patt_len == 0x17) && (frgd_sel == 5)) { + mach->accel.patt_data_idx += 2; + dev->accel.y1 = 1; + } else { + if (svga->bpp == 24) + mach->accel.patt_data_idx += 2; + else + mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & mach->accel.patt_len; + + } + mach_log("ExtCONFIG = %04x, Pattern Mono = %04x, selidx = %d, dataidx = %d, bit 0 = %02x len = %d.\n", mach->accel.ext_ge_config, val, mach->accel.patt_idx, mach->accel.patt_data_idx, val & 1, mach->accel.patt_len); + } + } + break; + case 0x8eef: + if (len == 1) { + mach->accel.patt_data[mach->accel.patt_data_idx + 1] = val; + if (mach->accel.mono_pattern_enable) + mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & 7; + else { + frgd_sel = (mach->accel.dp_config >> 13) & 7; + if ((svga->bpp == 24) && (mach->accel.patt_len == 0x17) && (frgd_sel == 5)) { + mach->accel.patt_data_idx += 2; + dev->accel.y1 = 1; + } else + mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & mach->accel.patt_len; + } + } + break; + + case 0x96ee: + if (len == 1) + mach->accel.bres_count = (mach->accel.bres_count & 0x700) | val; + else { + mach->accel.bres_count = val & 0x7ff; + mach_log("96EE line draw.\n"); + dev->data_available = 0; + dev->data_available2 = 0; + mach->accel.cmd_type = 1; + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + case 0x96ef: + if (len == 1) { + mach->accel.bres_count = (mach->accel.bres_count & 0xff) | ((val & 0x07) << 8); + mach_log("96EE (2) line draw.\n"); + dev->data_available = 0; + dev->data_available2 = 0; + mach->accel.cmd_type = 1; + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + + case 0x9aee: + mach->accel.line_idx = val & 0x07; + break; + + case 0xa2ee: + mach_log("Line OPT = %04x\n", val); + if (len == 1) + mach->accel.linedraw_opt = (mach->accel.linedraw_opt & 0xff00) | val; + else { + mach->accel.linedraw_opt = val; + } + break; + case 0xa2ef: + if (len == 1) { + mach->accel.linedraw_opt = (mach->accel.linedraw_opt & 0x00ff) | (val << 8); + } + break; + + case 0xa6ee: + if (len == 1) + mach->accel.dest_x_start = (mach->accel.dest_x_start & 0x700) | val; + else + mach->accel.dest_x_start = val & 0x7ff; + break; + case 0xa6ef: + if (len == 1) + mach->accel.dest_x_start = (mach->accel.dest_x_start & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xaaee: + if (len == 1) + mach->accel.dest_x_end = (mach->accel.dest_x_end & 0x700) | val; + else { + mach->accel.dest_x_end = val & 0x7ff; + } + break; + case 0xaaef: + if (len == 1) + mach->accel.dest_x_end = (mach->accel.dest_x_end & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xaeee: + mach_log("AEEE write val = %04x.\n", val); + if (len == 1) + mach->accel.dest_y_end = (mach->accel.dest_y_end & 0x700) | val; + else { + mach->accel.dest_y_end = val & 0x7ff; + if ((val + 1) == 0x10000) { + mach_log("Dest_Y_end overflow val = %04x\n", val); + mach->accel.dest_y_end = 0; + } + dev->data_available = 0; + dev->data_available2 = 0; + mach_log("BitBLT = %04x.\n", mach->accel.dp_config); + mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + case 0xaeef: + if (len == 1) { + mach->accel.dest_y_end = (mach->accel.dest_y_end & 0x0ff) | ((val & 0x07) << 8); + dev->data_available = 0; + dev->data_available2 = 0; + mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + + case 0xb2ee: + if (len == 1) + mach->accel.src_x_start = (mach->accel.src_x_start & 0x700) | val; + else + mach->accel.src_x_start = val & 0x7ff; + break; + case 0xb2ef: + if (len == 1) + mach->accel.src_x_start = (mach->accel.src_x_start & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xb6ee: + dev->accel.bkgd_mix = val & 0xff; + break; + + case 0xbaee: + dev->accel.frgd_mix = val & 0xff; + break; + + case 0xbeee: + if (len == 1) + mach->accel.src_x_end = (mach->accel.src_x_end & 0x700) | val; + else { + mach->accel.src_x_end = val & 0x7ff; + } + break; + case 0xbeef: + if (len == 1) + mach->accel.src_x_end = (mach->accel.src_x_end & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xc2ee: + mach->accel.src_y_dir = val & 1; + break; + + case 0xc6ee: + mach->accel.cmd_type = 0; + mach_log("TODO: Short Stroke.\n"); + break; + + case 0xcaee: + mach_log("CAEE write val = %04x.\n", val); + if (len == 1) + mach->accel.scan_to_x = (mach->accel.scan_to_x & 0x700) | val; + else { + mach->accel.scan_to_x = (val & 0x7ff); + if ((val + 1) == 0x10000) { + mach_log("Scan_to_X overflow val = %04x\n", val); + mach->accel.scan_to_x = 0; + } + dev->data_available = 0; + dev->data_available2 = 0; + mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ + mach_log("ScanToX = %04x.\n", mach->accel.dp_config); + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + case 0xcaef: + if (len == 1) { + mach->accel.scan_to_x = (mach->accel.scan_to_x & 0x0ff) | ((val & 0x07) << 8); + dev->data_available = 0; + dev->data_available2 = 0; + mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + } + break; + + case 0xceee: + mach_log("CEEE write val = %04x.\n", val); + if (len == 1) + mach->accel.dp_config = (mach->accel.dp_config & 0xff00) | val; + else { + mach->accel.dp_config = val; + } + break; + case 0xceef: + if (len == 1) { + mach->accel.dp_config = (mach->accel.dp_config & 0x00ff) | (val << 8); + } + break; + + case 0xd2ee: + mach->accel.patt_len = val & 0x1f; + mach_log("Pattern Length = %d, val = %04x.\n", val & 0x1f, val); + mach->accel.mono_pattern_enable = !!(val & 0x80); + if (len != 1) { + mach->accel.patt_len_reg = val; + } else { + mach->accel.patt_len_reg = (mach->accel.patt_len_reg & 0xff00) | val; + } + break; + case 0xd2ef: + if (len == 1) + mach->accel.patt_len_reg = (mach->accel.patt_len_reg & 0x00ff) | (val << 8); + break; + + case 0xd6ee: + mach->accel.patt_idx = val & 0x1f; + mach_log("Pattern Index = %d, val = %02x.\n", val & 0x1f, val); + break; + + case 0xdaee: + mach_log("DAEE (extclipl) write val = %d\n", val); + if (len == 1) + dev->accel.clip_left = (dev->accel.clip_left & 0x700) | val; + else { + dev->accel.clip_left = val & 0x7ff; + } + break; + case 0xdaef: + if (len == 1) + dev->accel.clip_left = (dev->accel.clip_left & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xdeee: + mach_log("DEEE (extclipt) write val = %d\n", val); + if (len == 1) + dev->accel.clip_top = (dev->accel.clip_top & 0x700) | val; + else { + dev->accel.clip_top = val & 0x7ff; + } + break; + case 0xdeef: + if (len == 1) + dev->accel.clip_top = (dev->accel.clip_top & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xe2ee: + mach_log("E2EE (extclipr) write val = %d\n", val); + if (len == 1) + dev->accel.multifunc[4] = (dev->accel.multifunc[4] & 0x700) | val; + else { + dev->accel.multifunc[4] = val & 0x7ff; + } + break; + case 0xe2ef: + if (len == 1) + dev->accel.multifunc[4] = (dev->accel.multifunc[4] & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xe6ee: + mach_log("E6EE (extclipb) write val = %d\n", val); + if (len == 1) + dev->accel.multifunc[3] = (dev->accel.multifunc[3] & 0x700) | val; + else { + dev->accel.multifunc[3] = val & 0x7ff; + } + break; + case 0xe6ef: + if (len == 1) + dev->accel.multifunc[3] = (dev->accel.multifunc[3] & 0x0ff) | ((val & 0x07) << 8); + break; + + case 0xeeee: + if (len == 1) + mach->accel.dest_cmp_fn = (mach->accel.dest_cmp_fn & 0xff00) | val; + else + mach->accel.dest_cmp_fn = val; + break; + case 0xeeef: + if (len == 1) + mach->accel.dest_cmp_fn = (mach->accel.dest_cmp_fn & 0x00ff) | (val << 8); + break; + + case 0xf2ee: + mach_log("F2EE.\n"); + if (len == 1) + mach->accel.dst_clr_cmp_mask = (mach->accel.dst_clr_cmp_mask & 0xff00) | val; + else + mach->accel.dst_clr_cmp_mask = val; + break; + case 0xf2ef: + if (len == 1) + mach->accel.dst_clr_cmp_mask = (mach->accel.dst_clr_cmp_mask & 0x00ff) | (val << 8); + break; + + case 0xfeee: + if (mach->accel.dp_config == 0x2231 || mach->accel.dp_config == 0x2211) + mach_log("FEEE val = %d, lineidx = %d, DPCONFIG = %04x, CPUCX = %04x.\n", val, mach->accel.line_idx, mach->accel.dp_config, CX); + if (len != 1) { + mach->accel.line_array[mach->accel.line_idx] = val; + dev->accel.cur_x = mach->accel.line_array[(mach->accel.line_idx == 4) ? 4 : 0]; + dev->accel.cur_y = mach->accel.line_array[(mach->accel.line_idx == 5) ? 5 : 1]; + mach->accel.cx_end_line = mach->accel.line_array[2]; + mach->accel.cy_end_line = mach->accel.line_array[3]; + if ((mach->accel.line_idx == 3) || (mach->accel.line_idx == 5)) { + mach->accel.cmd_type = (mach->accel.line_idx == 5) ? 4 : 3; + mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev, len); + mach->accel.line_idx = (mach->accel.line_idx == 5) ? 4 : 2; + break; + } + mach->accel.line_idx++; + } + break; + } +} + +static void +mach_accel_out(uint16_t port, uint32_t val, mach_t *mach, int len) +{ + svga_t *svga = &mach->svga; + ibm8514_t *dev = &svga->dev8514; + + mach_log("Port accel out = %04x, val = %04x, len = %d.\n", port, val, len); + + if (port & 0x8000) { + mach_accel_out_fifo(mach, svga, dev, port, val, len); + } else { + switch (port) { + case 0x2e8: + if (len == 1) + dev->htotal = (dev->htotal & 0xff00) | val; + else { + dev->htotal = val; + svga_recalctimings(svga); + } + break; + case 0x2e9: + if (len != 1) { + dev->htotal = (dev->htotal & 0xff) | (val << 8); + mach_log("ATI 8514/A: H_TOTAL write 02E8 = %d\n", dev->htotal + 1); + svga_recalctimings(svga); + } + break; + + case 0x6e8: + dev->hdisp = val; + mach_log("ATI 8514/A: H_DISP write 06E8 = %d\n", dev->hdisp + 1); + svga_recalctimings(svga); + break; + + case 0xae8: + mach_log("ATI 8514/A: H_SYNC_STRT write 0AE8 = %d\n", val + 1); + svga_recalctimings(svga); + break; + + case 0xee8: + mach_log("ATI 8514/A: H_SYNC_WID write 0EE8 = %d\n", val + 1); + svga_recalctimings(svga); + break; + + case 0x12e8: + if (len == 1) + dev->vtotal = (dev->vtotal & 0x1f00) | val; + else { + dev->vtotal = val & 0x1fff; + svga_recalctimings(svga); + } + break; + case 0x12e9: + if (len == 1) { + dev->vtotal = (dev->vtotal & 0xff) | ((val & 0x1f) << 8); + mach_log("ATI 8514/A: V_TOTAL write 12E8 = %d\n", dev->vtotal); + svga_recalctimings(svga); + } + break; + + case 0x16e8: + if (len == 1) + dev->vdisp = (dev->vdisp & 0x1f00) | val; + else { + dev->vdisp = val & 0x1fff; + svga_recalctimings(svga); + } + break; + case 0x16e9: + if (len == 1) { + dev->vdisp = (dev->vdisp & 0xff) | ((val & 0x1f) << 8); + mach_log("ATI 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp); + svga_recalctimings(svga); + } + break; + + case 0x1ae8: + if (len == 1) + dev->vsyncstart = (dev->vsyncstart & 0x1f00) | val; + else { + dev->vsyncstart = val & 0x1fff; + svga_recalctimings(svga); + } + break; + case 0x1ae9: + if (len == 1) { + dev->vsyncstart = (dev->vsyncstart & 0xff) | ((val & 0x1f) << 8); + mach_log("ATI 8514/A: V_SYNC_STRT write 1AE8 = %d\n", dev->vsyncstart); + svga_recalctimings(svga); + } + break; + + case 0x1ee8: + dev->vsyncwidth = val; + mach_log("ATI 8514/A: V_SYNC_WID write 1EE8 = %02x\n", val); + svga_recalctimings(svga); + break; + + case 0x22e8: + dev->disp_cntl = val & 0x7e; + dev->interlace = !!(val & 0x10); + mach_log("ATI 8514/A: DISP_CNTL write 22E8 = %02x, SCANMODULOS = %d\n", dev->disp_cntl, dev->scanmodulos); + svga_recalctimings(svga); + break; + + case 0x42e8: + if (len == 1) { + dev->subsys_stat &= ~val; + } else { + dev->subsys_stat &= ~(val & 0xff); + dev->subsys_cntl = (val >> 8); + mach_log("CNTL = %02x.\n", val >> 8); + } + break; + case 0x42e9: + if (len == 1) { + dev->subsys_cntl = val; + mach_log("CNTL = %02x.\n", val); + } + break; + + case 0x4ae8: + mach_log("ATI 8514/A: VGA ON (0x4ae8) = %i, val = %02x\n", vga_on, val); + if (!val) + break; + if (!dev->local || !dev->ext_crt_pitch) + dev->ext_crt_pitch = 128; + dev->accel.advfunc_cntl = val & 7; + ibm8514_on = (dev->accel.advfunc_cntl & 1); + vga_on = !ibm8514_on; + dev->ibm_mode = 1; + if (ibm8514_on) + svga->adv_flags |= FLAG_ATI; + else + svga->adv_flags &= ~FLAG_ATI; + svga_recalctimings(svga); + break; + + /*ATI Mach8/32 specific registers*/ + case 0x6ee: + mach_log("6EE write val = %02x, len = %d.\n", val, len); + break; + + case 0x6ef: + mach_log("6EF write val = %02x, len = %d.\n", val, len); + break; + + case 0xaee: + if (len == 1) + mach->cursor_offset_lo = (mach->cursor_offset_lo & 0xff00) | val; + else { + mach_log("AEE val=%02x.\n", val); + mach->cursor_offset_lo = val; + svga->hwcursor.addr = mach->cursor_offset_lo << 2; + } + break; + case 0xaef: + if (len == 1) { + mach->cursor_offset_lo = (mach->cursor_offset_lo & 0x00ff) | (val << 8); + svga->hwcursor.addr = mach->cursor_offset_lo << 2; + } + break; + + case 0xeee: + mach->cursor_offset_hi = val & 0x0f; + if (len != 1) { + svga->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16))) << 2; + svga->hwcursor.ena = !!(val & 0x8000); + } + mach_log("EEE val=%08x.\n", svga->hwcursor.addr); + break; + case 0xeef: + if (len == 1) { + svga->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16))) << 2; + svga->hwcursor.ena = !!(val & 0x80); + } + break; + + case 0x12ee: + if (len == 1) { + svga->hwcursor.x = (svga->hwcursor.x & 0x700) | val; + } else { + svga->hwcursor.x = val & 0x7ff; + mach_log("X = %03x.\n", val); + } + break; + case 0x12ef: + if (len == 1) { + svga->hwcursor.x = (svga->hwcursor.x & 0x0ff) | ((val & 0x07) << 8); + } + break; + + case 0x16ee: + if (len == 1) { + svga->hwcursor.y = (svga->hwcursor.y & 0xf00) | val; + } else { + svga->hwcursor.y = val & 0xfff; + } + break; + case 0x16ef: + if (len == 1) { + svga->hwcursor.y = (svga->hwcursor.y & 0x0ff) | ((val & 0x0f) << 8); + } + break; + + case 0x1aee: + if (len != 1) { + mach->cursor_col_0 = val & 0xff; + mach->cursor_col_1 = (val >> 8) & 0xff; + } else + mach->cursor_col_0 = val; + break; + case 0x1aef: + if (len == 1) + mach->cursor_col_1 = val; + break; + + case 0x1eee: + if (len != 1) { + svga->hwcursor.xoff = val & 0x3f; + svga->hwcursor.yoff = (val >> 8) & 0x3f; + } else + svga->hwcursor.xoff = val & 0x3f; + break; + case 0x1eef: + if (len == 1) + svga->hwcursor.yoff = val & 0x3f; + break; + + case 0x2aee: + mach_log("2AEE write val = %04x\n", val); + if (len == 1) + mach->accel.crt_offset_lo = (mach->accel.crt_offset_lo & 0xff00) | val; + else + mach->accel.crt_offset_lo = val; + break; + case 0x2aef: + if (len == 1) + mach->accel.crt_offset_lo = (mach->accel.crt_offset_lo & 0x00ff) | (val << 8); + break; + + case 0x2eee: + mach_log("2EEE write val = %04x\n", val); + if (len == 1) + mach->accel.crt_offset_hi = (mach->accel.crt_offset_hi & 0xff00) | val; + else + mach->accel.crt_offset_hi = val; + break; + case 0x2eef: + if (len == 1) + mach->accel.crt_offset_hi = (mach->accel.crt_offset_hi & 0x00ff) | (val << 8); + break; + + case 0x26ee: + mach_log("CRT Pitch = %d, original val = %d.\n", val << 3, val); + dev->ext_crt_pitch = val; + dev->internal_pitch = val; + if (svga->bpp > 8) { + if (svga->bpp == 24) + dev->ext_crt_pitch *= 3; + else + dev->ext_crt_pitch <<= 1; + } + if (dev->local) { + if (!ibm8514_on) { + ibm8514_on ^= 1; + svga->adv_flags |= FLAG_ATI; + } + } + svga_recalctimings(svga); + break; + + case 0x32ee: + if (len == 1) { + mach->local_cntl = (mach->local_cntl & 0xff00) | val; + } else { + mach->local_cntl = val; + mach32_updatemapping(mach); + } + break; + + case 0x32ef: + if (len == 1) { + mach->local_cntl = (mach->local_cntl & 0x00ff) | (val << 8); + mach32_updatemapping(mach); + } + break; + + case 0x36ee: + if (len == 1) { + mach->misc = (mach->misc & 0xff00) | (val); + } else { + mach->misc = val; + } + break; + case 0x36ef: + if (len == 1) { + mach->misc = (mach->misc & 0x00ff) | (val << 8); + } + break; + + case 0x3aee: + if (len == 1) { + mach->ext_cur_col_0_g = val; + } else { + mach->ext_cur_col_0_g = val & 0xff; + mach->ext_cur_col_0_r = (val >> 8) & 0xff; + } + break; + case 0x3aef: + if (len == 1) { + mach->ext_cur_col_0_r = val; + } + break; + + case 0x3eee: + if (len == 1) { + mach->ext_cur_col_1_g = val; + } else { + mach->ext_cur_col_1_g = val & 0xff; + mach->ext_cur_col_1_r = (val >> 8) & 0xff; + } + break; + case 0x3eef: + if (len == 1) { + mach->ext_cur_col_1_r = val; + } + break; + + case 0x42ee: + mach->accel.test2[0] = val; + break; + case 0x42ef: + mach->accel.test2[1] = val; + break; + + case 0x46ee: + mach->accel.test3[0] = val; + break; + case 0x46ef: + mach->accel.test3[1] = val; + break; + + case 0x4aee: + if (len == 1) + mach->accel.clock_sel = (mach->accel.clock_sel & 0xff00) | val; + else { + mach->accel.clock_sel = val; + ibm8514_on = (mach->accel.clock_sel & 1); + vga_on = !ibm8514_on; + dev->ibm_mode = 0; + if (ibm8514_on) + svga->adv_flags |= FLAG_ATI; + else + svga->adv_flags &= ~FLAG_ATI; + mach_log("ATI 8514/A: VGA ON (0x4aee) = %i, val = %04x\n", vga_on, val); + svga_recalctimings(svga); + } + break; + case 0x4aef: + if (len == 1) { + mach->accel.clock_sel = (mach->accel.clock_sel & 0x00ff) | (val << 8); + ibm8514_on = (mach->accel.clock_sel & 1); + vga_on = !ibm8514_on; + dev->ibm_mode = 0; + if (ibm8514_on) + svga->adv_flags |= FLAG_ATI; + else + svga->adv_flags &= ~FLAG_ATI; + mach_log("ATI 8514/A: VGA ON (0x4aef) = %i, val = %04x\n", vga_on, mach->accel.clock_sel); + svga_recalctimings(svga); + } + break; + + case 0x52ee: + if (len == 1) + mach->accel.scratch0 = (mach->accel.scratch0 & 0xff00) | val; + else + mach->accel.scratch0 = val; + break; + case 0x52ef: + if (len == 1) + mach->accel.scratch0 = (mach->accel.scratch0 & 0x00ff) | (val << 8); + break; + + case 0x56ee: + if (len == 1) + mach->accel.scratch1 = (mach->accel.scratch1 & 0xff00) | val; + else + mach->accel.scratch1 = val; + break; + case 0x56ef: + if (len == 1) + mach->accel.scratch1 = (mach->accel.scratch1 & 0x00ff) | (val << 8); + break; + + case 0x5aee: + mach_log("Shadow set = %04x\n", val); + break; + case 0x5aef: + mach_log("Shadow + 1 set = %02x\n", val); + break; + + case 0x5eee: + mach_log("Memory Aperture = %04x, len = %d.\n", val, len); + if (len == 1) { + mach->memory_aperture = (mach->memory_aperture & 0xff00) | val; + } else { + mach->memory_aperture = val; + if (!mach->pci_bus) + mach->linear_base = (mach->memory_aperture & 0xff00) << 12; + + mach32_updatemapping(mach); + } + break; + + case 0x5eef: + if (len == 1) { + mach->memory_aperture = (mach->memory_aperture & 0x00ff) | (val << 8); + if (!mach->pci_bus) + mach->linear_base = (mach->memory_aperture & 0xff00) << 12; + + mach32_updatemapping(mach); + } + break; + + case 0x62ee: + mach_log("62EE write val = %04x, len = %d.\n", val, len); + break; + + case 0x66ee: + mach_log("66EE write val = %04x, len = %d.\n", val, len); + break; + + case 0x6aee: + mach_log("6AEE write val = %04x.\n", val & 0x400); + if (len == 1) + mach->accel.max_waitstates = (mach->accel.max_waitstates & 0xff00) | val; + else { + mach->accel.max_waitstates = val; + } + break; + case 0x6aef: + if (len == 1) + mach->accel.max_waitstates = (mach->accel.max_waitstates & 0x00ff) | (val << 8); + break; + + case 0x6eee: + mach_log("6EEE write val = %04x\n", val); + if (len == 1) + mach->accel.ge_offset_lo = (mach->accel.ge_offset_lo & 0xff00) | val; + else { + mach->accel.ge_offset_lo = val; + dev->accel.ge_offset = mach->accel.ge_offset_lo; + } + break; + case 0x6eef: + if (len == 1) { + mach->accel.ge_offset_lo = (mach->accel.ge_offset_lo & 0x00ff) | (val << 8); + dev->accel.ge_offset = mach->accel.ge_offset_lo; + } + break; + + case 0x72ee: + mach_log("72EE write val = %04x\n", val); + if (len == 1) + mach->accel.ge_offset_hi = (mach->accel.ge_offset_hi & 0xff00) | val; + else { + mach->accel.ge_offset_hi = val; + dev->accel.ge_offset = mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16); + } + break; + case 0x72ef: + if (len == 1) { + mach->accel.ge_offset_hi = (mach->accel.ge_offset_hi & 0x00ff) | (val << 8); + dev->accel.ge_offset = mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16); + } + break; + + case 0x76ee: + mach_log("76EE write val=%d shifted, normal=%d.\n", val << 3, val); + dev->ext_pitch = val << 3; + svga_recalctimings(svga); + break; + + case 0x7aee: + mach_log("7AEE write val = %04x, len = %d.\n", val, len); + if (len == 1) + mach->accel.ext_ge_config = (mach->accel.ext_ge_config & 0xff00) | val; + else { + mach->accel.ext_ge_config = val; + dev->ext_crt_pitch = dev->internal_pitch; + switch (mach->accel.ext_ge_config & 0x30) { + case 0: + case 0x10: + svga->bpp = 8; + break; + case 0x20: + if ((mach->accel.ext_ge_config & 0xc0) == 0x40) + svga->bpp = 16; + else + svga->bpp = 15; + + dev->ext_crt_pitch <<= 1; + break; + case 0x30: + svga->bpp = 24; + dev->ext_crt_pitch *= 3; + break; + } + if (mach->accel.ext_ge_config & 0x800) { + svga_recalctimings(svga); + } + if (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800)) + svga_recalctimings(svga); + } + break; + case 0x7aef: + mach_log("7AEF write val = %02x.\n", val); + if (len == 1) { + mach->accel.ext_ge_config = (mach->accel.ext_ge_config & 0x00ff) | (val << 8); + dev->ext_crt_pitch = dev->internal_pitch; + switch (mach->accel.ext_ge_config & 0x30) { + case 0: + case 0x10: + svga->bpp = 8; + break; + case 0x20: + if ((mach->accel.ext_ge_config & 0xc0) == 0x40) + svga->bpp = 16; + else + svga->bpp = 15; + + dev->ext_crt_pitch <<= 1; + break; + case 0x30: + svga->bpp = 24; + dev->ext_crt_pitch *= 3; + break; + } + if (mach->accel.ext_ge_config & 0x800) { + svga_recalctimings(svga); + } + if (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800)) + svga_recalctimings(svga); + } + break; + + case 0x7eee: + mach->accel.eeprom_control = val; + break; + } + } +} + +static uint32_t +mach_accel_in(uint16_t port, mach_t *mach, int len) +{ + svga_t *svga = &mach->svga; + ibm8514_t *dev = &svga->dev8514; + uint16_t *vram_w = (uint16_t *) svga->vram; + uint16_t temp = 0; + int cmd; + int vpos = dev->displine + svga->y_add; + int vblankend = svga->vblankstart + svga->crtc[0x16]; + int frgd_sel, bkgd_sel, mono_src; + + switch (port) { + case 0x2e8: + if (dev->local) { + vpos = svga->displine + svga->y_add; + if (vblankend > svga->vtotal) { + vblankend -= svga->vtotal; + if (vpos >= svga->vblankstart || vpos <= vblankend) + temp |= 2; + } else { + if (vpos >= svga->vblankstart && vpos <= vblankend) + temp |= 2; + } + } else { + vpos = dev->displine + svga->y_add; + if (vblankend > dev->vtotal) { + vblankend -= dev->vtotal; + if (vpos >= svga->vblankstart || vpos <= vblankend) + temp |= 2; + } else { + if (vpos >= svga->vblankstart && vpos <= vblankend) + temp |= 2; + } + } + break; + + case 0x6e8: + temp = dev->hdisp; + break; + + case 0x22e8: + temp = dev->disp_cntl; + break; + + case 0x26e8: + if (len == 1) + temp = dev->htotal & 0xff; + else + temp = dev->htotal; + break; + case 0x26e9: + if (len == 1) + temp = dev->htotal >> 8; + break; + + case 0x2ee8: + temp = dev->subsys_cntl; + break; + + case 0x42e8: + if (dev->local) { + vpos = svga->displine + svga->y_add; + if (vblankend > svga->vtotal) { + vblankend -= svga->vtotal; + if (vpos >= svga->vblankstart || vpos <= vblankend) + dev->subsys_stat |= 1; + } else { + if (vpos >= svga->vblankstart && vpos <= vblankend) + dev->subsys_stat |= 1; + } + } else { + vpos = dev->displine + svga->y_add; + if (vblankend > dev->vtotal) { + vblankend -= dev->vtotal; + if (vpos >= svga->vblankstart || vpos <= vblankend) + dev->subsys_stat |= 1; + } else { + if (vpos >= svga->vblankstart && vpos <= vblankend) + dev->subsys_stat |= 1; + } + } + + if (len != 1) { + temp = dev->subsys_stat | 0xa0 | 0x8000; + } else { + temp = dev->subsys_stat | 0xa0; + } + break; + + case 0x4ae8: + temp = dev->accel.advfunc_cntl; + break; + + case 0x42e9: + if (len == 1) { + temp = dev->subsys_stat >> 8; + temp |= 0x80; + } + break; + + case 0x82e8: + case 0xc2e8: + if (len != 1) { + temp = dev->accel.cur_y; + } + break; + + case 0x86e8: + case 0xc6e8: + if (len != 1) { + temp = dev->accel.cur_x; + } + break; + + case 0x92e8: + if (len != 1) { + temp = dev->test; + } + break; + + case 0x96e8: + if (len != 1) { + temp = dev->accel.maj_axis_pcnt; + } + break; + + case 0x9ae8: + case 0xdae8: + if (len != 1) { + if (dev->force_busy) + temp |= 0x200; /*Hardware busy*/ + dev->force_busy = 0; + if (dev->data_available) { + temp |= 0x100; /*Read Data available*/ + if (mach->accel.cmd_type >= 0) { + switch (mach->accel.cmd_type) { + case 2: + if (dev->accel.sy >= mach->accel.height) + dev->data_available = 0; + break; + case 5: + if (dev->accel.sx >= mach->accel.width) + dev->data_available = 0; + break; + default: + if (dev->accel.sy < 0) + dev->data_available = 0; + break; + } + } else { + if (dev->accel.sy < 0) + dev->data_available = 0; + } + } + } + mach_log("[%04X:%08X]: 9AE8: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len); + break; + case 0x9ae9: + case 0xdae9: + if (len == 1) { + if (dev->force_busy2) + temp |= 2; /*Hardware busy*/ + dev->force_busy2 = 0; + if (dev->data_available2) { + temp |= 1; /*Read Data available*/ + if (mach->accel.cmd_type >= 0) { + switch (mach->accel.cmd_type) { + case 2: + if (dev->accel.sy >= mach->accel.height) + dev->data_available2 = 0; + break; + case 5: + if (dev->accel.sx >= mach->accel.width) + dev->data_available2 = 0; + break; + default: + if (dev->accel.sy < 0) + dev->data_available2 = 0; + break; + } + } else { + if (dev->accel.sy < 0) + dev->data_available2 = 0; + } + } + } + mach_log("[%04X:%08X]: 9AE9: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len); + break; + + case 0xe2e8: + case 0xe6e8: + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) { + cmd = -1; + if (len == 1) { + READ_PIXTRANS_BYTE_IO(dev->accel.dx, 1, dev->local) + + temp = mach->accel.pix_trans[1]; + } else { + if (mach->accel.cmd_type == 3) { + READ_PIXTRANS_WORD(dev->accel.cx, 0, dev->local) + } else { + READ_PIXTRANS_WORD(dev->accel.dx, 0, dev->local) + } + mach_accel_out_pixtrans(mach, dev, port, temp, len); + } + } + } else { + if (ibm8514_cpu_dest(svga)) { + cmd = (dev->accel.cmd >> 13); + if (len == 1) { + ; // READ_PIXTRANS_BYTE_IO(0) + } else { + READ_PIXTRANS_WORD(dev->accel.cx, 0, dev->local) + if (dev->accel.input && !dev->accel.odd_in && !dev->accel.sx) { + temp &= ~0xff00; + if (dev->local) + temp |= (svga->vram[(dev->accel.newdest_in + dev->accel.cur_x) & svga->vram_mask] << 8); + else + temp |= (dev->vram[(dev->accel.newdest_in + dev->accel.cur_x) & dev->vram_mask] << 8); + } + if (dev->subsys_stat & 1) { + dev->force_busy = 1; + dev->data_available = 1; + } + } + ibm8514_accel_out_pixtrans(svga, port, temp, len); + } + } + break; + case 0xe2e9: + case 0xe6e9: + if (mach->accel.cmd_type >= 0) { + mach_log("%04x pixtrans read, len=%d.\n", port, len); + if (mach_pixel_read(mach)) { + if (len == 1) { + cmd = -1; + READ_PIXTRANS_BYTE_IO(dev->accel.dx, 0, dev->local) + + temp = mach->accel.pix_trans[0]; + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + switch (mach->accel.dp_config & 0x200) { + case 0x000: /*8-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + case 0x200: /*16-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if (mach->accel.dp_config & 0x1000) + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev, len); + else + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev, len); + break; + } + } + } + } + break; + + case 0xbee8: + case 0xfee8: + if (len != 1) { + mach_log("Multifunc_cntl = %d.\n", dev->accel.multifunc_cntl >> 12); + switch ((dev->accel.multifunc_cntl >> 12) & 0x0f) { + case 0: + temp = dev->accel.multifunc[0]; + break; + case 1: + temp = dev->accel.clip_top; + break; + case 2: + temp = dev->accel.clip_left; + break; + case 3: + temp = dev->accel.multifunc[3]; + break; + case 4: + temp = dev->accel.multifunc[4]; + break; + case 5: + temp = dev->accel.multifunc[5]; + break; + case 8: + temp = dev->accel.multifunc[8]; + break; + case 9: + temp = dev->accel.multifunc[9]; + break; + case 0x0a: + temp = dev->accel.multifunc[0x0a]; + break; + } + } + break; + +/*ATI Mach8/32 specific registers*/ + case 0x12ee: + if (len == 1) + temp = mach->config1 & 0xff; + else + temp = mach->config1; + break; + case 0x12ef: + if (len == 1) + temp = mach->config1 >> 8; + break; + + case 0x16ee: + if (len == 1) + temp = mach->config2 & 0xff; + else + temp = mach->config2; + break; + case 0x16ef: + if (len == 1) + temp = mach->config2 >> 8; + break; + + case 0x32ee: + if (len == 1) + temp = mach->local_cntl & 0xff; + else + temp = mach->local_cntl; + break; + case 0x32ef: + if (len == 1) + temp = mach->local_cntl >> 8; + break; + + case 0x36ee: + if (len == 1) + temp = mach->misc & 0xff; + else + temp = mach->misc; + break; + case 0x36ef: + if (len == 1) + temp = mach->misc >> 8; + break; + + case 0x42ee: + temp = mach->accel.test2[0]; + break; + case 0x42ef: + temp = mach->accel.test2[1]; + break; + + case 0x46ee: + temp = mach->accel.test3[0]; + break; + case 0x46ef: + temp = mach->accel.test3[1]; + break; + + case 0x4aee: + if (len == 1) + temp = mach->accel.clock_sel & 0xff; + else + temp = mach->accel.clock_sel; + break; + case 0x4aef: + if (len == 1) + temp = mach->accel.clock_sel >> 8; + break; + + case 0x52ee: + if (len == 1) + temp = mach->accel.scratch0 & 0xff; + else + temp = mach->accel.scratch0; + break; + case 0x52ef: + if (len == 1) + temp = mach->accel.scratch0 >> 8; + break; + + case 0x56ee: + if (len == 1) + temp = mach->accel.scratch1 & 0xff; + else + temp = mach->accel.scratch1; + break; + case 0x56ef: + if (len == 1) + temp = mach->accel.scratch1 >> 8; + break; + + case 0x5eee: + if (mach->pci_bus) + mach->memory_aperture = (mach->memory_aperture & ~0xfff0) | ((mach->linear_base >> 20) << 4); + + if (len == 1) + temp = mach->memory_aperture & 0xff; + else + temp = mach->memory_aperture; + break; + case 0x5eef: + if (len == 1) + temp = mach->memory_aperture >> 8; + break; + + case 0x62ee: + temp = mach->accel.clip_overrun; + if (len != 1) { + if (mach->force_busy) + temp |= 0x2000; + mach->force_busy = 0; + if (ati_eeprom_read(&mach->eeprom)) + temp |= 0x4000; + } + mach_log("[%04X:%08X]: 62EE: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len); + break; + case 0x62ef: + if (len == 1) { + if (mach->force_busy2) + temp |= 0x20; + mach->force_busy2 = 0; + if (ati_eeprom_read(&mach->eeprom)) + temp |= 0x40; + } + mach_log("[%04X:%08X]: 62EF: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len); + break; + + case 0x6aee: + if (len == 1) + temp = mach->accel.max_waitstates & 0xff; + else + temp = mach->accel.max_waitstates; + break; + case 0x6aef: + if (len == 1) + temp = mach->accel.max_waitstates >> 8; + break; + + case 0x72ee: + if (len == 1) + temp = dev->accel.clip_left & 0xff; + else + temp = dev->accel.clip_left; + break; + case 0x72ef: + if (len == 1) + temp = dev->accel.clip_left >> 8; + break; + + case 0x76ee: + if (len == 1) + temp = dev->accel.clip_top & 0xff; + else + temp = dev->accel.clip_top; + break; + case 0x76ef: + if (len == 1) + temp = dev->accel.clip_top >> 8; + break; + + case 0x7aee: + if (len == 1) + temp = dev->accel.multifunc[4] & 0xff; + else + temp = dev->accel.multifunc[4]; + break; + case 0x7aef: + if (len == 1) + temp = dev->accel.multifunc[4] >> 8; + break; + + case 0x7eee: + if (len == 1) + temp = dev->accel.multifunc[3] & 0xff; + else + temp = dev->accel.multifunc[3]; + break; + case 0x7eef: + if (len == 1) + temp = dev->accel.multifunc[3] >> 8; + break; + + case 0x82ee: + temp = mach->accel.patt_data_idx; + break; + + case 0x8eee: + if (len == 1) + temp = mach->accel.ext_ge_config & 0xff; + else + temp = mach->accel.ext_ge_config; + break; + case 0x8eef: + if (len == 1) + temp = mach->accel.ext_ge_config >> 8; + break; + + case 0x92ee: + temp = mach->accel.eeprom_control; + break; + + case 0x96ee: + if (len == 1) { + temp = dev->accel.maj_axis_pcnt & 0xff; + } else { + temp = dev->accel.maj_axis_pcnt; + if ((mach->accel.test == 0x1555) || (mach->accel.test == 0x0aaa)) + temp = mach->accel.test; + } + break; + case 0x96ef: + if (len == 1) + temp = dev->accel.maj_axis_pcnt >> 8; + break; + + case 0xa2ee: + if (len == 1) + temp = mach->accel.linedraw_opt & 0xff; + else { + temp = mach->accel.linedraw_opt; + } + break; + case 0xa2ef: + if (len == 1) + temp = mach->accel.linedraw_opt >> 8; + break; + + case 0xb2ee: + if (len == 1) + temp = dev->hdisp; + else { + temp = dev->hdisp & 0xff; + temp |= (dev->htotal << 8); + mach_log("HDISP read=%d, HTOTAL read=%d.\n", temp & 0xff, temp >> 8); + } + break; + case 0xb2ef: + if (len == 1) { + temp = dev->htotal; + } + break; + + case 0xc2ee: + if (len == 1) + temp = dev->vtotal & 0xff; + else { + temp = dev->vtotal; + mach_log("VTOTAL read=%d.\n", temp); + } + break; + case 0xc2ef: + if (len == 1) + temp = dev->vtotal >> 8; + break; + + case 0xc6ee: + if (len == 1) + temp = dev->vdisp & 0xff; + else { + temp = dev->vdisp; + mach_log("VDISP read=%d.\n", temp); + } + break; + case 0xc6ef: + if (len == 1) + temp = dev->vdisp >> 8; + break; + + case 0xcaee: + if (len == 1) + temp = dev->vsyncstart & 0xff; + else + temp = dev->vsyncstart; + break; + case 0xcaef: + if (len == 1) + temp = dev->vsyncstart >> 8; + break; + + case 0xceee: + if (len == 1) + temp = svga->vc & 0xff; + else + temp = svga->vc & 0x7ff; + break; + case 0xceef: + if (len == 1) + temp = (svga->vc >> 8) & 7; + break; + + case 0xdaee: + if (len != 1) { + temp = mach->accel.src_x; + if (dev->local) { + temp &= 0x7ff; + } + } else + temp = dev->accel.destx_distp & 0xff; + break; + case 0xdaef: + if (len == 1) + temp = dev->accel.destx_distp >> 8; + break; + + case 0xdeee: + if (len != 1) { + temp = mach->accel.src_y; + if (dev->local) + temp &= 0x7ff; + } else + temp = dev->accel.desty_axstp & 0xff; + break; + case 0xdeef: + if (len == 1) + temp = dev->accel.desty_axstp >> 8; + break; + + case 0xfaee: + if (len != 1) { + if (mach->pci_bus) + temp = 0x0017; + else + temp = 0x22f7; + } else { + if (mach->pci_bus) + temp = 0x17; + else + temp = 0xf7; + } + break; + case 0xfaef: + if (len == 1) { + if (mach->pci_bus) + temp = 0x00; + else + temp = 0x22; + } + break; + } + if (port != 0x9ae8 && port != 0x9ae9 && port != 0x62ee && port != 0x9aee) { + mach_log("Port accel in = %04x, temp = %04x, len = %d, mode = %d.\n", port, temp, len, dev->ibm_mode); + } + return temp; +} + +static void +mach_accel_outb(uint16_t port, uint8_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + mach_accel_out(port, val, mach, 1); +} + +static void +mach_accel_outw(uint16_t port, uint16_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + mach_accel_out(port, val, mach, 2); +} + +static uint8_t +mach_accel_inb(uint16_t port, void *p) +{ + mach_t *mach = (mach_t *) p; + return mach_accel_in(port, mach, 1); +} + +static uint16_t +mach_accel_inw(uint16_t port, void *p) +{ + mach_t *mach = (mach_t *) p; + return mach_accel_in(port, mach, 2); +} + +static void +mach32_ap_writeb(uint32_t addr, uint8_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + mach_log("Port WORDB Write=%04x.\n", 0x02ee + (port_dword << 8)); + mach_accel_outb(0x02ee + (addr & 1) + (port_dword << 8), val, mach); + } else { + mach_log("Port WORDB Write=%04x.\n", 0x02e8 + (port_dword << 8)); + mach_accel_outb(0x02e8 + (addr & 1) + (port_dword << 8), val, mach); + } + } else { + mach_log("Linear WORDB Write=%08x.\n", addr); + svga_write_linear(addr, val, &mach->svga); + } +} + +static void +mach32_ap_writew(uint32_t addr, uint16_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + mach_log("Port WORDW Write=%04x.\n", 0x02ee + (port_dword << 8)); + mach_accel_outw(0x02ee + (port_dword << 8), val, mach); + } else { + mach_log("Port WORDW Write=%04x.\n", 0x02e8 + (port_dword << 8)); + mach_accel_outw(0x02e8 + (port_dword << 8), val, mach); + } + } else { + mach_log("Linear WORDW Write=%08x.\n", addr); + svga_writew_linear(addr, val, &mach->svga); + } +} + +static void +mach32_ap_writel(uint32_t addr, uint32_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + mach_log("Port WORDL Write=%04x.\n", 0x02ee + (port_dword << 8)); + mach_accel_outw(0x02ee + (port_dword << 8), val & 0xffff, mach); + mach_accel_outw(0x02ee + (port_dword << 8) + 4, val >> 16, mach); + } else { + mach_log("Port WORDL Write=%04x.\n", 0x02e8 + (port_dword << 8)); + mach_accel_outw(0x02e8 + (port_dword << 8), val & 0xffff, mach); + mach_accel_outw(0x02e8 + (port_dword << 8) + 4, val >> 16, mach); + } + } else { + mach_log("Linear WORDL Write=%08x, val=%08x, mode=%d, rop=%02x.\n", addr, val, mach->svga.writemode, mach->svga.gdcreg[3] & 0x18); + svga_writel_linear(addr, val, &mach->svga); + } +} + +static uint8_t +mach32_ap_readb(uint32_t addr, void *p) +{ + mach_t *mach = (mach_t *) p; + uint8_t temp; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + temp = mach_accel_inb(0x02ee + (addr & 1) + (port_dword << 8), mach); + } else { + temp = mach_accel_inb(0x02e8 + (addr & 1) + (port_dword << 8), mach); + } + } else + temp = svga_read_linear(addr, &mach->svga); + + return temp; +} + +static uint16_t +mach32_ap_readw(uint32_t addr, void *p) +{ + mach_t *mach = (mach_t *) p; + uint16_t temp; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + temp = mach_accel_inw(0x02ee + (port_dword << 8), mach); + } else { + temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach); + } + } else + temp = svga_readw_linear(addr, &mach->svga); + + return temp; +} + +static uint32_t +mach32_ap_readl(uint32_t addr, void *p) +{ + mach_t *mach = (mach_t *) p; + uint32_t temp; + uint8_t port_dword = addr & 0xfc; + + if (((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) { + if (addr & 0x100) { + temp = mach_accel_inw(0x02ee + (port_dword << 8), mach); + temp |= (mach_accel_inw(0x02ee + (port_dword << 8) + 4, mach) << 8); + } else { + temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach); + temp |= (mach_accel_inw(0x02e8 + (port_dword << 8) + 4, mach) << 8); + } + } else + temp = svga_readl_linear(addr, &mach->svga); + + return temp; +} + +static void +mach32_updatemapping(mach_t *mach) +{ + svga_t *svga = &mach->svga; + + if ((mach->pci_bus && (!(mach->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)))) { + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&mach->mmio_linear_mapping); + return; + } + + if (mach->regs[0xbd] & 4) { + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + mach_log("Bit 2 of BD.\n"); + } else { + switch (svga->gdcreg[6] & 0x0c) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + } + + mach_log("Linear base = %08x, aperture = %04x, localcntl = %02x svgagdc = %x.\n", mach->linear_base, mach->memory_aperture, mach->local_cntl, svga->gdcreg[6] & 0x0c); + if (mach->linear_base) { + if (((mach->memory_aperture & 3) == 1) && !mach->pci_bus) { + /*1 MB aperture*/ + mach->ap_size = 1; + mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20); + } else { + /*4 MB aperture*/ + mach->ap_size = 4; + mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20); + } + /*Force IBM/ATI mode on when the MMIO registers are loaded.*/ + if (mach->local_cntl & 0x20) { + if (!ibm8514_on) { + ibm8514_on ^= 1; + svga->adv_flags |= FLAG_ATI; + svga_recalctimings(svga); + } + } + } else { + mach->ap_size = 4; + mem_mapping_disable(&mach->mmio_linear_mapping); + } +} + +static void +mach32_hwcursor_draw(svga_t *svga, int displine) +{ + mach_t *mach = (mach_t *) svga->p; + uint16_t dat; + int comb; + int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; + uint32_t color0, color1; + + if (svga->bpp == 8) { + color0 = svga->pallook[mach->cursor_col_0]; + color1 = svga->pallook[mach->cursor_col_1]; + mach_log("8BPP: Offset = %x, XOFF = %02x, YOFF = %02x.\n", offset, svga->hwcursor_latch.xoff, svga->hwcursor_latch.yoff); + } else if (svga->bpp == 15) { + color0 = video_15to32[((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0) & 0xffff]; + color1 = video_15to32[((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1) & 0xffff]; + mach_log("15BPP: Offset = %x, XOFF = %02x, YOFF = %02x.\n", offset, svga->hwcursor_latch.xoff, svga->hwcursor_latch.yoff); + } else if (svga->bpp == 16) { + color0 = video_16to32[((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0) & 0xffff]; + color1 = video_16to32[((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1) & 0xffff]; + mach_log("16BPP: Offset = %x, XOFF = %02x, YOFF = %02x.\n", offset, svga->hwcursor_latch.xoff, svga->hwcursor_latch.yoff); + } else { + color0 = ((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0); + color1 = ((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1); + mach_log("24BPP: Offset = %x, XOFF = %02x, YOFF = %02x.\n", offset, svga->hwcursor_latch.xoff, svga->hwcursor_latch.yoff); + } + + if (svga->interlace && svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; + + for (int x = 0; x < 64; x += 8) { + dat = svga->vram[svga->hwcursor_latch.addr & svga->vram_mask] | (svga->vram[(svga->hwcursor_latch.addr + 1) & svga->vram_mask] << 8); + for (int xx = 0; xx < 8; xx++) { + comb = (dat >> (xx << 1)) & 0x03; + if (offset >= svga->hwcursor_latch.x) { + switch (comb) { + case 0: + ((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = color0; + break; + case 1: + ((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = color1; + break; + case 3: + ((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] ^= 0xffffff; + break; + } + } + offset++; + } + svga->hwcursor_latch.addr += 2; + } + if (svga->interlace && !svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; +} + +static void +mach_io_remove(mach_t *mach) +{ + io_removehandler(0x01ce, 2, + mach_in, NULL, NULL, + mach_out, NULL, NULL, mach); + io_removehandler(0x03c0, 32, + mach_in, NULL, NULL, + mach_out, NULL, NULL, mach); + + io_removehandler(0x2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x2ea, 0x0004, mach_in, NULL, NULL, mach_out, NULL, NULL, mach); + io_removehandler(0x6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x12e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x16e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x1ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x1ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x22e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x26e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x2ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x42e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x4ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x52e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x56e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x5ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x5ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x82e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x86e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x8ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x8ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x92e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x96e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x9ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x9ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xa2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xa6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xaae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xaee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xb2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xb6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xbae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xbee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xe2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + + io_removehandler(0xc2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xc6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xcae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xcee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xd2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xd6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xdae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xdee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xe6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xeae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xeee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xf2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xf6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xfae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xfee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + + io_removehandler(0x06ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x0aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x0eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x12ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x16ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x1aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x1eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x26ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x2aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x2eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x32ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x36ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x3aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x3eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x42ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x46ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x4aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x52ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x56ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x5aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x5eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x62ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x66ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x6aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x6eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x72ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x76ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x7aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x7eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x82ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x8eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x92ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x96ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0x9aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xa2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xa6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xaaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xaeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xb2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xb6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xbaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xbeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xc2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xc6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xcaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xceee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xd2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xd6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xdaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xdeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xe2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xe6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xeeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xf2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xfaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_removehandler(0xfeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); +} + +static void +mach_io_set(mach_t *mach) +{ + io_sethandler(0x01ce, 2, + mach_in, NULL, NULL, + mach_out, NULL, NULL, mach); + io_sethandler(0x03c0, 32, + mach_in, NULL, NULL, + mach_out, NULL, NULL, mach); + + io_sethandler(0x2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x2ea, 0x0004, mach_in, NULL, NULL, mach_out, NULL, NULL, mach); + io_sethandler(0x6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x12e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x16e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x1ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x1ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x22e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x26e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x2ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x42e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x4ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x52e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x56e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x5ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x5ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x82e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x86e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x8ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x8ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x92e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x96e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x9ae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x9ee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xa2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xa6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xaae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xaee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xb2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xb6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xbae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xbee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xe2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + + io_sethandler(0xc2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xc6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xcae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xcee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xd2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xd6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xdae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xdee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xe6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xeae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xeee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xf2e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xf6e8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xfae8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xfee8, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + + io_sethandler(0x06ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x0aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x0eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x12ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x16ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x1aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x1eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x26ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x2aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x2eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x32ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x36ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x3aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x3eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x42ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x46ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x4aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x52ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x56ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x5aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x5eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x62ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x66ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x6aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x6eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x72ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x76ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x7aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x7eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x82ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x8eee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x92ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x96ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0x9aee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xa2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xa6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xaaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xaeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xb2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xb6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xbaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xbeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xc2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xc6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xcaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xceee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xd2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xd6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xdaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xdeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xe2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xe6ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xeeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xf2ee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xfaee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); + io_sethandler(0xfeee, 0x0002, mach_accel_inb, mach_accel_inw, NULL, mach_accel_outb, mach_accel_outw, NULL, mach); +} + +static uint8_t +mach32_pci_read(int func, int addr, void *p) +{ + mach_t *mach = (mach_t *) p; + uint8_t ret = 0x00; + + switch (addr) { + case 0x00: + ret = 0x02; /*ATI*/ + break; + case 0x01: + ret = 0x10; + break; + + case 0x02: + ret = 0x58; + break; + case 0x03: + ret = 0x41; + break; + + case PCI_REG_COMMAND: + ret = mach->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/ + break; + + case 0x07: + ret = 0x01; /*Medium DEVSEL timing*/ + break; + + case 0x0a: + ret = 0x00; /*Supports VGA interface*/ + break; + case 0x0b: + ret = 0x03; + break; + + case 0x10: + ret = 0x00; /*Linear frame buffer address*/ + break; + case 0x11: + ret = 0x00; + break; + case 0x12: + ret = mach->linear_base >> 16; + break; + case 0x13: + ret = mach->linear_base >> 24; + break; + + case 0x30: + ret = (mach->pci_regs[0x30] & 0x01); /*BIOS ROM address*/ + break; + case 0x31: + ret = 0x00; + break; + case 0x32: + ret = mach->pci_regs[0x32]; + break; + case 0x33: + ret = mach->pci_regs[0x33]; + break; + + case 0x3c: + ret = mach->int_line; + break; + case 0x3d: + ret = PCI_INTA; + break; + } + + return ret; +} + +static void +mach32_pci_write(int func, int addr, uint8_t val, void *p) +{ + mach_t *mach = (mach_t *) p; + + switch (addr) { + case PCI_REG_COMMAND: + mach->pci_regs[PCI_REG_COMMAND] = val & 0x27; + mach_io_remove(mach); + if (val & PCI_COMMAND_IO) { + mach_io_set(mach); + } + mach32_updatemapping(mach); + break; + + case 0x12: + mach->linear_base = (mach->linear_base & 0xff000000) | ((val & 0xc0) << 16); + mach32_updatemapping(mach); + break; + case 0x13: + mach->linear_base = (mach->linear_base & 0xc00000) | (val << 24); + mach32_updatemapping(mach); + break; + + case 0x30: + case 0x32: + case 0x33: + mach->pci_regs[addr] = val; + if (mach->pci_regs[0x30] & 0x01) { + uint32_t bios_addr = (mach->pci_regs[0x32] << 16) | (mach->pci_regs[0x33] << 24); + mach_log("Mach32 bios_rom enabled at %08x\n", bios_addr); + mem_mapping_set_addr(&mach->bios_rom.mapping, bios_addr, 0x8000); + } else { + mach_log("Mach32 bios_rom disabled\n"); + mem_mapping_disable(&mach->bios_rom.mapping); + } + return; + + case 0x3c: + mach->int_line = val; + break; + } +} + +static void * +mach8_init(const device_t *info) +{ + mach_t *mach; + svga_t *svga; + ibm8514_t *dev; + uint32_t memory; + + mach = malloc(sizeof(mach_t)); + memset(mach, 0x00, sizeof(mach_t)); + + svga = &mach->svga; + dev = &svga->dev8514; + + mach->pci_bus = !!(info->flags & DEVICE_PCI); + mach->vlb_bus = !!(info->flags & DEVICE_VLB); + dev->local = info->local; + dev->vram_size = (1024 << 10); + dev->vram = calloc(dev->vram_size, 1); + dev->changedvram = calloc(dev->vram_size >> 12, 1); + dev->vram_mask = dev->vram_size - 1; + dev->map8 = svga->pallook; + memory = device_get_config_int("memory"); + + if (dev->local) { + if (mach->vlb_bus) + rom_init(&mach->bios_rom, + BIOS_MACH32_VLB_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + else if (mach->pci_bus) + rom_init(&mach->bios_rom, + BIOS_MACH32_PCI_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + else + rom_init(&mach->bios_rom, + BIOS_MACH32_ISA_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + } else { + rom_init(&mach->bios_rom, + BIOS_MACH8_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + } + + svga_init(info, svga, mach, dev->local ? (memory << 10) : (512 << 10), /*default: 512kB for Mach8, 2MB for Mach32*/ + mach_recalctimings, + mach_in, mach_out, + dev->local ? mach32_hwcursor_draw : NULL, + NULL); + + if (dev->local) { + switch (memory) { + case 1024: + mach->misc |= 0x04; + break; + case 2048: + mach->misc |= 0x08; + break; + case 4096: + mach->misc |= 0x0c; + break; + } + svga->hwcursor.cur_ysize = 64; + mach->config1 = 0x20; + mach->config2 = 0x08; + /*Fake the RAMDAC to give the VLB/MCA variants full 24-bit support until said RAMDAC is implemented.*/ + if (mach->vlb_bus) { + video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_vlb); + mach->config1 |= 0x0c; + mach->config1 |= 0x0400; + } else if (mach->pci_bus) { + video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_pci); + mach->config1 |= 0x0e; + mach->config1 |= 0x0a00; + mach->config2 |= 0x2000; + svga->ramdac = device_add(&ati68860_ramdac_device); + } else { + video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa); + } + mem_mapping_add(&mach->mmio_linear_mapping, 0, 0, mach32_ap_readb, mach32_ap_readw, mach32_ap_readl, mach32_ap_writeb, mach32_ap_writew, mach32_ap_writel, NULL, MEM_MAPPING_EXTERNAL, mach); + mem_mapping_disable(&mach->mmio_linear_mapping); + } else { + video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa); + mach->config1 = 0x02 | 0x20 | 0x80; + mach->config2 = 0x02; + dev->ext_pitch = 1024; + } + + svga->force_old_addr = 1; + svga->miscout = 1; + svga->bpp = 8; + svga->packed_chain4 = 1; + ibm8514_enabled = 1; + ibm8514_has_vga = 1; + dev->ibm_mode = 1; + dev->rowoffset = 128; + mach_io_set(mach); + + if (dev->local) { + svga->decode_mask = (4 << 20) - 1; + mach->cursor_col_1 = 0xff; + mach->ext_cur_col_1_r = 0xff; + mach->ext_cur_col_1_g = 0xff; + dev->ext_crt_pitch = 128; + if (mach->vlb_bus) + ati_eeprom_load(&mach->eeprom, "mach32_vlb.nvr", 1); + else if (mach->pci_bus) { + ati_eeprom_load(&mach->eeprom, "mach32_pci.nvr", 1); + mem_mapping_disable(&mach->bios_rom.mapping); + mach->card = pci_add_card(PCI_ADD_VIDEO, mach32_pci_read, mach32_pci_write, mach); + mach->pci_regs[PCI_REG_COMMAND] = 0x83; + mach->pci_regs[0x30] = 0x00; + mach->pci_regs[0x32] = 0x0c; + mach->pci_regs[0x33] = 0x00; + } else + ati_eeprom_load(&mach->eeprom, "mach32.nvr", 1); + } else { + ati_eeprom_load_mach8(&mach->eeprom, "mach8.nvr"); + } + + return (mach); +} + +static int +mach8_available(void) +{ + return rom_present(BIOS_MACH8_ROM_PATH); +} + +static int +mach32_isa_available(void) +{ + return rom_present(BIOS_MACH32_ISA_ROM_PATH); +} + +static int +mach32_vlb_available(void) +{ + return rom_present(BIOS_MACH32_VLB_ROM_PATH); +} + +static int +mach32_pci_available(void) +{ + return rom_present(BIOS_MACH32_PCI_ROM_PATH); +} + +static void +mach_close(void *p) +{ + mach_t *mach = (mach_t *) p; + svga_t *svga = &mach->svga; + ibm8514_t *dev = &svga->dev8514; + + if (dev) { + free(dev->vram); + free(dev->changedvram); + } + + svga_close(svga); + free(mach); +} + +static void +mach_speed_changed(void *p) +{ + mach_t *mach = (mach_t *) p; + svga_t *svga = &mach->svga; + + svga_recalctimings(svga); +} + +static void +mach_force_redraw(void *p) +{ + mach_t *mach = (mach_t *) p; + svga_t *svga = &mach->svga; + + svga->fullchange = changeframecount; +} + +// clang-format off +static const device_config_t mach32_config[] = { + { + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 2048, + .selection = { + { + .description = "512 KB", + .value = 512 + }, + { + .description = "1 MB", + .value = 1024 + }, + { + .description = "2 MB", + .value = 2048 + }, + { + .description = "4 MB", + .value = 4096 + }, + { + .description = "" + } + } + }, + { + .type = CONFIG_END + } +}; + +const device_t mach8_isa_device = { + .name = "ATI Mach8 (ISA)", + .internal_name = "mach8_isa", + .flags = DEVICE_ISA, + .local = 0, + .init = mach8_init, + .close = mach_close, + .reset = NULL, + { .available = mach8_available }, + .speed_changed = mach_speed_changed, + .force_redraw = mach_force_redraw, + .config = NULL +}; + +const device_t mach32_isa_device = { + .name = "ATI Mach32 (ISA)", + .internal_name = "mach32_isa", + .flags = DEVICE_ISA, + .local = 1, + .init = mach8_init, + .close = mach_close, + .reset = NULL, + { .available = mach32_isa_available }, + .speed_changed = mach_speed_changed, + .force_redraw = mach_force_redraw, + .config = mach32_config +}; + +const device_t mach32_vlb_device = { + .name = "ATI Mach32 (VLB)", + .internal_name = "mach32_vlb", + .flags = DEVICE_VLB, + .local = 1, + .init = mach8_init, + .close = mach_close, + .reset = NULL, + { .available = mach32_vlb_available }, + .speed_changed = mach_speed_changed, + .force_redraw = mach_force_redraw, + .config = mach32_config +}; + +const device_t mach32_pci_device = { + .name = "ATI Mach32 (PCI)", + .internal_name = "mach32_pci", + .flags = DEVICE_PCI, + .local = 1, + .init = mach8_init, + .close = mach_close, + .reset = NULL, + { .available = mach32_pci_available }, + .speed_changed = mach_speed_changed, + .force_redraw = mach_force_redraw, + .config = mach32_config +}; diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 7239790dc..1fd8babb5 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -77,7 +77,7 @@ cga_out(uint16_t addr, uint8_t val, void *p) cga->cgamode = val; if (old ^ val) { - if ((old ^ val) & 0x05) + if ((old ^ val) & 0x07) update_cga16_color(val); cga_recalctimings(cga); @@ -352,10 +352,7 @@ cga_poll(void *p) x = (cga->crtc[1] << 4) + 16; if (cga->composite) { - if (cga->cgamode & 0x10) - border = 0x00; - else - border = cga->cgacol & 0x0f; + border = ((cga->cgamode & 0x12) == 0x12) ? 0 : (cga->cgacol & 15); Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[cga->displine << 1]); Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1) + 1]); @@ -536,6 +533,7 @@ cga_standalone_init(const device_t *info) cga->rgb_type = device_get_config_int("rgb_type"); cga_palette = (cga->rgb_type << 1); cgapal_rebuild(); + update_cga16_color(cga->cgamode); return cga; } diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index e9ea4d111..4016067ab 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -277,7 +277,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *p) svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80); svga->hwcursor.xoff = et4000->regs[0xE2]; svga->hwcursor.yoff = et4000->regs[0xE6]; - svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || ((et4000->type == ET4000W32) && et4000->regs[0xe2] && et4000->regs[0xe6])) ? 128 : 64; + svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || ((et4000->type == ET4000W32) && (et4000->regs[0xe2] >= 0x1f) && (et4000->regs[0xe6] >= 0x1f))) ? 128 : 64; if (et4000->type == ET4000W32) { if ((svga->bpp == 15) || (svga->bpp == 16)) { diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 453972402..7f840d134 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -498,7 +498,7 @@ static void s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3); temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; #define READ_PIXTRANS_WORD \ - if (s3->bpp == 0 && !s3->color_16bit) { \ + if ((s3->bpp == 0) && !s3->color_16bit) { \ temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ } else { \ @@ -506,7 +506,7 @@ static void s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3); } #define READ_PIXTRANS_LONG \ - if (s3->bpp == 0 && !s3->color_16bit) { \ + if ((s3->bpp == 0) && !s3->color_16bit) { \ temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 2)) & s3->vram_mask] << 16); \ @@ -2671,6 +2671,7 @@ s3_out(uint16_t addr, uint8_t val, void *p) return; if ((s3->chip <= S3_86C924) && (svga->crtcreg >= 0x50)) return; + old = svga->crtc[svga->crtcreg]; svga->crtc[svga->crtcreg] = val; @@ -3075,7 +3076,7 @@ s3_recalctimings(svga_t *svga) svga->rowoffset |= 0x100; } if (!svga->rowoffset) - svga->rowoffset = 256; + svga->rowoffset = 0x100; if ((s3->chip == S3_VISION964) || (s3->chip == S3_86C928)) { if (s3->card_type == S3_ELSAWIN2KPROX_964) @@ -3120,7 +3121,7 @@ s3_recalctimings(svga_t *svga) } } else { if (s3->card_type == S3_NUMBER9_9FX_531) { - if (svga->hdisp == 1600 && s3->width == 1600) + if ((svga->hdisp == 1600) && (s3->width == 1600)) s3->width = 800; } } @@ -3131,10 +3132,10 @@ s3_recalctimings(svga_t *svga) } } - if ((svga->crtc[0x43] & 0x08) && (s3->color_16bit == 0) && (s3->chip <= S3_86C805)) { + if ((svga->crtc[0x43] & 0x08) && !s3->color_16bit && (s3->chip <= S3_86C805)) { s3->color_16bit = 1; - s3->width = 1024; - } else if (!(svga->crtc[0x43] & 0x08) && (s3->color_16bit == 1) && (s3->chip <= S3_86C805)) { + s3->width = 1024; + } else if (!(svga->crtc[0x43] & 0x08) && s3->color_16bit && (s3->chip <= S3_86C805)) { s3->color_16bit = 0; if (s3->chip <= S3_86C924) { if (s3->accel.advfunc_cntl & 4) @@ -4808,9 +4809,9 @@ polygon_setup(s3_t *s3) } #define READ(addr, dat) \ - if (s3->bpp == 0 && !s3->color_16bit) \ + if ((s3->bpp == 0) && !s3->color_16bit) \ dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ - else if (s3->bpp == 1 || s3->color_16bit) \ + else if ((s3->bpp == 1) || s3->color_16bit) \ dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \ else if (s3->bpp == 2) \ dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ @@ -5660,10 +5661,10 @@ polygon_setup(s3_t *s3) } #define WRITE(addr, dat) \ - if (s3->bpp == 0 && !s3->color_16bit) { \ + if ((s3->bpp == 0) && !s3->color_16bit) { \ svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = svga->monitor->mon_changeframecount; \ - } else if (s3->bpp == 1 || s3->color_16bit) { \ + } else if ((s3->bpp == 1) || s3->color_16bit) { \ vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \ svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = svga->monitor->mon_changeframecount; \ } else if (s3->bpp == 2) { \ @@ -6123,7 +6124,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ s3->accel.dat_count = 0; if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) { - if ((s3->bpp == 3) && count == 2) { + if ((s3->bpp == 3) && (count == 2)) { if (s3->accel.dat_count) { cpu_dat = ((cpu_dat & 0xffff) << 16) | s3->accel.dat_buf; count = 4; @@ -6133,20 +6134,20 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ s3->accel.dat_count = 1; } } - if (s3->bpp == 1 || s3->color_16bit) + if ((s3->bpp == 1) || s3->color_16bit) count >>= 1; if (s3->bpp == 3) count >>= 2; } - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) rd_mask &= 0xff; - else if (s3->bpp == 1 || s3->color_16bit) + else if ((s3->bpp == 1) || s3->color_16bit) rd_mask &= 0xffff; - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) compare &= 0xff; - if (s3->bpp == 1 || s3->color_16bit) + if ((s3->bpp == 1) || s3->color_16bit) compare &= 0xffff; switch (s3->accel.cmd & 0x600) { @@ -6212,6 +6213,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ cpu_dat >>= 8; else cpu_dat >>= 16; + if (!s3->accel.ssv_len) break; @@ -6259,18 +6261,16 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ s3->accel.cx = s3->accel.cur_x & 0x7ff; s3->accel.cy = s3->accel.cur_y & 0x7ff; - if (s3->accel.cur_x & 0x800) { + if (s3->accel.cur_x & 0x800) s3->accel.cx |= ~0x7ff; - } - if (s3->accel.cur_y & 0x800) { + + if (s3->accel.cur_y & 0x800) s3->accel.cy |= ~0x7ff; - } s3->accel.sy = s3->accel.maj_axis_pcnt; - if (s3_cpu_src(s3)) { + if (s3_cpu_src(s3)) return; /*Wait for data from CPU*/ - } } frgd_mix = (s3->accel.frgd_mix >> 5) & 3; bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; @@ -6305,11 +6305,10 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ mix_dat <<= 1; mix_dat |= 1; - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; - else { + else cpu_dat >>= 16; - } if (!s3->accel.sy) { break; @@ -6351,13 +6350,13 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ s3->accel.cur_y = s3->accel.cy; } else /*Bresenham*/ { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && (count == 16)) { /*Stupid undocumented 0xB2E8 on 911/924*/ count = s3->accel.maj_axis_pcnt + 1; s3->accel.temp_cnt = 16; } while (count-- && s3->accel.sy >= 0) { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && !s3->accel.temp_cnt) { mix_dat >>= 16; s3->accel.temp_cnt = 16; } @@ -6567,7 +6566,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_ mix_dat |= 1; } - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else { cpu_dat >>= 16; @@ -8021,7 +8020,7 @@ s3_init(const device_t *info) switch (vram) { case 0: /* 512 kB */ svga->vram_mask = (1 << 19) - 1; - svga->vram_max = 2 << 20; + svga->vram_max = 1 << 19; break; case 1: /* 1 MB */ /* VRAM in first MB, mirrored in 2nd MB, 3rd and 4th MBs are open bus. @@ -8029,7 +8028,7 @@ s3_init(const device_t *info) This works with the #9 9FX BIOS, and matches how my real Trio64 behaves, but does not work with the Phoenix EDO BIOS. Possibly an FPM/EDO difference? */ svga->vram_mask = (1 << 20) - 1; - svga->vram_max = 2 << 20; + svga->vram_max = 1 << 20; break; case 2: default: /*2 MB */ diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index feaba7fe8..1eb1fa855 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -3372,7 +3372,7 @@ s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri) state.base_w = s3d_tri->tws; tex_base = s3d_tri->tex_base; - for (uint8_t c = 9; c >= 0; c--) { + for (int c = 9; c >= 0; c--) { state.texture[c] = (uint16_t *) &virge->svga.vram[tex_base]; if (c <= state.max_d) tex_base += ((1 << (c * 2)) * tex_size[(s3d_tri->cmd_set >> 5) & 7]) / 2; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index d8829eb2f..913a052ff 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -41,6 +41,7 @@ #include <86box/video.h> #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +#include <86box/vid_xga_device.h> void svga_doblit(int wx, int wy, svga_t *svga); @@ -131,7 +132,7 @@ svga_out(uint16_t addr, uint8_t val, void *p) if (svga->attraddr < 16) svga->fullchange = svga->monitor->mon_changeframecount; if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) { - for (uint8_t c = 0; c < 16; c++) { + for (int c = 0; c < 16; c++) { if (svga->attrregs[0x10] & 0x80) { svga->egapal[c] = (svga->attrregs[c] & 0xf) | ((svga->attrregs[0x14] & 0xf) << 4); } else { @@ -165,6 +166,12 @@ svga_out(uint16_t addr, uint8_t val, void *p) io_sethandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p); svga_recalctimings(svga); break; + case 0x3c3: + if (xga_enabled) { + svga->xga.on = (val & 0x01) ? 0 : 1; + vga_on = !svga->xga.on; + } + break; case 0x3c4: svga->seqaddr = val; break; @@ -407,7 +414,7 @@ svga_set_ramdac_type(svga_t *svga, int type) if (svga->ramdac_type != type) { svga->ramdac_type = type; - for (uint16_t c = 0; c < 256; c++) { + for (int c = 0; c < 256; c++) { if (svga->ramdac_type == RAMDAC_8BIT) svga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b); else @@ -583,8 +590,14 @@ svga_recalctimings(svga_t *svga) svga->recalctimings_ex(svga); } } else { - if (ibm8514_enabled) - ibm8514_recalctimings(svga); + if (ibm8514_enabled) { + if (svga->dev8514.local) { + if (svga->recalctimings_ex) { + svga->recalctimings_ex(svga); + } + } else + ibm8514_recalctimings(svga); + } if (xga_enabled) xga_recalctimings(svga); } @@ -597,8 +610,13 @@ svga_recalctimings(svga_t *svga) crtcconst = svga->clock * svga->char_width; - disptime = svga->htotal; - _dispontime = svga->hdisp_time; + if (ibm8514_on && !svga->dev8514.local) { + disptime = svga->dev8514.h_total; + _dispontime = svga->dev8514.h_disp; + } else { + disptime = svga->htotal; + _dispontime = svga->hdisp_time; + } if (svga->seqregs[1] & 8) { disptime *= 2; @@ -678,16 +696,20 @@ void svga_poll(void *p) { svga_t *svga = (svga_t *) p; + ibm8514_t *dev = &svga->dev8514; uint32_t x; uint32_t blink_delay; int wx; int wy; int ret; int old_ma; + int linecountff = 0; if (!vga_on && ibm8514_enabled && ibm8514_on) { - ibm8514_poll(&svga->dev8514, svga); - return; + if (!dev->local) { + ibm8514_poll(dev, svga); + return; + } } else if (!vga_on && xga_enabled && svga->xga.on) { xga_poll(&svga->xga, svga); return; @@ -695,22 +717,22 @@ svga_poll(void *p) if (!svga->linepos) { if (svga->displine == svga->hwcursor_latch.y && svga->hwcursor_latch.ena) { - svga->hwcursor_on = svga->hwcursor.cur_ysize - svga->hwcursor_latch.yoff; + svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - svga->hwcursor_latch.yoff; svga->hwcursor_oddeven = 0; } if (svga->displine == (svga->hwcursor_latch.y + 1) && svga->hwcursor_latch.ena && svga->interlace) { - svga->hwcursor_on = svga->hwcursor.cur_ysize - (svga->hwcursor_latch.yoff + 1); + svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - (svga->hwcursor_latch.yoff + 1); svga->hwcursor_oddeven = 1; } if (svga->displine == svga->dac_hwcursor_latch.y && svga->dac_hwcursor_latch.ena) { - svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - svga->dac_hwcursor_latch.yoff; + svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - svga->dac_hwcursor_latch.yoff; svga->dac_hwcursor_oddeven = 0; } if (svga->displine == (svga->dac_hwcursor_latch.y + 1) && svga->dac_hwcursor_latch.ena && svga->interlace) { - svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); + svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); svga->dac_hwcursor_oddeven = 1; } @@ -783,8 +805,14 @@ svga_poll(void *p) if ((svga->sc == (svga->crtc[11] & 31)) || (svga->sc == svga->rowcount)) svga->con = 0; if (svga->dispon) { - if (svga->linedbl && !svga->linecountff) { - svga->linecountff = 1; + /*Real IBM 8514/A or compatibility mode doesn't have linedbl, so skip those.*/ + if (dev->local && ibm8514_on) { + svga->linedbl = 0; + svga->linecountff = 0; + linecountff = 1; + } + if (svga->linedbl && !svga->linecountff && !linecountff) { + svga->linecountff = 1; svga->ma = svga->maback; } else if (svga->sc == svga->rowcount) { svga->linecountff = 0; @@ -793,23 +821,24 @@ svga_poll(void *p) svga->maback += (svga->rowoffset << 3); if (svga->interlace) svga->maback += (svga->rowoffset << 3); + svga->maback &= svga->vram_display_mask; svga->ma = svga->maback; } else { svga->linecountff = 0; svga->sc++; - svga->sc &= 31; + svga->sc &= 0x1f; svga->ma = svga->maback; } } - svga->hsync_divisor = !svga->hsync_divisor; + svga->hsync_divisor ^= 1; if (svga->hsync_divisor && (svga->crtc[0x17] & 4)) return; svga->vc++; - svga->vc &= 2047; + svga->vc &= 0x7ff; if (svga->vc == svga->split) { ret = 1; @@ -835,6 +864,7 @@ svga_poll(void *p) if (svga->vc == svga->dispend) { if (svga->vblank_start) svga->vblank_start(svga); + svga->dispon = 0; blink_delay = (svga->crtc[11] & 0x60) >> 5; if (svga->crtc[10] & 0x20) @@ -846,6 +876,7 @@ svga_poll(void *p) if (!(svga->gdcreg[6] & 1) && !(svga->blink & 15)) svga->fullchange = 2; + svga->blink = (svga->blink + 1) & 0x7f; for (x = 0; x < ((svga->vram_mask + 1) >> 12); x++) { @@ -888,12 +919,18 @@ svga_poll(void *p) svga->monitor->mon_changeframecount = svga->interlace ? 3 : 2; svga->vslines = 0; - if (svga->interlace && svga->oddeven) - svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); - else - svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[5] & 0x60) >> 5); + if ((dev->local && vga_on) || !dev->local) { + if (svga->interlace && svga->oddeven) + svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); + else + svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[5] & 0x60) >> 5); + } else if (dev->local && ibm8514_on) { + if (svga->interlace && svga->oddeven) + svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1); + else + svga->ma = svga->maback = svga->ma_latch; + } svga->ca = ((svga->crtc[0xe] << 8) | svga->crtc[0xf]) + ((svga->crtc[0xb] & 0x60) >> 5) + svga->ca_adj; - svga->ma = (svga->ma << 2); svga->maback = (svga->maback << 2); svga->ca = (svga->ca << 2); @@ -958,9 +995,9 @@ svga_init(const device_t *info, svga_t *svga, void *p, int memsize, svga->monitor_index = monitor_index_global; svga->monitor = &monitors[svga->monitor_index]; - for (uint16_t c = 0; c < 256; c++) { + for (int c = 0; c < 256; c++) { e = c; - for (uint8_t d = 0; d < 8; d++) { + for (int d = 0; d < 8; d++) { svga_rotate[d][c] = e; e = (e >> 1) | ((e & 1) ? 0x80 : 0); } @@ -1100,7 +1137,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) if (!linear) { if (xga_enabled) { - if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { + if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl >= 1)) { if (val == 0xa5) { /*Memory size test of XGA*/ svga->xga.test = val; svga->xga.a5_test = 1; @@ -1108,7 +1145,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) } else if (val == 0x5a) { svga->xga.test = val; return; - } else if (val == 0x12 || val == 0x34) { + } else if ((val == 0x12) || (val == 0x34)) { addr += svga->xga.write_bank; svga->xga.vram[addr & svga->xga.vram_mask] = val; svga->xga.linear_endian_reverse = 1; @@ -1145,10 +1182,18 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) if (addr & 1) writemask2 <<= 1; addr &= ~1; - addr <<= 2; - } else - addr <<= 2; - + if (linear && ibm8514_on && (svga->adv_flags & FLAG_ATI)) { + addr &= svga->vram_mask; + } else + addr <<= 2; + } else { + if (linear && ibm8514_on && (svga->adv_flags & FLAG_ATI)) { + writemask2 = 1 << (addr & 3); + addr &= ~3; + addr &= svga->vram_mask; + } else + addr <<= 2; + } addr &= svga->decode_mask; if (svga->translate_address) @@ -1303,7 +1348,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p) if (!linear) { if (xga_enabled) { - if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { + if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl >= 1)) { if (svga->xga.test == 0xa5) { /*Memory size test of XGA*/ svga->xga.on = 1; vga_on = !svga->xga.on; @@ -1312,7 +1357,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p) svga->xga.on = 1; vga_on = !svga->xga.on; return svga->xga.test; - } else if (addr == 0xa0000 || addr == 0xa0010) { + } else if ((addr == 0xa0000) || (addr == 0xa0010)) { addr += svga->xga.read_bank; return svga->xga.vram[addr & svga->xga.vram_mask]; } @@ -1354,11 +1399,24 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p) } else if (svga->chain2_read) { readplane = (readplane & 2) | (addr & 1); addr &= ~1; - addr <<= 2; - } else - addr <<= 2; - + if (linear && ibm8514_on && (svga->adv_flags & FLAG_ATI)) + addr &= svga->vram_mask; + else + addr <<= 2; + } else { + if (linear && ibm8514_on && (svga->adv_flags & FLAG_ATI)) { + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xff; + latch_addr = (addr & svga->vram_mask) & ~3; + for (uint8_t i = 0; i < count; i++) + svga->latch.b[i] = svga->vram[latch_addr | i]; + return svga->vram[addr & svga->vram_mask]; + } else + addr <<= 2; + } addr &= svga->decode_mask; + if (svga->translate_address) { latch_addr = svga->translate_address(latch_addr, p); addr = svga->translate_address(addr, p); diff --git a/src/video/vid_table.c b/src/video/vid_table.c index d4915a056..6aee2e76f 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -36,6 +36,7 @@ #include <86box/vid_ega.h> #include <86box/vid_colorplus.h> #include <86box/vid_mda.h> +#include <86box/vid_xga_device.h> typedef struct { const device_t *device; @@ -79,6 +80,8 @@ video_cards[] = { { &vid_none_device }, { &vid_internal_device }, { &atiega_device }, + { &mach8_isa_device, VIDEO_FLAG_TYPE_8514 }, + { &mach32_isa_device, VIDEO_FLAG_TYPE_8514 }, { &mach64gx_isa_device }, { &ati28800k_device }, { &ati18800_vga88_device }, @@ -112,6 +115,7 @@ video_cards[] = { { &hercules_device, VIDEO_FLAG_TYPE_MDA }, { &herculesplus_device, VIDEO_FLAG_TYPE_MDA }, { &incolor_device }, + { &inmos_isa_device, VIDEO_FLAG_TYPE_XGA }, { &im1024_device }, { &iskra_ega_device }, { &et4000_kasan_isa_device }, @@ -154,6 +158,7 @@ video_cards[] = { { &gd5428_mca_device }, { &et4000_mca_device }, { &radius_svga_multiview_mca_device }, + { &mach32_pci_device, VIDEO_FLAG_TYPE_8514 }, { &mach64gx_pci_device }, { &mach64vt2_device }, { &et4000w32p_videomagic_revb_pci_device }, @@ -212,6 +217,7 @@ video_cards[] = { { &voodoo_3_1000_device }, { &voodoo_3_2000_device }, { &voodoo_3_3000_device }, + { &mach32_vlb_device, VIDEO_FLAG_TYPE_8514 }, { &mach64gx_vlb_device }, { &et4000w32i_vlb_device }, { &et4000w32p_videomagic_revb_vlb_device }, @@ -432,3 +438,15 @@ video_is_ega_vga(void) { return (video_get_type() == VIDEO_FLAG_TYPE_SPECIAL); } + +int +video_is_8514(void) +{ + return (video_get_type() == VIDEO_FLAG_TYPE_8514); +} + +int +video_is_xga(void) +{ + return (video_get_type() == VIDEO_FLAG_TYPE_XGA); +} diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index d2e57de81..4fcd6af61 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -323,9 +323,9 @@ banshee_vblank_start(svga_t *svga) } static void -banshee_out(uint16_t addr, uint8_t val, void *p) +banshee_out(uint16_t addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_t *svga = &banshee->svga; uint8_t old; @@ -375,13 +375,16 @@ banshee_out(uint16_t addr, uint8_t val, void *p) } static uint8_t -banshee_in(uint16_t addr, void *p) +banshee_in(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_t *svga = &banshee->svga; uint8_t temp; - // if (addr != 0x3da) banshee_log("banshee_in : %04X ", addr); +#if 0 + if (addr != 0x3da) + banshee_log("banshee_in : %04X ", addr); +#endif if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; @@ -405,7 +408,10 @@ banshee_in(uint16_t addr, void *p) temp = svga_in(addr, svga); break; } - // if (addr != 0x3da) banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); +#if 0 + if (addr != 0x3da) + banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); +#endif return temp; } @@ -524,7 +530,9 @@ banshee_recalctimings(svga_t *svga) svga->vblankstart += 0x400; if (svga->crtc[0x1b] & 0x40) svga->vsyncstart += 0x400; - // banshee_log("svga->hdisp=%i\n", svga->hdisp); +#if 0 + banshee_log("svga->hdisp=%i\n", svga->hdisp); +#endif svga->interlace = 0; @@ -559,7 +567,9 @@ banshee_recalctimings(svga_t *svga) svga->rowoffset = (banshee->vidDesktopOverlayStride & 0x3fff) >> 3; svga->ma_latch = banshee->vidDesktopStartAddr >> 2; banshee->desktop_stride_tiled = (banshee->vidDesktopOverlayStride & 0x3fff) * 128 * 32; - // banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); +#if 0 + banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); +#endif svga->char_width = 8; svga->split = 99999; @@ -583,11 +593,13 @@ banshee_recalctimings(svga_t *svga) if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) svga->overlay.ena = 0; if (svga->overlay.ena) { - /* banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", - voodoo->overlay.start_x, voodoo->overlay.start_y, - voodoo->overlay.end_x, voodoo->overlay.end_y, - voodoo->overlay.size_x, voodoo->overlay.size_y, - svga->overlay.pitch);*/ +#if 0 + banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", + voodoo->overlay.start_x, voodoo->overlay.start_y, + voodoo->overlay.end_x, voodoo->overlay.end_y, + voodoo->overlay.size_x, voodoo->overlay.size_y, + svga->overlay.pitch); +#endif if (!voodoo->overlay.start_x && !voodoo->overlay.start_y && svga->hdisp == voodoo->overlay.size_x && svga->dispend == voodoo->overlay.size_y) { /*Overlay is full screen, so don't bother rendering the desktop behind it*/ @@ -596,7 +608,9 @@ banshee_recalctimings(svga_t *svga) } } } else { - // banshee_log("Normal shift out\n"); +#if 0 + banshee_log("Normal shift out\n"); +#endif svga->bpp = 8; } @@ -609,19 +623,27 @@ banshee_recalctimings(svga_t *svga) double freq = (((double) n + 2) / (((double) m + 2) * (double) (1 << k))) * 14318184.0; svga->clock = (cpuclock * (float) (1ULL << 32)) / freq; - // svga->clock = cpuclock / freq; +#if 0 + svga->clock = cpuclock / freq; +#endif - // banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); +#if 0 + banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); +#endif } } static void -banshee_ext_out(uint16_t addr, uint8_t val, void *p) +banshee_ext_out(uint16_t addr, uint8_t val, void *priv) { - // banshee_t *banshee = (banshee_t *)p; - // svga_t *svga = &banshee->svga; +#if 0 + banshee_t *banshee = (banshee_t *)priv; + svga_t *svga = &banshee->svga; +#endif - // banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); +#if 0 + banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); +#endif switch (addr & 0xff) { case 0xb0: @@ -672,7 +694,7 @@ banshee_ext_out(uint16_t addr, uint8_t val, void *p) case 0xdd: case 0xde: case 0xdf: - banshee_out((addr & 0xff) + 0x300, val, p); + banshee_out((addr & 0xff) + 0x300, val, priv); break; default: @@ -680,13 +702,15 @@ banshee_ext_out(uint16_t addr, uint8_t val, void *p) } } static void -banshee_ext_outl(uint16_t addr, uint32_t val, void *p) +banshee_ext_outl(uint16_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; - // banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); +#if 0 + banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); +#endif switch (addr & 0xff) { case Init_pciInit0: @@ -698,7 +722,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Init_lfbMemoryConfig: banshee->lfbMemoryConfig = val; - // banshee_log("lfbMemoryConfig=%08x\n", val); +#if 0 + banshee_log("lfbMemoryConfig=%08x\n", val); +#endif voodoo->tile_base = (val & 0x1fff) << 12; voodoo->tile_stride = 1024 << ((val >> 13) & 7); voodoo->tile_stride_shift = 10 + ((val >> 13) & 7); @@ -764,7 +790,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidProcCfg: banshee->vidProcCfg = val; - // banshee_log("vidProcCfg=%08x\n", val); +#if 0 + banshee_log("vidProcCfg=%08x\n", val); +#endif banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; svga->fullchange = changeframecount; @@ -797,7 +825,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) svga->hwcursor.addr = (banshee->hwCurPatAddr & 0xfffff0) + (svga->hwcursor.yoff * 16); svga->hwcursor.cur_xsize = 64; svga->hwcursor.cur_ysize = 64; - // banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); +#if 0 + banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); +#endif break; case Video_hwCurC0: banshee->hwCurC0 = val; @@ -808,7 +838,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidSerialParallelPort: banshee->vidSerialParallelPort = val; - // banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); +#if 0 + banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); +#endif i2c_gpio_set(banshee->i2c_ddc, !!(val & VIDSERIAL_DDC_DCK_W), !!(val & VIDSERIAL_DDC_DDA_W)); i2c_gpio_set(banshee->i2c, !!(val & VIDSERIAL_I2C_SCK_W), !!(val & VIDSERIAL_I2C_SDA_W)); break; @@ -836,16 +868,22 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) break; case Video_vidOverlayDudx: voodoo->overlay.vidOverlayDudx = val & VID_DUDX_MASK; - // banshee_log("vidOverlayDudx=%08x\n", val); +#if 0 + banshee_log("vidOverlayDudx=%08x\n", val); +#endif break; case Video_vidOverlayDudxOffsetSrcWidth: voodoo->overlay.vidOverlayDudxOffsetSrcWidth = val; voodoo->overlay.overlay_bytes = (val & OVERLAY_SRC_WIDTH_MASK) >> OVERLAY_SRC_WIDTH_SHIFT; - // banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); +#if 0 + banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); +#endif break; case Video_vidOverlayDvdy: voodoo->overlay.vidOverlayDvdy = val & VID_DVDY_MASK; - // banshee_log("vidOverlayDvdy=%08x\n", val); +#if 0 + banshee_log("vidOverlayDvdy=%08x\n", val); +#endif break; case Video_vidOverlayDvdyOffset: voodoo->overlay.vidOverlayDvdyOffset = val; @@ -853,26 +891,34 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidDesktopStartAddr: banshee->vidDesktopStartAddr = val & 0xffffff; - // banshee_log("vidDesktopStartAddr=%08x\n", val); +#if 0 + banshee_log("vidDesktopStartAddr=%08x\n", val); +#endif svga->fullchange = changeframecount; svga_recalctimings(svga); break; case Video_vidDesktopOverlayStride: banshee->vidDesktopOverlayStride = val; - // banshee_log("vidDesktopOverlayStride=%08x\n", val); +#if 0 + banshee_log("vidDesktopOverlayStride=%08x\n", val); +#endif svga->fullchange = changeframecount; svga_recalctimings(svga); break; - // default: - // fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); +#if 0 + default: + fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); +#endif } } static uint8_t -banshee_ext_in(uint16_t addr, void *p) +banshee_ext_in(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; - // svga_t *svga = &banshee->svga; + banshee_t *banshee = (banshee_t *) priv; +#if 0 + svga_t *svga = &banshee->svga; +#endif uint8_t ret = 0xff; switch (addr & 0xff) { @@ -881,7 +927,9 @@ banshee_ext_in(uint16_t addr, void *p) case Init_status + 2: case Init_status + 3: ret = (banshee_status(banshee) >> ((addr & 3) * 8)) & 0xff; - // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#if 0 + banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#endif break; case 0xb0: @@ -932,7 +980,7 @@ banshee_ext_in(uint16_t addr, void *p) case 0xdd: case 0xde: case 0xdf: - ret = banshee_in((addr & 0xff) + 0x300, p); + ret = banshee_in((addr & 0xff) + 0x300, priv); break; default: @@ -979,15 +1027,17 @@ banshee_status(banshee_t *banshee) if (!voodoo->voodoo_busy) voodoo_wake_fifo_thread(voodoo); - // banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); +#if 0 + banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); +#endif return ret; } static uint32_t -banshee_ext_inl(uint16_t addr, void *p) +banshee_ext_inl(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; uint32_t ret = 0xffffffff; @@ -997,7 +1047,9 @@ banshee_ext_inl(uint16_t addr, void *p) switch (addr & 0xff) { case Init_status: ret = banshee_status(banshee); - // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#if 0 + banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#endif break; case Init_pciInit0: ret = banshee->pciInit0; @@ -1090,7 +1142,9 @@ banshee_ext_inl(uint16_t addr, void *p) if (i2c_gpio_get_sda(banshee->i2c)) ret |= VIDSERIAL_I2C_SDA_R; } - // banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); +#if 0 + banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); +#endif break; case Video_vidScreenSize: @@ -1135,20 +1189,24 @@ banshee_ext_inl(uint16_t addr, void *p) return ret; } -static uint32_t banshee_reg_readl(uint32_t addr, void *p); +static uint32_t banshee_reg_readl(uint32_t addr, void *priv); static uint8_t -banshee_reg_read(uint32_t addr, void *p) +banshee_reg_read(uint32_t addr, void *priv) { - // banshee_log("banshee_reg_read: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 3)); +#if 0 + banshee_log("banshee_reg_read: addr=%08x\n", addr); +#endif + return banshee_reg_readl(addr & ~3, priv) >> (8 * (addr & 3)); } static uint16_t -banshee_reg_readw(uint32_t addr, void *p) +banshee_reg_readw(uint32_t addr, void *priv) { - // banshee_log("banshee_reg_readw: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 2)); +#if 0 + banshee_log("banshee_reg_readw: addr=%08x\n", addr); +#endif + return banshee_reg_readl(addr & ~3, priv) >> (8 * (addr & 2)); } static uint32_t @@ -1212,9 +1270,9 @@ banshee_cmd_read(banshee_t *banshee, uint32_t addr) } static uint32_t -banshee_reg_readl(uint32_t addr, void *p) +banshee_reg_readl(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; uint32_t ret = 0xffffffff; @@ -1372,7 +1430,7 @@ banshee_reg_readl(uint32_t addr, void *p) } static void -banshee_reg_write(uint32_t addr, uint8_t val, void *p) +banshee_reg_write(UNUSED(uint32_t addr), UNUSED(uint8_t val), UNUSED(void *priv)) { #if 0 banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val); @@ -1380,9 +1438,9 @@ banshee_reg_write(uint32_t addr, uint8_t val, void *p) } static void -banshee_reg_writew(uint32_t addr, uint16_t val, void *p) +banshee_reg_writew(uint32_t addr, uint16_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; cycles -= voodoo->write_time; @@ -1498,9 +1556,9 @@ banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val) } static void -banshee_reg_writel(uint32_t addr, uint32_t val, void *p) +banshee_reg_writel(uint32_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; if (addr == voodoo->last_write_addr + 4) @@ -1625,9 +1683,9 @@ banshee_reg_writel(uint32_t addr, uint32_t val, void *p) } static uint8_t -banshee_read_linear(uint32_t addr, void *p) +banshee_read_linear(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; @@ -1663,14 +1721,14 @@ banshee_read_linear(uint32_t addr, void *p) } static uint16_t -banshee_read_linear_w(uint32_t addr, void *p) +banshee_read_linear_w(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 1) - return banshee_read_linear(addr, p) | (banshee_read_linear(addr + 1, p) << 8); + return banshee_read_linear(addr, priv) | (banshee_read_linear(addr + 1, priv) << 8); cycles -= voodoo->read_time; if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz)) { @@ -1703,14 +1761,14 @@ banshee_read_linear_w(uint32_t addr, void *p) } static uint32_t -banshee_read_linear_l(uint32_t addr, void *p) +banshee_read_linear_l(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 3) - return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr + 2, p) << 16); + return banshee_read_linear_w(addr, priv) | (banshee_read_linear_w(addr + 2, priv) << 16); cycles -= voodoo->read_time; @@ -1744,9 +1802,9 @@ banshee_read_linear_l(uint32_t addr, void *p) } static void -banshee_write_linear(uint32_t addr, uint8_t val, void *p) +banshee_write_linear(uint32_t addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; @@ -1779,15 +1837,15 @@ banshee_write_linear(uint32_t addr, uint8_t val, void *p) } static void -banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) +banshee_write_linear_w(uint32_t addr, uint16_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 1) { - banshee_write_linear(addr, val, p); - banshee_write_linear(addr + 1, val >> 8, p); + banshee_write_linear(addr, val, priv); + banshee_write_linear(addr + 1, val >> 8, priv); return; } @@ -1819,16 +1877,16 @@ banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) } static void -banshee_write_linear_l(uint32_t addr, uint32_t val, void *p) +banshee_write_linear_l(uint32_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; int timing; if (addr & 3) { - banshee_write_linear_w(addr, val, p); - banshee_write_linear_w(addr + 2, val >> 16, p); + banshee_write_linear_w(addr, val, priv); + banshee_write_linear_w(addr + 2, val >> 16, priv); return; } @@ -2510,9 +2568,9 @@ banshee_overlay_draw(svga_t *svga, int displine) } void -banshee_set_overlay_addr(void *p, uint32_t addr) +banshee_set_overlay_addr(void *priv, UNUSED(uint32_t addr)) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; banshee->svga.overlay.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; @@ -2548,10 +2606,12 @@ banshee_vsync_callback(svga_t *svga) } static uint8_t -banshee_pci_read(int func, int addr, void *p) +banshee_pci_read(int func, int addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; - // svga_t *svga = &banshee->svga; + banshee_t *banshee = (banshee_t *) priv; +#if 0 + svga_t *svga = &banshee->svga; +#endif uint8_t ret = 0; if (func) @@ -2751,9 +2811,9 @@ banshee_pci_read(int func, int addr, void *p) } static void -banshee_pci_write(int func, int addr, uint8_t val, void *p) +banshee_pci_write(int func, int addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; #if 0 svga_t *svga = &banshee->svga; #endif @@ -3357,9 +3417,9 @@ velocity_200_available(void) } static void -banshee_close(void *p) +banshee_close(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_card_close(banshee->voodoo); svga_close(&banshee->svga); @@ -3371,17 +3431,17 @@ banshee_close(void *p) } static void -banshee_speed_changed(void *p) +banshee_speed_changed(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_recalctimings(&banshee->svga); } static void -banshee_force_redraw(void *p) +banshee_force_redraw(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; banshee->svga.fullchange = changeframecount; } diff --git a/src/video/vid_voodoo_banshee_blitter.c b/src/video/vid_voodoo_banshee_blitter.c index 175288856..f5009e0b8 100644 --- a/src/video/vid_voodoo_banshee_blitter.c +++ b/src/video/vid_voodoo_banshee_blitter.c @@ -207,7 +207,7 @@ get_addr(voodoo_t *voodoo, int x, int y, int src_notdst, uint32_t src_stride) } static void -PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, uint8_t rop, uint32_t src, int src_colorkey) +PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, UNUSED(uint8_t rop), uint32_t src, int src_colorkey) { switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { case DST_FORMAT_COL_8_BPP: @@ -254,7 +254,7 @@ PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, } static void -PLOT_LINE(voodoo_t *voodoo, int x, int y, uint8_t rop, uint32_t pattern, int src_colorkey) +PLOT_LINE(voodoo_t *voodoo, int x, int y, UNUSED(uint8_t rop), uint32_t pattern, int src_colorkey) { switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { case DST_FORMAT_COL_8_BPP: @@ -984,7 +984,7 @@ banshee_do_screen_to_screen_stretch_blt(voodoo_t *voodoo) } static void -banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, int count, uint32_t data) +banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, UNUSED(int count), uint32_t data) { #if 0 if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) diff --git a/src/video/vid_voodoo_blitter.c b/src/video/vid_voodoo_blitter.c index a1105795c..ff45fc837 100644 --- a/src/video/vid_voodoo_blitter.c +++ b/src/video/vid_voodoo_blitter.c @@ -166,8 +166,10 @@ voodoo_v2_blit_start(voodoo_t *voodoo) int x; int y; - /* voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", - voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg);*/ +#if 0 + voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", + voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg); +#endif voodoo_wait_for_render_thread_idle(voodoo); diff --git a/src/video/vid_voodoo_display.c b/src/video/vid_voodoo_display.c index 77d54398f..84f376a8f 100644 --- a/src/video/vid_voodoo_display.c +++ b/src/video/vid_voodoo_display.c @@ -141,10 +141,11 @@ voodoo_calc_clutData(voodoo_t *voodoo) int r = (c >> 8) & 0xf8; int g = (c >> 3) & 0xfc; int b = (c << 3) & 0xf8; - // r |= (r >> 5); - // g |= (g >> 6); - // b |= (b >> 5); - +#if 0 + r |= (r >> 5); + g |= (g >> 6); + b |= (b >> 5); +#endif voodoo->video_16to32[c] = (voodoo->clutData256[r].r << 16) | (voodoo->clutData256[g].g << 8) | voodoo->clutData256[b].b; } } @@ -442,7 +443,7 @@ voodoo_filterline_v1(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, } static void -voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) +voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, UNUSED(int line)) { int x; @@ -506,9 +507,9 @@ voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, } void -voodoo_callback(void *p) +voodoo_callback(void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; monitor_t *monitor = &monitors[voodoo->monitor_index]; if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) { @@ -576,7 +577,9 @@ voodoo_callback(void *p) } skip_draw: if (voodoo->line == voodoo->v_disp) { - // voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); +#if 0 + voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); +#endif voodoo->retrace_count++; if (SLI_ENABLED && (voodoo->fbiInit2 & FBIINIT2_SWAP_ALGORITHM_MASK) == FBIINIT2_SWAP_ALGORITHM_SLI_SYNC) { if (voodoo == voodoo->set->voodoos[0]) { diff --git a/src/video/vid_voodoo_fb.c b/src/video/vid_voodoo_fb.c index 06941eb05..5e06836b1 100644 --- a/src/video/vid_voodoo_fb.c +++ b/src/video/vid_voodoo_fb.c @@ -59,9 +59,9 @@ voodoo_fb_log(const char *fmt, ...) #endif uint16_t -voodoo_fb_readw(uint32_t addr, void *p) +voodoo_fb_readw(uint32_t addr, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; int x; int y; uint32_t read_addr; @@ -100,9 +100,9 @@ voodoo_fb_readw(uint32_t addr, void *p) return temp; } uint32_t -voodoo_fb_readl(uint32_t addr, void *p) +voodoo_fb_readl(uint32_t addr, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; int x; int y; uint32_t read_addr; @@ -168,9 +168,9 @@ do_dither(voodoo_params_t *params, rgba8_t col, int x, int y) } void -voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) +voodoo_fb_writew(uint32_t addr, uint16_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; voodoo_params_t *params = &voodoo->params; int x; int y; @@ -186,10 +186,14 @@ voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) depth_data = voodoo->params.zaColor & 0xffff; alpha_data = voodoo->params.zaColor >> 24; - // while (!RB_EMPTY) - // thread_reset_event(voodoo->not_full_event); +#if 0 + while (!RB_EMPTY) + thread_reset_event(voodoo->not_full_event); +#endif - // voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); +#if 0 + voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); +#endif switch (voodoo->lfbMode & LFB_FORMAT_MASK) { case LFB_FORMAT_RGB565: @@ -304,9 +308,9 @@ skip_pixel: } void -voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) +voodoo_fb_writel(uint32_t addr, uint32_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; voodoo_params_t *params = &voodoo->params; int x; int y; @@ -320,10 +324,14 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) depth_data[0] = depth_data[1] = voodoo->params.zaColor & 0xffff; alpha_data[0] = alpha_data[1] = voodoo->params.zaColor >> 24; - // while (!RB_EMPTY) - // thread_reset_event(voodoo->not_full_event); +#if 0 + while (!RB_EMPTY) + thread_reset_event(voodoo->not_full_event); +#endif - // voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); +#if 0 + voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); +#endif switch (voodoo->lfbMode & LFB_FORMAT_MASK) { case LFB_FORMAT_RGB565: @@ -393,12 +401,12 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) else write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); - // voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); +#if 0 + voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); +#endif if (voodoo->lfbMode & 0x100) { - int c; - - for (c = 0; c < count; c++) { + for (int c = 0; c < count; c++) { rgba8_t write_data = colour_data[c]; uint16_t new_depth = depth_data[c]; diff --git a/src/video/vid_voodoo_fifo.c b/src/video/vid_voodoo_fifo.c index ab82d104e..8a84dabe4 100644 --- a/src/video/vid_voodoo_fifo.c +++ b/src/video/vid_voodoo_fifo.c @@ -81,9 +81,9 @@ voodoo_wake_fifo_thread_now(voodoo_t *voodoo) } void -voodoo_wake_timer(void *p) +voodoo_wake_timer(void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } @@ -295,21 +295,27 @@ voodoo_fifo_thread(void *param) int num_verticies; int v_num; - // voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); +#if 0 + voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); +#endif voodoo->cmd_status &= ~7; voodoo->cmd_status |= (header & 7); voodoo->cmd_status |= (1 << 11); switch (header & 7) { case 0: - // voodoo_fifo_log("CMDFIFO0\n"); +#if 0 + voodoo_fifo_log("CMDFIFO0\n"); +#endif voodoo->cmd_status = (voodoo->cmd_status & 0xffff8fff) | (((header >> 3) & 7) << 12); switch ((header >> 3) & 7) { case 0: /*NOP*/ break; case 1: /*JSR*/ - // voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); +#if 0 + voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); +#endif voodoo->cmdfifo_ret_addr = voodoo->cmdfifo_rp; voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; voodoo->cmdfifo_in_sub = 1; @@ -322,7 +328,9 @@ voodoo_fifo_thread(void *param) case 3: /*JMP local frame buffer*/ voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; - // voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); +#if 0 + voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); +#endif break; default: @@ -334,13 +342,20 @@ voodoo_fifo_thread(void *param) case 1: num = header >> 16; addr = (header & 0x7ff8) >> 1; - // voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); +#if 0 + voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); +#endif while (num--) { uint32_t val = cmdfifo_get(voodoo); if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { - // if (voodoo->type != VOODOO_BANSHEE) - // fatal("CMDFIFO1: Not Banshee\n"); - // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#if 0 + if (voodoo->type != VOODOO_BANSHEE) + fatal("CMDFIFO1: Not Banshee\n"); +#endif + +#if 0 + voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#endif voodoo_2d_reg_writel(voodoo, addr, val); } else { if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) @@ -382,8 +397,10 @@ voodoo_fifo_thread(void *param) v_num = 0; if (((header >> 3) & 7) == 2) v_num = 1; - // voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); - // voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); +#if 0 + voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); + voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); +#endif while (num_verticies--) { voodoo->verts[3].sVx = cmdfifo_get_f(voodoo); @@ -435,7 +452,9 @@ voodoo_fifo_thread(void *param) num = (header >> 29) & 7; mask = (header >> 15) & 0x3fff; addr = (header & 0x7ff8) >> 1; - // voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); +#if 0 + voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); +#endif while (mask) { if (mask & 1) { uint32_t val = cmdfifo_get(voodoo); @@ -443,7 +462,10 @@ voodoo_fifo_thread(void *param) if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { if (voodoo->type < VOODOO_BANSHEE) fatal("CMDFIFO1: Not Banshee\n"); - // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#if 0 + voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#endif + voodoo_2d_reg_writel(voodoo, addr, val); } else { if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) @@ -463,22 +485,30 @@ voodoo_fifo_thread(void *param) break; case 5: - // if (header & 0x3fc00000) - // fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); +#if 0 + if (header & 0x3fc00000) + fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); +#endif num = (header >> 3) & 0x7ffff; addr = cmdfifo_get(voodoo) & 0xffffff; if (!num) num = 1; - // voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); +#if 0 + voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); +#endif switch (header >> 30) { case 0: /*Linear framebuffer (Banshee)*/ case 1: /*Planar YUV*/ if (voodoo->texture_present[0][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, 0); } if (voodoo->texture_present[1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, 1); } while (num--) { diff --git a/src/video/vid_voodoo_reg.c b/src/video/vid_voodoo_reg.c index 51b9568b8..4a66161f5 100644 --- a/src/video/vid_voodoo_reg.c +++ b/src/video/vid_voodoo_reg.c @@ -70,9 +70,9 @@ voodoo_reg_log(const char *fmt, ...) #endif void -voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) +voodoo_reg_writel(uint32_t addr, uint32_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; void (*voodoo_recalc_tex)(voodoo_t * voodoo, int tmu) = NULL; union { uint32_t i; @@ -89,7 +89,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo_recalc_tex = voodoo_recalc_tex12; tempif.i = val; - // voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); +#if 0 + voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); +#endif addr &= 0x3fc; if ((voodoo->fbiInit3 & FBIINIT3_REMAP) && addr < 0x100 && ad21) @@ -97,7 +99,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) switch (addr) { case SST_swapbufferCMD: if (voodoo->type >= VOODOO_BANSHEE) { - // voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); +#if 0 + voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); +#endif voodoo_wait_for_render_thread_idle(voodoo); if (!(val & 1)) { @@ -136,8 +140,10 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.swapbufferCMD = val; - // voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); - // voodoo->front_offset = params->front_offset; +#if 0 + voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); + voodoo->front_offset = params->front_offset; +#endif voodoo_wait_for_render_thread_idle(voodoo); if (!(val & 1)) { memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); @@ -670,7 +676,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) if (voodoo->type >= VOODOO_BANSHEE) { voodoo->params.draw_offset = val & 0xfffff0; voodoo->fb_write_offset = voodoo->params.draw_offset; - // voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); +#if 0 + voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); +#endif } break; case SST_colBufferStride: @@ -679,10 +687,14 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.col_tiled = voodoo->col_tiled; if (voodoo->col_tiled) { voodoo->row_width = (val & 0x7f) * 128 * 32; - // voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); +#if 0 + voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); +#endif } else { voodoo->row_width = val & 0x3fff; - // voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); +#if 0 + voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); +#endif } voodoo->params.row_width = voodoo->row_width; } @@ -690,7 +702,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) case SST_auxBufferAddr: if (voodoo->type >= VOODOO_BANSHEE) { voodoo->params.aux_offset = val & 0xfffff0; - // pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); +#if 0 + pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); +#endif } break; case SST_auxBufferStride: @@ -699,10 +713,14 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.aux_tiled = voodoo->aux_tiled; if (voodoo->aux_tiled) { voodoo->aux_row_width = (val & 0x7f) * 128 * 32; - // voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); +#if 0 + voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); +#endif } else { voodoo->aux_row_width = val & 0x3fff; - // voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); +#if 0 + voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); +#endif } voodoo->params.aux_row_width = voodoo->aux_row_width; } @@ -726,12 +744,16 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) case SST_sVx: tempif.i = val; voodoo->verts[3].sVx = tempif.f; - // voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); +#if 0 + voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); +#endif break; case SST_sVy: tempif.i = val; voodoo->verts[3].sVy = tempif.f; - // voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); +#if 0 + voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); +#endif break; case SST_sARGB: voodoo->verts[3].sBlue = (float) (val & 0xff); @@ -789,7 +811,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) break; case SST_sBeginTriCMD: - // voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); +#if 0 + voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); +#endif voodoo->verts[0] = voodoo->verts[3]; voodoo->verts[1] = voodoo->verts[3]; voodoo->verts[2] = voodoo->verts[3]; @@ -800,7 +824,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->cull_pingpong = 0; break; case SST_sDrawTriCMD: - // voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); +#if 0 + voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); +#endif /*I'm not sure this is the vertex selection algorithm actually used in the 3dfx chips, but this works with a number of games that switch between strip and fan mode in the middle of a run (eg Black & White, Viper Racing)*/ @@ -840,7 +866,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->num_verticies++; if (voodoo->num_verticies == 3) { - // voodoo_reg_log("triangle_setup\n"); +#if 0 + voodoo_reg_log("triangle_setup\n"); +#endif voodoo_triangle_setup(voodoo); voodoo->cull_pingpong = !voodoo->cull_pingpong; @@ -852,7 +880,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->bltSrcBaseAddr = val & 0x3fffff; break; case SST_bltDstBaseAddr: - // voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); +#if 0 + voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); +#endif voodoo->bltDstBaseAddr = val & 0x3fffff; break; case SST_bltXYStrides: @@ -969,7 +999,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.texBaseAddr[0] = val & 0xfffff0; else voodoo->params.texBaseAddr[0] = (val & 0x7ffff) << 3; - // voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); +#if 0 + voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); +#endif voodoo_recalc_tex(voodoo, 0); } if (chip & CHIP_TREX1) { diff --git a/src/video/vid_voodoo_render.c b/src/video/vid_voodoo_render.c index c0e6e0196..052a0b51e 100644 --- a/src/video/vid_voodoo_render.c +++ b/src/video/vid_voodoo_render.c @@ -178,7 +178,9 @@ voodoo_fls(uint16_t val) { int num = 0; - // voodoo_render_log("fls(%04x) = ", val); +#if 0 + voodoo_render_log("fls(%04x) = ", val); +#endif if (!(val & 0xff00)) { num += 8; val <<= 8; @@ -195,7 +197,9 @@ voodoo_fls(uint16_t val) num += 1; val <<= 1; } - // voodoo_render_log("%i %04x\n", num, val); +#if 0 + voodoo_render_log("%i %04x\n", num, val); +#endif return num; } @@ -241,7 +245,7 @@ tex_read(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int tmu) #define HIGH4(x) ((x & 0xf0) | ((x & 0xf0) >> 4)) static inline void -tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, int x) +tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, UNUSED(int x)) { rgba_u dat[4]; @@ -320,36 +324,44 @@ voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *st s >>= 4; t >>= 4; - // if (x == 80) - // if (voodoo_output) - // voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); +#if 0 + if (x == 80) + if (voodoo_output) + voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); +#endif d[0] = (16 - _ds) * (16 - dt); d[1] = _ds * (16 - dt); d[2] = (16 - _ds) * dt; d[3] = _ds * dt; - // texture_state.s = s; - // texture_state.t = t; +#if 0 + texture_state.s = s; + texture_state.t = t; +#endif tex_read_4(state, &texture_state, s, t, d, tmu, x); - /* state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; - state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; - state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; - state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ - /* state->tex_r = tex_samples[0].r; - state->tex_g = tex_samples[0].g; - state->tex_b = tex_samples[0].b; - state->tex_a = tex_samples[0].a;*/ +#if 0 + state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; + state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; + state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; + state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ +#endif +#if 0 + state->tex_r = tex_samples[0].r; + state->tex_g = tex_samples[0].g; + state->tex_b = tex_samples[0].b; + state->tex_a = tex_samples[0].a; +#endif } else { - // rgba_t tex_samples; - // voodoo_texture_state_t texture_state; - // int s = state->tex_s >> (18+state->lod); - // int t = state->tex_t >> (18+state->lod); - // int s, t; - - // state->tex_s -= 1 << (17+state->lod); - // state->tex_t -= 1 << (17+state->lod); +#if 0 + rgba_t tex_samples; + voodoo_texture_state_t texture_state; + int s = state->tex_s >> (18+state->lod); + int t = state->tex_t >> (18+state->lod); + state->tex_s -= 1 << (17+state->lod); + state->tex_t -= 1 << (17+state->lod); +#endif s = state->tex_s >> (4 + tex_lod); t = state->tex_t >> (4 + tex_lod); @@ -357,10 +369,12 @@ voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *st texture_state.t = t; tex_read(state, &texture_state, tmu); - /* state->tex_r = tex_samples[0].rgba.r; - state->tex_g = tex_samples[0].rgba.g; - state->tex_b = tex_samples[0].rgba.b; - state->tex_a = tex_samples[0].rgba.a;*/ +#if 0 + state->tex_r = tex_samples[0].rgba.r; + state->tex_g = tex_samples[0].rgba.g; + state->tex_b = tex_samples[0].rgba.b; + state->tex_a = tex_samples[0].rgba.a; +#endif } } @@ -432,8 +446,10 @@ voodoo_tmu_fetch_and_blend(voodoo_t *voodoo, voodoo_params_t *params, voodoo_sta c_reverse = !tc_reverse_blend; a_reverse = !tca_reverse_blend; } - /* c_reverse1 = c_reverse; - a_reverse1 = a_reverse;*/ +#if 0 + c_reverse1 = c_reverse; + a_reverse1 = a_reverse; +#endif if (tc_sub_clocal_1) { switch (tc_mselect_1) { case TC_MSELECT_ZERO: @@ -639,30 +655,32 @@ int voodoo_recomp = 0; static void voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int ystart, int yend, int odd_even) { - /* int rgb_sel = params->fbzColorPath & 3; - int a_sel = (params->fbzColorPath >> 2) & 3; - int cc_localselect = params->fbzColorPath & (1 << 4); - int cca_localselect = (params->fbzColorPath >> 5) & 3; - int cc_localselect_override = params->fbzColorPath & (1 << 7); - int cc_zero_other = params->fbzColorPath & (1 << 8); - int cc_sub_clocal = params->fbzColorPath & (1 << 9); - int cc_mselect = (params->fbzColorPath >> 10) & 7; - int cc_reverse_blend = params->fbzColorPath & (1 << 13); - int cc_add = (params->fbzColorPath >> 14) & 3; - int cc_add_alocal = params->fbzColorPath & (1 << 15); - int cc_invert_output = params->fbzColorPath & (1 << 16); - int cca_zero_other = params->fbzColorPath & (1 << 17); - int cca_sub_clocal = params->fbzColorPath & (1 << 18); - int cca_mselect = (params->fbzColorPath >> 19) & 7; - int cca_reverse_blend = params->fbzColorPath & (1 << 22); - int cca_add = (params->fbzColorPath >> 23) & 3; - int cca_invert_output = params->fbzColorPath & (1 << 25); - int src_afunc = (params->alphaMode >> 8) & 0xf; - int dest_afunc = (params->alphaMode >> 12) & 0xf; - int alpha_func = (params->alphaMode >> 1) & 7; - int a_ref = params->alphaMode >> 24; - int depth_op = (params->fbzMode >> 5) & 7; - int dither = params->fbzMode & FBZ_DITHER;*/ +#if 0 + int rgb_sel = params->fbzColorPath & 3; + int a_sel = (params->fbzColorPath >> 2) & 3; + int cc_localselect = params->fbzColorPath & (1 << 4); + int cca_localselect = (params->fbzColorPath >> 5) & 3; + int cc_localselect_override = params->fbzColorPath & (1 << 7); + int cc_zero_other = params->fbzColorPath & (1 << 8); + int cc_sub_clocal = params->fbzColorPath & (1 << 9); + int cc_mselect = (params->fbzColorPath >> 10) & 7; + int cc_reverse_blend = params->fbzColorPath & (1 << 13); + int cc_add = (params->fbzColorPath >> 14) & 3; + int cc_add_alocal = params->fbzColorPath & (1 << 15); + int cc_invert_output = params->fbzColorPath & (1 << 16); + int cca_zero_other = params->fbzColorPath & (1 << 17); + int cca_sub_clocal = params->fbzColorPath & (1 << 18); + int cca_mselect = (params->fbzColorPath >> 19) & 7; + int cca_reverse_blend = params->fbzColorPath & (1 << 22); + int cca_add = (params->fbzColorPath >> 23) & 3; + int cca_invert_output = params->fbzColorPath & (1 << 25); + int src_afunc = (params->alphaMode >> 8) & 0xf; + int dest_afunc = (params->alphaMode >> 12) & 0xf; + int alpha_func = (params->alphaMode >> 1) & 7; + int a_ref = params->alphaMode >> 24; + int depth_op = (params->fbzMode >> 5) & 7; + int dither = params->fbzMode & FBZ_DITHER;*/ +#endif int texels; #ifndef NO_CODEGEN uint8_t (*voodoo_draw)(voodoo_state_t * state, voodoo_params_t * params, int x, int real_y); @@ -723,7 +741,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * yend = params->clipHighY; state->y = ystart; - // yend--; +#if 0 + yend--; +#endif if (SLI_ENABLED) { int test_y; @@ -760,7 +780,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * #endif voodoo_render_log("dxAB=%08x dxBC=%08x dxAC=%08x\n", state->dxAB, state->dxBC, state->dxAC); - // voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); +#if 0 + voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); +#endif for (; state->y < yend; state->y += y_diff) { int x; @@ -916,7 +938,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * voodoo->fbiPixelsIn++; voodoo_render_log(" X=%03i T=%08x\n", x, state->tmu0_t); - // if (voodoo->fbzMode & FBZ_RGB_WMASK) +#if 0 + if (voodoo->fbzMode & FBZ_RGB_WMASK) +#endif { int update = 1; uint8_t cother_r = 0; @@ -956,7 +980,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * w_depth = 0xffff; } - // w_depth = CLAMP16(w_depth); +#if 0 + w_depth = CLAMP16(w_depth); +#endif if (params->fbzMode & FBZ_W_BUFFER) new_depth = w_depth; diff --git a/src/video/vid_voodoo_texture.c b/src/video/vid_voodoo_texture.c index 1e9413460..d02041d16 100644 --- a/src/video/vid_voodoo_texture.c +++ b/src/video/vid_voodoo_texture.c @@ -550,7 +550,9 @@ flush_texture_cache(voodoo_t *voodoo, uint32_t dirty_addr, int tmu) int wait_for_idle = 0; memset(voodoo->texture_present[tmu], 0, sizeof(voodoo->texture_present[0])); - // voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); +#if 0 + voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); +#endif for (uint8_t c = 0; c < TEX_CACHE_MAX; c++) { if (voodoo->texture_cache[tmu][c].base != -1) { for (uint8_t d = 0; d < 4; d++) { @@ -618,8 +620,10 @@ voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) if (lod > LOD_MAX) return; - // if (addr >= 0x200000) - // return; +#if 0 + if (addr >= 0x200000) + return; +#endif if (voodoo->params.tformat[tmu] & 8) addr = voodoo->params.tex_base[tmu][lod] + s * 2 + (t << voodoo->params.tex_shift[tmu][lod]) * 2; @@ -629,11 +633,15 @@ voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) addr = (addr & 0x1ffffc) + voodoo->params.tex_base[tmu][0]; if (voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu); } if (voodoo->type == VOODOO_3 && voodoo->texture_present[tmu ^ 1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu ^ 1); } *(uint32_t *) (&voodoo->tex_mem[tmu][addr & voodoo->texture_mask]) = val; diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 0c795d132..e4f91bb00 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -37,6 +37,7 @@ #define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" #define XGA2_BIOS_PATH "roms/video/xga/xga2_v300.bin" +#define INMOS_XGA_BIOS_PATH "roms/video/xga/InMOS XGA - Fairchild NM27C256Q-150.BIN" static video_timings_t timing_xga_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; static video_timings_t timing_xga_mca = { .type = VIDEO_MCA, .write_b = 4, .write_w = 5, .write_l = 10, .read_b = 5, .read_w = 5, .read_l = 10 }; @@ -44,16 +45,86 @@ static video_timings_t timing_xga_mca = { .type = VIDEO_MCA, .write_b = 4, .writ static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); static uint8_t xga_ext_inb(uint16_t addr, void *p); +int xga_has_vga = 0; + +void +svga_xga_out(uint16_t addr, uint8_t val, void *p) +{ + svga_t *svga = (svga_t *)p; + uint8_t old; + + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if (svga->crtcreg & 0x20) + return; + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; + } + svga_out(addr, val, svga); +} + +uint8_t +svga_xga_in(uint16_t addr, void *p) +{ + svga_t *svga = (svga_t *)p; + uint8_t temp; + + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + if (svga->crtcreg & 0x20) + temp = 0xff; + else + temp = svga->crtc[svga->crtcreg]; + break; + default: + temp = svga_in(addr, svga); + break; + } + return temp; +} + void xga_updatemapping(svga_t *svga) { xga_t *xga = &svga->xga; - //pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); + //pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, access mode = %x, map = %x, endian reverse = %d, a5test = %d, XGA on = %d.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->access_mode, svga->gdcreg[6] & 0x0c, xga->linear_endian_reverse, xga->a5_test, xga->on); if (((xga->op_mode & 7) >= 4) || ((xga->op_mode & 7) == 0)) { - if (xga->aperture_cntl == 1) { + if ((xga->aperture_cntl == 1) || (xga->aperture_cntl == 2)) { mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&xga->video_mapping, 0xa0000, 0x10000); + if (xga->aperture_cntl == 1) + mem_mapping_set_addr(&xga->video_mapping, 0xa0000, 0x10000); + else + mem_mapping_set_addr(&xga->video_mapping, 0xb0000, 0x10000); + mem_mapping_enable(&xga->video_mapping); xga->banked_mask = 0xffff; if (!xga->linear_endian_reverse) @@ -63,38 +134,23 @@ xga_updatemapping(svga_t *svga) mem_mapping_set_addr(&xga->video_mapping, 0xa0000, 0x10000); mem_mapping_enable(&xga->video_mapping); xga->banked_mask = 0xffff; - if (xga->pos_regs[4] & 1) - mem_mapping_set_addr(&xga->linear_mapping, xga->linear_base, 0x400000); - else if (xga->base_addr_1mb) + if (xga->base_addr_1mb) mem_mapping_set_addr(&xga->linear_mapping, xga->base_addr_1mb, 0x100000); else mem_mapping_set_addr(&xga->linear_mapping, xga->linear_base, 0x400000); if (((xga->op_mode & 7) == 4) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test && xga->on) xga->linear_endian_reverse = 1; - else if (((xga->op_mode & 7) == 0) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test && !xga->on) + else if (((xga->op_mode & 7) == 0) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test && !xga->on) { xga->linear_endian_reverse = 1; - xga->on = 0; - vga_on = !xga->on; - } else { - mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&xga->video_mapping, 0xb0000, 0x10000); - mem_mapping_enable(&xga->video_mapping); - xga->banked_mask = 0xffff; - mem_mapping_disable(&xga->linear_mapping); + } + if (xga->a5_test && (xga->access_mode & 8) && !xga->linear_endian_reverse) { + xga->on = 0; + vga_on = !xga->on; + } } - } else { - xga->on = 0; - vga_on = !xga->on; - mem_mapping_disable(&svga->mapping); - if (xga->aperture_cntl == 2) - mem_mapping_set_addr(&xga->video_mapping, 0xb0000, 0x10000); - else - mem_mapping_set_addr(&xga->video_mapping, 0xa0000, 0x10000); - mem_mapping_enable(&xga->video_mapping); - xga->banked_mask = 0xffff; - mem_mapping_disable(&xga->linear_mapping); - //pclog("XGA opmode (not extended) = %d, disp mode = %d, aperture = %d.\n", xga->op_mode & 7, xga->disp_cntl_2 & 7, xga->aperture_cntl); + //pclog("XGA opmode (extended) = %d, disp mode = %d, aperture = %d.\n", xga->op_mode & 7, xga->disp_cntl_2 & 7, xga->aperture_cntl); } + //pclog("VGA on = %d.\n", vga_on); } void @@ -126,19 +182,19 @@ xga_recalctimings(svga_t *svga) xga->ma_latch = xga->disp_start_addr; - switch (xga->clk_sel_1 & 0x0c) { + switch ((xga->clk_sel_1 >> 2) & 3) { case 0: if (xga->clk_sel_2 & 0x80) { - svga->clock = (cpuclock * (double) (1ULL << 32)) / 41539000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 41539000.0; } else { - svga->clock = (cpuclock * (double) (1ULL << 32)) / 25175000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; } break; - case 4: - svga->clock = (cpuclock * (double) (1ULL << 32)) / 28322000.0; + case 1: + svga->clock = (cpuclock * (double) (1ull << 32)) / 28322000.0; break; - case 0x0c: - svga->clock = (cpuclock * (double) (1ULL << 32)) / 44900000.0; + case 3: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; break; } } @@ -309,7 +365,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) if ((xga->sprite_pos >= 0) && (xga->sprite_pos <= 16)) { if ((xga->op_mode & 7) >= 5) xga->cursor_data_on = 1; - else if (xga->sprite_pos >= 1) + else if ((xga->sprite_pos >= 1) || ((xga->disp_cntl_2 & 7) > 3)) xga->cursor_data_on = 1; else if (xga->aperture_cntl == 0) { if (xga->linear_endian_reverse && !(xga->access_mode & 8)) @@ -474,7 +530,10 @@ xga_ext_inb(uint16_t addr, void *p) case 0x0f: switch (xga->regs_idx) { case 4: - ret = (xga->bus & DEVICE_MCA) ? 1 : 0; + if (xga->bus & DEVICE_MCA) + ret = 0x01; /*32-bit MCA*/ + else + ret = 0x10; /*16-bit ISA*/ break; case 0x10: ret = xga->htotal & 0xff; @@ -653,6 +712,16 @@ xga_ext_inb(uint16_t addr, void *p) ret = xga->clk_sel_2; break; + case 0x74: + if (xga->bus & DEVICE_MCA) + ret = xga->regs[xga->regs_idx]; + else { + ret = (xga->dma_channel << 1); + if (xga->dma_channel) + ret |= 1; + } + break; + default: ret = xga->regs[xga->regs_idx]; break; @@ -678,15 +747,35 @@ xga_ext_inb(uint16_t addr, void *p) dat = xga->vram[(addr + 1) & (xga->vram_mask - 1)] & 0xff; \ dat |= (xga->vram[(addr) & (xga->vram_mask - 1)] << 8); +#define READL(addr, dat) \ + dat = *(uint32_t *) &xga->vram[(addr) & (xga->vram_mask)]; + +#define READL_REVERSE(addr, dat) \ + dat = xga->vram[(addr + 3) & (xga->vram_mask - 3)] & 0xff; \ + dat |= (xga->vram[(addr + 2) & (xga->vram_mask - 3)] << 8); \ + dat |= (xga->vram[(addr + 1) & (xga->vram_mask - 3)] << 16); \ + dat |= (xga->vram[(addr) & (xga->vram_mask - 3)] << 24); + #define WRITEW(addr, dat) \ *(uint16_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; +#define WRITEL(addr, dat) \ + *(uint32_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ + xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; + #define WRITEW_REVERSE(addr, dat) \ xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; +#define WRITEL_REVERSE(addr, dat) \ + xga->vram[((addr + 3)) & (xga->vram_mask - 3)] = dat & 0xff; \ + xga->vram[((addr + 2)) & (xga->vram_mask - 3)] = dat >> 8; \ + xga->vram[((addr + 1)) & (xga->vram_mask - 3)] = dat >> 16; \ + xga->vram[((addr)) & (xga->vram_mask - 3)] = dat >> 24; \ + xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; + #define ROP(mix, d, s) \ { \ switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ @@ -859,6 +948,23 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int byte = mem_readw_phys(addr); } return byte; + case 5: /*24-bit*/ + addr += (y * (width << 2)); + addr += (x << 2); + if (!skip) { + if ((xga->accel.px_map_format[map] & 8)) { + if (xga->linear_endian_reverse) { + READL(addr, byte); + } else { + READL_REVERSE(addr, byte); + } + } else { + READL(addr, byte); + } + } else { + byte = mem_readl_phys(addr); + } + return byte; } return 0; @@ -936,6 +1042,22 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui } mem_writew_phys(addr, pixel); break; + case 5: /*24-bit*/ + addr += (y * (width) << 2); + addr += (x << 2); + if (!skip) { + if ((xga->accel.px_map_format[map] & 8)) { + if (xga->linear_endian_reverse) { + WRITEL(addr, pixel); + } else { + WRITEL_REVERSE(addr, pixel); + } + } else { + WRITEL(addr, pixel); + } + } + mem_writel_phys(addr, pixel); + break; } } @@ -1447,6 +1569,10 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) if (addr >= 0x1800) { switch (addr & 0x7f) { + case 0x11: + xga->accel.control = val; + break; + case 0x12: xga->accel.px_map_idx = val & 3; break; @@ -1923,11 +2049,21 @@ xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) uint8_t temp = 0; addr &= 0x1fff; - if (addr < 0x1800) { - temp = xga->bios_rom.rom[addr]; + if (!xga_has_vga) + temp = xga->bios_rom.rom[addr]; + else + temp = xga->vga_bios_rom.rom[addr]; } else { switch (addr & 0x7f) { + case 0x11: + temp = xga->accel.control; + if (xga->accel.control & 0x08) + temp |= 0x10; + else + temp &= ~0x10; + break; + case 0x20: temp = xga->accel.bres_err_term & 0xff; break; @@ -2092,8 +2228,9 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) if (svga->scrblank || (xga->h_disp == 0)) return; + uint32_t *line_ptr = svga->monitor->target_buffer->line[xga->displine + svga->y_add]; for (int i = 0; i < svga->x_add; i++) - buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; + *line_ptr++ = svga->overscan_color; } static void @@ -2107,9 +2244,10 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) if (svga->scrblank || (xga->h_disp == 0)) return; - right = (overscan_x >> 1); + uint32_t *line_ptr = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp]; + right = (overscan_x >> 1); for (int i = 0; i < right; i++) - buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; + *line_ptr++ = svga->overscan_color; } static void @@ -2122,7 +2260,7 @@ xga_render_8bpp(xga_t *xga, svga_t *svga) return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; + p = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add]; if (xga->firstline_draw == 2000) xga->firstline_draw = xga->displine; @@ -2159,7 +2297,7 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; + p = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add]; if (xga->firstline_draw == 2000) xga->firstline_draw = xga->displine; @@ -2524,7 +2662,7 @@ xga_poll(xga_t *xga, svga_t *svga) } xga->vc++; - xga->vc &= 2047; + xga->vc &= 0x7ff; if (xga->vc == xga->split) { if (xga->interlace && xga->oddeven) @@ -2683,8 +2821,149 @@ static uint8_t xga_pos_in(uint16_t addr, void *priv) { svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; + uint8_t ret = 0xff; - return (xga_mca_read(addr, svga)); + if (xga_has_vga) { + switch (addr) { + case 0x0100: + case 0x0101: + if (xga->instance_isa == xga->instance_num) + ret = xga->pos_regs[addr & 7]; + else + ret = 0xff; + break; + case 0x0102: + case 0x0105: + ret = xga->pos_regs[addr & 7]; + break; + case 0x0106: + ret = xga->pos_idx >> 8; + break; + case 0x0107: + ret = xga->pos_idx & 0xff; + break; + case 0x0103: + if (!(xga->pos_idx & 3)) { + ret = xga->pos_regs[3]; + } else + ret = 0; + //pclog("POS IDX for 0103 = %d, ret = %02x.\n", xga->pos_idx & 3, ret); + break; + case 0x0104: + switch (xga->pos_idx & 3) { + case 0: + ret = xga->pos_regs[4]; + break; + case 1: + ret = xga->pos_regs[0]; + break; + case 2: + ret = xga->pos_regs[1]; + break; + case 3: + ret = 0; + break; + } + //pclog("POS IDX for 0104 = %d, ret = %02x.\n", xga->pos_idx & 3, ret); + break; + case 0x0108: + case 0x0109: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + xga->instance_num = addr & 7; + if (xga->instance_isa == xga->instance_num) + ret = xga->instance_isa; + else + ret = 0; + + ret |= xga->isa_pos_enable; + break; + } + } else { + switch (addr) { + case 0x0100: + case 0x0101: + ret = xga->pos_regs[addr & 7]; + break; + case 0x0103: + ret = xga->pos_regs[3] | 7; + ret |= (xga->dma_channel << 3); + break; + case 0x0102: + case 0x0104: + case 0x0105: + case 0x0106: + case 0x0107: + ret = (xga_mca_read(addr, svga)); + break; + case 0x0108: + case 0x0109: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + xga->instance_num = addr & 7; + if (xga->instance_isa == xga->instance_num) + ret = xga->instance_isa; + else + ret = 0; + + ret |= xga->isa_pos_enable; + break; + } + } + return ret; +} + +static void +xga_pos_out(uint16_t addr, uint8_t val, void *priv) +{ + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; + + if (xga_has_vga) { + switch (addr) { + case 0x0106: + xga->pos_idx = (xga->pos_idx & 0x00ff) | (val << 8); + break; + case 0x0107: + xga->pos_idx = (xga->pos_idx & 0xff00) | (val); + //pclog("POS IDX Write = %04x.\n", xga->pos_idx); + break; + case 0x0108: + case 0x0109: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + xga->instance_num = addr & 7; + xga->isa_pos_enable = val & 0x08; + break; + } + } else { + switch (addr) { + case 0x0108: + case 0x0109: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + xga->instance_num = addr & 7; + xga->isa_pos_enable = val & 0x08; + break; + } + } } static void @@ -2700,7 +2979,10 @@ static void uint32_t temp; uint8_t *rom = NULL; + xga->ext_mem_addr = device_get_config_hex16("ext_mem_addr"); + xga->instance_isa = device_get_config_int("instance"); xga->type = device_get_config_int("type"); + xga->dma_channel = device_get_config_int("dma"); xga->bus = info->flags; xga->vram_size = (1024 << 10); @@ -2739,12 +3021,16 @@ static void xga->rom_addr = 0; rom_init(&xga->bios_rom, xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, 0xc0000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); } else { - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_xga_isa); - xga->pos_regs[2] = 1 | 0x0c | 0xf0; + if (xga_has_vga) { + rom_init(&xga->vga_bios_rom, INMOS_XGA_BIOS_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + } else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_xga_isa); + + xga->pos_regs[2] = 1 | (xga->instance_isa << 1) | xga->ext_mem_addr; xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[4] = 1 | 2; xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); } mem_mapping_add(&xga->video_mapping, 0, 0, xga_readb, xga_readw, xga_readl, @@ -2755,7 +3041,7 @@ static void NULL, MEM_MAPPING_EXTERNAL, svga); mem_mapping_add(&xga->memio_mapping, 0, 0, xga_memio_readb, xga_memio_readw, xga_memio_readl, xga_memio_writeb, xga_memio_writew, xga_memio_writel, - xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, svga); + xga_has_vga ? xga->vga_bios_rom.rom : xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, svga); mem_mapping_disable(&xga->video_mapping); mem_mapping_disable(&xga->linear_mapping); @@ -2768,13 +3054,41 @@ static void mca_add(xga_mca_read, xga_mca_write, xga_mca_feedb, xga_mca_reset, svga); } else { io_sethandler(0x0100, 0x0008, xga_pos_in, NULL, NULL, NULL, NULL, NULL, svga); + if (xga_has_vga) + io_sethandler(0x0106, 0x0002, NULL, NULL, NULL, xga_pos_out, NULL, NULL, svga); + io_sethandler(0x2100 + (xga->instance << 4), 0x0010, xga_ext_inb, NULL, NULL, xga_ext_outb, NULL, NULL, svga); + io_sethandler(0x0108, 0x0008, xga_pos_in, NULL, NULL, xga_pos_out, NULL, NULL, svga); mem_mapping_set_addr(&xga->memio_mapping, xga->rom_addr + 0x1c00 + (xga->instance * 0x80), 0x80); } - return svga; } +static void + * + svga_xga_init(const device_t *info) +{ + svga_t *svga = malloc(sizeof(svga_t)); + memset(svga, 0, sizeof(svga_t)); + + video_inform(VIDEO_FLAG_TYPE_XGA, &timing_xga_isa); + + svga_init(info, svga, svga, 1 << 18, /*256kB*/ + NULL, + svga_xga_in, svga_xga_out, + NULL, + NULL); + + io_sethandler(0x03c0, 0x0020, svga_xga_in, NULL, NULL, svga_xga_out, NULL, NULL, svga); + + svga->bpp = 8; + svga->miscout = 1; + xga_has_vga = 1; + xga_enabled = 1; + + return xga_init(info); +} + static void xga_close(void *p) { @@ -2793,6 +3107,12 @@ xga_available(void) return rom_present(XGA_BIOS_PATH) && rom_present(XGA2_BIOS_PATH); } +static int +inmos_xga_available(void) +{ + return rom_present(INMOS_XGA_BIOS_PATH); +} + static void xga_speed_changed(void *p) { @@ -2809,7 +3129,7 @@ xga_force_redraw(void *p) svga->fullchange = svga->monitor->mon_changeframecount; } -static const device_config_t xga_configuration[] = { +static const device_config_t xga_mca_configuration[] = { // clang-format off { .name = "type", @@ -2835,6 +3155,91 @@ static const device_config_t xga_configuration[] = { // clang-format on }; +static const device_config_t xga_isa_configuration[] = { + // clang-format off + { + .name = "type", + .description = "XGA type", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 0, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { + .description = "XGA-1", + .value = 0 + }, + { + .description = "XGA-2", + .value = 1 + }, + { .description = "" } + } + }, + { + .name = "instance", + .description = "Instance", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 6, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { .description = "0 (2100h-210Fh)", .value = 0 }, + { .description = "1 (2110h-211Fh)", .value = 1 }, + { .description = "2 (2120h-212Fh)", .value = 2 }, + { .description = "3 (2130h-213Fh)", .value = 3 }, + { .description = "4 (2140h-214Fh)", .value = 4 }, + { .description = "5 (2150h-215Fh)", .value = 5 }, + { .description = "6 (2160h-216Fh)", .value = 6 }, + { .description = "7 (2170h-217Fh)", .value = 7 }, + { .description = "" } + }, + }, + { + .name = "ext_mem_addr", + .description = "MMIO address", + .type = CONFIG_HEX16, + .default_string = "", + .default_int = 0x00f0, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { .description = "C800h", .value = 0x0040 }, + { .description = "CA00h", .value = 0x0050 }, + { .description = "CC00h", .value = 0x0060 }, + { .description = "CE00h", .value = 0x0070 }, + { .description = "D000h", .value = 0x0080 }, + { .description = "D200h", .value = 0x0090 }, + { .description = "D400h", .value = 0x00a0 }, + { .description = "D600h", .value = 0x00b0 }, + { .description = "D800h", .value = 0x00c0 }, + { .description = "DA00h", .value = 0x00d0 }, + { .description = "DC00h", .value = 0x00e0 }, + { .description = "DE00h", .value = 0x00f0 }, + { .description = "" } + }, + }, + { + .name = "dma", + .description = "DMA channel", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 7, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { .description = "Disabled", .value = 0 }, + { .description = "DMA 6", .value = 6 }, + { .description = "DMA 7", .value = 7 }, + { .description = "" } + }, + }, + { .name = "", .description = "", .type = CONFIG_END } +// clang-format on +}; + const device_t xga_device = { .name = "XGA (MCA)", .internal_name = "xga_mca", @@ -2846,7 +3251,7 @@ const device_t xga_device = { { .available = xga_available }, .speed_changed = xga_speed_changed, .force_redraw = xga_force_redraw, - .config = xga_configuration + .config = xga_mca_configuration }; const device_t xga_isa_device = { @@ -2860,13 +3265,27 @@ const device_t xga_isa_device = { { .available = xga_available }, .speed_changed = xga_speed_changed, .force_redraw = xga_force_redraw, - .config = xga_configuration + .config = xga_isa_configuration +}; + +const device_t inmos_isa_device = { + .name = "INMOS XGA (ISA)", + .internal_name = "inmos_xga_isa", + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = svga_xga_init, + .close = xga_close, + .reset = xga_reset, + { .available = inmos_xga_available }, + .speed_changed = xga_speed_changed, + .force_redraw = xga_force_redraw, + .config = xga_isa_configuration }; void xga_device_add(void) { - if (!xga_enabled) + if (!xga_enabled || (xga_has_vga && xga_enabled)) return; if (machine_has_bus(machine, MACHINE_BUS_MCA)) diff --git a/src/vnc.c b/src/vnc.c index 8743c1e17..30caff9e2 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -93,7 +93,9 @@ vnc_mouse_poll(void) ms.dx = 0; ms.dy = 0; - // pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); +#if 0 + pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); +#endif } if (b != ms.buttons) { @@ -132,7 +134,7 @@ vnc_ptrevent(int but, int x, int y, rfbClientPtr cl) } static void -vnc_clientgone(rfbClientPtr cl) +vnc_clientgone(UNUSED(rfbClientPtr cl)) { vnc_log("VNC: client disconnected: %s\n", cl->host); @@ -143,7 +145,9 @@ vnc_clientgone(rfbClientPtr cl) vnc_log("VNC: no clients, pausing..\n"); /* Disable the mouse. */ - // plat_mouse_capture(0); +#if 0 + plat_mouse_capture(0); +#endif mouse_set_poll_ex(NULL); plat_pause(1); @@ -169,7 +173,9 @@ vnc_newclient(rfbClientPtr cl) vnc_log("VNC: unpausing..\n"); /* Enable the mouse. */ - // plat_mouse_capture(1); +#if 0 + plat_mouse_capture(1); +#endif mouse_set_poll_ex(vnc_mouse_poll); plat_pause(0); @@ -325,7 +331,7 @@ vnc_pause(void) } void -vnc_take_screenshot(wchar_t *fn) +vnc_take_screenshot(UNUSED(wchar_t *fn)) { vnc_log("VNC: take_screenshot\n"); } diff --git a/src/vnc_keymap.c b/src/vnc_keymap.c index 923f6ecf0..2e5f3c0d8 100644 --- a/src/vnc_keymap.c +++ b/src/vnc_keymap.c @@ -665,8 +665,8 @@ vnc_kbinput(int down, int k) /* Send this scancode sequence to the PC keyboard. */ switch (scan >> 8) { - case 0x00: default: + case 0x00: if (scan & 0xff) keyboard_input(down, scan & 0xff); break; diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 4b60cb930..806f2b45b 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -242,13 +242,13 @@ PROG := 86Box # Nothing should need changing from here on.. # ######################################################################### VPATH := $(EXPATH) . $(CODEGEN) minitrace cpu cpu/softfloat \ - cdrom chipset device disk disk/minivhd floppy \ + cpu/808x cdrom chipset device disk disk/minivhd floppy \ game machine mem printer \ sio sound \ sound/munt sound/munt/c_interface sound/munt/sha1 \ sound/munt/srchelper sound/munt/srchelper/srctools/src \ sound/resid-fp sound/ymfm \ - scsi video network network/slirp win + scsi video network win WINDRES := windres STRIP := strip @@ -545,13 +545,15 @@ MAINOBJ := 86box.o config.o log.o random.o timer.o io.o acpi.o apm.o dma.o ddma. usb.o device.o nvr.o nvr_at.o nvr_ps2.o machine_status.o ini.o \ $(VNCOBJ) -MEMOBJ := catalyst_flash.o i2c_eeprom.o intel_flash.o mem.o rom.o smram.o spd.o sst_flash.o +MEMOBJ := catalyst_flash.o i2c_eeprom.o intel_flash.o mem.o rom.o row.o smram.o spd.o sst_flash.o + +CPU808XOBJ := queue.o CPUOBJ := $(DYNARECOBJ) \ $(CGTOBJ) \ cpu.o cpu_table.o fpu.o x86.o \ 8080.o 808x.o 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o \ - x86seg.o x87.o x87_timings.o \ + x86_ops_mmx.o x86seg.o x87.o x87_timings.o \ f2xm1.o fpatan.o fprem.o fsincos.o fyl2x.o softfloat_poly.o softfloat.o softfloat16.o \ softfloat-muladd.o softfloat-round-pack.o softfloat-specialize.o softfloatx80.o @@ -654,18 +656,9 @@ SCSIOBJ := scsi.o scsi_device.o \ scsi_ncr5380.o scsi_ncr53c8xx.o \ scsi_pcscsi.o scsi_spock.o -SLIRPOBJ := net_slirp.o tinyglib.o \ - arp_table.o bootp.o cksum.o dhcpv6.o dnssearch.o if.o \ - ip_icmp.o ip_input.o ip_output.o \ - ip6_icmp.o ip6_input.o ip6_output.o \ - mbuf.o misc.o sbuf.o slirp.o socket.o \ - tcp_input.o tcp_output.o tcp_subr.o tcp_timer.o \ - udp.o udp6.o \ - util.o version.o \ - NETOBJ := network.o \ net_pcap.o \ - ${SLIRPOBJ} \ + net_slirp.o \ net_dp8390.o net_3c501.o \ net_3c503.o net_ne2000.o \ net_pcnet.o net_wd8003.o \ @@ -720,6 +713,7 @@ VIDOBJ := agpgart.o video.o \ vid_vga.o \ vid_ati_eeprom.o \ vid_ati18800.o vid_ati28800.o \ + vid_ati_mach8.o \ vid_ati_mach64.o vid_ati68860_ramdac.o \ vid_bt48x_ramdac.o \ vid_av9194.o vid_icd2061.o vid_ics2494.o vid_ics2595.o \ @@ -781,7 +775,7 @@ ifeq ($(RTMIDI), y) SNDOBJ += midi_rtmidi.o endif -OBJ := $(MAINOBJ) $(CPUOBJ) $(CHIPSETOBJ) $(MCHOBJ) $(DEVOBJ) $(MEMOBJ) \ +OBJ := $(MAINOBJ) $(CPU808XOBJ) $(CPUOBJ) $(CHIPSETOBJ) $(MCHOBJ) $(DEVOBJ) $(MEMOBJ) \ $(FDDOBJ) $(GAMEOBJ) $(CDROMOBJ) $(ZIPOBJ) $(MOOBJ) $(HDDOBJ) $(MINIVHDOBJ) \ $(NETOBJ) $(PRINTOBJ) $(SCSIOBJ) $(SIOOBJ) $(SNDOBJ) $(VIDOBJ) $(VOODOOOBJ) \ $(PLATOBJ) $(UIOBJ) $(FSYNTHOBJ) $(MUNTOBJ) $(DEVBROBJ) $(MINITRACEOBJ) $(THREADOBJ) @@ -795,13 +789,24 @@ else MWIN := -mwindows endif +LIBS := -lfreetype -lfluidsynth -lslirp -lbz2 -lharfbuzz -lgraphite2 -lbrotlidec \ + -lbrotlicommon -lusp10 -lrpcrt4 -lgomp -lsndfile -lflac -lmp3lame -lmpg123 \ + -lopus -lvorbis -lvorbisenc -logg -ldsound -lshlwapi -lksuser -lreadline \ + -ltermcap -lportaudio -lgmodule-2.0 -lglib-2.0 -lintl -liconv + ifeq ($(OPENAL), y) - LIBS := $(MWIN) -lopenal -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 + LIBS += $(MWIN) -lopenal -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 \ + -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion \ + -luuid -lws2_32 else ifeq ($(FAUDIO), y) - LIBS := $(MWIN) -lfaudio -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 + LIBS += $(MWIN) -lfaudio -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 \ + -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion \ + -luuid -lws2_32 else - LIBS := $(MWIN) -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 + LIBS += $(MWIN) -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 \ + -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid \ + -lws2_32 endif endif diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 38911b0f8..9ded351b9 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -714,7 +714,8 @@ win_settings_machine_recalc_fpu(HWND hdlg) c++; } - settings_set_check(hdlg, IDC_CHECK_SOFTFLOAT, temp_fpu_softfloat); + settings_set_check(hdlg, IDC_CHECK_SOFTFLOAT, (machine_has_flags(temp_machine, MACHINE_SOFTFLOAT_ONLY) ? TRUE : temp_fpu_softfloat)); + settings_enable_window(hdlg, IDC_CHECK_SOFTFLOAT, (machine_has_flags(temp_machine, MACHINE_SOFTFLOAT_ONLY) ? FALSE : TRUE)); settings_enable_window(hdlg, IDC_COMBO_FPU, c > 1);