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https://github.com/86Box/86Box.git
synced 2026-03-02 02:38:24 -07:00
more defines...
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@@ -197,6 +197,10 @@ extern const device_config_t nv3_config[];
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#define NV3_PFIFO_INTR 0x2100 // FIFO - Interrupt Status
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#define NV3_PFIFO_INTR_EN 0x2140 // FIFO - Interrupt Enable
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#define NV3_PFIFO_CONFIG_0 0x2200
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#define NV3_PFIFO_CONFIG_0_DMA_FETCH 8
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#define NV3_PFIFO_CONFIG_RAMHT 0x2210
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#define NV3_PFIFO_END 0x3FFF
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#define NV3_PRM_START 0x4000 // Real-Mode Device Support Subsystem
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#define NV3_PRM_INTR 0x4100
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@@ -669,7 +673,7 @@ typedef struct nv3_pbus_s
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} nv3_pbus_t;
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// Command submission to PGRAPH
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typedef struct nv_pfifo_s
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typedef struct nv3_pfifo_s
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{
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uint32_t interrupt_status; // Interrupt status
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uint32_t interrupt_enable; // Interrupt enable
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@@ -715,6 +719,16 @@ typedef struct nv3_pramdac_s
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uint32_t hserr_width; // horizontal sync error width
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} nv3_pramdac_t;
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typedef struct nv3_pgraph_context_switch_s
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{
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} nv3_pgraph_context_switch_t;
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typedef struct nv3_pgraph_context_control_s
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{
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} nv3_pgraph_context_control_t;
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// Graphics Subsystem
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typedef struct nv3_pgraph_s
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{
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@@ -723,6 +737,8 @@ typedef struct nv3_pgraph_s
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uint32_t interrupt_status_1; // Interrupt status 1
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uint32_t interrupt_enable_1; // Interrupt enable 1
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nv3_pgraph_context_control_t context_control;
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nv3_pgraph_context_switch_t context_user_submit;
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uint32_t context_cache[NV3_PGRAPH_CONTEXT_CACHE_SIZE]; // DMA context cache
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} nv3_pgraph_t;
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