From b825aed242923d0c24730198bf2b843fd64b80fa Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Tue, 2 Sep 2025 16:41:30 +0200
Subject: [PATCH] 386DX: Fix cache defaults to be the equivalent of 0 wait
 states.

---
 src/cpu/cpu_table.c | 56 ++++++++++++++++++++++-----------------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index db8c89ebb..516de061c 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -1367,8 +1367,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 3,
                 .mem_write_cycles   = 3,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 2
             },
             {
@@ -1384,8 +1384,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             {
@@ -1401,8 +1401,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             {
@@ -1418,8 +1418,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 6,
                 .mem_write_cycles   = 6,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 4
             },
             {
@@ -1435,8 +1435,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 7,
                 .mem_write_cycles   = 7,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 5
             },
             { .name = "", 0 }
@@ -1461,8 +1461,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 3,
                 .mem_write_cycles   = 3,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 2
             },
             {
@@ -1478,8 +1478,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             {
@@ -1495,8 +1495,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             { .name = "", 0 }
@@ -1521,8 +1521,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = CPU_SUPPORTS_DYNAREC,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             {
@@ -1538,8 +1538,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = CPU_SUPPORTS_DYNAREC,
                 .mem_read_cycles    = 6,
                 .mem_write_cycles   = 6,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 4
             },
             {
@@ -1555,8 +1555,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = CPU_SUPPORTS_DYNAREC,
                 .mem_read_cycles    = 7,
                 .mem_write_cycles   = 7,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 5
             },
             { .name = "", 0 }
@@ -1581,8 +1581,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 4,
                 .mem_write_cycles   = 4,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 3
             },
             {
@@ -1598,8 +1598,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 6,
                 .mem_write_cycles   = 6,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 4
             },
             {
@@ -1615,8 +1615,8 @@ const cpu_family_t cpu_families[] = {
                 .cpu_flags          = 0,
                 .mem_read_cycles    = 7,
                 .mem_write_cycles   = 7,
-                .cache_read_cycles  = 3,
-                .cache_write_cycles = 3,
+                .cache_read_cycles  = 2,
+                .cache_write_cycles = 2,
                 .atclk_div          = 5
             },
             { .name = "", 0 }