From 952ddfc63fbfc363a3d986d5b6c3dc072692af17 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 19:36:18 +0100 Subject: [PATCH 01/28] Fixed a mistake in vid_t1000.c. --- src/video/vid_t1000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_t1000.c b/src/video/vid_t1000.c index 39aeb16f4..2f75c22ed 100644 --- a/src/video/vid_t1000.c +++ b/src/video/vid_t1000.c @@ -499,7 +499,7 @@ static void t1000_poll(void *p) ysize = T1000_YSIZE; if (xsize < 64) xsize = 656; if (ysize < 32) ysize = 200; - updatewindowsize(xsize, ysize); + set_screen_size(xsize, ysize); } video_blit_memtoscreen(0, 0, 0, ysize, xsize, ysize); From b7120def92a92c131e5e7c56ff366b3200674238 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 20:03:33 +0100 Subject: [PATCH 02/28] Added the GW-286CT GEAR, Samsung SPC-4216P, and KMX-C-02 (SCAT machines). --- src/machine/m_at_scat.c | 1255 +++++++++++++++++------------------ src/machine/machine.h | 3 +- src/machine/machine_table.c | 5 +- src/rom.c | 22 +- src/rom.h | 5 +- 5 files changed, 651 insertions(+), 639 deletions(-) diff --git a/src/machine/m_at_scat.c b/src/machine/m_at_scat.c index bf8bfdb51..37c4b2080 100644 --- a/src/machine/m_at_scat.c +++ b/src/machine/m_at_scat.c @@ -10,7 +10,7 @@ * * Re-worked version based on the 82C235 datasheet and errata. * - * Version: @(#)m_at_scat.c 1.0.9 2018/01/28 + * Version: @(#)m_at_scat.c 1.0.10 2018/03/02 * * Authors: Original by GreatPsycho for PCem. * Fred N. van Kempen, @@ -29,710 +29,685 @@ #include "../floppy/fdc.h" #include "../io.h" #include "../mem.h" +#include "../nmi.h" #include "machine.h" -#define SCAT_DEBUG 1 +#define SCAT_DMA_WAIT_STATE_CONTROL 0x01 +#define SCAT_VERSION 0x40 +#define SCAT_CLOCK_CONTROL 0x41 +#define SCAT_PERIPHERAL_CONTROL 0x44 +#define SCAT_MISCELLANEOUS_STATUS 0x45 +#define SCAT_POWER_MANAGEMENT 0x46 +#define SCAT_ROM_ENABLE 0x48 +#define SCAT_RAM_WRITE_PROTECT 0x49 +#define SCAT_SHADOW_RAM_ENABLE_1 0x4A +#define SCAT_SHADOW_RAM_ENABLE_2 0x4B +#define SCAT_SHADOW_RAM_ENABLE_3 0x4C +#define SCAT_DRAM_CONFIGURATION 0x4D +#define SCAT_EXTENDED_BOUNDARY 0x4E +#define SCAT_EMS_CONTROL 0x4F -#define SCAT_DMA_WS_CTL 0x01 -#define SCAT_VERSION 0x40 -#define SCAT_CLOCK_CTL 0x41 -#define SCAT_PERIPH_CTL 0x44 -#define SCAT_MISC_STATUS 0x45 -#define SCAT_POWER_MGMT 0x46 -#define SCAT_ROM_ENABLE 0x48 -#define SCAT_RAM_WR_PROTECT 0x49 -#define SCAT_SHADOW_RAM_EN_1 0x4a -#define SCAT_SHADOW_RAM_EN_2 0x4b -#define SCAT_SHADOW_RAM_EN_3 0x4c -#define SCAT_DRAM_CONFIG 0x4d -#define SCAT_EXT_BOUNDARY 0x4e -#define SCAT_EMS_CTL 0x4f -#define SCAT_SYS_CTL 0x7f /* port 92 */ +#define SCATSX_LAPTOP_FEATURES 0x60 +#define SCATSX_FAST_VIDEO_CONTROL 0x61 +#define SCATSX_FAST_VIDEORAM_ENABLE 0x62 +#define SCATSX_HIGH_PERFORMANCE_REFRESH 0x63 +#define SCATSX_CAS_TIMING_FOR_DMA 0x64 - -typedef struct { - uint8_t regs_2x8; - uint8_t regs_2x9; -} ems_t; - - -static uint8_t scat_regs[128]; -static int scat_index; -static uint32_t scat_xms_bound; -static uint8_t scat_ems_reg = 0; -static ems_t scat_ems[32]; /* EMS page regs */ -static mem_mapping_t scat_mapping[32]; /* EMS pages */ -static mem_mapping_t scat_top_mapping[24]; /* top 384K mapping */ -static mem_mapping_t scat_A000_mapping; /* A000-C000 mapping */ -static mem_mapping_t scat_shadowram_mapping[6]; /* BIOS shadowing */ -static mem_mapping_t scat_high_mapping[16]; /* >1M mapping */ - - -static void -shadow_state_update(void) +typedef struct scat_t { - int i, val; + uint8_t regs_2x8; + uint8_t regs_2x9; +} scat_t; - /* TODO - ROMCS enable features should be implemented later. */ - for (i=0; i<24; i++) { - val = ((scat_regs[SCAT_SHADOW_RAM_EN_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTERNAL; - if (i < 8) { - val |= ((scat_regs[SCAT_SHADOW_RAM_EN_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTERNAL; - } else { - if ((scat_regs[SCAT_RAM_WR_PROTECT] >> ((i - 8) >> 1)) & 1) - val |= MEM_WRITE_DISABLED; - else - val |= ((scat_regs[SCAT_SHADOW_RAM_EN_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTERNAL; - } - mem_set_mem_state((i + 40) << 14, 0x4000, val); - } - flushmmucache(); +static uint8_t scat_regs[256]; +static int scat_index; +static uint8_t scat_port_92 = 0; +static uint8_t scat_ems_reg_2xA = 0; +static mem_mapping_t scat_mapping[32]; +static mem_mapping_t scat_high_mapping[16]; +static scat_t scat_stat[32]; +static uint32_t scat_xms_bound; +static mem_mapping_t scat_shadowram_mapping[6]; +static mem_mapping_t scat_4000_9FFF_mapping[24]; +static mem_mapping_t scat_A000_BFFF_mapping; + +// TODO - 82C836 chipset's memory address mapping isn't fully implemented yet, so memory configuration is hardcoded now. +static int scatsx_mem_conf_val[33] = { 0x00, 0x01, 0x03, 0x04, 0x05, 0x08, 0x06, 0x06, + 0x0c, 0x09, 0x07, 0x07, 0x0d, 0x0a, 0x0f, 0x0f, + 0x0e, 0x0e, 0x10, 0x10, 0x13, 0x13, 0x11, 0x11, + 0x14, 0x14, 0x12, 0x12, 0x15, 0x15, 0x15, 0x15, + 0x16 }; + +uint8_t scat_read(uint16_t port, void *priv); +void scat_write(uint16_t port, uint8_t val, void *priv); + +void scat_shadow_state_update() +{ + int i, val; + + // TODO - ROMCS enable features should be implemented later. + for (i = 0; i < 24; i++) + { + val = ((scat_regs[SCAT_SHADOW_RAM_ENABLE_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTERNAL; + if (i < 8) + { + val |= ((scat_regs[SCAT_SHADOW_RAM_ENABLE_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTERNAL; + } + else + { + if ((scat_regs[SCAT_RAM_WRITE_PROTECT] >> ((i - 8) >> 1)) & 1) + { + val |= MEM_WRITE_DISABLED; + } + else + { + val |= ((scat_regs[SCAT_SHADOW_RAM_ENABLE_1 + (i >> 3)] >> (i & 7)) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTERNAL; + } + } + mem_set_mem_state((i + 40) << 14, 0x4000, val); + } + + flushmmucache(); } - -static void -set_xms_bound(uint8_t val) +void scat_set_xms_bound(uint8_t val) { - uint32_t max_xms, max_mem; - int i; + uint32_t max_xms_size = (mem_size >= 16128) ? (((scat_regs[SCAT_VERSION] & 0xF0) != 0 && ((val & 0x10) != 0)) ? 0xFE0000 : 0xFC0000) : mem_size << 10; + int i; - max_mem = (mem_size << 10); - max_xms = (mem_size >= 16384) ? 0xFC0000 : max_mem; - pclog("SCAT: set_xms_bound(%02x): max_mem=%d, max_xms=%d\n", - val, max_mem, max_xms); + switch (val & 0x0F) + { + case 1: + scat_xms_bound = 0x100000; + break; + case 2: + scat_xms_bound = 0x140000; + break; + case 3: + scat_xms_bound = 0x180000; + break; + case 4: + scat_xms_bound = 0x200000; + break; + case 5: + scat_xms_bound = 0x300000; + break; + case 6: + scat_xms_bound = 0x400000; + break; + case 7: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0x600000 : 0x500000; + break; + case 8: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0x800000 : 0x700000; + break; + case 9: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0xA00000 : 0x800000; + break; + case 10: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0xC00000 : 0x900000; + break; + case 11: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0xE00000 : 0xA00000; + break; + case 12: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? max_xms_size : 0xB00000; + break; + case 13: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? max_xms_size : 0xC00000; + break; + case 14: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? max_xms_size : 0xD00000; + break; + case 15: + scat_xms_bound = (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? max_xms_size : 0xF00000; + break; + default: + scat_xms_bound = max_xms_size; + break; + } - switch (val & 0x0f) { - case 1: - scat_xms_bound = 0x100000; - break; + if ((((scat_regs[SCAT_VERSION] & 0xF0) == 0) && (val & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3) || (((scat_regs[SCAT_VERSION] & 0xF0) != 0) && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x1F) == 3)) + { + if (val != 1) + { + if(mem_size > 1024) mem_mapping_disable(&ram_high_mapping); + for(i=0;i<6;i++) + mem_mapping_enable(&scat_shadowram_mapping[i]); + if ((val & 0x0F) == 0) + scat_xms_bound = 0x160000; + } + else + { + for(i=0;i<6;i++) + mem_mapping_disable(&scat_shadowram_mapping[i]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); + } + pclog("Set XMS bound(%02X) = %06X(%dKbytes for EMS access)\n", val, scat_xms_bound, (0x160000 - scat_xms_bound) >> 10); + if (scat_xms_bound > 0x100000) + mem_set_mem_state(0x100000, scat_xms_bound - 0x100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (scat_xms_bound < 0x160000) + mem_set_mem_state(scat_xms_bound, 0x160000 - scat_xms_bound, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + } + else + { + for(i=0;i<6;i++) + mem_mapping_disable(&scat_shadowram_mapping[i]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); - case 2: - scat_xms_bound = 0x140000; - break; - - case 3: - scat_xms_bound = 0x180000; - break; - - case 4: - scat_xms_bound = 0x200000; - break; - - case 5: - scat_xms_bound = 0x300000; - break; - - case 6: - scat_xms_bound = 0x400000; - break; - - case 7: - scat_xms_bound = 0x600000; - break; - - case 8: - scat_xms_bound = 0x800000; - break; - - case 9: - scat_xms_bound = 0xA00000; - break; - - case 10: - scat_xms_bound = 0xC00000; - break; - - case 11: - scat_xms_bound = 0xE00000; - break; - - default: - scat_xms_bound = max_xms; - break; - } - - if ((val & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIG] & 0x0f) == 3) { - if (val != 1) { - if (mem_size > 1024) - mem_mapping_disable(&ram_high_mapping); - for (i=0; i<6; i++) - mem_mapping_enable(&scat_shadowram_mapping[i]); - if ((val & 0x0f) == 0) - scat_xms_bound = 0x160000; - } else { - for (i=0; i<6; i++) - mem_mapping_disable(&scat_shadowram_mapping[i]); - if (mem_size > 1024) - mem_mapping_enable(&ram_high_mapping); - } - pclog("SCAT: set XMS bound(%02X) = %06X (%dK for EMS)\n", - val, scat_xms_bound, (0x160000-scat_xms_bound)>>10); - - if (scat_xms_bound > 0x100000) - mem_set_mem_state(0x100000, - scat_xms_bound - 0x100000, - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if (scat_xms_bound < 0x160000) - mem_set_mem_state(scat_xms_bound, - 0x160000 - scat_xms_bound, - MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - } else { - for (i=0; i<6; i++) - mem_mapping_disable(&scat_shadowram_mapping[i]); - if (mem_size > 1024) - mem_mapping_enable(&ram_high_mapping); - - if (scat_xms_bound > max_xms) - scat_xms_bound = max_xms; - pclog("SCAT: set XMS bound(%02X) = %06X (%dK for EMS)\n", - val, scat_xms_bound, (max_mem-scat_xms_bound)>>10); - - if (scat_xms_bound > 0x100000) - mem_set_mem_state(0x100000, - scat_xms_bound-0x100000, - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if (scat_xms_bound < max_mem) - mem_set_mem_state(scat_xms_bound, - (mem_size<<10)-scat_xms_bound, - MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - } + if (scat_xms_bound > max_xms_size) + scat_xms_bound = max_xms_size; + pclog("Set XMS bound(%02X) = %06X(%dKbytes for EMS access)\n", val, scat_xms_bound, ((mem_size << 10) - scat_xms_bound) >> 10); + if (scat_xms_bound > 0x100000) + mem_set_mem_state(0x100000, scat_xms_bound - 0x100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (scat_xms_bound < (mem_size << 10)) + mem_set_mem_state(scat_xms_bound, (mem_size << 10) - scat_xms_bound, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + } } - -static uint32_t -get_addr(uint32_t addr, ems_t *p) +uint32_t get_scat_addr(uint32_t addr, scat_t *p) { - if (p && (scat_regs[SCAT_EMS_CTL] & 0x80) && (p->regs_2x9 & 0x80)) { - addr = (addr & 0x3fff) | (((p->regs_2x9 & 3)<<8) | p->regs_2x8)<<14; - } + if (p && (scat_regs[SCAT_EMS_CONTROL] & 0x80) && (p->regs_2x9 & 0x80)) + addr = (addr & 0x3fff) | (((p->regs_2x9 & 3) << 8) | p->regs_2x8) << 14; - if (mem_size < 2048 && - ((scat_regs[SCAT_DRAM_CONFIG] & 0x0F) > 7 || - (scat_regs[SCAT_EXT_BOUNDARY] & 0x40) != 0)) - addr = (addr & ~0x780000) | ((addr & 0x600000) >> 2); - else - if ((scat_regs[SCAT_DRAM_CONFIG] & 0x0F) < 8 && - (scat_regs[SCAT_EXT_BOUNDARY] & 0x40) == 0) { - addr &= ~0x600000; - if (mem_size > 2048 || (mem_size == 2048 && - (scat_regs[SCAT_DRAM_CONFIG] & 0x0F) < 6)) - addr |= (addr & 0x180000) << 2; - } + if ((scat_regs[SCAT_VERSION] & 0xF0) == 0) + { + if (mem_size < 2048 && ((scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) > 7 || (scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) != 0)) + addr = (addr & ~0x780000) | ((addr & 0x600000) >> 2); + else if((scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) < 8 && (scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) + { + addr &= ~0x600000; + if(mem_size > 2048 || (mem_size == 2048 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) < 6)) + addr |= (addr & 0x180000) << 2; + } - if ((scat_regs[SCAT_EXT_BOUNDARY] & 0x40) == 0 && - (scat_regs[SCAT_DRAM_CONFIG] & 0x0F) == 3 && - (addr & ~0x600000) >= 0x100000 && (addr & ~0x600000) < 0x160000) - addr ^= mem_size < 2048 ? 0x1F0000 : 0x670000; - - return(addr); + if ((scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && (scat_regs[SCAT_DRAM_CONFIGURATION] & 0x0F) == 3 && (addr & ~0x600000) >= 0x100000 && (addr & ~0x600000) < 0x160000) + addr ^= mem_size < 2048 ? 0x1F0000 : 0x670000; + } + else + { + if ((scat_regs[SCAT_DRAM_CONFIGURATION] & 0x1F) == 3 && (addr & ~0x600000) >= 0x100000 && (addr & ~0x600000) < 0x160000) + addr ^= 0x1F0000; + } + return addr; } - -static void -memmap_state_update(void) +void scat_memmap_state_update() { - uint32_t addr; - int i; + int i; + uint32_t addr; - for (i=16; i<24; i++) { - addr = get_addr(0x40000 + (i<<14), NULL); - mem_mapping_set_exec(&scat_top_mapping[i], - addr < (mem_size<<10) ? ram+addr : NULL); - } + for(i=16;i<24;i++) + { + addr = get_scat_addr(0x40000 + (i << 14), NULL); + mem_mapping_set_exec(&scat_4000_9FFF_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL); + } + addr = get_scat_addr(0xA0000, NULL); + mem_mapping_set_exec(&scat_A000_BFFF_mapping, addr < (mem_size << 10) ? ram + addr : NULL); + for(i=0;i<6;i++) + { + addr = get_scat_addr(0x100000 + (i << 16), NULL); + mem_mapping_set_exec(&scat_shadowram_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL); + } - addr = get_addr(0xA0000, NULL); - mem_mapping_set_exec(&scat_A000_mapping, - addr < (mem_size<<10) ? ram+addr : NULL); - - for (i=0; i<6; i++) { - addr = get_addr(0x100000 + (i<<16), NULL); - mem_mapping_set_exec(&scat_shadowram_mapping[i], - addr < (mem_size<<10) ? ram+addr : NULL); - } - - flushmmucache(); + flushmmucache(); } - -static void -ems_state(int state) +void scat_set_global_EMS_state(int state) { - uint32_t base_addr, virt_addr; - int i; + int i; + uint32_t base_addr, virt_addr; - for (i=0; i<32; i++) { - base_addr = (i + 16) << 14; - - if (i >= 24) - base_addr += 0x30000; - - if (state && (scat_ems[i].regs_2x9 & 0x80)) { - virt_addr = get_addr(base_addr, &scat_ems[i]); - if (i < 24) - mem_mapping_disable(&scat_top_mapping[i]); - mem_mapping_enable(&scat_mapping[i]); - if (virt_addr < (mem_size<<10)) - mem_mapping_set_exec(&scat_mapping[i], ram+virt_addr); - else - mem_mapping_set_exec(&scat_mapping[i], NULL); - } else { - mem_mapping_set_exec(&scat_mapping[i], ram+base_addr); - mem_mapping_disable(&scat_mapping[i]); - if (i < 24) - mem_mapping_enable(&scat_top_mapping[i]); - } - } + for(i=((scat_regs[SCAT_VERSION] & 0xF0) == 0) ? 0 : 24; i<32; i++) + { + base_addr = (i + 16) << 14; + if(i >= 24) + base_addr += 0x30000; + if(state && (scat_stat[i].regs_2x9 & 0x80)) + { + virt_addr = get_scat_addr(base_addr, &scat_stat[i]); + if(i < 24) mem_mapping_disable(&scat_4000_9FFF_mapping[i]); + mem_mapping_enable(&scat_mapping[i]); + if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&scat_mapping[i], ram + virt_addr); + else mem_mapping_set_exec(&scat_mapping[i], NULL); + } + else + { + mem_mapping_set_exec(&scat_mapping[i], ram + base_addr); + mem_mapping_disable(&scat_mapping[i]); + if(i < 24) mem_mapping_enable(&scat_4000_9FFF_mapping[i]); + } + } + flushmmucache(); } - -/* Read a byte from a LIM/EMS page. */ -static uint8_t -ems_pgrd(uint32_t vaddr, void *priv) +void scat_write(uint16_t port, uint8_t val, void *priv) { - ems_t *ems = (ems_t *)priv; - uint32_t addr; - uint8_t val = 0xff; - - addr = get_addr(vaddr, ems); - if (addr < (mem_size << 10)) - val = mem_read_ram(addr, priv); -#if SCAT_DEBUG > 1 - pclog("SCAT: ems_pgrd(%06x->%06x) = %02x\n", vaddr, addr, val); -#endif - - return(val); -} - - -/* Write a byte to a LIM/EMS page. */ -static void -ems_pgwr(uint32_t vaddr, uint8_t val, void *priv) -{ - ems_t *ems = (ems_t *)priv; - uint32_t addr; - - addr = get_addr(vaddr, ems); -#if SCAT_DEBUG > 1 - pclog("SCAT: ems_pgwr(%06x->%06x, %02x)\n", vaddr, addr, val); -#endif - if (addr < (mem_size << 10)) - mem_write_ram(addr, val, priv); -} - - -/* Read from a LIM/EMS control register. */ -static uint8_t -ems_read(uint16_t port, void *priv) -{ - uint8_t val = 0xff; - uint8_t idx; - - switch (port) { - case 0x208: - case 0x218: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - idx = scat_ems_reg & 0x1f; - val = scat_ems[idx].regs_2x8; - } - break; - - case 0x209: - case 0x219: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - idx = scat_ems_reg & 0x1f; - val = scat_ems[idx].regs_2x9; - } - break; - - case 0x20A: - case 0x21A: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - val = scat_ems_reg; - } - break; - } - -#if SCAT_DEBUG > 2 - pclog("SCAT: ems_read(%04x) = %02x\n", port, val); -#endif - return(val); -} - - -/* Write to one of the LIM/EMS control registers. */ -static void -ems_write(uint16_t port, uint8_t val, void *priv) -{ - uint32_t base_addr, virt_addr; - uint8_t idx; + uint8_t scat_reg_valid = 0, scat_shadow_update = 0, scat_map_update = 0, index; + uint32_t base_addr, virt_addr; -#if SCAT_DEBUG > 1 - pclog("SCAT: ems_write(%04x, %02x)\n", port, val); -#endif - switch(port) { - case 0x208: - case 0x218: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - idx = scat_ems_reg & 0x1f; - scat_ems[idx].regs_2x8 = val; - base_addr = (idx + 16) << 14; - if (idx >= 24) - base_addr += 0x30000; + switch (port) + { + case 0x22: + scat_index = val; + break; + + case 0x23: + switch (scat_index) + { + case SCAT_DMA_WAIT_STATE_CONTROL: + case SCAT_CLOCK_CONTROL: + case SCAT_PERIPHERAL_CONTROL: + scat_reg_valid = 1; + break; + case SCAT_EMS_CONTROL: + if(val & 0x40) + { + if(val & 1) + { + io_sethandler(0x0218, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + io_removehandler(0x0208, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + } + else + { + io_sethandler(0x0208, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + io_removehandler(0x0218, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + } + } + else + { + io_removehandler(0x0208, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + io_removehandler(0x0218, 0x0003, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + } + scat_set_global_EMS_state(val & 0x80); + scat_reg_valid = 1; + break; + case SCAT_POWER_MANAGEMENT: + // TODO - Only use AUX parity disable bit for this version. Other bits should be implemented later. + val &= (scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0x40 : 0x60; + scat_reg_valid = 1; + break; + case SCAT_DRAM_CONFIGURATION: + if((((scat_regs[SCAT_VERSION] & 0xF0) == 0) && (scat_regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) || ((scat_regs[SCAT_VERSION] & 0xF0) != 0)) + { + if((((scat_regs[SCAT_VERSION] & 0xF0) == 0) && (val & 0x0F) == 3) || (((scat_regs[SCAT_VERSION] & 0xF0) != 0) && (val & 0x1F) == 3)) + { + if(mem_size > 1024) mem_mapping_disable(&ram_high_mapping); + for(index=0;index<6;index++) + mem_mapping_enable(&scat_shadowram_mapping[index]); + } + else + { + for(index=0;index<6;index++) + mem_mapping_disable(&scat_shadowram_mapping[index]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); + } + } + else + { + for(index=0;index<6;index++) + mem_mapping_disable(&scat_shadowram_mapping[index]); + if(mem_size > 1024) mem_mapping_enable(&ram_high_mapping); + } + scat_map_update = 1; - if ((scat_regs[SCAT_EMS_CTL] & 0x80) && (scat_ems[idx].regs_2x9 & 0x80)) { - virt_addr = get_addr(base_addr, &scat_ems[idx]); - if (virt_addr < (mem_size << 10)) - mem_mapping_set_exec(&scat_mapping[idx], ram + virt_addr); - else - mem_mapping_set_exec(&scat_mapping[idx], NULL); - flushmmucache(); - } - } - break; + if((scat_regs[SCAT_VERSION] & 0xF0) == 0) + { + cpu_waitstates = (val & 0x70) == 0 ? 1 : 2; + cpu_update_waitstates(); + } + else + { + if(mem_size != 1024 || ((val & 0x1F) != 2 && (val & 0x1F) != 3)) + val = (val & 0xe0) | scatsx_mem_conf_val[mem_size >> 9]; + } - case 0x209: - case 0x219: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - idx = scat_ems_reg & 0x1f; - scat_ems[idx].regs_2x9 = val; - base_addr = (idx + 16) << 14; - if (idx >= 24) - base_addr += 0x30000; + scat_reg_valid = 1; + break; + case SCAT_EXTENDED_BOUNDARY: + scat_set_xms_bound(val & ((scat_regs[SCAT_VERSION] & 0xF0) == 0 ? 0x4f : 0x1f)); + mem_set_mem_state(0x40000, 0x60000, (val & 0x20) ? MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL : MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if((val ^ scat_regs[SCAT_EXTENDED_BOUNDARY]) & 0x40) scat_map_update = 1; + scat_reg_valid = 1; + break; + case SCAT_ROM_ENABLE: + case SCAT_RAM_WRITE_PROTECT: + case SCAT_SHADOW_RAM_ENABLE_1: + case SCAT_SHADOW_RAM_ENABLE_2: + case SCAT_SHADOW_RAM_ENABLE_3: + scat_reg_valid = 1; + scat_shadow_update = 1; + break; + case SCATSX_LAPTOP_FEATURES: + if((scat_regs[SCAT_VERSION] & 0xF0) != 0) + { + val = (val & ~8) | (scat_regs[SCATSX_LAPTOP_FEATURES] & 8); + scat_reg_valid = 1; + } + break; + case SCATSX_FAST_VIDEO_CONTROL: + case SCATSX_FAST_VIDEORAM_ENABLE: + case SCATSX_HIGH_PERFORMANCE_REFRESH: + case SCATSX_CAS_TIMING_FOR_DMA: + if((scat_regs[SCAT_VERSION] & 0xF0) != 0) scat_reg_valid = 1; + break; + default: + break; + } + if (scat_reg_valid) + scat_regs[scat_index] = val; + else pclog("Attemped to write unimplemented SCAT register %02X at %04X:%04X\n", scat_index, val, CS, cpu_state.pc); + if (scat_shadow_update) + scat_shadow_state_update(); + if (scat_map_update) + scat_memmap_state_update(); +// pclog("Write SCAT Register %02X to %02X at %04X:%04X\n", scat_index, val, CS, cpu_state.pc); + break; - if (scat_regs[SCAT_EMS_CTL] & 0x80) { - if (val & 0x80) { - virt_addr = get_addr(base_addr, &scat_ems[idx]); - if (idx < 24) - mem_mapping_disable(&scat_top_mapping[idx]); - if (virt_addr < (mem_size << 10)) - mem_mapping_set_exec(&scat_mapping[idx], ram+virt_addr); - else - mem_mapping_set_exec(&scat_mapping[idx], NULL); - mem_mapping_enable(&scat_mapping[idx]); - } else { - mem_mapping_set_exec(&scat_mapping[idx], ram + base_addr); - mem_mapping_disable(&scat_mapping[idx]); - if (idx < 24) - mem_mapping_enable(&scat_top_mapping[idx]); - } - flushmmucache(); - } + case 0x92: + if ((mem_a20_alt ^ val) & 2) + { + mem_a20_alt = val & 2; + mem_a20_recalc(); + } + if ((~scat_port_92 & val) & 1) + { + softresetx86(); + cpu_set_edx(); + } + scat_port_92 = val; + break; - if (scat_ems_reg & 0x80) { - scat_ems_reg = (scat_ems_reg & 0xe0) | ((scat_ems_reg + 1) & 0x1f); - } - } - break; + case 0x208: + case 0x218: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Write SCAT EMS Control Port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc); + if((scat_regs[SCAT_VERSION] & 0xF0) == 0) index = scat_ems_reg_2xA & 0x1F; + else index = ((scat_ems_reg_2xA & 0x40) >> 4) + (scat_ems_reg_2xA & 0x3) + 24; + scat_stat[index].regs_2x8 = val; + base_addr = (index + 16) << 14; + if(index >= 24) + base_addr += 0x30000; - case 0x20A: - case 0x21A: - if ((scat_regs[SCAT_EMS_CTL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - scat_ems_reg = val; - } - break; - } + if((scat_regs[SCAT_EMS_CONTROL] & 0x80) && (scat_stat[index].regs_2x9 & 0x80)) + { + virt_addr = get_scat_addr(base_addr, &scat_stat[index]); + if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&scat_mapping[index], ram + virt_addr); + else mem_mapping_set_exec(&scat_mapping[index], NULL); + flushmmucache(); + } + } + break; + case 0x209: + case 0x219: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Write SCAT EMS Control Port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc); + if((scat_regs[SCAT_VERSION] & 0xF0) == 0) index = scat_ems_reg_2xA & 0x1F; + else index = ((scat_ems_reg_2xA & 0x40) >> 4) + (scat_ems_reg_2xA & 0x3) + 24; + scat_stat[index].regs_2x9 = val; + base_addr = (index + 16) << 14; + if(index >= 24) + base_addr += 0x30000; + + if (scat_regs[SCAT_EMS_CONTROL] & 0x80) + { + if (val & 0x80) + { + virt_addr = get_scat_addr(base_addr, &scat_stat[index]); + if(index < 24) mem_mapping_disable(&scat_4000_9FFF_mapping[index]); + if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&scat_mapping[index], ram + virt_addr); + else mem_mapping_set_exec(&scat_mapping[index], NULL); + mem_mapping_enable(&scat_mapping[index]); +// pclog("Map page %d(address %05X) to address %06X\n", scat_ems_reg_2xA & 0x1f, base_addr, virt_addr); + } + else + { + mem_mapping_set_exec(&scat_mapping[index], ram + base_addr); + mem_mapping_disable(&scat_mapping[index]); + if(index < 24) mem_mapping_enable(&scat_4000_9FFF_mapping[index]); +// pclog("Unmap page %d(address %06X)\n", scat_ems_reg_2xA & 0x1f, base_addr); + } + flushmmucache(); + } + + if (scat_ems_reg_2xA & 0x80) + { + scat_ems_reg_2xA = (scat_ems_reg_2xA & 0xe0) | ((scat_ems_reg_2xA + 1) & (((scat_regs[SCAT_VERSION] & 0xF0) == 0) ? 0x1f : 3)); + } + } + break; + case 0x20A: + case 0x21A: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Write SCAT EMS Control Port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc); + scat_ems_reg_2xA = ((scat_regs[SCAT_VERSION] & 0xF0) == 0) ? val : val & 0xc3; + } + break; + } } - -static uint8_t -scat_read(uint16_t port, void *priv) +uint8_t scat_read(uint16_t port, void *priv) { - uint8_t val = 0xff; + uint8_t val = 0xff, index; + switch (port) + { + case 0x23: + switch (scat_index) + { + case SCAT_MISCELLANEOUS_STATUS: + val = (scat_regs[scat_index] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5); + break; + case SCAT_DRAM_CONFIGURATION: + if ((scat_regs[SCAT_VERSION] & 0xF0) == 0) val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); + else if(mem_size != 1024) val = (scat_regs[scat_index] & 0xe0) | scatsx_mem_conf_val[mem_size >> 9]; + else val = scat_regs[scat_index]; + break; + default: + val = scat_regs[scat_index]; + break; + } +// pclog("Read SCAT Register %02X at %04X:%04X\n", scat_index, CS, cpu_state.pc); + break; - switch (port) { - case 0x23: - switch (scat_index) { - case SCAT_MISC_STATUS: - val = (scat_regs[scat_index] & 0xbf) | ((mem_a20_key & 2) << 5); - break; + case 0x92: + val = scat_port_92; + break; - case SCAT_DRAM_CONFIG: - val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); - break; - - case SCAT_SYS_CTL: - val = port_92_read(0x0092, priv); - break; - - default: - val = scat_regs[scat_index]; - break; - } - break; - - case 0x92: - val = scat_regs[SCAT_SYS_CTL]; - break; - - } - -#if SCAT_DEBUG > 2 - pclog("SCAT: read(%04x) = %02x\n", port, val); -#endif - return(val); + case 0x208: + case 0x218: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Read SCAT EMS Control Port %04X at %04X:%04X\n", port, CS, cpu_state.pc); + if((scat_regs[SCAT_VERSION] & 0xF0) == 0) index = scat_ems_reg_2xA & 0x1F; + else index = ((scat_ems_reg_2xA & 0x40) >> 4) + (scat_ems_reg_2xA & 0x3) + 24; + val = scat_stat[index].regs_2x8; + } + break; + case 0x209: + case 0x219: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Read SCAT EMS Control Port %04X at %04X:%04X\n", port, CS, cpu_state.pc); + if((scat_regs[SCAT_VERSION] & 0xF0) == 0) index = scat_ems_reg_2xA & 0x1F; + else index = ((scat_ems_reg_2xA & 0x40) >> 4) + (scat_ems_reg_2xA & 0x3) + 24; + val = scat_stat[index].regs_2x9; + } + break; + case 0x20A: + case 0x21A: + if ((scat_regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + { +// pclog("Read SCAT EMS Control Port %04X at %04X:%04X\n", port, CS, cpu_state.pc); + val = scat_ems_reg_2xA; + } + break; + } + return val; } - -/* Write to one of the Internal Control Registers. */ -static void -ics_write(uint8_t idx, uint8_t val) +uint8_t mem_read_scatems(uint32_t addr, void *priv) { - uint8_t reg_valid = 0; - uint8_t shadow_update = 0; - uint8_t map_update = 0; + uint8_t val = 0xff; + scat_t *stat = (scat_t *)priv; -#if SCAT_DEBUG > 1 - pclog("SCAT: icr_write(%02x, %02x)\n", idx, val); -#endif - switch (idx) { - case SCAT_DMA_WS_CTL: - case SCAT_CLOCK_CTL: - case SCAT_PERIPH_CTL: - reg_valid = 1; - break; + addr = get_scat_addr(addr, stat); + if (addr < (mem_size << 10)) + val = mem_read_ram(addr, priv); - case SCAT_EMS_CTL: - if (val & 0x40) { - if (val & 1) { - io_sethandler(0x0218, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - io_removehandler(0x0208, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - } else { - io_sethandler(0x0208, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - io_removehandler(0x0218, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - } - } else { - io_removehandler(0x0208, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - io_removehandler(0x0218, 3, - ems_read, NULL, NULL, - ems_write, NULL, NULL, NULL); - } - ems_state(val & 0x80); - reg_valid = 1; - break; - - case SCAT_POWER_MGMT: - val &= 0x40; - reg_valid = 1; - break; - - case SCAT_DRAM_CONFIG: - if ((scat_regs[SCAT_EXT_BOUNDARY] & 0x40) == 0) { - if ((val & 0x0f) == 3) { - if (mem_size > 1024) - mem_mapping_disable(&ram_high_mapping); - for (idx=0; idx<6; idx++) - mem_mapping_enable(&scat_shadowram_mapping[idx]); - } else { - for (idx=0; idx<6; idx++) - mem_mapping_disable(&scat_shadowram_mapping[idx]); - if (mem_size > 1024) - mem_mapping_enable(&ram_high_mapping); - } - } else { - for (idx=0; idx<6; idx++) - mem_mapping_disable(&scat_shadowram_mapping[idx]); - if (mem_size > 1024) - mem_mapping_enable(&ram_high_mapping); - } - map_update = 1; - - cpu_waitstates = (val & 0x70) == 0 ? 1 : 2; - cpu_update_waitstates(); - - reg_valid = 1; - break; - - case SCAT_EXT_BOUNDARY: - set_xms_bound(val & 0x4f); - mem_set_mem_state(0x40000, 0x60000, - (val & 0x20) ? MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL : MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if ((val ^ scat_regs[SCAT_EXT_BOUNDARY]) & 0x40) - map_update = 1; - reg_valid = 1; - break; - - case SCAT_ROM_ENABLE: - case SCAT_RAM_WR_PROTECT: - case SCAT_SHADOW_RAM_EN_1: - case SCAT_SHADOW_RAM_EN_2: - case SCAT_SHADOW_RAM_EN_3: - reg_valid = 1; - shadow_update = 1; - break; - - case SCAT_SYS_CTL: - port_92_write(0x0092, val, NULL); - break; - - default: - break; - } - - if (reg_valid) - scat_regs[scat_index] = val; -#ifndef RELEASE_BUILD - else - pclog("SCAT: attemped write to register %02X at %04X:%04X\n", - idx, val, CS, cpu_state.pc); -#endif - - if (shadow_update) - shadow_state_update(); - - if (map_update) - memmap_state_update(); + return val; } - -static void -scat_write(uint16_t port, uint8_t val, void *priv) +void mem_write_scatems(uint32_t addr, uint8_t val, void *priv) { -#if SCAT_DEBUG > 2 - pclog("SCAT: write(%04x, %02x)\n", port, val); -#endif - switch (port) { - case 0x22: - scat_index = val; - break; + scat_t *stat = (scat_t *)priv; - case 0x23: - ics_write(scat_index, val); - break; - } + addr = get_scat_addr(addr, stat); + if (addr < (mem_size << 10)) + mem_write_ram(addr, val, priv); } static void scat_init(void) { - int i; + int i; -#if SCAT_DEBUG - pclog("SCAT: initializing..\n"); -#endif - io_sethandler(0x0022, 2, - scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + io_sethandler(0x0022, 2, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); - port_92_reset(); + port_92_reset(); - port_92_add(); + port_92_add(); - for (i=0; i<128; i++) - scat_regs[i] = 0xff; - scat_regs[SCAT_DMA_WS_CTL] = 0x00; - scat_regs[SCAT_VERSION] = 0x04; - scat_regs[SCAT_CLOCK_CTL] = 0x02; - scat_regs[SCAT_PERIPH_CTL] = 0x80; - scat_regs[SCAT_MISC_STATUS] = 0x37; - scat_regs[SCAT_POWER_MGMT] = 0x00; - scat_regs[SCAT_ROM_ENABLE] = 0xC0; - scat_regs[SCAT_RAM_WR_PROTECT] = 0x00; - scat_regs[SCAT_SHADOW_RAM_EN_1] = 0x00; - scat_regs[SCAT_SHADOW_RAM_EN_2] = 0x00; - scat_regs[SCAT_SHADOW_RAM_EN_3] = 0x00; - scat_regs[SCAT_DRAM_CONFIG] = cpu_waitstates == 1 ? 0x00 : 0x10; - scat_regs[SCAT_EXT_BOUNDARY] = 0x00; - scat_regs[SCAT_EMS_CTL] = 0x00; - scat_regs[SCAT_SYS_CTL] = 0x00; + for (i = 0; i < 256; i++) + { + scat_regs[i] = 0xff; + } - /* Limit RAM size to 16MB. */ - mem_mapping_set_addr(&ram_low_mapping, 0x000000, 0x40000); + scat_regs[SCAT_DMA_WAIT_STATE_CONTROL] = 0; + scat_regs[SCAT_VERSION] = 4; + scat_regs[SCAT_CLOCK_CONTROL] = 2; + scat_regs[SCAT_PERIPHERAL_CONTROL] = 0x80; + scat_regs[SCAT_MISCELLANEOUS_STATUS] = 0x37; + scat_regs[SCAT_POWER_MANAGEMENT] = 0; + scat_regs[SCAT_ROM_ENABLE] = 0xC0; + scat_regs[SCAT_RAM_WRITE_PROTECT] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_1] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_2] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_3] = 0; + scat_regs[SCAT_DRAM_CONFIGURATION] = cpu_waitstates == 1 ? 2 : 0x12; + scat_regs[SCAT_EXTENDED_BOUNDARY] = 0; + scat_regs[SCAT_EMS_CONTROL] = 0; + scat_port_92 = 0; - /* - * Configure the DRAM controller. - * - * Since SCAT allows mixing of the various-sized DRAM chips, - * memory configuration is not simple. The SCAT datasheet - * tells us in table 6-6 how to set up the four banks: - * - * MEM SIZE MIX_EN RAMCFG Ext RAM Comments - * 0 K 0 0x00 No RAM installed - * 512 K 0 0x01 0 K - * 640 K 0 0x02 0 K - * 1 M 0 0x03 384K - * 1 M 0 0x04 0 K - * 1.5 M 0 0x05 512K - * 2 M 0 0x06 1 M 4x512K - * 2 M 0 0x08 1 M 1x2M - * 2.5 M 1 0x01 1.5M 2M+512K - * 3 M 1 0x04 2 M 1x2M - * 4 M 0 0x09 3 M 2x2M - * 4.5 M 1 0x02 3.5M 2x2M+512K - * 5 M 1 0x05 4 M 2x2M+2x512K - * 6 M 0 0x0a 5 M 3x2M - * 6.5 M 1 0x03 5.5M 3x2M+512K - * 8 M 0 0x0b 7 M 4x2M - */ - pclog("SCAT: mem_size=%d\n", mem_size); + mem_mapping_set_addr(&ram_low_mapping, 0, 0x40000); - /* Create the 32 EMS page frame mappings for 256-640K. */ - for (i=0; i<24; i++) { - mem_mapping_add(&scat_top_mapping[i], - 0x40000 + (i<<14), 0x4000, - ems_pgrd, NULL, NULL, - ems_pgwr, NULL, NULL, - mem_size > 256+(i<<4) ? ram+0x40000+(i<<14) : NULL, - MEM_MAPPING_INTERNAL, NULL); - mem_mapping_enable(&scat_top_mapping[i]); - } + for (i = 0; i < 24; i++) + { + mem_mapping_add(&scat_4000_9FFF_mapping[i], 0x40000 + (i << 14), 0x4000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, mem_size > 256 + (i << 4) ? ram + 0x40000 + (i << 14) : NULL, MEM_MAPPING_INTERNAL, NULL); + mem_mapping_enable(&scat_4000_9FFF_mapping[i]); + } - /* Re-map the 128K at A0000 (video BIOS) to above 16MB+top. */ - mem_mapping_add(&scat_A000_mapping, - 0xA0000, 0x20000, - ems_pgrd, NULL, NULL, - ems_pgwr, NULL, NULL, - ram+0xA0000, - MEM_MAPPING_INTERNAL, NULL); - mem_mapping_disable(&scat_A000_mapping); + mem_mapping_add(&scat_A000_BFFF_mapping, 0xA0000, 0x20000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, ram + 0xA0000, MEM_MAPPING_INTERNAL, NULL); + mem_mapping_enable(&scat_A000_BFFF_mapping); - /* Create 32 page frames for EMS, each 16K. */ - for (i=0; i<32; i++) { - scat_ems[i].regs_2x8 = 0xff; - scat_ems[i].regs_2x9 = 0x03; - mem_mapping_add(&scat_mapping[i], - (i + (i >= 24 ? 28 : 16)) << 14, 0x04000, - ems_pgrd, NULL, NULL, - ems_pgwr, NULL, NULL, - ram + ((i + (i >= 24 ? 28 : 16)) << 14), - 0, &scat_ems[i]); - mem_mapping_disable(&scat_mapping[i]); - } + for (i = 0; i < 32; i++) + { + scat_stat[i].regs_2x8 = 0xff; + scat_stat[i].regs_2x9 = 0x03; + mem_mapping_add(&scat_mapping[i], (i + (i >= 24 ? 28 : 16)) << 14, 0x04000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, ram + ((i + (i >= 24 ? 28 : 16)) << 14), 0, &scat_stat[i]); + mem_mapping_disable(&scat_mapping[i]); + } - for (i=4; i<10; i++) isram[i] = 0; + for(i=4;i<10;i++) isram[i] = 0; - /* Re-map the BIOS ROM (C0000-FFFFF) area. */ - for (i=12; i<16; i++) { - mem_mapping_add(&scat_high_mapping[i], - (i<<14) + 0xFC0000, 0x04000, - mem_read_bios, mem_read_biosw, mem_read_biosl, - mem_write_null, mem_write_nullw, mem_write_nulll, - rom + ((i << 14) & biosmask), - 0, NULL); - } + /* TODO - Only normal CPU accessing address FF0000 to FFFFFF mapped to ROM. + Normal CPU accessing address FC0000 to FEFFFF map to ROM should be implemented later. */ + for (i = 12; i < 16; i++) + { + mem_mapping_add(&scat_high_mapping[i], (i << 14) + 0xFC0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + ((i << 14) & biosmask), 0, NULL); + } - for (i=0; i<6; i++) { - mem_mapping_add(&scat_shadowram_mapping[i], - 0x100000 + (i<<16), 0x10000, - ems_pgrd, NULL, NULL, - ems_pgwr, NULL, NULL, - mem_size >= 1024 ? ram+get_addr(0x100000+(i<<16), NULL) : NULL, - MEM_MAPPING_INTERNAL, NULL); - } + for(i=0;i<6;i++) + mem_mapping_add(&scat_shadowram_mapping[i], 0x100000 + (i << 16), 0x10000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, mem_size >= 1024 ? ram + get_scat_addr(0x100000 + (i << 16), NULL) : NULL, MEM_MAPPING_INTERNAL, NULL); - set_xms_bound(0); - shadow_state_update(); + scat_set_xms_bound(0); + scat_shadow_state_update(); +} + + +static void +scatsx_init() +{ + int i; + + io_sethandler(0x0022, 0x0002, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + + port_92_reset(); + + port_92_add(); + + for (i = 0; i < 256; i++) + { + scat_regs[i] = 0xff; + } + + scat_regs[SCAT_DMA_WAIT_STATE_CONTROL] = 0; + scat_regs[SCAT_VERSION] = 0x13; + scat_regs[SCAT_CLOCK_CONTROL] = 6; + scat_regs[SCAT_PERIPHERAL_CONTROL] = 0; + scat_regs[SCAT_MISCELLANEOUS_STATUS] = 0x37; + scat_regs[SCAT_POWER_MANAGEMENT] = 0; + scat_regs[SCAT_ROM_ENABLE] = 0xC0; + scat_regs[SCAT_RAM_WRITE_PROTECT] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_1] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_2] = 0; + scat_regs[SCAT_SHADOW_RAM_ENABLE_3] = 0; + scat_regs[SCAT_DRAM_CONFIGURATION] = 1; + scat_regs[SCAT_EXTENDED_BOUNDARY] = 0; + scat_regs[SCAT_EMS_CONTROL] = 0; + scat_regs[SCATSX_LAPTOP_FEATURES] = 0; + scat_regs[SCATSX_FAST_VIDEO_CONTROL] = 0; + scat_regs[SCATSX_FAST_VIDEORAM_ENABLE] = 0; + scat_regs[SCATSX_HIGH_PERFORMANCE_REFRESH] = 8; + scat_regs[SCATSX_CAS_TIMING_FOR_DMA] = 3; + scat_port_92 = 0; + + mem_mapping_set_addr(&ram_low_mapping, 0, 0x80000); + + for (i = 16; i < 24; i++) + { + mem_mapping_add(&scat_4000_9FFF_mapping[i], 0x40000 + (i << 14), 0x4000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, mem_size > 256 + (i << 4) ? ram + 0x40000 + (i << 14) : NULL, MEM_MAPPING_INTERNAL, NULL); + mem_mapping_enable(&scat_4000_9FFF_mapping[i]); + } + + mem_mapping_add(&scat_A000_BFFF_mapping, 0xA0000, 0x20000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, ram + 0xA0000, MEM_MAPPING_INTERNAL, NULL); + mem_mapping_enable(&scat_A000_BFFF_mapping); + + for (i = 24; i < 32; i++) + { + scat_stat[i].regs_2x8 = 0xff; + scat_stat[i].regs_2x9 = 0x03; + mem_mapping_add(&scat_mapping[i], (i + 28) << 14, 0x04000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, ram + ((i + 28) << 14), 0, &scat_stat[i]); + mem_mapping_disable(&scat_mapping[i]); + } + + /* TODO - Only normal CPU accessing address FF0000 to FFFFFF mapped to ROM. + Normal CPU accessing address FC0000 to FEFFFF map to ROM should be implemented later. */ + for (i = 12; i < 16; i++) + { + mem_mapping_add(&scat_high_mapping[i], (i << 14) + 0xFC0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + ((i << 14) & biosmask), 0, NULL); + } + + for(i=0;i<6;i++) + mem_mapping_add(&scat_shadowram_mapping[i], 0x100000 + (i << 16), 0x10000, mem_read_scatems, NULL, NULL, mem_write_scatems, NULL, NULL, mem_size >= 1024 ? ram + get_scat_addr(0x100000 + (i << 16), NULL) : NULL, MEM_MAPPING_INTERNAL, NULL); + + scat_set_xms_bound(0); + scat_shadow_state_update(); } @@ -744,3 +719,13 @@ machine_at_scat_init(machine_t *model) scat_init(); } + + +void +machine_at_scatsx_init(machine_t *model) +{ + machine_at_init(model); + device_add(&fdc_at_device); + + scatsx_init(); +} diff --git a/src/machine/machine.h b/src/machine/machine.h index 68154743b..be4840664 100644 --- a/src/machine/machine.h +++ b/src/machine/machine.h @@ -8,7 +8,7 @@ * * Handling of the emulated machines. * - * Version: @(#)machine.h 1.0.20 2018/03/02 + * Version: @(#)machine.h 1.0.21 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -141,6 +141,7 @@ extern void machine_at_neat_ami_init(machine_t *); extern void machine_at_opti495_init(machine_t *); extern void machine_at_opti495_ami_init(machine_t *); extern void machine_at_scat_init(machine_t *); +extern void machine_at_scatsx_init(machine_t *); extern void machine_at_compaq_init(machine_t *); extern void machine_at_dtk486_init(machine_t *); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 49e5d71bf..c54e3c403 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11,7 +11,7 @@ * NOTES: OpenAT wip for 286-class machine with open BIOS. * PS2_M80-486 wip, pending receipt of TRM's for machine. * - * Version: @(#)machine_table.c 1.0.20 2018/03/02 + * Version: @(#)machine_table.c 1.0.21 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -71,12 +71,14 @@ machine_t machines[] = { #if defined(DEV_BRANCH) && defined(USE_PORTABLE3) { "[286 ISA] Compaq Portable III", ROM_PORTABLEIII, "portableiii", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_VIDEO, 640,16384, 128, 127, machine_at_compaq_init, NULL, nvr_at_close }, #endif + { "[286 ISA] GW-286CT GEAR", ROM_GW286CT, "gw286ct", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_scat_init, NULL, nvr_at_close }, { "[286 ISA] Hyundai Super-286TR", ROM_SUPER286TR, "super286tr", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_scat_init, NULL, nvr_at_close }, { "[286 ISA] IBM AT", ROM_IBMAT, "ibmat", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibm_init, NULL, nvr_at_close }, { "[286 ISA] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 512,16384, 512, 127, machine_ps1_m2011_init, NULL, nvr_at_close }, { "[286 ISA] IBM PS/2 model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL, nvr_at_close }, { "[286 ISA] IBM XT Model 286", ROM_IBMXT286, "ibmxt286", {{"", cpus_ibmxt286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_ibm_init, NULL, nvr_at_close }, { "[286 ISA] Samsung SPC-4200P", ROM_SPC4200P, "spc4200p", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 512, 2048, 128, 127, machine_at_scat_init, NULL, nvr_at_close }, + { "[286 ISA] Samsung SPC-4216P", ROM_SPC4216P, "spc4216p", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 1, 5, 1, 127, machine_at_scat_init, NULL, nvr_at_close }, #ifdef WALTJE { "[286 ISA] OpenAT 286", ROM_OPENAT, "open_at", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512, 4096, 128, 127, machine_at_init, NULL, nvr_at_close }, #endif @@ -90,6 +92,7 @@ machine_t machines[] = { { "[386SX ISA] DTK 386SX clone", ROM_DTK386, "dtk386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_neat_init, NULL, nvr_at_close }, { "[386SX ISA] IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 6, 1, 127, machine_ps1_m2121_init, NULL, nvr_at_close }, { "[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 6, 1, 127, machine_ps1_m2121_init, NULL, nvr_at_close }, + { "[386SX ISA] KMX-C-02", ROM_KMXC02, "kmxc02", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_scatsx_init, NULL, nvr_at_close }, { "[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL, nvr_at_close }, diff --git a/src/rom.c b/src/rom.c index 97bac6f83..d8ade5075 100644 --- a/src/rom.c +++ b/src/rom.c @@ -13,7 +13,7 @@ * - c386sx16 BIOS fails checksum * - the loadfont() calls should be done elsewhere * - * Version: @(#)rom.c 1.0.31 2018/03/02 + * Version: @(#)rom.c 1.0.32 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -607,12 +607,32 @@ rom_load_bios(int rom_id) break; #endif + case ROM_GW286CT: + if (rom_load_linear( + L"roms/machines/gw286ct/2ctc001.bin", + 0x000000, 65536, 0, rom)) return(1); + break; + case ROM_SPC4200P: /* Samsung SPC-4200P */ if (rom_load_linear( L"roms/machines/spc4200p/u8.01", 0x000000, 65536, 0, rom)) return(1); break; + case ROM_SPC4216P: + if (! rom_load_interleaved( + L"roms/machines/spc4216p/7101.u8", + L"roms/machines/spc4216p/ac64.u10", + 0x000000, 65536, 0, rom)) break; + biosmask = 0x7fff; + return(1); + + case ROM_KMXC02: + if (rom_load_linear( + L"roms/machines/kmxc02/3ctm005.bin", + 0x000000, 65536, 0, rom)) return(1); + break; + case ROM_SUPER286TR: /* Hyundai Super-286TR */ if (rom_load_linear( L"roms/machines/super286tr/hyundai_award286.bin", diff --git a/src/rom.h b/src/rom.h index 1be17681c..936576844 100644 --- a/src/rom.h +++ b/src/rom.h @@ -8,7 +8,7 @@ * * Definitions for the ROM image handler. * - * Version: @(#)rom.h 1.0.14 2018/03/02 + * Version: @(#)rom.h 1.0.15 2018/03/02 * * Author: Fred N. van Kempen, * Copyright 2018 Fred N. van Kempen. @@ -76,12 +76,14 @@ enum { #if defined(DEV_BRANCH) && defined(USE_PORTABLE3) ROM_PORTABLEIII, #endif + ROM_GW286CT, ROM_SUPER286TR, /* Hyundai Super-286TR/SCAT/Award */ ROM_IBMAT, ROM_IBMPS1_2011, ROM_IBMPS2_M30_286, ROM_IBMXT286, ROM_SPC4200P, /* Samsung SPC-4200P/SCAT/Phoenix */ + ROM_SPC4216P, /* Samsung SPC-4216P/SCAT */ #ifdef WALTJE ROM_OPENAT, /* PC/AT clone with Open BIOS */ #endif @@ -89,6 +91,7 @@ enum { ROM_IBMPS2_M50, ROM_AMI386SX, + ROM_KMXC02, ROM_MEGAPC, ROM_AWARD386SX_OPTI495, #if defined(DEV_BRANCH) && defined(USE_PORTABLE3) From 99d22c3c03a90f0e9aa433d1e2b89cb2ead6ef1c Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 20:47:18 +0100 Subject: [PATCH 03/28] Added the Xi8088. --- src/cpu/cpu.c | 48 ++++++++++++++++++++----------- src/cpu/cpu.h | 4 ++- src/keyboard_at.c | 22 ++++++++++++++- src/machine/m_at_t3100e.c | 6 ++-- src/machine/m_xt_t1000.c | 7 ++--- src/machine/machine.h | 4 +++ src/machine/machine_table.c | 3 +- src/mem.c | 3 +- src/pc.c | 14 +++++----- src/pit.c | 2 +- src/rom.c | 56 ++++++++++++++++++++++++++++++++++++- src/rom.h | 4 ++- src/win/Makefile.mingw | 4 +-- 13 files changed, 135 insertions(+), 42 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 1b017c411..555b20e37 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -8,7 +8,7 @@ * * CPU type handler. * - * Version: @(#)cpu.c 1.0.11 2018/02/18 + * Version: @(#)cpu.c 1.0.12 2018/03/02 * * Authors: Sarah Walker, * leilei, @@ -97,6 +97,7 @@ enum }; CPU *cpu_s; +int cpu_effective; int cpu_multi; int cpu_iscyrix; int cpu_16bitbus; @@ -181,9 +182,21 @@ int timing_misaligned; msr_t msr; +void cpu_dynamic_switch(int new_cpu) +{ + if (cpu_effective == new_cpu) + return; + + int c = cpu; + cpu = new_cpu; + cpu_set(); + speedchanged(); + cpu = c; +} + void cpu_set_edx() { - EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu].edx_reset; + EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].edx_reset; } @@ -198,7 +211,8 @@ void cpu_set() cpu = 0; } - cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu]; + cpu_effective = cpu; + cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective]; CPUID = cpu_s->cpuid_model; cpuspeed = cpu_s->speed; @@ -1277,7 +1291,7 @@ cpu_current_pc(char *bufp) void cpu_CPUID() { - switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type) + switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type) { case CPU_i486DX: if (!EAX) @@ -1708,7 +1722,7 @@ void cpu_CPUID() void cpu_RDMSR() { - switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type) + switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type) { case CPU_WINCHIP: EAX = EDX = 0; @@ -1936,7 +1950,7 @@ i686_invalid_rdmsr: void cpu_WRMSR() { - switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type) + switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type) { case CPU_WINCHIP: switch (ECX) @@ -1959,7 +1973,7 @@ void cpu_WRMSR() if (EAX & (1 << 29)) CPUID = 0; else - CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model; + CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpuid_model; break; case 0x108: msr.fcr2 = EAX | ((uint64_t)EDX << 32); @@ -2027,7 +2041,7 @@ void cpu_WRMSR() tsc = EAX | ((uint64_t)EDX << 32); break; case 0x17: - if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr; + if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr; ecx17_msr = EAX | ((uint64_t)EDX << 32); break; case 0x1B: @@ -2055,15 +2069,15 @@ void cpu_WRMSR() ecx11e_msr = EAX | ((uint64_t)EDX << 32); break; case 0x174: - if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; + if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; cs_msr = EAX & 0xFFFF; break; case 0x175: - if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; + if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; esp_msr = EAX; break; case 0x176: - if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; + if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr; eip_msr = EAX; break; case 0x186: @@ -2141,10 +2155,10 @@ void cyrix_write(uint16_t addr, uint8_t val, void *priv) if ((ccr3 & 0xf0) == 0x10) { ccr4 = val; - if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type >= CPU_Cx6x86) + if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type >= CPU_Cx6x86) { if (val & 0x80) - CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model; + CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpuid_model; else CPUID = 0; } @@ -2174,11 +2188,11 @@ uint8_t cyrix_read(uint16_t addr, void *priv) case 0xe8: return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff; case 0xe9: return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff; case 0xea: return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff; - case 0xfe: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id & 0xff; - case 0xff: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id >> 8; + case 0xfe: return machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cyrix_id & 0xff; + case 0xff: return machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cyrix_id >> 8; } if ((cyrix_addr & 0xf0) == 0xc0) return 0xff; - if (cyrix_addr == 0x20 && machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_Cx5x86) return 0xff; + if (cyrix_addr == 0x20 && machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_Cx5x86) return 0xff; } return 0xff; } @@ -2201,7 +2215,7 @@ void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f) void cpu_update_waitstates() { - cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu]; + cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective]; cpu_prefetch_width = cpu_16bitbus ? 2 : 4; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 5c383b013..d07ed7d05 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -8,7 +8,7 @@ * * CPU type handler. * - * Version: @(#)cpu.h 1.0.7 2018/02/18 + * Version: @(#)cpu.h 1.0.8 2018/03/02 * * Authors: Sarah Walker, * leilei, @@ -462,5 +462,7 @@ extern void x86ts(char *s, uint16_t error); extern void x87_dumpregs(void); extern void x87_reset(void); +extern int cpu_effective; + #endif /*EMU_CPU_H*/ diff --git a/src/keyboard_at.c b/src/keyboard_at.c index c789f409b..f2fe83b7f 100644 --- a/src/keyboard_at.c +++ b/src/keyboard_at.c @@ -8,7 +8,7 @@ * * Intel 8042 (AT keyboard controller) emulation. * - * Version: @(#)keyboard_at.c 1.0.26 2018/02/24 + * Version: @(#)keyboard_at.c 1.0.27 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -36,6 +36,7 @@ #include "device.h" #include "timer.h" #include "machine/machine.h" +#include "machine/m_xt_xi8088.h" #include "machine/m_at_t3100e.h" #include "floppy/fdd.h" #include "floppy/fdc.h" @@ -1428,6 +1429,9 @@ kbd_write(uint16_t port, uint8_t val, void *priv) int bad = 1; uint8_t mask; + if (romset == ROM_XI8088 && port == 0x63) + port = 0x61; + switch (port) { case 0x60: if (kbd->want60) { @@ -1656,6 +1660,13 @@ kbd_write(uint16_t port, uint8_t val, void *priv) if (speaker_enable) was_speaker_enable = 1; pit_set_gate(&pit, 2, val & 1); + + if (romset == ROM_XI8088) { + if (val & 0x04) + xi8088_turbo_set(1); + else + xi8088_turbo_set(0); + } break; case 0x64: @@ -1782,6 +1793,9 @@ kbd_read(uint16_t port, void *priv) atkbd_t *kbd = (atkbd_t *)priv; uint8_t ret = 0xff; + if (romset == ROM_XI8088 && port == 0x63) + port = 0x61; + switch (port) { case 0x60: ret = kbd->out; @@ -1800,6 +1814,12 @@ kbd_read(uint16_t port, void *priv) else ret &= ~0x10; } + if (romset == ROM_XI8088){ + if (xi8088_turbo_get()) + ret |= 0x04; + else + ret &= ~0x04; + } break; case 0x64: diff --git a/src/machine/m_at_t3100e.c b/src/machine/m_at_t3100e.c index 7327cd23d..ca350dfd9 100644 --- a/src/machine/m_at_t3100e.c +++ b/src/machine/m_at_t3100e.c @@ -385,13 +385,11 @@ void t3100e_turbo_set(uint8_t value) if (!value) { int c = cpu; - cpu = 0; /* 286/6 */ - cpu_set(); - cpu = c; + cpu_dynamic_switch(0); /* 286/6 */ } else { - cpu_set(); + cpu_dynamic_switch(cpu); } } diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index f6d6e846c..61301dc70 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -401,14 +401,11 @@ static void t1200_turbo_set(uint8_t value) t1000.turbo = value; if (!value) { - int c = cpu; - cpu = 0; /* 8088/4.77MHz */ - cpu_set(); - cpu = c; + cpu_dynamic_switch(0); } else { - cpu_set(); + cpu_dynamic_switch(cpu); } } diff --git a/src/machine/machine.h b/src/machine/machine.h index be4840664..d7fcbcce8 100644 --- a/src/machine/machine.h +++ b/src/machine/machine.h @@ -190,7 +190,11 @@ extern void machine_xt_laserxt_init(machine_t *); extern void machine_xt_t1000_init(machine_t *); extern void machine_xt_t1200_init(machine_t *); +extern void machine_xt_xi8088_init(machine_t *); + #ifdef EMU_DEVICE_H +extern device_t *xi8088_get_device(void); + extern device_t *pcjr_get_device(void); extern device_t *tandy1k_get_device(void); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index c54e3c403..8a78890da 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11,7 +11,7 @@ * NOTES: OpenAT wip for 286-class machine with open BIOS. * PS2_M80-486 wip, pending receipt of TRM's for machine. * - * Version: @(#)machine_table.c 1.0.21 2018/03/02 + * Version: @(#)machine_table.c 1.0.22 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -51,6 +51,7 @@ machine_t machines[] = { #if defined(DEV_BRANCH) && defined(USE_LASERXT) { "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL, NULL }, #endif + { "[8088] Xi8088", ROM_XI8088, "xi8088", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, xi8088_get_device, nvr_at_close }, { "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL, nvr_at_close }, { "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL, nvr_at_close }, diff --git a/src/mem.c b/src/mem.c index b213d9e88..7c40b6b0a 100644 --- a/src/mem.c +++ b/src/mem.c @@ -11,6 +11,7 @@ #include "cpu/x86_ops.h" #include "cpu/x86.h" #include "machine/machine.h" +#include "machine/m_xt_xi8088.h" #include "config.h" #include "io.h" #include "mem.h" @@ -1278,7 +1279,7 @@ void mem_set_mem_state(uint32_t base, uint32_t size, int state) void mem_add_bios() { - if (AT) + if (AT || (romset == ROM_XI8088 && xi8088_bios_128kb())) { mem_mapping_add(&bios_mapping[0], 0xe0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom, MEM_MAPPING_EXTERNAL, 0); mem_mapping_add(&bios_mapping[1], 0xe4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x4000 & biosmask), MEM_MAPPING_EXTERNAL, 0); diff --git a/src/pc.c b/src/pc.c index 8b5813a06..aee2d5b47 100644 --- a/src/pc.c +++ b/src/pc.c @@ -8,7 +8,7 @@ * * Main emulator module where most things are controlled. * - * Version: @(#)pc.c 1.0.60 2018/02/24 + * Version: @(#)pc.c 1.0.61 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -495,7 +495,7 @@ pc_full_speed(void) if (! atfullspeed) { pclog("Set fullspeed - %i %i %i\n", is386, AT, cpuspeed2); if (AT) - setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed); + setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed); else setpitclock(14318184.0); } @@ -509,7 +509,7 @@ void pc_speed_changed(void) { if (AT) - setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed); + setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed); else setpitclock(14318184.0); @@ -886,7 +886,7 @@ pc_reset_hard_init(void) cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; if (AT) - setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed); + setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed); else setpitclock(14318184.0); } @@ -1019,7 +1019,7 @@ pc_thread(void *param) /* Run a block of code. */ startblit(); - clockrate = machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed; + clockrate = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed; if (is386) { #ifdef USE_DYNAREC @@ -1093,8 +1093,8 @@ pc_thread(void *param) if (title_update) { mbstowcs(wmachine, machine_getname(), strlen(machine_getname())+1); - mbstowcs(wcpu, machines[machine].cpu[cpu_manufacturer].cpus[cpu].name, - strlen(machines[machine].cpu[cpu_manufacturer].cpus[cpu].name)+1); + mbstowcs(wcpu, machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].name, + strlen(machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].name)+1); swprintf(temp, sizeof_w(temp), L"%ls v%ls - %i%% - %ls - %ls - %ls", EMU_NAME_W,EMU_VERSION_W,fps,wmachine,wcpu, diff --git a/src/pit.c b/src/pit.c index 220aece1f..c7dbdc365 100644 --- a/src/pit.c +++ b/src/pit.c @@ -51,7 +51,7 @@ void setpitclock(float clock) bus_timing = clock/(double)cpu_busspeed; video_update_timing(); - xt_cpu_multi = (int64_t)((14318184.0*(double)(1 << TIMER_SHIFT)) / (double)machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed); + xt_cpu_multi = (int64_t)((14318184.0*(double)(1 << TIMER_SHIFT)) / (double)machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].rspeed); RTCCONST=clock/32768.0; TIMER_USEC = (int64_t)((clock / 1000000.0f) * (float)(1 << TIMER_SHIFT)); device_speed_changed(); diff --git a/src/rom.c b/src/rom.c index d8ade5075..363bfbc37 100644 --- a/src/rom.c +++ b/src/rom.c @@ -13,7 +13,7 @@ * - c386sx16 BIOS fails checksum * - the loadfont() calls should be done elsewhere * - * Version: @(#)rom.c 1.0.32 2018/03/02 + * Version: @(#)rom.c 1.0.33 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -35,6 +35,7 @@ #include "rom.h" #include "video/video.h" /* for loadfont() */ #include "plat.h" +#include "machine/m_xt_xi8088.h" int romspresent[ROM_MAX]; @@ -158,6 +159,42 @@ rom_load_linear(wchar_t *fn, uint32_t addr, int sz, int off, uint8_t *ptr) } +/* Load a ROM BIOS from its chips, linear mode with high bit flipped. */ +int +rom_load_linear_inverted(wchar_t *fn, uint32_t addr, int sz, int off, uint8_t *ptr) +{ + FILE *f = rom_fopen(fn, L"rb"); + + if (f == NULL) { + pclog("ROM: image '%ls' not found\n", fn); + return(0); + } + + /* Make sure we only look at the base-256K offset. */ + if (addr >= 0x40000) + { + addr = 0; + } + else + { + addr &= 0x03ffff; + } + + (void)fseek(f, 0, SEEK_END); + if (ftell(f) < sz) { + (void)fclose(f); + return(0); + } + + (void)fseek(f, off, SEEK_SET); + (void)fread(ptr+addr+0x10000, sz >> 1, 1, f); + (void)fread(ptr+addr, sz >> 1, 1, f); + (void)fclose(f); + + return(1); +} + + /* Load a ROM BIOS from its chips, interleaved mode. */ int rom_load_interleaved(wchar_t *fnl, wchar_t *fnh, uint32_t addr, int sz, int off, uint8_t *ptr) @@ -314,6 +351,23 @@ rom_load_bios(int rom_id) 0x008000, 32768, 0, rom)) return(1); break; + case ROM_XI8088: + if (rom_load_linear_inverted( + L"roms/machines/xi8088/bios-xi8088.bin", + 0x000000, 131072, 128, rom)) { + biosmask = 0x1ffff; + xi8088_bios_128kb_set(1); + return(1); + } else { + if (rom_load_linear( + L"roms/machines/xi8088/bios-xi8088.bin", + 0x000000, 65536, 128, rom)) { + xi8088_bios_128kb_set(0); + return(1); + } + } + break; + case ROM_IBMXT286: /* IBM PX-XT 286 */ if (rom_load_interleaved( L"roms/machines/ibmxt286/bios_5162_21apr86_u34_78x7460_27256.bin", diff --git a/src/rom.h b/src/rom.h index 936576844..d1fcfe4ee 100644 --- a/src/rom.h +++ b/src/rom.h @@ -8,7 +8,7 @@ * * Definitions for the ROM image handler. * - * Version: @(#)rom.h 1.0.15 2018/03/02 + * Version: @(#)rom.h 1.0.16 2018/03/02 * * Author: Fred N. van Kempen, * Copyright 2018 Fred N. van Kempen. @@ -55,6 +55,8 @@ enum { ROM_T1000, ROM_T1200, + ROM_XI8088, + ROM_IBMPCJR, ROM_TANDY, ROM_TANDY1000HX, diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 07a08fc50..5a5ae9284 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.105 2018/03/02 +# Version: @(#)Makefile.mingw 1.0.106 2018/03/02 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -395,7 +395,7 @@ CPUOBJ := cpu.o cpu_table.o \ MCHOBJ := machine.o machine_table.o \ m_xt.o m_xt_compaq.o \ - m_xt_t1000.o \ + m_xt_t1000.o m_xt_xi8088.o \ m_pcjr.o \ m_amstrad.o \ m_europc.o m_europc_hdc.o \ From f8f6b3a12b29099f5eedae34a0333cadcd76e339 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 20:49:04 +0100 Subject: [PATCH 04/28] Committed machine/m_xt_xi8088.c/h that I forgot before. --- src/machine/m_xt_xi8088.c | 135 ++++++++++++++++++++++++++++++++++++++ src/machine/m_xt_xi8088.h | 8 +++ 2 files changed, 143 insertions(+) create mode 100644 src/machine/m_xt_xi8088.c create mode 100644 src/machine/m_xt_xi8088.h diff --git a/src/machine/m_xt_xi8088.c b/src/machine/m_xt_xi8088.c new file mode 100644 index 000000000..966d4fdd5 --- /dev/null +++ b/src/machine/m_xt_xi8088.c @@ -0,0 +1,135 @@ +#include +#include +#include +#include +#include "../86box.h" +#include "../pic.h" +#include "../pit.h" +#include "../dma.h" +#include "../mem.h" +#include "../device.h" +#include "../floppy/fdd.h" +#include "../floppy/fdc.h" +#include "../nmi.h" +#include "../nvr.h" +#include "../game/gameport.h" +#include "../keyboard.h" +#include "../lpt.h" +#include "../disk/hdc.h" +#include "machine.h" +#include "../cpu/cpu.h" + +#include "m_xt_xi8088.h" + +typedef struct xi8088_t +{ + uint8_t turbo; + + int turbo_setting; + int bios_128kb; +} xi8088_t; + +static xi8088_t xi8088; + +uint8_t xi8088_turbo_get() +{ + return xi8088.turbo; +} + +void xi8088_turbo_set(uint8_t value) +{ + if (!xi8088.turbo_setting) + return; + + xi8088.turbo = value; + if (!value) + { + pclog("Xi8088 turbo off\n"); + int c = cpu; + cpu = 0; /* 8088/4.77 */ + cpu_set(); + cpu = c; + } + else + { + pclog("Xi8088 turbo on\n"); + cpu_set(); + } +} + +void xi8088_bios_128kb_set(int val) +{ + xi8088.bios_128kb = val; +} + +int xi8088_bios_128kb() +{ + return xi8088.bios_128kb; +} + +static void *xi8088_init() +{ + /* even though the bios by default turns the turbo off when controlling by hotkeys, pcem always starts at full speed */ + xi8088.turbo = 1; + xi8088.turbo_setting = device_get_config_int("turbo_setting"); + + return &xi8088; +} + +static device_config_t xi8088_config[] = +{ + { + .name = "turbo_setting", + .description = "Turbo", + .type = CONFIG_SELECTION, + .selection = + { + { + .description = "Always at selected speed", + .value = 0 + }, + { + .description = "Hotkeys (starts off)", + .value = 1 + } + }, + .default_int = 0 + }, + { + .type = -1 + } +}; + + +device_t xi8088_device = +{ + "Xi8088", + 0, + 0, + xi8088_init, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + xi8088_config +}; + +device_t * +xi8088_get_device(void) +{ + return &xi8088_device; +} + +void machine_xt_xi8088_init(machine_t *model) +{ + /* TODO: set UMBs? See if PCem always sets when we have > 640KB ram and avoids conflicts when a peripheral uses the same memory space */ + machine_common_init(model); + device_add(&fdc_xt_device); + device_add(&keyboard_ps2_device); + nmi_init(); + nvr_at_init(8); + pic2_init(); + device_add(&gameport_device); +} diff --git a/src/machine/m_xt_xi8088.h b/src/machine/m_xt_xi8088.h new file mode 100644 index 000000000..1c33c6532 --- /dev/null +++ b/src/machine/m_xt_xi8088.h @@ -0,0 +1,8 @@ +#include "../device.h" + +extern device_t xi8088_device; + +uint8_t xi8088_turbo_get(); +void xi8088_turbo_set(uint8_t value); +void xi8088_bios_128kb_set(int val); +int xi8088_bios_128kb(); From 142a75cebbfa6b5c798318f0c12eadedda501abc Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 20:53:33 +0100 Subject: [PATCH 05/28] Fixed a mistake in cpu.c. --- src/cpu/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 555b20e37..6708f1766 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -8,7 +8,7 @@ * * CPU type handler. * - * Version: @(#)cpu.c 1.0.12 2018/03/02 + * Version: @(#)cpu.c 1.0.13 2018/03/02 * * Authors: Sarah Walker, * leilei, @@ -190,7 +190,7 @@ void cpu_dynamic_switch(int new_cpu) int c = cpu; cpu = new_cpu; cpu_set(); - speedchanged(); + pc_speed_changed(); cpu = c; } From 33bc831f19ea700d1773a560bde8fa0444e8407f Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 21:48:45 +0100 Subject: [PATCH 06/28] The OTI-067 now uses the OTI-077 BIOS. --- src/video/vid_oak_oti.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index 32a0a78a3..d35145f33 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -8,7 +8,7 @@ * * Oak OTI037C/67/077 emulation. * - * Version: @(#)vid_oak_oti.c 1.0.5 2018/02/24 + * Version: @(#)vid_oak_oti.c 1.0.6 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -31,7 +31,6 @@ #include "vid_svga.h" #define BIOS_37C_PATH L"roms/video/oti/oti037c/bios.bin" -#define BIOS_67_PATH L"roms/video/oti/bios.bin" #define BIOS_77_PATH L"roms/video/oti/oti077.vbi" @@ -233,9 +232,6 @@ oti_init(device_t *info) break; case 2: - romfn = BIOS_67_PATH; - break; - case 5: romfn = BIOS_77_PATH; break; From cb79f53c54f970dc4dca52df1a85ac399c4c8118 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 21:57:37 +0100 Subject: [PATCH 07/28] Fixed several things, including built-in video on the Toshiba T1000 and T1200. --- src/disk/hdc_ide.c | 60 ++++++++----------------------------- src/machine/m_at_t3100e.c | 1 - src/machine/m_xt_t1000.c | 4 +++ src/machine/machine_table.c | 6 ++-- src/video/vid_oak_oti.c | 18 ++++------- src/video/video.c | 7 ++++- 6 files changed, 32 insertions(+), 64 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 0e2b8d09c..77ec2d8ad 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -1140,7 +1140,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val) { cdrom[atapi_cdrom_drives[ide->channel]].error = 0; } - if ((val >= WIN_SEEK) && (val <= 0x7F)) + if (((val >= WIN_RESTORE) && (val <= 0x1F)) || ((val >= WIN_SEEK) && (val <= 0x7F))) { if (ide_drive_is_zip(ide)) { @@ -1152,18 +1152,18 @@ void writeide(int ide_board, uint16_t addr, uint8_t val) } else { - ide->atastat = READY_STAT; + ide->atastat = BUSY_STAT; } timer_process(); if (ide_drive_is_zip(ide)) { - zip[atapi_zip_drives[ide->channel]].callback = 100LL*IDE_TIME; + zip[atapi_zip_drives[ide->channel]].callback = 40000LL * TIMER_USEC /*100LL*IDE_TIME*/; } if (ide_drive_is_cdrom(ide)) { - cdrom[atapi_cdrom_drives[ide->channel]].callback = 100LL*IDE_TIME; + cdrom[atapi_cdrom_drives[ide->channel]].callback = 40000LL * TIMER_USEC /*100LL*IDE_TIME*/; } - idecallback[ide_board]=100LL*IDE_TIME; + idecallback[ide_board]=40000LL * TIMER_USEC /*100LL*IDE_TIME*/; timer_update_outstanding(); return; } @@ -1195,32 +1195,6 @@ void writeide(int ide_board, uint16_t addr, uint8_t val) timer_update_outstanding(); return; - case WIN_RESTORE: - if (ide_drive_is_zip(ide)) - { - zip[atapi_zip_drives[ide->channel]].status = READY_STAT; - } - else if (ide_drive_is_cdrom(ide)) - { - cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT; - } - else - { - ide->atastat = READY_STAT; - } - timer_process(); - if (ide_drive_is_zip(ide)) - { - zip[atapi_zip_drives[ide->channel]].callback = 100LL*IDE_TIME; - } - if (ide_drive_is_cdrom(ide)) - { - cdrom[atapi_cdrom_drives[ide->channel]].callback = 100LL*IDE_TIME; - } - idecallback[ide_board]=100LL*IDE_TIME; - timer_update_outstanding(); - return; - case WIN_READ_MULTIPLE: /* Fatal removed in accordance with the official ATAPI reference: If the Read Multiple command is attempted before the Set Multiple Mode @@ -1917,24 +1891,21 @@ void callbackide(int ide_board) zip_id = atapi_zip_drives[cur_ide[ide_board]]; zip_id_other = atapi_zip_drives[cur_ide[ide_board] ^ 1]; - if ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F)) + if (((ide->command >= WIN_RESTORE) && (ide->command <= 0x1F)) || ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F))) { if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide)) { goto abort_cmd; } - if (ide_drive_is_zip(ide)) + if ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F)) { - zip[zip_id].status = READY_STAT | DSC_STAT; - } - else if (ide_drive_is_cdrom(ide)) - { - cdrom[cdrom_id].status = READY_STAT | DSC_STAT; - } - else - { - ide->atastat = READY_STAT | DSC_STAT; + full_size /= ide->t_hpc; + full_size /= ide->t_spt; + + if ((ide->cylinder >= full_size) || (ide->head >= ide->t_hpc) || !ide->sector || (ide->sector > ide->t_spt)) + goto id_not_found; } + ide->atastat = READY_STAT | DSC_STAT; ide_irq_raise(ide); return; } @@ -1969,11 +1940,6 @@ void callbackide(int ide_board) } return; - case WIN_RESTORE: - if (ide_drive_is_zip(ide) || ide_drive_is_cdrom(ide)) - { - goto abort_cmd; - } case WIN_NOP: case WIN_STANDBYNOW1: case WIN_IDLENOW1: diff --git a/src/machine/m_at_t3100e.c b/src/machine/m_at_t3100e.c index ca350dfd9..3b9e2933e 100644 --- a/src/machine/m_at_t3100e.c +++ b/src/machine/m_at_t3100e.c @@ -384,7 +384,6 @@ void t3100e_turbo_set(uint8_t value) t3100e_ems.turbo = value; if (!value) { - int c = cpu; cpu_dynamic_switch(0); /* 286/6 */ } else diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index 61301dc70..0301fcedb 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -622,6 +622,8 @@ void machine_xt_t1000_init(machine_t *model) nmi_init(); nvr_tc8521_init(); /* No gameport, and no provision to fit one device_add(&gameport_device); */ + + device_add(&t1000_device); } @@ -668,4 +670,6 @@ void machine_xt_t1200_init(machine_t *model) nmi_init(); nvr_tc8521_init(); /* No gameport, and no provision to fit one device_add(&gameport_device); */ + + device_add(&t1200_device); } diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 8a78890da..bdf5f38b2 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11,7 +11,7 @@ * NOTES: OpenAT wip for 286-class machine with open BIOS. * PS2_M80-486 wip, pending receipt of TRM's for machine. * - * Version: @(#)machine_table.c 1.0.22 2018/03/02 + * Version: @(#)machine_table.c 1.0.23 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -47,7 +47,7 @@ machine_t machines[] = { { "[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens",cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 0, machine_europc_init, NULL, NULL }, { "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device, NULL }, { "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device, NULL }, - { "[8088] Toshiba 1000", ROM_T1000, "t1000", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 1280, 768, 0, machine_xt_t1000_init, t1000_get_device, NULL }, + { "[8088] Toshiba 1000", ROM_T1000, "t1000", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 512, 1280, 768, 0, machine_xt_t1000_init, t1000_get_device, NULL }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) { "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL, NULL }, #endif @@ -60,7 +60,7 @@ machine_t machines[] = { { "[8086] Amstrad PC20(0)", ROM_PC200, "pc200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL, nvr_at_close }, { "[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL, NULL }, { "[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1k_init, NULL, NULL }, - { "[8086] Toshiba 1200", ROM_T1200, "t1200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 1024, 2048,1024, 0, machine_xt_t1200_init, t1200_get_device, NULL }, + { "[8086] Toshiba 1200", ROM_T1200, "t1200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 1024, 2048,1024, 0, machine_xt_t1200_init, t1200_get_device, NULL }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) { "[8086] VTech Laser XT3", ROM_LXT3, "lxt3", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 256, 512, 256, 0, machine_xt_laserxt_init, NULL, NULL }, #endif diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index d35145f33..b7c7425a2 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -8,7 +8,7 @@ * * Oak OTI037C/67/077 emulation. * - * Version: @(#)vid_oak_oti.c 1.0.6 2018/03/02 + * Version: @(#)vid_oak_oti.c 1.0.7 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -301,10 +301,11 @@ oti037c_available(void) return(rom_present(BIOS_37C_PATH)); } + static int -oti067_available(void) +oti067_077_available(void) { - return(rom_present(BIOS_67_PATH)); + return(rom_present(BIOS_77_PATH)); } @@ -330,13 +331,6 @@ static device_config_t oti067_config[] = }; -static int -oti077_available(void) -{ - return(rom_present(BIOS_77_PATH)); -} - - static device_config_t oti077_config[] = { { @@ -380,7 +374,7 @@ device_t oti067_device = DEVICE_ISA, 2, oti_init, oti_close, NULL, - oti067_available, + oti067_077_available, oti_speed_changed, oti_force_redraw, oti_add_status_info, @@ -393,7 +387,7 @@ device_t oti077_device = DEVICE_ISA, 5, oti_init, oti_close, NULL, - oti077_available, + oti067_077_available, oti_speed_changed, oti_force_redraw, oti_add_status_info, diff --git a/src/video/video.c b/src/video/video.c index 5b46a4c72..19a3a7efc 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -40,7 +40,7 @@ * W = 3 bus clocks * L = 4 bus clocks * - * Version: @(#)video.c 1.0.17 2018/03/02 + * Version: @(#)video.c 1.0.18 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -346,6 +346,7 @@ static video_timings_t timing_pc1512 = {VIDEO_BUS, 0,0,0, 0,0,0}; /*PC1512 vid static video_timings_t timing_pc1640 = {VIDEO_ISA, 8,16,32, 8,16,32}; static video_timings_t timing_pc200 = {VIDEO_ISA, 8,16,32, 8,16,32}; static video_timings_t timing_m24 = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_t1000 = {VIDEO_ISA, 8,16,32, 8,16,32}; static video_timings_t timing_pvga1a = {VIDEO_ISA, 6, 8,16, 6, 8,16}; static video_timings_t timing_wd90c11 = {VIDEO_ISA, 3, 3, 6, 5, 5,10}; static video_timings_t timing_vga = {VIDEO_ISA, 8,16,32, 8,16,32}; @@ -385,6 +386,10 @@ video_update_timing(void) case ROM_PC3086: timing = &timing_pvga1a; break; + case ROM_T1000: + case ROM_T1200: + timing = &timing_t1000; + break; case ROM_MEGAPC: case ROM_MEGAPCDX: timing = &timing_wd90c11; From 8e5151d652da2c52356f847802a0345c7c5200a0 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 2 Mar 2018 21:58:42 +0100 Subject: [PATCH 08/28] Fixed some whoopsies. --- src/cpu/cpu.h | 3 ++- src/disk/hdc_ide.c | 6 +++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index d07ed7d05..38f18242c 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -8,7 +8,7 @@ * * CPU type handler. * - * Version: @(#)cpu.h 1.0.8 2018/03/02 + * Version: @(#)cpu.h 1.0.9 2018/03/02 * * Authors: Sarah Walker, * leilei, @@ -463,6 +463,7 @@ extern void x87_dumpregs(void); extern void x87_reset(void); extern int cpu_effective; +extern void cpu_dynamic_switch(int new_cpu); #endif /*EMU_CPU_H*/ diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 77ec2d8ad..5408cbfb2 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -9,7 +9,7 @@ * Implementation of the IDE emulation for hard disks and ATAPI * CD-ROM devices. * - * Version: @(#)hdc_ide.c 1.0.29 2018/02/27 + * Version: @(#)hdc_ide.c 1.0.30 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -1157,11 +1157,11 @@ void writeide(int ide_board, uint16_t addr, uint8_t val) timer_process(); if (ide_drive_is_zip(ide)) { - zip[atapi_zip_drives[ide->channel]].callback = 40000LL * TIMER_USEC /*100LL*IDE_TIME*/; + zip[atapi_zip_drives[ide->channel]].callback = 100LL*IDE_TIME; } if (ide_drive_is_cdrom(ide)) { - cdrom[atapi_cdrom_drives[ide->channel]].callback = 40000LL * TIMER_USEC /*100LL*IDE_TIME*/; + cdrom[atapi_cdrom_drives[ide->channel]].callback = 100LL*IDE_TIME; } idecallback[ide_board]=40000LL * TIMER_USEC /*100LL*IDE_TIME*/; timer_update_outstanding(); From a7515042c4a35b23f62e949ca0f082339a3cafcb Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 3 Mar 2018 00:02:21 +0100 Subject: [PATCH 09/28] Fixed the Toshiba T1000, T1200, and Xi8088; If device initialization files and the device has a name, the name of the device is logged; Fixed path of the OTI-037c BIOS; The ATI Mach64GX ISA is now AT-compatible only; The CL-GD 5428 and 5429 ISA are now available on XT machines. --- src/device.c | 10 +++++++--- src/machine/m_xt_xi8088.c | 3 ++- src/machine/machine_table.c | 2 +- src/rom.c | 20 +++++++++++--------- src/video/vid_ati_mach64.c | 4 ++-- src/video/vid_cl54xx.c | 6 +++--- src/video/vid_oak_oti.c | 4 ++-- 7 files changed, 28 insertions(+), 21 deletions(-) diff --git a/src/device.c b/src/device.c index c258369b4..0e057cd53 100644 --- a/src/device.c +++ b/src/device.c @@ -9,7 +9,7 @@ * Implementation of the generic device interface to handle * all devices attached to the emulator. * - * Version: @(#)device.c 1.0.8 2018/02/18 + * Version: @(#)device.c 1.0.9 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -64,8 +64,12 @@ device_add(device_t *d) if (d->init != NULL) { priv = d->init(d); - if (priv == NULL) - fatal("device_add: device init failed\n"); + if (priv == NULL) { + if (d->name) + fatal("device_add: device init failed (%s)\n", d->name); + else + fatal("device_add: device init failed\n"); + } } devices[c] = d; diff --git a/src/machine/m_xt_xi8088.c b/src/machine/m_xt_xi8088.c index 966d4fdd5..bf06bb572 100644 --- a/src/machine/m_xt_xi8088.c +++ b/src/machine/m_xt_xi8088.c @@ -131,5 +131,6 @@ void machine_xt_xi8088_init(machine_t *model) nmi_init(); nvr_at_init(8); pic2_init(); - device_add(&gameport_device); + if (joystick_type != 7) + device_add(&gameport_device); } diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index bdf5f38b2..2248db772 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -51,7 +51,7 @@ machine_t machines[] = { #if defined(DEV_BRANCH) && defined(USE_LASERXT) { "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL, NULL }, #endif - { "[8088] Xi8088", ROM_XI8088, "xi8088", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, xi8088_get_device, nvr_at_close }, + { "[8088] Xi8088", ROM_XI8088, "xi8088", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, xi8088_get_device, nvr_at_close }, { "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL, nvr_at_close }, { "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL, nvr_at_close }, diff --git a/src/rom.c b/src/rom.c index 363bfbc37..3deb35c6a 100644 --- a/src/rom.c +++ b/src/rom.c @@ -13,7 +13,7 @@ * - c386sx16 BIOS fails checksum * - the loadfont() calls should be done elsewhere * - * Version: @(#)rom.c 1.0.33 2018/03/02 + * Version: @(#)rom.c 1.0.34 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -354,14 +354,14 @@ rom_load_bios(int rom_id) case ROM_XI8088: if (rom_load_linear_inverted( L"roms/machines/xi8088/bios-xi8088.bin", - 0x000000, 131072, 128, rom)) { + 0x000000, 131072, 0, rom)) { biosmask = 0x1ffff; xi8088_bios_128kb_set(1); return(1); } else { if (rom_load_linear( L"roms/machines/xi8088/bios-xi8088.bin", - 0x000000, 65536, 128, rom)) { + 0x000000, 65536, 0, rom)) { xi8088_bios_128kb_set(0); return(1); } @@ -904,19 +904,21 @@ rom_load_bios(int rom_id) case ROM_T1000: loadfont(L"roms/machines/t1000/t1000font.bin", 2); - if (rom_load_linear( + if (!rom_load_linear( L"roms/machines/t1000/t1000.rom", - 0x000000, 32768, 0, rom)) return(1); + 0x000000, 32768, 0, rom)) break; memcpy(rom + 0x8000, rom, 0x8000); - break; + biosmask = 0x7fff; + return(1); case ROM_T1200: loadfont(L"roms/machines/t1200/t1000font.bin", 2); - if (rom_load_linear( + if (!rom_load_linear( L"roms/machines/t1200/t1200_019e.ic15.bin", - 0x000000, 32768, 0, rom)) return(1); + 0x000000, 32768, 0, rom)) break; memcpy(rom + 0x8000, rom, 0x8000); - break; + biosmask = 0x7fff; + return(1); case ROM_T3100E: loadfont(L"roms/machines/t3100e/t3100e_font.bin", 5); diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 2a01b8016..9c431a7fd 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -8,7 +8,7 @@ * * ATi Mach64 graphics card emulation. * - * Version: @(#)vid_ati_mach64.c 1.0.12 2018/01/31 + * Version: @(#)vid_ati_mach64.c 1.0.13 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -3600,7 +3600,7 @@ static device_config_t mach64vt2_config[] = device_t mach64gx_isa_device = { "ATI Mach64GX ISA", - DEVICE_ISA, + DEVICE_AT | DEVICE_ISA, 0, mach64gx_init, mach64_close, NULL, mach64gx_isa_available, diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 5d8694ba2..ca48ed4ef 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -9,7 +9,7 @@ * Emulation of select Cirrus Logic cards (CL-GD 5428, * CL-GD 5429, 5430, 5434 and 5436 are supported). * - * Version: @(#)vid_cl_54xx.c 1.0.8 2018/03/01 + * Version: @(#)vid_cl_54xx.c 1.0.9 2018/03/02 * * Authors: Sarah Walker, * Barry Rodewald, @@ -2488,7 +2488,7 @@ static device_config_t gd5434_config[] = device_t gd5428_isa_device = { "Cirrus Logic CL-GD 5428 (ISA)", - DEVICE_AT | DEVICE_ISA, + DEVICE_ISA, CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, @@ -2518,7 +2518,7 @@ device_t gd5428_vlb_device = device_t gd5429_isa_device = { "Cirrus Logic CL-GD 5429 (ISA)", - DEVICE_AT | DEVICE_ISA, + DEVICE_ISA, CIRRUS_ID_CLGD5429, gd54xx_init, gd54xx_close, diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index b7c7425a2..027e93b95 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -8,7 +8,7 @@ * * Oak OTI037C/67/077 emulation. * - * Version: @(#)vid_oak_oti.c 1.0.7 2018/03/02 + * Version: @(#)vid_oak_oti.c 1.0.8 2018/03/02 * * Authors: Sarah Walker, * Miran Grca, @@ -30,7 +30,7 @@ #include "vid_oak_oti.h" #include "vid_svga.h" -#define BIOS_37C_PATH L"roms/video/oti/oti037c/bios.bin" +#define BIOS_37C_PATH L"roms/video/oti/bios.bin" #define BIOS_77_PATH L"roms/video/oti/oti077.vbi" From 41646999b47134b9c7f5faa8ab7231e1d95c2e54 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 3 Mar 2018 00:46:10 +0100 Subject: [PATCH 10/28] Fixed SPC4216-P; The CL-GD 5428 and 5429 are no longer available on XT machines; ATI Korean VGA is now actually on the video cards list. --- src/rom.c | 10 +-- src/video/vid_cl54xx.c | 6 +- src/video/vid_table.c | 155 +++++++++++++++++++++-------------------- 3 files changed, 87 insertions(+), 84 deletions(-) diff --git a/src/rom.c b/src/rom.c index 3deb35c6a..425930e97 100644 --- a/src/rom.c +++ b/src/rom.c @@ -674,12 +674,14 @@ rom_load_bios(int rom_id) break; case ROM_SPC4216P: - if (! rom_load_interleaved( + if (rom_load_linear( + L"roms/machines/spc4216p/phoenix.bin", + 0x000000, 65536, 0, rom)) return(1); + if (rom_load_interleaved( L"roms/machines/spc4216p/7101.u8", L"roms/machines/spc4216p/ac64.u10", - 0x000000, 65536, 0, rom)) break; - biosmask = 0x7fff; - return(1); + 0x000000, 65536, 0, rom)) return(1); + break; case ROM_KMXC02: if (rom_load_linear( diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index ca48ed4ef..7d355c197 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -9,7 +9,7 @@ * Emulation of select Cirrus Logic cards (CL-GD 5428, * CL-GD 5429, 5430, 5434 and 5436 are supported). * - * Version: @(#)vid_cl_54xx.c 1.0.9 2018/03/02 + * Version: @(#)vid_cl_54xx.c 1.0.10 2018/03/02 * * Authors: Sarah Walker, * Barry Rodewald, @@ -2488,7 +2488,7 @@ static device_config_t gd5434_config[] = device_t gd5428_isa_device = { "Cirrus Logic CL-GD 5428 (ISA)", - DEVICE_ISA, + DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, @@ -2518,7 +2518,7 @@ device_t gd5428_vlb_device = device_t gd5429_isa_device = { "Cirrus Logic CL-GD 5429 (ISA)", - DEVICE_ISA, + DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5429, gd54xx_init, gd54xx_close, diff --git a/src/video/vid_table.c b/src/video/vid_table.c index e18cd41c0..367eabbc4 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -8,7 +8,7 @@ * * Define all known video cards. * - * Version: @(#)vid_table.c 1.0.22 2018/02/25 + * Version: @(#)vid_table.c 1.0.23 2018/03/03 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -85,92 +85,93 @@ typedef struct { static VIDEO_CARD video_cards[] = { - { "None", "none", NULL, GFX_NONE }, - { "Internal", "internal", NULL, GFX_INTERNAL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, - { "[ISA] ATI VGA-88 (ATI-18800-1)", "ati18800v", &ati18800_vga88_device, GFX_VGA88, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, - { "[ISA] ATI VGA Edge-16 (ATI-18800-5)", "ati18800", &ati18800_device, GFX_VGAEDGE16, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] ATI VGA Wonder (ATI-18800)", "ati18800w", &ati18800_wonder_device, GFX_VGAWONDER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"None", "none", NULL, GFX_NONE }, + {"Internal", "internal", NULL, GFX_INTERNAL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] ATI Korean VGA (ATI-28800-5)", "ati28800k", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] ATI VGA-88 (ATI-18800-1)", "ati18800v", &ati18800_vga88_device, GFX_VGA88, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] ATI VGA Edge-16 (ATI-18800-5)", "ati18800", &ati18800_device, GFX_VGAEDGE16, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] ATI VGA Wonder (ATI-18800)", "ati18800w", &ati18800_wonder_device, GFX_VGAWONDER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, #if defined(DEV_BRANCH) && defined(USE_XL24) - { "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", &ati28800_wonderxl24_device,GFX_VGAWONDERXL24, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", &ati28800_wonderxl24_device, GFX_VGAWONDERXL24, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, #endif - { "[ISA] CGA", "cga", &cga_device, GFX_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Chips & Technologies SuperEGA", "superega", &sega_device, GFX_SUPER_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Cirrus Logic CL-GD 5428", "cl_gd5428_isa", &gd5428_isa_device, GFX_CL_GD5428_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, - { "[ISA] Cirrus Logic CL-GD 5429", "cl_gd5429_isa", &gd5429_isa_device, GFX_CL_GD5429_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, - { "[ISA] Cirrus Logic CL-GD 5434", "cl_gd5434_isa", &gd5434_isa_device, GFX_CL_GD5434_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, - { "[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)","compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, - { "[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] EGA", "ega", &ega_device, GFX_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] MDA", "mda", &mda_device, GFX_MDA, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - { "[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - {"[ISA] OAK OTI-037C", "oti037c", &oti037c_device, GFX_OTI037C, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, - {"[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, - {"[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, - {"[ISA] Paradise PVGA1A", "pvga1a", ¶dise_pvga1a_device, GFX_PVGA1A, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - {"[ISA] Paradise WD90C11-LR", "wd90c11", ¶dise_wd90c11_device, GFX_WD90C11, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - {"[ISA] Paradise WD90C30-LR", "wd90c30", ¶dise_wd90c30_device, GFX_WD90C30, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, - {"[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] CGA", "cga", &cga_device, GFX_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Chips & Technologies SuperEGA", "superega", &sega_device, GFX_SUPER_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Cirrus Logic CL-GD 5428", "cl_gd5428_isa", &gd5428_isa_device, GFX_CL_GD5428_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, + {"[ISA] Cirrus Logic CL-GD 5429", "cl_gd5429_isa", &gd5429_isa_device, GFX_CL_GD5429_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, + {"[ISA] Cirrus Logic CL-GD 5434", "cl_gd5434_isa", &gd5434_isa_device, GFX_CL_GD5434_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, + {"[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)", "compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] EGA", "ega", &ega_device, GFX_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] MDA", "mda", &mda_device, GFX_MDA, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] OAK OTI-037C", "oti037c", &oti037c_device, GFX_OTI037C, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, + {"[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, + {"[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, + {"[ISA] Paradise PVGA1A", "pvga1a", ¶dise_pvga1a_device, GFX_PVGA1A, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Paradise WD90C11-LR", "wd90c11", ¶dise_wd90c11_device, GFX_WD90C11, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Paradise WD90C30-LR", "wd90c30", ¶dise_wd90c30_device, GFX_WD90C30, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, + {"[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, #if defined(DEV_BRANCH) && defined(USE_TI) - {"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, #endif - {"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, - {"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, - {"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, - {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, - {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, - {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device,GFX_ET4000W32_CARDEX_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, - {"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, - {"[PCI] Cirrus Logic CL-GD 5434", "cl_gd5434_pci", &gd5434_pci_device, GFX_CL_GD5434_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, - {"[PCI] Cirrus Logic CL-GD 5436", "cl_gd5436_pci", &gd5436_pci_device, GFX_CL_GD5436_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, + {"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, + {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, + {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, + {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, + {"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[PCI] Cirrus Logic CL-GD 5434", "cl_gd5434_pci", &gd5434_pci_device, GFX_CL_GD5434_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[PCI] Cirrus Logic CL-GD 5436", "cl_gd5436_pci", &gd5436_pci_device, GFX_CL_GD5436_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, #if defined(DEV_BRANCH) && defined(USE_STEALTH32) - {"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, + {"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, #endif - {"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci",&s3_virge_pci_device, GFX_VIRGE_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci",&s3_virge_988_pci_device, GFX_VIRGEVX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, - {"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device,GFX_STEALTH64_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, + {"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci",&s3_virge_pci_device, GFX_VIRGE_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci",&s3_virge_988_pci_device, GFX_VIRGEVX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, + {"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device, GFX_STEALTH64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, #if defined(DEV_BRANCH) && defined(USE_RIVA) - {"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, - {"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, - {"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, + {"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, + {"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, + {"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, #endif - {"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, - {"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device,GFX_PHOENIX_VISION864_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, - {"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device,GFX_PHOENIX_TRIO32_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device,GFX_PHOENIX_TRIO64_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci",&s3_virge_375_4_pci_device,GFX_VIRGEDX4_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, - {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, - {"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device,GFX_ET4000W32_CARDEX_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, - {"[VLB] Cirrus Logic CL-GD 5429", "cl_gd5429_vlb", &gd5429_vlb_device, GFX_CL_GD5429_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, - {"[VLB] Cirrus Logic CL-GD 5434", "cl_gd5434_vlb", &gd5434_vlb_device, GFX_CL_GD5434_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, + {"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device, GFX_PHOENIX_VISION864_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, + {"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device, GFX_PHOENIX_TRIO32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device, GFX_PHOENIX_TRIO64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci",&s3_virge_375_4_pci_device, GFX_VIRGEDX4_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, + {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, + {"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device, GFX_ET4000W32_CARDEX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, + {"[VLB] Cirrus Logic CL-GD 5429", "cl_gd5429_vlb", &gd5429_vlb_device, GFX_CL_GD5429_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[VLB] Cirrus Logic CL-GD 5434", "cl_gd5434_vlb", &gd5434_vlb_device, GFX_CL_GD5434_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, #if defined(DEV_BRANCH) && defined(USE_STEALTH32) - {"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, + {"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, #endif - {"[VLB] Diamond SpeedStar PRO (CL-GD5428)", "cl_gd5428_vlb", &gd5428_vlb_device, GFX_CL_GD5428_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, - {"[VLB] Diamond SpeedStar PRO SE (CL-GD5430)", "cl_gd5430_vlb", &gd5430_vlb_device, GFX_CL_GD5430_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, - {"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb",&s3_virge_vlb_device, GFX_VIRGE_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb",&s3_virge_988_vlb_device, GFX_VIRGEVX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, - {"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device,GFX_STEALTH64_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, - {"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, - {"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device,GFX_PHOENIX_VISION864_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, - {"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device,GFX_PHOENIX_TRIO32_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device,GFX_PHOENIX_TRIO64_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, - {"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb",&s3_virge_375_4_vlb_device,GFX_VIRGEDX4_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, - {"[VLB] Trident TGUI9400CXi", "tgui9400cxi_vlb", &tgui9400cxi_device, GFX_TGUI9400CXI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, - {"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, - {"", "", NULL, -1 } + {"[VLB] Diamond SpeedStar PRO (CL-GD5428)", "cl_gd5428_vlb", &gd5428_vlb_device, GFX_CL_GD5428_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[VLB] Diamond SpeedStar PRO SE (CL-GD5430)", "cl_gd5430_vlb", &gd5430_vlb_device, GFX_CL_GD5430_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, + {"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb",&s3_virge_vlb_device, GFX_VIRGE_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb",&s3_virge_988_vlb_device, GFX_VIRGEVX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, + {"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device, GFX_STEALTH64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, + {"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, + {"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device, GFX_PHOENIX_VISION864_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, + {"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device, GFX_PHOENIX_TRIO32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device, GFX_PHOENIX_TRIO64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, + {"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb",&s3_virge_375_4_vlb_device, GFX_VIRGEDX4_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, + {"[VLB] Trident TGUI9400CXi", "tgui9400cxi_vlb", &tgui9400cxi_device, GFX_TGUI9400CXI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, + {"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, + {"", "", NULL, -1 } }; From bf46638e34655c3ccdb43a11aab741f3488e7800 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 3 Mar 2018 00:53:04 +0100 Subject: [PATCH 11/28] Fixed the video table entry for ATI Korean VGA. --- src/video/vid_table.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 367eabbc4..49594dcf5 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -8,7 +8,7 @@ * * Define all known video cards. * - * Version: @(#)vid_table.c 1.0.23 2018/03/03 + * Version: @(#)vid_table.c 1.0.24 2018/03/03 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -88,7 +88,7 @@ video_cards[] = { {"None", "none", NULL, GFX_NONE }, {"Internal", "internal", NULL, GFX_INTERNAL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, - {"[ISA] ATI Korean VGA (ATI-28800-5)", "ati28800k", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, + {"[ISA] ATI Korean VGA (ATI-28800-5)", "ati28800k", &ati28800k_device, GFX_ATIKOREANVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, {"[ISA] ATI VGA-88 (ATI-18800-1)", "ati18800v", &ati18800_vga88_device, GFX_VGA88, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, {"[ISA] ATI VGA Edge-16 (ATI-18800-5)", "ati18800", &ati18800_device, GFX_VGAEDGE16, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, From 077953412b5c648072f441faa56425b23fda49b0 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 5 Mar 2018 13:32:21 +0100 Subject: [PATCH 12/28] Added latest patches from Greatpsycho and correct memory detection based on ATI register B0. --- src/video/vid_ati28800.c | 52 ++++++++++++++++++++++++++++------------ src/video/vid_svga.c | 19 +++++++++++---- 2 files changed, 52 insertions(+), 19 deletions(-) diff --git a/src/video/vid_ati28800.c b/src/video/vid_ati28800.c index 729e7ea6e..cc6be6487 100644 --- a/src/video/vid_ati28800.c +++ b/src/video/vid_ati28800.c @@ -6,9 +6,9 @@ * * This file is part of the 86Box distribution. * - * ATI 28800 emulation (VGA Charger) + * ATI 28800 emulation (VGA Charger and Korean VGA) * - * Version: @(#)vid_ati28800.c 1.0.8 2018/03/02 + * Version: @(#)vid_ati28800.c 1.0.9 2018/03/05 * * Authors: Sarah Walker, * Miran Grca, @@ -58,6 +58,8 @@ typedef struct ati28800_t uint8_t regs[256]; int index; + + uint32_t memory; } ati28800_t; @@ -68,7 +70,6 @@ int get_korean_font_enabled; int get_korean_font_index; uint16_t get_korean_font_base; extern int dbcs_mode_enabled; - static void ati28800_out(uint16_t addr, uint8_t val, void *p) @@ -88,6 +89,7 @@ static void ati28800_out(uint16_t addr, uint8_t val, void *p) ati28800->index = val; break; case 0x1cf: + old=ati28800->regs[ati28800->index]; ati28800->regs[ati28800->index] = val; switch (ati28800->index) { @@ -104,6 +106,9 @@ static void ati28800_out(uint16_t addr, uint8_t val, void *p) case 0xb3: ati_eeprom_write(&ati28800->eeprom, val & 8, val & 2, val & 1); break; + case 0xb6: + if((old ^ val) & 0x10) svga_recalctimings(svga); + break; } break; @@ -158,6 +163,7 @@ void ati28800k_out(uint16_t addr, uint8_t val, void *p) get_korean_font_kind = (val << 8) | (get_korean_font_kind & 0xFF); get_korean_font_enabled = 1; get_korean_font_index = 0; + in_get_korean_font_kind_set = 0; } break; case 0x3DE: @@ -202,6 +208,15 @@ static uint8_t ati28800_in(uint16_t addr, void *p) case 0x1cf: switch (ati28800->index) { + case 0xb0: + if (ati28800->memory == 256) + return 0x08; + else if (ati28800->memory == 512) + return 0x10; + else + return 0x18; + break; + case 0xb7: temp = ati28800->regs[ati28800->index] & ~8; if (ati_eeprom_read(&ati28800->eeprom)) @@ -275,11 +290,18 @@ uint8_t ati28800k_in(uint16_t addr, void *p) static void ati28800_recalctimings(svga_t *svga) { ati28800_t *ati28800 = (ati28800_t *)svga->p; - pclog("ati28800_recalctimings\n"); + + if (ati28800->regs[0xb6] & 0x10) + { + svga->hdisp <<= 1; + svga->htotal <<= 1; + svga->rowoffset <<= 1; + } + if (!svga->scrblank && (ati28800->regs[0xb0] & 0x20)) /*Extended 256 colour modes*/ { - pclog("8bpp_highres\n"); svga->render = svga_render_8bpp_highres; + svga->bpp = 8; svga->rowoffset <<= 1; svga->ma <<= 1; } @@ -291,7 +313,8 @@ ati28800k_init(device_t *info) ati28800_t *ati28800 = malloc(sizeof(ati28800_t)); memset(ati28800, 0, sizeof(ati28800_t)); - + ati28800->memory = device_get_config_int("memory"); + port_03dd_val = 0; get_korean_font_base = 0; get_korean_font_index = 0; @@ -301,8 +324,9 @@ ati28800k_init(device_t *info) dbcs_mode_enabled = 0; rom_init(&ati28800->bios_rom, BIOS_ATIKOR_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + loadfont(FONT_ATIKOR_PATH, 6); - svga_init(&ati28800->svga, ati28800, 1 << 19, /*512kb*/ + svga_init(&ati28800->svga, ati28800, ati28800->memory << 10, /*Memory size, default 512KB*/ ati28800_recalctimings, ati28800k_in, ati28800k_out, NULL, @@ -321,17 +345,12 @@ ati28800k_init(device_t *info) static void * ati28800_init(device_t *info) { - uint32_t memory = 512; ati28800_t *ati; - -#if 0 - if (info->type == GFX_VGAWONDERXL) -#endif - memory = device_get_config_int("memory"); -memory <<= 10; ati = malloc(sizeof(ati28800_t)); memset(ati, 0x00, sizeof(ati28800_t)); + ati->memory = device_get_config_int("memory"); + switch(info->local) { case GFX_VGAWONDERXL: rom_init_interleaved(&ati->bios_rom, @@ -359,7 +378,7 @@ memory <<= 10; break; } - svga_init(&ati->svga, ati, memory, /*512kb*/ + svga_init(&ati->svga, ati, ati->memory << 10, /*default: 512kb*/ ati28800_recalctimings, ati28800_in, ati28800_out, NULL, @@ -457,6 +476,9 @@ static device_config_t ati28800_config[] = { "512 kB", 512 }, + { + "1024 kB", 1024 + }, { "" } diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index d17a3aae0..0f75e9480 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -390,6 +390,15 @@ void svga_recalctimings(svga_t *svga) if (svga->crtc[9] & 0x20) svga->vblankstart |= 0x200; svga->vblankstart++; + if(svga->crtc[0x17] & 4) + { + svga->vtotal <<= 1; + svga->dispend <<= 1; + svga->vsyncstart <<= 1; + svga->split <<= 1; + svga->vblankstart <<= 1; + } + svga->hdisp = svga->crtc[1]; svga->hdisp++; @@ -515,7 +524,7 @@ void svga_poll(void *p) } if (svga->displine == svga->hwcursor_latch.y+1 && svga->hwcursor_latch.ena && svga->interlace) { - svga->hwcursor_on = 64 - svga->hwcursor_latch.yoff; + svga->hwcursor_on = 64 - (svga->hwcursor_latch.yoff + 1); svga->hwcursor_oddeven = 1; } @@ -673,7 +682,9 @@ void svga_poll(void *p) } else { if (svga->crtc[9] & 0x80) svga->video_res_y /= 2; - if (!(svga->crtc[0x17] & 1)) + if (!(svga->crtc[0x17] & 2)) + svga->video_res_y *= 4; + else if (!(svga->crtc[0x17] & 1)) svga->video_res_y *= 2; svga->video_res_y /= (svga->crtc[9] & 31) + 1; if (svga->lowres) @@ -1440,9 +1451,9 @@ void svga_writeb_linear(uint32_t addr, uint8_t val, void *p) return; } - egawrites += 2; + egawrites++; - if (svga_output) pclog("Write LFBw %08X %04X\n", addr, val); + if (svga_output) pclog("Write LFBb %08X %04X\n", addr, val); addr &= svga->decode_mask; if (addr >= svga->vram_max) return; From 0807ef51aa9c37bb608cc4169f52efa3bd7cc041 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 5 Mar 2018 13:35:19 +0100 Subject: [PATCH 13/28] Updated file version numbers and dates. --- src/video/vid_svga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 0f75e9480..6bd9ea9d4 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -11,7 +11,7 @@ * This is intended to be used by another SVGA driver, * and not as a card in it's own right. * - * Version: @(#)vid_svga.c 1.0.23 2018/03/02 + * Version: @(#)vid_svga.c 1.0.24 2018/03/05 * * Authors: Sarah Walker, * Miran Grca, From 6de5e36aebeeb93acad7d2b0ba2693fcd9c16278 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Mar 2018 14:15:46 +0100 Subject: [PATCH 14/28] Applied greatpsycho's vid_svga_render.c fixes. --- src/video/vid_svga_render.c | 36 +++++++++--------------------------- 1 file changed, 9 insertions(+), 27 deletions(-) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 3467c024e..5f24264d0 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -8,7 +8,7 @@ * * SVGA renderers. * - * Version: @(#)vid_svga_render.c 1.0.6 2018/03/02 + * Version: @(#)vid_svga_render.c 1.0.7 2018/03/05 * * Authors: Sarah Walker, * Miran Grca, @@ -349,10 +349,7 @@ void svga_render_2bpp_lowres(svga_t *svga) int y_add = enable_overscan ? (overscan_y >> 1) : 0; int x_add = enable_overscan ? 8 : 0; - if (svga->sc & 1 && !(svga->crtc[0x17] & 1)) - changed_offset = (svga->ma << 1) >> 12; - else - changed_offset = ((svga->ma << 1) + 0x8000) >> 12; + changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { @@ -368,16 +365,8 @@ void svga_render_2bpp_lowres(svga_t *svga) { uint8_t dat[2]; - if (svga->sc & 1 && !(svga->crtc[0x17] & 1)) - { - dat[0] = svga->vram[(svga->ma << 1) + 0x8000]; - dat[1] = svga->vram[(svga->ma << 1) + 0x8001]; - } - else - { - dat[0] = svga->vram[(svga->ma << 1)]; - dat[1] = svga->vram[(svga->ma << 1) + 1]; - } + dat[0] = svga->vram[(svga->ma << 1) + ((svga->sc & ~svga->crtc[0x17] & 3)) * 0x8000]; + dat[1] = svga->vram[(svga->ma << 1) + ((svga->sc & ~svga->crtc[0x17] & 3)) * 0x8000 + 1]; svga->ma += 4; svga->ma &= svga->vram_display_mask; @@ -402,10 +391,7 @@ void svga_render_2bpp_highres(svga_t *svga) int y_add = enable_overscan ? (overscan_y >> 1) : 0; int x_add = enable_overscan ? 8 : 0; - if (svga->sc & 1 && !(svga->crtc[0x17] & 1)) - changed_offset = ((svga->ma << 1) | 0x8000) >> 12; - else - changed_offset = (svga->ma << 1) >> 12; + changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { @@ -421,8 +407,8 @@ void svga_render_2bpp_highres(svga_t *svga) { uint8_t dat[2]; - dat[0] = svga->vram[(svga->ma << 1) + ((svga->sc & 3) & (~svga->crtc[0x17] & 3)) * 0x8000]; - dat[1] = svga->vram[(svga->ma << 1) + ((svga->sc & 3) & (~svga->crtc[0x17] & 3)) * 0x8000 + 1]; + dat[0] = svga->vram[(svga->ma << 1) + ((svga->sc & ~svga->crtc[0x17] & 3)) * 0x8000]; + dat[1] = svga->vram[(svga->ma << 1) + ((svga->sc & ~svga->crtc[0x17] & 3)) * 0x8000 + 1]; svga->ma += 4; svga->ma &= svga->vram_display_mask; @@ -489,10 +475,7 @@ void svga_render_4bpp_highres(svga_t *svga) int y_add = enable_overscan ? (overscan_y >> 1) : 0; int x_add = enable_overscan ? 8 : 0; - if (svga->sc & 1 && !(svga->crtc[0x17] & 1)) - changed_offset = (svga->ma | 0x8000) >> 12; - else - changed_offset = svga->ma >> 12; + changed_offset = (svga->ma + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { @@ -509,8 +492,7 @@ void svga_render_4bpp_highres(svga_t *svga) uint8_t edat[4]; uint8_t dat; - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[svga->ma | ((svga->sc & 3) & (~svga->crtc[0x17] & 3)) * 0x8000]); - + *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[svga->ma | ((svga->sc & ~svga->crtc[0x17] & 3)) * 0x8000]); svga->ma += 4; svga->ma &= svga->vram_display_mask; From ab97eb923db69e9cfb6a654d9da9b6cfb7958aca Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Mar 2018 19:55:27 +0100 Subject: [PATCH 15/28] Dev build modules are now optionally disablable. --- src/win/Makefile.mingw | 54 +++++++++++++++++++++++++++++++----------- 1 file changed, 40 insertions(+), 14 deletions(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 5a5ae9284..a758a0cc6 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.106 2018/03/02 +# Version: @(#)Makefile.mingw 1.0.107 2018/03/05 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -112,19 +112,45 @@ ifndef PROG endif ifeq ($(DEV_BUILD), y) -DEBUG := y -DEV_BRANCH := y -AMD_K := y -CRASHDUMP := y -GREENB := y -I686 := y -LASERXT := y -NV_RIVA := y -PAS16 := y -PORTABLE3 := y -STEALTH32 := y -VNC := y -XL24 := y + ifneq ($(DEBUG), n) + DEBUG := y + endif + ifneq ($(DEV_BRANCH), n) + DEV_BRANCH := y + endif + ifneq ($(AMD_K), n) + AMD_K := y + endif + ifneq ($(CRASHDUMP), n) + CRASHDUMP := y + endif + ifneq ($(GREENB), n) + GREENB := y + endif + ifneq ($(I686), n) + I686 := y + endif + ifneq ($(LASERXT), n) + LASERXT := y + endif + ifneq ($(NV_RIVA), n) + NV_RIVA := y + endif + ifneq ($(PAS16), n) + PAS16 := y + endif + ifneq ($(PORTABLE3), n) + PORTABLE3 := y + endif + ifneq ($(STEALTH32), n) + STEALTH32 := y + endif + ifneq ($(VNC), n) + VNC := y + endif + ifneq ($(XL24), n) + XL24 := y + endif endif # WxWidgets basic info. Extract using the config program. From 651bdf3931c5df3992384376f6c2968f1a291a6d Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Mar 2018 20:47:48 +0100 Subject: [PATCH 16/28] Fixed the makefile so Dev builds are compiled correctly. --- src/win/Makefile.mingw | 172 +++++++++++++++++++++-------------------- 1 file changed, 87 insertions(+), 85 deletions(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index a758a0cc6..8636989da 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.107 2018/03/05 +# Version: @(#)Makefile.mingw 1.0.108 2018/03/05 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -24,13 +24,96 @@ ifndef EXTRAS EXTRAS := endif +ifndef DEV_BUILD +DEV_BUILD := n +endif + +ifeq ($(DEV_BUILD), y) + ifndef DEBUG + DEBUG := y + endif + ifndef DEV_BRANCH + DEV_BRANCH := y + endif + ifndef AMD_K + AMD_K := y + endif + ifndef CRASHDUMP + CRASHDUMP := y + endif + ifndef GREENB + GREENB := y + endif + ifndef I686 + I686 := y + endif + ifndef LASERXT + LASERXT := y + endif + ifndef NV_RIVA + NV_RIVA := y + endif + ifndef PAS16 + PAS16 := y + endif + ifndef PORTABLE3 + PORTABLE3 := y + endif + ifndef STEALTH32 + STEALTH32 := y + endif + ifndef VNC + VNC := y + endif + ifndef XL24 + XL24 := y + endif +else + ifndef DEBUG + DEBUG := n + endif + ifndef DEV_BRANCH + DEV_BRANCH := n + endif + ifndef AMD_K + AMD_K := n + endif + ifndef CRASHDUMP + CRASHDUMP := n + endif + ifndef GREENB + GREENB := n + endif + ifndef I686 + I686 := n + endif + ifndef LASERXT + LASERXT := n + endif + ifndef NV_RIVA + NV_RIVA := n + endif + ifndef PAS16 + PAS16 := n + endif + ifndef PORTABLE3 + PORTABLE3 := n + endif + ifndef STEALTH32 + STEALTH32 := n + endif + ifndef VNC + VNC := n + endif + ifndef XL24 + XL24 := n + endif +endif + # Defaults for several build options (possibly defined in a chained file.) ifndef AUTODEP AUTODEP := n endif -ifndef DEBUG -DEBUG := n -endif ifndef OPTIM OPTIM := n endif @@ -46,57 +129,18 @@ endif ifndef USB USB := n endif -ifndef VNC -VNC := n -endif ifndef RDP RDP := n endif -ifndef DEV_BUILD -DEV_BUILD := n -endif -ifndef DEV_BRANCH -DEV_BRANCH := n -endif -ifndef AMD_K -AMD_K := n -endif -ifndef CRASHDUMP -CRASHDUMP := n -endif -ifndef GREENB -GREENB := n -endif -ifndef I686 -I686 := n -endif -ifndef LASERXT -LASERXT := n -endif -ifndef NV_RIVA -NV_RIVA := n -endif ifndef OPENAL OPENAL := y endif -ifndef PORTABLE3 -PORTABLE3 := n -endif ifndef FLUIDSYNTH FLUIDSYNTH := y endif ifndef MUNT MUNT := y endif -ifndef PAS16 -PAS16 := n -endif -ifndef STEALTH32 -STEALTH32 := n -endif -ifndef XL24 -XL24 := n -endif ifndef DYNAREC DYNAREC := y endif @@ -111,48 +155,6 @@ ifndef PROG endif endif -ifeq ($(DEV_BUILD), y) - ifneq ($(DEBUG), n) - DEBUG := y - endif - ifneq ($(DEV_BRANCH), n) - DEV_BRANCH := y - endif - ifneq ($(AMD_K), n) - AMD_K := y - endif - ifneq ($(CRASHDUMP), n) - CRASHDUMP := y - endif - ifneq ($(GREENB), n) - GREENB := y - endif - ifneq ($(I686), n) - I686 := y - endif - ifneq ($(LASERXT), n) - LASERXT := y - endif - ifneq ($(NV_RIVA), n) - NV_RIVA := y - endif - ifneq ($(PAS16), n) - PAS16 := y - endif - ifneq ($(PORTABLE3), n) - PORTABLE3 := y - endif - ifneq ($(STEALTH32), n) - STEALTH32 := y - endif - ifneq ($(VNC), n) - VNC := y - endif - ifneq ($(XL24), n) - XL24 := y - endif -endif - # WxWidgets basic info. Extract using the config program. ifneq ($(WX), n) EXPATH += wx From 381dd2376cd86afd84c6968239e06196bcaa902c Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Mar 2018 23:35:01 +0100 Subject: [PATCH 17/28] Fixed the creation and exporting of thick track 86F images. --- src/floppy/fdd_86f.c | 20 +++++++++++++------- src/win/win_new_floppy.c | 10 +++++++--- 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index c0350d6fc..a36b79e29 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -10,7 +10,7 @@ * data in the form of FM/MFM-encoded transitions) which also * forms the core of the emulator's floppy disk emulation. * - * Version: @(#)fdd_86f.c 1.0.14 2018/01/18 + * Version: @(#)fdd_86f.c 1.0.15 2018/03/05 * * Author: Miran Grca, * Copyright 2016-2018 Miran Grca. @@ -3390,6 +3390,8 @@ int d86f_export(int drive, wchar_t *fn) int tracks = 86; int i; + int inc = 1; + uint32_t magic = 0x46423638; uint16_t version = 0x020B; @@ -3411,13 +3413,17 @@ int d86f_export(int drive, wchar_t *fn) fwrite(tt, 1, ((d86f_get_sides(drive) == 2) ? 2048 : 1024), f); - /* Do this do teremine how many tracks to actually output. */ - fdd_do_seek(drive, 2); - if (d86f[drive].cur_track == 1) - tracks >>= 1; + /* In the case of a thick track drive, always increment track + by two, since two tracks are going to get output at once. */ + if (!fdd_doublestep_40(drive)) + inc = 2; - for (i = 0; i < tracks; i++) { - fdd_do_seek(drive, i); + for (i = 0; i < tracks; i += inc) { + if (inc == 2) + fdd_do_seek(drive, i >> 1); + else + fdd_do_seek(drive, i); + d86f[drive].cur_track = i; d86f_write_tracks(drive, &f, tt); } diff --git a/src/win/win_new_floppy.c b/src/win/win_new_floppy.c index 4384fcceb..e826a0d37 100644 --- a/src/win/win_new_floppy.c +++ b/src/win/win_new_floppy.c @@ -8,7 +8,7 @@ * * Handle the New Floppy Image dialog. * - * Version: @(#)win_new_floppy.c 1.0.2 2018/02/25 + * Version: @(#)win_new_floppy.c 1.0.3 2018/03/05 * * Authors: Miran Grca, * @@ -82,6 +82,7 @@ create_86f(WCHAR *file_name, disk_size_t disk_size, uint8_t rpm_mode) uint32_t array_size, array_size2; uint32_t track_base, track_size; int i; + uint32_t shift = 0; dflags = 0; /* Has surface data? - Assume no for now. */ dflags |= (disk_size.hole << 1); /* Hole */ @@ -153,12 +154,15 @@ create_86f(WCHAR *file_name, disk_size_t disk_size, uint8_t rpm_mode) track_base = 8 + ((disk_size.sides == 2) ? 2048 : 1024); - for (i = 0; i < disk_size.tracks * disk_size.sides; i++) + if (disk_size.tracks <= 43) + shift = 1; + + for (i = 0; i < (disk_size.tracks * disk_size.sides) << shift; i++) tarray[i] = track_base + (i * track_size); fwrite(tarray, 1, (disk_size.sides == 2) ? 2048 : 1024, f); - for (i = 0; i < disk_size.tracks * disk_size.sides; i++) { + for (i = 0; i < (disk_size.tracks * disk_size.sides) << shift; i++) { fwrite(&tflags, 2, 1, f); fwrite(&index_hole_pos, 4, 1, f); fwrite(empty, 1, array_size, f); From 9356ae8bed28e9ed74eda0f2c13ba02f3b652947 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 6 Mar 2018 00:51:48 +0100 Subject: [PATCH 18/28] Moved the MR Intel Advanced/ATX to the Dev branch. --- src/machine/machine_table.c | 6 +++++- src/rom.c | 4 +++- src/rom.h | 4 +++- src/win/Makefile.mingw | 12 +++++++++++- 4 files changed, 22 insertions(+), 4 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 2248db772..bdbcea0d8 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11,7 +11,7 @@ * NOTES: OpenAT wip for 286-class machine with open BIOS. * PS2_M80-486 wip, pending receipt of TRM's for machine. * - * Version: @(#)machine_table.c 1.0.23 2018/03/02 + * Version: @(#)machine_table.c 1.0.24 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -135,7 +135,9 @@ machine_t machines[] = { { "[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL, nvr_at_close }, { "[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL, nvr_at_close }, +#if defined(DEV_BRANCH) && defined(USE_MRTHOR) { "[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL, nvr_at_close }, +#endif { "[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL, nvr_at_close }, { "[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL, nvr_at_close }, @@ -156,7 +158,9 @@ machine_t machines[] = { { "[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL, nvr_at_close }, { "[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL, nvr_at_close }, +#if defined(DEV_BRANCH) && defined(USE_MRTHOR) { "[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL, nvr_at_close }, +#endif { "[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL, nvr_at_close }, { "[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL, nvr_at_close }, diff --git a/src/rom.c b/src/rom.c index 425930e97..20295155f 100644 --- a/src/rom.c +++ b/src/rom.c @@ -13,7 +13,7 @@ * - c386sx16 BIOS fails checksum * - the loadfont() calls should be done elsewhere * - * Version: @(#)rom.c 1.0.34 2018/03/02 + * Version: @(#)rom.c 1.0.35 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -848,12 +848,14 @@ rom_load_bios(int rom_id) biosmask = 0x1ffff; return(1); +#if defined(DEV_BRANCH) && defined(USE_MRTHOR) case ROM_MRTHOR: if (! rom_load_linear( L"roms/machines/mrthor/mr_atx.bio", 0x000000, 131072, 0, rom)) break; biosmask = 0x1ffff; return(1); +#endif case ROM_ZAPPA: if (! rom_load_linear( diff --git a/src/rom.h b/src/rom.h index d1fcfe4ee..477a4788f 100644 --- a/src/rom.h +++ b/src/rom.h @@ -8,7 +8,7 @@ * * Definitions for the ROM image handler. * - * Version: @(#)rom.h 1.0.16 2018/03/02 + * Version: @(#)rom.h 1.0.17 2018/03/06 * * Author: Fred N. van Kempen, * Copyright 2018 Fred N. van Kempen. @@ -147,7 +147,9 @@ enum { ROM_PRESIDENT, /* President Award 430FX PCI/430FX/Award/Unknown SIO */ ROM_THOR, /* Intel Advanced_ATX/430FX/AMI/NS PC87306 */ +#if defined(DEV_BRANCH) && defined(USE_MRTHOR) ROM_MRTHOR, /* Intel Advanced_ATX/430FX/MR.BIOS/NS PC87306 */ +#endif ROM_ACERM3A, /* Acer M3A/430HX/Acer/SMC FDC37C932FR */ ROM_ACERV35N, /* Acer V35N/430HX/Acer/SMC FDC37C932FR */ diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 8636989da..e9294b657 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.108 2018/03/05 +# Version: @(#)Makefile.mingw 1.0.109 2018/03/06 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -50,6 +50,9 @@ ifeq ($(DEV_BUILD), y) ifndef LASERXT LASERXT := y endif + ifndef MRTHOR + MRTHOR := y + endif ifndef NV_RIVA NV_RIVA := y endif @@ -90,6 +93,9 @@ else ifndef LASERXT LASERXT := n endif + ifndef MRTHOR + MRTHOR := n + endif ifndef NV_RIVA NV_RIVA := n endif @@ -365,6 +371,10 @@ OPTS += -DUSE_LASERXT DEVBROBJ += m_xt_laserxt.o endif +ifeq ($(MRTHOR), y) +OPTS += -DUSE_MRTHOR +endif + ifeq ($(NV_RIVA), y) OPTS += -DUSE_RIVA DEVBROBJ += vid_nv_riva128.o From 22536d8d03a78e81a458d8cb138ca5a280457f46 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 6 Mar 2018 01:14:38 +0100 Subject: [PATCH 19/28] Fixed a mistake in floppy/fdd.c; Fixed some undeclared variables in floppy/fdd_imd.c; Moved zip.c/h to disk subfolder; Fixed the warnings in video/vid_t1000.c. --- src/config.c | 4 ++-- src/disk/hdc_ide.c | 4 ++-- src/{ => disk}/zip.c | 24 ++++++++++++------------ src/{ => disk}/zip.h | 0 src/floppy/fdd.c | 6 +++++- src/floppy/fdd_imd.c | 6 +++--- src/pc.c | 4 ++-- src/scsi/scsi.c | 4 ++-- src/scsi/scsi_device.c | 4 ++-- src/video/vid_t1000.c | 2 +- src/win/win_cdrom.c | 8 ++++---- src/win/win_new_floppy.c | 4 ++-- src/win/win_settings.c | 4 ++-- src/win/win_stbar.c | 4 ++-- 14 files changed, 41 insertions(+), 37 deletions(-) rename src/{ => disk}/zip.c (99%) rename src/{ => disk}/zip.h (100%) diff --git a/src/config.c b/src/config.c index 8dfd7d6c2..dd709f765 100644 --- a/src/config.c +++ b/src/config.c @@ -8,7 +8,7 @@ * * Configuration file handler. * - * Version: @(#)config.c 1.0.42 2018/02/10 + * Version: @(#)config.c 1.0.43 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -36,10 +36,10 @@ #include "device.h" #include "lpt.h" #include "cdrom/cdrom.h" -#include "zip.h" #include "disk/hdd.h" #include "disk/hdc.h" #include "disk/hdc_ide.h" +#include "disk/zip.h" #include "floppy/fdd.h" #include "floppy/fdc.h" #include "game/gameport.h" diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 5408cbfb2..1127c9651 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -9,7 +9,7 @@ * Implementation of the IDE emulation for hard disks and ATAPI * CD-ROM devices. * - * Version: @(#)hdc_ide.c 1.0.30 2018/03/02 + * Version: @(#)hdc_ide.c 1.0.31 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -37,12 +37,12 @@ #include "../device.h" #include "../cdrom/cdrom.h" #include "../scsi/scsi.h" -#include "../zip.h" #include "../plat.h" #include "../ui.h" #include "hdc.h" #include "hdc_ide.h" #include "hdd.h" +#include "zip.h" /* Bits of 'atastat' */ diff --git a/src/zip.c b/src/disk/zip.c similarity index 99% rename from src/zip.c rename to src/disk/zip.c index 0cbd43ce5..40eaa9de8 100644 --- a/src/zip.c +++ b/src/disk/zip.c @@ -9,7 +9,7 @@ * Implementation of the Iomega ZIP drive with SCSI(-like) * commands, for both ATAPI and SCSI usage. * - * Version: @(#)zip.c 1.0.6 2018/02/27 + * Version: @(#)zip.c 1.0.7 2018/03/06 * * Author: Miran Grca, * @@ -22,17 +22,17 @@ #include #include #define HAVE_STDARG_H -#include "86box.h" -#include "config.h" -#include "timer.h" -#include "device.h" -#include "piix.h" -#include "scsi/scsi.h" -#include "nvr.h" -#include "disk/hdc.h" -#include "disk/hdc_ide.h" -#include "plat.h" -#include "ui.h" +#include "../86box.h" +#include "../config.h" +#include "../timer.h" +#include "../device.h" +#include "../piix.h" +#include "../scsi/scsi.h" +#include "../nvr.h" +#include "../plat.h" +#include "../ui.h" +#include "hdc.h" +#include "hdc_ide.h" #include "zip.h" diff --git a/src/zip.h b/src/disk/zip.h similarity index 100% rename from src/zip.h rename to src/disk/zip.h diff --git a/src/floppy/fdd.c b/src/floppy/fdd.c index 95cee85b5..4c048e93a 100644 --- a/src/floppy/fdd.c +++ b/src/floppy/fdd.c @@ -8,7 +8,7 @@ * * Implementation of the floppy drive emulation. * - * Version: @(#)fdd.c 1.0.7 2018/01/18 + * Version: @(#)fdd.c 1.0.8 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -523,6 +523,7 @@ double fdd_real_period(int drive) return (32.0 * dusec); } +#if defined(DEV_BRANCH) && defined(USE_MRTHOR) if (romset == ROM_MRTHOR) { return (ddbp * dusec) / 4.0; @@ -531,6 +532,9 @@ double fdd_real_period(int drive) { return (ddbp * dusec); } +#else + return (ddbp * dusec); +#endif } void fdd_poll(int drive) diff --git a/src/floppy/fdd_imd.c b/src/floppy/fdd_imd.c index 0eef14d34..ca56f5fe7 100644 --- a/src/floppy/fdd_imd.c +++ b/src/floppy/fdd_imd.c @@ -8,7 +8,7 @@ * * Implementation of the IMD floppy image format. * - * Version: @(#)fdd_imd.c 1.0.6 2018/01/16 + * Version: @(#)fdd_imd.c 1.0.7 2018/03/06 * * Author: Miran Grca, * Copyright 2016-2018 Miran Grca. @@ -691,7 +691,7 @@ void imd_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_ int sc = 0; int sh = 0; int sn = 0; - char *c_map, *h_map, *r_map, *n_map; + char *c_map = 0, *h_map = 0, *r_map = 0, *n_map = 0; uint8_t id[4] = { 0, 0, 0, 0 }; sc = imd[drive].tracks[track][side].params[1]; sh = imd[drive].tracks[track][side].params[2]; @@ -734,7 +734,7 @@ void imd_writeback(int drive) int i = 0; - char *n_map; + char *n_map = 0; uint8_t h, n, spt; uint32_t ssize; diff --git a/src/pc.c b/src/pc.c index aee2d5b47..224607f7d 100644 --- a/src/pc.c +++ b/src/pc.c @@ -8,7 +8,7 @@ * * Main emulator module where most things are controlled. * - * Version: @(#)pc.c 1.0.61 2018/03/02 + * Version: @(#)pc.c 1.0.62 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -56,10 +56,10 @@ #include "disk/hdd.h" #include "disk/hdc.h" #include "disk/hdc_ide.h" +#include "disk/zip.h" #include "cdrom/cdrom.h" #include "cdrom/cdrom_image.h" #include "cdrom/cdrom_null.h" -#include "zip.h" #include "scsi/scsi.h" #include "network/network.h" #include "sound/sound.h" diff --git a/src/scsi/scsi.c b/src/scsi/scsi.c index e46c7b140..fa4033ec5 100644 --- a/src/scsi/scsi.c +++ b/src/scsi/scsi.c @@ -8,7 +8,7 @@ * * Handling of the SCSI controllers. * - * Version: @(#)scsi.c 1.0.15 2018/02/18 + * Version: @(#)scsi.c 1.0.16 2018/03/06 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -28,8 +28,8 @@ #include "../timer.h" #include "../device.h" #include "../cdrom/cdrom.h" -#include "../zip.h" #include "../disk/hdc.h" +#include "../disk/zip.h" #include "../plat.h" #include "scsi.h" #include "scsi_aha154x.h" diff --git a/src/scsi/scsi_device.c b/src/scsi/scsi_device.c index b2a199f0c..646189628 100644 --- a/src/scsi/scsi_device.c +++ b/src/scsi/scsi_device.c @@ -8,7 +8,7 @@ * * The generic SCSI device command handler. * - * Version: @(#)scsi_device.c 1.0.12 2018/02/17 + * Version: @(#)scsi_device.c 1.0.13 2018/03/06 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -23,8 +23,8 @@ #include "../86box.h" #include "../device.h" #include "../cdrom/cdrom.h" -#include "../zip.h" #include "../disk/hdd.h" +#include "../disk/zip.h" #include "scsi.h" #include "scsi_disk.h" diff --git a/src/video/vid_t1000.c b/src/video/vid_t1000.c index 2f75c22ed..a71e10b8e 100644 --- a/src/video/vid_t1000.c +++ b/src/video/vid_t1000.c @@ -366,7 +366,7 @@ static void t1000_cgaline4(t1000_t *t1000) { int x, c; uint8_t dat, pattern; - uint32_t ink0, ink1; + uint32_t ink0 = 0, ink1 = 0; uint16_t addr; uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; diff --git a/src/win/win_cdrom.c b/src/win/win_cdrom.c index 3154760f4..b27433fb9 100644 --- a/src/win/win_cdrom.c +++ b/src/win/win_cdrom.c @@ -8,14 +8,14 @@ * * Handle the platform-side of CDROM drives. * - * Version: @(#)win_cdrom.c 1.0.4 2017/10/16 + * Version: @(#)win_cdrom.c 1.0.5 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, * Fred N. van Kempen, * - * Copyright 2016,2017 Miran Grca. - * Copyright 2017 Fred N. van Kempen. + * Copyright 2016-2018 Miran Grca. + * Copyright 2017,2018 Fred N. van Kempen. */ #define UNICODE #define BITMAP WINDOWS_BITMAP @@ -31,8 +31,8 @@ #include "../cdrom/cdrom.h" #include "../cdrom/cdrom_image.h" #include "../cdrom/cdrom_null.h" -#include "../zip.h" #include "../disk/hdd.h" +#include "../disk/zip.h" #include "../scsi/scsi.h" #include "../scsi/scsi_disk.h" #include "../plat.h" diff --git a/src/win/win_new_floppy.c b/src/win/win_new_floppy.c index e826a0d37..1d8ed7589 100644 --- a/src/win/win_new_floppy.c +++ b/src/win/win_new_floppy.c @@ -8,7 +8,7 @@ * * Handle the New Floppy Image dialog. * - * Version: @(#)win_new_floppy.c 1.0.3 2018/03/05 + * Version: @(#)win_new_floppy.c 1.0.4 2018/03/06 * * Authors: Miran Grca, * @@ -29,7 +29,7 @@ #include "../plat.h" #include "../random.h" #include "../ui.h" -#include "../zip.h" +#include "../disk/zip.h" #include "win.h" diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 7a3774941..fd5c222f2 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -8,7 +8,7 @@ * * Windows 86Box Settings dialog handler. * - * Version: @(#)win_settings.c 1.0.39 2018/02/18 + * Version: @(#)win_settings.c 1.0.40 2018/03/06 * * Author: Miran Grca, * @@ -37,10 +37,10 @@ #include "../lpt.h" #include "../mouse.h" #include "../cdrom/cdrom.h" -#include "../zip.h" #include "../disk/hdd.h" #include "../disk/hdc.h" #include "../disk/hdc_ide.h" +#include "../disk/zip.h" #include "../floppy/fdd.h" #include "../scsi/scsi.h" #include "../network/network.h" diff --git a/src/win/win_stbar.c b/src/win/win_stbar.c index 6d78b745f..7f078fcc1 100644 --- a/src/win/win_stbar.c +++ b/src/win/win_stbar.c @@ -8,7 +8,7 @@ * * Implement the application's Status Bar. * - * Version: @(#)win_stbar.c 1.0.14 2018/02/11 + * Version: @(#)win_stbar.c 1.0.15 2018/03/06 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -36,9 +36,9 @@ #include "../cdrom/cdrom.h" #include "../cdrom/cdrom_image.h" #include "../cdrom/cdrom_null.h" -#include "../zip.h" #include "../disk/hdd.h" #include "../disk/hdc.h" +#include "../disk/zip.h" #include "../floppy/fdd.h" #include "../scsi/scsi.h" #include "../scsi/scsi_disk.h" From f7c9792abca4641d25697b26964bc419c025692f Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 6 Mar 2018 19:21:06 +0100 Subject: [PATCH 20/28] Brought ATAPI IOMEGA ZIP PACKET IDENTIFY and SET FEATURES commands in line with the real drive's behavior (information courtesy of claunia), the ASUS P/I-P54TP4XE now correctly recognizes it as a ZIP drive. --- src/disk/hdc_ide.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 1127c9651..91696880b 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -9,7 +9,7 @@ * Implementation of the IDE emulation for hard disks and ATAPI * CD-ROM devices. * - * Version: @(#)hdc_ide.c 1.0.31 2018/03/06 + * Version: @(#)hdc_ide.c 1.0.32 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -485,7 +485,9 @@ static void ide_atapi_zip_identify(IDE *ide) zip_id = atapi_zip_drives[ide->channel]; - ide->buffer[0] = 0x8000 | (0<<8) | 0x80 | (2<<5); /* ATAPI device, direct-access device, removable media, accelerated DRQ */ + /* Using (2<<5) below makes the ASUS P/I-P54TP4XE misdentify the ZIP drive + as a LS-120. */ + ide->buffer[0] = 0x8000 | (0<<8) | 0x80 | (1<<5); /* ATAPI device, direct-access device, removable media, accelerated DRQ */ ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ if (zip_drives[zip_id].is_250) { ide_padstr((char *) (ide->buffer + 23), "42.S", 8); /* Firmware */ @@ -497,7 +499,6 @@ static void ide_atapi_zip_identify(IDE *ide) ide->buffer[49] = 0x200; /* LBA supported */ /* Note by Kotori: Look at this if this is supported by ZIP at all. */ - ide->buffer[48] = 1; /*Dword transfers supported*/ ide->buffer[51] = 2 << 8; /*PIO timing mode*/ ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ @@ -505,10 +506,9 @@ static void ide_atapi_zip_identify(IDE *ide) if (PCI && (ide->board < 2) && (zip_drives[zip_id].bus_type == ZIP_BUS_ATAPI_PIO_AND_DMA)) { ide->buffer[49] |= 0x100; /* DMA supported */ - ide->buffer[52] = 2 << 8; /*DMA timing mode*/ - ide->buffer[53] = 7; - ide->buffer[62] = 7; - ide->buffer[63] = 7; + ide->buffer[52] = 0 << 8; /*DMA timing mode*/ + ide->buffer[53] = 6; + ide->buffer[63] = 3; ide->buffer[88] = 7; if (ide->mdma_mode != -1) { @@ -516,18 +516,16 @@ static void ide_atapi_zip_identify(IDE *ide) d <<= 8; if ((ide->mdma_mode & 0x300) == 0x200) ide->buffer[88] |= d; - else if ((ide->mdma_mode & 0x300) == 0x100) - ide->buffer[63] |= d; else - ide->buffer[62] |= d; + ide->buffer[63] |= d; ide_log("PIDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]); } - ide->buffer[65] = 0xb4; - ide->buffer[66] = 0xb4; - ide->buffer[71] = 30; - ide->buffer[72] = 30; - ide->buffer[80] = 0x1e; /*ATA-1 to ATA-4 supported*/ - ide->buffer[81] = 0x18; /*ATA-4 revision 18 supported*/ + ide->buffer[65] = 0x96; + ide->buffer[66] = 0x96; + ide->buffer[67] = 0xb4; + ide->buffer[68] = 0xb4; + ide->buffer[80] = 0x30; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-5*/ + ide->buffer[81] = 0x15; /*Maximum ATA revision supported : ATA/ATAPI-5 T13 1321D revision 1*/ } } @@ -625,6 +623,7 @@ static int ide_set_features(IDE *ide) uint8_t mode, submode; int bus, dma; + int max_pio = 2, max_mdma = 2; features = ide->cylprecomp; features_data = ide->secount; @@ -632,6 +631,8 @@ static int ide_set_features(IDE *ide) if (ide_drive_is_zip(ide)) { bus = zip_drives[atapi_zip_drives[ide->channel]].bus_type; dma = (bus == ZIP_BUS_ATAPI_PIO_AND_DMA); + max_pio = 0; + max_mdma = 1; } else if (ide_drive_is_cdrom(ide)) { bus = cdrom_drives[atapi_cdrom_drives[ide->channel]].bus_type; dma = (bus == CDROM_BUS_ATAPI_PIO_AND_DMA); @@ -664,7 +665,7 @@ static int ide_set_features(IDE *ide) break; case 0x01: /* PIO mode */ - if (submode > 2) + if (submode > max_pio) { return 0; } @@ -673,7 +674,7 @@ static int ide_set_features(IDE *ide) break; case 0x02: /* Singleword DMA mode */ - if (!PCI || !dma || (ide->board >= 2) || (submode > 2)) + if (!PCI || !dma || ide_drive_is_zip(ide) || (ide->board >= 2) || (submode > 2)) { return 0; } @@ -682,7 +683,7 @@ static int ide_set_features(IDE *ide) break; case 0x04: /* Multiword DMA mode */ - if (!PCI || !dma || (ide->board >= 2) || (submode > 2)) + if (!PCI || !dma || (ide->board >= 2) || (submode > max_mdma)) { return 0; } From 7b8bee27526c3b1a687a2e19d8afcc7144736d10 Mon Sep 17 00:00:00 2001 From: Daniel Gurney Date: Wed, 7 Mar 2018 20:10:19 +0200 Subject: [PATCH 21/28] Remove useless W5500 if condition and fix nonexistent -O level in Makefile.mingw --- src/win/Makefile.mingw | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index e9294b657..a5d7ddd2a 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -246,7 +246,7 @@ else ifeq ($(OPTIM), y) AOPTIM := -mtune=native ifndef COPTIM - COPTIM := -O6 -flto + COPTIM := -O3 -flto endif else ifndef COPTIM @@ -254,11 +254,7 @@ else endif endif endif -ifeq ($(W5580), y) - AFLAGS := -msse2 -msse3 -mssse3 -msse4 -msse4.1 -msse4.2 -mfpmath=sse -else - AFLAGS := -msse2 -mfpmath=sse -endif +AFLAGS := -msse2 -mfpmath=sse RFLAGS := --input-format=rc -O coff ifeq ($(RELEASE), y) OPTS += -DRELEASE_BUILD From 16c722b32fc751d5fd0b6db0e35dc8bf932423fe Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Mar 2018 20:06:08 +0100 Subject: [PATCH 22/28] Realistic CD-ROM timings on ATAPI PIO, ATAPI DMA, SCSI NCR 53c810, and SCSI Adaptec/Buslogic; Added ability to select emulated CD-ROM drive speed; The Adaptec and BusLogic SCSI controllers are no longer threaded; Two fixes in video/vid_s3.c. --- src/cdrom/cdrom.c | 56 +++++++--- src/cdrom/cdrom.h | 4 +- src/config.c | 12 ++- src/disk/zip.c | 37 ++++--- src/lang/language.h | 5 +- src/scsi/scsi_aha154x.c | 20 ++-- src/scsi/scsi_buslogic.c | 13 ++- src/scsi/scsi_device.c | 29 +++++- src/scsi/scsi_device.h | 3 +- src/scsi/scsi_disk.c | 17 ++-- src/scsi/scsi_ncr5380.c | 10 +- src/scsi/scsi_ncr53c810.c | 71 +++++++++++-- src/scsi/scsi_x54x.c | 209 ++++++++++---------------------------- src/scsi/scsi_x54x.h | 18 ++-- src/video/vid_s3.c | 6 +- src/win/86Box.rc | 54 +++++----- src/win/resource.h | 4 +- src/win/win_settings.c | 82 ++++++++++++++- 18 files changed, 382 insertions(+), 268 deletions(-) diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index 65743bead..5a50c0cd7 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -9,7 +9,7 @@ * Implementation of the CD-ROM drive with SCSI(-like) * commands, for both ATAPI and SCSI usage. * - * Version: @(#)cdrom.c 1.0.33 2018/02/27 + * Version: @(#)cdrom.c 1.0.34 2018/03/06 * * Author: Miran Grca, * @@ -715,25 +715,53 @@ void cdrom_update_request_length(uint8_t id, int len, int block_len) static void cdrom_command_common(uint8_t id) { + double bytes_per_second, period; + double dusec; + cdrom[id].status = BUSY_STAT; cdrom[id].phase = 1; cdrom[id].pos = 0; if (cdrom[id].packet_status == CDROM_PHASE_COMPLETE) { - cdrom[id].callback = 20LL * CDROM_TIME; - cdrom_set_callback(id); - } else if (cdrom[id].packet_status == CDROM_PHASE_DATA_IN) { - if (cdrom[id].current_cdb[0] == 0x42) { - cdrom_log("CD-ROM %i: READ SUBCHANNEL\n", id); - cdrom[id].callback = 1000LL * CDROM_TIME; - cdrom_set_callback(id); - } else { - cdrom[id].callback = 60LL * CDROM_TIME; - cdrom_set_callback(id); - } + cdrom_phase_callback(id); + cdrom[id].callback = 0LL; } else { - cdrom[id].callback = 60LL * CDROM_TIME; - cdrom_set_callback(id); + switch(cdrom[id].current_cdb[0]) { + case 0x25: + case 0x42: + case 0x43: + case 0x44: + case 0x08: + case 0x28: + case 0x51: + case 0x52: + case 0xa8: + case 0xad: + case 0xb8: + case 0xb9: + case 0xbe: + bytes_per_second = 150.0 * 1024.0; + bytes_per_second *= (double) cdrom_drives[id].speed; + break; + default: + if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) { + cdrom[id].callback = -1LL; /* Speed depends on SCSI controller */ + return; + } else if (cdrom_drives[id].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA) { + if (cdrom_current_mode(id) == 2) + bytes_per_second = 66666666.666666666666666; /* 66 MB/s MDMA-2 speed */ + else + bytes_per_second = 8333333.333333333333333; /* 8.3 MB/s PIO-2 speed */ + } else + bytes_per_second = 3333333.333333333333333; /* 3.3 MB/s PIO-0 speed */ + break; + } + + period = 1000000.0 / bytes_per_second; + dusec = (double) TIMER_USEC; + dusec = dusec * period * (double) (cdrom[id].packet_len); + cdrom[id].callback = ((int64_t) dusec); } + cdrom_set_callback(id); } static void cdrom_command_complete(uint8_t id) diff --git a/src/cdrom/cdrom.h b/src/cdrom/cdrom.h index bf208267f..d82a002cb 100644 --- a/src/cdrom/cdrom.h +++ b/src/cdrom/cdrom.h @@ -9,7 +9,7 @@ * Implementation of the CD-ROM drive with SCSI(-like) * commands, for both ATAPI and SCSI usage. * - * Version: @(#)cdrom.h 1.0.4 2017/11/01 + * Version: @(#)cdrom.h 1.0.5 2018/03/06 * * Author: Miran Grca, * @@ -169,6 +169,8 @@ typedef struct { unsigned int sound_on; unsigned int atapi_dma; + + uint8_t speed; } cdrom_drive_t; typedef struct { diff --git a/src/config.c b/src/config.c index dd709f765..86e002153 100644 --- a/src/config.c +++ b/src/config.c @@ -8,7 +8,7 @@ * * Configuration file handler. * - * Version: @(#)config.c 1.0.43 2018/03/06 + * Version: @(#)config.c 1.0.44 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -1225,6 +1225,9 @@ load_other_removable_devices(void) sscanf("0, none", "%01u, %s", &cdrom_drives[c].sound_on, s); cdrom_drives[c].bus_type = hdd_string_to_bus(s, 1); + sprintf(temp, "cdrom_%02i_speed", c+1); + cdrom_drives[c].speed = config_get_int(cat, temp, 8); + /* Default values, needed for proper operation of the Settings dialog. */ cdrom_drives[c].ide_channel = cdrom_drives[c].scsi_device_id = c + 2; @@ -1980,6 +1983,13 @@ save_other_removable_devices(void) config_set_int(cat, temp, cdrom_drives[c].host_drive); } + sprintf(temp, "cdrom_%02i_speed", c+1); + if ((cdrom_drives[c].bus_type == 0) || (cdrom_drives[c].speed == 8)) { + config_delete_var(cat, temp); + } else { + config_set_int(cat, temp, cdrom_drives[c].speed); + } + sprintf(temp, "cdrom_%02i_parameters", c+1); if (cdrom_drives[c].bus_type == 0) { config_delete_var(cat, temp); diff --git a/src/disk/zip.c b/src/disk/zip.c index 40eaa9de8..cd20e2253 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -9,7 +9,7 @@ * Implementation of the Iomega ZIP drive with SCSI(-like) * commands, for both ATAPI and SCSI usage. * - * Version: @(#)zip.c 1.0.7 2018/03/06 + * Version: @(#)zip.c 1.0.8 2018/03/07 * * Author: Miran Grca, * @@ -932,25 +932,34 @@ void zip_update_request_length(uint8_t id, int len, int block_len) static void zip_command_common(uint8_t id) { + double bytes_per_second, period; + double dusec; + zip[id].status = BUSY_STAT; zip[id].phase = 1; zip[id].pos = 0; if (zip[id].packet_status == ZIP_PHASE_COMPLETE) { - zip[id].callback = 20LL * ZIP_TIME; - zip_set_callback(id); - } else if (zip[id].packet_status == ZIP_PHASE_DATA_IN) { - if (zip[id].current_cdb[0] == 0x42) { - zip_log("ZIP %i: READ SUBCHANNEL\n"); - zip[id].callback = 1000LL * ZIP_TIME; - zip_set_callback(id); - } else { - zip[id].callback = 60LL * ZIP_TIME; - zip_set_callback(id); - } + zip_phase_callback(id); + zip[id].callback = 0LL; } else { - zip[id].callback = 60LL * ZIP_TIME; - zip_set_callback(id); + if (zip_drives[id].bus_type == ZIP_BUS_SCSI) { + zip[id].callback = -1LL; /* Speed depends on SCSI controller */ + return; + } else if (zip_drives[id].bus_type == ZIP_BUS_ATAPI_PIO_AND_DMA) { + if (zip_current_mode(id) == 2) + bytes_per_second = 66666666.666666666666666; /* 66 MB/s MDMA-2 speed */ + else + bytes_per_second = 8333333.333333333333333; /* 8.3 MB/s PIO-2 speed */ + } else + bytes_per_second = 3333333.333333333333333; /* 3.3 MB/s PIO-0 speed */ } + + period = 1000000.0 / bytes_per_second; + dusec = (double) TIMER_USEC; + dusec = dusec * period * (double) (zip[id].packet_len); + zip[id].callback = ((int64_t) dusec); + + zip_set_callback(id); } static void zip_command_complete(uint8_t id) diff --git a/src/lang/language.h b/src/lang/language.h index 92f7f4df9..e4c060da8 100644 --- a/src/lang/language.h +++ b/src/lang/language.h @@ -10,7 +10,7 @@ * * NOTE: FIXME: Strings 2176 and 2193 are same. * - * Version: @(#)language.h 1.0.6 2018/01/23 + * Version: @(#)language.h 1.0.7 2018/03/07 * * Author: Fred N. van Kempen, * @@ -151,6 +151,7 @@ #define IDS_2175 2175 // "ZIP images (*.IM?)\0*.IM..." #define IDS_2176 2176 // "ZIP images (*.IM?)\0*.IM..." #define IDS_2177 2177 // "ZIP %i (%03i): %ls" +#define IDS_2178 2178 // "Speed" #define IDS_4096 4096 // "Hard disk (%s)" #define IDS_4097 4097 // "%01i:%01i" @@ -231,7 +232,7 @@ #define IDS_LANG_ENUS IDS_7168 -#define STR_NUM_2048 130 +#define STR_NUM_2048 131 #define STR_NUM_3072 11 #define STR_NUM_4096 20 #define STR_NUM_4352 7 diff --git a/src/scsi/scsi_aha154x.c b/src/scsi/scsi_aha154x.c index 67aefc15d..efc9a5fcb 100644 --- a/src/scsi/scsi_aha154x.c +++ b/src/scsi/scsi_aha154x.c @@ -10,7 +10,7 @@ * made by Adaptec, Inc. These controllers were designed for * the ISA bus. * - * Version: @(#)scsi_aha154x.c 1.0.38 2018/02/19 + * Version: @(#)scsi_aha154x.c 1.0.39 2018/03/07 * * Authors: Fred N. van Kempen, * Original Buslogic version by SA1988 and Miran Grca. @@ -267,10 +267,7 @@ aha_fast_cmds(void *p, uint8_t cmd) x54x_t *dev = (x54x_t *)p; if (cmd == CMD_BIOS_SCSI) { - x54x_busy(1); dev->BIOSMailboxReq++; - x54x_set_wait_event(); - x54x_busy(0); return 1; } @@ -362,7 +359,6 @@ aha_cmds(void *p) case CMD_BIOS_MBINIT: /* BIOS Mailbox Initialization */ /* Sent by CF BIOS. */ - x54x_busy(1); dev->Mbx24bit = 1; mbi = (MailboxInit_t *)dev->CmdBuf; @@ -378,7 +374,6 @@ aha_cmds(void *p) dev->Status &= ~STAT_INIT; dev->DataReplyLeft = 0; - x54x_busy(0); break; case CMD_MEMORY_MAP_1: /* AHA memory mapper */ @@ -467,16 +462,12 @@ aha_do_bios_mail(x54x_t *dev) static void -aha_thread(void *p) +aha_callback(void *p) { x54x_t *dev = (x54x_t *)p; if (dev->BIOSMailboxInit && dev->BIOSMailboxReq) - { - x54x_wait_for_poll(); - aha_do_bios_mail(dev); - } } @@ -768,7 +759,7 @@ aha_init(device_t *info) dev->bit32 = 0; dev->lba_bios = 0; - dev->ven_thread = aha_thread; + dev->ven_callback = aha_callback; dev->ven_cmd_is_fast = aha_cmd_is_fast; dev->ven_fast_cmds = aha_fast_cmds; dev->get_ven_param_len = aha_param_len; @@ -797,6 +788,7 @@ aha_init(device_t *info) dev->HostID = device_get_config_int("hostid"); dev->rom_shram = 0x3F80; /* shadow RAM address base */ dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->ha_bps = 5000000.0; /* normal SCSI */ break; case AHA_154xC: @@ -811,6 +803,7 @@ aha_init(device_t *info) dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 5000000.0; /* normal SCSI */ break; case AHA_154xCF: @@ -826,6 +819,7 @@ aha_init(device_t *info) dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 10000000.0; /* fast SCSI */ break; case AHA_154xCP: @@ -840,6 +834,7 @@ aha_init(device_t *info) dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 10000000.0; /* fast SCSI */ break; case AHA_1640: @@ -853,6 +848,7 @@ aha_init(device_t *info) dev->pos_regs[0] = 0x1F; /* MCA board ID */ dev->pos_regs[1] = 0x0F; mca_add(aha_mca_read, aha_mca_write, dev); + dev->ha_bps = 5000000.0; /* normal SCSI */ break; } diff --git a/src/scsi/scsi_buslogic.c b/src/scsi/scsi_buslogic.c index 8e99c81f9..cd95e823b 100644 --- a/src/scsi/scsi_buslogic.c +++ b/src/scsi/scsi_buslogic.c @@ -11,14 +11,14 @@ * 1 - BT-545S ISA; * 2 - BT-958D PCI * - * Version: @(#)scsi_buslogic.c 1.0.34 2018/01/06 + * Version: @(#)scsi_buslogic.c 1.0.35 2018/03/07 * * Authors: TheCollector1995, * Miran Grca, * Fred N. van Kempen, * - * Copyright 2016,2018 Miran Grca. - * Copyright 2018 Fred N. van Kempen. + * Copyright 2016-2018 Miran Grca. + * Copyright 2017,2018 Fred N. van Kempen. */ #include #include @@ -719,7 +719,6 @@ buslogic_cmds(void *p) dev->IrqEnabled = 1; return 1; case 0x81: - x54x_busy(1); dev->Mbx24bit = 0; MailboxInitE = (MailboxInitExtended_t *)dev->CmdBuf; @@ -736,7 +735,6 @@ buslogic_cmds(void *p) dev->Status &= ~STAT_INIT; dev->DataReplyLeft = 0; - x54x_busy(0); break; case 0x83: if (dev->CmdParam == 12) { @@ -1528,6 +1526,7 @@ buslogic_init(device_t *info) has_autoscsi_rom = 0; has_scam_rom = 0; dev->fw_rev = "AA335"; + dev->ha_bps = 5000000.0; /* normal SCSI */ break; case CHIP_BUSLOGIC_ISA: default: @@ -1540,6 +1539,7 @@ buslogic_init(device_t *info) autoscsi_rom_size = 0x4000; has_scam_rom = 0; dev->fw_rev = "AA421E"; + dev->ha_bps = 10000000.0; /* fast SCSI */ break; case CHIP_BUSLOGIC_MCA: strcpy(dev->name, "BT-640A"); @@ -1553,6 +1553,7 @@ buslogic_init(device_t *info) dev->pos_regs[0] = 0x08; /* MCA board ID */ dev->pos_regs[1] = 0x07; mca_add(buslogic_mca_read, buslogic_mca_write, dev); + dev->ha_bps = 5000000.0; /* normal SCSI */ break; case CHIP_BUSLOGIC_VLB: strcpy(dev->name, "BT-445S"); @@ -1565,6 +1566,7 @@ buslogic_init(device_t *info) has_scam_rom = 0; dev->fw_rev = "AA421E"; dev->bit32 = 1; + dev->ha_bps = 10000000.0; /* fast SCSI */ break; case CHIP_BUSLOGIC_PCI: strcpy(dev->name, "BT-958D"); @@ -1580,6 +1582,7 @@ buslogic_init(device_t *info) dev->fw_rev = "AA507B"; dev->cdrom_boot = 1; dev->bit32 = 1; + dev->ha_bps = 20000000.0; /* ultra SCSI */ break; } diff --git a/src/scsi/scsi_device.c b/src/scsi/scsi_device.c index 646189628..91350ec3d 100644 --- a/src/scsi/scsi_device.c +++ b/src/scsi/scsi_device.c @@ -8,7 +8,7 @@ * * The generic SCSI device command handler. * - * Version: @(#)scsi_device.c 1.0.13 2018/03/06 + * Version: @(#)scsi_device.c 1.0.14 2018/03/07 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -119,6 +119,33 @@ static void scsi_device_target_save_cdb_byte(int lun_type, uint8_t id, uint8_t c } +int64_t scsi_device_get_callback(uint8_t scsi_id, uint8_t scsi_lun) +{ + uint8_t lun_type = SCSIDevices[scsi_id][scsi_lun].LunType; + + uint8_t id = 0; + + switch (lun_type) + { + case SCSI_DISK: + id = scsi_hard_disks[scsi_id][scsi_lun]; + return shdc[id].callback; + break; + case SCSI_CDROM: + id = scsi_cdrom_drives[scsi_id][scsi_lun]; + return cdrom[id].callback; + break; + case SCSI_ZIP: + id = scsi_zip_drives[scsi_id][scsi_lun]; + return zip[id].callback; + break; + default: + return -1LL; + break; + } +} + + uint8_t *scsi_device_sense(uint8_t scsi_id, uint8_t scsi_lun) { uint8_t lun_type = SCSIDevices[scsi_id][scsi_lun].LunType; diff --git a/src/scsi/scsi_device.h b/src/scsi/scsi_device.h index f89fac3bd..9d7267528 100644 --- a/src/scsi/scsi_device.h +++ b/src/scsi/scsi_device.h @@ -8,7 +8,7 @@ * * Definitions for the generic SCSI device command handler. * - * Version: @(#)scsi_device.h 1.0.5 2018/02/17 + * Version: @(#)scsi_device.h 1.0.6 2018/03/07 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -35,6 +35,7 @@ typedef struct extern uint8_t *scsi_device_sense(uint8_t id, uint8_t lun); extern void scsi_device_type_data(uint8_t id, uint8_t lun, uint8_t *type, uint8_t *rmb); +extern int64_t scsi_device_get_callback(uint8_t scsi_id, uint8_t scsi_lun); extern void scsi_device_request_sense(uint8_t scsi_id, uint8_t scsi_lun, uint8_t *buffer, uint8_t alloc_length); diff --git a/src/scsi/scsi_disk.c b/src/scsi/scsi_disk.c index 0e346c255..c5c374935 100644 --- a/src/scsi/scsi_disk.c +++ b/src/scsi/scsi_disk.c @@ -6,11 +6,11 @@ * * Emulation of SCSI fixed and removable disks. * - * Version: @(#)scsi_disk.c 1.0.16 2018/01/25 + * Version: @(#)scsi_disk.c 1.0.17 2018/03/07 * * Author: Miran Grca, * - * Copyright 2018 Miran Grca. + * Copyright 2017,2018 Miran Grca. */ #include #include @@ -459,14 +459,11 @@ static void scsi_hd_command_common(uint8_t id) shdc[id].status = BUSY_STAT; shdc[id].phase = 1; shdc[id].pos = 0; - if (shdc[id].packet_status == CDROM_PHASE_COMPLETE) - { - shdc[id].callback = 20 * SCSI_TIME; - } - else - { - shdc[id].callback = 60 * SCSI_TIME; - } + if (shdc[id].packet_status == CDROM_PHASE_COMPLETE) { + scsi_hd_callback(id); + shdc[id].callback = 0LL; + } else + shdc[id].callback = -1LL; /* Speed depends on SCSI controller */ } diff --git a/src/scsi/scsi_ncr5380.c b/src/scsi/scsi_ncr5380.c index 2614d0ff6..97440394f 100644 --- a/src/scsi/scsi_ncr5380.c +++ b/src/scsi/scsi_ncr5380.c @@ -9,15 +9,15 @@ * Implementation of the NCR 5380 series of SCSI Host Adapters * made by NCR. These controllers were designed for the ISA bus. * - * Version: @(#)scsi_ncr5380.c 1.0.10 2018/01/26 + * Version: @(#)scsi_ncr5380.c 1.0.11 2018/03/07 * * Authors: Sarah Walker, * TheCollector1995, * Fred N. van Kempen, * - * Copyright 2017-2018 Sarah Walker. - * Copyright 2017-2018 TheCollector1995. - * Copyright 2018 Fred N. van Kempen. + * Copyright 2017,2018 Sarah Walker. + * Copyright 2017,2018 TheCollector1995. + * Copyright 2017,2018 Fred N. van Kempen. */ #include #include @@ -390,7 +390,7 @@ dma_callback(void *priv) int bytes_transferred = 0; int c; - scsi->dma_timer += POLL_TIME_US; + scsi->dma_timer += POLL_TIME_US * TIMER_USEC; switch (scsi->ncr.dma_mode) { case DMA_SEND: diff --git a/src/scsi/scsi_ncr53c810.c b/src/scsi/scsi_ncr53c810.c index bc970282d..b7b7b2b32 100644 --- a/src/scsi/scsi_ncr53c810.c +++ b/src/scsi/scsi_ncr53c810.c @@ -10,7 +10,7 @@ * NCR and later Symbios and LSI. This controller was designed * for the PCI bus. * - * Version: @(#)scsi_ncr53c810.c 1.0.6 2018/01/06 + * Version: @(#)scsi_ncr53c810.c 1.0.7 2018/03/07 * * Authors: Paul Brook (QEMU) * Artyom Tarasenko (QEMU) @@ -19,8 +19,9 @@ * * Copyright 2006-2018 Paul Brook. * Copyright 2009-2018 Artyom Tarasenko. - * Copyright 2018 Miran Grca. + * Copyright 2017,2018 Miran Grca. */ +#include #include #include #include @@ -268,6 +269,9 @@ typedef struct { uint8_t regop; uint32_t adder; + + int64_t timer_period; + int64_t timer_enabled; } ncr53c810_t; @@ -326,6 +330,8 @@ static void ncr53c810_soft_reset(ncr53c810_t *dev) { ncr53c810_log("LSI Reset\n"); + dev->timer_period = dev->timer_enabled = 0; + dev->carry = 0; dev->msg_action = 0; @@ -496,6 +502,7 @@ ncr53c810_script_scsi_interrupt(ncr53c810_t *dev, int stat0, int stat1) if ((dev->sist0 & mask0) || (dev->sist1 & mask1)) { ncr53c810_log("NCR 810: IRQ-mandated stop\n"); dev->sstop = 1; + dev->timer_period = dev->timer_enabled = 0; } ncr53c810_update_irq(dev); } @@ -509,6 +516,7 @@ ncr53c810_script_dma_interrupt(ncr53c810_t *dev, int stat) dev->dstat |= stat; ncr53c810_update_irq(dev); dev->sstop = 1; + dev->timer_period = dev->timer_enabled = 0; } @@ -526,6 +534,7 @@ ncr53c810_bad_phase(ncr53c810_t *dev, int out, int new_phase) ncr53c810_log("Phase mismatch interrupt\n"); ncr53c810_script_scsi_interrupt(dev, NCR_SIST0_MA, 0); dev->sstop = 1; + dev->timer_period = dev->timer_enabled = 0; ncr53c810_set_phase(dev, new_phase); } @@ -650,6 +659,8 @@ ncr53c810_do_command(ncr53c810_t *dev, uint8_t id) scsi_device_t *sd; uint8_t buf[12]; + double period; + memset(buf, 0, 12); DMAPageRead(dev->dnad, buf, MIN(12, dev->dbc)); if (dev->dbc > 12) { @@ -690,9 +701,19 @@ ncr53c810_do_command(ncr53c810_t *dev, uint8_t id) if ((sd->Phase == SCSI_PHASE_DATA_IN) && (sd->BufferLength > 0)) { ncr53c810_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DI\n", id, dev->current_lun, buf[0]); ncr53c810_set_phase(dev, PHASE_DI); + dev->timer_period = scsi_device_get_callback(dev->current->tag, dev->current_lun); + if (dev->timer_period <= 0LL) { + period = ((double) sd->BufferLength) * 0.2 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ + dev->timer_period = (int64_t) period; + } } else if ((sd->Phase == SCSI_PHASE_DATA_OUT) && (sd->BufferLength > 0)) { ncr53c810_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DO\n", id, dev->current_lun, buf[0]); ncr53c810_set_phase(dev, PHASE_DO); + dev->timer_period = scsi_device_get_callback(dev->current->tag, dev->current_lun); + if (dev->timer_period <= 0LL) { + period = ((double) sd->BufferLength) * 0.2 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ + dev->timer_period = (int64_t) period; + } } else ncr53c810_command_complete(dev, sd->Status); } @@ -907,7 +928,7 @@ ncr53c810_memcpy(ncr53c810_t *dev, uint32_t dest, uint32_t src, int count) static void -ncr53c810_execute_script(ncr53c810_t *dev) +ncr53c810_process_script(ncr53c810_t *dev) { uint32_t insn, addr, id, buf[2], dest; int opcode, insn_processed = 0, reg, operator, cond, jmp, n, i; @@ -936,6 +957,7 @@ again: if (dev->sist1 & NCR_SIST1_STO) { ncr53c810_log("Delayed select timeout\n"); dev->sstop = 1; + dev->timer_period = dev->timer_enabled = 0; break; } ncr53c810_log("Block Move DBC=%d\n", dev->dbc); @@ -981,7 +1003,9 @@ again: case PHASE_CMD: ncr53c810_log("Command Phase\n"); ncr53c810_do_command(dev, dev->sdid); - break; + dev->dfifo = dev->dbc & 0xff; + dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); + return; case PHASE_ST: ncr53c810_log("Status Phase\n"); ncr53c810_do_status(dev); @@ -1153,6 +1177,7 @@ again: if (dev->sist1 & NCR_SIST1_STO) { ncr53c810_log("Delayed select timeout\n"); dev->sstop = 1; + dev->timer_period = dev->timer_enabled = 0; break; } cond = jmp = (insn & (1 << 19)) != 0; @@ -1262,7 +1287,8 @@ again: ncr53c810_script_dma_interrupt(dev, NCR_DSTAT_SSI); } else { ncr53c810_log("NCR 810: SCRIPTS: Normal mode\n"); - goto again; + if (insn_processed < 100) + goto again; } } else { if (dev->sstop) @@ -1271,10 +1297,41 @@ again: ncr53c810_log("NCR 810: SCRIPTS: Waiting\n"); } + return; + ncr53c810_log("SCRIPTS execution stopped\n"); } +static void +ncr53c810_execute_script(ncr53c810_t *dev) +{ + dev->timer_period = 10LL * TIMER_USEC; + dev->timer_enabled = 1; +} + + +static void +ncr53c810_callback(void *p) +{ + ncr53c810_t *dev = (ncr53c810_t *) p; + + dev->timer_period = 0; + if (!dev->waiting) + ncr53c810_process_script(dev); + + if (dev->sstop) { + dev->timer_period = 0; + dev->timer_enabled = 0; + return; + } else + dev->timer_enabled = 1; + + if (dev->timer_period == 0) + dev->timer_period = 50LL * TIMER_USEC; +} + + static void ncr53c810_reg_writeb(ncr53c810_t *dev, uint32_t offset, uint8_t val) { @@ -1377,7 +1434,7 @@ ncr53c810_reg_writeb(ncr53c810_t *dev, uint32_t offset, uint8_t val) ncr53c810_log("Woken by SIGP\n"); dev->waiting = 0; dev->dsp = dev->dnad; - ncr53c810_execute_script(dev); + /* ncr53c810_execute_script(dev); */ } if ((val & NCR_ISTAT_SRST) && !(tmp & NCR_ISTAT_SRST)) { ncr53c810_soft_reset(dev); @@ -2076,6 +2133,8 @@ ncr53c810_init(device_t *info) ncr53c810_soft_reset(dev); + timer_add(ncr53c810_callback, &dev->timer_period, &dev->timer_enabled, dev); + return(dev); } diff --git a/src/scsi/scsi_x54x.c b/src/scsi/scsi_x54x.c index 3b58a03cd..a234e6c3f 100644 --- a/src/scsi/scsi_x54x.c +++ b/src/scsi/scsi_x54x.c @@ -11,7 +11,7 @@ * series of SCSI Host Adapters made by Mylex. * These controllers were designed for various buses. * - * Version: @(#)scsi_x54x.c 1.0.17 2018/02/25 + * Version: @(#)scsi_x54x.c 1.0.18 2018/03/07 * * Authors: TheCollector1995, * Miran Grca, @@ -20,6 +20,7 @@ * Copyright 2016-2018 Miran Grca. * Copyright 2017,2018 Fred N. van Kempen. */ +#include #include #include #include @@ -49,22 +50,7 @@ #define X54X_RESET_DURATION_US UINT64_C(50000) -static void x54x_cmd_thread(void *priv); - -static volatile -thread_t *poll_tid; -static volatile -int busy; - -static volatile -event_t *evt; -static volatile -event_t *wait_evt; - -static volatile -event_t *wake_poll_thread; -static volatile -event_t *thread_started; +static void x54x_cmd_callback(void *priv); static volatile x54x_t *x54x_dev; @@ -609,6 +595,13 @@ x54x_cmd_done(x54x_t *dev, int suppress) } +static void +x54x_add_to_period(int TransferLength) +{ + x54x_dev->temp_period += (int64_t) TransferLength; +} + + static void x54x_mbi_setup(x54x_t *dev, uint32_t CCBPointer, CCBU *CmdBlock, uint8_t HostStatus, uint8_t TargetStatus, uint8_t mbcc) @@ -636,6 +629,7 @@ x54x_ccb(x54x_t *dev) DMAPageWrite(req->CCBPointer + 0x000D, &(req->MailboxCompletionCode), 1); DMAPageWrite(req->CCBPointer + 0x000E, &(req->HostStatus), 1); DMAPageWrite(req->CCBPointer + 0x000F, &(req->TargetStatus), 1); + x54x_add_to_period(3); if (dev->MailboxOutInterrupts) dev->ToRaise = INTR_MBOA | INTR_ANY; @@ -666,6 +660,7 @@ x54x_mbi(x54x_t *dev) x54x_log("CCB statuses rewritten (pointer %08X)\n", req->CCBPointer); DMAPageWrite(req->CCBPointer + 0x000E, &(req->HostStatus), 1); DMAPageWrite(req->CCBPointer + 0x000F, &(req->TargetStatus), 1); + x54x_add_to_period(2); } else { x54x_log("Mailbox not found!\n"); } @@ -677,6 +672,7 @@ x54x_mbi(x54x_t *dev) x54x_log("Mailbox 24-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); DMAPageWrite(Incoming, &(req->MailboxCompletionCode), 1); DMAPageWrite(Incoming + 1, (uint8_t *)&CCBPointer, 3); + x54x_add_to_period(4); x54x_log("%i bytes of 24-bit mailbox written to: %08X\n", sizeof(Mailbox_t), Incoming); } else { x54x_log("Mailbox 32-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); @@ -684,6 +680,7 @@ x54x_mbi(x54x_t *dev) DMAPageWrite(Incoming + 4, &(req->HostStatus), 1); DMAPageWrite(Incoming + 5, &(req->TargetStatus), 1); DMAPageWrite(Incoming + 7, &(req->MailboxCompletionCode), 1); + x54x_add_to_period(7); x54x_log("%i bytes of 32-bit mailbox written to: %08X\n", sizeof(Mailbox32_t), Incoming); } @@ -704,6 +701,7 @@ x54x_rd_sge(int Is24bit, uint32_t Address, SGE32 *SG) if (Is24bit) { DMAPageRead(Address, (uint8_t *)&SGE24, sizeof(SGE)); + x54x_add_to_period(sizeof(SGE)); /* Convert the 24-bit entries into 32-bit entries. */ x54x_log("Read S/G block: %06X, %06X\n", SGE24.Segment, SGE24.SegmentPointer); @@ -711,6 +709,7 @@ x54x_rd_sge(int Is24bit, uint32_t Address, SGE32 *SG) SG->SegmentPointer = ADDR_TO_U32(SGE24.SegmentPointer); } else { DMAPageRead(Address, (uint8_t *)SG, sizeof(SGE32)); + x54x_add_to_period(sizeof(SGE32)); } } @@ -778,9 +777,11 @@ x54x_set_residue(Req_t *req, int32_t TransferLength) if (req->Is24bit) { U32_TO_ADDR(Residue24, Residue); DMAPageWrite(req->CCBPointer + 0x0004, (uint8_t *)&Residue24, 3); + x54x_add_to_period(3); x54x_log("24-bit Residual data length for reading: %d\n", Residue); } else { DMAPageWrite(req->CCBPointer + 0x0004, (uint8_t *)&Residue, 4); + x54x_add_to_period(4); x54x_log("32-bit Residual data length for reading: %d\n", Residue); } } @@ -832,9 +833,8 @@ x54x_buf_dma_transfer(Req_t *req, int Is24bit, int TransferLength, int dir) x54x_log("Writing S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); DMAPageWrite(Address, &(SCSIDevices[req->TargetID][req->LUN].CmdBuffer[sg_pos]), DataToTransfer); } - else { + else x54x_log("No action on S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); - } sg_pos += SGBuffer.Segment; @@ -850,11 +850,10 @@ x54x_buf_dma_transfer(Req_t *req, int Is24bit, int TransferLength, int dir) Address = DataPointer; if ((DataLength > 0) && (BufLen > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { - if (read_from_host) { + if (read_from_host) DMAPageRead(Address, SCSIDevices[req->TargetID][req->LUN].CmdBuffer, MIN(BufLen, DataLength)); - } else if (write_to_host) { + else if (write_to_host) DMAPageWrite(Address, SCSIDevices[req->TargetID][req->LUN].CmdBuffer, MIN(BufLen, DataLength)); - } } } } @@ -938,6 +937,7 @@ SenseBufferFree(Req_t *req, int Copy) x54x_log("SenseBufferFree(): Writing %i bytes at %08X\n", SenseLength, SenseBufferAddress); DMAPageWrite(SenseBufferAddress, temp_sense, SenseLength); + x54x_add_to_period(SenseLength); x54x_log("Sense data written to buffer: %02X %02X %02X\n", temp_sense[2], temp_sense[12], temp_sense[13]); } @@ -957,6 +957,7 @@ x54x_scsi_cmd(x54x_t *dev) int32_t *BufLen; uint8_t phase; uint32_t SenseBufferAddress; + int64_t p; id = req->TargetID; lun = req->LUN; @@ -979,8 +980,10 @@ x54x_scsi_cmd(x54x_t *dev) if (req->CmdBlock.common.CdbLength <= target_cdb_len) { memcpy(temp_cdb, req->CmdBlock.common.Cdb, req->CmdBlock.common.CdbLength); + x54x_add_to_period(req->CmdBlock.common.CdbLength); } else { memcpy(temp_cdb, req->CmdBlock.common.Cdb, target_cdb_len); + x54x_add_to_period(target_cdb_len); } dev->Residue = 0; @@ -1005,8 +1008,14 @@ x54x_scsi_cmd(x54x_t *dev) if ((SCSIDevices[id][lun].Status != SCSI_STATUS_OK) && (*BufLen > 0)) { SenseBufferAddress = SenseBufferPointer(req); DMAPageWrite(SenseBufferAddress, SCSIDevices[id][lun].CmdBuffer, *BufLen); + x54x_add_to_period(*BufLen); } } else { + p = scsi_device_get_callback(id, lun); + if (p <= 0LL) + x54x_add_to_period(*BufLen); + else + dev->media_period += p; x54x_buf_alloc(id, lun, MIN(target_data_len, *BufLen)); if (phase == SCSI_PHASE_DATA_OUT) x54x_buf_dma_transfer(req, bit24, target_data_len, 1); @@ -1034,10 +1043,6 @@ x54x_scsi_cmd(x54x_t *dev) } x54x_log("SCSIDevices[%02i][%02i].Status = %02X\n", id, lun, SCSIDevices[id][lun].Status); - - if (temp_cdb[0] == 0x42) { - thread_wait_event((event_t *) evt, 10); - } } @@ -1135,6 +1140,7 @@ x54x_req_abort(x54x_t *dev, uint32_t CCBPointer) /* Fetch data from the Command Control Block. */ DMAPageRead(CCBPointer, (uint8_t *)&CmdBlock, sizeof(CCB32)); + x54x_add_to_period(sizeof(CCB32)); x54x_mbi_setup(dev, CCBPointer, &CmdBlock, 0x26, SCSI_STATUS_OK, MBI_NOT_FOUND); @@ -1163,6 +1169,7 @@ x54x_mbo(x54x_t *dev, Mailbox32_t *Mailbox32) if (dev->Mbx24bit) { Outgoing = Addr + (Cur * sizeof(Mailbox_t)); DMAPageRead(Outgoing, (uint8_t *)&MailboxOut, sizeof(Mailbox_t)); + x54x_add_to_period(sizeof(Mailbox_t)); ccbp = *(uint32_t *) &MailboxOut; Mailbox32->CCBPointer = (ccbp >> 24) | ((ccbp >> 8) & 0xff00) | ((ccbp << 8) & 0xff0000); @@ -1171,6 +1178,7 @@ x54x_mbo(x54x_t *dev, Mailbox32_t *Mailbox32) Outgoing = Addr + (Cur * sizeof(Mailbox32_t)); DMAPageRead(Outgoing, (uint8_t *)Mailbox32, sizeof(Mailbox32_t)); + x54x_add_to_period(sizeof(Mailbox32_t)); } return(Outgoing); @@ -1203,14 +1211,11 @@ x54x_mbo_process(x54x_t *dev) /* We got the mailbox, mark it as free in the guest. */ x54x_log("x54x_do_mail(): Writing %i bytes at %08X\n", sizeof(CmdStatus), Outgoing + CodeOffset); DMAPageWrite(Outgoing + CodeOffset, &CmdStatus, 1); + x54x_add_to_period(1); - if (dev->ToRaise) { + if (dev->ToRaise) raise_irq(dev, 0, dev->ToRaise); - while (dev->Interrupt) - ; - } - if (dev->MailboxIsBIOS) dev->BIOSMailboxReq--; else @@ -1264,84 +1269,29 @@ static void x54x_cmd_done(x54x_t *dev, int suppress); -void -x54x_wait_for_poll(void) -{ - if (x54x_is_busy()) { - thread_wait_event((event_t *) wake_poll_thread, -1); - } - thread_reset_event((event_t *) wake_poll_thread); -} - - static void -x54x_cmd_thread(void *priv) +x54x_cmd_callback(void *priv) { + double period; x54x_t *dev = (x54x_t *) x54x_dev; - thread_set_event((event_t *) thread_started); - - x54x_log("Polling thread started\n"); - - while (x54x_dev) { - scsi_mutex_wait(1); - - if ((dev->Status & STAT_INIT) || (!dev->MailboxInit && !dev->BIOSMailboxInit) || (!dev->MailboxReq && !dev->BIOSMailboxReq)) { - /* If we did not get anything, wait a while. */ - thread_wait_event((event_t *) wait_evt, 10); - thread_reset_event((event_t *) wait_evt); - - scsi_mutex_wait(0); - continue; - } - - if (!(x54x_dev->Status & STAT_INIT) && x54x_dev->MailboxInit && dev->MailboxReq) { - x54x_wait_for_poll(); - - x54x_do_mail(dev); - } - - if (dev->ven_thread) { - dev->ven_thread(dev); - } - - scsi_mutex_wait(0); + if ((dev->Status & STAT_INIT) || (!dev->MailboxInit && !dev->BIOSMailboxInit) || (!dev->MailboxReq && !dev->BIOSMailboxReq)) { + /* If we did not get anything, do nothing and wait 10 us. */ + dev->timer_period = 10LL * TIMER_USEC; + return; } - x54x_log("%s: Callback: polling stopped.\n", dev->name); -} + dev->temp_period = dev->media_period = 0LL; + if (!(x54x_dev->Status & STAT_INIT) && x54x_dev->MailboxInit && dev->MailboxReq) + x54x_do_mail(dev); -void -x54x_busy(uint8_t set) -{ - busy = !!set; - if (!set) - thread_set_event((event_t *) wake_poll_thread); -} + if (dev->ven_callback) + dev->ven_callback(dev); - -void -x54x_thread_start(x54x_t *dev) -{ - if (!poll_tid) { - x54x_log("Starting thread...\n"); - poll_tid = thread_create(x54x_cmd_thread, dev); - } -} - - -uint8_t -x54x_is_busy(void) -{ - return(!!busy); -} - - -void -x54x_set_wait_event(void) -{ - thread_set_event((event_t *)wait_evt); + period = (1000000.0 / x54x_dev->ha_bps) * ((double) TIMER_USEC) * ((double) dev->temp_period); + dev->timer_period = dev->media_period + ((int64_t) period) + (40LL * TIMER_USEC); + x54x_log("Temporary period: %" PRId64 " us (%" PRIi64 " periods)\n", dev->timer_period, dev->temp_period); } @@ -1518,31 +1468,24 @@ x54x_out(uint16_t port, uint8_t val, void *priv) switch (port & 3) { case 0: if ((val & CTRL_HRST) || (val & CTRL_SRST)) { - x54x_busy(1); reset = (val & CTRL_HRST); x54x_log("Reset completed = %x\n", reset); x54x_reset_ctrl(dev, reset); x54x_log("Controller reset: "); - x54x_busy(0); break; } if (val & CTRL_IRST) { - x54x_busy(1); clear_irq(dev); x54x_log("Interrupt reset: "); - x54x_busy(0); } break; case 1: /* Fast path for the mailbox execution command. */ if ((val == CMD_START_SCSI) && (dev->Command == 0xff)) { - x54x_busy(1); dev->MailboxReq++; - x54x_set_wait_event(); x54x_log("Start SCSI command: "); - x54x_busy(0); return; } if (dev->ven_fast_cmds) { @@ -1609,7 +1552,6 @@ x54x_out(uint16_t port, uint8_t val, void *priv) break; case CMD_MBINIT: /* mailbox initialization */ - x54x_busy(1); dev->Mbx24bit = 1; mbi = (MailboxInit_t *)dev->CmdBuf; @@ -1628,7 +1570,6 @@ x54x_out(uint16_t port, uint8_t val, void *priv) dev->Status &= ~STAT_INIT; dev->DataReplyLeft = 0; x54x_log("Mailbox init: "); - x54x_busy(0); break; case CMD_BIOSCMD: /* execute BIOS */ @@ -1962,22 +1903,11 @@ x54x_init(device_t *info) dev->bus = info->flags; timer_add(x54x_reset_poll, &dev->ResetCB, &dev->ResetCB, dev); + dev->timer_period = 10LL * TIMER_USEC; + timer_add(x54x_cmd_callback, &dev->timer_period, TIMER_ALWAYS_ENABLED, dev); x54x_dev = dev; - scsi_mutex(1); - - wake_poll_thread = thread_create_event(); - thread_started = thread_create_event(); - - /* Create a waitable event. */ - evt = thread_create_event(); - wait_evt = thread_create_event(); - - x54x_thread_start(dev); - thread_wait_event((event_t *) thread_started, -1); - thread_reset_event((event_t *) thread_started); - return(dev); } @@ -1990,17 +1920,8 @@ x54x_close(void *priv) if (dev) { x54x_dev = NULL; - /* Tell the thread to terminate. */ - if (poll_tid != NULL) { - x54x_busy(0); - - x54x_log("Waiting for SCSI thread to end...\n"); - /* Wait for the end event. */ - thread_wait((event_t *) poll_tid, -1); - x54x_log("SCSI thread ended\n"); - - poll_tid = NULL; - } + /* Tell the timer to terminate. */ + dev->timer_period = 0LL; dev->MailboxInit = dev->BIOSMailboxInit = 0; dev->MailboxCount = dev->BIOSMailboxCount = 0; @@ -2009,28 +1930,6 @@ x54x_close(void *priv) if (dev->ven_data) free(dev->ven_data); - if (wait_evt) { - thread_destroy_event((event_t *) evt); - evt = NULL; - } - - if (evt) { - thread_destroy_event((event_t *) evt); - evt = NULL; - } - - if (thread_started) { - thread_destroy_event((event_t *) thread_started); - thread_started = NULL; - } - - if (wake_poll_thread) { - thread_destroy_event((event_t *) wake_poll_thread); - wake_poll_thread = NULL; - } - - scsi_mutex(0); - if (dev->nvr != NULL) free(dev->nvr); diff --git a/src/scsi/scsi_x54x.h b/src/scsi/scsi_x54x.h index b4380fc89..c9b0d190e 100644 --- a/src/scsi/scsi_x54x.h +++ b/src/scsi/scsi_x54x.h @@ -11,14 +11,14 @@ * of SCSI Host Adapters made by Mylex. * These controllers were designed for various buses. * - * Version: @(#)scsi_x54x.h 1.0.4 2017/12/15 + * Version: @(#)scsi_x54x.h 1.0.5 2018/03/07 * * Authors: TheCollector1995, * Miran Grca, * Fred N. van Kempen, * - * Copyright 2016,2017 Miran Grca. - * Copyright 2017 Fred N. van Kempen. + * Copyright 2016-2018 Miran Grca. + * Copyright 2017,2018 Fred N. van Kempen. */ #ifndef SCSI_X54X_H @@ -332,6 +332,10 @@ typedef struct { char vendor[16]; /* name of device vendor */ char name[16]; /* name of device */ + int64_t timer_period, temp_period; + int64_t media_period; + double ha_bps; /* bytes per second */ + int8_t Irq; uint8_t IrqEnabled; @@ -429,8 +433,8 @@ typedef struct { /* Pointer to a structure of vendor-specific data that only the vendor-specific code can understand */ void *ven_data; - /* Pointer to a function that performs vendor-specific operation during the thread */ - void (*ven_thread)(void *p); + /* Pointer to a function that performs vendor-specific operation during the timer callback */ + void (*ven_callback)(void *p); /* Pointer to a function that executes the second parameter phase of the vendor-specific command */ void (*ven_cmd_phase1)(void *p); /* Pointer to a function that gets the host adapter ID in case it has to be read from a non-standard location */ @@ -487,10 +491,6 @@ typedef struct extern void x54x_reset_ctrl(x54x_t *dev, uint8_t Reset); -extern void x54x_busy(uint8_t set); -extern void x54x_thread_start(x54x_t *dev); -extern void x54x_set_wait_event(void); -extern uint8_t x54x_is_busy(void); extern void x54x_buf_alloc(uint8_t id, uint8_t lun, int length); extern void x54x_buf_free(uint8_t id, uint8_t lun); extern uint8_t x54x_mbo_process(x54x_t *dev); diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 8f84b85ad..21034e812 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -8,7 +8,7 @@ * * S3 emulation. * - * Version: @(#)vid_s3.c 1.0.5 2018/02/09 + * Version: @(#)vid_s3.c 1.0.6 2018/03/07 * * Authors: Sarah Walker, * Miran Grca, @@ -115,8 +115,8 @@ typedef struct s3_t struct { - uint8_t subsys_cntl; - uint8_t setup_md; + uint16_t subsys_cntl; + uint16_t setup_md; uint8_t advfunc_cntl; uint16_t cur_y; uint16_t cur_x; diff --git a/src/win/86Box.rc b/src/win/86Box.rc index 546d11ef8..7122bf0f5 100644 --- a/src/win/86Box.rc +++ b/src/win/86Box.rc @@ -8,7 +8,7 @@ * * Application resource script for Windows. * - * Version: @(#)86Box.rc 1.0.30 2018/02/11 + * Version: @(#)86Box.rc 1.0.31 2018/03/06 * * Authors: Miran Grca, * Fred N. van Kempen, @@ -473,16 +473,16 @@ BEGIN PUSHBUTTON "&Remove",IDC_BUTTON_HDD_REMOVE,198,137,62,10 COMBOBOX IDC_COMBO_HD_BUS,33,117,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Bus:",IDT_1721,7,118,24,8 + LTEXT "Bus:",IDT_1721,7,119,24,8 COMBOBOX IDC_COMBO_HD_CHANNEL,170,117,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Channel:",IDT_1722,131,118,38,8 + LTEXT "Channel:",IDT_1722,131,119,38,8 COMBOBOX IDC_COMBO_HD_ID,170,117,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "ID:",IDT_1723,131,118,38,8 + LTEXT "ID:",IDT_1723,131,119,38,8 COMBOBOX IDC_COMBO_HD_LUN,239,117,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "LUN:",IDT_1724,200,118,38,8 + LTEXT "LUN:",IDT_1724,200,119,38,8 COMBOBOX IDC_COMBO_HD_CHANNEL_IDE,170,117,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP END @@ -510,16 +510,16 @@ BEGIN LTEXT "File name:",IDT_1731,7,7,204,9 COMBOBOX IDC_COMBO_HD_BUS,33,71,58,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Bus:",IDT_1721,7,72,24,8 + LTEXT "Bus:",IDT_1721,7,73,24,8 COMBOBOX IDC_COMBO_HD_CHANNEL,134,71,77,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Channel:",IDT_1722,99,72,34,8 + LTEXT "Channel:",IDT_1722,99,73,34,8 COMBOBOX IDC_COMBO_HD_ID,133,71,26,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "ID:",IDT_1723,117,72,15,8 + LTEXT "ID:",IDT_1723,117,73,15,8 COMBOBOX IDC_COMBO_HD_LUN,185,71,26,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "LUN:",IDT_1724,168,72,15,8 + LTEXT "LUN:",IDT_1724,168,73,15,8 COMBOBOX IDC_COMBO_HD_CHANNEL_IDE,134,71,77,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Progress:",IDT_1752,7,7,204,9 @@ -537,7 +537,7 @@ BEGIN LTEXT "Floppy drives:",IDT_1737,7,7,43,8 COMBOBOX IDC_COMBO_FD_TYPE,33,85,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Type:",IDT_1738,7,86,24,8 + LTEXT "Type:",IDT_1738,7,87,24,8 CONTROL "Turbo timings",IDC_CHECKTURBO,"Button", BS_AUTOCHECKBOX | WS_TABSTOP,131,86,64,10 CONTROL "Check BPB",IDC_CHECKBPB,"Button", @@ -554,34 +554,37 @@ BEGIN LTEXT "CD-ROM drives:",IDT_1739,7,7,50,8 COMBOBOX IDC_COMBO_CD_BUS,33,85,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Bus:",IDT_1740,7,86,24,8 + LTEXT "Bus:",IDT_1740,7,87,24,8 COMBOBOX IDC_COMBO_CD_ID,170,85,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "ID:",IDT_1741,131,86,38,8 + LTEXT "ID:",IDT_1741,131,87,38,8 COMBOBOX IDC_COMBO_CD_LUN,239,85,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "LUN:",IDT_1742,200,86,38,8 + LTEXT "LUN:",IDT_1742,200,87,38,8 COMBOBOX IDC_COMBO_CD_CHANNEL_IDE,170,85,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Channel:",IDT_1743,131,86,38,8 + LTEXT "Channel:",IDT_1743,131,87,38,8 + COMBOBOX IDC_COMBO_CD_SPEED,33,105,90,12,CBS_DROPDOWNLIST | + WS_VSCROLL | WS_TABSTOP + LTEXT "Speed:",IDT_1758,7,107,24,8 CONTROL "List1",IDC_LIST_ZIP_DRIVES,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | - WS_TABSTOP,7,117,253,60 - LTEXT "ZIP drives:",IDT_1739,7,107,50,8 - COMBOBOX IDC_COMBO_ZIP_BUS,33,184,90,12,CBS_DROPDOWNLIST | + WS_TABSTOP,7,137,253,60 + LTEXT "ZIP drives:",IDT_1739,7,127,50,8 + COMBOBOX IDC_COMBO_ZIP_BUS,73,204,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Bus:",IDT_1753,7,185,24,8 - COMBOBOX IDC_COMBO_ZIP_ID,170,184,22,12,CBS_DROPDOWNLIST | + LTEXT "Bus:",IDT_1753,57,206,14,8 + COMBOBOX IDC_COMBO_ZIP_ID,190,204,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "ID:",IDT_1754,131,185,38,8 - COMBOBOX IDC_COMBO_ZIP_LUN,239,184,22,12,CBS_DROPDOWNLIST | + LTEXT "ID:",IDT_1754,171,206,18,8 + COMBOBOX IDC_COMBO_ZIP_LUN,239,204,22,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "LUN:",IDT_1755,200,185,38,8 - COMBOBOX IDC_COMBO_ZIP_CHANNEL_IDE,170,184,90,12,CBS_DROPDOWNLIST | + LTEXT "LUN:",IDT_1755,220,206,18,8 + COMBOBOX IDC_COMBO_ZIP_CHANNEL_IDE,200,204,60,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP - LTEXT "Channel:",IDT_1756,131,185,38,8 + LTEXT "Channel:",IDT_1756,171,206,28,8 CONTROL "ZIP 250",IDC_CHECK250,"Button", - BS_AUTOCHECKBOX | WS_TABSTOP,7,204,64,10 + BS_AUTOCHECKBOX | WS_TABSTOP,7,204,44,10 END @@ -955,6 +958,7 @@ BEGIN IDS_2175 "ZIP images (*.IM?;*.ZDI)\0*.IM?;*.ZDI\0All files (*.*)\0*.*\0" IDS_2176 "ZIP images (*.IM?;*.ZDI)\0*.IM?;*.ZDI\0" IDS_2177 "ZIP %i (%03i): %ls" + IDS_2178 "Speed" IDS_4096 "Hard disk (%s)" IDS_4097 "%01i:%01i" diff --git a/src/win/resource.h b/src/win/resource.h index 3112d462a..af9d94b77 100644 --- a/src/win/resource.h +++ b/src/win/resource.h @@ -8,7 +8,7 @@ * * Windows resource defines. * - * Version: @(#)resource.h 1.0.21 2018/02/11 + * Version: @(#)resource.h 1.0.22 2018/03/06 * * Authors: Sarah Walker, * Miran Grca, @@ -90,6 +90,7 @@ #define IDT_1755 1755 /* LUN: */ #define IDT_1756 1756 /* Channel: */ #define IDT_1757 1757 /* Progress: */ +#define IDT_1758 1758 /* Speed: */ /* @@ -195,6 +196,7 @@ #define IDC_COMBO_ZIP_LUN 1163 #define IDC_COMBO_ZIP_CHANNEL_IDE 1164 #define IDC_CHECK250 1165 +#define IDC_COMBO_CD_SPEED 1166 #define IDC_SLIDER_GAIN 1180 /* sound gain dialog */ diff --git a/src/win/win_settings.c b/src/win/win_settings.c index fd5c222f2..6a746ae53 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -8,7 +8,7 @@ * * Windows 86Box Settings dialog handler. * - * Version: @(#)win_settings.c 1.0.40 2018/03/06 + * Version: @(#)win_settings.c 1.0.41 2018/03/07 * * Author: Miran Grca, * @@ -3961,6 +3961,7 @@ static BOOL win_settings_cdrom_drives_recalc_list(HWND hwndList) { fsid = combo_id_to_format_string_id(temp_cdrom_drives[i].bus_type); + lvI.iSubItem = 0; switch (temp_cdrom_drives[i].bus_type) { case CDROM_BUS_DISABLED: @@ -3989,6 +3990,21 @@ static BOOL win_settings_cdrom_drives_recalc_list(HWND hwndList) if (ListView_InsertItem(hwndList, &lvI) == -1) return FALSE; + + lvI.iSubItem = 1; + if (temp_cdrom_drives[i].bus_type == CDROM_BUS_DISABLED) + lvI.pszText = plat_get_string(IDS_2152); + else { + wsprintf(szText, L"%ix", temp_cdrom_drives[i].speed); + lvI.pszText = szText; + } + lvI.iItem = i; + lvI.iImage = 0; + + if (ListView_SetItem(hwndList, &lvI) == -1) + { + return FALSE; + } } return TRUE; @@ -4102,7 +4118,7 @@ static BOOL win_settings_cdrom_drives_init_columns(HWND hwndList) lvc.iSubItem = 0; lvc.pszText = plat_get_string(IDS_2082); - lvc.cx = 392; + lvc.cx = 342; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 0, &lvc) == -1) @@ -4110,6 +4126,17 @@ static BOOL win_settings_cdrom_drives_init_columns(HWND hwndList) return FALSE; } + lvc.iSubItem = 1; + lvc.pszText = plat_get_string(IDS_2178); + + lvc.cx = 50; + lvc.fmt = LVCFMT_LEFT; + + if (ListView_InsertColumn(hwndList, 1, &lvc) == -1) + { + return FALSE; + } + return TRUE; } @@ -4130,7 +4157,6 @@ static BOOL win_settings_zip_drives_init_columns(HWND hwndList) return FALSE; } - lvc.iSubItem = 1; lvc.pszText = plat_get_string(IDS_2143); @@ -4294,6 +4320,21 @@ static void win_settings_cdrom_drives_update_item(HWND hwndList, int i) { return; } + + lvI.iSubItem = 1; + if (temp_cdrom_drives[i].bus_type == CDROM_BUS_DISABLED) + lvI.pszText = plat_get_string(IDS_2152); + else { + wsprintf(szText, L"%ix", temp_cdrom_drives[i].speed); + lvI.pszText = szText; + } + lvI.iItem = i; + lvI.iImage = 0; + + if (ListView_SetItem(hwndList, &lvI) == -1) + { + return; + } } static void win_settings_zip_drives_update_item(HWND hwndList, int i) @@ -4367,6 +4408,13 @@ static void cdrom_add_locations(HWND hdlg) } } + h = GetDlgItem(hdlg, IDC_COMBO_CD_SPEED); + for (i = 1; i <= 52; i++) + { + wsprintf(lptsTemp, L"%ix", i); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) lptsTemp); + } + h = GetDlgItem(hdlg, IDC_COMBO_CD_ID); for (i = 0; i < 16; i++) { @@ -4390,6 +4438,7 @@ static void cdrom_add_locations(HWND hdlg) free(lptsTemp); } + static void cdrom_recalc_location_controls(HWND hdlg, int assign_id) { int i = 0; @@ -4416,6 +4465,16 @@ static void cdrom_recalc_location_controls(HWND hdlg, int assign_id) EnableWindow(h, FALSE); ShowWindow(h, SW_HIDE); + h = GetDlgItem(hdlg, IDC_COMBO_CD_SPEED); + if (bus == CDROM_BUS_DISABLED) { + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + } else { + ShowWindow(h, SW_SHOW); + EnableWindow(h, TRUE); + SendMessage(h, CB_SETCURSEL, temp_cdrom_drives[cdlv_current_sel].speed - 1, 0); + } + switch(bus) { case CDROM_BUS_ATAPI_PIO_ONLY: /* ATAPI (PIO-only) */ @@ -4496,6 +4555,7 @@ static void zip_add_locations(HWND hdlg) free(lptsTemp); } + static void zip_recalc_location_controls(HWND hdlg, int assign_id) { int i = 0; @@ -4969,6 +5029,8 @@ win_settings_other_removable_devices_proc(HWND hdlg, UINT message, WPARAM wParam } cdrom_untrack(cdlv_current_sel); assign = (temp_cdrom_drives[cdlv_current_sel].bus_type == b2) ? 0 : 1; + if (temp_cdrom_drives[cdlv_current_sel].bus_type == CDROM_BUS_DISABLED) + temp_cdrom_drives[cdlv_current_sel].speed = 8; if ((b2 == CDROM_BUS_ATAPI_PIO_ONLY) && (temp_cdrom_drives[cdlv_current_sel].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA)) assign = 0; else if ((b2 == CDROM_BUS_ATAPI_PIO_AND_DMA) && (temp_cdrom_drives[cdlv_current_sel].bus_type == CDROM_BUS_ATAPI_PIO_ONLY)) @@ -5030,6 +5092,20 @@ cdrom_bus_skip: rd_ignore_change = 0; return FALSE; + case IDC_COMBO_CD_SPEED: + if (rd_ignore_change) + { + return FALSE; + } + + rd_ignore_change = 1; + h = GetDlgItem(hdlg, IDC_COMBO_CD_SPEED); + temp_cdrom_drives[cdlv_current_sel].speed = SendMessage(h, CB_GETCURSEL, 0, 0) + 1; + h = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); + win_settings_cdrom_drives_update_item(h, cdlv_current_sel); + rd_ignore_change = 0; + return FALSE; + case IDC_COMBO_ZIP_BUS: if (rd_ignore_change) { From 574f633a62e9a058236aea74f7731a5fea050ab3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Mar 2018 20:17:04 +0100 Subject: [PATCH 23/28] Fixed the makefile's header revision and date. --- src/mem.c | 1 + src/win/Makefile.mingw | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mem.c b/src/mem.c index 7c40b6b0a..291a47deb 100644 --- a/src/mem.c +++ b/src/mem.c @@ -16,6 +16,7 @@ #include "io.h" #include "mem.h" #include "rom.h" + #ifdef USE_DYNAREC # include "cpu/codegen.h" #else diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index a5d7ddd2a..81e2fbd64 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.109 2018/03/06 +# Version: @(#)Makefile.mingw 1.0.110 2018/03/07 # # Authors: Miran Grca, # Fred N. van Kempen, From 2da4a5942328910f0b19828ca66e87627d5c2157 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Mar 2018 22:14:58 +0100 Subject: [PATCH 24/28] Increased the maximum selectable CD-ROM speed to 56x. --- src/win/win_settings.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 6a746ae53..d06183d72 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -8,7 +8,7 @@ * * Windows 86Box Settings dialog handler. * - * Version: @(#)win_settings.c 1.0.41 2018/03/07 + * Version: @(#)win_settings.c 1.0.42 2018/03/07 * * Author: Miran Grca, * @@ -4409,7 +4409,7 @@ static void cdrom_add_locations(HWND hdlg) } h = GetDlgItem(hdlg, IDC_COMBO_CD_SPEED); - for (i = 1; i <= 52; i++) + for (i = 1; i <= 56; i++) { wsprintf(lptsTemp, L"%ix", i); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) lptsTemp); From c279c0912d08736882965ae1d5c807812885a76e Mon Sep 17 00:00:00 2001 From: Melissa Goad Date: Fri, 9 Mar 2018 23:44:02 -0600 Subject: [PATCH 25/28] More hacks to get RIVA 128 further --- src/video/vid_nv_riva128.c | 43 +++++++++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 12 deletions(-) diff --git a/src/video/vid_nv_riva128.c b/src/video/vid_nv_riva128.c index 2dbe47a3c..6014bc5f9 100644 --- a/src/video/vid_nv_riva128.c +++ b/src/video/vid_nv_riva128.c @@ -84,6 +84,7 @@ typedef struct riva128_t struct { + uint32_t cache_error; uint32_t intr; uint32_t intr_en; @@ -572,6 +573,17 @@ const char* riva128_pfifo_interrupts[32] = } } +void riva128_pfifo_interrupt(int num, void *p) +{ + riva128_t *riva128 = (riva128_t *)p; + + riva128->pfifo.intr |= (1 << num); + + if(num == 0) riva128->pfifo.cache_error = 0x11; + + riva128_pmc_interrupt(8, riva128); +} + uint8_t riva128_pfifo_read(uint32_t addr, void *p) { riva128_t *riva128 = (riva128_t *)p; @@ -581,6 +593,18 @@ const char* riva128_pfifo_interrupts[32] = switch(addr) { + case 0x002080: + ret = riva128->pfifo.cache_error & 0xff; + break; + case 0x002081: + ret = (riva128->pfifo.cache_error >> 8) & 0xff; + break; + case 0x002082: + ret = (riva128->pfifo.cache_error >> 16) & 0xff; + break; + case 0x002083: + ret = (riva128->pfifo.cache_error >> 24) & 0xff; + break; case 0x002100: ret = riva128->pfifo.intr & 0xff; break; @@ -758,18 +782,13 @@ const char* riva128_pfifo_interrupts[32] = case 0x003204: riva128->pfifo.caches[1].chanid = val; break; + //HACKS + case 0x002500: + riva128_pfifo_interrupt(0, riva128); + break; } } - void riva128_pfifo_interrupt(int num, void *p) -{ - riva128_t *riva128 = (riva128_t *)p; - - riva128->pfifo.intr |= (1 << num); - - riva128_pmc_interrupt(8, riva128); -} - uint8_t riva128_ptimer_read(uint32_t addr, void *p) { riva128_t *riva128 = (riva128_t *)p; @@ -2035,9 +2054,9 @@ uint8_t riva128_user_read(uint32_t addr, void *p) addr &= 0xffffff; //This logging condition is necessary to prevent A CATASTROPHIC LOG BLOWUP when polling PTIMER or PFIFO. DO NOT REMOVE. - if(/*!((addr >= 0x009000) && (addr <= 0x009fff)) && */!((addr >= 0x002000) && (addr <= 0x003fff))/* && !((addr >= 0x000000) + if(/*!((addr >= 0x009000) && (addr <= 0x009fff)) && !((addr >= 0x002000) && (addr <= 0x003fff)) && !((addr >= 0x000000) && (addr <= 0x000003)) && !((addr <= 0x680fff) && (addr >= 0x680000)) && !((addr >= 0x0c0000) && (addr <= 0x0cffff)) - && !((addr >= 0x110000) && (addr <= 0x11ffff)) && !(addr <= 0x000fff) && (addr >= 0x000000)*/) pclog("RIVA 128 MMIO read %08X %04X:%08X\n", addr, CS, cpu_state.pc); + && !((addr >= 0x110000) && (addr <= 0x11ffff)) && !(addr <= 0x000fff) && (addr >= 0x000000)*/1) pclog("RIVA 128 MMIO read %08X %04X:%08X\n", addr, CS, cpu_state.pc); if((addr >= 0x000000) && (addr <= 0x000fff)) ret = riva128_pmc_read(addr, riva128); if((addr >= 0x001000) && (addr <= 0x001fff)) ret = riva128_pbus_read(addr, riva128); @@ -2113,7 +2132,7 @@ uint8_t riva128_user_read(uint32_t addr, void *p) addr &= 0xffffff; //DO NOT REMOVE. This fixes a monstrous log blowup in win9x's drivers when accessing PFIFO. - if(!((addr >= 0x002000) && (addr <= 0x003fff))/* && !((addr >= 0xc0000) && (addr <= 0xcffff)) && (addr != 0x000140)*/) pclog("RIVA 128 MMIO write %08X %08X %04X:%08X\n", addr, val, CS, cpu_state.pc); + if(/*!((addr >= 0x002000) && (addr <= 0x003fff)) && !((addr >= 0xc0000) && (addr <= 0xcffff)) && (addr != 0x000140)*/1) pclog("RIVA 128 MMIO write %08X %08X %04X:%08X\n", addr, val, CS, cpu_state.pc); if((addr >= 0x000000) && (addr <= 0x000fff)) riva128_pmc_write(addr, val, riva128); From c1cb892c09555204bd0e0b2ae5a026176bb40b8f Mon Sep 17 00:00:00 2001 From: Melissa Goad Date: Sat, 10 Mar 2018 09:45:24 -0600 Subject: [PATCH 26/28] Add more accurate CGA waitstates --- src/video/vid_cga.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 69d1350e9..79dc94dc9 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -106,6 +106,20 @@ uint8_t cga_in(uint16_t addr, void *p) return 0xFF; } +void cga_waitstates(void *p) +{ + cga_t *cga = (cga_t *)p; + int cycle = ((int)(((cga->dispontime - cga->vidtime) * 2) / CGACONST)); + + cycles -= 8 - (cycle & 7); + + cycle = ((int)(((cga->dispontime - cga->vidtime) * 2) / CGACONST)); + cycles -= 16 - (cycle & 15); + + cycle = ((int)(((cga->dispontime - cga->vidtime) * 2) / CGACONST)); + cycles -= 3 - (cycle % 3); +} + void cga_write(uint32_t addr, uint8_t val, void *p) { cga_t *cga = (cga_t *)p; @@ -117,13 +131,13 @@ void cga_write(uint32_t addr, uint8_t val, void *p) cga->charbuffer[(((int)(((cga->dispontime - cga->vidtime) * 2) / CGACONST)) & 0xfc) | 1] = val; } egawrites++; - cycles -= 4; + cga_waitstates(cga); } uint8_t cga_read(uint32_t addr, void *p) { cga_t *cga = (cga_t *)p; - cycles -= 4; + cga_waitstates(cga); if (cga->snow_enabled) { cga->charbuffer[ ((int)(((cga->dispontime - cga->vidtime) * 2) / CGACONST)) & 0xfc] = cga->vram[addr & 0x3fff]; From c0bb63bd8232e543574ee2244b71d79205899b7e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 10 Mar 2018 21:46:38 +0100 Subject: [PATCH 27/28] Fixed minor bugs in the NCR 53C810 and Adaptec/Buslogic SCSI emulations; FDC reads and writes now use up ISA cycles; Fixed Mach64 mono-source blits, fixes NT 3.1 and 3.5 drivers; Incresed maximum emulated CD-ROM speed to 72x; Fixed a minor bug in the Cirrus Logic CL-GD 54xx emulation. --- src/floppy/fdc.c | 8 +++++++- src/scsi/scsi_ncr53c810.c | 4 +--- src/scsi/scsi_x54x.c | 3 ++- src/video/vid_ati_mach64.c | 33 +++++++++++++++++++++++++-------- src/video/vid_cl54xx.c | 4 ++-- src/win/win_settings.c | 4 ++-- 6 files changed, 39 insertions(+), 17 deletions(-) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index 45648c706..04b9c118b 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -9,7 +9,7 @@ * Implementation of the NEC uPD-765 and compatible floppy disk * controller. * - * Version: @(#)fdc->c 1.0.17 2018/03/02 + * Version: @(#)fdc->c 1.0.18 2018/03/08 * * Authors: Sarah Walker, * Miran Grca, @@ -689,6 +689,8 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc_log("Write FDC %04X %02X\n", addr, val); + cycles -= ISA_CYCLES(8); + switch (addr&7) { case 0: return; @@ -1145,7 +1147,11 @@ fdc_read(uint16_t addr, void *priv) { fdc_t *fdc = (fdc_t *) priv; uint8_t ret; + int drive; + + cycles -= ISA_CYCLES(8); + switch (addr&7) { case 0: /* STA */ ret = 0xff; diff --git a/src/scsi/scsi_ncr53c810.c b/src/scsi/scsi_ncr53c810.c index b7b7b2b32..339e72da0 100644 --- a/src/scsi/scsi_ncr53c810.c +++ b/src/scsi/scsi_ncr53c810.c @@ -10,7 +10,7 @@ * NCR and later Symbios and LSI. This controller was designed * for the PCI bus. * - * Version: @(#)scsi_ncr53c810.c 1.0.7 2018/03/07 + * Version: @(#)scsi_ncr53c810.c 1.0.8 2018/03/09 * * Authors: Paul Brook (QEMU) * Artyom Tarasenko (QEMU) @@ -1297,8 +1297,6 @@ again: ncr53c810_log("NCR 810: SCRIPTS: Waiting\n"); } - return; - ncr53c810_log("SCRIPTS execution stopped\n"); } diff --git a/src/scsi/scsi_x54x.c b/src/scsi/scsi_x54x.c index a234e6c3f..9ed018692 100644 --- a/src/scsi/scsi_x54x.c +++ b/src/scsi/scsi_x54x.c @@ -11,7 +11,7 @@ * series of SCSI Host Adapters made by Mylex. * These controllers were designed for various buses. * - * Version: @(#)scsi_x54x.c 1.0.18 2018/03/07 + * Version: @(#)scsi_x54x.c 1.0.19 2018/03/09 * * Authors: TheCollector1995, * Miran Grca, @@ -1065,6 +1065,7 @@ x54x_req_setup(x54x_t *dev, uint32_t CCBPointer, Mailbox32_t *Mailbox32) /* Fetch data from the Command Control Block. */ DMAPageRead(CCBPointer, (uint8_t *)&req->CmdBlock, sizeof(CCB32)); + x54x_add_to_period(sizeof(CCB32)); req->Is24bit = dev->Mbx24bit; req->CCBPointer = CCBPointer; diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 9c431a7fd..fe349f185 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -8,7 +8,7 @@ * * ATi Mach64 graphics card emulation. * - * Version: @(#)vid_ati_mach64.c 1.0.13 2018/03/02 + * Version: @(#)vid_ati_mach64.c 1.0.14 2018/03/10 * * Authors: Sarah Walker, * Miran Grca, @@ -959,6 +959,13 @@ void mach64_start_fill(mach64_t *mach64) mach64->accel.dst_width = (mach64->dst_height_width >> 16) & 0x1fff; mach64->accel.dst_height = mach64->dst_height_width & 0x1fff; + + if (((mach64->dp_src >> 16) & 7) == MONO_SRC_BLITSRC) + { + if (mach64->accel.dst_width & 7) + mach64->accel.dst_width = (mach64->accel.dst_width & ~7) + 8; + } + mach64->accel.x_count = mach64->accel.dst_width; mach64->accel.src_x = 0; @@ -1140,8 +1147,11 @@ void mach64_start_line(mach64_t *mach64) #define READ(addr, dat, width) if (width == 0) dat = svga->vram[((addr)) & mach64->vram_mask]; \ else if (width == 1) dat = *(uint16_t *)&svga->vram[((addr) << 1) & mach64->vram_mask]; \ else if (width == 2) dat = *(uint32_t *)&svga->vram[((addr) << 2) & mach64->vram_mask]; \ - else dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> ((addr) & 7)) & 1; - + else if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> ((addr) & 7)) & 1; \ + else dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> (7 - ((addr) & 7))) & 1; + +#define READ1BPP(addr, dat, width) + #define MIX switch (mix ? mach64->accel.mix_fg : mach64->accel.mix_bg) \ { \ case 0x0: dest_dat = ~dest_dat; break; \ @@ -1161,7 +1171,7 @@ void mach64_start_line(mach64_t *mach64) case 0xe: dest_dat = ~src_dat & dest_dat; break; \ case 0xf: dest_dat = ~(src_dat | dest_dat); break; \ } - + #define WRITE(addr, width) if (width == 0) \ { \ svga->vram[(addr) & mach64->vram_mask] = dest_dat; \ @@ -1179,10 +1189,17 @@ void mach64_start_line(mach64_t *mach64) } \ else \ { \ - if (dest_dat & 1) \ - svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << ((addr) & 7); \ - else \ - svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << ((addr) & 7)); \ + if (dest_dat & 1) { \ + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ + svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << ((addr) & 7); \ + else \ + svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << (7 - ((addr) & 7)); \ + } else { \ + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ + svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << ((addr) & 7)); \ + else \ + svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << (7 - ((addr) & 7)));\ + } \ svga->changedvram[(((addr) >> 3) & mach64->vram_mask) >> 12] = changeframecount; \ } diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 7d355c197..d53a8404f 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -9,7 +9,7 @@ * Emulation of select Cirrus Logic cards (CL-GD 5428, * CL-GD 5429, 5430, 5434 and 5436 are supported). * - * Version: @(#)vid_cl_54xx.c 1.0.10 2018/03/02 + * Version: @(#)vid_cl_54xx.c 1.0.11 2018/03/08 * * Authors: Sarah Walker, * Barry Rodewald, @@ -2074,7 +2074,7 @@ gd54xx_start_blit(uint32_t cpu_dat, int count, gd54xx_t *gd54xx, svga_t *svga) switch (gd54xx->blt.rop) { case 0x00: dst = 0; break; case 0x05: dst = src & dst; break; - case 0x06: dst = dst; break; + case 0x06: /* dst = dst; */ break; case 0x09: dst = src & ~dst; break; case 0x0b: dst = ~ dst; break; case 0x0d: dst = src; break; diff --git a/src/win/win_settings.c b/src/win/win_settings.c index d06183d72..27359b286 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -8,7 +8,7 @@ * * Windows 86Box Settings dialog handler. * - * Version: @(#)win_settings.c 1.0.42 2018/03/07 + * Version: @(#)win_settings.c 1.0.43 2018/03/10 * * Author: Miran Grca, * @@ -4409,7 +4409,7 @@ static void cdrom_add_locations(HWND hdlg) } h = GetDlgItem(hdlg, IDC_COMBO_CD_SPEED); - for (i = 1; i <= 56; i++) + for (i = 1; i <= 72; i++) { wsprintf(lptsTemp, L"%ix", i); SendMessage(h, CB_ADDSTRING, 0, (LPARAM) lptsTemp); From e5442e367b801130f993e0fdfc5402362d4ef63f Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 11 Mar 2018 00:16:20 +0100 Subject: [PATCH 28/28] Tweaked NCR 53C810 timings a bit and made it no longer return on bad selection or non-data commands, fixes NT 3.1. --- src/scsi/scsi_ncr53c810.c | 78 +++++++++++++++++++++++++-------------- 1 file changed, 50 insertions(+), 28 deletions(-) diff --git a/src/scsi/scsi_ncr53c810.c b/src/scsi/scsi_ncr53c810.c index 339e72da0..04b4e9e40 100644 --- a/src/scsi/scsi_ncr53c810.c +++ b/src/scsi/scsi_ncr53c810.c @@ -10,7 +10,7 @@ * NCR and later Symbios and LSI. This controller was designed * for the PCI bus. * - * Version: @(#)scsi_ncr53c810.c 1.0.8 2018/03/09 + * Version: @(#)scsi_ncr53c810.c 1.0.9 2018/03/10 * * Authors: Paul Brook (QEMU) * Artyom Tarasenko (QEMU) @@ -653,12 +653,14 @@ ncr53c810_add_msg_byte(ncr53c810_t *dev, uint8_t data) } -static void +static int ncr53c810_do_command(ncr53c810_t *dev, uint8_t id) { scsi_device_t *sd; uint8_t buf[12]; + int64_t p; + double period; memset(buf, 0, 12); @@ -674,7 +676,7 @@ ncr53c810_do_command(ncr53c810_t *dev, uint8_t id) if (((id == -1) || !scsi_device_present(id, dev->current_lun))) { ncr53c810_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Bad Selection\n", id, dev->current_lun, buf[0]); ncr53c810_bad_selection(dev, id); - return; + return 0; } dev->current = (ncr53c810_request*)malloc(sizeof(ncr53c810_request)); @@ -701,21 +703,27 @@ ncr53c810_do_command(ncr53c810_t *dev, uint8_t id) if ((sd->Phase == SCSI_PHASE_DATA_IN) && (sd->BufferLength > 0)) { ncr53c810_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DI\n", id, dev->current_lun, buf[0]); ncr53c810_set_phase(dev, PHASE_DI); - dev->timer_period = scsi_device_get_callback(dev->current->tag, dev->current_lun); - if (dev->timer_period <= 0LL) { - period = ((double) sd->BufferLength) * 0.2 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ - dev->timer_period = (int64_t) period; - } + p = scsi_device_get_callback(dev->current->tag, dev->current_lun); + if (p <= 0LL) { + period = ((double) sd->BufferLength) * 0.1 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ + dev->timer_period += (int64_t) period; + } else + dev->timer_period += p; + return 1; } else if ((sd->Phase == SCSI_PHASE_DATA_OUT) && (sd->BufferLength > 0)) { ncr53c810_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DO\n", id, dev->current_lun, buf[0]); ncr53c810_set_phase(dev, PHASE_DO); - dev->timer_period = scsi_device_get_callback(dev->current->tag, dev->current_lun); - if (dev->timer_period <= 0LL) { - period = ((double) sd->BufferLength) * 0.2 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ - dev->timer_period = (int64_t) period; - } - } else + p = scsi_device_get_callback(dev->current->tag, dev->current_lun); + if (p <= 0LL) { + period = ((double) sd->BufferLength) * 0.1 * ((double) TIMER_USEC); /* Fast SCSI: 10000000 bytes per second */ + dev->timer_period += (int64_t) period; + } else + dev->timer_period += p; + return 1; + } else { ncr53c810_command_complete(dev, sd->Status); + return 0; + } } @@ -931,7 +939,7 @@ static void ncr53c810_process_script(ncr53c810_t *dev) { uint32_t insn, addr, id, buf[2], dest; - int opcode, insn_processed = 0, reg, operator, cond, jmp, n, i; + int opcode, insn_processed = 0, reg, operator, cond, jmp, n, i, c; int32_t offset; uint8_t op0, op1, data8, mask, data[7], *pp; @@ -943,7 +951,11 @@ again: /* If we receive an empty opcode increment the DSP by 4 bytes instead of 8 and execute the next opcode at that location */ dev->dsp += 4; - goto again; + dev->timer_period += (10LL * TIMER_USEC); + if (insn_processed < 100) + goto again; + else + return; } addr = read_dword(dev, dev->dsp + 4); ncr53c810_log("SCRIPTS dsp=%08x opcode %08x arg %08x\n", dev->dsp, insn, addr); @@ -955,9 +967,8 @@ again: case 0: /* Block move. */ ncr53c810_log("00: Block move\n"); if (dev->sist1 & NCR_SIST1_STO) { - ncr53c810_log("Delayed select timeout\n"); + ncr53c810_log("Delayed select timeout\n"); dev->sstop = 1; - dev->timer_period = dev->timer_enabled = 0; break; } ncr53c810_log("Block Move DBC=%d\n", dev->dbc); @@ -1002,9 +1013,18 @@ again: break; case PHASE_CMD: ncr53c810_log("Command Phase\n"); - ncr53c810_do_command(dev, dev->sdid); + c = ncr53c810_do_command(dev, dev->sdid); + + if (!c || dev->sstop || dev->waiting || ((dev->sstat1 & 0x7) == PHASE_ST)) + break; + dev->dfifo = dev->dbc & 0xff; dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); + + dev->timer_period += (40LL * TIMER_USEC); + + if (dev->dcntl & NCR_DCNTL_SSM) + ncr53c810_script_dma_interrupt(dev, NCR_DSTAT_SSI); return; case PHASE_ST: ncr53c810_log("Status Phase\n"); @@ -1177,7 +1197,6 @@ again: if (dev->sist1 & NCR_SIST1_STO) { ncr53c810_log("Delayed select timeout\n"); dev->sstop = 1; - dev->timer_period = dev->timer_enabled = 0; break; } cond = jmp = (insn & (1 << 19)) != 0; @@ -1269,6 +1288,8 @@ again: ncr53c810_log("%02X: Unknown command\n", (uint8_t) (insn >> 30)); } + dev->timer_period += (40LL * TIMER_USEC); + ncr53c810_log("instructions processed %i\n", insn_processed); if (insn_processed > 10000 && !dev->waiting) { /* Some windows drivers make the device spin waiting for a memory @@ -1304,7 +1325,8 @@ again: static void ncr53c810_execute_script(ncr53c810_t *dev) { - dev->timer_period = 10LL * TIMER_USEC; + dev->sstop = 0; + dev->timer_period = 40LL * TIMER_USEC; dev->timer_enabled = 1; } @@ -1315,18 +1337,18 @@ ncr53c810_callback(void *p) ncr53c810_t *dev = (ncr53c810_t *) p; dev->timer_period = 0; - if (!dev->waiting) - ncr53c810_process_script(dev); + if (!dev->sstop) { + if (dev->waiting) + dev->timer_period = 40LL * TIMER_USEC; + else + ncr53c810_process_script(dev); + } if (dev->sstop) { - dev->timer_period = 0; dev->timer_enabled = 0; - return; + dev->timer_period = 0; } else dev->timer_enabled = 1; - - if (dev->timer_period == 0) - dev->timer_period = 50LL * TIMER_USEC; }