From 7c4e2c82d41a3e5b198ac178b9a07c1fbf2bb505 Mon Sep 17 00:00:00 2001 From: starfrost013 Date: Thu, 3 Apr 2025 01:40:59 +0100 Subject: [PATCH] Split up logs into two verbosity levels (one is just init/invalid regs/object submission/pci, everything else is verbose_only) --- doc/nvidia_notes/status.xlsx | Bin 15983 -> 16043 bytes src/include/86box/nv/vid_nv.h | 3 + src/include/86box/nv/vid_nv3.h | 6 +- src/video/nv/nv3/classes/nv3_class_00d_m2mf.c | 4 +- .../nv/nv3/classes/nv3_class_shared_methods.c | 24 +++--- src/video/nv/nv3/nv3_core.c | 32 +++----- src/video/nv/nv3/render/nv3_render_core.c | 13 ++-- src/video/nv/nv3/subsystems/nv3_pbus.c | 16 ++-- src/video/nv/nv3/subsystems/nv3_pextdev.c | 16 ++-- src/video/nv/nv3/subsystems/nv3_pfb.c | 29 ++++--- src/video/nv/nv3/subsystems/nv3_pfifo.c | 73 +++++++++--------- src/video/nv/nv3/subsystems/nv3_pgraph.c | 24 +++--- src/video/nv/nv3/subsystems/nv3_pmc.c | 26 +++---- src/video/nv/nv3/subsystems/nv3_pme.c | 12 +-- src/video/nv/nv3/subsystems/nv3_pramdac.c | 18 +++-- src/video/nv/nv3/subsystems/nv3_pramin.c | 28 +++---- .../nv/nv3/subsystems/nv3_pramin_ramfc.c | 4 +- .../nv/nv3/subsystems/nv3_pramin_ramht.c | 6 +- .../nv/nv3/subsystems/nv3_pramin_ramro.c | 9 +-- src/video/nv/nv3/subsystems/nv3_ptimer.c | 14 ++-- src/video/nv/nv3/subsystems/nv3_pvideo.c | 16 ++-- src/video/nv/nv3/subsystems/nv3_user.c | 6 +- src/video/nv/nv_base.c | 51 ++++++++---- 23 files changed, 219 insertions(+), 211 deletions(-) diff --git a/doc/nvidia_notes/status.xlsx b/doc/nvidia_notes/status.xlsx index 6fc2aaa7411f99190fe376bd6114dfa499f86c48..1ddb8b34dbfc1e4e750f4992b5d7e696dbe20b39 100644 GIT binary patch delta 7829 zcmZ8`Wl$bn6Xk;j2n2U`clY4#?hxGFWpD@{9$Z6$ySux4Ah;&D2e&2J+I_3O`PF^r z)ZCe=KHaDLp81veS8u@rE#8Uc22dc-GWG8lv=CA^mp1vlIQ& zgt8wBGEi5cT=a;_gCH5R{M(^CM>*`6?r@aNT@t<&XX1=LX3RmUn|=&b(YN--4{$Yp z@58mLya&;~G+>rpLx|TV+I+1-ST8237+r_dQn{bz@}Me(CDCl(eW-zIP);65&D51{ zrRzBnyqGcUWex;@;H|A2>Y#(&;wVd1nwkYm&Iq(YIN75a>M=82qpv6aW@Dshc4KiX=}FE4pS-8wIku4A~x z;=UiRujpru5tZ4>xUOOF4a6JRSydFHOBsy?oiL=p?YT0p2ue$*4t#G~O2$Zr z4HtF;ETPcjbydbu^Ylc3ISEw5RILV9-z_aI#z#d7cVr_%0c%Hp(W zbDZ)1fb?iP9Y^oU1Aj&iwXq=i18aq+AZ2TdcF*o-sDZx6BV~{p?(L`cS+t%<^GkR% z7qO-UA`}Qf`MC5JZCgq5)}6}K zYlu{?zi*B;P5@sl!;U!=I&6KoVb5@z>FI(@XWZ|*wyW^q>rTpk>&I22_Hc8Ng3e?P z-@v1Xj0#J2k{v}myYune zsm+b62(ZlvL`-rky%h&MZII%=tj9|5%U$OOizMx#wy37okYJ&Z0_5m;;@?vC9*q!A z(D2!eRy+E+>=qJGQ7fN;)4aZ9UHk#U&J4!74hTaenNo9SoORX#b15lN2M3e=))Yut z#v24aZc)VgRg>q&FCBt&NzE`t%}XbbAFY0neQn~b5rTz-d{ z(vI%o8Fas4e%Vou@IY;_E~SG@DS~Eco-k>l!y-3ko=`EnFO-=QZ+>}~%Je(ApYX;2 z70O*CRi#r_Y!vIN=c6zs!AT~sbL%T)!y~kPbPsFF8DZ;;&z@MWGOu`X7*^;l!WIvK zF`^MAjst+q7Z67V9Dlp?2+-6=u6(hPhT+_3I?WUcfNilSAj+e?Ih;t;nxfPWVv;zJ z5x7>*(-YqW(;UR(x5ng#U(nDmVsH%ZG(sFL%zmdq^*yS8;AE0yj%3A^BTDoyVm>l? z=(6KdKYvTKudi>(_VqO>P0wM41x2FilNCfmIPw6z85Ac_i`vIIT~!|$Q@`eaj}yI} z4V`xXJ_+4$GC?4ZgIUG9}S0PnrQpZ+Ijj-$rh)qKE z5IByEI8Dj`AxV%^neWz)L(Jz9Z|iQ!$2-a9s`c=B2QUv3zf{83Qgp=}qbdgYmIW3B^O3Y;(!42Pqx2cRQ zT;b6D_8w_TX+Kb4+gUkm<%t|-H!P6u`vGryKA>(@Oiqn(ell4!ILS0Ny1}aL6Z72fJzNsL|9|?`B=jWW~h4zD;CLCAK7gb72_L? z#nsqR@F72F3JfqUWbUX?G-{P`rXa+gb{@A9*pW}9=lDZNITTZPHc8PUD#jxlhpW*H zocyM&G8ED8p!<%%Ei)-IB9TPEUg`wi%}UZ2A7TBw$h1~-A?)+!)CtQY*Cp)NSr25R`+hs(806hB3jGTu~t8il<0Xfrql!ctG#|TG~n<5s?ADG z$(%kLFK)~laIu_9alI#(dsP^qC|BN~<=(JqR66W_yzxE~{u`9wd@?Hpk}03SjW=Du zi1e0{hyk!%d?pJ<*lqFyF~eCOeF6vpmlG^WSQ1@&XnK++R~^jSkeyoka@!IP&#uaK zARUOL4-5?n846^Xi^YA7RkjxqWBv-QTPZtpitunXWRa-)iNRKGp%@Fn2SSWEg;xv^!5+k9MGkb7;I~*-w&Utubvbw<84Z5Po)oSsDx*m&pEDNv%uPS8omfGwg4Q3Osexl=eG|`w zUC>SFQ5hLt`Zc%L4>N4ui0J|JjON7V_|RW^O0Rx{ngJVaDy#poN%q9x7dpbbVUB5# zrwS=zCV9KMl-0r$u32?F-V4oTBY?U32grLVl!3?O=eTL(^M|M@W6b&bGaAk9Xge`A zl@lk9SHit&&*cXRbgnpp=Q@kU@oE#b%5v*h>)iqww5eHM)tHXvW0N0PF>7!`MWMto z8ke`q8&$)@V#I>TE7*qNP%ro)E1dGSTncNlA5_z^2Ybd_@Pix*eB`G7WhoHwFIS}) zIE1jEgjNOn1#Y{O^q`V(j!K|NjH>CvBsDfwy^d}Vh#$*^4iCk3tm76Bt+2>1Ivg%P zT-;|1;z5w%ceOrRRZhy9HI3*ekv#@|JDMWyS~NM1XltR}P^VpPZJKIdiNG^)x*D=N z71FCXdRkiWCQgW!8b6Cs2L@txCH)M0NDW0~y|Eh0_1HBT=QQ3+YK#qPY$a9N@YNkJ zj5X+{s0$`i!I&*kCeShZn@Q_&rD!Hp`g~GvU?`!R)1ZHYCz1;$aKTX6pxa5?hS!^a z=E!Nw{PVWQ&#ipN7+C4>+7MG~1C@76!LdIJ6!f25m`F_&2*!tj3}c2)-*rOy<0+esZE8#c$p~|mB)TUr8 zQn{$bjkC#ob_PIMIL<7*3VxiS0S_cg4b+Np-F(s#W^yu>&-KkI zL_!yDtF;6Ovq}ok`n#1HF5IecO2RY6kHR{0eS*(F#EVv*vYHvVj>^h-2D@8`W7vKU zdUEgc^+KQrN`<(mt#&dU`jso z(%3XAW5_WZ<8Z4T_%ri46+G+BP*hT(ZvM)VfuY^v1EiK z_#^@3Mg1^a%&=^E9ltANJ@4*!Nc-sA$bWgL&8CpYXyUtaavlra6p!tO$&2Vb zML&nZ^Ldp)W}723@Y}>pBc6VP#d3M`HS0Hi`}{jrL*lIYnGiudfk3wwahsU zU$MYs9Oy`DQdjV2Vi@4P=Wp~}j>yG_m!1yb3kro01@wh@|GDhLS+dL&eYWHhXXe4l z_Rk4okAuHW-TxCC{|Jm2SQYFNC~{|QolI6S9YPX5U*tenyy76tPYMr@C1iW(5I{Zkeup8w^I-^DYcGoO7ME%BF(UQZ>E-TZ&>9CIc4GG(qhE-G z$n_qIU}CU@ho)+NwDI!5I4DCssAka`=q@tX|F(wKBIl;}?KhJPIf}0=f=q_Ih-Wr! za-QOORC#&qmns2o1>?(xqKZ$y=&nOZ2@1$W;dQh|%Dl?pWn~5+lR)s5Xtj?Tv!QmV zdeBP}*$Bbuv@SBK@DHrOPxz&0HtS$F)gDlhSSWgJrP`J|m`a)&6VZuJl85w&&)G

adS$Bc<6~JsxR+I?AEBXI!?P<)tF3=CF_EdVdohX@$Czpzo77H{TRl zJw>~40IW#Wr#gd+#Z8co~_QmNZmpGrElFbt`QW%1lQuG2u#kuRoM#_N3pua?$Q_XrEq5q1+fuvDOl0GGn3+0ECS6aVhT5p zKr5?siPu6@U)KVe0AxkB4*p~R%3UH<{22t_gS>ulyVsJ3Y@I@M%M^$CD!;A3CjoGo z{OgOP3_@kHN&`{?!G|2jojnsGwzndCwGozQUA#rJ3fq|nY!5Naj0{I@7>|ThAHcbe z6-0*=%U*gm=171k((mdRz6Hoy|F-mQzoa!7oZ^@gs?uB%u1(W|^!!U>}X|^6KIL5V+2jc)CL35!GI3z8%^kVyAlFt5t`7qLqDRl>Jua{^Zqcf3f zI1sBsM!>la#8>$obryBmR0U@c>OLxDcLx6C!U~%s$uZVmWR!5%3EKKuSWNUszfw1J z^9Q*1+2N=8vA|EvWP4e*5vUAFwIP<9Z9HUKF5_ce9=?ma9&Jhh`NzCBp>^7~qOE6+ z@gk1285$*v_)VuNSl2lUIjLRXspa}GqyzFFJL{B*`QHPY3(aCtZ!xj*0R%#NqwU)) z#?{T+&fN8HaI|YFIIi%ZbYTB{{dis(nMgUn#(>>G2m!M^067BbTR=HVD*FXe!txj6 z!-i)uvfdI^1vvIFdIa_Uw{y7PF2e?Q!AE5IMg0+IUoB{ID)wa87NzrC&l2{bVlMUH z>NF#0fS(y>K-a^`S}m7UkHZ-*I~<8w_NK3CY1q-ik|4dce*qoUmRz2j43gXRdIkN2 zmEnp^fs?-|SyR6L_6HLci`2j*b%0l0v2ZjBuX86j(=<9vC7n^|v|!eaI?!eZhC?hC z+nSiu$7xo#>q_lXzDyVMH-eLa28Mv?#$4ZHZ@UeGZJ@{mIX5F zkyccEx;sTz{_?Ms*h7=YdSaO;0s14PHw*i^M1+~CclTd;F_nD0p_}U*n5h8LePqyQ zpujC|unc6x(qUkWG_xa`<#K?U$z5HZQhkIp#}@YCaK&>7p_XbZ&|}7N=-KR#;oSGV zh*YKGjQVc!N)Ijl-lHyuKLM$m7y-}$=#Pg@0DcmD z>U>+v3+I>UXGZvfs7dA_2?b}D^Hn=!IH8F{4*Z!?G%4SpYppp~K>G#% zQ>+)nF^}%l`Jqm)Za}X~sDQ7YS)gy7cAPdWxPmx`23>+H1M&XB{tIcd*yLu3pbE$K z2v10-ez!LYPD0Wb2SL>e@C(VKrtJAyqXWu$=m{nC$p?KLrd(x)?(xhz*hW5kJEZB- zossv-6FMTuy{p+mRClW{<1PU-z*hC`_m@rN(Rvhkp(bISk{dE#?CL?k(yi?GulrxU zgS*ztt9DKl4*6YcbNG8=!W0QAn-p>E7FO)>&~xoNW9h!UszlU>p-0wYGuS}c-{ut&-;5NaFlW2~pD%XlU z@;3NoIuh}|PmZdYz=hMy$}WsT(Q-pl;Ua8wP^S^=$1yYuSg2n*Bg5chKQqcN) z`;tmn5QrWu%|r;SxNJ+JcPeSD=k+Pvq1#a$Q~vxV1_8OUG|-IVEA7xIsS2eg&Hlhi zPVSdnG!pVlW|sW;It5l!rnKE6{owS#6*!4LBKy3B%05ugY}Y)b2&Ej#w*AR_$xE1+ z_!{pk2RdqWLHF1omd4J*;o})o((K1}Q3Ebb-J-pdMg%P&jm4co4a2Q2L8q6)eTvn zqqBnUQFA$fnqX({r?$b=gnWG%tz3dz{oFNV7rvtlnfE6nvNmNhSBpiQMK#5cg z)kIQLr}7BK8sUpLWx)I&c$2}|kSZ*P#RRpNo+xHOE3JnNd9jT;BU3(ckxhNd8-(Eg zzJ8t|uIb#xR~mVgw>HLQ#-&2|`lCROpJMZ-FuKAmhd>FMKhFKL>v`eaXPIOYuxw6t|hm z7i>t_qeBQ$MhZO3h&AY1n$c>=1xA&Z>b9@v9-JE#xNB77h0DZSnG68e0#9-;zQ?ke zP2y`$;7G%iT);_!?+wPrnc2;|5AEJJ$`}cR;Rv;=9=cd3S*vAO##xRXUnqrQJr87v*3cmIwpDE&g%aG+ns)k=x6q0>rE;>Pm$?k7q(Rz?Dga^xzyW z;`+wj4{Z1?qK`&h0H4#A+K3I1^Yx+BSR=zy9}TOhdbY7H<{-tI$CX5sj#rFcZh%;4 zoZJN}n?rd0W^ZwEQS-^6y^S0>AY(EBvTFxtvGa!>A14{hZowak{*Wz+=Nc9c|6K8C0H z$&09r#w1Q4z@!!4r$@^bk%XFuEezuY*|I@ICvD4W)_wcGz#hP7^ zKFaMqM#b0S=#6v+!Ut3YM78ltkfW0!jGIJsG0%` zr@X8hB4>uLOxUtxjfH^AJ>S-_uA_a{o;3rs)ZTF~Wm;8x29uH6Kt@{W`Fn-5F4?B2RFs^{a z>HM0)OJ1z8S*it4B|FPdx3u@J++M;G_fE7knN5!|YVu!hkq%7AbYa6U zQhn#zc2fJk@vFX()-NNt8;a*-T5!Oa`reH3E$gbkmwCU3Mtv8zk0I-j;v!Ry1056=qW$K7IsUQFqxxTmg-v-R9*hrnhtY&s-BNTPtyLZ8u z15F95_5)n-GWADY-1ben*~mgvd#lWQ`iV?8?wEeTH3f;dQ5MiJBrRwKs}}n$+F{%@ z)p0UCbd;oGjN0|XQ&Xyyv|6x4v9red@LcB<*0hVb%e+OjgDGcUEj)e`&PL;#+x!Ne zX6$M#p0e#BhC=ms@CeYySyv&%1kq+7XzwEDi3<-Qf=!FR!X7ZhS)jh$@Ub*JyMEQ8 znrwBexXJ$DTx8et&e`qEo)<5(Fr8C|xNk51{ODn;qzW&kb_MfYQczO`|8=1M3)Lh12bvRLhP)&BXW|MnLvoRWWd$km|F=o`?_C?fQGz7+ t|6d59fj}7l-F&lbzypHRF#lo-d?APlAq##dBm^-EmJ}j~ZQ}b2{XdXu%0~bI delta 7747 zcmZ8`WmFv9()9p=;2xadkl?Pt-3c&Aa19pRZ3ylJ2G<04cXx-u-QC^wBhOvmeb#;Z zS9R}Nr)zbeUAwAIk=Lnb`8ph^odthG8wLQleh&bk0RRA3D<&5kdrLzb8%svlA6CUc z9h)p(bT7UAm-kyPq4GZHs*S#$W^~7Dz{TTMu|gtSUtqiTB4t70^QnuRj7-Yo*mE!@ z(dPMiQWD$dCFHTNx>k;s@c=KHEu3EMJNfQ4wZ!Tvj&m@5j(OUo@)U?(LQ(Dy1ozdG zcNO8j9&=+H+UHwO{#auOk)#Q1Q9dsgN|AvHgRwY=+;;ER2xE42SffT-V%*L4f=^}R zP-HPA9q5M~kU2TyA3YXcfav0Eg1sVNu0qM8%BXgrsz7Z-T1X*O@CT*_?*pM|pvm}l zE>29TjID>FrzO)mVLK>F-?jc(y4=xTwTJCf$M`m(BZr&eZdEZ`PY2NIt4**D6n! z!!UQ|<$ak$MOd`Fw(Y_GvEwYm%UT1YkTKTL&w=%2++HpaEHm}X+)-B2j+V2ey1uEl zEeZsWUvc8y=9JFdWi;BlMtB8(lA^W;#zQ&@WkFs0W@H8%>D;v%=|Y6s@^n{8Zeu|0 zTnignP+@#DkErfWw<~wG!s5u7Gkdwy>f#DB)!>Zd3KTE?5nfs*T1Uq!1;%NM`2_on z<6Jz$Vq*qqmD(?>x#OjjH7N3F^`+>s!x~iHbO=x&X$gxO zp-?3aqQ^j^G5T_Dg=}8gf{uypPBEMA&gOCwwOi$OKscUE$NE5sD?SUK`EtTRk3@T& zmOW3gG{nr$%6urt4Q4Jb#o0ML#*Iq($bhUDEc@qFZDuS6<&5@B)OpSeEG=zWb~W4D-#ugH(5S*g?v zzq)*(Yo$}xL?=8sJh&~yZ}ijHb)>;x^a?TE7RIZs4@@Gkpjbl zpk(6k-%1G=sa9<&FzpB9GaG|qnR5eyT8%y>%o1Z`i8BTGOE$4 z#(m2&P){lurXG5Gr)_%Y4V0EOh+vB#AxlbgZ~Z9voo91Hq%r-KS}ukK$patf4iqRO zIHSzkP(Hymcjs5$ghc>=z$ySDchXBY#F!?!OxE6d7@U|rRtAp!|!O2CO#b`Af^h*8}5JQ zMNl=sCO?y|Mh-&a=!x>9~(W{v^{q>Xrpc^Bthuhz&o)iy3dFrm?$e zv*L6Fcc9{eD(;kzggBKb2wAjYo@M;zq!yPGqAKzmzyLPTPy0*?_I}r`!Gg>9u>4_UcKHf#-!e_h>@r%O~4s@KczU zz=PXWliQqmHyyKj%m+QtA)0nC>Y)bgUJ_$r)4 zJukfV1434m6ch5iYSQ6U`Wb zE+?bG=HEynhP14ng3`^g2bKV$6@ah9fEFf)6!iCA-SFnW%27xS?s)9@z}sGGNLQM1?|=<5y@MJ#ch z=5?qx$oT0N^E}g8Fat{`Nc&o`vXWg@wtb72{Jm%-YPRU(_+SfDnN~IKXg;Wv8+znu zdlhPunA5D>lxe*}L4h;yEfKjXFxP6|be{$JpLE0ePr8{LicDd~hFkN>Y4zLoVn*)= zAmVd?CDL?&*Oku0WEvfb3#0PD)s{Zyf$&&)UghA1`>LpCHqe)Xc%pWVf~FV=VJQSh z5%tQ&__t(pO_|lry8>*UCXT&Aju&7Q@J=MDnV*Mi$H3;*n&@q4)gKOp!>;>z@}~<# zQ^Og`*UYYE>H*VCz*`XCW58_`IuscxVsOIZs3QwS$8dwl%S8_N?Zoz_HoB$7OlGO; zv$gZ1H+l6z^jyDMEt{-A=*~wuffi736CD(xNfE zYk(GsgnGa|1Yh=Yno^-_%e*DL^UKidL{D=}eOD{3;cv$My!>{BScV-@A8#4%1+Lxh zUAwI7Q9;*UI}u9yYEn;D_`V&0;#ln`D!lzwie%ScIz4r}xL*8}cSU3$raV_cjW!Q= zuv@iucMX)nsfOkPgyK%RKR@8f5b*`K&^d;|zhF^4_XQ+v+&0 zZMZ!D9%XgG$H{WvOQw5;x5PW*RFdgnZygooV=a?zB=Jj1M+<%)M~Z1ZD=uwtjO|WQ zldpG9V9X2DU-|h*gJOZgAZtHn^e4m%n9u|vUkV|M*eKG_Se0+Ev7Bv?1tqJpAMLpQ z{mho8->Ii<45bp1Ufos%-w7XfOg^ob7IL0x7h|ro$$kYfc@p_t4UI5BC0kAg_0;dnT3Lg`$=- zoseY7a+%^0L>fUl8Kc1(ceN0zVoCA|WELQFsc^hpU+_4lWz=Z(-zZCK}}cA{|!EwR9d4-r%F0p-3uYz z4DQSO#PeluV|9J&ZbNPJ zU8;Px}GuN2F(;D9(?NPnu05<8@`0eB$vF z^$d0t-;%S~fP3aIFUv=twiKpgEs)?#2EUd#B{YVNK1G4>UU!;pcan8koBB1pnFskQDtQVaShFTfFAr$2TV@R3Fhi!PiP%`n}8 z9C8^RpDMWr((6ioxlRhL&~u#pE~#yR^Op{AcsW;Ckcg6Z}J zUW1suw`AP)bA7l}&p2hhJwYb0TpD*08ukH6$1(HiaXb$-3R%*PGSGZFatY4W$=ElQ ziPSgl(cNI_iqMJQcM&^PF~R}zYVp~?NF48*4zy^#jBAvuwDBx=mRj}|&p#+s$-co+ z^phEcWX`7RY+o(_1rM-rAt9#k8#Cp>Stig7FIBid$>8hN0}?jF7C?=sdx{gZ<^i`6 zFZ7WlpBHBcj45b>$$*n|nr@8wtkKYB#iou}Qe@jh@LUBjVfU7E=a*Es-liuW( znLtpA6-epz0}>WqCF2WJ_UoE=fRGQLqj}GM8}g%V*rh5G3tnJu?n`(C089=L&?Q9< zy0Mt9Ua7zA(GZxUOM(ctZqb(L0^40};5UMU*WO>R^1;AHkmEc%3(%BKws2+WQFKnVXA8tL+J+iyx?PeVDSY%Sij>|1N=wiJ_BZy{ZCc+LbV{ z;5fIm^rK$co}FQ;_@;{s$@-o~`5tEn)YI!(^I_C1Xw@0-aUGQg996CFG`-1@;W{3Y zL+{%T|2>0aw>dP!>BB9XLp<^mK`(VONA!YN6Sd4PCoVKgQTMOxQEbPABxU@P0IfOM$$ByDJn>xQ!7C#2!{Q=Op{`WF|h- zBL5PZiDqRWOV0fY|C!29iK%Kgv7v_g6kR`{*l1hMGYfq}1}>qh56v;_l2S;veQ`4n z<7!Z?iEaf2r~GDbYXq5mo8KRLC0!(9%;K{4gfS1Nvg-1B=H#YD!i=K$#e<* zv8zLL1pxi>-IPPLsZ0;1;IY~0GUDugRR;bb4B{`s07JdEpW=b=S2@9G{IHzag@y$@kt^S7qX~JSiArGltLa~QW7QuuXVsJ>HKM0M#es? z#9AAkHOZpYT9Agv;E7!47KA0LV%QyaMR+ICa~mfH`i@KI-4(-EaSwYL^;bF*?jVLO z!KTuzNI05eez6nu{TKC!pS(gz%+tL}3y+v|87vX_j+#Uy*r~j;d$1yyH5vK<&#@c& zt0U2nO^L&_wlm~IF(Hj{gcI;jJY=Q~@LnUPy1+!6Bz7(!ChX4JduGRZQHwvfT*t&O18hW!qP-Vw3x$@$mvCp!{c&;^63JW#aI+v}#uW z8kNG0?k!mG+Ht`bM%EtqDcd4Oyl|>WVS&G(3^lPBXhgAj6wS8`I>nRfbaq*^YGh}s zc>kCJVY~SbdGb<0ylQtGiIXdL5ob1JRpCikeD~^=z^f8&A!?!!5JTSq@=)8n4RZkv zTUOy7-K4Yl0YqjHTDfwQ8?4iot72x<3k@+_v1Jmbgw$=88z;hdYSL5@XK5(yWe2HF z&`nL8QKh7>XLYuX3ybsD2^s6>>ooA<=8rbjXyv(}^Eq{e*rr^gZ@y-sDSSJ`5~PAu z7Xl4R0kc5y4z`!V%}p8!t`309>2?__TDa-{i`*Cq08_5AP8IQdr2Wj~SkFT>Y1^rA`K`*-6$(JH4!X?#BGF=D7HpOO4Kh z%!qH$ouO0pqQa6l_SSOdKcai4Pup>30;z6ppbyJ(6UsqPT-^j`&~paWx@*%_{xwhj z+W@zV+J3;TX$4U^vV@l4m#-3`R_p{9*Nfz$wrD(lc{fty!IGQE5B3PVYSu#faI`m4 zU6B_4M?;@GGJbp@TN7SHLR>hiXVw}t##SgWGX*w6PH~)l0UQAE0sNDZ7^La2$cgTKD)-u@#stLT zBRA2C<`_<&FjF#Gy)t)t|eimuE(iLVEZ)BbVw#QX5F=u5~t zRNRiT_S6%XE{c*r>xQA-*GF#RkF}P+QLr$=a@xZd;GB*RE^b#xYdD3z2ejrhL`Xvj zP>2~>3?3rnzJkU^wF~|6AM$Zf(rAsNb;*+{t=aj@rls(3Ip9sGky||MmHp(-Kx{|+ zC3hnW+YLJjyF2#2ykR45UE1kfM}xOO{O^HRjHiwbAzOd#S^@p{PY&w|nm|0ie9aL9HKX2Z}abN3OfzFxV61c58-A=$J;G>>p6&&>?>OXtHmO`F=5CEn6z zjBuLC(W(k18u%YVL5Q>2Zt=b%7=Or%h-PcPnhMVaXCCP8zXM<{ngQk5lX#}uRPu`3ZAM3=Dn zeD&C161bU*Dws^HFsd;*>&sjARbOqXOwEw&fr$3ot666&rk$@A-kQ-kwVJ#=j?8=S znF$o(n2Fy_52A|G+>bsWWz2nvbB_j!DdvFqt~ zE{LV-k!yc&=HeS`X@&ye59WErSzV!!a!sv-+jE_*R5pWXRV%Hyie-Aa0a?jj$+#8u z83F}_${t$tbrjYO=s@(opkSPBPFhY%HN8i!WhI)@KkFewJFN_-tdxAfK-D&}cus8V zkWiIKJ&DbPSC+X7q@yKZUN(>C*-Gk*t()IViNie!_?+|u>}_M-rEHZB2Q?H(PqvF0 zyJr=)O?05@$3tHO#sX?8G6@m98uqG)ecgveO3Lxl)s^aH3nziQ#8d|m&u)yPTRz<> zR`utcekE-GewYqQrXEI7NY8>EDMW*oyCmBOxki7CwXInyiCoUYbxQeXEfpRl+Mi6$ z#LT9I9FMRzC^@;E#~-Usd3Flan6+XcKF_xd71?zLH>>|SFMb1cuP8b=QfgEp`(X@- zwuUSU%K>j`i!FAyXem6q1No_&#CKaf(+9BM7bfUo{C~`WFCU2h?K1zbKOONuPH6m0 z(CwuEn7}vlg&Z8nPeu5Dn~;BF^#b?ulM?>7@WBKCu>S?$EEX`701e?k8|!T}Xbuek YVEhk`3>Fm-fQkhB3Q)j#@cxDVALLT1hyVZp diff --git a/src/include/86box/nv/vid_nv.h b/src/include/86box/nv/vid_nv.h index 79a420243..c26c51868 100644 --- a/src/include/86box/nv/vid_nv.h +++ b/src/include/86box/nv/vid_nv.h @@ -38,6 +38,9 @@ void nv_log_set_device(void* device); void nv_log(const char *fmt, ...); +// Verbose logging level. +void nv_log_verbose_only(const char *fmt, ...); + // Defines common to all NV chip architectural generations // PCI IDs diff --git a/src/include/86box/nv/vid_nv3.h b/src/include/86box/nv/vid_nv3.h index 1957984d2..411ccdecf 100644 --- a/src/include/86box/nv/vid_nv3.h +++ b/src/include/86box/nv/vid_nv3.h @@ -14,7 +14,7 @@ * Also check the doc folder for some more notres * * vid_nv3.h: NV3 Architecture Hardware Reference (open-source) - * Last updated: 26 March 2025 (STILL WORKING ON IT!!!) + * Last updated: 2 April 2025 (STILL WORKING ON IT!!!) * * Authors: Connor Hyde * @@ -1605,7 +1605,7 @@ void nv3_pfifo_write(uint32_t address, uint32_t value); void nv3_pfifo_interrupt(uint32_t id, bool fire_now); // NV3 PFIFO - Caches -void nv3_pfifo_cache0_push(); +//cache0_push not a thing void nv3_pfifo_cache0_pull(); void nv3_pfifo_cache1_push(uint32_t addr, uint32_t val); void nv3_pfifo_cache1_pull(); @@ -1641,4 +1641,4 @@ void nv3_ptimer_tick(double real_time); void nv3_pvideo_init(); // NV3 PME (Mediaport) -void nv3_pmedia_init(); \ No newline at end of file +void nv3_pme_init(); \ No newline at end of file diff --git a/src/video/nv/nv3/classes/nv3_class_00d_m2mf.c b/src/video/nv/nv3/classes/nv3_class_00d_m2mf.c index b75a8e546..4a6d2e39c 100644 --- a/src/video/nv/nv3/classes/nv3_class_00d_m2mf.c +++ b/src/video/nv/nv3/classes/nv3_class_00d_m2mf.c @@ -64,8 +64,8 @@ void nv3_class_00d_method(uint32_t param, uint32_t method_id, nv3_ramin_context_ /* This is technically its own thing, but I don't know if it's ever a problem with how we've designed it */ if (nv3->pgraph.notify_pending) { - nv_log("M2MF notification with notify_pending already set. param=0x%08x, method=0x%04x, grobj=0x%08x 0x%08x 0x%08x 0x%08x\n"); - nv_log("IF THIS IS A DEBUG BUILD, YOU SHOULD SEE A CONTEXT BELOW"); + nv_log("WARNING: M2MF notification with notify_pending already set. param=0x%08x, method=0x%04x, grobj=0x%08x 0x%08x 0x%08x 0x%08x\n"); + nv_log("IF THIS BUILD WAS COMPILED WITH NV_LOG_ENABLE_ULTRA, YOU SHOULD SEE A CONTEXT BELOW"); nv3_debug_ramin_print_context_info(param, context); nv3_pgraph_interrupt_invalid(NV3_PGRAPH_INTR_1_DOUBLE_NOTIFY); diff --git a/src/video/nv/nv3/classes/nv3_class_shared_methods.c b/src/video/nv/nv3/classes/nv3_class_shared_methods.c index 01f0e90c7..0ec7cdd2d 100644 --- a/src/video/nv/nv3/classes/nv3_class_shared_methods.c +++ b/src/video/nv/nv3/classes/nv3_class_shared_methods.c @@ -112,33 +112,33 @@ void nv3_notify_if_needed(uint32_t name, uint32_t method_id, nv3_ramin_context_t // This code is temporary and will probably be moved somewhere else // Print torns of debug info #ifdef DEBUG - nv_log("******* WARNING: IF THIS OPERATION FUCKS UP, RANDOM MEMORY WILL BE CORRUPTED, YOUR ENTIRE SYSTEM MAY BE HOSED *******\n"); + nv_log_verbose_only("******* WARNING: IF THIS OPERATION FUCKS UP, RANDOM MEMORY WILL BE CORRUPTED, YOUR ENTIRE SYSTEM MAY BE HOSED *******\n"); - nv_log("Notification Information:\n"); - nv_log("Adjust Value: 0x%08x\n", info_adjust); - (info_pt_present) ? nv_log("Pagetable Present: True\n") : nv_log("Pagetable Present: False\n"); + nv_log_verbose_only("Notification Information:\n"); + nv_log_verbose_only("Adjust Value: 0x%08x\n", info_adjust); + (info_pt_present) ? nv_log_verbose_only("Pagetable Present: True\n") : nv_log_verbose_only("Pagetable Present: False\n"); switch (info_notification_target) { case NV3_NOTIFICATION_TARGET_NVM: - nv_log("Notification Target: VRAM\n"); + nv_log_verbose_only("Notification Target: VRAM\n"); break; case NV3_NOTIFICATION_TARGET_CART: - nv_log("VERY BAD WARNING: Notification detected with Notification Target: Cartridge. THIS SHOULD NEVER HAPPEN!!!!!\n"); + nv_log_verbose_only("VERY BAD WARNING: Notification detected with Notification Target: Cartridge. THIS SHOULD NEVER HAPPEN!!!!!\n"); break; case NV3_NOTIFICATION_TARGET_PCI: - (nv3->nvbase.bus_generation == nv_bus_pci) ? nv_log("Notification Target: PCI Bus\n") : nv_log("Notification Target: PCI Bus (On AGP card?)\n"); + (nv3->nvbase.bus_generation == nv_bus_pci) ? nv_log_verbose_only("Notification Target: PCI Bus\n") : nv_log_verbose_only("Notification Target: PCI Bus (On AGP card?)\n"); break; case NV3_NOTIFICATION_TARGET_AGP: (nv3->nvbase.bus_generation == nv_bus_agp_1x - || nv3->nvbase.bus_generation == nv_bus_agp_2x) ? nv_log("Notification Target: AGP Bus\n") : nv_log("Notification Target: AGP Bus (On PCI card?)\n"); + || nv3->nvbase.bus_generation == nv_bus_agp_2x) ? nv_log_verbose_only("Notification Target: AGP Bus\n") : nv_log_verbose_only("Notification Target: AGP Bus (On PCI card?)\n"); break; } - nv_log("Limit: 0x%08x\n", notify_obj_limit); - (page_is_present) ? nv_log("Page is present\n") : nv_log("Page is not present\n"); - (page_is_readwrite) ? nv_log("Page is read-write\n") : nv_log("Page is read-only\n"); - nv_log("Pageframe Address: 0x%08x\n", frame_base); + nv_log_verbose_only("Limit: 0x%08x\n", notify_obj_limit); + (page_is_present) ? nv_log_verbose_only("Page is present\n") : nv_log_verbose_only("Page is not present\n"); + (page_is_readwrite) ? nv_log_verbose_only("Page is read-write\n") : nv_log_verbose_only("Page is read-only\n"); + nv_log_verbose_only("Pageframe Address: 0x%08x\n", frame_base); #endif // set up the dma transfer. we need to translate to a physical address. diff --git a/src/video/nv/nv3/nv3_core.c b/src/video/nv/nv3/nv3_core.c index a365cab62..610f8c500 100644 --- a/src/video/nv/nv3/nv3_core.c +++ b/src/video/nv/nv3/nv3_core.c @@ -72,9 +72,7 @@ uint8_t nv3_mmio_read8(uint32_t addr, void* priv) ret = nv3_svga_in(real_address, nv3); - #ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO read8 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); - #endif + nv_log_verbose_only("Redirected MMIO read8 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); return ret; } @@ -100,9 +98,8 @@ uint16_t nv3_mmio_read16(uint32_t addr, void* priv) ret = nv3_svga_in(real_address, nv3) | (nv3_svga_in(real_address + 1, nv3) << 8); - //#ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO read16 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); - //#endif + nv_log_verbose_only("Redirected MMIO read16 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); + return ret; } @@ -128,9 +125,7 @@ uint32_t nv3_mmio_read32(uint32_t addr, void* priv) | (nv3_svga_in(real_address + 2, nv3) << 16) | (nv3_svga_in(real_address + 3, nv3) << 24); - //#ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO read32 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); - //#endif + nv_log_verbose_only("Redirected MMIO read32 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret); return ret; } @@ -155,9 +150,7 @@ void nv3_mmio_write8(uint32_t addr, uint8_t val, void* priv) // svga writes are not logged anyway rn uint32_t real_address = addr & 0x3FF; - //#ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO write8 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); - //#endif + nv_log_verbose_only("Redirected MMIO write8 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); nv3_svga_out(real_address, val & 0xFF, nv3); @@ -184,9 +177,8 @@ void nv3_mmio_write16(uint32_t addr, uint16_t val, void* priv) // svga writes are not logged anyway rn uint32_t real_address = addr & 0x3FF; - //#ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO write16 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); - //#endif + nv_log_verbose_only("Redirected MMIO write16 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); + nv3_svga_out(real_address, val & 0xFF, nv3); nv3_svga_out(real_address + 1, (val >> 8) & 0xFF, nv3); @@ -214,9 +206,7 @@ void nv3_mmio_write32(uint32_t addr, uint32_t val, void* priv) // svga writes are not logged anyway rn uint32_t real_address = addr & 0x3FF; - //#ifdef ENABLE_NV_LOG_ULTRA - nv_log("Redirected MMIO write32 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); - //#endif + nv_log_verbose_only("Redirected MMIO write32 to SVGA: addr=0x%04x val=0x%02x\n", addr, val); nv3_svga_out(real_address, val & 0xFF, nv3); nv3_svga_out(real_address + 1, (val >> 8) & 0xFF, nv3); @@ -1073,9 +1063,9 @@ void* nv3_init(const device_t *info) #endif nv_log("Initialising core\n"); -#ifdef ENABLE_NV_LOG_ULTRA - nv_log("ULTRA LOGGING enabled"); -#endif + // this will only be logged if ENABLE_NV_LOG_ULTRA is defined + nv_log_verbose_only("ULTRA LOGGING enabled"); + // Figure out which vbios the user selected const char* vbios_id = device_get_config_bios("vbios"); diff --git a/src/video/nv/nv3/render/nv3_render_core.c b/src/video/nv/nv3/render/nv3_render_core.c index 15c652e5b..66ee170bc 100644 --- a/src/video/nv/nv3/render/nv3_render_core.c +++ b/src/video/nv/nv3/render/nv3_render_core.c @@ -44,9 +44,8 @@ nv3_color_expanded_t nv3_render_expand_color(uint32_t color, nv3_grobj_t grobj) // set the pixel format color_final.pixel_format = format; - #ifdef ENABLE_NV_LOG - nv_log("Expanding Colour 0x%08x using pgraph_pixel_format 0x%x alpha enabled=%d", color, format, alpha_enabled); - #endif + nv_log_verbose_only("Expanding Colour 0x%08x using pgraph_pixel_format 0x%x alpha enabled=%d\n", color, format, alpha_enabled); + // default to fully opaque in case alpha is disabled color_final.a = 0xFF; @@ -112,9 +111,7 @@ uint32_t nv3_render_downconvert_color(nv3_grobj_t grobj, nv3_color_expanded_t co uint8_t format = (grobj.grobj_0 & 0x07); bool alpha_enabled = (grobj.grobj_0 >> NV3_PGRAPH_CONTEXT_SWITCH_ALPHA) & 0x01; - #ifdef ENABLE_NV_LOG - nv_log("Downconverting Colour 0x%08x using pgraph_pixel_format 0x%x alpha enabled=%d\n", color, format, alpha_enabled); - #endif + nv_log_verbose_only("Downconverting Colour 0x%08x using pgraph_pixel_format 0x%x alpha enabled=%d\n", color, format, alpha_enabled); uint32_t packed_color = 0x00; @@ -141,10 +138,10 @@ uint32_t nv3_render_downconvert_color(nv3_grobj_t grobj, nv3_color_expanded_t co packed_color |= (color.b << 10); break; case nv3_pgraph_pixel_format_y8: - nv_log("nv3_render_downconvert: Y8 not implemented"); + warning("nv3_render_downconvert: Y8 not implemented"); break; case nv3_pgraph_pixel_format_y16: - nv_log("nv3_render_downconvert: Y16 not implemented"); + warning("nv3_render_downconvert: Y16 not implemented"); break; default: warning("nv3_render_downconvert_color unknown format %d", format); diff --git a/src/video/nv/nv3/subsystems/nv3_pbus.c b/src/video/nv/nv3/subsystems/nv3_pbus.c index 46d829fb2..67a052d50 100644 --- a/src/video/nv/nv3/subsystems/nv3_pbus.c +++ b/src/video/nv/nv3/subsystems/nv3_pbus.c @@ -54,7 +54,7 @@ uint32_t nv3_pbus_read(uint32_t address) // todo: friendly logging - nv_log("PBUS Read from 0x%08x", address); + nv_log_verbose_only("PBUS Read from 0x%08x", address); // if the register actually exists if (reg) @@ -79,9 +79,9 @@ uint32_t nv3_pbus_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -95,15 +95,15 @@ void nv3_pbus_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pbus_registers, sizeof(pbus_registers)/sizeof(pbus_registers[0])); - nv_log("PBUS Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PBUS Write 0x%08x -> 0x%08x\n", value, address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) @@ -174,7 +174,7 @@ uint8_t nv3_pbus_rma_read(uint16_t addr) } // log current location for vbios RE - nv_log("MMIO Real Mode Access read, initial address=0x%04x final RMA MMIO address=0x%08x data=0x%08x\n", + nv_log_verbose_only("MMIO Real Mode Access read, initial address=0x%04x final RMA MMIO address=0x%08x data=0x%08x\n", addr, real_final_address, ret); break; @@ -239,7 +239,7 @@ void nv3_pbus_rma_write(uint16_t addr, uint8_t val) nv3->pbus.rma.data &= ~0xff000000; nv3->pbus.rma.data |= (val << 24); - nv_log("MMIO Real Mode Access write transaction complete, initial address=0x%04x final RMA MMIO address=0x%08x data=0x%08x\n", + nv_log_verbose_only("MMIO Real Mode Access write transaction complete, initial address=0x%04x final RMA MMIO address=0x%08x data=0x%08x\n", addr, nv3->pbus.rma.addr, nv3->pbus.rma.data); if (nv3->pbus.rma.addr < NV3_MMIO_SIZE) diff --git a/src/video/nv/nv3/subsystems/nv3_pextdev.c b/src/video/nv/nv3/subsystems/nv3_pextdev.c index c26266a00..30ba68c03 100644 --- a/src/video/nv/nv3/subsystems/nv3_pextdev.c +++ b/src/video/nv/nv3/subsystems/nv3_pextdev.c @@ -89,11 +89,11 @@ uint32_t nv3_pextdev_read(uint32_t address) // special consideration for straps if (address == NV3_PSTRAPS) { - nv_log("Straps Read (current value=0x%08x)\n", nv3->pextdev.straps); + nv_log_verbose_only("Straps Read (current value=0x%08x)\n", nv3->pextdev.straps); } else { - nv_log("PEXTDEV Read from 0x%08x", address); + nv_log_verbose_only("PEXTDEV Read from 0x%08x", address); } // if the register actually exists @@ -113,9 +113,9 @@ uint32_t nv3_pextdev_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -129,12 +129,12 @@ void nv3_pextdev_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pextdev_registers, sizeof(pextdev_registers)/sizeof(pextdev_registers[0])); - nv_log("PEXTDEV Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PEXTDEV Write 0x%08x -> 0x%08x\n", value, address); // special consideration for straps if (address == NV3_PSTRAPS) { - nv_log("Huh? Tried to write to the straps. Something is wrong...\n", nv3->pextdev.straps); + warning("Huh? Tried to write to the straps. Something is wrong...\n", nv3->pextdev.straps); return; } @@ -142,9 +142,9 @@ void nv3_pextdev_write(uint32_t address, uint32_t value) if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) diff --git a/src/video/nv/nv3/subsystems/nv3_pfb.c b/src/video/nv/nv3/subsystems/nv3_pfb.c index 0be3d14c8..0b36a3993 100644 --- a/src/video/nv/nv3/subsystems/nv3_pfb.c +++ b/src/video/nv/nv3/subsystems/nv3_pfb.c @@ -75,7 +75,7 @@ uint32_t nv3_pfb_read(uint32_t address) // todo: friendly logging - nv_log("PFB Read from 0x%08x", address); + nv_log_verbose_only("PFB Read from 0x%08x", address); // if the register actually exists if (reg) @@ -111,9 +111,9 @@ uint32_t nv3_pfb_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -127,15 +127,15 @@ void nv3_pfb_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pfb_registers, sizeof(pfb_registers)/sizeof(pfb_registers[0])); - nv_log("PFB Write 0x%08x -> 0x%08x", value, address); + nv_log_verbose_only("PFB Write 0x%08x -> 0x%08x", value, address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) @@ -189,17 +189,16 @@ void nv3_pfb_config0_write(uint32_t val) // This doesn't actually seem very useful - #ifdef ENABLE_NV_LOG_ULTRA - nv_log("Framebuffer Config Change\n"); - nv_log("Horizontal Size=%d pixels\n", new_pfb_htotal); - nv_log("Vertical Size @ 4:3=%d pixels\n", new_pfb_vtotal); + + nv_log_verbose_only("Framebuffer Config Change\n"); + nv_log_verbose_only("Horizontal Size=%d pixels\n", new_pfb_htotal); + nv_log_verbose_only("Vertical Size @ 4:3=%d pixels\n", new_pfb_vtotal); if (new_bit_depth == NV3_PFB_CONFIG_0_DEPTH_8BPP) - nv_log("Bit Depth=8bpp\n"); + nv_log_verbose_only("Bit Depth=8bpp\n"); else if (new_bit_depth == NV3_PFB_CONFIG_0_DEPTH_16BPP) - nv_log("Bit Depth=16bpp\n"); + nv_log_verbose_only("Bit Depth=16bpp\n"); else if (new_bit_depth == NV3_PFB_CONFIG_0_DEPTH_32BPP) - nv_log("Bit Depth=32bpp\n"); - #endif - + nv_log_verbose_only("Bit Depth=32bpp\n"); + } \ No newline at end of file diff --git a/src/video/nv/nv3/subsystems/nv3_pfifo.c b/src/video/nv/nv3/subsystems/nv3_pfifo.c index 55ec21e19..6195c0639 100644 --- a/src/video/nv/nv3/subsystems/nv3_pfifo.c +++ b/src/video/nv/nv3/subsystems/nv3_pfifo.c @@ -101,7 +101,7 @@ uint32_t nv3_pfifo_read(uint32_t address) // todo: friendly logging - nv_log("PFIFO Read from 0x%08x", address); + nv_log_verbose_only("PFIFO Read from 0x%08x", address); // if the register actually exists if (reg) @@ -278,9 +278,9 @@ uint32_t nv3_pfifo_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } /* Handle some special memory areas */ else if (address >= NV3_PFIFO_CACHE1_CTX_START && address <= NV3_PFIFO_CACHE1_CTX_END) @@ -288,24 +288,26 @@ uint32_t nv3_pfifo_read(uint32_t address) uint32_t ctx_entry_id = ((address - NV3_PFIFO_CACHE1_CTX_START) / 16) % 8; ret = nv3->pfifo.cache1_settings.context[ctx_entry_id]; - nv_log("PFIFO Cache1 CTX Read Entry=%d Value=0x%04x\n", ctx_entry_id, ret); + nv_log_verbose_only("PFIFO Cache1 CTX Read Entry=%d Value=0x%04x\n", ctx_entry_id, ret); } /* Direct cache read stuff */ else if (address >= NV3_PFIFO_CACHE0_METHOD_START && address <= NV3_PFIFO_CACHE0_METHOD_END) { - nv_log("PFIFO Cache0 Read\n"); + nv_log_verbose_only("PFIFO Cache0 Read\n"); // See if we want the object name or the channel/subchannel information. if (address & 4) { - nv_log("Data=0x%08x\n", nv3->pfifo.cache0_entry.data); + nv_log_verbose_only("Data=0x%08x\n", nv3->pfifo.cache0_entry.data); + return nv3->pfifo.cache0_entry.data; } else { uint32_t final = nv3->pfifo.cache0_entry.method | (nv3->pfifo.cache0_entry.subchannel << NV3_PFIFO_CACHE1_METHOD_SUBCHANNEL); - nv_log("Param (subchannel=15:13, method=12:2)=0x%08x\n", final); + nv_log_verbose_only("Param (subchannel=15:13, method=12:2)=0x%08x\n", final); + return final; } @@ -320,19 +322,19 @@ uint32_t nv3_pfifo_read(uint32_t address) slot = (address >> 3) & 0x3F; else slot = (address >> 3) & 0x1F; - - nv_log("PFIFO Cache1 Read slot=%d", slot); + + nv_log_verbose_only("PFIFO Cache1 Read slot=%d", slot); // See if we want the object name or the channel/subchannel information. if (address & 4) { - nv_log("Data=0x%08x\n", nv3->pfifo.cache1_entries[slot].data); + nv_log_verbose_only("Data=0x%08x\n", nv3->pfifo.cache1_entries[slot].data); return nv3->pfifo.cache1_entries[slot].data; } else { uint32_t final = nv3->pfifo.cache1_entries[slot].method | (nv3->pfifo.cache1_entries[slot].subchannel << NV3_PFIFO_CACHE1_METHOD_SUBCHANNEL); - nv_log("Param (subchannel=15:13, method=12:2)=0x%08x\n", final); + nv_log_verbose_only("Param (subchannel=15:13, method=12:2)=0x%08x\n", final); return final; } @@ -392,7 +394,7 @@ void nv3_pfifo_write(uint32_t address, uint32_t val) nv_register_t* reg = nv_get_register(address, pfifo_registers, sizeof(pfifo_registers)/sizeof(pfifo_registers[0])); - nv_log("PFIFO Write 0x%08x -> 0x%08x", val, address); + nv_log_verbose_only("PFIFO Write 0x%08x -> 0x%08x", val, address); // if the register actually exists if (reg) @@ -571,18 +573,18 @@ void nv3_pfifo_write(uint32_t address, uint32_t val) } if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else if (address >= NV3_PFIFO_CACHE0_METHOD_START && address <= NV3_PFIFO_CACHE0_METHOD_END) { - nv_log("PFIFO Cache0 Write\n"); + nv_log_verbose_only("PFIFO Cache0 Write\n"); // 3104 always written after 3100 if (address & 4) { - nv_log("Name = 0x%08x\n", val); + nv_log_verbose_only("Name = 0x%08x\n", val); nv3->pfifo.cache0_entry.data = val; nv3_pfifo_cache0_pull(); // immediately pull out } @@ -590,7 +592,7 @@ void nv3_pfifo_write(uint32_t address, uint32_t val) { nv3->pfifo.cache0_entry.method = (val & 0x1FFC); nv3->pfifo.cache0_entry.subchannel = (val >> NV3_PFIFO_CACHE1_METHOD_SUBCHANNEL) & 0x07; - nv_log("Subchannel = 0x%08x, method = 0x%04x\n", nv3->pfifo.cache0_entry.subchannel, nv3->pfifo.cache0_entry.method); + nv_log_verbose_only("Subchannel = 0x%08x, method = 0x%04x\n", nv3->pfifo.cache0_entry.subchannel, nv3->pfifo.cache0_entry.method); } } @@ -606,19 +608,19 @@ void nv3_pfifo_write(uint32_t address, uint32_t val) uint32_t real_entry = nv3_pfifo_cache1_normal2gray(slot); - nv_log("Cache1 Write Slot %d (Gray code)", real_entry); + nv_log_verbose_only("Cache1 Write Slot %d (Gray code)", real_entry); // See if we want the object name or the channel/subchannel information. if (address & 4) { - nv_log("Name = 0x%08x\n", val); + nv_log_verbose_only("Name = 0x%08x\n", val); nv3->pfifo.cache1_entries[real_entry].data = val; } else { nv3->pfifo.cache1_entries[real_entry].method = (val & 0x1FFC); nv3->pfifo.cache1_entries[real_entry].subchannel = (val >> NV3_PFIFO_CACHE1_METHOD_SUBCHANNEL) & 0x07; - nv_log("Subchannel = 0x%08x, method = 0x%04x\n", nv3->pfifo.cache1_entries[real_entry].subchannel, nv3->pfifo.cache1_entries[real_entry].method); + nv_log_verbose_only("Subchannel = 0x%08x, method = 0x%04x\n", nv3->pfifo.cache1_entries[real_entry].subchannel, nv3->pfifo.cache1_entries[real_entry].method); } } /* Handle some special memory areas */ @@ -627,7 +629,7 @@ void nv3_pfifo_write(uint32_t address, uint32_t val) uint32_t ctx_entry_id = ((address - NV3_PFIFO_CACHE1_CTX_START) / 16) % 8; nv3->pfifo.cache1_settings.context[ctx_entry_id] = val; - nv_log("PFIFO Cache1 CTX Write Entry=%d value=0x%04x\n", ctx_entry_id, val); + nv_log_verbose_only("PFIFO Cache1 CTX Write Entry=%d value=0x%04x\n", ctx_entry_id, val); } else /* Completely unknown */ { @@ -689,11 +691,10 @@ uint32_t nv3_pfifo_cache1_gray2normal(uint32_t val) return nv3_pfifo_cache1_binary_code_table[val]; } -// Submits graphics objects INTO cache0 -void nv3_pfifo_cache0_push() -{ - -} +/* +You can't push into cache0 on the real hardware, but it's not practically done because Cache0 is meant to be reserved for software objects, +NV_USER writes always go to CACHE1 +*/ // Pulls graphics objects OUT of cache0 void nv3_pfifo_cache0_pull() @@ -740,9 +741,9 @@ void nv3_pfifo_cache0_pull() nv3->pfifo.cache0_settings.get_address ^= 0x04; #ifndef RELEASE_BUILD - #ifdef ENABLE_NV_LOG_ULTRA - nv_log("***** DEBUG: CACHE0 PULLED ****** Contextual information below\n"); - #endif + + nv_log_verbose_only("***** DEBUG: CACHE0 PULLED ****** Contextual information below\n"); + nv3_ramin_context_t context_structure = *(nv3_ramin_context_t*)¤t_context; @@ -757,7 +758,7 @@ void nv3_pfifo_context_switch(uint32_t new_channel) { /* Send our contexts to RAMFC. Load the new ones from RAMFC. */ if (new_channel >= NV3_DMA_CHANNELS) - fatal("Tried to switch to invalid dma channel"); + fatal("nv3_pfifo_context_switch: Tried to switch to invalid dma channel"); uint16_t ramfc_base = nv3->pfifo.ramfc_config >> NV3_PFIFO_CONFIG_RAMFC_BASE_ADDRESS & 0xF; @@ -832,7 +833,8 @@ void nv3_pfifo_cache1_push(uint32_t addr, uint32_t param) // Did we fuck up? if (oh_shit) { - nv_log("WE ARE FUCKED Runout Error=%d Channel=%d Subchannel=%d Method=0x%04x IMPLEMENT THIS OR DIE!!!", oh_shit_reason, channel, subchannel, method_offset); + nv_log("OH CRAP: Runout Error=%d Channel=%d Subchannel=%d Method=0x%04x", + oh_shit_reason, channel, subchannel, method_offset); nv3_ramro_write(nv3->pfifo.runout_put, new_address); nv3_ramro_write(nv3->pfifo.runout_put + 4, param); @@ -878,7 +880,7 @@ void nv3_pfifo_cache1_push(uint32_t addr, uint32_t param) nv3->pfifo.cache1_settings.put_address = nv3_pfifo_cache1_normal2gray(next_put_address) << 2; - nv_log("Submitted object [PIO]: Channel %d.%d, Parameter 0x%08x, Method ID 0x%04x (Put Address is now %d)\n", + nv_log_verbose_only("Submitted object [PIO]: Channel %d.%d, Parameter 0x%08x, Method ID 0x%04x (Put Address is now %d)\n", channel, subchannel, param, method_offset, nv3->pfifo.cache1_settings.put_address); // Now we're done. Phew! @@ -918,7 +920,7 @@ void nv3_pfifo_cache1_pull() //bit23 set=hardware if (!(current_context & 0x800000)) { - nv_log("The object in CACHE1 is a software object\n"); + nv_log_verbose_only("The object in CACHE1 is a software object\n"); nv3->pfifo.cache1_settings.pull0 |= NV3_PFIFO_CACHE0_PULL0_SOFTWARE_METHOD; nv3->pfifo.cache1_settings.pull0 &= ~NV3_PFIFO_CACHE0_PULL0_ENABLED; @@ -939,9 +941,8 @@ void nv3_pfifo_cache1_pull() #ifndef RELEASE_BUILD - #ifdef ENABLE_NV_LOG_ULTRA - nv_log("***** DEBUG: CACHE1 PULLED ****** Contextual information below\n"); - #endif + nv_log_verbose_only("***** DEBUG: CACHE1 PULLED ****** Contextual information below\n"); + nv3_ramin_context_t context_structure = *(nv3_ramin_context_t*)¤t_context; diff --git a/src/video/nv/nv3/subsystems/nv3_pgraph.c b/src/video/nv/nv3/subsystems/nv3_pgraph.c index ece125b0f..82ad95706 100644 --- a/src/video/nv/nv3/subsystems/nv3_pgraph.c +++ b/src/video/nv/nv3/subsystems/nv3_pgraph.c @@ -108,7 +108,7 @@ uint32_t nv3_pgraph_read(uint32_t address) // todo: friendly logging - nv_log("PGRAPH Read from 0x%08x", address); + nv_log_verbose_only("PGRAPH Read from 0x%08x", address); // if the register actually exists if (reg) @@ -262,9 +262,9 @@ uint32_t nv3_pgraph_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -275,7 +275,7 @@ uint32_t nv3_pgraph_read(uint32_t address) // Addresses should be aligned to 4 bytes. uint32_t entry = (address - NV3_PGRAPH_CONTEXT_CACHE(0)); - nv_log("PGRAPH Context Cache Read (Entry=%04x Value=%04x)\n", entry, nv3->pgraph.context_cache[entry]); + nv_log_verbose_only("PGRAPH Context Cache Read (Entry=%04x Value=%04x)\n", entry, nv3->pgraph.context_cache[entry]); } else /* Completely unknown */ { @@ -297,15 +297,11 @@ void nv3_pgraph_write(uint32_t address, uint32_t value) nv_register_t* reg = nv_get_register(address, pgraph_registers, sizeof(pgraph_registers)/sizeof(pgraph_registers[0])); - nv_log("PGRAPH Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PGRAPH Write 0x%08x -> 0x%08x\n", value, address); // if the register actually exists if (reg) { - if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); - else - nv_log("\n"); // on-read function if (reg->on_write) @@ -467,6 +463,12 @@ void nv3_pgraph_write(uint32_t address, uint32_t value) } } + + if (reg->friendly_name) + nv_log_verbose_only(": %s\n", reg->friendly_name); + else + nv_log_verbose_only("\n"); + } else { @@ -477,7 +479,7 @@ void nv3_pgraph_write(uint32_t address, uint32_t value) // Addresses should be aligned to 4 bytes. uint32_t entry = (address - NV3_PGRAPH_CONTEXT_CACHE(0)); - nv_log("PGRAPH Context Cache Write (Entry=%04x Value=0x%08x)\n", entry, value); + nv_log_verbose_only("PGRAPH Context Cache Write (Entry=%04x Value=0x%08x)\n", entry, value); nv3->pgraph.context_cache[entry] = value; } else /* Completely unknown */ @@ -524,7 +526,7 @@ void nv3_pgraph_arbitrate_method(uint32_t param, uint16_t method, uint8_t channe grobj.grobj_2 = nv3_ramin_read32(real_ramin_base + 8, nv3); grobj.grobj_3 = nv3_ramin_read32(real_ramin_base + 12, nv3); - nv_log("**** About to execute method **** method=0x%04x param=0x%08x, channel=%d.%d, class=%s, grobj=0x%08x 0x%08x 0x%08x 0x%08x\n", + nv_log_verbose_only("**** About to execute method **** method=0x%04x param=0x%08x, channel=%d.%d, class=%s, grobj=0x%08x 0x%08x 0x%08x 0x%08x\n", method, param, channel, subchannel, nv3_class_names[class_id], grobj.grobj_0, grobj.grobj_1, grobj.grobj_2, grobj.grobj_3); /* Methods below 0x104 are shared across all classids, so call generic_method for that*/ diff --git a/src/video/nv/nv3/subsystems/nv3_pmc.c b/src/video/nv/nv3/subsystems/nv3_pmc.c index de1c21f24..050af07fa 100644 --- a/src/video/nv/nv3/subsystems/nv3_pmc.c +++ b/src/video/nv/nv3/subsystems/nv3_pmc.c @@ -60,7 +60,7 @@ nv_register_t pmc_registers[] = { uint32_t nv3_pmc_clear_interrupts() { - nv_log("Clearing IRQs\n"); + nv_log_verbose_only("Clearing IRQs\n"); pci_clear_irq(nv3->nvbase.pci_slot, PCI_INTA, &nv3->nvbase.pci_irq_state); } @@ -144,21 +144,21 @@ uint32_t nv3_pmc_handle_interrupts(bool send_now) { if (nv3->pmc.interrupt_enable & NV3_PMC_INTERRUPT_ENABLE_HARDWARE) { - nv_log("Firing hardware-originated interrupt NV3_PMC_INTR_0=0x%08x\n", nv3->pmc.interrupt_status); + nv_log_verbose_only("Firing hardware-originated interrupt NV3_PMC_INTR_0=0x%08x\n", nv3->pmc.interrupt_status); pci_set_irq(nv3->nvbase.pci_slot, PCI_INTA, &nv3->nvbase.pci_irq_state); } else - nv_log("NOT firing hardware-originated interrupt NV3_PMC_INTR_0=0x%08x, BECAUSE HARDWARE INTERRUPTS ARE DISABLED\n", nv3->pmc.interrupt_status); + nv_log_verbose_only("NOT firing hardware-originated interrupt NV3_PMC_INTR_0=0x%08x, BECAUSE HARDWARE INTERRUPTS ARE DISABLED\n", nv3->pmc.interrupt_status); } else { if (nv3->pmc.interrupt_enable & NV3_PMC_INTERRUPT_ENABLE_SOFTWARE) { - nv_log("Firing software-originated interrupt NV3_PMC_INTR_0=0x%08x\n", nv3->pmc.interrupt_status); + nv_log_verbose_only("Firing software-originated interrupt NV3_PMC_INTR_0=0x%08x\n", nv3->pmc.interrupt_status); pci_set_irq(nv3->nvbase.pci_slot, PCI_INTA, &nv3->nvbase.pci_irq_state); } else - nv_log("NOT firing software-originated interrupt NV3_PMC_INTR_0=0x%08x, BECAUSE SOFTWARE INTERRUPTS ARE DISABLED\n", nv3->pmc.interrupt_status); + nv_log_verbose_only("NOT firing software-originated interrupt NV3_PMC_INTR_0=0x%08x, BECAUSE SOFTWARE INTERRUPTS ARE DISABLED\n", nv3->pmc.interrupt_status); } } @@ -178,7 +178,7 @@ uint32_t nv3_pmc_read(uint32_t address) uint32_t ret = 0x00; // todo: friendly logging - nv_log("PMC Read from 0x%08x", address); + nv_log_verbose_only("PMC Read from 0x%08x", address); // if the register actually exists if (reg) @@ -194,7 +194,7 @@ uint32_t nv3_pmc_read(uint32_t address) ret = nv3->pmc.boot; break; case NV3_PMC_INTERRUPT_STATUS: - nv_log("\n"); // clear_interrupts logs + nv_log_verbose_only("\n"); // clear_interrupts logs nv3_pmc_clear_interrupts(); ret = nv3_pmc_handle_interrupts(false); @@ -211,9 +211,9 @@ uint32_t nv3_pmc_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -227,7 +227,7 @@ void nv3_pmc_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pmc_registers, sizeof(pmc_registers)/sizeof(pmc_registers[0])); - nv_log("PMC Write 0x%08x -> 0x%08x", value, address); + nv_log_verbose_only("PMC Write 0x%08x -> 0x%08x", value, address); // if the register actually exists... if (reg) @@ -245,7 +245,7 @@ void nv3_pmc_write(uint32_t address, uint32_t value) // This can only be done by software interrupts... if (!(nv3->pmc.interrupt_status & 0x7FFFFFFF)) { - nv_log("Huh? This is a hardware interrupt...Please use the INTR_EN registers of the GPU subsystem you want to trigger " + warning("Huh? This is a hardware interrupt...Please use the INTR_EN registers of the GPU subsystem you want to trigger " " an interrupt on, rather than writing to NV3_PMC_INTERRUPT_STATUS (Or this is a bug)...NV3_PMC_INTERRUPT_STATUS=0x%08x)\n", nv3->pmc.interrupt_enable); return; } @@ -264,9 +264,9 @@ void nv3_pmc_write(uint32_t address, uint32_t value) } if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else /* Completely unknown */ diff --git a/src/video/nv/nv3/subsystems/nv3_pme.c b/src/video/nv/nv3/subsystems/nv3_pme.c index d7f6f0cf9..b18797a65 100644 --- a/src/video/nv/nv3/subsystems/nv3_pme.c +++ b/src/video/nv/nv3/subsystems/nv3_pme.c @@ -49,7 +49,7 @@ uint32_t nv3_pme_read(uint32_t address) // todo: friendly logging - nv_log("PME Read from 0x%08x", address); + nv_log_verbose_only("PME Read from 0x%08x", address); // if the register actually exists if (reg) @@ -77,9 +77,9 @@ uint32_t nv3_pme_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -93,15 +93,15 @@ void nv3_pme_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pme_registers, sizeof(pme_registers)/sizeof(pme_registers[0])); - nv_log("PME Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PME Write 0x%08x -> 0x%08x\n", value, address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) diff --git a/src/video/nv/nv3/subsystems/nv3_pramdac.c b/src/video/nv/nv3/subsystems/nv3_pramdac.c index fb83ffaf1..0e41807a0 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramdac.c +++ b/src/video/nv/nv3/subsystems/nv3_pramdac.c @@ -223,7 +223,7 @@ uint32_t nv3_pramdac_read(uint32_t address) // todo: friendly logging - nv_log("PRAMDAC Read from 0x%08x\n", address); + nv_log_verbose_only("PRAMDAC Read from 0x%08x\n", address); // if the register actually exists if (reg) @@ -288,9 +288,9 @@ uint32_t nv3_pramdac_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -304,15 +304,12 @@ void nv3_pramdac_write(uint32_t address, uint32_t value) { nv_register_t* reg = nv_get_register(address, pramdac_registers, sizeof(pramdac_registers)/sizeof(pramdac_registers[0])); - nv_log("PRAMDAC Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PRAMDAC Write 0x%08x -> 0x%08x\n", value, address); // if the register actually exists if (reg) { - if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); - else - nv_log("\n"); + // on-read function if (reg->on_write) @@ -381,6 +378,11 @@ void nv3_pramdac_write(uint32_t address, uint32_t value) break; } } + + if (reg->friendly_name) + nv_log_verbose_only(": %s\n", reg->friendly_name); + else + nv_log_verbose_only("\n"); } else /* Completely unknown */ { diff --git a/src/video/nv/nv3/subsystems/nv3_pramin.c b/src/video/nv/nv3/subsystems/nv3_pramin.c index 2771d5d16..8556822f5 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramin.c +++ b/src/video/nv/nv3/subsystems/nv3_pramin.c @@ -61,7 +61,7 @@ uint8_t nv3_ramin_read8(uint32_t addr, void* priv) if (!nv3_ramin_arbitrate_read(addr, &val)) // Oh well { val = (uint8_t)nv3->nvbase.svga.vram[addr]; - nv_log("Read byte from PRAMIN addr=0x%08x (raw address=0x%08x)\n", addr, raw_addr); + nv_log_verbose_only("Read byte from PRAMIN addr=0x%08x (raw address=0x%08x)\n", addr, raw_addr); } return (uint8_t)val; @@ -87,7 +87,7 @@ uint16_t nv3_ramin_read16(uint32_t addr, void* priv) if (!nv3_ramin_arbitrate_read(addr, &val)) { val = (uint16_t)vram_16bit[addr]; - nv_log("Read word from PRAMIN addr=0x%08x (raw address=0x%08x)\n", addr, raw_addr); + nv_log_verbose_only("Read word from PRAMIN addr=0x%08x (raw address=0x%08x)\n", addr, raw_addr); } return val; @@ -114,7 +114,7 @@ uint32_t nv3_ramin_read32(uint32_t addr, void* priv) { val = vram_32bit[addr]; - nv_log("Read dword from PRAMIN 0x%08x <- 0x%08x (raw address=0x%08x)\n", val, addr, raw_addr); + nv_log_verbose_only("Read dword from PRAMIN 0x%08x <- 0x%08x (raw address=0x%08x)\n", val, addr, raw_addr); } return val; @@ -139,7 +139,7 @@ void nv3_ramin_write8(uint32_t addr, uint8_t val, void* priv) if (!nv3_ramin_arbitrate_write(addr, val32)) { nv3->nvbase.svga.vram[addr] = val; - nv_log("Write byte to PRAMIN addr=0x%08x val=0x%02x (raw address=0x%08x)\n", addr, val, raw_addr); + nv_log_verbose_only("Write byte to PRAMIN addr=0x%08x val=0x%02x (raw address=0x%08x)\n", addr, val, raw_addr); } @@ -165,7 +165,7 @@ void nv3_ramin_write16(uint32_t addr, uint16_t val, void* priv) if (!nv3_ramin_arbitrate_write(addr, val32)) { vram_16bit[addr] = val; - nv_log("Write word to PRAMIN addr=0x%08x val=0x%04x (raw address=0x%08x)\n", addr, val, raw_addr); + nv_log_verbose_only("Write word to PRAMIN addr=0x%08x val=0x%04x (raw address=0x%08x)\n", addr, val, raw_addr); } @@ -189,7 +189,7 @@ void nv3_ramin_write32(uint32_t addr, uint32_t val, void* priv) if (!nv3_ramin_arbitrate_write(addr, val)) { vram_32bit[addr] = val; - nv_log("Write dword to PRAMIN addr=0x%08x val=0x%08x (raw address=0x%08x)\n", addr, val, raw_addr); + nv_log_verbose_only("Write dword to PRAMIN addr=0x%08x val=0x%08x (raw address=0x%08x)\n", addr, val, raw_addr); } } @@ -378,7 +378,7 @@ bool nv3_ramin_find_object(uint32_t name, uint32_t cache_num, uint8_t channel, u // Why does this work? uint32_t ramht_cur_address = ramht_base + (nv3_ramht_hash(name, channel) * bucket_entries * 8); - nv_log("Beginning search for graphics object at RAMHT base=0x%04x, name=0x%08x, Cache%d, channel=%d.%d)\n", + nv_log_verbose_only("Beginning search for graphics object at RAMHT base=0x%04x, name=0x%08x, Cache%d, channel=%d.%d)\n", ramht_cur_address, name, cache_num, channel, subchannel); bool found_object = false; @@ -503,13 +503,13 @@ bool nv3_ramin_find_object(uint32_t name, uint32_t cache_num, uint8_t channel, u void nv3_debug_ramin_print_context_info(uint32_t name, nv3_ramin_context_t context) { #ifndef RELEASE_BUILD - nv_log("Found object:\n"); - nv_log("Param: 0x%04x\n", name); + nv_log_verbose_only("Found object:\n"); + nv_log_verbose_only("Param: 0x%04x\n", name); - nv_log("Context:\n"); - nv_log("DMA Channel %d (0-7 valid)\n", context.channel); - nv_log("Class ID: =0x%04x (%s)\n", context.class_id & 0x1F, nv3_class_names[context.class_id & 0x1F]); - nv_log("Render Engine %d (0=Software, also DMA? 1=Accelerated Renderer)\n", context.is_rendering); - nv_log("PRAMIN Offset 0x%08x\n", context.ramin_offset << 4); + nv_log_verbose_only("Context:\n"); + nv_log_verbose_only("DMA Channel %d (0-7 valid)\n", context.channel); + nv_log_verbose_only("Class ID: =0x%04x (%s)\n", context.class_id & 0x1F, nv3_class_names[context.class_id & 0x1F]); + nv_log_verbose_only("Render Engine %d (0=Software, also DMA? 1=Accelerated Renderer)\n", context.is_rendering); + nv_log_verbose_only("PRAMIN Offset 0x%08x\n", context.ramin_offset << 4); #endif } diff --git a/src/video/nv/nv3/subsystems/nv3_pramin_ramfc.c b/src/video/nv/nv3/subsystems/nv3_pramin_ramfc.c index fa0d5899c..51d33c9a6 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramin_ramfc.c +++ b/src/video/nv/nv3/subsystems/nv3_pramin_ramfc.c @@ -30,10 +30,10 @@ uint32_t nv3_ramfc_read(uint32_t address) { - nv_log("RAMFC (Unused DMA channel context) Read (0x%04x)), I DON'T BELIEVE THIS SHOULD EVER HAPPEN - RETURNING 0x00\n", address); + nv_log_verbose_only("RAMFC (Unused DMA channel context) Read (0x%04x)\n", address); } void nv3_ramfc_write(uint32_t address, uint32_t value) { - nv_log("RAMFC (Unused DMA channel context) Write (0x%04x -> 0x%04x)), I DON'T BELIEVE THIS SHOULD EVER HAPPEN\n", value, address); + nv_log_verbose_only("RAMFC (Unused DMA channel context) Write (0x%04x -> 0x%04x)\n", value, address); } \ No newline at end of file diff --git a/src/video/nv/nv3/subsystems/nv3_pramin_ramht.c b/src/video/nv/nv3/subsystems/nv3_pramin_ramht.c index cce1d74a9..d2d17d321 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramin_ramht.c +++ b/src/video/nv/nv3/subsystems/nv3_pramin_ramht.c @@ -39,17 +39,17 @@ uint32_t nv3_ramht_hash(uint32_t name, uint32_t channel) // is this the right endianness? - nv_log("Generated RAMHT hash 0x%04x (RAMHT slot=0x%04x (from name 0x%08x for DMA channel 0x%04x)\n)\n", hash, (hash/8), name, channel); + nv_log_verbose_only("Generated RAMHT hash 0x%04x (RAMHT slot=0x%04x (from name 0x%08x for DMA channel 0x%04x)\n)\n", hash, (hash/8), name, channel); return hash; } uint32_t nv3_ramht_read(uint32_t address) { - nv_log("RAMHT (Graphics object storage hashtable) Read (0x%04x), I DON'T BELIEVE THIS SHOULD EVER HAPPEN - RETURNING 0x00\n", address); + nv_log_verbose_only("RAMHT (Graphics object storage hashtable) Read (0x%04x), I DON'T BELIEVE THIS SHOULD EVER HAPPEN - RETURNING 0x00\n", address); } void nv3_ramht_write(uint32_t address, uint32_t value) { - nv_log("RAMHT (Graphics object storage hashtable) Write (0x%04x -> 0x%04x), I DON'T BELIEVE THIS SHOULD EVER HAPPEN - UNIMPLEMENTED\n", value, address); + nv_log_verbose_only("RAMHT (Graphics object storage hashtable) Write (0x%04x -> 0x%04x), I DON'T BELIEVE THIS SHOULD EVER HAPPEN - UNIMPLEMENTED\n", value, address); } diff --git a/src/video/nv/nv3/subsystems/nv3_pramin_ramro.c b/src/video/nv/nv3/subsystems/nv3_pramin_ramro.c index 1209faa2f..692a10e91 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramin_ramro.c +++ b/src/video/nv/nv3/subsystems/nv3_pramin_ramro.c @@ -30,15 +30,10 @@ uint32_t nv3_ramro_read(uint32_t address) { - nv_log("RAM Runout (invalid dma object submission) Read (0x%04x), Probably shouldn't happenn\n", address); + nv_log("BIG Problem: RAM Runout (invalid dma object submission) Read (0x%04x)\n", address); } void nv3_ramro_write(uint32_t address, uint32_t value) { - nv_log("RAM Runout WRITE, OH CRAP!!!! (0x%04x -> 0x%04x), Probably shouldn't happenn", value, address); -} - -void nv3_ramro_send() -{ - + nv_log("BIG Problem: RAM Runout WRITE, OH CRAP!!!! (0x%04x -> 0x%04x)", value, address); } \ No newline at end of file diff --git a/src/video/nv/nv3/subsystems/nv3_ptimer.c b/src/video/nv/nv3/subsystems/nv3_ptimer.c index c1b8a2576..3a882b5b8 100644 --- a/src/video/nv/nv3/subsystems/nv3_ptimer.c +++ b/src/video/nv/nv3/subsystems/nv3_ptimer.c @@ -82,7 +82,7 @@ void nv3_ptimer_tick(double real_time) // Only log on ptimer alarm. Otherwise, it's too much spam. if (nv3->ptimer.time >= nv3->ptimer.alarm) { - nv_log("PTIMER alarm interrupt fired (if interrupts enabled) because we reached TIME value 0x%08x\n", nv3->ptimer.alarm); + nv_log_verbose_only("PTIMER alarm interrupt fired (if interrupts enabled) because we reached TIME value 0x%08x\n", nv3->ptimer.alarm); nv3_ptimer_interrupt(NV3_PTIMER_INTR_ALARM); } } @@ -97,7 +97,7 @@ uint32_t nv3_ptimer_read(uint32_t address) if (address != NV3_PTIMER_TIME_0_NSEC && address != NV3_PTIMER_TIME_1_NSEC) { - nv_log("PTIMER Read from 0x%08x", address); + nv_log_verbose_only("PTIMER Read from 0x%08x", address); } uint32_t ret = 0x00; @@ -147,9 +147,9 @@ uint32_t nv3_ptimer_read(uint32_t address) && reg->address != NV3_PTIMER_TIME_1_NSEC) { if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } } else @@ -165,15 +165,15 @@ void nv3_ptimer_write(uint32_t address, uint32_t value) // before doing anything, check the subsystem enablement nv_register_t* reg = nv_get_register(address, ptimer_registers, sizeof(ptimer_registers)/sizeof(ptimer_registers[0])); - nv_log("PTIMER Write 0x%08x -> 0x%08x", value, address); + nv_log_verbose_only("PTIMER Write 0x%08x -> 0x%08x", value, address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) diff --git a/src/video/nv/nv3/subsystems/nv3_pvideo.c b/src/video/nv/nv3/subsystems/nv3_pvideo.c index 6f72da719..c883ee7e5 100644 --- a/src/video/nv/nv3/subsystems/nv3_pvideo.c +++ b/src/video/nv/nv3/subsystems/nv3_pvideo.c @@ -55,15 +55,15 @@ uint32_t nv3_pvideo_read(uint32_t address) // todo: friendly logging - nv_log("PVIDEO Read from 0x%08x", address); + nv_log_verbose_only("PVIDEO Read from 0x%08x", address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_read) @@ -95,9 +95,9 @@ uint32_t nv3_pvideo_read(uint32_t address) } if (reg->friendly_name) - nv_log(": 0x%08x <- %s\n", ret, reg->friendly_name); + nv_log_verbose_only(": 0x%08x <- %s\n", ret, reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); } else { @@ -112,15 +112,15 @@ void nv3_pvideo_write(uint32_t address, uint32_t value) // before doing anything, check the subsystem enablement nv_register_t* reg = nv_get_register(address, pvideo_registers, sizeof(pvideo_registers)/sizeof(pvideo_registers[0])); - nv_log("PVIDEO Write 0x%08x -> 0x%08x\n", value, address); + nv_log_verbose_only("PVIDEO Write 0x%08x -> 0x%08x\n", value, address); // if the register actually exists if (reg) { if (reg->friendly_name) - nv_log(": %s\n", reg->friendly_name); + nv_log_verbose_only(": %s\n", reg->friendly_name); else - nv_log("\n"); + nv_log_verbose_only("\n"); // on-read function if (reg->on_write) diff --git a/src/video/nv/nv3/subsystems/nv3_user.c b/src/video/nv/nv3/subsystems/nv3_user.c index 99091b5b7..f10e28793 100644 --- a/src/video/nv/nv3/subsystems/nv3_user.c +++ b/src/video/nv/nv3/subsystems/nv3_user.c @@ -40,8 +40,7 @@ uint32_t nv3_user_read(uint32_t address) uint8_t channel = (address - NV3_USER_START) / 0x10000; uint8_t subchannel = ((address - NV3_USER_START)) / 0x2000 % NV3_DMA_SUBCHANNELS_PER_CHANNEL; - nv_log("User Submission Area PIO Channel %d.%d method_offset=0x%04x\n", channel, subchannel, method_offset); - + nv_log_verbose_only("User Submission Area PIO Channel %d.%d method_offset=0x%04x\n", channel, subchannel, method_offset); // 0x10 is free CACHE1 object // TODO: THERE ARE OTHER STUFF! @@ -54,8 +53,7 @@ uint32_t nv3_user_read(uint32_t address) } - nv_log("IT'S NOT IMPLEMENTED!!!! offset=0x%04x\n", method_offset); - + nv_log("NV_USER READ: Channel FIELD NOT IMPLEMENTED!!!! offset=0x%04x\n", method_offset); return 0x00; }; diff --git a/src/video/nv/nv_base.c b/src/video/nv/nv_base.c index 185c46183..bce7425c2 100644 --- a/src/video/nv/nv_base.c +++ b/src/video/nv/nv_base.c @@ -50,31 +50,52 @@ void nv_log_set_device(void* device) nv_log_device = device; } -void nv_log(const char *fmt, ...) +void nv_log_internal(const char* fmt, va_list arg) { if (!nv_log_device) return; - va_list ap; - - if (nv_do_log) { - va_start(ap, fmt); - // If our debug config option is configured, full log. Otherwise log with cyclical detection. - #ifndef RELEASE_BUILD - if (nv_log_full) - log_out(nv_log_device, fmt, ap); - else - #endif - log_out_cyclic(nv_log_device, fmt, ap); - - va_end(ap); - } + if (nv_log_full) + log_out(nv_log_device, fmt, arg); + else + log_out_cyclic(nv_log_device, fmt, arg); + } + +void nv_log(const char *fmt, ...) +{ + va_list arg; + + if (!nv_do_log) + return; + + va_start(arg, fmt); + nv_log_internal(fmt, arg); + va_end(arg); +} + +void nv_log_verbose_only(const char *fmt, ...) +{ + #ifdef ENABLE_NV_LOG_ULTRA + if (!nv_do_log) + return; + + va_start(arg, fmt); + nv_log_internal(fmt, arg); + va_end(arg); + #endif +} + #else void nv_log(const char *fmt, ...) { + +} +void nv_log_verbose_only(const char *fmt, ...) +{ + } void nv_log_set_device(void* device)