From ab71f9d3e213b3792aa40c83639ffbe4ac2739fb Mon Sep 17 00:00:00 2001 From: MaxwellS04 Date: Fri, 16 Aug 2024 20:36:26 +0700 Subject: [PATCH 01/64] Added the miroCRYSTAL 3D, based on a S3 ViRGE. --- src/include/86box/video.h | 1 + src/video/vid_s3_virge.c | 26 ++++++++++++++++++++++++++ src/video/vid_table.c | 1 + 3 files changed, 28 insertions(+) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 1037e213f..2f5a629d1 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -528,6 +528,7 @@ extern const device_t s3_trio64v2_dx_onboard_pci_device; /* S3 ViRGE */ extern const device_t s3_virge_325_pci_device; extern const device_t s3_diamond_stealth_2000_pci_device; +extern const device_t s3_mirocrystal_3d_pci_device; extern const device_t s3_diamond_stealth_3000_pci_device; extern const device_t s3_stb_velocity_3d_pci_device; extern const device_t s3_virge_375_pci_device; diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 155380480..0a6103801 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -61,6 +61,7 @@ static int dither[4][4] = { #define ROM_VIRGE_325 "roms/video/s3virge/86c325.bin" #define ROM_DIAMOND_STEALTH3D_2000 "roms/video/s3virge/s3virge.bin" +#define ROM_MIROCRYSTAL_3D "roms/video/s3virge/miro Crystal 3D 1.02.bin" #define ROM_DIAMOND_STEALTH3D_3000 "roms/video/s3virge/diamondstealth3000.vbi" #define ROM_STB_VELOCITY_3D "roms/video/s3virge/stb_velocity3d_110.BIN" #define ROM_VIRGE_DX "roms/video/s3virge/86c375_1.bin" @@ -91,6 +92,7 @@ static int dither[4][4] = { enum { S3_VIRGE_325, S3_DIAMOND_STEALTH3D_2000, + S3_MIROCRYSTAL_3D, S3_DIAMOND_STEALTH3D_3000, S3_STB_VELOCITY_3D, S3_VIRGE_DX, @@ -4259,6 +4261,9 @@ s3_virge_init(const device_t *info) case S3_DIAMOND_STEALTH3D_2000: bios_fn = ROM_DIAMOND_STEALTH3D_2000; break; + case S3_MIROCRYSTAL_3D: + bios_fn = ROM_MIROCRYSTAL_3D; + break; case S3_DIAMOND_STEALTH3D_3000: bios_fn = ROM_DIAMOND_STEALTH3D_3000; break; @@ -4353,6 +4358,7 @@ s3_virge_init(const device_t *info) switch (info->local) { case S3_VIRGE_325: case S3_DIAMOND_STEALTH3D_2000: + case S3_MIROCRYSTAL_3D: virge->fifo_slots_num = 8; virge->svga.decode_mask = (4 << 20) - 1; virge->virge_id_high = 0x56; @@ -4530,6 +4536,12 @@ s3_virge_325_available(void) return rom_present(ROM_VIRGE_325); } +static int +s3_mirocrystal_3d_available(void) +{ + return rom_present(ROM_MIROCRYSTAL_3D); +} + static int s3_virge_988_diamond_available(void) { @@ -4763,6 +4775,20 @@ const device_t s3_diamond_stealth_2000_pci_device = { .config = s3_virge_config }; +const device_t s3_diamond_stealth_2000_pci_device = { + .name = "S3 ViRGE (miroCRYSTAL 3D) PCI", + .internal_name = "mirocrystal_3d_pci", + .flags = DEVICE_PCI, + .local = S3_MIROCRYSTAL_3D, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, + { .available = s3_mirocrystal_3d_available }, + .speed_changed = s3_virge_speed_changed, + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_357_config +}; + const device_t s3_diamond_stealth_3000_pci_device = { .name = "S3 ViRGE/VX (Diamond Stealth 3D 3000) PCI", .internal_name = "stealth3d_3000_pci", diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 13639d05d..c4dee5719 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -174,6 +174,7 @@ video_cards[] = { { &s3_trio64v2_dx_pci_device }, { &s3_virge_325_pci_device }, { &s3_diamond_stealth_2000_pci_device }, + { &s3_mirocrystal_3d_pci_device }, { &s3_diamond_stealth_3000_pci_device }, { &s3_stb_velocity_3d_pci_device }, { &s3_virge_375_pci_device }, From 24e2c65c409e38259e3095a5d3eebfefa49ff1a5 Mon Sep 17 00:00:00 2001 From: MaxwellS04 Date: Fri, 16 Aug 2024 20:44:51 +0700 Subject: [PATCH 02/64] Fixed a compile-breaking mistake --- src/video/vid_s3_virge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 0a6103801..47332324f 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -4775,7 +4775,7 @@ const device_t s3_diamond_stealth_2000_pci_device = { .config = s3_virge_config }; -const device_t s3_diamond_stealth_2000_pci_device = { +const device_t s3_mirocrystal_3d_pci_device = { .name = "S3 ViRGE (miroCRYSTAL 3D) PCI", .internal_name = "mirocrystal_3d_pci", .flags = DEVICE_PCI, From a02b4e52c3dc088fd3ff471abf065ffae37d7d6a Mon Sep 17 00:00:00 2001 From: MaxwellS04 Date: Sat, 17 Aug 2024 00:53:02 +0700 Subject: [PATCH 03/64] Fixed configuration --- src/video/vid_s3_virge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 47332324f..700722253 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -4786,7 +4786,7 @@ const device_t s3_mirocrystal_3d_pci_device = { { .available = s3_mirocrystal_3d_available }, .speed_changed = s3_virge_speed_changed, .force_redraw = s3_virge_force_redraw, - .config = s3_virge_357_config + .config = s3_virge_config }; const device_t s3_diamond_stealth_3000_pci_device = { From aebaabb6b8e78beedd3b8210113183a9141fde98 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 20 Aug 2024 15:45:56 +0200 Subject: [PATCH 04/64] ViRGE changes of the day (August 20th, 2024) 1. ROM updated to 1.03. 2. Re-apply more fixes that were missed during the restructuring to be on par with PCem's speed. 3. Implemented Command DMA bus mastering required by Diamond Stealth 3D specific drivers (especially the GX2-based 4000). 4. Some indentation fixes. --- src/video/vid_s3_virge.c | 1079 ++++++++++++++++++++------------------ 1 file changed, 561 insertions(+), 518 deletions(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 286e459e7..d0831ff4a 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -67,7 +67,7 @@ static int dither[4][4] = { #define ROM_DIAMOND_STEALTH3D_2000PRO "roms/video/s3virge/virgedxdiamond.vbi" #define ROM_VIRGE_GX "roms/video/s3virge/86c375_4.bin" #define ROM_VIRGE_GX2 "roms/video/s3virge/flagpoint.VBI" -#define ROM_DIAMOND_STEALTH3D_4000 "roms/video/s3virge/86c357.bin" +#define ROM_DIAMOND_STEALTH3D_4000 "roms/video/s3virge/DS3D4K v1.03 Brightness bug fix.bin" #define ROM_TRIO3D2X "roms/video/s3virge/TRIO3D2X_8mbsdr.VBI" #define RB_SIZE 256 @@ -286,9 +286,9 @@ typedef struct virge_t { s3d_t s3d_tri; s3d_t s3d_buffer[RB_SIZE]; - int s3d_read_idx; - int s3d_write_idx; - int s3d_busy; + atomic_int s3d_read_idx; + atomic_int s3d_write_idx; + atomic_int s3d_busy; struct { uint32_t pri_ctrl; @@ -328,15 +328,14 @@ typedef struct virge_t { } streams; fifo_entry_t fifo[FIFO_SIZE]; - volatile int fifo_read_idx, fifo_write_idx; - - volatile int fifo_thread_run, render_thread_run; + atomic_int fifo_read_idx, fifo_write_idx; + atomic_int fifo_thread_run, render_thread_run; thread_t * fifo_thread; event_t *wake_fifo_thread; event_t * fifo_not_full_event; - int virge_busy; + atomic_int virge_busy; uint8_t subsys_stat; uint8_t subsys_cntl; @@ -361,7 +360,16 @@ typedef struct virge_t { uint8_t cmd_dma; uint32_t cmd_dma_base; - uint32_t dma_ptr; + uint32_t cmd_dma_buf_size; + uint32_t cmd_dma_buf_size_mask; + uint32_t cmd_base_addr; + uint32_t cmd_dma_write_ptr_reg; + uint32_t cmd_dma_write_ptr_update; + uint32_t cmd_dma_read_ptr_reg; + uint32_t dma_val; + uint32_t dma_dbl_words; + uint32_t dma_mmio_addr; + uint32_t dma_data_type; int pci; int is_agp; @@ -394,6 +402,8 @@ static void s3_virge_mmio_write(uint32_t addr, uint8_t val, void *priv); static void s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv); static void s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv); +static void s3_virge_queue(virge_t *virge, uint32_t addr, uint32_t val, uint32_t type); + enum { CMD_SET_AE = 1, CMD_SET_HC = (1 << 1), @@ -440,6 +450,8 @@ enum { #define INT_S3D_DONE (1 << 1) #define INT_FIFO_OVF (1 << 2) #define INT_FIFO_EMP (1 << 3) +#define INT_HOST_DONE (1 << 4) +#define INT_CMD_DONE (1 << 5) #define INT_3DF_EMP (1 << 6) #define INT_MASK 0xff @@ -726,9 +738,6 @@ s3_virge_in(uint16_t addr, void *priv) { case 0x35: ret = (svga->crtc[0x35] & 0xf0) | (virge->bank & 0xf); break; - case 0x36: - ret = (svga->crtc[0x36] & 0xfc) | 2; - break; /*PCI bus*/ case 0x45: virge->hwc_col_stack_pos = 0; ret = svga->crtc[0x45]; @@ -783,7 +792,8 @@ s3_virge_in(uint16_t addr, void *priv) { } static void -s3_virge_recalctimings(svga_t *svga) { +s3_virge_recalctimings(svga_t *svga) +{ virge_t *virge = (virge_t *) svga->priv; svga->hdisp = svga->hdisp_old; @@ -855,7 +865,7 @@ s3_virge_recalctimings(svga_t *svga) { video_force_resize_set_monitor(1, svga->monitor_index); } - if ((svga->crtc[0x67] & 0xc) != 0xc) { /*VGA mode*/ + if (((svga->crtc[0x67] & 0xc) != 0xc) || (virge->chip >= S3_VIRGEGX2)) { /*VGA mode*/ svga->ma_latch |= (virge->ma_ext << 16); if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; @@ -892,8 +902,8 @@ s3_virge_recalctimings(svga_t *svga) { svga->render = svga_render_32bpp_highres; break; - default: - break; + default: + break; } svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && @@ -1035,7 +1045,7 @@ s3_virge_updatemapping(virge_t *virge) { virge->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); if ((svga->crtc[0x58] & 0x10) || (virge->advfunc_cntl & 0x10)) { /*Linear framebuffer*/ - switch (svga->crtc[0x58] & 3) { + switch (svga->crtc[0x58] & 7) { case 0: /*64k*/ virge->linear_size = 0x10000; break; @@ -1104,7 +1114,8 @@ s3_virge_wait_fifo_idle(virge_t *virge) { } static uint8_t -s3_virge_mmio_read(uint32_t addr, void *priv) { +s3_virge_mmio_read(uint32_t addr, void *priv) +{ virge_t *virge = (virge_t *) priv; uint8_t ret; @@ -1121,6 +1132,7 @@ s3_virge_mmio_read(uint32_t addr, void *priv) { ret |= 0x10; else ret |= 0x30; + if (!virge->virge_busy) wake_fifo_thread(virge); return ret; @@ -1153,7 +1165,8 @@ s3_virge_mmio_read(uint32_t addr, void *priv) { } static uint16_t -s3_virge_mmio_read_w(uint32_t addr, void *priv) { +s3_virge_mmio_read_w(uint32_t addr, void *priv) +{ virge_t *virge = (virge_t *) priv; uint16_t ret; @@ -1187,7 +1200,6 @@ s3_virge_mmio_read_w(uint32_t addr, void *priv) { static uint32_t s3_virge_mmio_read_l(uint32_t addr, void *priv) { virge_t *virge = (virge_t *) priv; - svga_t *svga = &virge->svga; uint32_t ret = 0xffffffff; switch (addr & 0xfffc) { @@ -1208,46 +1220,30 @@ s3_virge_mmio_read_l(uint32_t addr, void *priv) { break; case 0x81a0: ret = virge->streams.blend_ctrl; - svga_recalctimings(svga); break; case 0x81c0: ret = virge->streams.pri_fb0; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81c4: ret = virge->streams.pri_fb1; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81c8: ret = virge->streams.pri_stride; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81cc: ret = virge->streams.buffer_ctrl; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81d0: ret = virge->streams.sec_fb0; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81d4: ret = virge->streams.sec_fb1; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81d8: ret = virge->streams.sec_stride; - s3_virge_update_buffer(virge); - svga->fullchange = changeframecount; break; case 0x81dc: ret = virge->streams.overlay_ctrl; - svga->fullchange = changeframecount; break; case 0x81e0: ret = virge->streams.k1_vert_scale; @@ -1280,6 +1276,7 @@ s3_virge_mmio_read_l(uint32_t addr, void *priv) { ret |= 0x00001000; else ret |= 0x00003000; + ret |= virge->subsys_stat; if (!virge->virge_busy) wake_fifo_thread(virge); @@ -1294,12 +1291,15 @@ s3_virge_mmio_read_l(uint32_t addr, void *priv) { ret = virge->cmd_dma_base; break; case 0x8594: + ret = virge->cmd_dma_write_ptr_reg; break; case 0x8598: - ret = virge->dma_ptr; + ret = virge->cmd_dma_read_ptr_reg; + if (ret > virge->cmd_dma_write_ptr_reg) + ret = virge->cmd_dma_write_ptr_reg; break; case 0x859c: - ret = virge->cmd_dma; + ret = 0; /*To prevent DMA overflows.*/ break; case 0xa4d4: @@ -1426,13 +1426,322 @@ s3_virge_mmio_read_l(uint32_t addr, void *priv) { default: ret = s3_virge_mmio_read_w(addr, priv) | (s3_virge_mmio_read_w(addr + 2, priv) << 16); + break; } + //pclog("MMIO ReadL=%04x, ret=%08x.\n", addr & 0xfffc, ret); return ret; } static void -fifo_thread(void *param) { +s3_virge_mmio_write_fifo_l(virge_t *virge, uint32_t addr, uint32_t val) +{ + switch (addr) { + case 0xa000 ... 0xa1fc: + { + int x = addr & 4; + int y = (addr >> 3) & 7; + int color; + int byte; + uint32_t newaddr = addr; + virge->s3d.pattern_8[y * 8 + x] = val & 0xff; + virge->s3d.pattern_8[y * 8 + x + 1] = val >> 8; + virge->s3d.pattern_8[y * 8 + x + 2] = val >> 16; + virge->s3d.pattern_8[y * 8 + x + 3] = val >> 24; + + x = (addr >> 1) & 6; + y = (addr >> 4) & 7; + virge->s3d.pattern_16[y * 8 + x] = val & 0xffff; + virge->s3d.pattern_16[y * 8 + x + 1] = val >> 16; + + newaddr &= 0x00ff; + for (uint8_t xx = 0; xx < 4; xx++) { + x = ((newaddr + xx) / 3) % 8; + y = ((newaddr + xx) / 24) % 8; + color = ((newaddr + xx) % 3) << 3; + byte = (xx << 3); + virge->s3d.pattern_24[y * 8 + x] &= ~(0xff << color); + virge->s3d.pattern_24[y * 8 + x] |= ((val >> byte) & 0xff) << color; + } + + x = (addr >> 2) & 7; + y = (addr >> 5) & 7; + virge->s3d.pattern_32[y * 8 + x] = val & 0xffffff; + } break; + + case 0xa4d4: + case 0xa8d4: + case 0xacd4: + virge->s3d.src_base = val & ((virge->memory_size == 8) ? + (val & 0x7ffff8) : (val & 0x3ffff8)); + break; + case 0xa4d8: + case 0xa8d8: + case 0xacd8: + virge->s3d.dest_base = val & ((virge->memory_size == 8) ? + (val & 0x7ffff8) : (val & 0x3ffff8)); + break; + case 0xa4dc: + case 0xa8dc: + case 0xacdc: + virge->s3d.clip_l = (val >> 16) & 0x7ff; + virge->s3d.clip_r = val & 0x7ff; + break; + case 0xa4e0: + case 0xa8e0: + case 0xace0: + virge->s3d.clip_t = (val >> 16) & 0x7ff; + virge->s3d.clip_b = val & 0x7ff; + break; + case 0xa4e4: + case 0xa8e4: + case 0xace4: + virge->s3d.dest_str = (val >> 16) & 0xff8; + virge->s3d.src_str = val & 0xff8; + break; + case 0xa4e8: + case 0xace8: + virge->s3d.mono_pat_0 = val; + break; + case 0xa4ec: + case 0xacec: + virge->s3d.mono_pat_1 = val; + break; + case 0xa4f0: + case 0xacf0: + virge->s3d.pat_bg_clr = val; + break; + case 0xa4f4: + case 0xa8f4: + case 0xacf4: + virge->s3d.pat_fg_clr = val; + break; + case 0xa4f8: + virge->s3d.src_bg_clr = val; + break; + case 0xa4fc: + virge->s3d.src_fg_clr = val; + break; + case 0xa500: + case 0xa900: + case 0xad00: + virge->s3d.cmd_set = val; + if (!(val & CMD_SET_AE)) + s3_virge_bitblt(virge, -1, 0); + break; + case 0xa504: + virge->s3d.r_width = (val >> 16) & 0x7ff; + virge->s3d.r_height = val & 0x7ff; + break; + case 0xa508: + virge->s3d.rsrc_x = (val >> 16) & 0x7ff; + virge->s3d.rsrc_y = val & 0x7ff; + break; + case 0xa50c: + virge->s3d.rdest_x = (val >> 16) & 0x7ff; + virge->s3d.rdest_y = val & 0x7ff; + if (virge->s3d.cmd_set & CMD_SET_AE) + s3_virge_bitblt(virge, -1, 0); + break; + case 0xa96c: + virge->s3d.lxend0 = (val >> 16) & 0x7ff; + virge->s3d.lxend1 = val & 0x7ff; + break; + case 0xa970: + virge->s3d.ldx = (int32_t)val; + break; + case 0xa974: + virge->s3d.lxstart = val; + break; + case 0xa978: + virge->s3d.lystart = val & 0x7ff; + break; + case 0xa97c: + virge->s3d.lycnt = val & 0x7ff; + virge->s3d.line_dir = val >> 31; + if (virge->s3d.cmd_set & CMD_SET_AE) + s3_virge_bitblt(virge, -1, 0); + break; + + case 0xad68: + virge->s3d.prdx = val; + break; + case 0xad6c: + virge->s3d.prxstart = val; + break; + case 0xad70: + virge->s3d.pldx = val; + break; + case 0xad74: + virge->s3d.plxstart = val; + break; + case 0xad78: + virge->s3d.pystart = val & 0x7ff; + break; + case 0xad7c: + virge->s3d.pycnt = val & 0x300007ff; + if (virge->s3d.cmd_set & CMD_SET_AE) + s3_virge_bitblt(virge, -1, 0); + break; + + case 0xb0d4: + case 0xb4d4: + virge->s3d_tri.z_base = val & ((virge->memory_size == 8) ? + (val & 0x7ffff8) : (val & 0x3ffff8)); + break; + case 0xb0d8: + case 0xb4d8: + virge->s3d_tri.dest_base = val & ((virge->memory_size == 8) ? + (val & 0x7ffff8) : (val & 0x3ffff8)); + break; + case 0xb0dc: + case 0xb4dc: + virge->s3d_tri.clip_l = (val >> 16) & 0x7ff; + virge->s3d_tri.clip_r = val & 0x7ff; + break; + case 0xb0e0: + case 0xb4e0: + virge->s3d_tri.clip_t = (val >> 16) & 0x7ff; + virge->s3d_tri.clip_b = val & 0x7ff; + break; + case 0xb0e4: + case 0xb4e4: + virge->s3d_tri.dest_str = (val >> 16) & 0xff8; + virge->s3d.src_str = val & 0xff8; + break; + case 0xb0e8: + case 0xb4e8: + virge->s3d_tri.z_str = val & 0xff8; + break; + case 0xb4ec: + virge->s3d_tri.tex_base = val & ((virge->memory_size == 8) ? + (val & 0x7ffff8) : (val & 0x3ffff8)); + break; + case 0xb4f0: + virge->s3d_tri.tex_bdr_clr = val & 0xffffff; + break; + case 0xb0f4: + case 0xb4f4: + virge->s3d_tri.fog_b = val & 0xff; + virge->s3d_tri.fog_g = (val >> 8) & 0xff; + virge->s3d_tri.fog_r = (val >> 16) & 0xff; + break; + case 0xb100: + case 0xb500: + virge->s3d_tri.cmd_set = val; + if (!(val & CMD_SET_AE)) + queue_triangle(virge); + break; + case 0xb504: + virge->s3d_tri.tbv = val & 0xfffff; + break; + case 0xb508: + virge->s3d_tri.tbu = val & 0xfffff; + break; + case 0xb50c: + virge->s3d_tri.TdWdX = val; + break; + case 0xb510: + virge->s3d_tri.TdWdY = val; + break; + case 0xb514: + virge->s3d_tri.tws = val; + break; + case 0xb518: + virge->s3d_tri.TdDdX = val; + break; + case 0xb51c: + virge->s3d_tri.TdVdX = val; + break; + case 0xb520: + virge->s3d_tri.TdUdX = val; + break; + case 0xb524: + virge->s3d_tri.TdDdY = val; + break; + case 0xb528: + virge->s3d_tri.TdVdY = val; + break; + case 0xb52c: + virge->s3d_tri.TdUdY = val; + break; + case 0xb530: + virge->s3d_tri.tds = val; + break; + case 0xb534: + virge->s3d_tri.tvs = val; + break; + case 0xb538: + virge->s3d_tri.tus = val; + break; + case 0xb53c: + virge->s3d_tri.TdGdX = val >> 16; + virge->s3d_tri.TdBdX = val & 0xffff; + break; + case 0xb540: + virge->s3d_tri.TdAdX = val >> 16; + virge->s3d_tri.TdRdX = val & 0xffff; + break; + case 0xb544: + virge->s3d_tri.TdGdY = val >> 16; + virge->s3d_tri.TdBdY = val & 0xffff; + break; + case 0xb548: + virge->s3d_tri.TdAdY = val >> 16; + virge->s3d_tri.TdRdY = val & 0xffff; + break; + case 0xb54c: + virge->s3d_tri.tgs = (val >> 16) & 0xffff; + virge->s3d_tri.tbs = val & 0xffff; + break; + case 0xb550: + virge->s3d_tri.tas = (val >> 16) & 0xffff; + virge->s3d_tri.trs = val & 0xffff; + break; + + case 0xb554: + virge->s3d_tri.TdZdX = val; + break; + case 0xb558: + virge->s3d_tri.TdZdY = val; + break; + case 0xb55c: + virge->s3d_tri.tzs = val; + break; + case 0xb560: + virge->s3d_tri.TdXdY12 = val; + break; + case 0xb564: + virge->s3d_tri.txend12 = val; + break; + case 0xb568: + virge->s3d_tri.TdXdY01 = val; + break; + case 0xb56c: + virge->s3d_tri.txend01 = val; + break; + case 0xb570: + virge->s3d_tri.TdXdY02 = val; + break; + case 0xb574: + virge->s3d_tri.txs = val; + break; + case 0xb578: + virge->s3d_tri.tys = val; + break; + case 0xb57c: + virge->s3d_tri.ty01 = (val >> 16) & 0x7ff; + virge->s3d_tri.ty12 = val & 0x7ff; + virge->s3d_tri.tlr = val >> 31; + if (virge->s3d_tri.cmd_set & CMD_SET_AE) + queue_triangle(virge); + break; + } +} + +static void +fifo_thread(void *param) +{ virge_t *virge = (virge_t *)param; while (virge->fifo_thread_run) { @@ -1448,19 +1757,16 @@ fifo_thread(void *param) { switch (fifo->addr_type & FIFO_TYPE) { case FIFO_WRITE_BYTE: - if (((fifo->addr_type & FIFO_ADDR) & 0xfffc) < 0x8000) + if (((fifo->addr_type & FIFO_ADDR) & 0xffff) < 0x8000) s3_virge_bitblt(virge, 8, val); - else if (((fifo->addr_type & FIFO_ADDR) & 0xffff) == 0x859c) - virge->cmd_dma = val; break; case FIFO_WRITE_WORD: - if (((fifo->addr_type & FIFO_ADDR) & 0xfffc) < 0x8000) { + if (((fifo->addr_type & FIFO_ADDR) & 0xfffe) < 0x8000) { if (virge->s3d.cmd_set & CMD_SET_MS) s3_virge_bitblt(virge, 16, ((val >> 8) | (val << 8)) << 16); else - s3_virge_bitblt(virge, 16, val); - } else if (((fifo->addr_type & FIFO_ADDR) & 0xfffe) == 0x859c) - virge->cmd_dma = val; + s3_virge_bitblt(virge, 16, val); + } break; case FIFO_WRITE_DWORD: if (((fifo->addr_type & FIFO_ADDR) & 0xfffc) < 0x8000) { @@ -1470,324 +1776,8 @@ fifo_thread(void *param) { ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24)); else s3_virge_bitblt(virge, 32, val); - } else { - switch ((fifo->addr_type & FIFO_ADDR) & 0xfffc) { - case 0x8590: - virge->cmd_dma_base = val; - break; - - case 0x8594: - virge->dma_ptr = val; - break; - - case 0x8598: - break; - - case 0x859c: - virge->cmd_dma = val; - break; - - case 0xa000 ... 0xa1fc: - { - int x = (fifo->addr_type & FIFO_ADDR) & 4; - int y = ((fifo->addr_type & FIFO_ADDR) >> 3) & 7; - int color; - int byte; - uint32_t addr = (fifo->addr_type & FIFO_ADDR); - virge->s3d.pattern_8[y * 8 + x] = val & 0xff; - virge->s3d.pattern_8[y * 8 + x + 1] = val >> 8; - virge->s3d.pattern_8[y * 8 + x + 2] = val >> 16; - virge->s3d.pattern_8[y * 8 + x + 3] = val >> 24; - - x = ((fifo->addr_type & FIFO_ADDR) >> 1) & 6; - y = ((fifo->addr_type & FIFO_ADDR) >> 4) & 7; - virge->s3d.pattern_16[y * 8 + x] = val & 0xffff; - virge->s3d.pattern_16[y * 8 + x + 1] = val >> 16; - - addr &= 0x00ff; - for (uint8_t xx = 0; xx < 4; xx++) { - x = ((addr + xx) / 3) % 8; - y = ((addr + xx) / 24) % 8; - color = ((addr + xx) % 3) << 3; - byte = (xx << 3); - virge->s3d.pattern_24[y * 8 + x] &= ~(0xff << color); - virge->s3d.pattern_24[y * 8 + x] |= ((val >> byte) & 0xff) << color; - } - - x = ((fifo->addr_type & FIFO_ADDR) >> 2) & 7; - y = ((fifo->addr_type & FIFO_ADDR) >> 5) & 7; - virge->s3d.pattern_32[y * 8 + x] = val & 0xffffff; - } break; - - case 0xa4d4: - case 0xa8d4: - case 0xacd4: - virge->s3d.src_base = val & ((virge->memory_size == 8) ? - (val & 0x7ffff8) : (val & 0x3ffff8)); - break; - case 0xa4d8: - case 0xa8d8: - case 0xacd8: - virge->s3d.dest_base = val & ((virge->memory_size == 8) ? - (val & 0x7ffff8) : (val & 0x3ffff8)); - break; - case 0xa4dc: - case 0xa8dc: - case 0xacdc: - virge->s3d.clip_l = (val >> 16) & 0x7ff; - virge->s3d.clip_r = val & 0x7ff; - break; - case 0xa4e0: - case 0xa8e0: - case 0xace0: - virge->s3d.clip_t = (val >> 16) & 0x7ff; - virge->s3d.clip_b = val & 0x7ff; - break; - case 0xa4e4: - case 0xa8e4: - case 0xace4: - virge->s3d.dest_str = (val >> 16) & 0xff8; - virge->s3d.src_str = val & 0xff8; - break; - case 0xa4e8: - case 0xace8: - virge->s3d.mono_pat_0 = val; - break; - case 0xa4ec: - case 0xacec: - virge->s3d.mono_pat_1 = val; - break; - case 0xa4f0: - case 0xacf0: - virge->s3d.pat_bg_clr = val; - break; - case 0xa4f4: - case 0xa8f4: - case 0xacf4: - virge->s3d.pat_fg_clr = val; - break; - case 0xa4f8: - virge->s3d.src_bg_clr = val; - break; - case 0xa4fc: - virge->s3d.src_fg_clr = val; - break; - case 0xa500: - case 0xa900: - case 0xad00: - virge->s3d.cmd_set = val; - if (!(val & CMD_SET_AE)) - s3_virge_bitblt(virge, -1, 0); - break; - case 0xa504: - virge->s3d.r_width = (val >> 16) & 0x7ff; - virge->s3d.r_height = val & 0x7ff; - break; - case 0xa508: - virge->s3d.rsrc_x = (val >> 16) & 0x7ff; - virge->s3d.rsrc_y = val & 0x7ff; - break; - case 0xa50c: - virge->s3d.rdest_x = (val >> 16) & 0x7ff; - virge->s3d.rdest_y = val & 0x7ff; - if (virge->s3d.cmd_set & CMD_SET_AE) - s3_virge_bitblt(virge, -1, 0); - break; - case 0xa96c: - virge->s3d.lxend0 = (val >> 16) & 0x7ff; - virge->s3d.lxend1 = val & 0x7ff; - break; - case 0xa970: - virge->s3d.ldx = (int32_t)val; - break; - case 0xa974: - virge->s3d.lxstart = val; - break; - case 0xa978: - virge->s3d.lystart = val & 0x7ff; - break; - case 0xa97c: - virge->s3d.lycnt = val & 0x7ff; - virge->s3d.line_dir = val >> 31; - if (virge->s3d.cmd_set & CMD_SET_AE) - s3_virge_bitblt(virge, -1, 0); - break; - - case 0xad68: - virge->s3d.prdx = val; - break; - case 0xad6c: - virge->s3d.prxstart = val; - break; - case 0xad70: - virge->s3d.pldx = val; - break; - case 0xad74: - virge->s3d.plxstart = val; - break; - case 0xad78: - virge->s3d.pystart = val & 0x7ff; - break; - case 0xad7c: - virge->s3d.pycnt = val & 0x300007ff; - if (virge->s3d.cmd_set & CMD_SET_AE) - s3_virge_bitblt(virge, -1, 0); - break; - - case 0xb0d4: - case 0xb4d4: - virge->s3d_tri.z_base = val & ((virge->memory_size == 8) ? - (val & 0x7ffff8) : (val & 0x3ffff8)); - break; - case 0xb0d8: - case 0xb4d8: - virge->s3d_tri.dest_base = val & ((virge->memory_size == 8) ? - (val & 0x7ffff8) : (val & 0x3ffff8)); - break; - case 0xb0dc: - case 0xb4dc: - virge->s3d_tri.clip_l = (val >> 16) & 0x7ff; - virge->s3d_tri.clip_r = val & 0x7ff; - break; - case 0xb0e0: - case 0xb4e0: - virge->s3d_tri.clip_t = (val >> 16) & 0x7ff; - virge->s3d_tri.clip_b = val & 0x7ff; - break; - case 0xb0e4: - case 0xb4e4: - virge->s3d_tri.dest_str = (val >> 16) & 0xff8; - virge->s3d.src_str = val & 0xff8; - break; - case 0xb0e8: - case 0xb4e8: - virge->s3d_tri.z_str = val & 0xff8; - break; - case 0xb4ec: - virge->s3d_tri.tex_base = val & ((virge->memory_size == 8) ? - (val & 0x7ffff8) : (val & 0x3ffff8)); - break; - case 0xb4f0: - virge->s3d_tri.tex_bdr_clr = val & 0xffffff; - break; - case 0xb0f4: - case 0xb4f4: - virge->s3d_tri.fog_b = val & 0xff; - virge->s3d_tri.fog_g = (val >> 8) & 0xff; - virge->s3d_tri.fog_r = (val >> 16) & 0xff; - break; - case 0xb100: - case 0xb500: - virge->s3d_tri.cmd_set = val; - if (!(val & CMD_SET_AE)) - queue_triangle(virge); - break; - case 0xb504: - virge->s3d_tri.tbv = val & 0xfffff; - break; - case 0xb508: - virge->s3d_tri.tbu = val & 0xfffff; - break; - case 0xb50c: - virge->s3d_tri.TdWdX = val; - break; - case 0xb510: - virge->s3d_tri.TdWdY = val; - break; - case 0xb514: - virge->s3d_tri.tws = val; - break; - case 0xb518: - virge->s3d_tri.TdDdX = val; - break; - case 0xb51c: - virge->s3d_tri.TdVdX = val; - break; - case 0xb520: - virge->s3d_tri.TdUdX = val; - break; - case 0xb524: - virge->s3d_tri.TdDdY = val; - break; - case 0xb528: - virge->s3d_tri.TdVdY = val; - break; - case 0xb52c: - virge->s3d_tri.TdUdY = val; - break; - case 0xb530: - virge->s3d_tri.tds = val; - break; - case 0xb534: - virge->s3d_tri.tvs = val; - break; - case 0xb538: - virge->s3d_tri.tus = val; - break; - case 0xb53c: - virge->s3d_tri.TdGdX = val >> 16; - virge->s3d_tri.TdBdX = val & 0xffff; - break; - case 0xb540: - virge->s3d_tri.TdAdX = val >> 16; - virge->s3d_tri.TdRdX = val & 0xffff; - break; - case 0xb544: - virge->s3d_tri.TdGdY = val >> 16; - virge->s3d_tri.TdBdY = val & 0xffff; - break; - case 0xb548: - virge->s3d_tri.TdAdY = val >> 16; - virge->s3d_tri.TdRdY = val & 0xffff; - break; - case 0xb54c: - virge->s3d_tri.tgs = (val >> 16) & 0xffff; - virge->s3d_tri.tbs = val & 0xffff; - break; - case 0xb550: - virge->s3d_tri.tas = (val >> 16) & 0xffff; - virge->s3d_tri.trs = val & 0xffff; - break; - - case 0xb554: - virge->s3d_tri.TdZdX = val; - break; - case 0xb558: - virge->s3d_tri.TdZdY = val; - break; - case 0xb55c: - virge->s3d_tri.tzs = val; - break; - case 0xb560: - virge->s3d_tri.TdXdY12 = val; - break; - case 0xb564: - virge->s3d_tri.txend12 = val; - break; - case 0xb568: - virge->s3d_tri.TdXdY01 = val; - break; - case 0xb56c: - virge->s3d_tri.txend01 = val; - break; - case 0xb570: - virge->s3d_tri.TdXdY02 = val; - break; - case 0xb574: - virge->s3d_tri.txs = val; - break; - case 0xb578: - virge->s3d_tri.tys = val; - break; - case 0xb57c: - virge->s3d_tri.ty01 = (val >> 16) & 0x7ff; - virge->s3d_tri.ty12 = val & 0x7ff; - virge->s3d_tri.tlr = val >> 31; - if (virge->s3d_tri.cmd_set & CMD_SET_AE) - queue_triangle(virge); - break; - } - } + } else + s3_virge_mmio_write_fifo_l(virge, (fifo->addr_type & FIFO_ADDR) & 0xfffc, val); break; } @@ -1802,6 +1792,9 @@ fifo_thread(void *param) { } virge->virge_busy = 0; virge->subsys_stat |= INT_FIFO_EMP | INT_3DF_EMP; + if (virge->cmd_dma) + virge->subsys_stat |= INT_HOST_DONE | INT_CMD_DONE; + s3_virge_update_irqs(virge); } } @@ -1852,7 +1845,7 @@ static void s3_virge_mmio_write(uint32_t addr, uint8_t val, void *priv) { virge_t *virge = (virge_t *) priv; - if ((addr & 0xfffc) < 0x8000) + if ((addr & 0xffff) < 0x8000) s3_virge_queue(virge, addr, val, FIFO_WRITE_BYTE); else switch (addr & 0xffff) { case 0x83b0 ... 0x83df: @@ -1870,9 +1863,10 @@ static void s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv) { virge_t *virge = (virge_t *) priv; - if ((addr & 0xfffc) < 0x8000) + if ((addr & 0xfffe) < 0x8000) s3_virge_queue(virge, addr, val, FIFO_WRITE_WORD); else switch (addr & 0xfffe) { + default: case 0x83d4: s3_virge_mmio_write(addr, val, priv); s3_virge_mmio_write(addr + 1, val >> 8, priv); @@ -1887,144 +1881,192 @@ s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv) { static void s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { virge_t *virge = (virge_t *) priv; - svga_t * svga = &virge->svga; + svga_t *svga = &virge->svga; if ((addr & 0xfffc) < 0x8000) s3_virge_queue(virge, addr, val, FIFO_WRITE_DWORD); else if ((addr & 0xe000) == 0xa000) s3_virge_queue(virge, addr, val, FIFO_WRITE_DWORD); - else switch (addr & 0xfffc) { - case 0x8180: - virge->streams.pri_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x8184: - virge->streams.chroma_ctrl = val; - break; - case 0x8190: - virge->streams.sec_ctrl = val; - virge->streams.dda_horiz_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_horiz_accumulator |= 0xfffff800; - virge->streams.sdif = (val >> 24) & 7; - break; - case 0x8194: - virge->streams.chroma_upper_bound = val; - break; - case 0x8198: - virge->streams.sec_filter = val; - virge->streams.k1_horiz_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_horiz_scale |= 0xfffff800; - virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; - if ((val >> 16) & (1 << 10)) - virge->streams.k2_horiz_scale |= 0xfffff800; - break; - case 0x81a0: - virge->streams.blend_ctrl = val; - break; - case 0x81c0: - virge->streams.pri_fb0 = val & ((virge->memory_size == 8) ? - (val & 0x7fffff) : (val & 0x3fffff)); - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c4: - virge->streams.pri_fb1 = ((virge->memory_size == 8) ? - (val & 0x7fffff) : (val & 0x3fffff)); - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c8: - virge->streams.pri_stride = val & 0xfff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81cc: - virge->streams.buffer_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d0: - virge->streams.sec_fb0 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d4: - virge->streams.sec_fb1 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d8: - virge->streams.sec_stride = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81dc: - virge->streams.overlay_ctrl = val; - break; - case 0x81e0: - virge->streams.k1_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_vert_scale |= 0xfffff800; - break; - case 0x81e4: - virge->streams.k2_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k2_vert_scale |= 0xfffff800; - break; - case 0x81e8: - virge->streams.dda_vert_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_vert_accumulator |= 0xfffff800; - break; - case 0x81ec: - virge->streams.fifo_ctrl = val; - break; - case 0x81f0: - virge->streams.pri_start = val; - virge->streams.pri_x = (val >> 16) & 0x7ff; - virge->streams.pri_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f4: - virge->streams.pri_size = val; - virge->streams.pri_w = (val >> 16) & 0x7ff; - virge->streams.pri_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f8: - virge->streams.sec_start = val; - virge->streams.sec_x = (val >> 16) & 0x7ff; - virge->streams.sec_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81fc: - virge->streams.sec_size = val; - virge->streams.sec_w = (val >> 16) & 0x7ff; - virge->streams.sec_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; + else { + switch (addr & 0xfffc) { + case 0x8180: + virge->streams.pri_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x8184: + virge->streams.chroma_ctrl = val; + break; + case 0x8190: + virge->streams.sec_ctrl = val; + virge->streams.dda_horiz_accumulator = val & 0xfff; + if (val & (1 << 11)) + virge->streams.dda_horiz_accumulator |= 0xfffff800; + virge->streams.sdif = (val >> 24) & 7; + break; + case 0x8194: + virge->streams.chroma_upper_bound = val; + break; + case 0x8198: + virge->streams.sec_filter = val; + virge->streams.k1_horiz_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k1_horiz_scale |= 0xfffff800; + virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; + if ((val >> 16) & (1 << 10)) + virge->streams.k2_horiz_scale |= 0xfffff800; + break; + case 0x81a0: + virge->streams.blend_ctrl = val; + break; + case 0x81c0: + virge->streams.pri_fb0 = val & ((virge->memory_size == 8) ? + (val & 0x7fffff) : (val & 0x3fffff)); + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81c4: + virge->streams.pri_fb1 = ((virge->memory_size == 8) ? + (val & 0x7fffff) : (val & 0x3fffff)); + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81c8: + virge->streams.pri_stride = val & 0xfff; + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81cc: + virge->streams.buffer_ctrl = val; + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81d0: + virge->streams.sec_fb0 = val; + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81d4: + virge->streams.sec_fb1 = val; + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81d8: + virge->streams.sec_stride = val; + s3_virge_update_buffer(virge); + svga->fullchange = changeframecount; + break; + case 0x81dc: + virge->streams.overlay_ctrl = val; + break; + case 0x81e0: + virge->streams.k1_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k1_vert_scale |= 0xfffff800; + break; + case 0x81e4: + virge->streams.k2_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k2_vert_scale |= 0xfffff800; + break; + case 0x81e8: + virge->streams.dda_vert_accumulator = val & 0xfff; + if (val & (1 << 11)) + virge->streams.dda_vert_accumulator |= 0xfffff800; + break; + case 0x81ec: + virge->streams.fifo_ctrl = val; + break; + case 0x81f0: + virge->streams.pri_start = val; + virge->streams.pri_x = (val >> 16) & 0x7ff; + virge->streams.pri_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f4: + virge->streams.pri_size = val; + virge->streams.pri_w = (val >> 16) & 0x7ff; + virge->streams.pri_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f8: + virge->streams.sec_start = val; + virge->streams.sec_x = (val >> 16) & 0x7ff; + virge->streams.sec_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81fc: + virge->streams.sec_size = val; + virge->streams.sec_w = (val >> 16) & 0x7ff; + virge->streams.sec_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; - case 0x8504: - virge->subsys_stat &= ~(val & 0xff); - virge->subsys_cntl = (val >> 8); - s3_virge_update_irqs(virge); - break; + case 0x8504: + virge->subsys_stat &= ~(val & 0xff); + virge->subsys_cntl = (val >> 8); + s3_virge_update_irqs(virge); + break; - case 0x850c: - virge->advfunc_cntl = val & 0xff; - s3_virge_updatemapping(virge); - break; + case 0x850c: + virge->advfunc_cntl = val & 0xff; + s3_virge_updatemapping(virge); + break; - case 0xff20: - s3_virge_mmio_write(addr, val, priv); - break; + case 0x8590: + virge->cmd_dma_base = val; + virge->cmd_dma_buf_size = (val & 2) ? 0x10000 : 0x1000; + virge->cmd_dma_buf_size_mask = virge->cmd_dma_buf_size - 1; + virge->cmd_base_addr = (val & 2) ? (val & 0xffff0000) : (val & 0xfffff000); + break; + + case 0x8594: + virge->cmd_dma_write_ptr_update = val & (1 << 16); + if (virge->cmd_dma_write_ptr_update) { + virge->cmd_dma_write_ptr_reg = (virge->cmd_dma_buf_size == 0x10000) ? (val & 0xffff) : (val & 0xfff); + virge->dma_dbl_words = 0; + virge->dma_data_type = 0; + virge->dma_val = 0; + if (virge->cmd_dma) { + while (virge->cmd_dma_read_ptr_reg != virge->cmd_dma_write_ptr_reg) { + virge->cmd_dma_write_ptr_update = 0; + dma_bm_read(virge->cmd_base_addr + virge->cmd_dma_read_ptr_reg, (uint8_t *)&virge->dma_val, 4, 4); + if (!virge->dma_dbl_words) { + virge->dma_dbl_words = (virge->dma_val & 0xffff); + virge->dma_data_type = !!(virge->dma_val & (1 << 31)); + if (virge->dma_data_type) + virge->dma_mmio_addr = 0; + else + virge->dma_mmio_addr = ((virge->dma_val >> 16) << 2) & 0xfffc; + } else { + s3_virge_mmio_write_l(virge->dma_mmio_addr, virge->dma_val, virge); + virge->dma_dbl_words--; + virge->dma_mmio_addr = (virge->dma_mmio_addr + 4) & 0xfffc; + } + virge->cmd_dma_read_ptr_reg = (virge->cmd_dma_read_ptr_reg + 4) & (virge->cmd_dma_buf_size_mask - 3); + } + } + } + break; + + case 0x8598: + virge->cmd_dma_read_ptr_reg = (virge->cmd_dma_buf_size == 0x10000) ? (val & 0xffff) : (val & 0xfff); + break; + + case 0x859c: + virge->cmd_dma = val & 1; + virge->cmd_dma_write_ptr_reg = 0; + virge->cmd_dma_read_ptr_reg = 0; + break; + + case 0xff20: + s3_virge_mmio_write(addr, val, priv); + break; + } } } @@ -2032,22 +2074,22 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { do { \ switch (bpp) { \ case 0: /*8 bpp*/ \ - val = vram[addr & svga->vram_mask]; \ + val = vram[addr & virge->vram_mask]; \ break; \ case 1: /*16 bpp*/ \ - val = *(uint16_t *)&vram[addr & svga->vram_mask]; \ + val = *(uint16_t *)&vram[addr & virge->vram_mask]; \ break; \ case 2: /*24 bpp*/ \ - val = (*(uint32_t *)&vram[addr & svga->vram_mask]) & 0xffffff; \ + val = (*(uint32_t *)&vram[addr & virge->vram_mask]) & 0xffffff; \ break; \ } \ } while (0) -#define Z_READ(addr) *(uint16_t *)&vram[addr & svga->vram_mask] +#define Z_READ(addr) *(uint16_t *)&vram[addr & virge->vram_mask] #define Z_WRITE(addr, val) \ if (!(s3d_tri->cmd_set & CMD_SET_ZB_MODE)) \ - *(uint16_t *)&vram[addr & svga->vram_mask] = val + *(uint16_t *)&vram[addr & virge->vram_mask] = val #define CLIP(x, y) \ do { \ @@ -2062,7 +2104,7 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { if ((s3d_tri->cmd_set & CMD_SET_HC) && (x < s3d_tri->clip_l || \ x > s3d_tri->clip_r || y < s3d_tri->clip_t || \ y > s3d_tri->clip_b)) \ - update = 0; \ + update = 0; \ } while (0) #define Z_CLIP(Zzb, Zs) \ @@ -2133,19 +2175,19 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { do { \ switch (bpp) { \ case 0: /*8 bpp*/ \ - vram[addr & svga->vram_mask] = val; \ - virge->svga.changedvram[(addr & svga->vram_mask) >> 12] = \ + vram[addr & virge->vram_mask] = val; \ + virge->svga.changedvram[(addr & virge->vram_mask) >> 12] = \ changeframecount; \ break; \ case 1: /*16 bpp*/ \ - *(uint16_t *)&vram[addr & svga->vram_mask] = val; \ - virge->svga.changedvram[(addr & svga->vram_mask) >> 12] = \ + *(uint16_t *)&vram[addr & virge->vram_mask] = val; \ + virge->svga.changedvram[(addr & virge->vram_mask) >> 12] = \ changeframecount; \ break; \ case 2: /*24 bpp*/ \ - *(uint32_t *)&vram[addr & svga->vram_mask] = (val & 0xffffff) |\ - (vram[(addr + 3) & svga->vram_mask] << 24); \ - virge->svga.changedvram[(addr & svga->vram_mask) >> 12] = \ + *(uint32_t *)&vram[addr & virge->vram_mask] = (val & 0xffffff) |\ + (vram[(addr + 3) & virge->vram_mask] << 24); \ + virge->svga.changedvram[(addr & virge->vram_mask) >> 12] = \ changeframecount; \ break; \ } \ @@ -2153,7 +2195,6 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { static void s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) { - svga_t *svga = &virge->svga; uint8_t *vram = virge->svga.vram; uint32_t mono_pattern[64]; int count_mask; @@ -3185,7 +3226,6 @@ dest_pixel_lit_texture_modulate(s3d_state_t *state) { static void tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int32_t dx2) { - svga_t *svga = &virge->svga; uint8_t *vram = virge->svga.vram; int x_dir = s3d_tri->tlr ? 1 : -1; int use_z = !(s3d_tri->cmd_set & CMD_SET_ZB_MODE); @@ -3305,7 +3345,7 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int } } - virge->svga.changedvram[(dest_offset & svga->vram_mask) >> 12] = changeframecount; + virge->svga.changedvram[(dest_offset & virge->vram_mask) >> 12] = changeframecount; dest_addr = dest_offset + (x * (bpp + 1)); z_addr = z_offset + (x << 1); @@ -3343,16 +3383,17 @@ tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int uint32_t src_g = 0; uint32_t src_b = 0; + switch (bpp) { case 0: /*8 bpp*/ /*Not implemented yet*/ break; case 1: /*16 bpp*/ - src_col = *(uint16_t *)&vram[dest_addr & svga->vram_mask]; + src_col = *(uint16_t *)&vram[dest_addr & virge->vram_mask]; RGB15_TO_24(src_col, src_r, src_g, src_b); break; case 2: /*24 bpp*/ - src_col = (*(uint32_t *)&vram[dest_addr & svga->vram_mask]) & 0xffffff; + src_col = (*(uint32_t *)&vram[dest_addr & virge->vram_mask]) & 0xffffff; RGB24_TO_24(src_col, src_r, src_g, src_b); break; } @@ -3565,7 +3606,8 @@ s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri) { } static void -render_thread(void *param) { +render_thread(void *param) +{ virge_t *virge = (virge_t *)param; while (virge->render_thread_run) { @@ -3576,7 +3618,7 @@ render_thread(void *param) { s3_virge_triangle(virge, &virge->s3d_buffer[virge->s3d_read_idx & RB_MASK]); virge->s3d_read_idx++; - if (RB_ENTRIES == (RB_SIZE - 1)) + if (RB_ENTRIES == RB_MASK) thread_set_event(virge->not_full_event); } virge->s3d_busy = 0; @@ -3586,7 +3628,8 @@ render_thread(void *param) { } static void -queue_triangle(virge_t *virge) { +queue_triangle(virge_t *virge) +{ if (RB_FULL) { thread_reset_event(virge->not_full_event); if (RB_FULL) @@ -4361,7 +4404,7 @@ s3_virge_init(const device_t *info) io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); - virge->pci_regs[PCI_REG_COMMAND] = 3; + virge->pci_regs[PCI_REG_COMMAND] = 7; virge->pci_regs[0x05] = 0; virge->pci_regs[0x06] = 0; virge->pci_regs[0x07] = 2; From 71ff5c8c6326957dfadb3e1d51fb80501dc12670 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 21 Aug 2024 01:33:54 +0200 Subject: [PATCH 05/64] ViRGE: Fixed some warnings that only appear when compiling a debug binary. --- src/video/vid_s3_virge.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index d0831ff4a..5d91d164e 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -2291,7 +2291,7 @@ s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) { uint32_t dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); uint32_t source = 0; - uint32_t dest; + uint32_t dest = 0; uint32_t pattern; uint32_t out = 0; int update = 1; @@ -2396,7 +2396,7 @@ s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) { uint32_t dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); uint32_t source = 0; - uint32_t dest; + uint32_t dest = 0; uint32_t pattern = virge->s3d.pat_fg_clr; uint32_t out = 0; int update = 1; @@ -2461,7 +2461,7 @@ s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) { uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); uint32_t source = 0; - uint32_t dest; + uint32_t dest = 0; uint32_t pattern; uint32_t out = 0; int update = 1; @@ -2517,7 +2517,7 @@ skip_line: do { uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (y * virge->s3d.dest_str); uint32_t source = 0; - uint32_t dest; + uint32_t dest = 0; uint32_t pattern; uint32_t out = 0; int update = 1; From 91a34a2b19b52c908e65f8bea01ee3ec838e6a26 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 21 Aug 2024 01:34:40 +0200 Subject: [PATCH 06/64] PCjr: Correctly mask the pallette lookups to only the lower 4 bits in the remaining modes as well. --- src/machine/m_pcjr.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 9ac4ff631..e569dc674 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -443,16 +443,16 @@ vid_poll(void *priv) pcjr->ma++; buffer32->line[l][ef_x] = buffer32->line[l][ef_x + 1] = buffer32->line[l + 1][ef_x] = buffer32->line[l + 1][ef_x + 1] = - pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16; + pcjr->array[((dat >> 12) & pcjr->array[1] & 0x0f) + 16] + 16; buffer32->line[l][ef_x + 2] = buffer32->line[l][ef_x + 3] = buffer32->line[l + 1][ef_x + 2] = buffer32->line[l + 1][ef_x + 3] = - pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16; + pcjr->array[((dat >> 8) & pcjr->array[1] & 0x0f) + 16] + 16; buffer32->line[l][ef_x + 4] = buffer32->line[l][ef_x + 5] = buffer32->line[l + 1][ef_x + 4] = buffer32->line[l + 1][ef_x + 5] = - pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16; + pcjr->array[((dat >> 4) & pcjr->array[1] & 0x0f) + 16] + 16; buffer32->line[l][ef_x + 6] = buffer32->line[l][ef_x + 7] = buffer32->line[l + 1][ef_x + 6] = buffer32->line[l + 1][ef_x + 7] = - pcjr->array[(dat & pcjr->array[1]) + 16] + 16; + pcjr->array[(dat & pcjr->array[1] & 0x0f) + 16] + 16; } break; case 0x12: /*160x200x16*/ @@ -493,7 +493,7 @@ vid_poll(void *priv) chr = (dat >> 7) & 1; chr |= ((dat >> 14) & 2); buffer32->line[l][ef_x + c] = buffer32->line[l + 1][ef_x + c] = - pcjr->array[(chr & pcjr->array[1]) + 16] + 16; + pcjr->array[(chr & pcjr->array[1] & 0x0f) + 16] + 16; dat <<= 1; } } @@ -505,13 +505,13 @@ vid_poll(void *priv) attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); if (pcjr->array[3] & 4) { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1] & 0x0f) + 16] + 16; + cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1] & 0x0f) + 16] + 16; if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) cols[1] = cols[0]; } else { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1] & 0x0f) + 16] + 16; + cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1] & 0x0f) + 16] + 16; } if (pcjr->sc & 8) for (uint8_t c = 0; c < 8; c++) @@ -537,13 +537,13 @@ vid_poll(void *priv) attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); if (pcjr->array[3] & 4) { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1] & 0x0f) + 16] + 16; + cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1] & 0x0f) + 16] + 16; if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) cols[1] = cols[0]; } else { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1] & 0x0f) + 16] + 16; + cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1] & 0x0f) + 16] + 16; } pcjr->ma++; if (pcjr->sc & 8) From e858a4344caabc28a6f2b68d3908d20720fa5480 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 21 Aug 2024 02:11:41 +0200 Subject: [PATCH 07/64] PCjr cartridges: Also reset the CPU on image eject. --- src/device/cartridge.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/device/cartridge.c b/src/device/cartridge.c index edabd3ed0..a40c29c9b 100644 --- a/src/device/cartridge.c +++ b/src/device/cartridge.c @@ -169,6 +169,7 @@ cart_close(int drive) cart_image_close(drive); cart_fns[drive][0] = 0; ui_sb_update_icon_state(SB_CARTRIDGE | drive, 1); + resetx86(); } void From 98eed0b85d08f5fe154a9fbb009d0f1dc89269cf Mon Sep 17 00:00:00 2001 From: "Joakim L. Gilje" Date: Wed, 21 Aug 2024 08:50:48 +0200 Subject: [PATCH 08/64] qt_private_headers are needed for both qt5 and qt6 --- src/qt/CMakeLists.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index 171e0a77c..b3e01c1b9 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -408,7 +408,7 @@ if (UNIX AND NOT APPLE AND NOT HAIKU) target_compile_definitions(ui PRIVATE XKBCOMMON_X11) target_link_libraries(ui PRIVATE X11::xcb PUBLIC PkgConfig::XKBCOMMON_X11) target_sources(ui PRIVATE xkbcommon_x11_keyboard.cpp) - set(QT5_PRIVATE_HEADERS ON) + set(QT_PRIVATE_HEADERS ON) endif() endif() endif() @@ -430,13 +430,13 @@ if (UNIX AND NOT APPLE AND NOT HAIKU) target_sources(ui PRIVATE xkbcommon_wl_keyboard.cpp) endif() target_compile_definitions(ui PRIVATE WAYLAND) - set(QT5_PRIVATE_HEADERS ON) + set(QT_PRIVATE_HEADERS ON) endif() endif() endif() # Add private headers for Qt5 if required. - if (NOT USE_QT6 AND DEFINED QT5_PRIVATE_HEADERS) + if (DEFINED QT_PRIVATE_HEADERS) find_package(Qt${QT_MAJOR}Gui) if (Qt${QT_MAJOR}Gui_FOUND) include_directories(${Qt${QT_MAJOR}Gui_PRIVATE_INCLUDE_DIRS}) From 66902d67fb603fc7ad83cb121c992511881bf2af Mon Sep 17 00:00:00 2001 From: TC1995 Date: Wed, 21 Aug 2024 22:45:18 +0200 Subject: [PATCH 09/64] Mach64 changes of the day (August 21st, 2024) Re-thread the video chip family again but with fixes to avoid desyncs and some cleanups. --- src/video/vid_ati_mach64.c | 229 ++++++++++++++++++++++--------------- 1 file changed, 135 insertions(+), 94 deletions(-) diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 04d497f28..cda2c65b6 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -248,12 +248,12 @@ typedef struct mach64_t { fifo_entry_t fifo[FIFO_SIZE]; atomic_int fifo_read_idx; atomic_int fifo_write_idx; + atomic_int blitter_busy; thread_t *fifo_thread; event_t *wake_fifo_thread; event_t *fifo_not_full_event; - int blitter_busy; uint64_t blitter_time; uint64_t status_time; @@ -649,9 +649,8 @@ mach64_updatemapping(mach64_t *mach64) static void mach64_update_irqs(mach64_t *mach64) { - if (!mach64->pci) { + if (!mach64->pci) return; - } if ((mach64->crtc_int_cntl & 0xaa0024) & ((mach64->crtc_int_cntl << 1) & 0xaa0024)) pci_set_irq(mach64->pci_slot, PCI_INTA, &mach64->irq_state); @@ -659,7 +658,6 @@ mach64_update_irqs(mach64_t *mach64) pci_clear_irq(mach64->pci_slot, PCI_INTA, &mach64->irq_state); } -#if 0 static __inline void wake_fifo_thread(mach64_t *mach64) { @@ -674,7 +672,6 @@ mach64_wait_fifo_idle(mach64_t *mach64) thread_wait_event(mach64->fifo_not_full_event, 1); } } -#endif #define READ8(addr, var) \ switch ((addr) &3) { \ @@ -1174,7 +1171,6 @@ mach64_accel_write_fifo_l(mach64_t *mach64, uint32_t addr, uint32_t val) } } -#if 0 static void fifo_thread(void *param) { @@ -1222,11 +1218,53 @@ static void mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type) { fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_write_idx & FIFO_MASK]; + int limit = 0; - if (FIFO_FULL) { - thread_reset_event(mach64->fifo_not_full_event); + switch (type) { + case FIFO_WRITE_BYTE: + switch (addr & 0x3ff) { + case 0x11b: + limit = 1; + break; + default: + break; + } + break; + case FIFO_WRITE_WORD: + switch (addr & 0x3fe) { + case 0x11a: + limit = 1; + break; + default: + break; + } + break; + case FIFO_WRITE_DWORD: + switch (addr & 0x3fc) { + case 0x118: + limit = 1; + break; + default: + break; + } + break; + default: + break; + } + + if (limit) { + if (FIFO_ENTRIES >= 16) { + thread_reset_event(mach64->fifo_not_full_event); + if (FIFO_ENTRIES >= 16) { + thread_wait_event(mach64->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ + } + } + } else { if (FIFO_FULL) { - thread_wait_event(mach64->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ + thread_reset_event(mach64->fifo_not_full_event); + if (FIFO_FULL) { + thread_wait_event(mach64->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ + } } } @@ -1238,7 +1276,6 @@ mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type) if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8) wake_fifo_thread(mach64); } -#endif void mach64_start_fill(mach64_t *mach64) @@ -2538,26 +2575,26 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x101: case 0x102: case 0x103: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_off_pitch); break; case 0x104: case 0x105: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_y_x); break; case 0x108: case 0x109: case 0x11c: case 0x11d: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->dst_y_x); break; case 0x10c: case 0x10d: case 0x10e: case 0x10f: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_y_x); break; case 0x110: @@ -2572,7 +2609,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x11b: case 0x11e: case 0x11f: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_height_width); break; @@ -2580,28 +2617,28 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x121: case 0x122: case 0x123: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_lnth); break; case 0x124: case 0x125: case 0x126: case 0x127: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_err); break; case 0x128: case 0x129: case 0x12a: case 0x12b: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_inc); break; case 0x12c: case 0x12d: case 0x12e: case 0x12f: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_dec); break; @@ -2609,7 +2646,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x131: case 0x132: case 0x133: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_cntl); break; @@ -2617,75 +2654,75 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x181: case 0x182: case 0x183: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_off_pitch); break; case 0x184: case 0x185: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x); break; case 0x188: case 0x189: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_y_x); break; case 0x18c: case 0x18d: case 0x18e: case 0x18f: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x); break; case 0x190: case 0x191: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_height1_width1); break; case 0x194: case 0x195: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height1_width1); break; case 0x198: case 0x199: case 0x19a: case 0x19b: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height1_width1); break; case 0x19c: case 0x19d: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x_start); break; case 0x1a0: case 0x1a1: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_y_x_start); break; case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x_start); break; case 0x1a8: case 0x1a9: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_height2_width2); break; case 0x1ac: case 0x1ad: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height2_width2); break; case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height2_width2); break; @@ -2693,7 +2730,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x1b5: case 0x1b6: case 0x1b7: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_cntl); break; @@ -2701,7 +2738,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x241: case 0x242: case 0x243: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->host_cntl); break; @@ -2709,14 +2746,14 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x281: case 0x282: case 0x283: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_reg0); break; case 0x284: case 0x285: case 0x286: case 0x287: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_reg1); break; @@ -2724,7 +2761,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x289: case 0x28a: case 0x28b: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_cntl); break; @@ -2732,7 +2769,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2a1: case 0x2a8: case 0x2a9: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_left_right); break; case 0x2a4: @@ -2741,7 +2778,7 @@ mach64_ext_readb(uint32_t addr, void *priv) fallthrough; case 0x2aa: case 0x2ab: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_left_right); break; @@ -2749,7 +2786,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2ad: case 0x2b4: case 0x2b5: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_top_bottom); break; case 0x2b0: @@ -2758,7 +2795,7 @@ mach64_ext_readb(uint32_t addr, void *priv) fallthrough; case 0x2b6: case 0x2b7: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_top_bottom); break; @@ -2766,14 +2803,14 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2c1: case 0x2c2: case 0x2c3: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_bkgd_clr); break; case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_frgd_clr); break; @@ -2781,7 +2818,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2c9: case 0x2ca: case 0x2cb: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->write_mask); break; @@ -2789,7 +2826,7 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2cd: case 0x2ce: case 0x2cf: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->chain_mask); break; @@ -2797,21 +2834,21 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x2d1: case 0x2d2: case 0x2d3: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_pix_width); break; case 0x2d4: case 0x2d5: case 0x2d6: case 0x2d7: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_mix); break; case 0x2d8: case 0x2d9: case 0x2da: case 0x2db: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_src); break; @@ -2819,53 +2856,61 @@ mach64_ext_readb(uint32_t addr, void *priv) case 0x301: case 0x302: case 0x303: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_clr); break; case 0x304: case 0x305: case 0x306: case 0x307: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_mask); break; case 0x308: case 0x309: case 0x30a: case 0x30b: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_cntl); break; case 0x310: case 0x311: + if (!mach64->blitter_busy) + wake_fifo_thread(mach64); + ret = 0; + if (FIFO_FULL) + ret = 0xff; break; case 0x320: case 0x321: case 0x322: case 0x323: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->context_mask); break; case 0x330: case 0x331: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_cntl); break; case 0x332: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr - 2, mach64->src_cntl); break; case 0x333: - //mach64_wait_fifo_idle(mach64); + mach64_wait_fifo_idle(mach64); READ8(addr - 3, mach64->pat_cntl); break; case 0x338: - ret = 0; + if (!mach64->blitter_busy) + wake_fifo_thread(mach64); + + ret = FIFO_EMPTY ? 0 : 1; break; default: @@ -2884,7 +2929,7 @@ mach64_ext_readw(uint32_t addr, void *priv) uint16_t ret; if (!(addr & 0x400)) { - mach64_log("nmach64_ext_readw: addr=%04x\n", addr); + mach64_log("mach64_ext_readw: addr=%04x\n", addr); ret = 0xffff; } else switch (addr & 0x3ff) { @@ -3048,9 +3093,9 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv) break; } - mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val); + mach64_log("mach64_ext_writeb: addr=%04x val=%02x\n", addr, val); } else if (addr & 0x300) { - mach64_accel_write_fifo(mach64, addr & 0x3ff, val); + mach64_queue(mach64, addr & 0x3ff, val, FIFO_WRITE_BYTE); } else { switch (addr & 0x3ff) { case 0x00: @@ -3293,14 +3338,11 @@ mach64_ext_writew(uint32_t addr, uint16_t val, void *priv) mach64_ext_writeb(addr, val, priv); mach64_ext_writeb(addr + 1, val >> 8, priv); } else if (addr & 0x300) { - mach64_accel_write_fifo_w(mach64, addr & 0x3fe, val); - } else - switch (addr & 0x3fe) { - default: - mach64_ext_writeb(addr, val, priv); - mach64_ext_writeb(addr + 1, val >> 8, priv); - break; - } + mach64_queue(mach64, addr & 0x3fe, val, FIFO_WRITE_WORD); + } else { + mach64_ext_writeb(addr, val, priv); + mach64_ext_writeb(addr + 1, val >> 8, priv); + } } void mach64_ext_writel(uint32_t addr, uint32_t val, void *priv) @@ -3314,14 +3356,11 @@ mach64_ext_writel(uint32_t addr, uint32_t val, void *priv) mach64_ext_writew(addr, val, priv); mach64_ext_writew(addr + 2, val >> 16, priv); } else if (addr & 0x300) { - mach64_accel_write_fifo_l(mach64, addr & 0x3fc, val); - } else - switch (addr & 0x3fc) { - default: - mach64_ext_writew(addr, val, priv); - mach64_ext_writew(addr + 2, val >> 16, priv); - break; - } + mach64_queue(mach64, addr & 0x3fc, val, FIFO_WRITE_DWORD); + } else { + mach64_ext_writew(addr, val, priv); + mach64_ext_writew(addr + 2, val >> 16, priv); + } } uint8_t @@ -3527,12 +3566,10 @@ uint16_t mach64_ext_inw(uint16_t port, void *priv) { uint16_t ret; - switch (port) { - default: - ret = mach64_ext_inb(port, priv); - ret |= (mach64_ext_inb(port + 1, priv) << 8); - break; - } + + ret = mach64_ext_inb(port, priv); + ret |= (mach64_ext_inb(port + 1, priv) << 8); + mach64_log("mach64_ext_inw : port %04X ret %04X\n", port, ret); return ret; } @@ -3540,6 +3577,7 @@ uint32_t mach64_ext_inl(uint16_t port, void *priv) { uint32_t ret; + switch (port) { case 0x56ec: ret = mach64_ext_readl(0x400 | 0xb4, priv); @@ -3737,23 +3775,15 @@ void mach64_ext_outw(uint16_t port, uint16_t val, void *priv) { mach64_log("mach64_ext_outw : port %04X val %04X\n", port, val); - switch (port) { - default: - mach64_ext_outb(port, val, priv); - mach64_ext_outb(port + 1, val >> 8, priv); - break; - } + mach64_ext_outb(port, val, priv); + mach64_ext_outb(port + 1, val >> 8, priv); } void mach64_ext_outl(uint16_t port, uint32_t val, void *priv) { mach64_log("mach64_ext_outl : port %04X val %08X\n", port, val); - switch (port) { - default: - mach64_ext_outw(port, val, priv); - mach64_ext_outw(port + 2, val >> 16, priv); - break; - } + mach64_ext_outw(port, val, priv); + mach64_ext_outw(port + 2, val >> 16, priv); } static uint8_t @@ -4546,6 +4576,11 @@ mach64_common_init(const device_t *info) mach64->dst_cntl = 3; + mach64->thread_run = 1; + mach64->wake_fifo_thread = thread_create_event(); + mach64->fifo_not_full_event = thread_create_event(); + mach64->fifo_thread = thread_create(fifo_thread, mach64); + mach64->i2c = i2c_gpio_init("ddc_ati_mach64"); mach64->ddc = ddc_init(i2c_gpio_get_bus(mach64->i2c)); @@ -4640,6 +4675,12 @@ mach64_close(void *priv) { mach64_t *mach64 = (mach64_t *) priv; + mach64->thread_run = 0; + thread_set_event(mach64->wake_fifo_thread); + thread_wait(mach64->fifo_thread); + thread_destroy_event(mach64->fifo_not_full_event); + thread_destroy_event(mach64->wake_fifo_thread); + svga_close(&mach64->svga); ddc_close(mach64->ddc); From 39a6a681a2e24d0df83ac0fe36028ad33f7d993a Mon Sep 17 00:00:00 2001 From: TC1995 Date: Wed, 21 Aug 2024 22:48:02 +0200 Subject: [PATCH 10/64] Update indentation. --- src/video/vid_ati_mach64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index cda2c65b6..d54c09f56 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -1225,7 +1225,7 @@ mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type) switch (addr & 0x3ff) { case 0x11b: limit = 1; - break; + break; default: break; } From f9e457f3e80cf2eac6032b234eac13f68c028155 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 22 Aug 2024 04:59:51 +0200 Subject: [PATCH 11/64] Give the AP440FX the original ViRGE instead, fixes #4740. --- src/include/86box/video.h | 1 + src/machine/m_at_socket8.c | 4 ++-- src/machine/machine_table.c | 2 +- src/video/vid_s3_virge.c | 20 +++++++++++++++++--- 4 files changed, 21 insertions(+), 6 deletions(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 1037e213f..aee8c4b4d 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -527,6 +527,7 @@ extern const device_t s3_trio64v2_dx_onboard_pci_device; /* S3 ViRGE */ extern const device_t s3_virge_325_pci_device; +extern const device_t s3_virge_325_onboard_pci_device; extern const device_t s3_diamond_stealth_2000_pci_device; extern const device_t s3_diamond_stealth_3000_pci_device; extern const device_t s3_stb_velocity_3d_pci_device; diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c index 8c2688c1a..e6f78f6a2 100644 --- a/src/machine/m_at_socket8.c +++ b/src/machine/m_at_socket8.c @@ -324,10 +324,10 @@ machine_at_ap440fx_init(const machine_t *model) device_add(&intel_flash_bxt_ami_device); if (sound_card_current[0] == SOUND_INTERNAL) - device_add(&cs4236b_device); + device_add(machine_get_snd_device(machine)); if (gfxcard[0] == VID_INTERNAL) - device_add(&s3_virge_375_onboard_pci_device); + device_add(machine_get_vid_device(machine)); return ret; } diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 9e1ee2205..b482951ef 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -13758,7 +13758,7 @@ const machine_t machines[] = { .device = NULL, .fdc_device = NULL, .sio_device = NULL, - .vid_device = &s3_virge_375_onboard_pci_device, + .vid_device = &s3_virge_325_onboard_pci_device, .snd_device = &cs4236b_device, .net_device = NULL }, diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 5d91d164e..4bcbaea9e 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -4306,7 +4306,7 @@ s3_virge_reset(void *priv) static void * s3_virge_init(const device_t *info) { - const char *bios_fn; + const char *bios_fn = NULL; virge_t *virge = (virge_t *) calloc(1, sizeof(virge_t)); reset_state = calloc(1, sizeof(virge_t)); @@ -4319,7 +4319,7 @@ s3_virge_init(const device_t *info) virge->onboard = !!(info->local & 0x100); - switch (info->local) { + if (!virge->onboard) switch (info->local) { case S3_VIRGE_325: bios_fn = ROM_VIRGE_325; break; @@ -4333,7 +4333,7 @@ s3_virge_init(const device_t *info) bios_fn = ROM_STB_VELOCITY_3D; break; case S3_VIRGE_DX: - bios_fn = virge->onboard ? NULL : ROM_VIRGE_DX; + bios_fn = ROM_VIRGE_DX; break; case S3_DIAMOND_STEALTH3D_2000PRO: bios_fn = ROM_DIAMOND_STEALTH3D_2000PRO; @@ -4816,6 +4816,20 @@ const device_t s3_virge_325_pci_device = { .config = s3_virge_config }; +const device_t s3_virge_325_onboard_pci_device = { + .name = "S3 ViRGE (325) On-Board PCI", + .internal_name = "virge325_onboard_pci", + .flags = DEVICE_PCI, + .local = S3_VIRGE_325 | 0x100, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, + { .available = NULL }, + .speed_changed = s3_virge_speed_changed, + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config +}; + const device_t s3_diamond_stealth_2000_pci_device = { .name = "S3 ViRGE (Diamond Stealth 3D 2000) PCI", .internal_name = "stealth3d_2000_pci", From a7cff718920c56782e805a9b097b2d60136e5962 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 22 Aug 2024 13:16:29 -0300 Subject: [PATCH 12/64] OPTi 5x7: Fix out of bounds on register read --- src/chipset/opti5x7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index 64adacde4..b31996c85 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -158,7 +158,7 @@ opti5x7_read(uint16_t addr, void *priv) { const opti5x7_t *dev = (opti5x7_t *) priv; - return (addr == 0x24) ? dev->regs[dev->idx] : 0xff; + return ((addr == 0x24) && (dev->idx < sizeof(dev->regs))) ? dev->regs[dev->idx] : 0xff; } static void From 8d88d187b29f4365ba31529eff1baa7361a54276 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 22 Aug 2024 14:21:36 -0300 Subject: [PATCH 13/64] gdbstub: Work around Win32 threading behavior --- src/gdbstub.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gdbstub.c b/src/gdbstub.c index 900f40dab..2f60a3d16 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -1513,6 +1513,7 @@ gdbstub_client_thread(void *priv) case '$': /* packet start */ /* Wait for any existing packets to be processed. */ thread_wait_event(client->processed_event, -1); + thread_set_event(client->processed_event); client->packet_pos = 0; break; @@ -1539,6 +1540,7 @@ gdbstub_client_thread(void *priv) default: /* Wait for any existing packets to be processed, just in case. */ thread_wait_event(client->processed_event, -1); + thread_set_event(client->processed_event); if (client->packet_pos < (sizeof(client->packet) - 1)) { /* Append byte to the packet. */ From d697d9bca1c6385e44b8bd12769864e1e3da22cb Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 22 Aug 2024 14:50:10 -0300 Subject: [PATCH 14/64] OPTi 5x7: Fix another out of bounds on register write --- src/chipset/opti5x7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index b31996c85..494fdee64 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -35,7 +35,7 @@ typedef struct opti5x7_t { uint8_t idx; uint8_t is_pci; - uint8_t regs[16]; + uint8_t regs[18]; } opti5x7_t; #ifdef ENABLE_OPTI5X7_LOG From 3b47f0590c24abece872965b6f555856cf3fa035 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 22 Aug 2024 15:45:32 -0300 Subject: [PATCH 15/64] gdbstub: Fix another Win32 threading deadlock --- src/gdbstub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gdbstub.c b/src/gdbstub.c index 2f60a3d16..42e1fc46d 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -1531,6 +1531,7 @@ gdbstub_client_thread(void *priv) case 0x03: /* break */ /* Wait for any existing packets to be processed. */ thread_wait_event(client->processed_event, -1); + thread_set_event(client->processed_event); /* Break immediately. */ gdbstub_log("GDB Stub: Break requested\n"); From 7a965efd907455e8a00924f176b678a8de656e1c Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 23 Aug 2024 06:21:27 +0200 Subject: [PATCH 16/64] Tandy and CGA: Implement the VSync interrupt, fixes Ghostbusters freezing. --- src/machine/m_tandy.c | 2 ++ src/video/vid_cga.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index d51209123..56982b3bd 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -27,6 +27,7 @@ #include <86box/86box.h> #include <86box/timer.h> #include <86box/io.h> +#include <86box/pic.h> #include <86box/pit.h> #include <86box/nmi.h> #include <86box/mem.h> @@ -1215,6 +1216,7 @@ vid_poll(void *priv) vid->dispon = 0; vid->displine = 0; vid->vsynctime = 16; + picint(1 << 5); if (vid->crtc[7]) { if (vid->mode & 1) x = (vid->crtc[1] << 3) + 16; diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 2ea07c346..8306edd56 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -28,6 +28,7 @@ #include "cpu.h" #include <86box/io.h> #include <86box/timer.h> +#include <86box/pic.h> #include <86box/pit.h> #include <86box/mem.h> #include <86box/rom.h> @@ -607,6 +608,7 @@ cga_poll(void *priv) cga->cgadispon = 0; cga->displine = 0; cga->vsynctime = 16; + picint(1 << 5); if (cga->crtc[7]) { if (cga->cgamode & 1) x = (cga->crtc[1] << 3) + 16; From 1a961db422bd386535e45ccf172e1cd3d1febb1d Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 23 Aug 2024 07:09:35 +0200 Subject: [PATCH 17/64] CGA: Revert the VSync interrupt since the real CGA did not have that. --- src/video/vid_cga.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 8306edd56..2ea07c346 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -28,7 +28,6 @@ #include "cpu.h" #include <86box/io.h> #include <86box/timer.h> -#include <86box/pic.h> #include <86box/pit.h> #include <86box/mem.h> #include <86box/rom.h> @@ -608,7 +607,6 @@ cga_poll(void *priv) cga->cgadispon = 0; cga->displine = 0; cga->vsynctime = 16; - picint(1 << 5); if (cga->crtc[7]) { if (cga->cgamode & 1) x = (cga->crtc[1] << 3) + 16; From 0d43babac83a9a4e185e17a4880bb33d1d349aec Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 23 Aug 2024 07:14:43 +0200 Subject: [PATCH 18/64] Tandy: Slow down horizontal sync in low resolution modes. --- src/machine/m_tandy.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 56982b3bd..2a7ef2275 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -718,8 +718,13 @@ recalc_timings(tandy_t *dev) double _dispofftime; double disptime; - disptime = vid->crtc[0] + 1; - _dispontime = vid->crtc[1]; + if (vid->mode & 1) { + disptime = vid->crtc[0] + 1; + _dispontime = vid->crtc[1]; + } else { + disptime = (vid->crtc[0] + 1) << 1; + _dispontime = vid->crtc[1] << 1; + } _dispofftime = disptime - _dispontime; _dispontime *= CGACONST; @@ -795,7 +800,10 @@ vid_out(uint16_t addr, uint8_t val, void *priv) break; case 0x03d8: + old = vid->mode; vid->mode = val; + if ((old ^ val) & 0x01) + recalc_timings(dev); if (!dev->is_sl2) update_cga16_color(vid->mode); break; From 2604789e7976140d25e65088bd763938394ad351 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Fri, 23 Aug 2024 16:12:37 -0300 Subject: [PATCH 19/64] Fix PCI slots on the ATC6310BXII, fixes #4186 --- src/machine/m_at_slot1.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index a870d4c59..415998364 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -408,11 +408,10 @@ machine_at_atc6310bxii_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); - pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2); - pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x0E, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4); device_add(&i440bx_device); device_add(&slc90e66_device); From cdd01eceea9fa63f779187c87b16580c86ab9156 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 04:24:06 +0200 Subject: [PATCH 20/64] QT: Restore RichardG's hard reset workaround. --- src/include/86box/86box.h | 1 + src/qt/qt_main.cpp | 9 +++++++++ src/qt/qt_mainwindow.cpp | 3 +-- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index c91b8d406..7d5709d30 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -153,6 +153,7 @@ extern int enable_discord; /* (C) enable Discord integration */ extern int other_ide_present; /* IDE controllers from non-IDE cards are present */ extern int other_scsi_present; /* SCSI controllers from non-SCSI cards are present */ +extern int hard_reset_pending; extern int fixed_size_x; extern int fixed_size_y; extern int do_auto_pause; /* (C) Auto-pause the emulator on focus loss */ diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index c39007864..a50c53820 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -138,8 +138,17 @@ main_thread_fn() } } else { /* Just so we dont overload the host OS. */ + + /* Trigger a hard reset if one is pending. */ + if (hard_reset_pending) { + hard_reset_pending = 0; + pc_reset_hard_close(); + pc_reset_hard_init(); + } + if (dopause) ack_pause(); + std::this_thread::sleep_for(std::chrono::milliseconds(1)); } } diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 32720c48b..57efc7ce7 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -946,10 +946,9 @@ MainWindow::on_actionSettings_triggered() default: break; case QDialog::Accepted: - pc_reset_hard_close(); settings.save(); config_changed = 2; - pc_reset_hard_init(); + pc_reset_hard(); break; case QDialog::Rejected: break; From 39869c5a7bb755d376b88d87833c4c9f5adce6d5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 04:49:32 +0200 Subject: [PATCH 21/64] PCjr: Allow disabling the application of overscan deltas when overscan is disabled, allows to fix the misalignment on ScubaVenture. --- src/machine/m_pcjr.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index e569dc674..88f9da2e3 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -96,6 +96,7 @@ typedef struct pcjr_t { int firstline; int lastline; int composite; + int apply_hd; /* Keyboard Controller stuff. */ int latched; @@ -727,9 +728,12 @@ vid_poll(void *priv) if (enable_overscan) { video_blit_memtoscreen(0, pcjr->firstline << 1, xsize, actual_ys + 32); - } else { + } else if (pcjr->apply_hd) { video_blit_memtoscreen(ho_s / 2, (pcjr->firstline << 1) + 16, xsize, actual_ys); + } else { + video_blit_memtoscreen(ho_d, (pcjr->firstline << 1) + 16, + xsize, actual_ys); } } @@ -951,6 +955,13 @@ static const device_config_t pcjr_config[] = { { .description = "" } } }, + { + .name = "apply_hd", + .description = "Apply overscan deltas", + .type = CONFIG_BINARY, + .default_string = "", + .default_int = 1 + }, { .name = "", .description = "", .type = CONFIG_END } // clang-format on }; @@ -990,6 +1001,7 @@ machine_pcjr_init(UNUSED(const machine_t *model)) pcjr->memctrl &= ~0x24; display_type = machine_get_config_int("display_type"); pcjr->composite = (display_type != PCJR_RGB); + pcjr->apply_hd = machine_get_config_int("display_type"); overscan_x = 256; overscan_y = 32; From 15b7001a6a4b5cd964ee8e9fe3521917c8736528 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 06:00:33 +0200 Subject: [PATCH 22/64] More PCjr fixes. --- src/machine/m_pcjr.c | 547 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 529 insertions(+), 18 deletions(-) diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 88f9da2e3..789481047 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -108,6 +108,525 @@ typedef struct pcjr_t { pc_timer_t send_delay_timer; } pcjr_t; +/*PCjr keyboard has no escape scancodes, and no scancodes beyond 54 + Map right alt to 54h (FN) */ +const scancode scancode_pcjr[512] = { + // clang-format off + { .mk = { 0 }, .brk = { 0 } }, /* 000 */ + { .mk = { 0x01, 0 }, .brk = { 0x81, 0 } }, /* 001 */ + { .mk = { 0x02, 0 }, .brk = { 0x82, 0 } }, /* 002 */ + { .mk = { 0x03, 0 }, .brk = { 0x83, 0 } }, /* 003 */ + { .mk = { 0x04, 0 }, .brk = { 0x84, 0 } }, /* 004 */ + { .mk = { 0x05, 0 }, .brk = { 0x85, 0 } }, /* 005 */ + { .mk = { 0x06, 0 }, .brk = { 0x86, 0 } }, /* 006 */ + { .mk = { 0x07, 0 }, .brk = { 0x87, 0 } }, /* 007 */ + { .mk = { 0x08, 0 }, .brk = { 0x88, 0 } }, /* 008 */ + { .mk = { 0x09, 0 }, .brk = { 0x89, 0 } }, /* 009 */ + { .mk = { 0x0a, 0 }, .brk = { 0x8a, 0 } }, /* 00a */ + { .mk = { 0x0b, 0 }, .brk = { 0x8b, 0 } }, /* 00b */ + { .mk = { 0x0c, 0 }, .brk = { 0x8c, 0 } }, /* 00c */ + { .mk = { 0x0d, 0 }, .brk = { 0x8d, 0 } }, /* 00d */ + { .mk = { 0x0e, 0 }, .brk = { 0x8e, 0 } }, /* 00e */ + { .mk = { 0x0f, 0 }, .brk = { 0x8f, 0 } }, /* 00f */ + { .mk = { 0x10, 0 }, .brk = { 0x90, 0 } }, /* 010 */ + { .mk = { 0x11, 0 }, .brk = { 0x91, 0 } }, /* 011 */ + { .mk = { 0x12, 0 }, .brk = { 0x92, 0 } }, /* 012 */ + { .mk = { 0x13, 0 }, .brk = { 0x93, 0 } }, /* 013 */ + { .mk = { 0x14, 0 }, .brk = { 0x94, 0 } }, /* 014 */ + { .mk = { 0x15, 0 }, .brk = { 0x95, 0 } }, /* 015 */ + { .mk = { 0x16, 0 }, .brk = { 0x96, 0 } }, /* 016 */ + { .mk = { 0x17, 0 }, .brk = { 0x97, 0 } }, /* 017 */ + { .mk = { 0x18, 0 }, .brk = { 0x98, 0 } }, /* 018 */ + { .mk = { 0x19, 0 }, .brk = { 0x99, 0 } }, /* 019 */ + { .mk = { 0x1a, 0 }, .brk = { 0x9a, 0 } }, /* 01a */ + { .mk = { 0x1b, 0 }, .brk = { 0x9b, 0 } }, /* 01b */ + { .mk = { 0x1c, 0 }, .brk = { 0x9c, 0 } }, /* 01c */ + { .mk = { 0x1d, 0 }, .brk = { 0x9d, 0 } }, /* 01d */ + { .mk = { 0x1e, 0 }, .brk = { 0x9e, 0 } }, /* 01e */ + { .mk = { 0x1f, 0 }, .brk = { 0x9f, 0 } }, /* 01f */ + { .mk = { 0x20, 0 }, .brk = { 0xa0, 0 } }, /* 020 */ + { .mk = { 0x21, 0 }, .brk = { 0xa1, 0 } }, /* 021 */ + { .mk = { 0x22, 0 }, .brk = { 0xa2, 0 } }, /* 022 */ + { .mk = { 0x23, 0 }, .brk = { 0xa3, 0 } }, /* 023 */ + { .mk = { 0x24, 0 }, .brk = { 0xa4, 0 } }, /* 024 */ + { .mk = { 0x25, 0 }, .brk = { 0xa5, 0 } }, /* 025 */ + { .mk = { 0x26, 0 }, .brk = { 0xa6, 0 } }, /* 026 */ + { .mk = { 0x27, 0 }, .brk = { 0xa7, 0 } }, /* 027 */ + { .mk = { 0x28, 0 }, .brk = { 0xa8, 0 } }, /* 028 */ + { .mk = { 0x29, 0 }, .brk = { 0xa9, 0 } }, /* 029 */ + { .mk = { 0x2a, 0 }, .brk = { 0xaa, 0 } }, /* 02a */ + { .mk = { 0x2b, 0 }, .brk = { 0xab, 0 } }, /* 02b */ + { .mk = { 0x2c, 0 }, .brk = { 0xac, 0 } }, /* 02c */ + { .mk = { 0x2d, 0 }, .brk = { 0xad, 0 } }, /* 02d */ + { .mk = { 0x2e, 0 }, .brk = { 0xae, 0 } }, /* 02e */ + { .mk = { 0x2f, 0 }, .brk = { 0xaf, 0 } }, /* 02f */ + { .mk = { 0x30, 0 }, .brk = { 0xb0, 0 } }, /* 030 */ + { .mk = { 0x31, 0 }, .brk = { 0xb1, 0 } }, /* 031 */ + { .mk = { 0x32, 0 }, .brk = { 0xb2, 0 } }, /* 032 */ + { .mk = { 0x33, 0 }, .brk = { 0xb3, 0 } }, /* 033 */ + { .mk = { 0x34, 0 }, .brk = { 0xb4, 0 } }, /* 034 */ + { .mk = { 0x35, 0 }, .brk = { 0xb5, 0 } }, /* 035 */ + { .mk = { 0x36, 0 }, .brk = { 0xb6, 0 } }, /* 036 */ + { .mk = { 0x37, 0 }, .brk = { 0xb7, 0 } }, /* 037 */ + { .mk = { 0x38, 0 }, .brk = { 0xb8, 0 } }, /* 038 */ + { .mk = { 0x39, 0 }, .brk = { 0xb9, 0 } }, /* 039 */ + { .mk = { 0x3a, 0 }, .brk = { 0xba, 0 } }, /* 03a */ + { .mk = { 0x3b, 0 }, .brk = { 0xbb, 0 } }, /* 03b */ + { .mk = { 0x3c, 0 }, .brk = { 0xbc, 0 } }, /* 03c */ + { .mk = { 0x3d, 0 }, .brk = { 0xbd, 0 } }, /* 03d */ + { .mk = { 0x3e, 0 }, .brk = { 0xbe, 0 } }, /* 03e */ + { .mk = { 0x3f, 0 }, .brk = { 0xbf, 0 } }, /* 03f */ + { .mk = { 0x40, 0 }, .brk = { 0xc0, 0 } }, /* 040 */ + { .mk = { 0x41, 0 }, .brk = { 0xc1, 0 } }, /* 041 */ + { .mk = { 0x42, 0 }, .brk = { 0xc2, 0 } }, /* 042 */ + { .mk = { 0x43, 0 }, .brk = { 0xc3, 0 } }, /* 043 */ + { .mk = { 0x44, 0 }, .brk = { 0xc4, 0 } }, /* 044 */ + { .mk = { 0x45, 0 }, .brk = { 0xc5, 0 } }, /* 045 */ + { .mk = { 0x46, 0 }, .brk = { 0xc6, 0 } }, /* 046 */ + { .mk = { 0x47, 0 }, .brk = { 0xc7, 0 } }, /* 047 */ + { .mk = { 0x48, 0 }, .brk = { 0xc8, 0 } }, /* 048 */ + { .mk = { 0x49, 0 }, .brk = { 0xc9, 0 } }, /* 049 */ + { .mk = { 0x4a, 0 }, .brk = { 0xca, 0 } }, /* 04a */ + { .mk = { 0x4b, 0 }, .brk = { 0xcb, 0 } }, /* 04b */ + { .mk = { 0x4c, 0 }, .brk = { 0xcc, 0 } }, /* 04c */ + { .mk = { 0x4d, 0 }, .brk = { 0xcd, 0 } }, /* 04d */ + { .mk = { 0x4e, 0 }, .brk = { 0xce, 0 } }, /* 04e */ + { .mk = { 0x4f, 0 }, .brk = { 0xcf, 0 } }, /* 04f */ + { .mk = { 0x50, 0 }, .brk = { 0xd0, 0 } }, /* 050 */ + { .mk = { 0x51, 0 }, .brk = { 0xd1, 0 } }, /* 051 */ + { .mk = { 0x52, 0 }, .brk = { 0xd2, 0 } }, /* 052 */ + { .mk = { 0x53, 0 }, .brk = { 0xd3, 0 } }, /* 053 */ + { .mk = { 0 }, .brk = { 0 } }, /* 054 */ + { .mk = { 0 }, .brk = { 0 } }, /* 055 */ + { .mk = { 0x55, 0 }, .brk = { 0xd5, 0 } }, /* 056 */ + { .mk = { 0 }, .brk = { 0 } }, /* 057 */ + { .mk = { 0 }, .brk = { 0 } }, /* 058 */ + { .mk = { 0 }, .brk = { 0 } }, /* 059 */ + { .mk = { 0 }, .brk = { 0 } }, /* 05a */ + { .mk = { 0 }, .brk = { 0 } }, /* 05b */ + { .mk = { 0 }, .brk = { 0 } }, /* 05c */ + { .mk = { 0 }, .brk = { 0 } }, /* 05d */ + { .mk = { 0 }, .brk = { 0 } }, /* 05e */ + { .mk = { 0 }, .brk = { 0 } }, /* 05f */ + { .mk = { 0 }, .brk = { 0 } }, /* 060 */ + { .mk = { 0 }, .brk = { 0 } }, /* 061 */ + { .mk = { 0 }, .brk = { 0 } }, /* 062 */ + { .mk = { 0 }, .brk = { 0 } }, /* 063 */ + { .mk = { 0 }, .brk = { 0 } }, /* 064 */ + { .mk = { 0 }, .brk = { 0 } }, /* 065 */ + { .mk = { 0 }, .brk = { 0 } }, /* 066 */ + { .mk = { 0 }, .brk = { 0 } }, /* 067 */ + { .mk = { 0 }, .brk = { 0 } }, /* 068 */ + { .mk = { 0 }, .brk = { 0 } }, /* 069 */ + { .mk = { 0 }, .brk = { 0 } }, /* 06a */ + { .mk = { 0 }, .brk = { 0 } }, /* 06b */ + { .mk = { 0 }, .brk = { 0 } }, /* 06c */ + { .mk = { 0 }, .brk = { 0 } }, /* 06d */ + { .mk = { 0 }, .brk = { 0 } }, /* 06e */ + { .mk = { 0 }, .brk = { 0 } }, /* 06f */ + { .mk = { 0 }, .brk = { 0 } }, /* 070 */ + { .mk = { 0 }, .brk = { 0 } }, /* 071 */ + { .mk = { 0 }, .brk = { 0 } }, /* 072 */ + { .mk = { 0 }, .brk = { 0 } }, /* 073 */ + { .mk = { 0 }, .brk = { 0 } }, /* 074 */ + { .mk = { 0 }, .brk = { 0 } }, /* 075 */ + { .mk = { 0 }, .brk = { 0 } }, /* 076 */ + { .mk = { 0 }, .brk = { 0 } }, /* 077 */ + { .mk = { 0 }, .brk = { 0 } }, /* 078 */ + { .mk = { 0 }, .brk = { 0 } }, /* 079 */ + { .mk = { 0 }, .brk = { 0 } }, /* 07a */ + { .mk = { 0 }, .brk = { 0 } }, /* 07b */ + { .mk = { 0 }, .brk = { 0 } }, /* 07c */ + { .mk = { 0 }, .brk = { 0 } }, /* 07d */ + { .mk = { 0 }, .brk = { 0 } }, /* 07e */ + { .mk = { 0 }, .brk = { 0 } }, /* 07f */ + { .mk = { 0 }, .brk = { 0 } }, /* 080 */ + { .mk = { 0 }, .brk = { 0 } }, /* 081 */ + { .mk = { 0 }, .brk = { 0 } }, /* 082 */ + { .mk = { 0 }, .brk = { 0 } }, /* 083 */ + { .mk = { 0 }, .brk = { 0 } }, /* 084 */ + { .mk = { 0 }, .brk = { 0 } }, /* 085 */ + { .mk = { 0 }, .brk = { 0 } }, /* 086 */ + { .mk = { 0 }, .brk = { 0 } }, /* 087 */ + { .mk = { 0 }, .brk = { 0 } }, /* 088 */ + { .mk = { 0 }, .brk = { 0 } }, /* 089 */ + { .mk = { 0 }, .brk = { 0 } }, /* 08a */ + { .mk = { 0 }, .brk = { 0 } }, /* 08b */ + { .mk = { 0 }, .brk = { 0 } }, /* 08c */ + { .mk = { 0 }, .brk = { 0 } }, /* 08d */ + { .mk = { 0 }, .brk = { 0 } }, /* 08e */ + { .mk = { 0 }, .brk = { 0 } }, /* 08f */ + { .mk = { 0 }, .brk = { 0 } }, /* 090 */ + { .mk = { 0 }, .brk = { 0 } }, /* 091 */ + { .mk = { 0 }, .brk = { 0 } }, /* 092 */ + { .mk = { 0 }, .brk = { 0 } }, /* 093 */ + { .mk = { 0 }, .brk = { 0 } }, /* 094 */ + { .mk = { 0 }, .brk = { 0 } }, /* 095 */ + { .mk = { 0 }, .brk = { 0 } }, /* 096 */ + { .mk = { 0 }, .brk = { 0 } }, /* 097 */ + { .mk = { 0 }, .brk = { 0 } }, /* 098 */ + { .mk = { 0 }, .brk = { 0 } }, /* 099 */ + { .mk = { 0 }, .brk = { 0 } }, /* 09a */ + { .mk = { 0 }, .brk = { 0 } }, /* 09b */ + { .mk = { 0 }, .brk = { 0 } }, /* 09c */ + { .mk = { 0 }, .brk = { 0 } }, /* 09d */ + { .mk = { 0 }, .brk = { 0 } }, /* 09e */ + { .mk = { 0 }, .brk = { 0 } }, /* 09f */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0a9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0aa */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ab */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ac */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ad */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ae */ + { .mk = { 0 }, .brk = { 0 } }, /* 0af */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0b9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ba */ + { .mk = { 0 }, .brk = { 0 } }, /* 0bb */ + { .mk = { 0 }, .brk = { 0 } }, /* 0bc */ + { .mk = { 0 }, .brk = { 0 } }, /* 0bd */ + { .mk = { 0 }, .brk = { 0 } }, /* 0be */ + { .mk = { 0 }, .brk = { 0 } }, /* 0bf */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0c9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ca */ + { .mk = { 0 }, .brk = { 0 } }, /* 0cb */ + { .mk = { 0 }, .brk = { 0 } }, /* 0cc */ + { .mk = { 0 }, .brk = { 0 } }, /* 0cd */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ce */ + { .mk = { 0 }, .brk = { 0 } }, /* 0cf */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0d9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0da */ + { .mk = { 0 }, .brk = { 0 } }, /* 0db */ + { .mk = { 0 }, .brk = { 0 } }, /* 0dc */ + { .mk = { 0 }, .brk = { 0 } }, /* 0dd */ + { .mk = { 0 }, .brk = { 0 } }, /* 0de */ + { .mk = { 0 }, .brk = { 0 } }, /* 0df */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0e9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ea */ + { .mk = { 0 }, .brk = { 0 } }, /* 0eb */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ec */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ed */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ee */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ef */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0f9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 0fa */ + { .mk = { 0 }, .brk = { 0 } }, /* 0fb */ + { .mk = { 0 }, .brk = { 0 } }, /* 0fc */ + { .mk = { 0 }, .brk = { 0 } }, /* 0fd */ + { .mk = { 0 }, .brk = { 0 } }, /* 0fe */ + { .mk = { 0 }, .brk = { 0 } }, /* 0ff */ + { .mk = { 0 }, .brk = { 0 } }, /* 100 */ + { .mk = { 0 }, .brk = { 0 } }, /* 101 */ + { .mk = { 0 }, .brk = { 0 } }, /* 102 */ + { .mk = { 0 }, .brk = { 0 } }, /* 103 */ + { .mk = { 0 }, .brk = { 0 } }, /* 104 */ + { .mk = { 0 }, .brk = { 0 } }, /* 105 */ + { .mk = { 0 }, .brk = { 0 } }, /* 106 */ + { .mk = { 0 }, .brk = { 0 } }, /* 107 */ + { .mk = { 0 }, .brk = { 0 } }, /* 108 */ + { .mk = { 0 }, .brk = { 0 } }, /* 109 */ + { .mk = { 0 }, .brk = { 0 } }, /* 10a */ + { .mk = { 0 }, .brk = { 0 } }, /* 10b */ + { .mk = { 0 }, .brk = { 0 } }, /* 10c */ + { .mk = { 0 }, .brk = { 0 } }, /* 10d */ + { .mk = { 0 }, .brk = { 0 } }, /* 10e */ + { .mk = { 0 }, .brk = { 0 } }, /* 10f */ + { .mk = { 0 }, .brk = { 0 } }, /* 110 */ + { .mk = { 0 }, .brk = { 0 } }, /* 111 */ + { .mk = { 0 }, .brk = { 0 } }, /* 112 */ + { .mk = { 0 }, .brk = { 0 } }, /* 113 */ + { .mk = { 0 }, .brk = { 0 } }, /* 114 */ + { .mk = { 0 }, .brk = { 0 } }, /* 115 */ + { .mk = { 0 }, .brk = { 0 } }, /* 116 */ + { .mk = { 0 }, .brk = { 0 } }, /* 117 */ + { .mk = { 0 }, .brk = { 0 } }, /* 118 */ + { .mk = { 0 }, .brk = { 0 } }, /* 119 */ + { .mk = { 0 }, .brk = { 0 } }, /* 11a */ + { .mk = { 0 }, .brk = { 0 } }, /* 11b */ + { .mk = { 0x1c, 0 }, .brk = { 0x9c, 0 } }, /* 11c */ + { .mk = { 0x1d, 0 }, .brk = { 0x9d, 0 } }, /* 11d */ + { .mk = { 0 }, .brk = { 0 } }, /* 11e */ + { .mk = { 0 }, .brk = { 0 } }, /* 11f */ + { .mk = { 0 }, .brk = { 0 } }, /* 120 */ + { .mk = { 0 }, .brk = { 0 } }, /* 121 */ + { .mk = { 0 }, .brk = { 0 } }, /* 122 */ + { .mk = { 0 }, .brk = { 0 } }, /* 123 */ + { .mk = { 0 }, .brk = { 0 } }, /* 124 */ + { .mk = { 0 }, .brk = { 0 } }, /* 125 */ + { .mk = { 0 }, .brk = { 0 } }, /* 126 */ + { .mk = { 0 }, .brk = { 0 } }, /* 127 */ + { .mk = { 0 }, .brk = { 0 } }, /* 128 */ + { .mk = { 0 }, .brk = { 0 } }, /* 129 */ + { .mk = { 0 }, .brk = { 0 } }, /* 12a */ + { .mk = { 0 }, .brk = { 0 } }, /* 12b */ + { .mk = { 0 }, .brk = { 0 } }, /* 12c */ + { .mk = { 0 }, .brk = { 0 } }, /* 12d */ + { .mk = { 0 }, .brk = { 0 } }, /* 12e */ + { .mk = { 0 }, .brk = { 0 } }, /* 12f */ + { .mk = { 0 }, .brk = { 0 } }, /* 130 */ + { .mk = { 0 }, .brk = { 0 } }, /* 131 */ + { .mk = { 0 }, .brk = { 0 } }, /* 132 */ + { .mk = { 0 }, .brk = { 0 } }, /* 133 */ + { .mk = { 0 }, .brk = { 0 } }, /* 134 */ + { .mk = { 0x35, 0 }, .brk = { 0xb5, 0 } }, /* 135 */ + { .mk = { 0 }, .brk = { 0 } }, /* 136 */ + { .mk = { 0x37, 0 }, .brk = { 0xb7, 0 } }, /* 137 */ + { .mk = { 0x54, 0 }, .brk = { 0xd4, 0 } }, /* 138 */ + { .mk = { 0 }, .brk = { 0 } }, /* 139 */ + { .mk = { 0 }, .brk = { 0 } }, /* 13a */ + { .mk = { 0 }, .brk = { 0 } }, /* 13b */ + { .mk = { 0 }, .brk = { 0 } }, /* 13c */ + { .mk = { 0 }, .brk = { 0 } }, /* 13d */ + { .mk = { 0 }, .brk = { 0 } }, /* 13e */ + { .mk = { 0 }, .brk = { 0 } }, /* 13f */ + { .mk = { 0 }, .brk = { 0 } }, /* 140 */ + { .mk = { 0 }, .brk = { 0 } }, /* 141 */ + { .mk = { 0 }, .brk = { 0 } }, /* 142 */ + { .mk = { 0 }, .brk = { 0 } }, /* 143 */ + { .mk = { 0 }, .brk = { 0 } }, /* 144 */ + { .mk = { 0 }, .brk = { 0 } }, /* 145 */ + { .mk = { 0x46, 0 }, .brk = { 0xc6, 0 } }, /* 146 */ + { .mk = { 0x47, 0 }, .brk = { 0xc7, 0 } }, /* 147 */ + { .mk = { 0x48, 0 }, .brk = { 0xc8, 0 } }, /* 148 */ + { .mk = { 0x49, 0 }, .brk = { 0xc9, 0 } }, /* 149 */ + { .mk = { 0 }, .brk = { 0 } }, /* 14a */ + { .mk = { 0x4b, 0 }, .brk = { 0xcb, 0 } }, /* 14b */ + { .mk = { 0 }, .brk = { 0 } }, /* 14c */ + { .mk = { 0x4d, 0 }, .brk = { 0xcd, 0 } }, /* 14d */ + { .mk = { 0 }, .brk = { 0 } }, /* 14e */ + { .mk = { 0x4f, 0 }, .brk = { 0xcf, 0 } }, /* 14f */ + { .mk = { 0x50, 0 }, .brk = { 0xd0, 0 } }, /* 150 */ + { .mk = { 0x51, 0 }, .brk = { 0xd1, 0 } }, /* 151 */ + { .mk = { 0x52, 0 }, .brk = { 0xd2, 0 } }, /* 152 */ + { .mk = { 0x53, 0 }, .brk = { 0xd3, 0 } }, /* 153 */ + { .mk = { 0 }, .brk = { 0 } }, /* 154 */ + { .mk = { 0 }, .brk = { 0 } }, /* 155 */ + { .mk = { 0 }, .brk = { 0 } }, /* 156 */ + { .mk = { 0 }, .brk = { 0 } }, /* 157 */ + { .mk = { 0 }, .brk = { 0 } }, /* 158 */ + { .mk = { 0 }, .brk = { 0 } }, /* 159 */ + { .mk = { 0 }, .brk = { 0 } }, /* 15a */ + { .mk = { 0 }, .brk = { 0 } }, /* 15b */ + { .mk = { 0 }, .brk = { 0 } }, /* 15c */ + { .mk = { 0 }, .brk = { 0 } }, /* 15d */ + { .mk = { 0 }, .brk = { 0 } }, /* 15e */ + { .mk = { 0 }, .brk = { 0 } }, /* 15f */ + { .mk = { 0 }, .brk = { 0 } }, /* 160 */ + { .mk = { 0 }, .brk = { 0 } }, /* 161 */ + { .mk = { 0 }, .brk = { 0 } }, /* 162 */ + { .mk = { 0 }, .brk = { 0 } }, /* 163 */ + { .mk = { 0 }, .brk = { 0 } }, /* 164 */ + { .mk = { 0 }, .brk = { 0 } }, /* 165 */ + { .mk = { 0 }, .brk = { 0 } }, /* 166 */ + { .mk = { 0 }, .brk = { 0 } }, /* 167 */ + { .mk = { 0 }, .brk = { 0 } }, /* 168 */ + { .mk = { 0 }, .brk = { 0 } }, /* 169 */ + { .mk = { 0 }, .brk = { 0 } }, /* 16a */ + { .mk = { 0 }, .brk = { 0 } }, /* 16b */ + { .mk = { 0 }, .brk = { 0 } }, /* 16c */ + { .mk = { 0 }, .brk = { 0 } }, /* 16d */ + { .mk = { 0 }, .brk = { 0 } }, /* 16e */ + { .mk = { 0 }, .brk = { 0 } }, /* 16f */ + { .mk = { 0 }, .brk = { 0 } }, /* 170 */ + { .mk = { 0 }, .brk = { 0 } }, /* 171 */ + { .mk = { 0 }, .brk = { 0 } }, /* 172 */ + { .mk = { 0 }, .brk = { 0 } }, /* 173 */ + { .mk = { 0 }, .brk = { 0 } }, /* 174 */ + { .mk = { 0 }, .brk = { 0 } }, /* 175 */ + { .mk = { 0 }, .brk = { 0 } }, /* 176 */ + { .mk = { 0 }, .brk = { 0 } }, /* 177 */ + { .mk = { 0 }, .brk = { 0 } }, /* 178 */ + { .mk = { 0 }, .brk = { 0 } }, /* 179 */ + { .mk = { 0 }, .brk = { 0 } }, /* 17a */ + { .mk = { 0 }, .brk = { 0 } }, /* 17b */ + { .mk = { 0 }, .brk = { 0 } }, /* 17c */ + { .mk = { 0 }, .brk = { 0 } }, /* 17d */ + { .mk = { 0 }, .brk = { 0 } }, /* 17e */ + { .mk = { 0 }, .brk = { 0 } }, /* 17f */ + { .mk = { 0 }, .brk = { 0 } }, /* 180 */ + { .mk = { 0 }, .brk = { 0 } }, /* 181 */ + { .mk = { 0 }, .brk = { 0 } }, /* 182 */ + { .mk = { 0 }, .brk = { 0 } }, /* 183 */ + { .mk = { 0 }, .brk = { 0 } }, /* 184 */ + { .mk = { 0 }, .brk = { 0 } }, /* 185 */ + { .mk = { 0 }, .brk = { 0 } }, /* 186 */ + { .mk = { 0 }, .brk = { 0 } }, /* 187 */ + { .mk = { 0 }, .brk = { 0 } }, /* 188 */ + { .mk = { 0 }, .brk = { 0 } }, /* 189 */ + { .mk = { 0 }, .brk = { 0 } }, /* 18a */ + { .mk = { 0 }, .brk = { 0 } }, /* 18b */ + { .mk = { 0 }, .brk = { 0 } }, /* 18c */ + { .mk = { 0 }, .brk = { 0 } }, /* 18d */ + { .mk = { 0 }, .brk = { 0 } }, /* 18e */ + { .mk = { 0 }, .brk = { 0 } }, /* 18f */ + { .mk = { 0 }, .brk = { 0 } }, /* 190 */ + { .mk = { 0 }, .brk = { 0 } }, /* 191 */ + { .mk = { 0 }, .brk = { 0 } }, /* 192 */ + { .mk = { 0 }, .brk = { 0 } }, /* 193 */ + { .mk = { 0 }, .brk = { 0 } }, /* 194 */ + { .mk = { 0 }, .brk = { 0 } }, /* 195 */ + { .mk = { 0 }, .brk = { 0 } }, /* 196 */ + { .mk = { 0 }, .brk = { 0 } }, /* 197 */ + { .mk = { 0 }, .brk = { 0 } }, /* 198 */ + { .mk = { 0 }, .brk = { 0 } }, /* 199 */ + { .mk = { 0 }, .brk = { 0 } }, /* 19a */ + { .mk = { 0 }, .brk = { 0 } }, /* 19b */ + { .mk = { 0 }, .brk = { 0 } }, /* 19c */ + { .mk = { 0 }, .brk = { 0 } }, /* 19d */ + { .mk = { 0 }, .brk = { 0 } }, /* 19e */ + { .mk = { 0 }, .brk = { 0 } }, /* 19f */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1a9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1aa */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ab */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ac */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ad */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ae */ + { .mk = { 0 }, .brk = { 0 } }, /* 1af */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1b9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ba */ + { .mk = { 0 }, .brk = { 0 } }, /* 1bb */ + { .mk = { 0 }, .brk = { 0 } }, /* 1bc */ + { .mk = { 0 }, .brk = { 0 } }, /* 1bd */ + { .mk = { 0 }, .brk = { 0 } }, /* 1be */ + { .mk = { 0 }, .brk = { 0 } }, /* 1bf */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1c9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ca */ + { .mk = { 0 }, .brk = { 0 } }, /* 1cb */ + { .mk = { 0 }, .brk = { 0 } }, /* 1cc */ + { .mk = { 0 }, .brk = { 0 } }, /* 1cd */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ce */ + { .mk = { 0 }, .brk = { 0 } }, /* 1cf */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1d9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1da */ + { .mk = { 0 }, .brk = { 0 } }, /* 1db */ + { .mk = { 0 }, .brk = { 0 } }, /* 1dc */ + { .mk = { 0 }, .brk = { 0 } }, /* 1dd */ + { .mk = { 0 }, .brk = { 0 } }, /* 1de */ + { .mk = { 0 }, .brk = { 0 } }, /* 1df */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1e9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ea */ + { .mk = { 0 }, .brk = { 0 } }, /* 1eb */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ec */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ed */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ee */ + { .mk = { 0 }, .brk = { 0 } }, /* 1ef */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f0 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f1 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f2 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f3 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f4 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f5 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f6 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f7 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f8 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1f9 */ + { .mk = { 0 }, .brk = { 0 } }, /* 1fa */ + { .mk = { 0 }, .brk = { 0 } }, /* 1fb */ + { .mk = { 0 }, .brk = { 0 } }, /* 1fc */ + { .mk = { 0 }, .brk = { 0 } }, /* 1fd */ + { .mk = { 0 }, .brk = { 0 } }, /* 1fe */ + { .mk = { 0 }, .brk = { 0 } } /* 1ff */ + // clang-format on +}; + static video_timings_t timing_dram = { VIDEO_BUS, 0, 0, 0, 0, 0, 0 }; /*No additional waitstates*/ static uint8_t crtcmask[32] = { @@ -302,7 +821,7 @@ vid_get_h_overscan_delta(pcjr_t *pcjr) coef = 8; break; case 0x12: /*160x200x16*/ - def = 0x2b; + def = 0x2c; /* I'm going to assume a datasheet erratum here. */ coef = 16; break; case 0x03: /*640x200x4*/ @@ -342,20 +861,12 @@ vid_get_h_overscan_delta(pcjr_t *pcjr) static void vid_blit_h_overscan(pcjr_t *pcjr) { - int cols; + int cols = (pcjr->array[2] & 0xf) + 16;; + int y0 = pcjr->firstline << 1; + int y = (pcjr->lastline << 1) + 16; + int ho_s = vid_get_h_overscan_size(pcjr); int i; int x; - int y = (pcjr->lastline << 1) + 16; - int ho_s = vid_get_h_overscan_size(pcjr); - - if (pcjr->dispon) - cols = (pcjr->array[2] & 0xf) + 16; - else { - if (pcjr->array[3] & 4) - cols = (pcjr->array[2] & 0xf) + 16; - else - cols = pcjr->array[0 + 16] + 16; - } if (pcjr->array[0] & 1) x = (pcjr->crtc[1] << 3) + ho_s; @@ -363,14 +874,14 @@ vid_blit_h_overscan(pcjr_t *pcjr) x = (pcjr->crtc[1] << 4) + ho_s; for (i = 0; i < 16; i++) { - hline(buffer32, 0, i, x, cols); + hline(buffer32, 0, y0 + i, x, cols); hline(buffer32, 0, y + i, x, cols); if (pcjr->composite) { - Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[i]); + Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[y0 + i]); Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[y + i]); } else { - video_process_8(x, i); + video_process_8(x, y0 + i); video_process_8(x, y + i); } } @@ -1001,7 +1512,7 @@ machine_pcjr_init(UNUSED(const machine_t *model)) pcjr->memctrl &= ~0x24; display_type = machine_get_config_int("display_type"); pcjr->composite = (display_type != PCJR_RGB); - pcjr->apply_hd = machine_get_config_int("display_type"); + pcjr->apply_hd = machine_get_config_int("apply_hd"); overscan_x = 256; overscan_y = 32; @@ -1032,7 +1543,7 @@ machine_pcjr_init(UNUSED(const machine_t *model)) io_sethandler(0x00a0, 8, kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr); timer_add(&pcjr->send_delay_timer, kbd_poll, pcjr, 1); - keyboard_set_table(scancode_xt); + keyboard_set_table(scancode_pcjr); keyboard_send = kbd_adddata_ex; /* Technically it's the SN76496N, but the SN76489 is identical to the SN76496N. */ From f81541c8f61815f80af8ad5f2f11cc7e72b55aa8 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 06:19:14 +0200 Subject: [PATCH 23/64] WD1004 family: Fix IRQ 2 flag readout. --- src/disk/hdc_st506_xt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index f3ac48a36..ab4b10b78 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -1702,7 +1702,7 @@ st506_init(const device_t *info) dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); if (dev->irq == 2) - dev->switches |= 0x40; + dev->switches |= 0x80; dev->bios_addr = device_get_config_hex20("bios_addr"); break; @@ -1732,7 +1732,7 @@ st506_init(const device_t *info) dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); if (dev->irq == 2) - dev->switches |= 0x40; + dev->switches |= 0x80; dev->bios_addr = device_get_config_hex20("bios_addr"); break; @@ -1747,7 +1747,7 @@ st506_init(const device_t *info) dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); if (dev->irq == 2) - dev->switches |= 0x40; + dev->switches |= 0x80; dev->bios_addr = device_get_config_hex20("bios_addr"); break; From 9da2cef53d03d566713919fb42b1ce20015b3925 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 06:24:35 +0200 Subject: [PATCH 24/64] Also apply the IRQ 2 fix to the WD1002 family. --- src/disk/hdc_st506_xt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index ab4b10b78..47e6f045a 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -1683,7 +1683,7 @@ st506_init(const device_t *info) dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); if (dev->irq == 2) - dev->switches |= 0x40; + dev->switches |= 0x80; dev->bios_addr = device_get_config_hex20("bios_addr"); break; @@ -1717,7 +1717,7 @@ st506_init(const device_t *info) dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); if (dev->irq == 2) - dev->switches |= 0x40; + dev->switches |= 0x80; dev->bios_addr = device_get_config_hex20("bios_addr"); break; From 3e1991390f4853b343631ee8c040c14cfdab7e4b Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 24 Aug 2024 23:55:51 +0200 Subject: [PATCH 25/64] Sound Blaster DSP: Fix readout in reset state on the AZTech DSP, fixes #4747. --- src/sound/snd_sb_dsp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/sound/snd_sb_dsp.c b/src/sound/snd_sb_dsp.c index 2513d36f6..7b010c77b 100644 --- a/src/sound/snd_sb_dsp.c +++ b/src/sound/snd_sb_dsp.c @@ -1959,7 +1959,9 @@ sb_read(uint16_t a, void *priv) else ret = 0x7f; } - } else + } else if (IS_AZTECH(dsp)) + ret = 0x00; + else ret = 0xff; break; case 0xE: /* Read data ready */ From da5757f802ef9d87f29f1089fff2967e806d9ffa Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sun, 25 Aug 2024 23:05:13 +0200 Subject: [PATCH 26/64] Minor but important changes to minivhd's dynamic/diff vhd handling 1. Changed the first seek_end in create_block to seek_set. 2. Avoid expansion overflow through a check if the block offset is below the total sectors. --- src/disk/minivhd/minivhd_io.c | 65 +++++++++++++++++++---------------- 1 file changed, 36 insertions(+), 29 deletions(-) diff --git a/src/disk/minivhd/minivhd_io.c b/src/disk/minivhd/minivhd_io.c index 2912cf5b2..2a430f8a4 100644 --- a/src/disk/minivhd/minivhd_io.c +++ b/src/disk/minivhd/minivhd_io.c @@ -37,6 +37,7 @@ #ifndef _FILE_OFFSET_BITS # define _FILE_OFFSET_BITS 64 #endif +#include #include #include #include @@ -45,6 +46,10 @@ #include #include "minivhd.h" #include "internal.h" +#define HAVE_STDARG_H + +#include "cpu.h" +#include <86box/86box.h> /* * The following bit array macros adapted from: @@ -158,7 +163,7 @@ create_block(MVHDMeta *vhdm, int blk) uint8_t footer[MVHD_FOOTER_SIZE] = { 0 }; /* Seek to where the footer SHOULD be */ - mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); + mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_SET); (void) !fread(footer, sizeof footer, 1, vhdm->f); mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); @@ -334,36 +339,38 @@ mvhd_sparse_diff_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *i int sib = 0; ls = offset + transfer_sectors; - for (s = offset; s < ls; s++) { - blk = s / vhdm->sect_per_block; - sib = s % vhdm->sect_per_block; - if (vhdm->bitmap.curr_block != blk && prev_blk >= 0) { - /* Write the sector bitmap for the previous block, before we replace it. */ - write_curr_sect_bitmap(vhdm); - } - - if (vhdm->block_offset[blk] == MVHD_SPARSE_BLK) { - /* "read" the sector bitmap first, before creating a new block, as the bitmap will be - zero either way */ - read_sect_bitmap(vhdm, blk); - create_block(vhdm, blk); - } - - if (blk != prev_blk) { - if (vhdm->bitmap.curr_block != blk) { - read_sect_bitmap(vhdm, blk); - mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR); - } else { - addr = (((int64_t) vhdm->block_offset[blk]) + vhdm->bitmap.sector_count + sib) * - MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, addr, SEEK_SET); + if (offset < total_sectors) { + for (s = offset; s < ls; s++) { + blk = s / vhdm->sect_per_block; + sib = s % vhdm->sect_per_block; + if (vhdm->bitmap.curr_block != blk && prev_blk >= 0) { + /* Write the sector bitmap for the previous block, before we replace it. */ + write_curr_sect_bitmap(vhdm); } - prev_blk = blk; - } - fwrite(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); - VHD_SETBIT(vhdm->bitmap.curr_bitmap, sib); - buff += MVHD_SECTOR_SIZE; + if (vhdm->block_offset[blk] == MVHD_SPARSE_BLK) { + /* "read" the sector bitmap first, before creating a new block, as the bitmap will be + zero either way */ + read_sect_bitmap(vhdm, blk); + create_block(vhdm, blk); + } + + if (blk != prev_blk) { + if (vhdm->bitmap.curr_block != blk) { + read_sect_bitmap(vhdm, blk); + mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR); + } else { + addr = (((int64_t) vhdm->block_offset[blk]) + vhdm->bitmap.sector_count + sib) * + MVHD_SECTOR_SIZE; + mvhd_fseeko64(vhdm->f, addr, SEEK_SET); + } + prev_blk = blk; + } + + fwrite(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); + VHD_SETBIT(vhdm->bitmap.curr_bitmap, sib); + buff += MVHD_SECTOR_SIZE; + } } /* And write the sector bitmap for the last block we visited to disk */ From 8c98dcf5e8bd66da6c9af4a65de6bca439141cce Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sun, 25 Aug 2024 23:26:20 +0200 Subject: [PATCH 27/64] Remove the first change. --- src/disk/minivhd/minivhd_io.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/disk/minivhd/minivhd_io.c b/src/disk/minivhd/minivhd_io.c index 2a430f8a4..ffc6aba44 100644 --- a/src/disk/minivhd/minivhd_io.c +++ b/src/disk/minivhd/minivhd_io.c @@ -163,7 +163,7 @@ create_block(MVHDMeta *vhdm, int blk) uint8_t footer[MVHD_FOOTER_SIZE] = { 0 }; /* Seek to where the footer SHOULD be */ - mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_SET); + mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); (void) !fread(footer, sizeof footer, 1, vhdm->f); mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); From d72d00042b4b559fc860096099e034bbc1394630 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 26 Aug 2024 00:42:34 +0200 Subject: [PATCH 28/64] Honor the composite mode of the PCjr and Tandy 1000 And actually fix the way it's activated. --- src/machine/m_pcjr.c | 49 +++++++++++++++++++++++++++---------------- src/machine/m_tandy.c | 14 ++++++++++--- 2 files changed, 42 insertions(+), 21 deletions(-) diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 789481047..16020826d 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -1438,6 +1438,34 @@ speed_changed(void *priv) recalc_timings(pcjr); } +static void +pcjr_vid_init(pcjr_t *pcjr) +{ + int display_type; + + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_dram); + + pcjr->memctrl = -1; + if (mem_size < 128) + pcjr->memctrl &= ~0x24; + + display_type = device_get_config_int("display_type"); + pcjr->composite = (display_type != PCJR_RGB); + pcjr->apply_hd = device_get_config_int("apply_hd"); + overscan_x = 256; + overscan_y = 32; + + mem_mapping_add(&pcjr->mapping, 0xb8000, 0x08000, + vid_read, NULL, NULL, + vid_write, NULL, NULL, NULL, 0, pcjr); + io_sethandler(0x03d0, 16, + vid_in, NULL, NULL, vid_out, NULL, NULL, pcjr); + timer_add(&pcjr->timer, vid_poll, pcjr, 1); + + cga_palette = 0; + cgapal_rebuild(); +} + void pit_irq0_timer_pcjr(int new_out, int old_out, UNUSED(void *priv)) { @@ -1494,7 +1522,6 @@ const device_t pcjr_device = { int machine_pcjr_init(UNUSED(const machine_t *model)) { - int display_type; pcjr_t *pcjr; int ret; @@ -1507,14 +1534,6 @@ machine_pcjr_init(UNUSED(const machine_t *model)) pcjr = malloc(sizeof(pcjr_t)); memset(pcjr, 0x00, sizeof(pcjr_t)); - pcjr->memctrl = -1; - if (mem_size < 128) - pcjr->memctrl &= ~0x24; - display_type = machine_get_config_int("display_type"); - pcjr->composite = (display_type != PCJR_RGB); - pcjr->apply_hd = machine_get_config_int("apply_hd"); - overscan_x = 256; - overscan_y = 32; pic_init_pcjr(); pit_common_init(0, pit_irq0_timer_pcjr, NULL); @@ -1524,16 +1543,10 @@ machine_pcjr_init(UNUSED(const machine_t *model)) /* Initialize the video controller. */ video_reset(gfxcard[0]); loadfont("roms/video/mda/mda.rom", 0); - mem_mapping_add(&pcjr->mapping, 0xb8000, 0x08000, - vid_read, NULL, NULL, - vid_write, NULL, NULL, NULL, 0, pcjr); - io_sethandler(0x03d0, 16, - vid_in, NULL, NULL, vid_out, NULL, NULL, pcjr); - timer_add(&pcjr->timer, vid_poll, pcjr, 1); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_dram); + device_context(&pcjr_device); + pcjr_vid_init(pcjr); + device_context_restore(); device_add_ex(&pcjr_device, pcjr); - cga_palette = 0; - cgapal_rebuild(); /* Initialize the keyboard. */ keyboard_scan = 1; diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 2a7ef2275..6c478b37a 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -1328,11 +1328,10 @@ vid_init(tandy_t *dev) vid = malloc(sizeof(t1kvid_t)); memset(vid, 0x00, sizeof(t1kvid_t)); vid->memctrl = -1; - dev->vid = vid; video_inform(VIDEO_FLAG_TYPE_CGA, &timing_dram); - display_type = machine_get_config_int("display_type"); + display_type = device_get_config_int("display_type"); vid->composite = (display_type != TANDY_RGB); cga_comp_init(1); @@ -1345,11 +1344,14 @@ vid_init(tandy_t *dev) io_sethandler(0x0065, 1, vid_in, NULL, NULL, vid_out, NULL, NULL, dev); } else vid->b8000_mask = 0x3fff; + timer_add(&vid->timer, vid_poll, dev, 1); mem_mapping_add(&vid->mapping, 0xb8000, 0x08000, vid_read, NULL, NULL, vid_write, NULL, NULL, NULL, 0, dev); io_sethandler(0x03d0, 16, vid_in, NULL, NULL, vid_out, NULL, NULL, dev); + + dev->vid = vid; } const device_config_t vid_config[] = { @@ -1771,7 +1773,9 @@ machine_tandy1k_init(const machine_t *model, int type) keyboard_set_table(scancode_tandy); io_sethandler(0x00a0, 1, tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + device_context(&vid_device); vid_init(dev); + device_context_restore(); device_add_ex(&vid_device, dev); device_add((type == TYPE_TANDY1000SX) ? &ncr8496_device : &sn76489_device); break; @@ -1781,8 +1785,10 @@ machine_tandy1k_init(const machine_t *model, int type) keyboard_set_table(scancode_tandy); io_sethandler(0x00a0, 1, tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + device_context(&vid_device_hx); vid_init(dev); - device_add_ex(&vid_device, dev); + device_context_restore(); + device_add_ex(&vid_device_hx, dev); device_add(&ncr8496_device); device_add(&eep_1000hx_device); break; @@ -1792,7 +1798,9 @@ machine_tandy1k_init(const machine_t *model, int type) init_rom(dev); io_sethandler(0xffe8, 8, tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + device_context(&vid_device_sl); vid_init(dev); + device_context_restore(); device_add_ex(&vid_device_sl, dev); device_add(&pssj_device); device_add(&eep_1000sl2_device); From 97f861b0ba32286d5dc95a0a11c7c4f3c88daade Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 25 Aug 2024 19:08:30 -0400 Subject: [PATCH 29/64] Split off AMD K5 from K6 --- src/cpu/cpu.c | 75 +++++++++++++++++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 26 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 178a17e95..d6d8a9ca8 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -1536,6 +1536,55 @@ cpu_set(void) #ifdef USE_AMD_K5 case CPU_K5: case CPU_5K86: +#ifdef USE_DYNAREC + x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); +#else + x86_setopcodes(ops_386, ops_pentiummmx_0f); +#endif /* USE_DYNAREC */ + + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 0; /* branch taken */ + timing_bnt = 1; /* branch not taken */ + + timing_int = 6; + timing_int_rm = 11; + timing_int_v86 = 54; + timing_int_pm = 25; + timing_int_pm_outer = 42; + timing_iret_rm = 7; + timing_iret_v86 = 27; /* unknown */ + timing_iret_pm = 10; + timing_iret_pm_outer = 27; + timing_call_rm = 4; + timing_call_pm = 4; + timing_call_pm_gate = 22; + timing_call_pm_gate_inner = 44; + timing_retf_rm = 4; + timing_retf_pm = 4; + timing_retf_pm_outer = 23; + timing_jmp_rm = 3; + timing_jmp_pm = 3; + timing_jmp_pm_gate = 18; + + timing_misaligned = 3; + + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX; + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE; +#if 0 + cpu_CR4_mask |= CR4_PGE; +#endif + +#ifdef USE_DYNAREC + codegen_timing_set(&codegen_timing_k5); +#endif /* USE_DYNAREC */ + break; + #endif /* USE_AMD_K5 */ case CPU_K6: case CPU_K6_2: @@ -1546,27 +1595,13 @@ cpu_set(void) #ifdef USE_DYNAREC if (cpu_s->cpu_type >= CPU_K6_2) x86_setopcodes(ops_386, ops_k62_0f, dynarec_ops_386, dynarec_ops_k62_0f); -# ifdef USE_AMD_K5 - else if (cpu_s->cpu_type == CPU_K6) - x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); - else - x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); -# else else x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); -# endif /* USE_AMD_K5 */ #else if (cpu_s->cpu_type >= CPU_K6_2) x86_setopcodes(ops_386, ops_k62_0f); -# ifdef USE_AMD_K5 - else if (cpu_s->cpu_type == CPU_K6) - x86_setopcodes(ops_386, ops_k6_0f); - else - x86_setopcodes(ops_386, ops_pentiummmx_0f); -# else else x86_setopcodes(ops_386, ops_k6_0f); -# endif /* USE_AMD_K5 */ #endif /* USE_DYNAREC */ if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) { @@ -1613,23 +1648,11 @@ cpu_set(void) cpu_features |= CPU_FEATURE_3DNOW; if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) cpu_features |= CPU_FEATURE_3DNOWE; -#ifdef USE_AMD_K5 - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE; - if (cpu_s->cpu_type >= CPU_K6) { - cpu_CR4_mask |= (CR4_VME | CR4_PVI | CR4_PSE); - if (cpu_s->cpu_type <= CPU_K6) - cpu_CR4_mask |= CR4_PCE; - else if (cpu_s->cpu_type >= CPU_K6_2C) - cpu_CR4_mask |= CR4_PGE; - } else - cpu_CR4_mask |= CR4_PGE; -#else cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE; if (cpu_s->cpu_type == CPU_K6) cpu_CR4_mask |= CR4_PCE; else if (cpu_s->cpu_type >= CPU_K6_2C) cpu_CR4_mask |= CR4_PGE; -#endif /* USE_AMD_K5 */ #ifdef USE_DYNAREC codegen_timing_set(&codegen_timing_k6); From 025798c832dae75c325221ddf531f8abdccb08d0 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 25 Aug 2024 20:20:21 -0400 Subject: [PATCH 30/64] PGE for K5 --- src/cpu/cpu.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index d6d8a9ca8..172a5543c 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -1575,10 +1575,7 @@ cpu_set(void) timing_misaligned = 3; cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX; - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE; -#if 0 - cpu_CR4_mask |= CR4_PGE; -#endif + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PGE; #ifdef USE_DYNAREC codegen_timing_set(&codegen_timing_k5); From ba859d7351218ee2bbb247e723260740e65f8a9b Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 26 Aug 2024 04:36:23 +0200 Subject: [PATCH 31/64] S3: Fixed CRTC to PCI BAR mapping, fixes #4745. --- src/video/vid_s3.c | 51 +++++++++++++++------------------------- src/video/vid_s3_virge.c | 2 +- 2 files changed, 20 insertions(+), 33 deletions(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 8a9bedf02..cb5d2e41e 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -9219,18 +9219,19 @@ s3_pci_read(UNUSED(int func), int addr, void *priv) return s3->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/ else return s3->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - break; + break; case 0x07: return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x07] & 0x36) : (1 << 1); /*Medium DEVSEL timing*/ - case 0x08: switch (s3->chip) { /*Revision ID*/ - case S3_TRIO64V: - return 0x40; - case S3_TRIO64V2: - return 0x16; /*Confirmed on an onboard 64V2/DX*/ - default: - return 0x00; + case 0x08: + switch (s3->chip) { /*Revision ID*/ + case S3_TRIO64V: + return 0x40; + case S3_TRIO64V2: + return 0x16; /*Confirmed on an onboard 64V2/DX*/ + default: + return 0x00; } break; case 0x09: @@ -9252,24 +9253,11 @@ s3_pci_read(UNUSED(int func), int addr, void *priv) case 0x0d: return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x0d] & 0xf8) : 0x00; - case 0x10: - return 0x00; /*Linear frame buffer address*/ - case 0x11: - return 0x00; case 0x12: - if (svga->crtc[0x53] & 0x08) - return 0x00; - else - return (svga->crtc[0x5a] & 0x80); - break; + return (s3->chip >= S3_TRIO64V) ? 0x00 : (svga->crtc[0x5a] & 0x80); case 0x13: - if (svga->crtc[0x53] & 0x08) { - return (s3->chip >= S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe); - } else { - return svga->crtc[0x59]; - } - break; + return (s3->chip >= S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : svga->crtc[0x59]; case 0x30: return s3->has_bios ? (s3->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ @@ -9323,13 +9311,16 @@ s3_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) s3_io_set(s3); else s3_io_remove(s3); - s3->pci_regs[PCI_REG_COMMAND] = (val & 0x23); + if (s3->chip >= S3_TRIO64V) + s3->pci_regs[PCI_REG_COMMAND] = (val & 0x27); + else + s3->pci_regs[PCI_REG_COMMAND] = (val & 0x23); s3_updatemapping(s3); break; case 0x07: if (s3->chip == S3_TRIO64V2) { - s3->pci_regs[0x07] = val & 0x3e; + s3->pci_regs[0x07] &= ~(val & 0x30); return; } break; @@ -9342,18 +9333,14 @@ s3_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) break; case 0x12: - if (!(svga->crtc[0x53] & 0x08)) { - svga->crtc[0x5a] = (svga->crtc[0x5a] & 0x7f) | (val & 0x80); + if (s3->chip < S3_TRIO64V) { + svga->crtc[0x5a] = val & 0x80; s3_updatemapping(s3); } break; case 0x13: - if (svga->crtc[0x53] & 0x08) { - svga->crtc[0x59] = (s3->chip >= S3_TRIO64V) ? (val & 0xfc) : (val & 0xfe); - } else { - svga->crtc[0x59] = val; - } + svga->crtc[0x59] = (s3->chip >= S3_TRIO64V) ? (val & 0xfc) : val; s3_updatemapping(s3); break; diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 4bcbaea9e..8c9a1e008 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -4203,7 +4203,7 @@ s3_virge_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) s3_virge_updatemapping(virge); return; case 0x07: - virge->pci_regs[0x07] = val & 0x3e; + virge->pci_regs[0x07] &= ~(val & 0x30); return; case 0x0d: virge->pci_regs[0x0d] = val & 0xf8; From 52e80587fd3b779c2e3594717256298109cf0edb Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Sun, 25 Aug 2024 23:41:54 -0300 Subject: [PATCH 32/64] Revert A-Trend ATC6310BXII/ATC7020BXII name change References: * https://web.archive.org/web/20010606125848/http://www.atrend.com.tw/english/product.htm * https://web.archive.org/web/20010405101351/http://www.atrend.com.tw/english/product/mainboard/ATC6310BXII.htm * https://web.archive.org/web/20020404115114/http://www.atrend.com.tw/english/product/mainboard/atc7020bxii.htm --- src/machine/machine_table.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index b482951ef..c0c0e9085 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -14678,7 +14678,7 @@ const machine_t machines[] = { /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ { - .name = "[SMSC VictoryBX-66] A-Trend ATC-6310BXII", + .name = "[SMSC VictoryBX-66] A-Trend ATC6310BXII", .internal_name = "atc6310bxii", .type = MACHINE_TYPE_SLOT1, .chipset = MACHINE_CHIPSET_SMSC_VICTORYBX_66, @@ -15397,7 +15397,7 @@ const machine_t machines[] = { /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ { - .name = "[SMSC VictoryBX-66] A-Trend ATC-7020BXII", + .name = "[SMSC VictoryBX-66] A-Trend ATC7020BXII", .internal_name = "atc7020bxii", .type = MACHINE_TYPE_SOCKET370, .chipset = MACHINE_CHIPSET_SMSC_VICTORYBX_66, From 7683721870be92f0e3a55b192a2d632c39bfc19b Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 26 Aug 2024 08:00:21 +0200 Subject: [PATCH 33/64] Apply Randrianasulu's fix to thread.cpp, fixes building in Termux, closes #4753. --- src/thread.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/thread.cpp b/src/thread.cpp index f2a0ceaf0..78a7b109d 100644 --- a/src/thread.cpp +++ b/src/thread.cpp @@ -5,12 +5,16 @@ #include <86box/plat.h> #include <86box/thread.h> +#if !defined(__unix__) + struct event_cpp11_t { std::condition_variable cond; std::mutex mutex; bool state = false; }; +#endif + extern "C" { thread_t * From f9b80f1a103685971aba4f8eab8568c9b1a0e56a Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 26 Aug 2024 17:12:25 +0200 Subject: [PATCH 34/64] Renamed the event struct, should properly fix building thread.cpp on termux without breaking other OS'es. --- src/thread.cpp | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/src/thread.cpp b/src/thread.cpp index 78a7b109d..079b80a3e 100644 --- a/src/thread.cpp +++ b/src/thread.cpp @@ -5,16 +5,12 @@ #include <86box/plat.h> #include <86box/thread.h> -#if !defined(__unix__) - -struct event_cpp11_t { +struct event_cpp11_ex_t { std::condition_variable cond; std::mutex mutex; bool state = false; }; -#endif - extern "C" { thread_t * @@ -86,14 +82,14 @@ thread_close_mutex(mutex_t *_mutex) event_t * thread_create_event() { - auto ev = new event_cpp11_t; + auto ev = new event_cpp11_ex_t; return ev; } int thread_wait_event(event_t *handle, int timeout) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); auto lock = std::unique_lock(event->mutex); if (timeout < 0) { @@ -116,7 +112,7 @@ thread_wait_event(event_t *handle, int timeout) void thread_set_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); { auto lock = std::unique_lock(event->mutex); event->state = true; @@ -127,7 +123,7 @@ thread_set_event(event_t *handle) void thread_reset_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); auto lock = std::unique_lock(event->mutex); event->state = false; } @@ -135,7 +131,7 @@ thread_reset_event(event_t *handle) void thread_destroy_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); delete event; } } From 7c7cc921eeccab556ca580c5c7b59ee40eaec99e Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 02:34:59 +0200 Subject: [PATCH 35/64] Non-808x interpreters: fetch the next instruction after a CR0 paging bit toggle with the old CR0 paging bit value, fixes SCO Unix. --- src/cpu/386.c | 8 ++++++++ src/cpu/386_dynarec.c | 8 ++++++++ src/cpu/cpu.c | 1 + src/cpu/cpu.h | 1 + src/cpu/x86.c | 3 ++- src/cpu/x86_ops_mov_ctrl.h | 30 ++++++++++++++++++++++++++---- src/cpu/x86_ops_mov_ctrl_2386.h | 22 ++++++++++++++++++---- src/cpu/x86_ops_pmode.h | 21 +++++++++++++++------ 8 files changed, 79 insertions(+), 15 deletions(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index 3524e0d1e..50ed4fddb 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -304,6 +304,14 @@ exec386_2386(int32_t cycs) cpu_state.pc &= 0xffff; #endif + if (cpu_flush_pending == 1) + cpu_flush_pending++; + else if (cpu_flush_pending == 2) { + cpu_flush_pending = 0; + cr0 ^= 0x80000000; + flushmmucache(); + } + if (cpu_end_block_after_ins) cpu_end_block_after_ins--; diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index d8a33a624..bf8b31600 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -933,6 +933,14 @@ exec386(int32_t cycs) x386_dynarec_log("[%04X:%08X] ABRT\n", CS, cpu_state.pc); #endif + if (cpu_flush_pending == 1) + cpu_flush_pending++; + else if (cpu_flush_pending == 2) { + cpu_flush_pending = 0; + cr0 ^= 0x80000000; + flushmmucache(); + } + #ifndef USE_NEW_DYNAREC if (!use32) cpu_state.pc &= 0xffff; diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 172a5543c..bbada4958 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -182,6 +182,7 @@ int cpu_rom_prefetch_cycles; int cpu_waitstates; int cpu_cache_int_enabled; int cpu_cache_ext_enabled; +int cpu_flush_pending; int cpu_isa_speed; int cpu_pci_speed; int cpu_isa_pci_div; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 9b154cd0d..cdb4e54b6 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -616,6 +616,7 @@ extern int cpu_prefetch_width; extern int cpu_mem_prefetch_cycles; extern int cpu_rom_prefetch_cycles; extern int cpu_waitstates; +extern int cpu_flush_pending; extern int cpu_cache_int_enabled; extern int cpu_cache_ext_enabled; extern int cpu_isa_speed; diff --git a/src/cpu/x86.c b/src/cpu/x86.c index 4bf381ee4..d70f8f61c 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -277,7 +277,7 @@ reset_common(int hard) cr0 = 0; if (is386 && !is486 && (fpu_type == FPU_387)) cr0 |= 0x10; - cpu_cache_int_enabled = 0; + cpu_cache_int_enabled = 0; cpu_update_waitstates(); cr4 = 0; cpu_state.eflags = 0; @@ -325,6 +325,7 @@ reset_common(int hard) if (hard) codegen_reset(); #endif + cpu_flush_pending = 0; if (!hard) flushmmucache(); x86_was_reset = 1; diff --git a/src/cpu/x86_ops_mov_ctrl.h b/src/cpu/x86_ops_mov_ctrl.h index bcfed831b..f6fcda983 100644 --- a/src/cpu/x86_ops_mov_ctrl.h +++ b/src/cpu/x86_ops_mov_ctrl.h @@ -9,6 +9,8 @@ opMOV_r_CRx_a16(uint32_t fetchdat) switch (cpu_reg) { case 0: cpu_state.regs[cpu_rm].l = cr0; + if (cpu_flush_pending) + cpu_state.regs[cpu_rm].l ^= 0x80000000; if (is486 || isibm486) cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ else { @@ -49,6 +51,8 @@ opMOV_r_CRx_a32(uint32_t fetchdat) switch (cpu_reg) { case 0: cpu_state.regs[cpu_rm].l = cr0; + if (cpu_flush_pending) + cpu_state.regs[cpu_rm].l ^= 0x80000000; if (is486 || isibm486) cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ else { @@ -180,12 +184,21 @@ opMOV_CRx_r_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); switch (cpu_reg) { case 0: - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { + if (is_p6 && !cpu_use_dynarec) + flushmmucache(); + else + cpu_flush_pending = 1; + } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - cr0 = cpu_state.regs[cpu_rm].l; + if (!is_p6 && !cpu_use_dynarec && ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000)) + cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); + else + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) @@ -237,12 +250,21 @@ opMOV_CRx_r_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); switch (cpu_reg) { case 0: - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { + if (is_p6 && !cpu_use_dynarec) + flushmmucache(); + else + cpu_flush_pending = 1; + } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - cr0 = cpu_state.regs[cpu_rm].l; + if (!is_p6 && !cpu_use_dynarec && ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000)) + cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); + else + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) diff --git a/src/cpu/x86_ops_mov_ctrl_2386.h b/src/cpu/x86_ops_mov_ctrl_2386.h index cae6c9957..6b6db8c94 100644 --- a/src/cpu/x86_ops_mov_ctrl_2386.h +++ b/src/cpu/x86_ops_mov_ctrl_2386.h @@ -9,6 +9,8 @@ opMOV_r_CRx_a16(uint32_t fetchdat) switch (cpu_reg) { case 0: cpu_state.regs[cpu_rm].l = cr0; + if (cpu_flush_pending) + cpu_state.regs[cpu_rm].l ^= 0x80000000; if (is486 || isibm486) cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ else { @@ -49,6 +51,8 @@ opMOV_r_CRx_a32(uint32_t fetchdat) switch (cpu_reg) { case 0: cpu_state.regs[cpu_rm].l = cr0; + if (cpu_flush_pending) + cpu_state.regs[cpu_rm].l ^= 0x80000000; if (is486 || isibm486) cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ else { @@ -176,12 +180,17 @@ opMOV_CRx_r_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); switch (cpu_reg) { case 0: - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + cpu_flush_pending = 1; /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - cr0 = cpu_state.regs[cpu_rm].l; + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); + else + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) @@ -233,12 +242,17 @@ opMOV_CRx_r_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); switch (cpu_reg) { case 0: - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + cpu_flush_pending = 1; /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - cr0 = cpu_state.regs[cpu_rm].l; + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); + else + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) diff --git a/src/cpu/x86_ops_pmode.h b/src/cpu/x86_ops_pmode.h index 4f32b0e37..b68aaffbd 100644 --- a/src/cpu/x86_ops_pmode.h +++ b/src/cpu/x86_ops_pmode.h @@ -431,12 +431,21 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32) if (cpu_mod != 3) SEG_CHECK_WRITE(cpu_state.ea_seg); if (is386 && is32 && (cpu_mod == 3)) { - if (is486 || isibm486) - seteaw(cr0); - else if (is386 && !cpu_16bitbus) - seteaw(cr0 | /* 0x7FFFFF00 */ 0x7FFFFFE0); - else - seteaw(cr0 | 0x7FFFFFF0); + if (cpu_flush_pending) { + if (is486 || isibm486) + seteaw(cr0 ^ 0x80000000); + else if (is386 && !cpu_16bitbus) + seteaw((cr0 ^ 0x80000000) | /* 0x7FFFFF00 */ 0x7FFFFFE0); + else + seteaw((cr0 ^ 0x80000000) | 0x7FFFFFF0); + } else { + if (is486 || isibm486) + seteaw(cr0); + else if (is386 && !cpu_16bitbus) + seteaw(cr0 | /* 0x7FFFFF00 */ 0x7FFFFFE0); + else + seteaw(cr0 | 0x7FFFFFF0); + } } else { if (is486 || isibm486) seteaw(msw); From 208b213aacacb0dd1172619b660c88d45c33bac1 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 03:02:42 +0200 Subject: [PATCH 36/64] Media history: Fixed the handling of relative paths. --- src/qt/qt_mediahistorymanager.cpp | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index 672ccfa8d..50c16f70a 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -26,6 +26,7 @@ extern "C" { #include <86box/timer.h> #include <86box/cdrom.h> #include <86box/fdd.h> +#include <86box/path.h> } namespace ui { @@ -275,9 +276,6 @@ MediaHistoryManager::pathAdjustSingle(QString checked_path) if (file_info.filePath().isEmpty() || current_usr_path.isEmpty() || file_info.isRelative()) { return checked_path; } - if (file_info.filePath().startsWith(current_usr_path)) { - checked_path = file_info.filePath().remove(current_usr_path); - } return checked_path; } @@ -304,10 +302,25 @@ MediaHistoryManager::removeMissingImages(device_index_list_t &device_history) if (file_info.filePath().isEmpty()) { continue; } - // For this check, explicitly prepend `usr_path` to relative paths to account for $CWD platform variances - QFileInfo absolute_path = file_info.isRelative() ? QFileInfo(getUsrPath().append(file_info.filePath())) : file_info; - if ((file_info.filePath().left(8) != "ioctl://") && !absolute_path.exists()) { - qWarning("Image file %s does not exist - removing from history", qPrintable(file_info.filePath())); + + char *p = checked_path.toUtf8().data(); + char temp[1024] = { 0 }; + + if (path_abs(p)) { + if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1)) + fatal("removeMissingImages(): strlen(p) > 2047\n"); + else + snprintf(temp, (MAX_IMAGE_PATH_LEN - 1), "%s", p); + } else + snprintf(temp, (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path, + path_get_slash(usr_path), p); + path_normalize(temp); + + QString qstr = QString::fromUtf8(temp); + QFileInfo new_fi(qstr); + + if ((new_fi.filePath().left(8) != "ioctl://") && !new_fi.exists()) { + qWarning("Image file %s does not exist - removing from history", qPrintable(new_fi.filePath())); checked_path = ""; } } From c0037eaa2f7bc5601154eead401459f2a308a48f Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 03:15:54 +0200 Subject: [PATCH 37/64] Media history implementation for the remaining devices: Part 1. --- src/include/86box/cartridge.h | 3 ++ src/include/86box/cassette.h | 3 ++ src/qt/qt_mediahistorymanager.cpp | 51 +++++++++++++++++++++++++------ src/qt/qt_mediahistorymanager.hpp | 7 ++++- 4 files changed, 53 insertions(+), 11 deletions(-) diff --git a/src/include/86box/cartridge.h b/src/include/86box/cartridge.h index 2fa0a9358..2ea7ec734 100644 --- a/src/include/86box/cartridge.h +++ b/src/include/86box/cartridge.h @@ -21,7 +21,10 @@ extern "C" { #endif +#define CART_IMAGE_HISTORY 4 + extern char cart_fns[2][512]; +extern char *cart_image_history[2][CART_IMAGE_HISTORY]; extern void cart_load(int drive, char *fn); extern void cart_close(int drive); diff --git a/src/include/86box/cassette.h b/src/include/86box/cassette.h index 3706ca632..bb0899e24 100644 --- a/src/include/86box/cassette.h +++ b/src/include/86box/cassette.h @@ -153,10 +153,13 @@ void pc_cas_print_state(const pc_cassette_t *cas); void pc_cas_clock(pc_cassette_t *cas, unsigned long cnt); void pc_cas_advance(pc_cassette_t *cas); +#define CASSETTE_IMAGE_HISTORY 4 + extern pc_cassette_t *cassette; extern char cassette_fname[512]; extern char cassette_mode[512]; +extern char * cassette_image_history[CASSETTE_IMAGE_HISTORY]; extern unsigned long cassette_pos; extern unsigned long cassette_srate; extern int cassette_enable; diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index 50c16f70a..52b93fc11 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -24,8 +24,12 @@ extern "C" { #include <86box/timer.h> -#include <86box/cdrom.h> +#include <86box/cassette.h> +#include <86box/cartridge.h> #include <86box/fdd.h> +#include <86box/cdrom.h> +#include <86box/zip.h> +#include <86box/mo.h> #include <86box/path.h> } @@ -101,7 +105,14 @@ MediaHistoryManager::getImageForSlot(int index, int slot, ui::MediaType type) int MediaHistoryManager::maxDevicesSupported(ui::MediaType type) { - return type == ui::MediaType::Cassette ? 1 : 4; + switch (type) { + default: + return 4; + case ui::MediaType::Cassette: + return 1; + case ui::MediaType::Cartridge: + return 2; + } } void @@ -164,14 +175,26 @@ MediaHistoryManager::initialDeduplication() for (int device_index = 0; device_index < maxDevicesSupported(device_type); device_index++) { device_index_list_t device_history = getHistoryListForDeviceIndex(device_index, device_type); switch (device_type) { - case ui::MediaType::Optical: - current_image = cdrom[device_index].image_path; + default: + continue; + break; + case ui::MediaType::Cassette: + current_image = cassette_fname; + break; + case ui::MediaType::Cartridge: + current_image = cart_fns[device_index]; break; case ui::MediaType::Floppy: current_image = floppyfns[device_index]; break; - default: - continue; + case ui::MediaType::Optical: + current_image = cdrom[device_index].image_path; + break; + case ui::MediaType::Zip: + current_image = zip[device_index].image_path; + break; + case ui::MediaType::Mo: + current_image = mo[device_index].image_path; break; } deduplicateList(device_history, QVector(1, current_image)); @@ -191,12 +214,20 @@ char ** MediaHistoryManager::getEmuHistoryVarForType(ui::MediaType type, int index) { switch (type) { - case ui::MediaType::Optical: - return &cdrom[index].image_history[0]; - case ui::MediaType::Floppy: - return &fdd_image_history[index][0]; default: return nullptr; + case ui::MediaType::Cassette: + return &cassette_image_history[0]; + case ui::MediaType::Cartridge: + return &cart_image_history[index][0]; + case ui::MediaType::Floppy: + return &fdd_image_history[index][0]; + case ui::MediaType::Optical: + return &cdrom[index].image_history[0]; + case ui::MediaType::Zip: + return &zip[index].image_history[0]; + case ui::MediaType::Mo: + return &mo[index].image_history[0]; } } diff --git a/src/qt/qt_mediahistorymanager.hpp b/src/qt/qt_mediahistorymanager.hpp index 4eae46f9c..191ae9e7b 100644 --- a/src/qt/qt_mediahistorymanager.hpp +++ b/src/qt/qt_mediahistorymanager.hpp @@ -47,7 +47,8 @@ enum class MediaType { Optical, Zip, Mo, - Cassette + Cassette, + Cartridge }; // This macro allows us to do a reverse lookup of the enum with `QMetaEnum` Q_ENUM_NS(MediaType) @@ -61,6 +62,10 @@ typedef QHash master_list_t; static const MediaType AllSupportedMediaHistoryTypes[] = { MediaType::Optical, MediaType::Floppy, + MediaType::Zip, + MediaType::Mo, + MediaType::Cassette, + MediaType::Cartridge, }; class MediaHistoryManager { From cd3f29f6226836367379735a069fb6ba35020ef9 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 03:29:37 +0200 Subject: [PATCH 38/64] Part 2. --- src/config.c | 101 +++++++++++++++++++++++++++++++++++++---- src/device/cartridge.c | 1 + src/device/cassette.c | 1 + 3 files changed, 95 insertions(+), 8 deletions(-) diff --git a/src/config.c b/src/config.c index 2c0781028..e35123dbf 100644 --- a/src/config.c +++ b/src/config.c @@ -861,16 +861,46 @@ load_storage_controllers(void) cassette_enable = !!ini_section_get_int(cat, "cassette_enabled", 0); else cassette_enable = 0; + p = ini_section_get_string(cat, "cassette_file", ""); - if (strlen(p) > 511) - fatal("load_storage_controllers(): strlen(p) > 511\n"); - else - strncpy(cassette_fname, p, 511); + + if (!strcmp(p, usr_path)) + p[0] = 0x00; + + if (p[0] != 0x00) { + if (path_abs(p)) { + if (strlen(p) > 511) + fatal("load_storage_controllers(): strlen(p) > 511 (cassette_fname)\n); + else + strncpy(cassette_fname, p, 511); + } else + path_append_filename(cassette_fname, usr_path, p); + path_normalize(cassette_fname); + } + p = ini_section_get_string(cat, "cassette_mode", ""); if (strlen(p) > 511) fatal("load_storage_controllers(): strlen(p) > 511\n"); else strncpy(cassette_mode, p, 511); + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + cassette_image_history[i] = (char *) calloc((MAX_IMAGE_PATH_LEN + 1) << 1, sizeof(char)); + sprintf(temp, "cassette_image_history_%02i", i + 1); + p = ini_section_get_string(cat, temp, NULL); + if (p) { + if (path_abs(p)) { + if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1)) + fatal("load_storage_controllers(): strlen(p) > 2047 " + "(cassette_image_history[%i])\n", i); + else + snprintf(cassette_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s", p); + } else + snprintf(csasette_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path, + path_get_slash(usr_path), p); + path_normalize(cassette_image_history[c][i]); + } + } cassette_pos = ini_section_get_int(cat, "cassette_position", 0); cassette_srate = ini_section_get_int(cat, "cassette_srate", 44100); cassette_append = !!ini_section_get_int(cat, "cassette_append", 0); @@ -894,6 +924,24 @@ load_storage_controllers(void) path_append_filename(cart_fns[c], usr_path, p); path_normalize(cart_fns[c]); } + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + cart_image_history[c][i] = (char *) calloc((MAX_IMAGE_PATH_LEN + 1) << 1, sizeof(char)); + sprintf(temp, "cart_%02i_image_history_%02i", c + 1, i + 1); + p = ini_section_get_string(cat, temp, NULL); + if (p) { + if (path_abs(p)) { + if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1)) + fatal("load_storage_controllers(): strlen(p) > 2047 " + "(cart_image_history[%i][%i])\n", c, i); + else + snprintf(cart_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s", p); + } else + snprintf(cart_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path, + path_get_slash(usr_path), p); + path_normalize(cart_image_history[c][i]); + } + } } lba_enhancer_enabled = !!ini_section_get_int(cat, "lba_enhancer_enabled", 0); @@ -2330,14 +2378,32 @@ save_storage_controllers(void) if (strlen(cassette_fname) == 0) ini_section_delete_var(cat, "cassette_file"); - else - ini_section_set_string(cat, "cassette_file", cassette_fname); + else { + path_normalize(cassette_fname); + if (!strnicmp(cassette_fname, usr_path, strlen(usr_path))) + ini_section_set_string(cat, "cassette_file", &cassette_fname[strlen(usr_path)]); + else + ini_section_set_string(cat, "cassette_file", cassette_fname); + } if (strlen(cassette_mode) == 0) ini_section_delete_var(cat, "cassette_mode"); else ini_section_set_string(cat, "cassette_mode", cassette_mode); + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + sprintf(temp, "cassette_image_history_%02i", i + 1); + if ((cassette_image_history[i] == 0) || strlen(cassette_image_history[i]) == 0) + ini_section_delete_var(cat, temp); + else { + path_normalize(cassette_image_history[i]); + if (!strnicmp(cassette_image_history[i], usr_path, strlen(usr_path))) + ini_section_set_string(cat, temp, &cassette_image_history[i][strlen(usr_path)]); + else + ini_section_set_string(cat, temp, cassette_image_history[i]); + } + } + if (cassette_pos == 0) ini_section_delete_var(cat, "cassette_position"); else @@ -2365,10 +2431,29 @@ save_storage_controllers(void) for (c = 0; c < 2; c++) { sprintf(temp, "cartridge_%02i_fn", c + 1); + if (strlen(cart_fns[c]) == 0) ini_section_delete_var(cat, temp); - else - ini_section_set_string(cat, temp, cart_fns[c]); + else { + path_normalize(cart_fns[c]); + if (!strnicmp(cart_fns[c], usr_path, strlen(usr_path))) + ini_section_set_string(cat, temp, &cart_fns[c][strlen(usr_path)]); + else + ini_section_set_string(cat, temp, cart_fns[c]); + } + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + sprintf(temp, "cartridge_%02i_image_history_%02i", c + 1, i + 1); + if ((cart_image_history[c][i] == 0) || strlen(cart_image_history[c][i]) == 0) + ini_section_delete_var(cat, temp); + else { + path_normalize(cart_image_history[c][i]); + if (!strnicmp(cart_image_history[c][i], usr_path, strlen(usr_path))) + ini_section_set_string(cat, temp, &cart_image_history[c][i][strlen(usr_path)]); + else + ini_section_set_string(cat, temp, cart_image_history[c][i]); + } + } } if (lba_enhancer_enabled == 0) diff --git a/src/device/cartridge.c b/src/device/cartridge.c index a40c29c9b..52f36a4ca 100644 --- a/src/device/cartridge.c +++ b/src/device/cartridge.c @@ -35,6 +35,7 @@ typedef struct cart_t { } cart_t; char cart_fns[2][512]; +char *cart_image_history[2][CART_IMAGE_HISTORY]; static cart_t carts[2]; diff --git a/src/device/cassette.c b/src/device/cassette.c index 1d0b88531..a239c6393 100644 --- a/src/device/cassette.c +++ b/src/device/cassette.c @@ -45,6 +45,7 @@ pc_cassette_t *cassette; char cassette_fname[512]; char cassette_mode[512]; +char * cassette_image_history[CASSETTE_IMAGE_HISTORY]; unsigned long cassette_pos; unsigned long cassette_srate; int cassette_enable; From 26cc61fdba41c7f8b9b0a1d687134dddcc170b10 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 05:09:35 +0200 Subject: [PATCH 39/64] Part 3. --- src/config.c | 10 +-- src/qt/qt_mediahistorymanager.cpp | 10 ++- src/qt/qt_mediahistorymanager.hpp | 2 +- src/qt/qt_mediamenu.cpp | 140 +++++++++++++++++++++++++++--- src/qt/qt_mediamenu.hpp | 14 ++- 5 files changed, 149 insertions(+), 27 deletions(-) diff --git a/src/config.c b/src/config.c index e35123dbf..0153e20e8 100644 --- a/src/config.c +++ b/src/config.c @@ -870,7 +870,7 @@ load_storage_controllers(void) if (p[0] != 0x00) { if (path_abs(p)) { if (strlen(p) > 511) - fatal("load_storage_controllers(): strlen(p) > 511 (cassette_fname)\n); + fatal("load_storage_controllers(): strlen(p) > 511 (cassette_fname)\n"); else strncpy(cassette_fname, p, 511); } else @@ -894,11 +894,11 @@ load_storage_controllers(void) fatal("load_storage_controllers(): strlen(p) > 2047 " "(cassette_image_history[%i])\n", i); else - snprintf(cassette_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s", p); + snprintf(cassette_image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p); } else - snprintf(csasette_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path, + snprintf(cassette_image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path, path_get_slash(usr_path), p); - path_normalize(cassette_image_history[c][i]); + path_normalize(cassette_image_history[i]); } } cassette_pos = ini_section_get_int(cat, "cassette_position", 0); @@ -927,7 +927,7 @@ load_storage_controllers(void) for (int i = 0; i < MAX_PREV_IMAGES; i++) { cart_image_history[c][i] = (char *) calloc((MAX_IMAGE_PATH_LEN + 1) << 1, sizeof(char)); - sprintf(temp, "cart_%02i_image_history_%02i", c + 1, i + 1); + sprintf(temp, "cartridge_%02i_image_history_%02i", c + 1, i + 1); p = ini_section_get_string(cat, temp, NULL); if (p) { if (path_abs(p)) { diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index 52b93fc11..9886c205b 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -24,10 +24,12 @@ extern "C" { #include <86box/timer.h> +#include <86box/device.h> #include <86box/cassette.h> #include <86box/cartridge.h> #include <86box/fdd.h> #include <86box/cdrom.h> +#include <86box/scsi_device.h> #include <86box/zip.h> #include <86box/mo.h> #include <86box/path.h> @@ -191,10 +193,10 @@ MediaHistoryManager::initialDeduplication() current_image = cdrom[device_index].image_path; break; case ui::MediaType::Zip: - current_image = zip[device_index].image_path; + current_image = zip_drives[device_index].image_path; break; case ui::MediaType::Mo: - current_image = mo[device_index].image_path; + current_image = mo_drives[device_index].image_path; break; } deduplicateList(device_history, QVector(1, current_image)); @@ -225,9 +227,9 @@ MediaHistoryManager::getEmuHistoryVarForType(ui::MediaType type, int index) case ui::MediaType::Optical: return &cdrom[index].image_history[0]; case ui::MediaType::Zip: - return &zip[index].image_history[0]; + return &zip_drives[index].image_history[0]; case ui::MediaType::Mo: - return &mo[index].image_history[0]; + return &mo_drives[index].image_history[0]; } } diff --git a/src/qt/qt_mediahistorymanager.hpp b/src/qt/qt_mediahistorymanager.hpp index 191ae9e7b..29ada8e2a 100644 --- a/src/qt/qt_mediahistorymanager.hpp +++ b/src/qt/qt_mediahistorymanager.hpp @@ -65,7 +65,7 @@ static const MediaType AllSupportedMediaHistoryTypes[] = { MediaType::Zip, MediaType::Mo, MediaType::Cassette, - MediaType::Cartridge, + MediaType::Cartridge }; class MediaHistoryManager { diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index c80d9d17f..d9db79db0 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -91,6 +91,11 @@ MediaMenu::refresh(QMenu *parentMenu) cassetteMenu->addAction(tr("&Existing image..."), [this]() { cassetteSelectImage(false); }); cassetteMenu->addAction(tr("Existing image (&Write-protected)..."), [this]() { cassetteSelectImage(true); }); cassetteMenu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + cassetteImageHistoryPos[slot] = cassetteMenu->children().count(); + cassetteMenu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, slot]() { cassetteMenuSelect(slot); })->setCheckable(false); + } + cassetteMenu->addSeparator(); cassetteRecordPos = cassetteMenu->children().count(); cassetteMenu->addAction(tr("&Record"), [this] { pc_cas_set_mode(cassette, 1); cassetteUpdateMenu(); })->setCheckable(true); cassettePlayPos = cassetteMenu->children().count(); @@ -111,6 +116,11 @@ MediaMenu::refresh(QMenu *parentMenu) auto *menu = parentMenu->addMenu(""); menu->addAction(tr("&Image..."), [this, i]() { cartridgeSelectImage(i); }); menu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + cartridgeImageHistoryPos[slot] = menu->children().count(); + menu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, i, slot]() { cartridgeMenuSelect(i, slot); })->setCheckable(false); + } + menu->addSeparator(); cartridgeEjectPos = menu->children().count(); menu->addAction(tr("E&ject"), [this, i]() { cartridgeEject(i); }); cartridgeMenus[i] = menu; @@ -179,10 +189,13 @@ MediaMenu::refresh(QMenu *parentMenu) menu->addAction(tr("&Existing image..."), [this, i]() { zipSelectImage(i, false); }); menu->addAction(tr("Existing image (&Write-protected)..."), [this, i]() { zipSelectImage(i, true); }); menu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + zipImageHistoryPos[slot] = menu->children().count(); + menu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, i, slot]() { zipReload(i, slot); })->setCheckable(false); + } + menu->addSeparator(); zipEjectPos = menu->children().count(); menu->addAction(tr("E&ject"), [this, i]() { zipEject(i); }); - zipReloadPos = menu->children().count(); - menu->addAction(tr("&Reload previous image"), [this, i]() { zipReload(i); }); zipMenus[i] = menu; zipUpdateMenu(i); }); @@ -195,10 +208,13 @@ MediaMenu::refresh(QMenu *parentMenu) menu->addAction(tr("&Existing image..."), [this, i]() { moSelectImage(i, false); }); menu->addAction(tr("Existing image (&Write-protected)..."), [this, i]() { moSelectImage(i, true); }); menu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + moImageHistoryPos[slot] = menu->children().count(); + menu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, i, slot]() { moReload(i, slot); })->setCheckable(false); + } + menu->addSeparator(); moEjectPos = menu->children().count(); menu->addAction(tr("E&ject"), [this, i]() { moEject(i); }); - moReloadPos = menu->children().count(); - menu->addAction(tr("&Reload previous image"), [this, i]() { moReload(i); }); moMenus[i] = menu; moUpdateMenu(i); }); @@ -243,9 +259,19 @@ MediaMenu::cassetteSelectImage(bool wp) cassetteMount(filename, wp); } +void +MediaMenu::cassetteMenuSelect(int slot) +{ + QString filename = mhm.getImageForSlot(0, slot, ui::MediaType::Cassette); + cassetteMount(filename.toUtf8().constData(), 0); + cassetteUpdateMenu(); + ui_sb_update_tip(SB_CASSETTE); +} + void MediaMenu::cassetteMount(const QString &filename, bool wp) { + auto previous_image = QFileInfo(cassette_fname); pc_cas_set_fname(cassette, nullptr); memset(cassette_fname, 0, sizeof(cassette_fname)); cassette_ui_writeprot = wp ? 1 : 0; @@ -257,6 +283,7 @@ MediaMenu::cassetteMount(const QString &filename, bool wp) } ui_sb_update_icon_state(SB_CASSETTE, filename.isEmpty() ? 1 : 0); + mhm.addImageToHistory(0, ui::MediaType::Cassette, previous_image.filePath(), filename); cassetteUpdateMenu(); ui_sb_update_tip(SB_CASSETTE); config_save(); @@ -265,6 +292,7 @@ MediaMenu::cassetteMount(const QString &filename, bool wp) void MediaMenu::cassetteEject() { + mhm.addImageToHistory(0, ui::MediaType::Cassette, cassette_fname, QString()); pc_cas_set_fname(cassette, nullptr); memset(cassette_fname, 0, sizeof(cassette_fname)); ui_sb_update_icon_state(SB_CASSETTE, 1); @@ -297,16 +325,22 @@ MediaMenu::cassetteUpdateMenu() cassetteMenu->setTitle(QString::asprintf(tr("Cassette: %s").toUtf8().constData(), (name.isEmpty() ? tr("(empty)") : name).toUtf8().constData())); + + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + updateImageHistory(0, slot, ui::MediaType::Cassette); + } } void MediaMenu::cartridgeMount(int i, const QString &filename) { + auto previous_image = QFileInfo(cart_fns[i]); cart_close(i); QByteArray filenameBytes = filename.toUtf8(); cart_load(i, filenameBytes.data()); ui_sb_update_icon_state(SB_CARTRIDGE | i, filename.isEmpty() ? 1 : 0); + mhm.addImageToHistory(i, ui::MediaType::Cartridge, previous_image.filePath(), filename); cartridgeUpdateMenu(i); ui_sb_update_tip(SB_CARTRIDGE | i); config_save(); @@ -327,9 +361,19 @@ MediaMenu::cartridgeSelectImage(int i) cartridgeMount(i, filename); } +void +MediaMenu::cartridgeMenuSelect(int index, int slot) +{ + QString filename = mhm.getImageForSlot(index, slot, ui::MediaType::Cartridge); + cartridgeMount(index, filename.toUtf8().constData()); + cartridgeUpdateMenu(index); + ui_sb_update_tip(SB_CARTRIDGE | index); +} + void MediaMenu::cartridgeEject(int i) { + mhm.addImageToHistory(i, ui::MediaType::Cartridge, cart_fns[i], QString()); cart_close(i); ui_sb_update_icon_state(SB_CARTRIDGE | i, 1); cartridgeUpdateMenu(i); @@ -347,6 +391,10 @@ MediaMenu::cartridgeUpdateMenu(int i) ejectMenu->setEnabled(!name.isEmpty()); // menu->setTitle(tr("Cartridge %1: %2").arg(QString::number(i+1), name.isEmpty() ? tr("(empty)") : name)); menu->setTitle(QString::asprintf(tr("Cartridge %i: %ls").toUtf8().constData(), i + 1, name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); + + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + updateImageHistory(i, slot, ui::MediaType::Cartridge); + } } void @@ -580,6 +628,36 @@ MediaMenu::updateImageHistory(int index, int slot, ui::MediaType type) QString menu_item_name; switch (type) { + default: + menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); + return; + case ui::MediaType::Cassette: + if (!MachineStatus::hasCassette()) + return; + menu = cassetteMenu; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[cassetteImageHistoryPos[slot]]); + fi.setFile(fn); + menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); + break; + case ui::MediaType::Cartridge: + if (!machine_has_cartridge(machine)) + return; + menu = cartridgeMenus[index]; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[cartridgeImageHistoryPos[slot]]); + fi.setFile(fn); + menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); + break; + case ui::MediaType::Floppy: + if (!floppyMenus.contains(index)) + return; + menu = floppyMenus[index]; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[floppyImageHistoryPos[slot]]); + fi.setFile(fn); + menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); + break; case ui::MediaType::Optical: if (!cdromMenus.contains(index)) return; @@ -600,18 +678,24 @@ MediaMenu::updateImageHistory(int index, int slot, ui::MediaType type) } imageHistoryUpdatePos->setIcon(menu_icon); break; - case ui::MediaType::Floppy: - if (!floppyMenus.contains(index)) + case ui::MediaType::Zip: + if (!zipMenus.contains(index)) return; - menu = floppyMenus[index]; + menu = zipMenus[index]; children = menu->children(); - imageHistoryUpdatePos = dynamic_cast(children[floppyImageHistoryPos[slot]]); + imageHistoryUpdatePos = dynamic_cast(children[zipImageHistoryPos[slot]]); fi.setFile(fn); menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); break; - default: + case ui::MediaType::Mo: + if (!moMenus.contains(index)) + return; + menu = moMenus[index]; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[moImageHistoryPos[slot]]); + fi.setFile(fn); menu_item_name = fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData(); - return; + break; } imageHistoryUpdatePos->setText(QString::asprintf(tr("%s").toUtf8().constData(), menu_item_name.toUtf8().constData())); @@ -727,6 +811,7 @@ MediaMenu::zipMount(int i, const QString &filename, bool wp) zip_load(dev, filenameBytes.data()); zip_insert(dev); } + mhm.addImageToHistory(i, ui::MediaType::Zip, zip_drives[i].prev_image_path, zip_drives[i].image_path); ui_sb_update_icon_state(SB_ZIP | i, filename.isEmpty() ? 1 : 0); zipUpdateMenu(i); @@ -740,6 +825,7 @@ MediaMenu::zipEject(int i) { const auto dev = static_cast(zip_drives[i].priv); + mhm.addImageToHistory(i, ui::MediaType::Zip, zip_drives[i].image_path, QString()); zip_disk_close(dev); zip_drives[i].image_path[0] = 0; if (zip_drives[i].bus_type) { @@ -754,7 +840,7 @@ MediaMenu::zipEject(int i) } void -MediaMenu::zipReload(int i) +MediaMenu::zipReloadPrev(int i) { const auto dev = static_cast(zip_drives[i].priv); @@ -771,6 +857,15 @@ MediaMenu::zipReload(int i) config_save(); } +void +MediaMenu::zipReload(int index, int slot) +{ + const QString filename = mhm.getImageForSlot(index, slot, ui::MediaType::Zip); + zipMount(index, filename, false); + zipUpdateMenu(index); + ui_sb_update_tip(SB_ZIP | index); +} + void MediaMenu::zipUpdateMenu(int i) { @@ -800,6 +895,9 @@ MediaMenu::zipUpdateMenu(int i) // menu->setTitle(tr("ZIP %1 %2 (%3): %4").arg((zip_drives[i].is_250 > 0) ? "250" : "100", QString::number(i+1), busName, name.isEmpty() ? tr("(empty)") : name)); menu->setTitle(QString::asprintf(tr("ZIP %03i %i (%s): %ls").toUtf8().constData(), (zip_drives[i].is_250 > 0) ? 250 : 100, i + 1, busName.toUtf8().data(), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); + + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) + updateImageHistory(i, slot, ui::MediaType::Zip); } void @@ -844,6 +942,7 @@ MediaMenu::moMount(int i, const QString &filename, bool wp) mo_load(dev, filenameBytes.data()); mo_insert(dev); } + mhm.addImageToHistory(i, ui::MediaType::Mo, mo_drives[i].prev_image_path, mo_drives[i].image_path); ui_sb_update_icon_state(SB_MO | i, filename.isEmpty() ? 1 : 0); moUpdateMenu(i); @@ -857,6 +956,7 @@ MediaMenu::moEject(int i) { const auto dev = static_cast(mo_drives[i].priv); + mhm.addImageToHistory(i, ui::MediaType::Mo, mo_drives[i].image_path, QString()); mo_disk_close(dev); mo_drives[i].image_path[0] = 0; if (mo_drives[i].bus_type) { @@ -871,7 +971,7 @@ MediaMenu::moEject(int i) } void -MediaMenu::moReload(int i) +MediaMenu::moReloadPrev(int i) { mo_t *dev = (mo_t *) mo_drives[i].priv; @@ -888,6 +988,15 @@ MediaMenu::moReload(int i) config_save(); } +void +MediaMenu::moReload(int index, int slot) +{ + const QString filename = mhm.getImageForSlot(index, slot, ui::MediaType::Mo); + moMount(index, filename, false); + moUpdateMenu(index); + ui_sb_update_tip(SB_MO | index); +} + void MediaMenu::moUpdateMenu(int i) { @@ -916,6 +1025,9 @@ MediaMenu::moUpdateMenu(int i) } menu->setTitle(QString::asprintf(tr("MO %i (%ls): %ls").toUtf8().constData(), i + 1, busName.toStdU16String().data(), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); + + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) + updateImageHistory(i, slot, ui::MediaType::Mo); } void @@ -1043,7 +1155,7 @@ zip_mount(uint8_t id, char *fn, uint8_t wp) void zip_reload(uint8_t id) { - MediaMenu::ptr->zipReload(id); + MediaMenu::ptr->zipReloadPrev(id); } void @@ -1061,6 +1173,6 @@ mo_mount(uint8_t id, char *fn, uint8_t wp) void mo_reload(uint8_t id) { - MediaMenu::ptr->moReload(id); + MediaMenu::ptr->moReloadPrev(id); } } diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index 725ce92b3..aec2f553f 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -24,12 +24,14 @@ public: void cassetteNewImage(); void cassetteSelectImage(bool wp); void cassetteMount(const QString &filename, bool wp); + void cassetteMenuSelect(int slot); void cassetteEject(); void cassetteUpdateMenu(); void cartridgeSelectImage(int i); void cartridgeMount(int i, const QString &filename); void cartridgeEject(int i); + void cartridgeMenuSelect(int index, int slot); void cartridgeUpdateMenu(int i); void floppyNewImage(int i); @@ -53,14 +55,16 @@ public: void zipSelectImage(int i, bool wp); void zipMount(int i, const QString &filename, bool wp); void zipEject(int i); - void zipReload(int i); + void zipReloadPrev(int i); + void zipReload(int index, int slot); void zipUpdateMenu(int i); void moNewImage(int i); void moSelectImage(int i, bool wp); void moMount(int i, const QString &filename, bool wp); void moEject(int i); - void moReload(int i); + void moReloadPrev(int i); + void moReload(int index, int slot); void moUpdateMenu(int i); void nicConnect(int i); @@ -94,24 +98,28 @@ private: int cassetteRewindPos; int cassetteFastFwdPos; int cassetteEjectPos; + int cassetteImageHistoryPos[MAX_PREV_IMAGES]; int cartridgeEjectPos; + int cartridgeImageHistoryPos[MAX_PREV_IMAGES]; int floppyExportPos; int floppyEjectPos; + int floppyImageHistoryPos[MAX_PREV_IMAGES]; int cdromMutePos; int cdromReloadPos; int cdromImagePos; int cdromDirPos; int cdromImageHistoryPos[MAX_PREV_IMAGES]; - int floppyImageHistoryPos[MAX_PREV_IMAGES]; int zipEjectPos; int zipReloadPos; + int zipImageHistoryPos[MAX_PREV_IMAGES]; int moEjectPos; int moReloadPos; + int moImageHistoryPos[MAX_PREV_IMAGES]; int netDisconnPos; From 01267965ca1694862834da7cf5c125512bb70d5c Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 05:13:18 +0200 Subject: [PATCH 40/64] DEC Tulip: Fixed BIOS disabling. --- src/network/net_tulip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/network/net_tulip.c b/src/network/net_tulip.c index 060e11fba..ca43b0844 100644 --- a/src/network/net_tulip.c +++ b/src/network/net_tulip.c @@ -1638,7 +1638,7 @@ nic_init(const device_t *info) s->pci_conf[0x04] = 7; /* Enable our BIOS space in PCI, if needed. */ - if (s->bios_addr > 0) { + if (s->has_bios) { rom_init(&s->bios_rom, ROM_PATH_DEC21140, s->bios_addr, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); tulip_pci_bar[2].addr = 0xffff0000; } else From 690b9707391d8170ab7844b728b8c6ba517aba14 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 27 Aug 2024 16:36:32 +0200 Subject: [PATCH 41/64] Fixed a condition in write to CR0. --- src/cpu/x86_ops_mov_ctrl.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86_ops_mov_ctrl.h b/src/cpu/x86_ops_mov_ctrl.h index f6fcda983..c8ac9ab63 100644 --- a/src/cpu/x86_ops_mov_ctrl.h +++ b/src/cpu/x86_ops_mov_ctrl.h @@ -187,7 +187,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat) if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { - if (is_p6 && !cpu_use_dynarec) + if (is_p6 || cpu_use_dynarec) flushmmucache(); else cpu_flush_pending = 1; @@ -253,7 +253,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat) if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { - if (is_p6 && !cpu_use_dynarec) + if (is_p6 || cpu_use_dynarec) flushmmucache(); else cpu_flush_pending = 1; From d76ded5fbdf8dd4e650d11ef54fe478cefb96982 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 27 Aug 2024 15:10:32 -0300 Subject: [PATCH 42/64] Jenkins: Workaround for MacPorts wget dependency failing to build on Intel targets MacPorts issue referenced: https://trac.macports.org/ticket/69406 --- .ci/build.sh | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/.ci/build.sh b/.ci/build.sh index a53ea0671..ca77d7b83 100755 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -535,6 +535,14 @@ then sudo sed -i -e 's/-no-feature-vulkan/-feature-vulkan/g' "$qt5_portfile" sudo sed -i -e 's/configure.env-append MAKE=/configure.env-append VULKAN_SDK=${prefix} MAKE=/g' "$qt5_portfile" fi + + # Patch wget to remove libproxy support, as it depends on shared-mime-info which + # fails to build for a 10.14 target, which we have to do despite wget only being + # a host dependency. MacPorts issue 69406 strongly implies this will not be fixed. + wget_portfile="$macports/var/macports/sources/rsync.macports.org/macports/release/tarballs/ports/net/wget/Portfile" + sudo sed -i -e 's/--enable-libproxy/--disable-libproxy/g' "$wget_portfile" + sudo sed -i -e 's/port:libproxy//g' "$wget_portfile" + while : do # Attempt to install dependencies. From 47ee1c4ead68d9da607e6e3c8d30cd705a8badbe Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 27 Aug 2024 22:17:52 +0200 Subject: [PATCH 43/64] Some fixes to the Streams engine of the ViRGE/Trio3D Make sure the ViRGE GX2 and up (including the Trio3D/2X) use the secondary stream only per what was found in the past. --- src/video/vid_s3_virge.c | 259 +++++++++++++++++++++------------------ 1 file changed, 141 insertions(+), 118 deletions(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 66682b440..3719d2591 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -867,7 +867,7 @@ s3_virge_recalctimings(svga_t *svga) video_force_resize_set_monitor(1, svga->monitor_index); } - if (((svga->crtc[0x67] & 0xc) != 0xc) || (virge->chip >= S3_VIRGEGX2)) { /*VGA mode*/ + if ((svga->crtc[0x67] & 0xc) != 0xc) { /*VGA mode*/ svga->ma_latch |= (virge->ma_ext << 16); if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; @@ -898,7 +898,7 @@ s3_virge_recalctimings(svga_t *svga) case 24: svga->render = svga_render_24bpp_highres; if ((virge->chip != S3_VIRGEVX) && (virge->chip < S3_VIRGEGX2)) - svga->rowoffset = (svga->rowoffset * 3) / 4; /*Hack*/ + svga->rowoffset = (svga->rowoffset * 3) >> 2; /*Hack*/ break; case 32: svga->render = svga_render_32bpp_highres; @@ -910,37 +910,32 @@ s3_virge_recalctimings(svga_t *svga) svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && (svga->crtc[0x32] & 0x40)) ? 0x3ffff : virge->vram_mask; - - svga->overlay.ena = 0; - - if (virge->chip >= S3_VIRGEGX2 && (svga->crtc[0x67] & 0xc) == 0xc) { - /* ViRGE/GX2 and later does not use primary stream registers. */ - svga->overlay.x = virge->streams.sec_x; - svga->overlay.y = virge->streams.sec_y; - svga->overlay.cur_ysize = virge->streams.sec_h; - - if (virge->streams.buffer_ctrl & 2) - svga->overlay.addr = virge->streams.sec_fb1; - else - svga->overlay.addr = virge->streams.sec_fb0; - - svga->overlay.ena = (svga->overlay.x >= 0) && !!(virge->streams.blend_ctrl & 0x20); - svga->overlay.v_acc = virge->streams.dda_vert_accumulator; - svga->rowoffset = virge->streams.pri_stride >> 3; - svga->vram_display_mask = virge->vram_mask; - } } else { /*Streams mode*/ - if (virge->streams.buffer_ctrl & 1) - svga->ma_latch = virge->streams.pri_fb1 >> 2; - else - svga->ma_latch = virge->streams.pri_fb0 >> 2; + if (virge->chip < S3_VIRGEGX2) { + if (virge->streams.buffer_ctrl & 1) + svga->ma_latch = virge->streams.pri_fb1 >> 2; + else + svga->ma_latch = virge->streams.pri_fb0 >> 2; - svga->hdisp = virge->streams.pri_w + 1; - if (virge->streams.pri_h < svga->dispend) - svga->dispend = virge->streams.pri_h; + svga->hdisp = virge->streams.pri_w + 1; + if (virge->streams.pri_h < svga->dispend) + svga->dispend = virge->streams.pri_h; + + svga->overlay.x = virge->streams.sec_x - virge->streams.pri_x; + svga->overlay.y = virge->streams.sec_y - virge->streams.pri_y; + } else { + svga->ma_latch |= (virge->ma_ext << 16); + if (svga->crtc[0x51] & 0x30) + svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; + else if (svga->crtc[0x43] & 0x04) + svga->rowoffset |= 0x100; + if (!svga->rowoffset) + svga->rowoffset = 256; + + svga->overlay.x = virge->streams.sec_x; + svga->overlay.y = virge->streams.sec_y; + } - svga->overlay.x = virge->streams.sec_x - virge->streams.pri_x; - svga->overlay.y = virge->streams.sec_y - virge->streams.pri_y; svga->overlay.cur_ysize = virge->streams.sec_h; if (virge->streams.buffer_ctrl & 2) @@ -949,35 +944,60 @@ s3_virge_recalctimings(svga_t *svga) svga->overlay.addr = virge->streams.sec_fb0; svga->overlay.ena = (svga->overlay.x >= 0); + svga->overlay.h_acc = virge->streams.dda_horiz_accumulator; svga->overlay.v_acc = virge->streams.dda_vert_accumulator; - svga->rowoffset = virge->streams.pri_stride >> 3; + if (virge->chip < S3_VIRGEGX2) + svga->rowoffset = virge->streams.pri_stride >> 3; if (virge->chip <= S3_VIRGEDX && svga->overlay.ena) { svga->overlay.ena = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101); - } else if (virge->chip == S3_VIRGEGX2 && svga->overlay.ena) { + } else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.ena) { /* 0x20 = Secondary Stream enabled */ /* 0x2000 = Primary Stream enabled */ svga->overlay.ena = !!(virge->streams.blend_ctrl & 0x20); } - switch ((virge->streams.pri_ctrl >> 24) & 0x7) { - case 0: /*RGB-8 (CLUT)*/ - svga->render = svga_render_8bpp_highres; - break; - case 3: /*KRGB-16 (1.5.5.5)*/ - svga->render = svga_render_15bpp_highres; - break; - case 5: /*RGB-16 (5.6.5)*/ - svga->render = svga_render_16bpp_highres; - break; - case 6: /*RGB-24 (8.8.8)*/ - svga->render = svga_render_24bpp_highres; - break; - case 7: /*XRGB-32 (X.8.8.8)*/ - svga->render = svga_render_32bpp_highres; - break; + if (virge->chip >= S3_VIRGEGX2) { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + break; + case 16: + svga->render = svga_render_16bpp_highres; + break; + case 24: + svga->render = svga_render_24bpp_highres; + break; + case 32: + svga->render = svga_render_32bpp_highres; + break; + + default: + break; + } + } else { + switch ((virge->streams.pri_ctrl >> 24) & 0x7) { + case 0: /*RGB-8 (CLUT)*/ + svga->render = svga_render_8bpp_highres; + break; + case 3: /*KRGB-16 (1.5.5.5)*/ + svga->render = svga_render_15bpp_highres; + break; + case 5: /*RGB-16 (5.6.5)*/ + svga->render = svga_render_16bpp_highres; + break; + case 6: /*RGB-24 (8.8.8)*/ + svga->render = svga_render_24bpp_highres; + break; + case 7: /*XRGB-32 (X.8.8.8)*/ + svga->render = svga_render_32bpp_highres; + break; + } } svga->vram_display_mask = virge->vram_mask; } @@ -990,29 +1010,6 @@ s3_virge_recalctimings(svga_t *svga) svga->render = svga_render_2bpp_s3_highres; } -static void -s3_virge_update_buffer(virge_t *virge) -{ - svga_t *svga = &virge->svga; - - if ((svga->crtc[0x67] & 0xc) != 0xc) - return; - - if (virge->chip < S3_VIRGEGX2) { - if (virge->streams.buffer_ctrl & 1) - svga->ma_latch = virge->streams.pri_fb1 >> 2; - else - svga->ma_latch = virge->streams.pri_fb0 >> 2; - } - - if (virge->streams.buffer_ctrl & 2) - svga->overlay.addr = virge->streams.sec_fb1; - else - svga->overlay.addr = virge->streams.sec_fb0; - - svga->rowoffset = virge->streams.pri_stride >> 3; -} - static void s3_virge_updatemapping(virge_t *virge) { svga_t *svga = &virge->svga; @@ -1844,39 +1841,46 @@ s3_virge_queue(virge_t *virge, uint32_t addr, uint32_t val, uint32_t type) } static void -s3_virge_mmio_write(uint32_t addr, uint8_t val, void *priv) { +s3_virge_mmio_write(uint32_t addr, uint8_t val, void *priv) +{ virge_t *virge = (virge_t *) priv; if ((addr & 0xffff) < 0x8000) s3_virge_queue(virge, addr, val, FIFO_WRITE_BYTE); - else switch (addr & 0xffff) { - case 0x83b0 ... 0x83df: - s3_virge_out(addr & 0x3ff, val, priv); - break; + else { + switch (addr & 0xffff) { + default: + case 0x83b0 ... 0x83df: + s3_virge_out(addr & 0x3ff, val, priv); + break; - case 0xff20: - virge->serialport = val; - i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); - break; + case 0xff20: + virge->serialport = val; + i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); + break; + } } } static void -s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv) { +s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv) +{ virge_t *virge = (virge_t *) priv; if ((addr & 0xfffe) < 0x8000) s3_virge_queue(virge, addr, val, FIFO_WRITE_WORD); - else switch (addr & 0xfffe) { - default: - case 0x83d4: - s3_virge_mmio_write(addr, val, priv); - s3_virge_mmio_write(addr + 1, val >> 8, priv); - break; + else { + switch (addr & 0xfffe) { + default: + case 0x83d4: + s3_virge_mmio_write(addr, val, priv); + s3_virge_mmio_write(addr + 1, val >> 8, priv); + break; - case 0xff20: - s3_virge_mmio_write(addr, val, priv); - break; + case 0xff20: + s3_virge_mmio_write(addr, val, priv); + break; + } } } @@ -1902,8 +1906,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { case 0x8190: virge->streams.sec_ctrl = val; virge->streams.dda_horiz_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_horiz_accumulator |= 0xfffff800; + if (val & 0x1000) + virge->streams.dda_horiz_accumulator |= ~0xfff; + virge->streams.sdif = (val >> 24) & 7; break; case 0x8194: @@ -1912,50 +1917,56 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { case 0x8198: virge->streams.sec_filter = val; virge->streams.k1_horiz_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_horiz_scale |= 0xfffff800; + if (val & 0x800) + virge->streams.k1_horiz_scale |= ~0x7ff; + virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; - if ((val >> 16) & (1 << 10)) - virge->streams.k2_horiz_scale |= 0xfffff800; + if ((val >> 16) & 0x800) + virge->streams.k2_horiz_scale |= ~0x7ff; + + svga_recalctimings(svga); + svga->fullchange = changeframecount; break; case 0x81a0: virge->streams.blend_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; break; case 0x81c0: virge->streams.pri_fb0 = val & ((virge->memory_size == 8) ? (val & 0x7fffff) : (val & 0x3fffff)); - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81c4: virge->streams.pri_fb1 = ((virge->memory_size == 8) ? (val & 0x7fffff) : (val & 0x3fffff)); - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81c8: virge->streams.pri_stride = val & 0xfff; - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81cc: virge->streams.buffer_ctrl = val; - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81d0: virge->streams.sec_fb0 = val; - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81d4: virge->streams.sec_fb1 = val; - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81d8: virge->streams.sec_stride = val; - s3_virge_update_buffer(virge); + svga_recalctimings(svga); svga->fullchange = changeframecount; break; case 0x81dc: @@ -1963,18 +1974,21 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) { break; case 0x81e0: virge->streams.k1_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_vert_scale |= 0xfffff800; + if (val & 0x800) + virge->streams.k1_vert_scale |= ~0x7ff; break; case 0x81e4: virge->streams.k2_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k2_vert_scale |= 0xfffff800; + if (val & 0x800) + virge->streams.k2_vert_scale |= ~0x7ff; break; case 0x81e8: virge->streams.dda_vert_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_vert_accumulator |= 0xfffff800; + if (val & 0x1000) + virge->streams.dda_vert_accumulator |= ~0xfff; + + svga_recalctimings(svga); + svga->fullchange = changeframecount; break; case 0x81ec: virge->streams.fifo_ctrl = val; @@ -3968,10 +3982,10 @@ static void s3_virge_hwcursor_draw(svga_t *svga, int displine) { } while (0) static void -s3_virge_overlay_draw(svga_t *svga, int displine) { +s3_virge_overlay_draw(svga_t *svga, int displine) +{ virge_t *virge = (virge_t *) svga->priv; - int offset = (virge->streams.sec_x - virge->streams.pri_x) + 1; - int h_acc = virge->streams.dda_horiz_accumulator; + int offset; int r[8]; int g[8]; int b[8]; @@ -3982,11 +3996,19 @@ s3_virge_overlay_draw(svga_t *svga, int displine) { uint32_t *p; uint8_t *src = &svga->vram[svga->overlay_latch.addr]; + if (virge->chip < S3_VIRGEGX2) + offset = (virge->streams.sec_x - virge->streams.pri_x) + 1; + else + offset = virge->streams.sec_x + 1; + p = &((uint32_t *)buffer32->line[displine])[offset + svga->x_add]; - if ((offset + virge->streams.sec_w) > virge->streams.pri_w) - x_size = (virge->streams.pri_w - virge->streams.sec_x) + 1; - else + if (virge->chip < S3_VIRGEGX2) { + if ((offset + virge->streams.sec_w) > virge->streams.pri_w) + x_size = (virge->streams.pri_w - virge->streams.sec_x) + 1; + else + x_size = virge->streams.sec_w + 1; + } else x_size = virge->streams.sec_w + 1; OVERLAY_SAMPLE(); @@ -3994,13 +4016,14 @@ s3_virge_overlay_draw(svga_t *svga, int displine) { for (x = 0; x < x_size; x++) { *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); - h_acc += virge->streams.k1_horiz_scale; - if (h_acc >= 0) { + svga->overlay_latch.h_acc += virge->streams.k1_horiz_scale; + if (svga->overlay_latch.h_acc >= 0) { if ((x_read ^ (x_read + 1)) & ~3) OVERLAY_SAMPLE(); + x_read = (x_read + 1) & 7; - h_acc += (virge->streams.k2_horiz_scale - virge->streams.k1_horiz_scale); + svga->overlay_latch.h_acc += (virge->streams.k2_horiz_scale - virge->streams.k1_horiz_scale); } } From cf2a074dc0f1949e107c8f5b235000ef7309b01f Mon Sep 17 00:00:00 2001 From: Alexander Babikov Date: Tue, 27 Aug 2024 15:07:22 +0500 Subject: [PATCH 44/64] Fix SDL UI failing to build when C++11 threads are disabled --- CMakeLists.txt | 3 ++- src/CMakeLists.txt | 4 +--- src/qt/CMakeLists.txt | 4 ++++ src/thread.cpp | 12 ++++++------ 4 files changed, 13 insertions(+), 10 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 2d5a9dc1e..2766d4921 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -131,7 +131,6 @@ option(RTMIDI "RtMidi" option(FLUIDSYNTH "FluidSynth" ON) option(MUNT "MUNT" ON) option(VNC "VNC renderer" OFF) -option(CPPTHREADS "C++11 threads" ON) option(NEW_DYNAREC "Use the PCem v15 (\"new\") dynamic recompiler" OFF) option(MINITRACE "Enable Chrome tracing using the modified minitrace library" OFF) option(GDBSTUB "Enable GDB stub server for debugging" OFF) @@ -141,8 +140,10 @@ option(DEBUGREGS486 "Enable debug register opeartion on 486+ CPUs" if(WIN32) set(QT ON) + option(CPPTHREADS "C++11 threads" OFF) else() option(QT "Qt GUI" ON) + option(CPPTHREADS "C++11 threads" ON) endif() # Development branch features diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index ad339040f..0841fabdd 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -27,9 +27,7 @@ if(CMAKE_SYSTEM_NAME MATCHES "Linux") add_compile_definitions(_FILE_OFFSET_BITS=64 _LARGEFILE_SOURCE=1 _LARGEFILE64_SOURCE=1) endif() -if(WIN32) - target_sources(86Box PRIVATE qt/win_thread.c) -else() +if(CPPTHREADS) target_sources(86Box PRIVATE thread.cpp) endif() diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index b3e01c1b9..cf9420a4d 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -227,6 +227,10 @@ if(WIN32 AND NOT MINGW) target_sources(plat PRIVATE win_opendir.c) endif() +if(WIN32 AND NOT CPPTHREADS) + target_sources(plat PRIVATE win_thread.c) +endif() + if(WIN32) target_sources(plat PRIVATE win_serial_passthrough.c win_netsocket.c) else() diff --git a/src/thread.cpp b/src/thread.cpp index 079b80a3e..f2a0ceaf0 100644 --- a/src/thread.cpp +++ b/src/thread.cpp @@ -5,7 +5,7 @@ #include <86box/plat.h> #include <86box/thread.h> -struct event_cpp11_ex_t { +struct event_cpp11_t { std::condition_variable cond; std::mutex mutex; bool state = false; @@ -82,14 +82,14 @@ thread_close_mutex(mutex_t *_mutex) event_t * thread_create_event() { - auto ev = new event_cpp11_ex_t; + auto ev = new event_cpp11_t; return ev; } int thread_wait_event(event_t *handle, int timeout) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); auto lock = std::unique_lock(event->mutex); if (timeout < 0) { @@ -112,7 +112,7 @@ thread_wait_event(event_t *handle, int timeout) void thread_set_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); { auto lock = std::unique_lock(event->mutex); event->state = true; @@ -123,7 +123,7 @@ thread_set_event(event_t *handle) void thread_reset_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); auto lock = std::unique_lock(event->mutex); event->state = false; } @@ -131,7 +131,7 @@ thread_reset_event(event_t *handle) void thread_destroy_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); delete event; } } From 818c268f7529919f1775b9e06dc8693375c6c862 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 28 Aug 2024 20:21:47 +0200 Subject: [PATCH 45/64] S3 Vision x68: Fix PCI BAR to CRTC registers 59h/5Ah mask. --- src/video/vid_s3.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index cb5d2e41e..3f64d3b3a 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -9254,10 +9254,12 @@ s3_pci_read(UNUSED(int func), int addr, void *priv) return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x0d] & 0xf8) : 0x00; case 0x12: - return (s3->chip >= S3_TRIO64V) ? 0x00 : (svga->crtc[0x5a] & 0x80); + return ((s3->chip == S3_VISION868) || (s3->chip == S3_VISION968) || (s3->chip >= S3_TRIO64V)) ? 0x00 : + (svga->crtc[0x5a] & 0x80); case 0x13: - return (s3->chip >= S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : svga->crtc[0x59]; + return ((s3->chip == S3_VISION868) || (s3->chip == S3_VISION968) || (s3->chip >= S3_TRIO64V)) ? + (svga->crtc[0x59] & 0xfc) : svga->crtc[0x59]; case 0x30: return s3->has_bios ? (s3->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ From dd5c5f4a07d808728534cec2ed6b3552f24f4680 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Thu, 29 Aug 2024 00:51:28 +0200 Subject: [PATCH 46/64] More ViRGE fixes (August 29th, 2024) Apparently the extended sequencer registers (>= 0x20) are required to have sane values on the STREAMS engine on GX2 and probably other chips in the ViRGE range. --- src/video/vid_s3_virge.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 3719d2591..fea538864 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -471,7 +471,8 @@ s3_virge_update_irqs(virge_t *virge) { } static void -s3_virge_out(uint16_t addr, uint8_t val, void *priv) { +s3_virge_out(uint16_t addr, uint8_t val, void *priv) +{ virge_t *virge = (virge_t *) priv; svga_t * svga = &virge->svga; uint8_t old; @@ -483,7 +484,7 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) { switch (addr) { case 0x3c5: if (svga->seqaddr >= 0x10) { - svga->seqregs[svga->seqaddr & 0x1f] = val; + svga->seqregs[svga->seqaddr] = val; svga_recalctimings(svga); return; } @@ -519,8 +520,6 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) { return; if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5)) return; - if (svga->crtcreg >= 0x80) - return; old = svga->crtc[svga->crtcreg]; svga->crtc[svga->crtcreg] = val; @@ -707,7 +706,7 @@ s3_virge_in(uint16_t addr, void *priv) { case 0x3c5: if (svga->seqaddr >= 8) - ret = svga->seqregs[svga->seqaddr & 0x1f]; + ret = svga->seqregs[svga->seqaddr]; else if (svga->seqaddr <= 4) ret = svga_in(addr, svga); else From f19a5447be48435f4c952be5f96724a031b7ef52 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 29 Aug 2024 01:26:32 +0200 Subject: [PATCH 47/64] Improved the SCO Xenix fix, fixes OS/2 booting, fixes #4762. --- src/cpu/386_dynarec.c | 3 +-- src/cpu/x86_ops_mov_ctrl.h | 18 ++++++++---------- src/cpu/x86_ops_mov_ctrl_2386.h | 18 ++++++++---------- src/cpu/x86_ops_pmode.h | 21 ++++++--------------- src/include/86box/mem.h | 1 + src/mem/mem.c | 13 +++++++++++++ 6 files changed, 37 insertions(+), 37 deletions(-) diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index bf8b31600..590d6f5c7 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -937,8 +937,7 @@ exec386(int32_t cycs) cpu_flush_pending++; else if (cpu_flush_pending == 2) { cpu_flush_pending = 0; - cr0 ^= 0x80000000; - flushmmucache(); + flushmmucache_pc(); } #ifndef USE_NEW_DYNAREC diff --git a/src/cpu/x86_ops_mov_ctrl.h b/src/cpu/x86_ops_mov_ctrl.h index c8ac9ab63..f4241feb1 100644 --- a/src/cpu/x86_ops_mov_ctrl.h +++ b/src/cpu/x86_ops_mov_ctrl.h @@ -189,16 +189,15 @@ opMOV_CRx_r_a16(uint32_t fetchdat) else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { if (is_p6 || cpu_use_dynarec) flushmmucache(); - else + else { + flushmmucache_nopc(); cpu_flush_pending = 1; + } } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - if (!is_p6 && !cpu_use_dynarec && ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000)) - cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); - else - cr0 = cpu_state.regs[cpu_rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) @@ -255,16 +254,15 @@ opMOV_CRx_r_a32(uint32_t fetchdat) else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { if (is_p6 || cpu_use_dynarec) flushmmucache(); - else + else { + flushmmucache_nopc(); cpu_flush_pending = 1; + } } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - if (!is_p6 && !cpu_use_dynarec && ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000)) - cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); - else - cr0 = cpu_state.regs[cpu_rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) diff --git a/src/cpu/x86_ops_mov_ctrl_2386.h b/src/cpu/x86_ops_mov_ctrl_2386.h index 6b6db8c94..03a18caa7 100644 --- a/src/cpu/x86_ops_mov_ctrl_2386.h +++ b/src/cpu/x86_ops_mov_ctrl_2386.h @@ -182,15 +182,14 @@ opMOV_CRx_r_a16(uint32_t fetchdat) case 0: if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); - else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { + flushmmucache_nopc(); cpu_flush_pending = 1; + } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) - cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); - else - cr0 = cpu_state.regs[cpu_rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) @@ -244,15 +243,14 @@ opMOV_CRx_r_a32(uint32_t fetchdat) case 0: if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001) flushmmucache(); - else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) + else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) { + flushmmucache_nopc(); cpu_flush_pending = 1; + } /* Make sure CPL = 0 when switching from real mode to protected mode. */ if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01)) cpu_state.seg_cs.access &= 0x9f; - if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) - cr0 = (cr0 & 0x80000000) | (cpu_state.regs[cpu_rm].l & 0x7fffffff); - else - cr0 = cpu_state.regs[cpu_rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) diff --git a/src/cpu/x86_ops_pmode.h b/src/cpu/x86_ops_pmode.h index b68aaffbd..4f32b0e37 100644 --- a/src/cpu/x86_ops_pmode.h +++ b/src/cpu/x86_ops_pmode.h @@ -431,21 +431,12 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32) if (cpu_mod != 3) SEG_CHECK_WRITE(cpu_state.ea_seg); if (is386 && is32 && (cpu_mod == 3)) { - if (cpu_flush_pending) { - if (is486 || isibm486) - seteaw(cr0 ^ 0x80000000); - else if (is386 && !cpu_16bitbus) - seteaw((cr0 ^ 0x80000000) | /* 0x7FFFFF00 */ 0x7FFFFFE0); - else - seteaw((cr0 ^ 0x80000000) | 0x7FFFFFF0); - } else { - if (is486 || isibm486) - seteaw(cr0); - else if (is386 && !cpu_16bitbus) - seteaw(cr0 | /* 0x7FFFFF00 */ 0x7FFFFFE0); - else - seteaw(cr0 | 0x7FFFFFF0); - } + if (is486 || isibm486) + seteaw(cr0); + else if (is386 && !cpu_16bitbus) + seteaw(cr0 | /* 0x7FFFFF00 */ 0x7FFFFFE0); + else + seteaw(cr0 | 0x7FFFFFF0); } else { if (is486 || isibm486) seteaw(msw); diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index 3c0e0aee0..ad89e4b4f 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -446,6 +446,7 @@ extern void mem_flush_write_page(uint32_t addr, uint32_t virt); extern void mem_reset_page_blocks(void); extern void flushmmucache(void); +extern void flushmmucache_pc(void); extern void flushmmucache_nopc(void); extern void mem_debug_check_addr(uint32_t addr, int write); diff --git a/src/mem/mem.c b/src/mem/mem.c index ae6e4ae00..0b038d640 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -225,6 +225,19 @@ flushmmucache(void) #endif } +void +flushmmucache_pc(void) +{ + mmuflush++; + + pccache = (uint32_t) 0xffffffff; + pccache2 = (uint8_t *) 0xffffffff; + +#ifdef USE_DYNAREC + codegen_flush(); +#endif +} + void flushmmucache_nopc(void) { From d594f33cad81a41a69331a123c3d3edfe2649703 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 29 Aug 2024 01:31:09 +0200 Subject: [PATCH 48/64] Fix a minor bug in cpu/386.c. --- src/cpu/386.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index 50ed4fddb..8b612604d 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -308,8 +308,7 @@ exec386_2386(int32_t cycs) cpu_flush_pending++; else if (cpu_flush_pending == 2) { cpu_flush_pending = 0; - cr0 ^= 0x80000000; - flushmmucache(); + flushmmucache_pc(); } if (cpu_end_block_after_ins) From fb3b46f648a8dc37543784b66e3c5b6dfc996f6b Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 29 Aug 2024 01:57:22 +0200 Subject: [PATCH 49/64] Unbroke SCO Xenix on the 286/386 interpreter, this will do until the prefetch queue is finally implemented. --- src/cpu/386_common.h | 59 ++++++++++++++++++++++++++++++++++++---- src/cpu/cpu.c | 1 + src/cpu/cpu.h | 1 + src/cpu/x86.c | 1 + src/mem/mmu_2386.c | 65 +++++++++++++++++++++++++++----------------- 5 files changed, 97 insertions(+), 30 deletions(-) diff --git a/src/cpu/386_common.h b/src/cpu/386_common.h index 8ca89181c..ec40612ee 100644 --- a/src/cpu/386_common.h +++ b/src/cpu/386_common.h @@ -458,6 +458,7 @@ fastreadw_fetch(uint32_t a) { uint16_t ret; + cpu_old_paging = (cpu_flush_pending == 2); if ((a & 0xFFF) > 0xFFE) { ret = fastreadb(a); if (!cpu_state.abrt && (opcode_length[ret & 0xff] > 1)) @@ -469,6 +470,7 @@ fastreadw_fetch(uint32_t a) ret = readmemwl_2386(a); read_type = 4; } + cpu_old_paging = 0; return ret; } @@ -486,7 +488,9 @@ fastreadl_fetch(uint32_t a) ret = 0; else { read_type = 1; + cpu_old_paging = (cpu_flush_pending == 2); ret = readmemll_2386(a); + cpu_old_paging = 0; read_type = 4; } @@ -563,35 +567,52 @@ fastreadl_fetch(uint32_t a) } #endif +#ifdef OPS_286_386 static __inline uint8_t getbyte(void) { + uint8_t ret; cpu_state.pc++; - return fastreadb(cs + (cpu_state.pc - 1)); + cpu_old_paging = (cpu_flush_pending == 2); + ret = fastreadb(cs + (cpu_state.pc - 1)); + cpu_old_paging = 0; + return ret; + } static __inline uint16_t getword(void) { + uint16_t ret; cpu_state.pc += 2; - return fastreadw(cs + (cpu_state.pc - 2)); + cpu_old_paging = (cpu_flush_pending == 2); + ret = fastreadw(cs + (cpu_state.pc - 2)); + cpu_old_paging = 0; + return ret; } static __inline uint32_t getlong(void) { + uint32_t ret; cpu_state.pc += 4; - return fastreadl(cs + (cpu_state.pc - 4)); + cpu_old_paging = (cpu_flush_pending == 2); + ret = fastreadl(cs + (cpu_state.pc - 4)); + cpu_old_paging = 0; + return ret; } static __inline uint64_t getquad(void) { + uint64_t ret; cpu_state.pc += 8; - return fastreadl(cs + (cpu_state.pc - 8)) | ((uint64_t) fastreadl(cs + (cpu_state.pc - 4)) << 32); + cpu_old_paging = (cpu_flush_pending == 2); + ret = fastreadl(cs + (cpu_state.pc - 8)) | ((uint64_t) fastreadl(cs + (cpu_state.pc - 4)) << 32); + cpu_old_paging = 0; + return ret; } -#ifdef OPS_286_386 static __inline uint8_t geteab(void) { @@ -678,6 +699,34 @@ seteaq(uint64_t v) # define seteaw_mem(v) writememwl_2386(easeg + cpu_state.eaaddr, v); # define seteal_mem(v) writememll_2386(easeg + cpu_state.eaaddr, v); #else +static __inline uint8_t +getbyte(void) +{ + cpu_state.pc++; + return fastreadb(cs + (cpu_state.pc - 1)); +} + +static __inline uint16_t +getword(void) +{ + cpu_state.pc += 2; + return fastreadw(cs + (cpu_state.pc - 2)); +} + +static __inline uint32_t +getlong(void) +{ + cpu_state.pc += 4; + return fastreadl(cs + (cpu_state.pc - 4)); +} + +static __inline uint64_t +getquad(void) +{ + cpu_state.pc += 8; + return fastreadl(cs + (cpu_state.pc - 8)) | ((uint64_t) fastreadl(cs + (cpu_state.pc - 4)) << 32); +} + static __inline uint8_t geteab(void) { diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index bbada4958..438e12d5c 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -183,6 +183,7 @@ int cpu_waitstates; int cpu_cache_int_enabled; int cpu_cache_ext_enabled; int cpu_flush_pending; +int cpu_old_paging; int cpu_isa_speed; int cpu_pci_speed; int cpu_isa_pci_div; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index cdb4e54b6..d96d7951d 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -617,6 +617,7 @@ extern int cpu_mem_prefetch_cycles; extern int cpu_rom_prefetch_cycles; extern int cpu_waitstates; extern int cpu_flush_pending; +extern int cpu_old_paging; extern int cpu_cache_int_enabled; extern int cpu_cache_ext_enabled; extern int cpu_isa_speed; diff --git a/src/cpu/x86.c b/src/cpu/x86.c index d70f8f61c..5eb16b98f 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -326,6 +326,7 @@ reset_common(int hard) codegen_reset(); #endif cpu_flush_pending = 0; + cpu_old_paging = 0; if (!hard) flushmmucache(); x86_was_reset = 1; diff --git a/src/mem/mmu_2386.c b/src/mem/mmu_2386.c index abc34ff96..43bdd4602 100644 --- a/src/mem/mmu_2386.c +++ b/src/mem/mmu_2386.c @@ -278,6 +278,7 @@ readmembl_2386(uint32_t addr) { mem_mapping_t *map; uint64_t a; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 1); @@ -287,7 +288,7 @@ readmembl_2386(uint32_t addr) high_page = 0; - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_read_2386(addr); addr64 = (uint32_t) a; @@ -308,6 +309,7 @@ writemembl_2386(uint32_t addr, uint8_t val) { mem_mapping_t *map; uint64_t a; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; mem_debug_check_addr(addr, 2); GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 1); @@ -317,7 +319,7 @@ writemembl_2386(uint32_t addr, uint8_t val) high_page = 0; - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_write_2386(addr); addr64 = (uint32_t) a; @@ -336,12 +338,13 @@ uint8_t readmembl_no_mmut_2386(uint32_t addr, uint32_t a64) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 1); mem_logical_addr = addr; - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return 0xff; @@ -361,12 +364,13 @@ void writemembl_no_mmut_2386(uint32_t addr, uint32_t a64, uint8_t val) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 1); mem_logical_addr = addr; - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return; @@ -384,6 +388,7 @@ readmemwl_2386(uint32_t addr) { mem_mapping_t *map; uint64_t a; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; addr64a[0] = addr; addr64a[1] = addr + 1; @@ -399,7 +404,7 @@ readmemwl_2386(uint32_t addr) if (!cpu_cyrix_alignment || (addr & 7) == 7) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (uint8_t i = 0; i < 2; i++) { a = mmutranslate_read_2386(addr + i); addr64a[i] = (uint32_t) a; @@ -414,7 +419,7 @@ readmemwl_2386(uint32_t addr) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_read_2386(addr); addr64a[0] = (uint32_t) a; @@ -442,6 +447,7 @@ writememwl_2386(uint32_t addr, uint16_t val) { mem_mapping_t *map; uint64_t a; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; addr64a[0] = addr; addr64a[1] = addr + 1; @@ -457,7 +463,7 @@ writememwl_2386(uint32_t addr, uint16_t val) if (!cpu_cyrix_alignment || (addr & 7) == 7) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (uint8_t i = 0; i < 2; i++) { /* Do not translate a page that has a valid lookup, as that is by definition valid and the whole purpose of the lookup is to avoid repeat identical translations. */ @@ -479,7 +485,7 @@ writememwl_2386(uint32_t addr, uint16_t val) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_write_2386(addr); addr64a[0] = (uint32_t) a; @@ -508,6 +514,7 @@ uint16_t readmemwl_no_mmut_2386(uint32_t addr, uint32_t *a64) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 2); @@ -517,7 +524,7 @@ readmemwl_no_mmut_2386(uint32_t addr, uint32_t *a64) if (!cpu_cyrix_alignment || (addr & 7) == 7) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return 0xffff; } @@ -527,7 +534,7 @@ readmemwl_no_mmut_2386(uint32_t addr, uint32_t *a64) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return 0xffff; @@ -552,6 +559,7 @@ void writememwl_no_mmut_2386(uint32_t addr, uint32_t *a64, uint16_t val) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 2); @@ -561,7 +569,7 @@ writememwl_no_mmut_2386(uint32_t addr, uint32_t *a64, uint16_t val) if (!cpu_cyrix_alignment || (addr & 7) == 7) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return; } @@ -572,7 +580,7 @@ writememwl_no_mmut_2386(uint32_t addr, uint32_t *a64, uint16_t val) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return; @@ -600,6 +608,7 @@ readmemll_2386(uint32_t addr) mem_mapping_t *map; int i; uint64_t a = 0x0000000000000000ULL; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; for (i = 0; i < 4; i++) { addr64a[i] = (uint64_t) (addr + i); @@ -615,7 +624,7 @@ readmemll_2386(uint32_t addr) if ((addr & 3) && (!cpu_cyrix_alignment || (addr & 7) > 4)) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (i = 0; i < 4; i++) { if (i == 0) { a = mmutranslate_read_2386(addr + i); @@ -644,7 +653,7 @@ readmemll_2386(uint32_t addr) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_read_2386(addr); addr64a[0] = (uint32_t) a; @@ -674,6 +683,7 @@ writememll_2386(uint32_t addr, uint32_t val) mem_mapping_t *map; int i; uint64_t a = 0x0000000000000000ULL; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; for (i = 0; i < 4; i++) { addr64a[i] = (uint64_t) (addr + i); @@ -689,7 +699,7 @@ writememll_2386(uint32_t addr, uint32_t val) if ((addr & 3) && (!cpu_cyrix_alignment || (addr & 7) > 4)) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (i = 0; i < 4; i++) { /* Do not translate a page that has a valid lookup, as that is by definition valid and the whole purpose of the lookup is to avoid repeat identical translations. */ @@ -723,7 +733,7 @@ writememll_2386(uint32_t addr, uint32_t val) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_write_2386(addr); addr64a[0] = (uint32_t) a; @@ -758,6 +768,7 @@ uint32_t readmemll_no_mmut_2386(uint32_t addr, uint32_t *a64) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 4); @@ -767,7 +778,7 @@ readmemll_no_mmut_2386(uint32_t addr, uint32_t *a64) if ((addr & 3) && (!cpu_cyrix_alignment || (addr & 7) > 4)) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return 0xffffffff; } @@ -777,7 +788,7 @@ readmemll_no_mmut_2386(uint32_t addr, uint32_t *a64) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return 0xffffffff; @@ -804,6 +815,7 @@ void writememll_no_mmut_2386(uint32_t addr, uint32_t *a64, uint32_t val) { mem_mapping_t *map; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 4); @@ -813,7 +825,7 @@ writememll_no_mmut_2386(uint32_t addr, uint32_t *a64, uint32_t val) if ((addr & 3) && (!cpu_cyrix_alignment || (addr & 7) > 4)) cycles -= timing_misaligned; if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return; } @@ -824,7 +836,7 @@ writememll_no_mmut_2386(uint32_t addr, uint32_t *a64, uint32_t val) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { if (cpu_state.abrt || high_page) return; @@ -858,6 +870,7 @@ readmemql_2386(uint32_t addr) mem_mapping_t *map; int i; uint64_t a = 0x0000000000000000ULL; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; for (i = 0; i < 8; i++) { addr64a[i] = (uint64_t) (addr + i); @@ -872,7 +885,7 @@ readmemql_2386(uint32_t addr) if (addr & 7) { cycles -= timing_misaligned; if ((addr & 0xfff) > 0xff8) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (i = 0; i < 8; i++) { if (i == 0) { a = mmutranslate_read_2386(addr + i); @@ -901,7 +914,7 @@ readmemql_2386(uint32_t addr) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { a = mmutranslate_read_2386(addr); addr64a[0] = (uint32_t) a; @@ -924,6 +937,7 @@ writememql_2386(uint32_t addr, uint64_t val) mem_mapping_t *map; int i; uint64_t a = 0x0000000000000000ULL; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; for (i = 0; i < 8; i++) { addr64a[i] = (uint64_t) (addr + i); @@ -938,7 +952,7 @@ writememql_2386(uint32_t addr, uint64_t val) if (addr & 7) { cycles -= timing_misaligned; if ((addr & 0xfff) > 0xff8) { - if (cr0 >> 31) { + if (temp_cr0 >> 31) { for (i = 0; i < 8; i++) { /* Do not translate a page that has a valid lookup, as that is by definition valid and the whole purpose of the lookup is to avoid repeat identical translations. */ @@ -972,7 +986,7 @@ writememql_2386(uint32_t addr, uint64_t val) } } - if (cr0 >> 31) { + if (temp_cr0 >> 31) { addr64a[0] = mmutranslate_write_2386(addr); if (addr64a[0] > 0xffffffffULL) return; @@ -1013,13 +1027,14 @@ do_mmutranslate_2386(uint32_t addr, uint32_t *a64, int num, int write) int i; uint32_t last_addr = addr + (num - 1); uint64_t a = 0x0000000000000000ULL; + uint32_t temp_cr0 = cpu_old_paging ? (cr0 ^ 0x80000000) : cr0; mem_debug_check_addr(addr, write ? 2 : read_type); for (i = 0; i < num; i++) a64[i] = (uint64_t) addr; - if (!(cr0 >> 31)) + if (!(temp_cr0 >> 31)) return; for (i = 0; i < num; i++) { From d5b0fd18aa6fc342317937959a2d8add9c2b162e Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 29 Aug 2024 05:52:12 +0200 Subject: [PATCH 50/64] CD-ROM disc changes without eject now insert one simulated empty drive state, fixes #4768. --- src/scsi/scsi_cdrom.c | 79 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 76 insertions(+), 3 deletions(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index be9809e08..529f2b4d2 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1546,7 +1546,7 @@ scsi_cdrom_insert(void *priv) if (!dev) return; - dev->unit_attention = 1; + dev->unit_attention = 0x11; /* Turn off the medium changed status. */ dev->drv->cd_status &= ~CD_STATUS_MEDIUM_CHANGED; scsi_cdrom_log("CD-ROM %i: Media insert\n", dev->id); @@ -1598,6 +1598,13 @@ scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) ready = (dev->drv->cd_status != CD_STATUS_EMPTY) || (ext_medium_changed == -1); + /* Transition, pretend we're not ready for one check so that + Windows XP can recognize a medium change. */ + if (dev->unit_attention & 0x10) { + ready = 0; + goto skip_ua_check; + } + skip_ready_check: /* If the drive is not ready, there is no reason to keep the UNIT ATTENTION condition present, as we only use it to mark @@ -1624,6 +1631,7 @@ skip_ready_check: } } +skip_ua_check: /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) @@ -1711,7 +1719,8 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt buffer[2] = SENSE_ILLEGAL_REQUEST; buffer[12] = ASC_AUDIO_PLAY_OPERATION; buffer[13] = (dev->drv->cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED; - } else if (dev->unit_attention && (scsi_cdrom_sense_key == 0)) { + } else if (dev->unit_attention && !(dev->unit_attention & 0x10) && + ((scsi_cdrom_sense_key == 0) || (scsi_cdrom_sense_key == 2))) { buffer[2] = SENSE_UNIT_ATTENTION; buffer[12] = ASC_MEDIUM_MAY_HAVE_CHANGED; buffer[13] = 0; @@ -1719,6 +1728,9 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt scsi_cdrom_log("CD-ROM %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); + if (dev->unit_attention & 0x10) + dev->unit_attention &= 0x0f; + if (buffer[2] == SENSE_UNIT_ATTENTION) { /* If the last remaining sense is unit attention, clear that condition. */ @@ -2338,7 +2350,9 @@ begin: max_len = (cdb[7] << 8) | cdb[8]; /* only feature 0 is supported */ - if ((cdb[2] != 0) || (cdb[3] > 2)) { + if ((feature > 3) && (feature != 0x010) && + (feature != 0x1d) && (feature != 0x01e) && + (feature != 0x01f) && (feature != 0x103)) { scsi_cdrom_invalid_field(dev); scsi_cdrom_buf_free(dev); return; @@ -2413,6 +2427,65 @@ begin: alloc_length += 8; b += 8; } + if ((feature == 3) || ((cdb[1] & 3) < 2)) { + b[1] = 2; + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 4; + + b[4] = 0x1d; + + alloc_length += 8; + b += 8; + } + if ((feature == 0x10) || ((cdb[1] & 3) < 2)) { + b[1] = 0x10; + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 8; + + b[6] = 8; + b[9] = 0x10; + + alloc_length += 12; + b += 12; + } + if ((feature == 0x1d) || ((cdb[1] & 3) < 2)) { + b[1] = 0x1d; + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 0; + + alloc_length += 4; + b += 4; + } + if ((feature == 0x1e) || ((cdb[1] & 3) < 2)) { + b[1] = 0x1e; + b[2] = (2 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 4; + + b[4] = 0; + + alloc_length += 8; + b += 8; + } + if ((feature == 0x1f) || ((cdb[1] & 3) < 2)) { + b[1] = 0x1f; + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 0; + + alloc_length += 4; + b += 4; + } + if ((feature == 0x103) || ((cdb[1] & 3) < 2)) { + b[0] = 1; + b[1] = 3; + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 0; + + b[4] = 7; + b[6] = 1; + + alloc_length += 8; + b += 8; + } dev->buffer[0] = ((alloc_length - 4) >> 24) & 0xff; dev->buffer[1] = ((alloc_length - 4) >> 16) & 0xff; From dd2bbf3cd36be513aa49c4e6589015118243c13b Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 29 Aug 2024 20:47:44 +0200 Subject: [PATCH 51/64] CD-ROM: Make sure the initial unit attention condition is not treated as an inserted empty drive phase. --- src/scsi/scsi_cdrom.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index 529f2b4d2..2645659c7 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1600,7 +1600,7 @@ scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) /* Transition, pretend we're not ready for one check so that Windows XP can recognize a medium change. */ - if (dev->unit_attention & 0x10) { + if ((dev->unit_attention & 0xf0) == 0x10) { ready = 0; goto skip_ua_check; } @@ -1719,7 +1719,7 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt buffer[2] = SENSE_ILLEGAL_REQUEST; buffer[12] = ASC_AUDIO_PLAY_OPERATION; buffer[13] = (dev->drv->cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED; - } else if (dev->unit_attention && !(dev->unit_attention & 0x10) && + } else if (dev->unit_attention && ((dev->unit_attention & 0xf0) != 0x10) && ((scsi_cdrom_sense_key == 0) || (scsi_cdrom_sense_key == 2))) { buffer[2] = SENSE_UNIT_ATTENTION; buffer[12] = ASC_MEDIUM_MAY_HAVE_CHANGED; @@ -1728,7 +1728,7 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt scsi_cdrom_log("CD-ROM %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); - if (dev->unit_attention & 0x10) + if ((dev->unit_attention & 0xf0) == 0x10) dev->unit_attention &= 0x0f; if (buffer[2] == SENSE_UNIT_ATTENTION) { From 252c3034af521c618d321a39f4ea55e053abaf43 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 00:57:18 +0200 Subject: [PATCH 52/64] Reworked the unit attention workaround, fixes #4770. --- src/scsi/scsi_cdrom.c | 96 ++++++++++++++++++++++--------------------- 1 file changed, 50 insertions(+), 46 deletions(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index 2645659c7..e9abdd0d1 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1182,7 +1182,7 @@ scsi_cdrom_cmd_error(scsi_cdrom_t *dev) { scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); dev->tf->error = ((scsi_cdrom_sense_key & 0xf) << 4) | ABRT_ERR; - if (dev->unit_attention) + if (dev->unit_attention > 2) dev->tf->error |= MCR_ERR; dev->tf->status = READY_STAT | ERR_STAT; dev->tf->phase = 3; @@ -1199,7 +1199,7 @@ scsi_cdrom_unit_attention(scsi_cdrom_t *dev) { scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); dev->tf->error = (SENSE_UNIT_ATTENTION << 4) | ABRT_ERR; - if (dev->unit_attention) + if (dev->unit_attention > 2) dev->tf->error |= MCR_ERR; dev->tf->status = READY_STAT | ERR_STAT; dev->tf->phase = 3; @@ -1546,12 +1546,40 @@ scsi_cdrom_insert(void *priv) if (!dev) return; - dev->unit_attention = 0x11; + dev->unit_attention = 1; /* Turn off the medium changed status. */ dev->drv->cd_status &= ~CD_STATUS_MEDIUM_CHANGED; scsi_cdrom_log("CD-ROM %i: Media insert\n", dev->id); } +static int +scsi_command_check_ready(scsi_cdrom_t *dev, uint8_t *cdb) +{ + int ret = 0; + + if (scsi_cdrom_command_flags[cdb[0]] & CHECK_READY) { + /*Note by TC1995: Some vendor commands from X vendor don't really check for ready status + but they do on Y vendor. Quite confusing I know.*/ + if (scsi_cdrom_command_flags[cdb[0]] & SCSI_ONLY) switch (dev->drv->type) { + default: + ret = 1; + break; + case CDROM_TYPE_DEC_RRD45_0436: + case CDROM_TYPE_SONY_CDU541_10i: + case CDROM_TYPE_SONY_CDU561_18k: + case CDROM_TYPE_SONY_CDU76S_100: + case CDROM_TYPE_TEXEL_DMXX24_100: + if (cdb[0] == 0xC0) + break; + ret = 1; + break; + } else + ret = 1; + } + + return ret; +} + static int scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) { @@ -1598,23 +1626,24 @@ scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) ready = (dev->drv->cd_status != CD_STATUS_EMPTY) || (ext_medium_changed == -1); - /* Transition, pretend we're not ready for one check so that - Windows XP can recognize a medium change. */ - if ((dev->unit_attention & 0xf0) == 0x10) { - ready = 0; - goto skip_ua_check; - } - skip_ready_check: /* If the drive is not ready, there is no reason to keep the UNIT ATTENTION condition present, as we only use it to mark disc changes. */ - if (!ready && dev->unit_attention) + if (!ready && (dev->unit_attention > 2)) dev->unit_attention = 0; /* If the UNIT ATTENTION condition is set and the command does not allow execution under it, error out and report the condition. */ - if (dev->unit_attention == 1) { + if ((dev->unit_attention > 0) && (dev->unit_attention < 3)) { + dev->media_status = MEC_MEDIA_REMOVAL; + if (scsi_command_check_ready(dev, cdb)) { + dev->unit_attention++; + scsi_cdrom_log("CD-ROM %i: Simulated not ready phase (%02X)\n", dev->id, cdb[0]); + scsi_cdrom_not_ready(dev); + return 0; + } + } else if (dev->unit_attention == 3) { /* Only increment the unit attention phase if the command can not pass through it. */ if (!(scsi_cdrom_command_flags[cdb[0]] & ALLOW_UA)) { /* scsi_cdrom_log("CD-ROM %i: Unit attention now 2\n", dev->id); */ @@ -1624,53 +1653,31 @@ skip_ready_check: scsi_cdrom_unit_attention(dev); return 0; } - } else if (dev->unit_attention == 2) { + } else if (dev->unit_attention == 4) { if (cdb[0] != GPCMD_REQUEST_SENSE) { /* scsi_cdrom_log("CD-ROM %i: Unit attention now 0\n", dev->id); */ dev->unit_attention = 0; } } -skip_ua_check: /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) scsi_cdrom_sense_clear(dev, cdb[0]); /* Next it's time for NOT READY. */ - if (!ready) + if (!ready || ((dev->unit_attention > 0) && (dev->unit_attention < 3))) dev->media_status = MEC_MEDIA_REMOVAL; else - dev->media_status = (dev->unit_attention) ? MEC_NEW_MEDIA : MEC_NO_CHANGE; + dev->media_status = (dev->unit_attention > 2) ? MEC_NEW_MEDIA : MEC_NO_CHANGE; - if ((scsi_cdrom_command_flags[cdb[0]] & CHECK_READY) && !ready) { - if (scsi_cdrom_command_flags[cdb[0]] & SCSI_ONLY) { /*Note by TC1995: Some vendor commands from X vendor don't really check for ready status - but they do on Y vendor. Quite confusing I know.*/ - switch (dev->drv->type) { - case CDROM_TYPE_DEC_RRD45_0436: - case CDROM_TYPE_SONY_CDU541_10i: - case CDROM_TYPE_SONY_CDU561_18k: - case CDROM_TYPE_SONY_CDU76S_100: - case CDROM_TYPE_TEXEL_DMXX24_100: - if (cdb[0] == 0xC0) - break; - scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); - scsi_cdrom_not_ready(dev); - return 0; - default: - scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); - scsi_cdrom_not_ready(dev); - return 0; - } - } else { - scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); - scsi_cdrom_not_ready(dev); - return 0; - } + if (!ready && scsi_command_check_ready(dev, cdb)) { + scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); + scsi_cdrom_not_ready(dev); + return 0; } scsi_cdrom_log("CD-ROM %i: Continuing with command %02X\n", dev->id, cdb[0]); - return 1; } @@ -1719,7 +1726,7 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt buffer[2] = SENSE_ILLEGAL_REQUEST; buffer[12] = ASC_AUDIO_PLAY_OPERATION; buffer[13] = (dev->drv->cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED; - } else if (dev->unit_attention && ((dev->unit_attention & 0xf0) != 0x10) && + } else if ((dev->unit_attention > 2) && ((scsi_cdrom_sense_key == 0) || (scsi_cdrom_sense_key == 2))) { buffer[2] = SENSE_UNIT_ATTENTION; buffer[12] = ASC_MEDIUM_MAY_HAVE_CHANGED; @@ -1728,9 +1735,6 @@ scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_lengt scsi_cdrom_log("CD-ROM %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); - if ((dev->unit_attention & 0xf0) == 0x10) - dev->unit_attention &= 0x0f; - if (buffer[2] == SENSE_UNIT_ATTENTION) { /* If the last remaining sense is unit attention, clear that condition. */ @@ -1746,7 +1750,7 @@ scsi_cdrom_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t al if (dev->drv->cd_status & CD_STATUS_MEDIUM_CHANGED) scsi_cdrom_insert((void *) dev); - if ((dev->drv->cd_status == CD_STATUS_EMPTY) && dev->unit_attention) { + if ((dev->drv->cd_status == CD_STATUS_EMPTY) && (dev->unit_attention > 2)) { /* If the drive is not ready, there is no reason to keep the UNIT ATTENTION condition present, as we only use it to mark disc changes. */ From 3c209818ae0a0388b466c4e1966558c0ce302cda Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 05:18:34 +0200 Subject: [PATCH 53/64] P6: Fix the restoration of the A20 state when exiting SMM, fixes #4771. --- src/cpu/386_common.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 1d130cd8a..87d1008cc 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1016,9 +1016,14 @@ smram_restore_state_p6(uint32_t *saved_state) cpu_state.seg_gs.ar_high = (saved_state[SMRAM_FIELD_P6_GS_SELECTOR_AR] >> 24) & 0xff; smm_seg_load(&cpu_state.seg_gs); - mem_a20_alt = 0x00; - mem_a20_key = saved_state[SMRAM_FIELD_P6_A20M] ? 0x00 : 0x02; - mem_a20_recalc(); + rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF; + if (is6117) + rammask |= 0x3000000; + + if (saved_state[SMRAM_FIEL_P6_A20M] & 0x01) + rammask &= ~0xffefffff; + + flushmmucache(); if (SMM_REVISION_ID & SMM_SMBASE_RELOCATION) smbase = saved_state[SMRAM_FIELD_P6_SMBASE_OFFSET]; From db946015734df06f47f659088b7dada17ae22516 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 05:22:33 +0200 Subject: [PATCH 54/64] Voodoo 3/Banshee: Implement XRGB8888 LFB format, fixes POD. --- src/include/86box/vid_voodoo_regs.h | 1 + src/video/vid_voodoo_fb.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/src/include/86box/vid_voodoo_regs.h b/src/include/86box/vid_voodoo_regs.h index f05029a8d..379219d35 100644 --- a/src/include/86box/vid_voodoo_regs.h +++ b/src/include/86box/vid_voodoo_regs.h @@ -341,6 +341,7 @@ enum { LFB_FORMAT_RGB565 = 0, LFB_FORMAT_RGB555 = 1, LFB_FORMAT_ARGB1555 = 2, + LFB_FORMAT_XRGB8888 = 4, LFB_FORMAT_ARGB8888 = 5, LFB_FORMAT_DEPTH = 15, LFB_FORMAT_MASK = 15 diff --git a/src/video/vid_voodoo_fb.c b/src/video/vid_voodoo_fb.c index 94394e115..5156cfdad 100644 --- a/src/video/vid_voodoo_fb.c +++ b/src/video/vid_voodoo_fb.c @@ -364,6 +364,15 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *priv) addr >>= 1; break; + case LFB_FORMAT_XRGB8888: + colour_data[0].b = val & 0xff; + colour_data[0].g = (val >> 8) & 0xff; + colour_data[0].r = (val >> 16) & 0xff; + alpha_data[0] = 0xff; + write_mask = LFB_WRITE_COLOUR; + addr >>= 1; + break; + case LFB_FORMAT_DEPTH: depth_data[0] = val; depth_data[1] = val >> 16; From 54ab778d4a5130b64db323524a43560172973f48 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 05:32:26 +0200 Subject: [PATCH 55/64] Fixed a compile-breaking typo in cpu/386_common.c. --- src/cpu/386_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 87d1008cc..ea9cc1126 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1020,7 +1020,7 @@ smram_restore_state_p6(uint32_t *saved_state) if (is6117) rammask |= 0x3000000; - if (saved_state[SMRAM_FIEL_P6_A20M] & 0x01) + if (saved_state[SMRAM_FIELD_P6_A20M] & 0x01) rammask &= ~0xffefffff; flushmmucache(); From fe4ad0d4e16b50610821a295eba2f5b801ba685c Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 06:01:52 +0200 Subject: [PATCH 56/64] S3: Make sure to absolutely restore everything to the original state on reset, even the contents of vram and changedvram, fixes #4768. --- src/video/vid_s3.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 3f64d3b3a..6fe5f1ad6 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -9441,12 +9441,18 @@ s3_disable_handlers(s3_t *s3) { s3_io_remove(s3); + mem_mapping_set_addr(&s3->linear_mapping, 0, 0); mem_mapping_disable(&s3->linear_mapping); + mem_mapping_set_addr(&s3->mmio_mapping, 0, 0); mem_mapping_disable(&s3->mmio_mapping); + mem_mapping_set_addr(&s3->new_mmio_mapping, 0, 0); mem_mapping_disable(&s3->new_mmio_mapping); + mem_mapping_set_addr(&s3->svga.mapping, 0xa0000, 0x20000); mem_mapping_disable(&s3->svga.mapping); - if (s3->pci) + if (s3->pci) { + mem_mapping_set_addr(&s3->bios_rom.mapping, 0xc0000, 0x8000); mem_mapping_disable(&s3->bios_rom.mapping); + } /* Save all the mappings and the timers because they are part of linked lists. */ reset_state->linear_mapping = s3->linear_mapping; @@ -9457,6 +9463,11 @@ s3_disable_handlers(s3_t *s3) reset_state->svga.timer = s3->svga.timer; reset_state->svga.timer8514 = s3->svga.timer8514; + + memset(s3->svga.vram, 0x00, s3->svga.vram_max + 8); + memset(s3->svga.changedvram, 0x00, (s3->svga.vram_max >> 12) + 1); + + pci_clear_irq(s3->pci_slot, PCI_INTA, &s3->irq_state); } static void @@ -9471,6 +9482,7 @@ s3_reset(void *priv) reset_state->pci_slot = s3->pci_slot; *s3 = *reset_state; + s3_io_set(s3); } } From 91cf90c63a07cec0abff3ce3b1cc19a8f6ed180a Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 07:52:55 +0200 Subject: [PATCH 57/64] Olivetti M19's video adapter has control register on port 3DBh instead of 3DEh, fixes #4739. --- src/include/86box/vid_ogc.h | 1 + src/machine/m_xt_olivetti.c | 2 ++ src/video/vid_ogc.c | 13 +++++++++---- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/src/include/86box/vid_ogc.h b/src/include/86box/vid_ogc.h index 839769e69..efafb180e 100644 --- a/src/include/86box/vid_ogc.h +++ b/src/include/86box/vid_ogc.h @@ -23,6 +23,7 @@ typedef struct ogc_t { cga_t cga; + uint16_t ctrl_addr; /* unused in OGC, required for M19 video card structure idiom */ uint8_t ctrl_3dd; uint8_t ctrl_3de; diff --git a/src/machine/m_xt_olivetti.c b/src/machine/m_xt_olivetti.c index b13db6bf9..817b0d0cc 100644 --- a/src/machine/m_xt_olivetti.c +++ b/src/machine/m_xt_olivetti.c @@ -2038,6 +2038,8 @@ m19_vid_init(m19_vid_t *vid) vid->ogc.mono_display = 0; else vid->ogc.mono_display = 1; + + vid->ogc.ctrl_addr = 0x3db; /* OGC emulation part end */ /* Plantronics emulation part begin*/ diff --git a/src/video/vid_ogc.c b/src/video/vid_ogc.c index c3073898d..9ac94169c 100644 --- a/src/video/vid_ogc.c +++ b/src/video/vid_ogc.c @@ -97,11 +97,14 @@ ogc_out(uint16_t addr, uint8_t val, void *priv) cga_out(addr, val, &ogc->cga); break; + case 0x3db: case 0x3de: - /* set control register */ - ogc->ctrl_3de = val; - /* select 1st or 2nd 16k vram block to be used */ - ogc->base = (val & 0x08) ? 0x4000 : 0; + if (addr == ogc->ctrl_addr) { + /* set control register */ + ogc->ctrl_3de = val; + /* select 1st or 2nd 16k vram block to be used */ + ogc->base = (val & 0x08) ? 0x4000 : 0; + } break; default: @@ -622,6 +625,8 @@ ogc_init(UNUSED(const device_t *info)) else ogc->mono_display = 1; + ogc->ctrl_addr = 0x3de; + return ogc; } From 1d9603fa7ebeea5fe6bf76d622b635158244ff4d Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 17:44:47 +0200 Subject: [PATCH 58/64] Fixed a very stupid mistake made in cpu/386_common.c last night, fixes #4773. --- src/cpu/386_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index ea9cc1126..dcbe3608c 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1021,7 +1021,7 @@ smram_restore_state_p6(uint32_t *saved_state) rammask |= 0x3000000; if (saved_state[SMRAM_FIELD_P6_A20M] & 0x01) - rammask &= ~0xffefffff; + rammask &= 0xffefffff; flushmmucache(); From 6a5e9cdabab9d73828901b75522c37a92bb22604 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 19:35:24 +0200 Subject: [PATCH 59/64] Fixed the S3 reset fix, fixes Windows 98 stuck on black screen on the S3 Trio64 on some machines. --- src/video/vid_s3.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 6fe5f1ad6..27d4f023e 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -9441,18 +9441,12 @@ s3_disable_handlers(s3_t *s3) { s3_io_remove(s3); - mem_mapping_set_addr(&s3->linear_mapping, 0, 0); mem_mapping_disable(&s3->linear_mapping); - mem_mapping_set_addr(&s3->mmio_mapping, 0, 0); mem_mapping_disable(&s3->mmio_mapping); - mem_mapping_set_addr(&s3->new_mmio_mapping, 0, 0); mem_mapping_disable(&s3->new_mmio_mapping); - mem_mapping_set_addr(&s3->svga.mapping, 0xa0000, 0x20000); mem_mapping_disable(&s3->svga.mapping); - if (s3->pci) { - mem_mapping_set_addr(&s3->bios_rom.mapping, 0xc0000, 0x8000); + if (s3->pci) mem_mapping_disable(&s3->bios_rom.mapping); - } /* Save all the mappings and the timers because they are part of linked lists. */ reset_state->linear_mapping = s3->linear_mapping; @@ -9466,8 +9460,6 @@ s3_disable_handlers(s3_t *s3) memset(s3->svga.vram, 0x00, s3->svga.vram_max + 8); memset(s3->svga.changedvram, 0x00, (s3->svga.vram_max >> 12) + 1); - - pci_clear_irq(s3->pci_slot, PCI_INTA, &s3->irq_state); } static void @@ -9482,7 +9474,6 @@ s3_reset(void *priv) reset_state->pci_slot = s3->pci_slot; *s3 = *reset_state; - s3_io_set(s3); } } From 5fdd6263a23e5c14b0c3a00ce2baa2a28bc47060 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 19:47:22 +0200 Subject: [PATCH 60/64] FDC37x93x: Always return 0xFF on GPIO reads, allow the code in chipset/intel_piix.c to take over instead, fixes CPU speed readout on the HP Vectra VL 5 Series 4. --- src/sio/sio_fdc37c93x.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/sio/sio_fdc37c93x.c b/src/sio/sio_fdc37c93x.c index 949c59552..a0152c34a 100644 --- a/src/sio/sio_fdc37c93x.c +++ b/src/sio/sio_fdc37c93x.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/keyboard.h> +#include <86box/machine.h> #include <86box/nvr.h> #include <86box/apm.h> #include <86box/acpi.h> @@ -131,7 +132,8 @@ fdc37c93x_gpio_read(uint16_t port, void *priv) const fdc37c93x_t *dev = (fdc37c93x_t *) priv; uint8_t ret = 0xff; - ret = dev->gpio_regs[port & 1]; + if (strcmp(machine_get_internal_name(), "vectra54")) + ret = dev->gpio_regs[port & 1]; return ret; } From e03ba4cd996072b89fd7e143ad5b4d566a6c0ad4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 19:53:43 +0200 Subject: [PATCH 61/64] Reversed the 486 filtering changes for those two OPTi 495 machines. --- src/cpu/cpu_table.c | 18 +++++++++--------- src/machine/machine_table.c | 16 ++++++++-------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c index 120cc6a1e..5326c9d14 100644 --- a/src/cpu/cpu_table.c +++ b/src/cpu/cpu_table.c @@ -2508,7 +2508,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 75000000, .multi = 3.0, - .voltage = 3300, + .voltage = 5000, .edx_reset = 0x480, .cpuid_model = 0x480, .cyrix_id = 0x0000, @@ -2525,7 +2525,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 100000000, .multi = 3.0, - .voltage = 3300, + .voltage = 5000, .edx_reset = 0x483, .cpuid_model = 0x483, .cyrix_id = 0x0000, @@ -3066,7 +3066,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 133333333, .multi = 4.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x4e0, .cpuid_model = 0x4e0, .cyrix_id = 0, @@ -3083,7 +3083,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 150000000, .multi = 3.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x482, .cpuid_model = 0x482, .cyrix_id = 0, @@ -3100,7 +3100,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 160000000, .multi = 4.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x4e0, .cpuid_model = 0x4e0, .cyrix_id = 0, @@ -3332,7 +3332,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 80000000, .multi = 2.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x480, .cpuid_model = 0, .cyrix_id = 0x002f, @@ -3349,7 +3349,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 100000000, .multi = 3.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x480, .cpuid_model = 0, .cyrix_id = 0x002f, @@ -3366,7 +3366,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 120000000, .multi = 3.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x480, .cpuid_model = 0, .cyrix_id = 0x002f, @@ -3383,7 +3383,7 @@ const cpu_family_t cpu_families[] = { .fpus = fpus_internal, .rspeed = 133333333, .multi = 4.0, - .voltage = 3450, + .voltage = 5000, .edx_reset = 0x480, .cpuid_model = 0, .cyrix_id = 0x002f, diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index c0c0e9085..942c97541 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -5484,10 +5484,10 @@ const machine_t machines[] = { .cpu = { .package = CPU_PKG_386DX | CPU_PKG_SOCKET1, .block = CPU_BLOCK_NONE, - .min_bus = 25000000, - .max_bus = 66666667, - .min_voltage = 5000, - .max_voltage = 5000, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, .min_multi = 0, .max_multi = 0 }, @@ -5524,10 +5524,10 @@ const machine_t machines[] = { .cpu = { .package = CPU_PKG_386DX | CPU_PKG_SOCKET1, .block = CPU_BLOCK_NONE, - .min_bus = 25000000, - .max_bus = 66666667, - .min_voltage = 5000, - .max_voltage = 5000, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, .min_multi = 0, .max_multi = 0 }, From 2207367bddb37679efd2e71cd285ffb99a57c0bb Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 30 Aug 2024 23:20:22 +0200 Subject: [PATCH 62/64] Fixed the segmentation fault on mouse movement when the serial mouse is attached to a disabled serial port. --- src/device/serial.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/serial.c b/src/device/serial.c index ecc08f15d..2b832f750 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -223,7 +223,7 @@ serial_write_fifo(serial_t *dev, uint8_t dat) ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? fifo_get_count(dev->rcvr_fifo) : 0); - if (!(dev->mctrl & 0x10)) + if ((dev != NULL) && !(dev->mctrl & 0x10)) write_fifo(dev, dat); } From 7e003b0390075844517dca220a4f2ca719cc719a Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 31 Aug 2024 09:32:33 +0200 Subject: [PATCH 63/64] x87: Remove an excess logging line. --- src/cpu/x87.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/cpu/x87.h b/src/cpu/x87.h index 197e18bfe..060f2fe27 100644 --- a/src/cpu/x87.h +++ b/src/cpu/x87.h @@ -228,7 +228,6 @@ FPU_save_regi_tag(extFloat80_t reg, int tag, int stnr) #define FPU_check_pending_exceptions() \ do { \ if (fpu_state.swd & FPU_SW_Summary) { \ - pclog("SW Summary.\n"); \ if (cr0 & 0x20) { \ x86_int(16); \ return 1; \ From 43ff35c10c4020574156a59d35184509cefeacf4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 31 Aug 2024 19:13:06 +0200 Subject: [PATCH 64/64] Add the Acer A1G to the Siemens PCD-2L hack, fixes POST: 31 30 freeze with non-SL-enhanced 486 CPU's. --- src/device/kbc_at.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/kbc_at.c b/src/device/kbc_at.c index d38a9bb72..b1f15d42a 100644 --- a/src/device/kbc_at.c +++ b/src/device/kbc_at.c @@ -828,7 +828,7 @@ write_p2(atkbc_t *dev, uint8_t val) and can find out what they actually did to make it boot from FFFFF0 correctly despite A20 being gated when the CPU is reset, this will have to do. */ - if (kbc_ven == KBC_VEN_SIEMENS) + if ((kbc_ven == KBC_VEN_SIEMENS) || !strcmp(machine_get_internal_name(), "acera1g")) is486 ? loadcs(0xf000) : loadcs_2386(0xf000); } }