From 840b65c577d7e1b1735ea1ff07eba49f6932f94e Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sat, 15 Jul 2023 03:11:59 +0200
Subject: [PATCH 01/15] Fixed warnings into .h files.

---
 src/cpu/x86_ops_mmx_arith.h | 68 ++++++++++++++++++-------------------
 src/cpu/x86_ops_mmx_logic.h | 16 ++++-----
 2 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h
index eef1fe853..3077dbae0 100644
--- a/src/cpu/x86_ops_mmx_arith.h
+++ b/src/cpu/x86_ops_mmx_arith.h
@@ -1,7 +1,7 @@
 static int
 opPADDB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -39,7 +39,7 @@ opPADDB_a16(uint32_t fetchdat)
 static int
 opPADDB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -78,7 +78,7 @@ opPADDB_a32(uint32_t fetchdat)
 static int
 opPADDW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -107,7 +107,7 @@ opPADDW_a16(uint32_t fetchdat)
 static int
 opPADDW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -137,7 +137,7 @@ opPADDW_a32(uint32_t fetchdat)
 static int
 opPADDD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -163,7 +163,7 @@ opPADDD_a16(uint32_t fetchdat)
 static int
 opPADDD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -190,7 +190,7 @@ opPADDD_a32(uint32_t fetchdat)
 static int
 opPADDSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -231,7 +231,7 @@ opPADDSB_a16(uint32_t fetchdat)
 static int
 opPADDSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -273,7 +273,7 @@ opPADDSB_a32(uint32_t fetchdat)
 static int
 opPADDUSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -314,7 +314,7 @@ opPADDUSB_a16(uint32_t fetchdat)
 static int
 opPADDUSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -356,7 +356,7 @@ opPADDUSB_a32(uint32_t fetchdat)
 static int
 opPADDSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -389,7 +389,7 @@ opPADDSW_a16(uint32_t fetchdat)
 static int
 opPADDSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -423,7 +423,7 @@ opPADDSW_a32(uint32_t fetchdat)
 static int
 opPADDUSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -456,7 +456,7 @@ opPADDUSW_a16(uint32_t fetchdat)
 static int
 opPADDUSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -490,7 +490,7 @@ opPADDUSW_a32(uint32_t fetchdat)
 static int
 opPMADDWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -533,7 +533,7 @@ opPMADDWD_a16(uint32_t fetchdat)
 static int
 opPMADDWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -578,7 +578,7 @@ static int
 opPMULLW_a16(uint32_t fetchdat)
 {
     uint32_t p1, p2, p3, p4;
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -628,7 +628,7 @@ static int
 opPMULLW_a32(uint32_t fetchdat)
 {
     uint32_t p1, p2, p3, p4;
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -679,7 +679,7 @@ static int
 opPMULHW_a16(uint32_t fetchdat)
 {
     int32_t p1, p2, p3, p4;
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -729,7 +729,7 @@ static int
 opPMULHW_a32(uint32_t fetchdat)
 {
     int32_t p1, p2, p3, p4;
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -779,7 +779,7 @@ opPMULHW_a32(uint32_t fetchdat)
 static int
 opPSUBB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -818,7 +818,7 @@ opPSUBB_a16(uint32_t fetchdat)
 static int
 opPSUBB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -858,7 +858,7 @@ opPSUBB_a32(uint32_t fetchdat)
 static int
 opPSUBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -889,7 +889,7 @@ opPSUBW_a16(uint32_t fetchdat)
 static int
 opPSUBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -921,7 +921,7 @@ opPSUBW_a32(uint32_t fetchdat)
 static int
 opPSUBD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -948,7 +948,7 @@ opPSUBD_a16(uint32_t fetchdat)
 static int
 opPSUBD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -976,7 +976,7 @@ opPSUBD_a32(uint32_t fetchdat)
 static int
 opPSUBSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -1015,7 +1015,7 @@ opPSUBSB_a16(uint32_t fetchdat)
 static int
 opPSUBSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -1055,7 +1055,7 @@ opPSUBSB_a32(uint32_t fetchdat)
 static int
 opPSUBUSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst, result;
+    MMX_REG src, dst = { 0 }, result;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -1095,7 +1095,7 @@ opPSUBUSB_a16(uint32_t fetchdat)
 static int
 opPSUBUSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst, result;
+    MMX_REG src, dst = { 0 }, result;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -1136,7 +1136,7 @@ opPSUBUSB_a32(uint32_t fetchdat)
 static int
 opPSUBSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -1167,7 +1167,7 @@ opPSUBSW_a16(uint32_t fetchdat)
 static int
 opPSUBSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -1199,7 +1199,7 @@ opPSUBSW_a32(uint32_t fetchdat)
 static int
 opPSUBUSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst, result;
+    MMX_REG src, dst = { 0 }, result;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -1231,7 +1231,7 @@ opPSUBUSW_a16(uint32_t fetchdat)
 static int
 opPSUBUSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst, result;
+    MMX_REG src, dst = { 0 }, result;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h
index 19f8a3e04..9a9a9ee01 100644
--- a/src/cpu/x86_ops_mmx_logic.h
+++ b/src/cpu/x86_ops_mmx_logic.h
@@ -1,7 +1,7 @@
 static int
 opPAND_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -26,7 +26,7 @@ opPAND_a16(uint32_t fetchdat)
 static int
 opPAND_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -52,7 +52,7 @@ opPAND_a32(uint32_t fetchdat)
 static int
 opPANDN_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -77,7 +77,7 @@ opPANDN_a16(uint32_t fetchdat)
 static int
 opPANDN_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -103,7 +103,7 @@ opPANDN_a32(uint32_t fetchdat)
 static int
 opPOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -128,7 +128,7 @@ opPOR_a16(uint32_t fetchdat)
 static int
 opPOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
@@ -154,7 +154,7 @@ opPOR_a32(uint32_t fetchdat)
 static int
 opPXOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
@@ -179,7 +179,7 @@ opPXOR_a16(uint32_t fetchdat)
 static int
 opPXOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src, dst = { 0 };
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);

From 324e5860a0865f1eb9ee1672b40ae76bfbc441aa Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sat, 15 Jul 2023 03:14:13 +0200
Subject: [PATCH 02/15] The beginnings of the port of MartyPC's 808x emulation.

---
 src/cpu/808x/CMakeLists.txt |  16 +++
 src/cpu/808x/queue.c        | 190 ++++++++++++++++++++++++++++++++++++
 src/cpu/808x/queue.h        |  43 ++++++++
 src/cpu/CMakeLists.txt      |   3 +
 src/win/Makefile.mingw      |   6 +-
 5 files changed, 256 insertions(+), 2 deletions(-)
 create mode 100644 src/cpu/808x/CMakeLists.txt
 create mode 100644 src/cpu/808x/queue.c
 create mode 100644 src/cpu/808x/queue.h

diff --git a/src/cpu/808x/CMakeLists.txt b/src/cpu/808x/CMakeLists.txt
new file mode 100644
index 000000000..72aced128
--- /dev/null
+++ b/src/cpu/808x/CMakeLists.txt
@@ -0,0 +1,16 @@
+#
+# 86Box    A hypervisor and IBM PC system emulator that specializes in
+#          running old operating systems and software designed for IBM
+#          PC systems and compatibles from 1981 through fairly recent
+#          system designs based on the PCI bus.
+#
+#          This file is part of the 86Box distribution.
+#
+#          CMake build script.
+#
+# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
+#
+#          Copyright 2020-2021 David Hrdlička.
+#
+
+add_library(808x.c OBJECT queue.c)
diff --git a/src/cpu/808x/queue.c b/src/cpu/808x/queue.c
new file mode 100644
index 000000000..2eebde0ce
--- /dev/null
+++ b/src/cpu/808x/queue.c
@@ -0,0 +1,190 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          808x CPU emulation, mostly ported from reenigne's XTCE, which
+ *          is cycle-accurate.
+ *
+ * Authors: gloriouscow, <https://github.com/dbalsom>
+ *          Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2023 gloriouscow.
+ *          Copyright 2023 Miran Grca.
+ */
+#include <math.h>
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <wchar.h>
+
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include "cpu.h"
+#include "x86.h"
+#include <86box/machine.h>
+#include <86box/io.h>
+#include <86box/mem.h>
+#include <86box/rom.h>
+#include <86box/nmi.h>
+#include <86box/pic.h>
+#include <86box/ppi.h>
+#include <86box/timer.h>
+#include <86box/gdbstub.h>
+// #include "808x.h"
+#include "queue.h"
+
+/* TODO: Move to cpu.h so this can eventually be reused for 286+ as well. */
+#define QUEUE_MAX 6
+
+typedef struct queue_t
+{
+    size_t        size;
+    size_t        len;
+    size_t        back;
+    size_t        front;
+    uint8_t       q[QUEUE_MAX];
+    uint16_t      preload;
+    queue_delay_t delay;
+} queue_t;
+
+static queue_t queue;
+
+#ifdef ENABLE_QUEUE_LOG
+int queue_do_log = ENABLE_QUEUE_LOG;
+
+static void
+queue_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (queue_do_log) {
+        va_start(ap, fmt);
+        pclog_ex(fmt, ap);
+        va_end(ap);
+    }
+}
+#else
+#    define queue_log(fmt, ...)
+#endif
+
+void
+queue_set_size(size_t size)
+{
+    if (size > QUEUE_MAX)
+        fatal("Requested prefetch queue of %i bytes is too big\n", size);
+
+    queue.size = size;
+}
+
+size_t
+queue_get_len(void)
+{
+    return queue.len;
+}
+
+int
+queue_is_full(void)
+{
+    return (queue.len != queue.size);
+}
+
+uint16_t
+queue_get_preload(void)
+{
+    uint16_t ret = queue.preload;
+    queue.preload = 0x0000;
+
+    return ret;
+}
+
+int
+queue_has_preload(void)
+{
+    return (queue.preload & FLAG_PRELOADED) ? 1 : 0;
+}
+
+void
+queue_set_preload(void)
+{
+    uint8_t byte;
+
+    if (queue.len > 0) {
+        byte = queue_pop();
+        queue.preload = ((uint16_t) byte) | FLAG_PRELOADED;
+    } else
+        fatal("Tried to preload with empty queue\n");
+}
+
+void
+queue_push8(uint8_t byte)
+{
+    if (queue.len < queue.size) {
+        queue.q[queue.front] = byte;
+        queue.front = (queue.front + 1) % queue.size;
+        queue.len++;
+
+        if (queue.len == 3)
+            queue.delay = DELAY_WRITE;
+        else
+            queue.delay = DELAY_NONE;
+    } else
+        fatal("Queue overrun\n");
+}
+
+void
+queue_push16(uint16_t word)
+{
+    queue_push8((uint8_t) (word & 0xff));
+    queue_push8((uint8_t) ((word >> 8) & 0xff));
+}
+
+uint8_t
+queue_pop(void)
+{
+    uint8_t byte = 0xff;
+
+    if (queue.len > 0) {
+        byte = queue.q[queue.back];
+
+        queue.back = (queue.back + 1) % queue.size;
+        queue.len--;
+
+        if (queue.len >= 3)
+            queue.delay = DELAY_READ;
+        else
+            queue.delay = DELAY_NONE;
+    } else
+        fatal("Queue underrun\n");
+
+    return byte;
+}
+
+queue_delay_t
+queue_get_delay(void)
+{
+    return queue.delay;
+}
+
+void
+queue_flush(void)
+{
+    memset(&queue, 0x00, sizeof(queue_t));
+
+    queue.delay = DELAY_NONE;
+}
+
+void
+queue_init(void)
+{
+    queue_flush();
+
+    if (is8086)
+        queue_set_size(6);
+    else
+        queue_set_size(4);
+}
diff --git a/src/cpu/808x/queue.h b/src/cpu/808x/queue.h
new file mode 100644
index 000000000..544455784
--- /dev/null
+++ b/src/cpu/808x/queue.h
@@ -0,0 +1,43 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Prefetch queue implementation header.
+ *
+ * Authors: gloriouscow, <https://github.com/dbalsom>
+ *          Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2023 gloriouscow.
+ *          Copyright 2023 Miran Grca.
+ */
+#ifndef EMU_QUEUE_H
+#define EMU_QUEUE_H
+
+typedef enum queue_delay_t
+{
+    DELAY_READ,
+    DELAY_WRITE,
+    DELAY_NONE
+} queue_delay_t;
+
+#define FLAG_PRELOADED    0x8000
+
+extern void               queue_set_size(size_t size);
+extern size_t             queue_get_len(void);
+extern int                queue_is_full(void);
+extern uint16_t           queue_get_preload(void);
+extern int                queue_has_preload(void);
+extern void               queue_set_preload(void);
+extern void               queue_push8(uint8_t byte);
+extern void               queue_push16(uint16_t word);
+extern uint8_t            queue_pop(void);
+extern queue_delay_t      queue_get_delay(void);
+extern void               queue_flush(void);
+
+extern void               queue_init(void);
+
+#endif /*EMU_QUEUE_H*/
diff --git a/src/cpu/CMakeLists.txt b/src/cpu/CMakeLists.txt
index 18aa06023..d1011504e 100644
--- a/src/cpu/CMakeLists.txt
+++ b/src/cpu/CMakeLists.txt
@@ -35,3 +35,6 @@ endif()
 
 add_subdirectory(softfloat)
 target_link_libraries(86Box softfloat)
+
+add_subdirectory(808x)
+target_link_libraries(86Box 808x)
diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw
index 6946eff04..c5f6c61ce 100644
--- a/src/win/Makefile.mingw
+++ b/src/win/Makefile.mingw
@@ -242,7 +242,7 @@ PROG := 86Box
 #              Nothing should need changing from here on..              #
 #########################################################################
 VPATH := $(EXPATH) . $(CODEGEN) minitrace cpu cpu/softfloat \
-         cdrom chipset device disk disk/minivhd floppy \
+         cpu/808x cdrom chipset device disk disk/minivhd floppy \
          game machine mem printer \
          sio sound \
          sound/munt sound/munt/c_interface sound/munt/sha1 \
@@ -547,6 +547,8 @@ MAINOBJ := 86box.o config.o log.o random.o timer.o io.o acpi.o apm.o dma.o ddma.
 
 MEMOBJ := catalyst_flash.o i2c_eeprom.o intel_flash.o mem.o rom.o row.o smram.o spd.o sst_flash.o
 
+CPU808XOBJ := queue.o
+
 CPUOBJ := $(DYNARECOBJ) \
           $(CGTOBJ) \
           cpu.o cpu_table.o fpu.o x86.o \
@@ -773,7 +775,7 @@ ifeq ($(RTMIDI), y)
  SNDOBJ += midi_rtmidi.o
 endif
 
-OBJ := $(MAINOBJ) $(CPUOBJ) $(CHIPSETOBJ) $(MCHOBJ) $(DEVOBJ) $(MEMOBJ) \
+OBJ := $(MAINOBJ) $(CPU808XOBJ) $(CPUOBJ) $(CHIPSETOBJ) $(MCHOBJ) $(DEVOBJ) $(MEMOBJ) \
        $(FDDOBJ) $(GAMEOBJ) $(CDROMOBJ) $(ZIPOBJ) $(MOOBJ) $(HDDOBJ) $(MINIVHDOBJ) \
        $(NETOBJ) $(PRINTOBJ) $(SCSIOBJ) $(SIOOBJ) $(SNDOBJ) $(VIDOBJ) $(VOODOOOBJ) \
        $(PLATOBJ) $(UIOBJ) $(FSYNTHOBJ) $(MUNTOBJ) $(DEVBROBJ) $(MINITRACEOBJ) $(THREADOBJ)

From 21e20f1ea209cccddf187078f2b8ddf1a341906c Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 02:24:36 +0200
Subject: [PATCH 03/15] MMX clean-ups, part 1.

---
 src/cpu/x86_ops_mmx_arith.h | 1221 ++++++++++++++---------------------
 src/cpu/x86_ops_mmx_cmp.h   |  372 +++++------
 src/cpu/x86_ops_mmx_logic.h |  112 ++--
 src/cpu/x86_ops_mmx_mov.h   |  462 ++++++-------
 src/cpu/x86_ops_mmx_pack.h  |  672 +++++++++----------
 src/cpu/x86_ops_mmx_shift.h |  854 ++++++++++--------------
 6 files changed, 1595 insertions(+), 2098 deletions(-)

diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h
index 3077dbae0..3ebe960f9 100644
--- a/src/cpu/x86_ops_mmx_arith.h
+++ b/src/cpu/x86_ops_mmx_arith.h
@@ -1,76 +1,54 @@
 static int
 opPADDB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.b[0] += src.b[0];
-        dst.b[1] += src.b[1];
-        dst.b[2] += src.b[2];
-        dst.b[3] += src.b[3];
-        dst.b[4] += src.b[4];
-        dst.b[5] += src.b[5];
-        dst.b[6] += src.b[6];
-        dst.b[7] += src.b[7];
+    dst->b[0] += src.b[0];
+    dst->b[1] += src.b[1];
+    dst->b[2] += src.b[2];
+    dst->b[3] += src.b[3];
+    dst->b[4] += src.b[4];
+    dst->b[5] += src.b[5];
+    dst->b[6] += src.b[6];
+    dst->b[7] += src.b[7];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] += src.b[0];
-        cpu_state.MM[cpu_reg].b[1] += src.b[1];
-        cpu_state.MM[cpu_reg].b[2] += src.b[2];
-        cpu_state.MM[cpu_reg].b[3] += src.b[3];
-        cpu_state.MM[cpu_reg].b[4] += src.b[4];
-        cpu_state.MM[cpu_reg].b[5] += src.b[5];
-        cpu_state.MM[cpu_reg].b[6] += src.b[6];
-        cpu_state.MM[cpu_reg].b[7] += src.b[7];
-    }
 
     return 0;
 }
 static int
 opPADDB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.b[0] += src.b[0];
-        dst.b[1] += src.b[1];
-        dst.b[2] += src.b[2];
-        dst.b[3] += src.b[3];
-        dst.b[4] += src.b[4];
-        dst.b[5] += src.b[5];
-        dst.b[6] += src.b[6];
-        dst.b[7] += src.b[7];
+    dst->b[0] += src.b[0];
+    dst->b[1] += src.b[1];
+    dst->b[2] += src.b[2];
+    dst->b[3] += src.b[3];
+    dst->b[4] += src.b[4];
+    dst->b[5] += src.b[5];
+    dst->b[6] += src.b[6];
+    dst->b[7] += src.b[7];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] += src.b[0];
-        cpu_state.MM[cpu_reg].b[1] += src.b[1];
-        cpu_state.MM[cpu_reg].b[2] += src.b[2];
-        cpu_state.MM[cpu_reg].b[3] += src.b[3];
-        cpu_state.MM[cpu_reg].b[4] += src.b[4];
-        cpu_state.MM[cpu_reg].b[5] += src.b[5];
-        cpu_state.MM[cpu_reg].b[6] += src.b[6];
-        cpu_state.MM[cpu_reg].b[7] += src.b[7];
-    }
 
     return 0;
 }
@@ -78,111 +56,88 @@ opPADDB_a32(uint32_t fetchdat)
 static int
 opPADDW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.w[0] += src.w[0];
-        dst.w[1] += src.w[1];
-        dst.w[2] += src.w[2];
-        dst.w[3] += src.w[3];
+    dst->w[0] += src.w[0];
+    dst->w[1] += src.w[1];
+    dst->w[2] += src.w[2];
+    dst->w[3] += src.w[3];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] += src.w[0];
-        cpu_state.MM[cpu_reg].w[1] += src.w[1];
-        cpu_state.MM[cpu_reg].w[2] += src.w[2];
-        cpu_state.MM[cpu_reg].w[3] += src.w[3];
-    }
+
     return 0;
 }
 static int
 opPADDW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.w[0] += src.w[0];
-        dst.w[1] += src.w[1];
-        dst.w[2] += src.w[2];
-        dst.w[3] += src.w[3];
+    dst->w[0] += src.w[0];
+    dst->w[1] += src.w[1];
+    dst->w[2] += src.w[2];
+    dst->w[3] += src.w[3];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] += src.w[0];
-        cpu_state.MM[cpu_reg].w[1] += src.w[1];
-        cpu_state.MM[cpu_reg].w[2] += src.w[2];
-        cpu_state.MM[cpu_reg].w[3] += src.w[3];
-    }
     return 0;
 }
 
 static int
 opPADDD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.l[0] += src.l[0];
-        dst.l[1] += src.l[1];
+    dst->l[0] += src.l[0];
+    dst->l[1] += src.l[1];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] += src.l[0];
-        cpu_state.MM[cpu_reg].l[1] += src.l[1];
-    }
 
     return 0;
 }
 static int
 opPADDD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        dst.l[0] += src.l[0];
-        dst.l[1] += src.l[1];
+    dst->l[0] += src.l[0];
+    dst->l[1] += src.l[1];
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] += src.l[0];
-        cpu_state.MM[cpu_reg].l[1] += src.l[1];
-    }
 
     return 0;
 }
@@ -190,1073 +145,879 @@ opPADDD_a32(uint32_t fetchdat)
 static int
 opPADDSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sb[0] = SSATB(dst.sb[0] + src.sb[0]);
-        dst.sb[1] = SSATB(dst.sb[1] + src.sb[1]);
-        dst.sb[2] = SSATB(dst.sb[2] + src.sb[2]);
-        dst.sb[3] = SSATB(dst.sb[3] + src.sb[3]);
-        dst.sb[4] = SSATB(dst.sb[4] + src.sb[4]);
-        dst.sb[5] = SSATB(dst.sb[5] + src.sb[5]);
-        dst.sb[6] = SSATB(dst.sb[6] + src.sb[6]);
-        dst.sb[7] = SSATB(dst.sb[7] + src.sb[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]);
     }
 
+    dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
+    dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
+    dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
+    dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]);
+    dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]);
+    dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]);
+    dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
+    dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPADDSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sb[0] = SSATB(dst.sb[0] + src.sb[0]);
-        dst.sb[1] = SSATB(dst.sb[1] + src.sb[1]);
-        dst.sb[2] = SSATB(dst.sb[2] + src.sb[2]);
-        dst.sb[3] = SSATB(dst.sb[3] + src.sb[3]);
-        dst.sb[4] = SSATB(dst.sb[4] + src.sb[4]);
-        dst.sb[5] = SSATB(dst.sb[5] + src.sb[5]);
-        dst.sb[6] = SSATB(dst.sb[6] + src.sb[6]);
-        dst.sb[7] = SSATB(dst.sb[7] + src.sb[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]);
     }
 
+    dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
+    dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
+    dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
+    dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]);
+    dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]);
+    dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]);
+    dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
+    dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPADDUSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = USATB(dst.b[0] + src.b[0]);
-        dst.b[1] = USATB(dst.b[1] + src.b[1]);
-        dst.b[2] = USATB(dst.b[2] + src.b[2]);
-        dst.b[3] = USATB(dst.b[3] + src.b[3]);
-        dst.b[4] = USATB(dst.b[4] + src.b[4]);
-        dst.b[5] = USATB(dst.b[5] + src.b[5]);
-        dst.b[6] = USATB(dst.b[6] + src.b[6]);
-        dst.b[7] = USATB(dst.b[7] + src.b[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]);
     }
 
+    dst->b[0] = USATB(dst->b[0] + src.b[0]);
+    dst->b[1] = USATB(dst->b[1] + src.b[1]);
+    dst->b[2] = USATB(dst->b[2] + src.b[2]);
+    dst->b[3] = USATB(dst->b[3] + src.b[3]);
+    dst->b[4] = USATB(dst->b[4] + src.b[4]);
+    dst->b[5] = USATB(dst->b[5] + src.b[5]);
+    dst->b[6] = USATB(dst->b[6] + src.b[6]);
+    dst->b[7] = USATB(dst->b[7] + src.b[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPADDUSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = USATB(dst.b[0] + src.b[0]);
-        dst.b[1] = USATB(dst.b[1] + src.b[1]);
-        dst.b[2] = USATB(dst.b[2] + src.b[2]);
-        dst.b[3] = USATB(dst.b[3] + src.b[3]);
-        dst.b[4] = USATB(dst.b[4] + src.b[4]);
-        dst.b[5] = USATB(dst.b[5] + src.b[5]);
-        dst.b[6] = USATB(dst.b[6] + src.b[6]);
-        dst.b[7] = USATB(dst.b[7] + src.b[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]);
     }
 
+    dst->b[0] = USATB(dst->b[0] + src.b[0]);
+    dst->b[1] = USATB(dst->b[1] + src.b[1]);
+    dst->b[2] = USATB(dst->b[2] + src.b[2]);
+    dst->b[3] = USATB(dst->b[3] + src.b[3]);
+    dst->b[4] = USATB(dst->b[4] + src.b[4]);
+    dst->b[5] = USATB(dst->b[5] + src.b[5]);
+    dst->b[6] = USATB(dst->b[6] + src.b[6]);
+    dst->b[7] = USATB(dst->b[7] + src.b[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPADDSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sw[0] + src.sw[0]);
-        dst.sw[1] = SSATW(dst.sw[1] + src.sw[1]);
-        dst.sw[2] = SSATW(dst.sw[2] + src.sw[2]);
-        dst.sw[3] = SSATW(dst.sw[3] + src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]);
     }
 
+    dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
+    dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
+    dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
+    dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPADDSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sw[0] + src.sw[0]);
-        dst.sw[1] = SSATW(dst.sw[1] + src.sw[1]);
-        dst.sw[2] = SSATW(dst.sw[2] + src.sw[2]);
-        dst.sw[3] = SSATW(dst.sw[3] + src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]);
     }
 
+    dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
+    dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
+    dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
+    dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPADDUSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = USATW(dst.w[0] + src.w[0]);
-        dst.w[1] = USATW(dst.w[1] + src.w[1]);
-        dst.w[2] = USATW(dst.w[2] + src.w[2]);
-        dst.w[3] = USATW(dst.w[3] + src.w[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]);
-        cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]);
-        cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]);
-        cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]);
     }
 
+    dst->w[0] = USATW(dst->w[0] + src.w[0]);
+    dst->w[1] = USATW(dst->w[1] + src.w[1]);
+    dst->w[2] = USATW(dst->w[2] + src.w[2]);
+    dst->w[3] = USATW(dst->w[3] + src.w[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPADDUSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = USATW(dst.w[0] + src.w[0]);
-        dst.w[1] = USATW(dst.w[1] + src.w[1]);
-        dst.w[2] = USATW(dst.w[2] + src.w[2]);
-        dst.w[3] = USATW(dst.w[3] + src.w[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]);
-        cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]);
-        cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]);
-        cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]);
     }
 
+    dst->w[0] = USATW(dst->w[0] + src.w[0]);
+    dst->w[1] = USATW(dst->w[1] + src.w[1]);
+    dst->w[2] = USATW(dst->w[2] + src.w[2]);
+    dst->w[3] = USATW(dst->w[3] + src.w[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPMADDWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        if (dst.l[0] == 0x80008000 && src.l[0] == 0x80008000)
-            dst.l[0] = 0x80000000;
-        else
-            dst.sl[0] = ((int32_t) dst.sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst.sw[1] * (int32_t) src.sw[1]);
-
-        if (dst.l[1] == 0x80008000 && src.l[1] == 0x80008000)
-            dst.l[1] = 0x80000000;
-        else
-            dst.sl[1] = ((int32_t) dst.sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst.sw[3] * (int32_t) src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000)
-            cpu_state.MM[cpu_reg].l[0] = 0x80000000;
-        else
-            cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]);
-
-        if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000)
-            cpu_state.MM[cpu_reg].l[1] = 0x80000000;
-        else
-            cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]);
     }
 
+    if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
+        dst->l[0] = 0x80000000;
+    else
+        dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]);
+
+    if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000)
+        dst->l[1] = 0x80000000;
+    else
+        dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPMADDWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        if (dst.l[0] == 0x80008000 && src.l[0] == 0x80008000)
-            dst.l[0] = 0x80000000;
-        else
-            dst.sl[0] = ((int32_t) dst.sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst.sw[1] * (int32_t) src.sw[1]);
-
-        if (dst.l[1] == 0x80008000 && src.l[1] == 0x80008000)
-            dst.l[1] = 0x80000000;
-        else
-            dst.sl[1] = ((int32_t) dst.sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst.sw[3] * (int32_t) src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000)
-            cpu_state.MM[cpu_reg].l[0] = 0x80000000;
-        else
-            cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]);
-
-        if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000)
-            cpu_state.MM[cpu_reg].l[1] = 0x80000000;
-        else
-            cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]);
     }
 
+    if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
+        dst->l[0] = 0x80000000;
+    else
+        dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]);
+
+    if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000)
+        dst->l[1] = 0x80000000;
+    else
+        dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPMULLW_a16(uint32_t fetchdat)
 {
-    uint32_t p1, p2, p3, p4;
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
-        MMX_GETSRC();
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        p1 = (uint32_t)(dst.w[0]) * (uint32_t)(src.w[0]);
-        p2 = (uint32_t)(dst.w[1]) * (uint32_t)(src.w[1]);
-        p3 = (uint32_t)(dst.w[2]) * (uint32_t)(src.w[2]);
-        p4 = (uint32_t)(dst.w[3]) * (uint32_t)(src.w[3]);
-
-        dst.w[0] = p1 & 0xffff;
-        dst.w[1] = p2 & 0xffff;
-        dst.w[2] = p3 & 0xffff;
-        dst.w[3] = p4 & 0xffff;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0];
-            cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1];
-            cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2];
-            cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].w[0] *= src.w[0];
-            cpu_state.MM[cpu_reg].w[1] *= src.w[1];
-            cpu_state.MM[cpu_reg].w[2] *= src.w[2];
-            cpu_state.MM[cpu_reg].w[3] *= src.w[3];
-            CLOCK_CYCLES(2);
-        }
     }
+
+    if (cpu_mod == 3)
+        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+        src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
+        if (cpu_state.abrt)
+            return 0;
+        CLOCK_CYCLES(1);
+    }
+    dst->w[0] *= src.w[0];
+    dst->w[1] *= src.w[1];
+    dst->w[2] *= src.w[2];
+    dst->w[3] *= src.w[3];
+    CLOCK_CYCLES(1);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPMULLW_a32(uint32_t fetchdat)
 {
-    uint32_t p1, p2, p3, p4;
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
-        MMX_GETSRC();
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        p1 = (uint32_t)(dst.w[0]) * (uint32_t)(src.w[0]);
-        p2 = (uint32_t)(dst.w[1]) * (uint32_t)(src.w[1]);
-        p3 = (uint32_t)(dst.w[2]) * (uint32_t)(src.w[2]);
-        p4 = (uint32_t)(dst.w[3]) * (uint32_t)(src.w[3]);
-
-        dst.w[0] = p1 & 0xffff;
-        dst.w[1] = p2 & 0xffff;
-        dst.w[2] = p3 & 0xffff;
-        dst.w[3] = p4 & 0xffff;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0];
-            cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1];
-            cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2];
-            cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].w[0] *= src.w[0];
-            cpu_state.MM[cpu_reg].w[1] *= src.w[1];
-            cpu_state.MM[cpu_reg].w[2] *= src.w[2];
-            cpu_state.MM[cpu_reg].w[3] *= src.w[3];
-            CLOCK_CYCLES(2);
-        }
     }
+
+    if (cpu_mod == 3)
+        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+        src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
+        if (cpu_state.abrt)
+            return 0;
+        CLOCK_CYCLES(1);
+    }
+    dst->w[0] *= src.w[0];
+    dst->w[1] *= src.w[1];
+    dst->w[2] *= src.w[2];
+    dst->w[3] *= src.w[3];
+    CLOCK_CYCLES(1);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPMULHW_a16(uint32_t fetchdat)
 {
-    int32_t p1, p2, p3, p4;
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
-        MMX_GETSRC();
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        p1 = (int32_t)(dst.w[0]) * (int32_t)(src.sw[0]);
-        p2 = (int32_t)(dst.w[1]) * (int32_t)(src.sw[1]);
-        p3 = (int32_t)(dst.w[2]) * (int32_t)(src.sw[2]);
-        p4 = (int32_t)(dst.w[3]) * (int32_t)(src.sw[3]);
-
-        dst.w[0] = (uint16_t)(p1 >> 16);
-        dst.w[1] = (uint16_t)(p2 >> 16);
-        dst.w[2] = (uint16_t)(p3 >> 16);
-        dst.w[3] = (uint16_t)(p4 >> 16);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16;
-            cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16;
-            cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16;
-            cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16;
-            cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16;
-            cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16;
-            cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16;
-            CLOCK_CYCLES(2);
-        }
     }
+
+    if (cpu_mod == 3)
+        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+        src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
+        if (cpu_state.abrt)
+            return 0;
+        CLOCK_CYCLES(1);
+    }
+    dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16;
+    dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16;
+    dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16;
+    dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
+    CLOCK_CYCLES(1);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPMULHW_a32(uint32_t fetchdat)
 {
-    int32_t p1, p2, p3, p4;
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
-        MMX_GETSRC();
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        p1 = (int32_t)(dst.w[0]) * (int32_t)(src.sw[0]);
-        p2 = (int32_t)(dst.w[1]) * (int32_t)(src.sw[1]);
-        p3 = (int32_t)(dst.w[2]) * (int32_t)(src.sw[2]);
-        p4 = (int32_t)(dst.w[3]) * (int32_t)(src.sw[3]);
-
-        dst.w[0] = (uint16_t)(p1 >> 16);
-        dst.w[1] = (uint16_t)(p2 >> 16);
-        dst.w[2] = (uint16_t)(p3 >> 16);
-        dst.w[3] = (uint16_t)(p4 >> 16);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16;
-            cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16;
-            cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16;
-            cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16;
-            cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16;
-            cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16;
-            cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16;
-            CLOCK_CYCLES(2);
-        }
     }
+
+    if (cpu_mod == 3)
+        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+        src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
+        if (cpu_state.abrt)
+            return 0;
+        CLOCK_CYCLES(1);
+    }
+    dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16;
+    dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16;
+    dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16;
+    dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
+    CLOCK_CYCLES(1);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] -= src.b[0];
-        dst.b[1] -= src.b[1];
-        dst.b[2] -= src.b[2];
-        dst.b[3] -= src.b[3];
-        dst.b[4] -= src.b[4];
-        dst.b[5] -= src.b[5];
-        dst.b[6] -= src.b[6];
-        dst.b[7] -= src.b[7];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] -= src.b[0];
-        cpu_state.MM[cpu_reg].b[1] -= src.b[1];
-        cpu_state.MM[cpu_reg].b[2] -= src.b[2];
-        cpu_state.MM[cpu_reg].b[3] -= src.b[3];
-        cpu_state.MM[cpu_reg].b[4] -= src.b[4];
-        cpu_state.MM[cpu_reg].b[5] -= src.b[5];
-        cpu_state.MM[cpu_reg].b[6] -= src.b[6];
-        cpu_state.MM[cpu_reg].b[7] -= src.b[7];
     }
+
+    dst->b[0] -= src.b[0];
+    dst->b[1] -= src.b[1];
+    dst->b[2] -= src.b[2];
+    dst->b[3] -= src.b[3];
+    dst->b[4] -= src.b[4];
+    dst->b[5] -= src.b[5];
+    dst->b[6] -= src.b[6];
+    dst->b[7] -= src.b[7];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] -= src.b[0];
-        dst.b[1] -= src.b[1];
-        dst.b[2] -= src.b[2];
-        dst.b[3] -= src.b[3];
-        dst.b[4] -= src.b[4];
-        dst.b[5] -= src.b[5];
-        dst.b[6] -= src.b[6];
-        dst.b[7] -= src.b[7];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] -= src.b[0];
-        cpu_state.MM[cpu_reg].b[1] -= src.b[1];
-        cpu_state.MM[cpu_reg].b[2] -= src.b[2];
-        cpu_state.MM[cpu_reg].b[3] -= src.b[3];
-        cpu_state.MM[cpu_reg].b[4] -= src.b[4];
-        cpu_state.MM[cpu_reg].b[5] -= src.b[5];
-        cpu_state.MM[cpu_reg].b[6] -= src.b[6];
-        cpu_state.MM[cpu_reg].b[7] -= src.b[7];
     }
+
+    dst->b[0] -= src.b[0];
+    dst->b[1] -= src.b[1];
+    dst->b[2] -= src.b[2];
+    dst->b[3] -= src.b[3];
+    dst->b[4] -= src.b[4];
+    dst->b[5] -= src.b[5];
+    dst->b[6] -= src.b[6];
+    dst->b[7] -= src.b[7];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] -= src.w[0];
-        dst.w[1] -= src.w[1];
-        dst.w[2] -= src.w[2];
-        dst.w[3] -= src.w[3];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] -= src.w[0];
-        cpu_state.MM[cpu_reg].w[1] -= src.w[1];
-        cpu_state.MM[cpu_reg].w[2] -= src.w[2];
-        cpu_state.MM[cpu_reg].w[3] -= src.w[3];
     }
+
+    dst->w[0] -= src.w[0];
+    dst->w[1] -= src.w[1];
+    dst->w[2] -= src.w[2];
+    dst->w[3] -= src.w[3];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] -= src.w[0];
-        dst.w[1] -= src.w[1];
-        dst.w[2] -= src.w[2];
-        dst.w[3] -= src.w[3];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] -= src.w[0];
-        cpu_state.MM[cpu_reg].w[1] -= src.w[1];
-        cpu_state.MM[cpu_reg].w[2] -= src.w[2];
-        cpu_state.MM[cpu_reg].w[3] -= src.w[3];
     }
+
+    dst->w[0] -= src.w[0];
+    dst->w[1] -= src.w[1];
+    dst->w[2] -= src.w[2];
+    dst->w[3] -= src.w[3];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] -= src.l[0];
-        dst.l[1] -= src.l[1];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] -= src.l[0];
-        cpu_state.MM[cpu_reg].l[1] -= src.l[1];
     }
+
+    dst->l[0] -= src.l[0];
+    dst->l[1] -= src.l[1];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] -= src.l[0];
-        dst.l[1] -= src.l[1];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] -= src.l[0];
-        cpu_state.MM[cpu_reg].l[1] -= src.l[1];
     }
+
+    dst->l[0] -= src.l[0];
+    dst->l[1] -= src.l[1];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sb[0] = SSATB(dst.sb[0] - src.sb[0]);
-        dst.sb[1] = SSATB(dst.sb[1] - src.sb[1]);
-        dst.sb[2] = SSATB(dst.sb[2] - src.sb[2]);
-        dst.sb[3] = SSATB(dst.sb[3] - src.sb[3]);
-        dst.sb[4] = SSATB(dst.sb[4] - src.sb[4]);
-        dst.sb[5] = SSATB(dst.sb[5] - src.sb[5]);
-        dst.sb[6] = SSATB(dst.sb[6] - src.sb[6]);
-        dst.sb[7] = SSATB(dst.sb[7] - src.sb[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]);
     }
+
+    dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
+    dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
+    dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
+    dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]);
+    dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]);
+    dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]);
+    dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
+    dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sb[0] = SSATB(dst.sb[0] - src.sb[0]);
-        dst.sb[1] = SSATB(dst.sb[1] - src.sb[1]);
-        dst.sb[2] = SSATB(dst.sb[2] - src.sb[2]);
-        dst.sb[3] = SSATB(dst.sb[3] - src.sb[3]);
-        dst.sb[4] = SSATB(dst.sb[4] - src.sb[4]);
-        dst.sb[5] = SSATB(dst.sb[5] - src.sb[5]);
-        dst.sb[6] = SSATB(dst.sb[6] - src.sb[6]);
-        dst.sb[7] = SSATB(dst.sb[7] - src.sb[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]);
     }
+
+    dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
+    dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
+    dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
+    dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]);
+    dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]);
+    dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]);
+    dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
+    dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBUSB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 }, result;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        result.q = 0;
-
-        result.b[0] = USATB(dst.b[0] - src.b[0]);
-        result.b[1] = USATB(dst.b[1] - src.b[1]);
-        result.b[2] = USATB(dst.b[2] - src.b[2]);
-        result.b[3] = USATB(dst.b[3] - src.b[3]);
-        result.b[4] = USATB(dst.b[4] - src.b[4]);
-        result.b[5] = USATB(dst.b[5] - src.b[5]);
-        result.b[6] = USATB(dst.b[6] - src.b[6]);
-        result.b[7] = USATB(dst.b[7] - src.b[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = result.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]);
     }
+
+    dst->b[0] = USATB(dst->b[0] - src.b[0]);
+    dst->b[1] = USATB(dst->b[1] - src.b[1]);
+    dst->b[2] = USATB(dst->b[2] - src.b[2]);
+    dst->b[3] = USATB(dst->b[3] - src.b[3]);
+    dst->b[4] = USATB(dst->b[4] - src.b[4]);
+    dst->b[5] = USATB(dst->b[5] - src.b[5]);
+    dst->b[6] = USATB(dst->b[6] - src.b[6]);
+    dst->b[7] = USATB(dst->b[7] - src.b[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBUSB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 }, result;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        result.q = 0;
-
-        result.b[0] = USATB(dst.b[0] - src.b[0]);
-        result.b[1] = USATB(dst.b[1] - src.b[1]);
-        result.b[2] = USATB(dst.b[2] - src.b[2]);
-        result.b[3] = USATB(dst.b[3] - src.b[3]);
-        result.b[4] = USATB(dst.b[4] - src.b[4]);
-        result.b[5] = USATB(dst.b[5] - src.b[5]);
-        result.b[6] = USATB(dst.b[6] - src.b[6]);
-        result.b[7] = USATB(dst.b[7] - src.b[7]);
-
-        fpu_state.st_space[cpu_reg].fraction = result.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]);
     }
+
+    dst->b[0] = USATB(dst->b[0] - src.b[0]);
+    dst->b[1] = USATB(dst->b[1] - src.b[1]);
+    dst->b[2] = USATB(dst->b[2] - src.b[2]);
+    dst->b[3] = USATB(dst->b[3] - src.b[3]);
+    dst->b[4] = USATB(dst->b[4] - src.b[4]);
+    dst->b[5] = USATB(dst->b[5] - src.b[5]);
+    dst->b[6] = USATB(dst->b[6] - src.b[6]);
+    dst->b[7] = USATB(dst->b[7] - src.b[7]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sw[0] - src.sw[0]);
-        dst.sw[1] = SSATW(dst.sw[1] - src.sw[1]);
-        dst.sw[2] = SSATW(dst.sw[2] - src.sw[2]);
-        dst.sw[3] = SSATW(dst.sw[3] - src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]);
     }
+
+    dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
+    dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
+    dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
+    dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sw[0] - src.sw[0]);
-        dst.sw[1] = SSATW(dst.sw[1] - src.sw[1]);
-        dst.sw[2] = SSATW(dst.sw[2] - src.sw[2]);
-        dst.sw[3] = SSATW(dst.sw[3] - src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]);
     }
+
+    dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
+    dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
+    dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
+    dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSUBUSW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 }, result;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        result.q = 0;
-
-        result.w[0] = USATW(dst.w[0] - src.w[0]);
-        result.w[1] = USATW(dst.w[1] - src.w[1]);
-        result.w[2] = USATW(dst.w[2] - src.w[2]);
-        result.w[3] = USATW(dst.w[3] - src.w[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = result.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]);
-        cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]);
-        cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]);
-        cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]);
     }
+
+    dst->w[0] = USATW(dst->w[0] - src.w[0]);
+    dst->w[1] = USATW(dst->w[1] - src.w[1]);
+    dst->w[2] = USATW(dst->w[2] - src.w[2]);
+    dst->w[3] = USATW(dst->w[3] - src.w[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSUBUSW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 }, result;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        result.q = 0;
-
-        result.w[0] = USATW(dst.w[0] - src.w[0]);
-        result.w[1] = USATW(dst.w[1] - src.w[1]);
-        result.w[2] = USATW(dst.w[2] - src.w[2]);
-        result.w[3] = USATW(dst.w[3] - src.w[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = result.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]);
-        cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]);
-        cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]);
-        cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]);
     }
+
+    dst->w[0] = USATW(dst->w[0] - src.w[0]);
+    dst->w[1] = USATW(dst->w[1] - src.w[1]);
+    dst->w[2] = USATW(dst->w[2] - src.w[2]);
+    dst->w[3] = USATW(dst->w[3] - src.w[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h
index cdee0cfb5..4f64119a3 100644
--- a/src/cpu/x86_ops_mmx_cmp.h
+++ b/src/cpu/x86_ops_mmx_cmp.h
@@ -1,393 +1,349 @@
 static int
 opPCMPEQB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
-        dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
-        dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
-        dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
-        dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
-        dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
-        dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
-        dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
     }
+
+    dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
+    dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
+    dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
+    dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
+    dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
+    dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
+    dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
+    dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPEQB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
-        dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
-        dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
-        dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
-        dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
-        dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
-        dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
-        dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
     }
+
+    dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
+    dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
+    dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
+    dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
+    dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
+    dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
+    dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
+    dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPCMPGTB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
-        dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
-        dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
-        dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
-        dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
-        dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
-        dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
-        dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
     }
+
+    dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
+    dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
+    dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
+    dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
+    dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
+    dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
+    dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
+    dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPGTB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
-        dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
-        dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
-        dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
-        dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
-        dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
-        dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
-        dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
-        cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
     }
+
+    dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
+    dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
+    dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
+    dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
+    dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
+    dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
+    dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
+    dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPCMPEQW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
-        dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
-        dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
-        dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
     }
+
+    dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
+    dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
+    dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
+    dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPEQW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
-        dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
-        dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
-        dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
     }
+
+    dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
+    dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
+    dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
+    dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPCMPGTW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
-        dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
-        dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
-        dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
     }
+
+    dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
+    dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
+    dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
+    dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPGTW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
-        dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
-        dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
-        dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
-        cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
     }
+
+    dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
+    dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
+    dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
+    dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPCMPEQD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
-        dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
-        cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
     }
+
+    dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPEQD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
-        dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
-        cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
     }
+
+    dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPCMPGTD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
-        dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
-        cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
     }
+
+    dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPCMPGTD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
-        dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
-        cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
     }
+
+    dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h
index 9a9a9ee01..67622a3df 100644
--- a/src/cpu/x86_ops_mmx_logic.h
+++ b/src/cpu/x86_ops_mmx_logic.h
@@ -1,50 +1,50 @@
 static int
 opPAND_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q &= src.q;
+    dst->q &= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q &= src.q;
 
     return 0;
 }
 static int
 opPAND_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q &= src.q;
+    dst->q &= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q &= src.q;
 
     return 0;
 }
@@ -52,50 +52,50 @@ opPAND_a32(uint32_t fetchdat)
 static int
 opPANDN_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q = ~dst.q & src.q;
+    dst->q = ~dst->q & src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
 
     return 0;
 }
 static int
 opPANDN_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q = ~dst.q & src.q;
+    dst->q = ~dst->q & src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
 
     return 0;
 }
@@ -103,50 +103,50 @@ opPANDN_a32(uint32_t fetchdat)
 static int
 opPOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q |= src.q;
+    dst->q |= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q |= src.q;
 
     return 0;
 }
 static int
 opPOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q |= src.q;
+    dst->q |= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q |= src.q;
 
     return 0;
 }
@@ -154,50 +154,50 @@ opPOR_a32(uint32_t fetchdat)
 static int
 opPXOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q ^= src.q;
+    dst->q ^= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q ^= src.q;
 
     return 0;
 }
 static int
 opPXOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst = { 0 };
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
-        dst.q ^= src.q;
+    dst->q ^= src.q;
 
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
+    if (fpu_softfloat)
         fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else
-        cpu_state.MM[cpu_reg].q ^= src.q;
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h
index fad58898f..c631c6444 100644
--- a/src/cpu/x86_ops_mmx_mov.h
+++ b/src/cpu/x86_ops_mmx_mov.h
@@ -2,175 +2,153 @@ static int
 opMOVD_l_mm_a16(uint32_t fetchdat)
 {
     uint32_t dst;
-    MMX_REG op;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.l[0] = cpu_state.regs[cpu_rm].l;
-            op.l[1] = 0;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.l[0] = dst;
-            op.l[1] = 0;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
         }
+
+        op->l[0] = cpu_state.regs[cpu_rm].l;
+        op->l[1] = 0;
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
-            cpu_state.MM[cpu_reg].l[1] = 0;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            cpu_state.MM[cpu_reg].l[0] = dst;
-            cpu_state.MM[cpu_reg].l[1] = 0;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        dst = readmeml(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        op->l[0] = dst;
+        op->l[1] = 0;
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opMOVD_l_mm_a32(uint32_t fetchdat)
 {
     uint32_t dst;
-    MMX_REG op;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.l[0] = cpu_state.regs[cpu_rm].l;
-            op.l[1] = 0;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.l[0] = dst;
-            op.l[1] = 0;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
         }
+
+        op->l[0] = cpu_state.regs[cpu_rm].l;
+        op->l[1] = 0;
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
-            cpu_state.MM[cpu_reg].l[1] = 0;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            cpu_state.MM[cpu_reg].l[0] = dst;
-            cpu_state.MM[cpu_reg].l[1] = 0;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        dst = readmeml(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        op->l[0] = dst;
+        op->l[1] = 0;
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opMOVD_mm_l_a16(uint32_t fetchdat)
 {
-    MMX_REG op;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-            cpu_state.regs[cpu_rm].l = op.l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-            writememl(easeg, cpu_state.eaaddr, op.l[0]);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            CLOCK_CYCLES(2);
         }
+
+        cpu_state.regs[cpu_rm].l = op->l[0];
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-            writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
-            if (cpu_state.abrt)
-                return 1;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_WRITE(cpu_state.ea_seg);
+        CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
+        writememl(easeg, cpu_state.eaaddr, op->l[0]);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        CLOCK_CYCLES(2);
     }
+
     return 0;
 }
 static int
 opMOVD_mm_l_a32(uint32_t fetchdat)
 {
-    MMX_REG op;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-            cpu_state.regs[cpu_rm].l = op.l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-            writememl(easeg, cpu_state.eaaddr, op.l[0]);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            CLOCK_CYCLES(2);
         }
+
+        cpu_state.regs[cpu_rm].l = op->l[0];
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-            writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
-            if (cpu_state.abrt)
-                return 1;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_WRITE(cpu_state.ea_seg);
+        CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
+        writememl(easeg, cpu_state.eaaddr, op->l[0]);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        CLOCK_CYCLES(2);
     }
+
     return 0;
 }
 
@@ -179,45 +157,79 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
 static int
 opMOVD_mm_l_a16_cx(uint32_t fetchdat)
 {
+    MMX_REG *op;
+
     if (in_smm)
         return opSMINT(fetchdat);
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (cpu_mod == 3) {
-        cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+
+        cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-        writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
+        writememl(easeg, cpu_state.eaaddr, op->l[0]);
         if (cpu_state.abrt)
             return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+
         CLOCK_CYCLES(2);
     }
+
     return 0;
 }
 static int
 opMOVD_mm_l_a32_cx(uint32_t fetchdat)
 {
+    MMX_REG *op;
+
     if (in_smm)
         return opSMINT(fetchdat);
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     if (cpu_mod == 3) {
-        cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+
+        cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
-        writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
+        writememl(easeg, cpu_state.eaaddr, op->l[0]);
         if (cpu_state.abrt)
             return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+
         CLOCK_CYCLES(2);
     }
+
     return 0;
 }
 #endif
@@ -226,162 +238,164 @@ static int
 opMOVQ_q_mm_a16(uint32_t fetchdat)
 {
     uint64_t dst;
-    MMX_REG src, op;
+    MMX_REG src;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
-            op.q = src.q;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmemq(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.q = dst;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
         }
+
+        op->q = src.q;
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmemq(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            cpu_state.MM[cpu_reg].q = dst;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        dst = readmemq(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        op->q = dst;
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opMOVQ_q_mm_a32(uint32_t fetchdat)
 {
     uint64_t dst;
-    MMX_REG src, op;
+    MMX_REG src;
+    MMX_REG *op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
-            op.q = src.q;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmemq(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            op.q = dst;
-            fpu_state.st_space[cpu_reg].fraction = op.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
         }
+
+        op->q = src.q;
+        CLOCK_CYCLES(1);
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            dst = readmemq(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            cpu_state.MM[cpu_reg].q = dst;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        dst = readmemq(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        op->q = dst;
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opMOVQ_mm_q_a16(uint32_t fetchdat)
 {
+    MMX_REG src;
+    MMX_REG *dst;
+
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
-            writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            CLOCK_CYCLES(2);
         }
+
+        dst->q = src.q;
+        CLOCK_CYCLES(1);
+
+        if (fpu_softfloat)
+            fpu_state.st_space[cpu_rm].exp = 0xffff;
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
-            writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
-            if (cpu_state.abrt)
-                return 1;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_WRITE(cpu_state.ea_seg);
+        CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
+        writememq(easeg, cpu_state.eaaddr, src.q);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        CLOCK_CYCLES(2);
     }
+
     return 0;
 }
 static int
 opMOVQ_mm_q_a32(uint32_t fetchdat)
 {
+    MMX_REG src;
+    MMX_REG *dst;
+
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        if (cpu_mod == 3) {
+
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
             fpu_state.tag = 0;
             fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
-            writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            CLOCK_CYCLES(2);
         }
+
+        dst->q = src.q;
+        CLOCK_CYCLES(1);
+
+        if (fpu_softfloat)
+            fpu_state.st_space[cpu_rm].exp = 0xffff;
     } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_WRITE(cpu_state.ea_seg);
-            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
-            writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
-            if (cpu_state.abrt)
-                return 1;
-            CLOCK_CYCLES(2);
+        SEG_CHECK_WRITE(cpu_state.ea_seg);
+        CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
+        writememq(easeg, cpu_state.eaaddr, src.q);
+        if (cpu_state.abrt)
+            return 1;
+
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+
+        CLOCK_CYCLES(2);
     }
+
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h
index 25bc85a9a..a768a0183 100644
--- a/src/cpu/x86_ops_mmx_pack.h
+++ b/src/cpu/x86_ops_mmx_pack.h
@@ -2,635 +2,563 @@ static int
 opPUNPCKLDQ_a16(uint32_t fetchdat)
 {
     uint32_t usrc;
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        if (cpu_mod == 3) {
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            dst.l[1] = src.l[0];
-            fpu_state.st_space[cpu_reg].fraction = dst.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            dst.l[1] = src.l[0];
-            fpu_state.st_space[cpu_reg].fraction = dst.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
-        }
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            usrc = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].l[1] = usrc;
 
-            CLOCK_CYCLES(2);
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+        dst->l[1] = src.l[0];
+        CLOCK_CYCLES(1);
+    } else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        usrc = readmeml(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 0;
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+        dst->l[1] = usrc;
+
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKLDQ_a32(uint32_t fetchdat)
 {
     uint32_t usrc;
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        if (cpu_mod == 3) {
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            dst.l[1] = src.l[0];
-            fpu_state.st_space[cpu_reg].fraction = dst.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 1;
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-            dst.l[1] = src.l[0];
-            fpu_state.st_space[cpu_reg].fraction = dst.q;
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
-            CLOCK_CYCLES(2);
-        }
-    } else {
-        if (cpu_mod == 3) {
-            cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
-            CLOCK_CYCLES(1);
-        } else {
-            SEG_CHECK_READ(cpu_state.ea_seg);
-            usrc = readmeml(easeg, cpu_state.eaaddr);
-            if (cpu_state.abrt)
-                return 0;
-            cpu_state.MM[cpu_reg].l[1] = usrc;
 
-            CLOCK_CYCLES(2);
+    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (cpu_mod == 3) {
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
         }
+        dst->l[1] = src.l[0];
+        CLOCK_CYCLES(1);
+    } else {
+        SEG_CHECK_READ(cpu_state.ea_seg);
+        usrc = readmeml(easeg, cpu_state.eaaddr);
+        if (cpu_state.abrt)
+            return 0;
+        if (fpu_softfloat) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        }
+        dst->l[1] = usrc;
+
+        CLOCK_CYCLES(2);
     }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPUNPCKHDQ_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = dst.l[1];
-        dst.l[1] = src.l[1];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
-        cpu_state.MM[cpu_reg].l[1] = src.l[1];
     }
+
+    dst->l[0] = dst->l[1];
+    dst->l[1] = src.l[1];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKHDQ_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.l[0] = dst.l[1];
-        dst.l[1] = src.l[1];
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
-        cpu_state.MM[cpu_reg].l[1] = src.l[1];
     }
+
+    dst->l[0] = dst->l[1];
+    dst->l[1] = src.l[1];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPUNPCKLBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[7] = src.b[3];
-        dst.b[6] = dst.b[3];
-        dst.b[5] = src.b[2];
-        dst.b[4] = dst.b[2];
-        dst.b[3] = src.b[1];
-        dst.b[2] = dst.b[1];
-        dst.b[1] = src.b[0];
-        dst.b[0] = dst.b[0];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[7] = src.b[3];
-        cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
-        cpu_state.MM[cpu_reg].b[5] = src.b[2];
-        cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
-        cpu_state.MM[cpu_reg].b[3] = src.b[1];
-        cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
-        cpu_state.MM[cpu_reg].b[1] = src.b[0];
-        cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
     }
+
+    dst->b[7] = src.b[3];
+    dst->b[6] = dst->b[3];
+    dst->b[5] = src.b[2];
+    dst->b[4] = dst->b[2];
+    dst->b[3] = src.b[1];
+    dst->b[2] = dst->b[1];
+    dst->b[1] = src.b[0];
+    dst->b[0] = dst->b[0];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKLBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[7] = src.b[3];
-        dst.b[6] = dst.b[3];
-        dst.b[5] = src.b[2];
-        dst.b[4] = dst.b[2];
-        dst.b[3] = src.b[1];
-        dst.b[2] = dst.b[1];
-        dst.b[1] = src.b[0];
-        dst.b[0] = dst.b[0];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[7] = src.b[3];
-        cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
-        cpu_state.MM[cpu_reg].b[5] = src.b[2];
-        cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
-        cpu_state.MM[cpu_reg].b[3] = src.b[1];
-        cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
-        cpu_state.MM[cpu_reg].b[1] = src.b[0];
-        cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
     }
+
+    dst->b[7] = src.b[3];
+    dst->b[6] = dst->b[3];
+    dst->b[5] = src.b[2];
+    dst->b[4] = dst->b[2];
+    dst->b[3] = src.b[1];
+    dst->b[2] = dst->b[1];
+    dst->b[1] = src.b[0];
+    dst->b[0] = dst->b[0];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPUNPCKHBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[0] = dst.b[4];
-        dst.b[1] = src.b[4];
-        dst.b[2] = dst.b[5];
-        dst.b[3] = src.b[5];
-        dst.b[4] = dst.b[6];
-        dst.b[5] = src.b[6];
-        dst.b[6] = dst.b[7];
-        dst.b[7] = src.b[7];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
-        cpu_state.MM[cpu_reg].b[1] = src.b[4];
-        cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
-        cpu_state.MM[cpu_reg].b[3] = src.b[5];
-        cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
-        cpu_state.MM[cpu_reg].b[5] = src.b[6];
-        cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
-        cpu_state.MM[cpu_reg].b[7] = src.b[7];
     }
+
+    dst->b[0] = dst->b[4];
+    dst->b[1] = src.b[4];
+    dst->b[2] = dst->b[5];
+    dst->b[3] = src.b[5];
+    dst->b[4] = dst->b[6];
+    dst->b[5] = src.b[6];
+    dst->b[6] = dst->b[7];
+    dst->b[7] = src.b[7];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKHBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[0] = dst.b[4];
-        dst.b[1] = src.b[4];
-        dst.b[2] = dst.b[5];
-        dst.b[3] = src.b[5];
-        dst.b[4] = dst.b[6];
-        dst.b[5] = src.b[6];
-        dst.b[6] = dst.b[7];
-        dst.b[7] = src.b[7];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
-        cpu_state.MM[cpu_reg].b[1] = src.b[4];
-        cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
-        cpu_state.MM[cpu_reg].b[3] = src.b[5];
-        cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
-        cpu_state.MM[cpu_reg].b[5] = src.b[6];
-        cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
-        cpu_state.MM[cpu_reg].b[7] = src.b[7];
     }
+
+    dst->b[0] = dst->b[4];
+    dst->b[1] = src.b[4];
+    dst->b[2] = dst->b[5];
+    dst->b[3] = src.b[5];
+    dst->b[4] = dst->b[6];
+    dst->b[5] = src.b[6];
+    dst->b[6] = dst->b[7];
+    dst->b[7] = src.b[7];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPUNPCKLWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.w[3] = src.w[1];
-        dst.w[2] = dst.w[1];
-        dst.w[1] = src.w[0];
-        dst.w[0] = dst.w[0];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[3] = src.w[1];
-        cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
-        cpu_state.MM[cpu_reg].w[1] = src.w[0];
-        cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
     }
+
+    dst->w[3] = src.w[1];
+    dst->w[2] = dst->w[1];
+    dst->w[1] = src.w[0];
+    dst->w[0] = dst->w[0];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKLWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.w[3] = src.w[1];
-        dst.w[2] = dst.w[1];
-        dst.w[1] = src.w[0];
-        dst.w[0] = dst.w[0];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[3] = src.w[1];
-        cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
-        cpu_state.MM[cpu_reg].w[1] = src.w[0];
-        cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
     }
+
+    dst->w[3] = src.w[1];
+    dst->w[2] = dst->w[1];
+    dst->w[1] = src.w[0];
+    dst->w[0] = dst->w[0];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPUNPCKHWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.w[0] = dst.w[2];
-        dst.w[1] = src.w[2];
-        dst.w[2] = dst.w[3];
-        dst.w[3] = src.w[3];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
-        cpu_state.MM[cpu_reg].w[1] = src.w[2];
-        cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
-        cpu_state.MM[cpu_reg].w[3] = src.w[3];
     }
+
+    dst->w[0] = dst->w[2];
+    dst->w[1] = src.w[2];
+    dst->w[2] = dst->w[3];
+    dst->w[3] = src.w[3];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPUNPCKHWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat)
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
 
     MMX_GETSRC();
 
     if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.w[0] = dst.w[2];
-        dst.w[1] = src.w[2];
-        dst.w[2] = dst.w[3];
-        dst.w[3] = src.w[3];
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
-        cpu_state.MM[cpu_reg].w[1] = src.w[2];
-        cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
-        cpu_state.MM[cpu_reg].w[3] = src.w[3];
     }
+
+    dst->w[0] = dst->w[2];
+    dst->w[1] = src.w[2];
+    dst->w[2] = dst->w[3];
+    dst->w[3] = src.w[3];
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPACKSSWB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.sb[0] = SSATB(dst.sw[0]);
-        dst.sb[1] = SSATB(dst.sw[1]);
-        dst.sb[2] = SSATB(dst.sw[2]);
-        dst.sb[3] = SSATB(dst.sw[3]);
-        dst.sb[4] = SSATB(src.sw[0]);
-        dst.sb[5] = SSATB(src.sw[1]);
-        dst.sb[6] = SSATB(src.sw[2]);
-        dst.sb[7] = SSATB(src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
     }
+
+    dst->sb[0] = SSATB(dst->sw[0]);
+    dst->sb[1] = SSATB(dst->sw[1]);
+    dst->sb[2] = SSATB(dst->sw[2]);
+    dst->sb[3] = SSATB(dst->sw[3]);
+    dst->sb[4] = SSATB(src.sw[0]);
+    dst->sb[5] = SSATB(src.sw[1]);
+    dst->sb[6] = SSATB(src.sw[2]);
+    dst->sb[7] = SSATB(src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPACKSSWB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.sb[0] = SSATB(dst.sw[0]);
-        dst.sb[1] = SSATB(dst.sw[1]);
-        dst.sb[2] = SSATB(dst.sw[2]);
-        dst.sb[3] = SSATB(dst.sw[3]);
-        dst.sb[4] = SSATB(src.sw[0]);
-        dst.sb[5] = SSATB(src.sw[1]);
-        dst.sb[6] = SSATB(src.sw[2]);
-        dst.sb[7] = SSATB(src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
-        cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
-        cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
-        cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
-        cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
-        cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
-        cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
-        cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
     }
+
+    dst->sb[0] = SSATB(dst->sw[0]);
+    dst->sb[1] = SSATB(dst->sw[1]);
+    dst->sb[2] = SSATB(dst->sw[2]);
+    dst->sb[3] = SSATB(dst->sw[3]);
+    dst->sb[4] = SSATB(src.sw[0]);
+    dst->sb[5] = SSATB(src.sw[1]);
+    dst->sb[6] = SSATB(src.sw[2]);
+    dst->sb[7] = SSATB(src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPACKUSWB_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[0] = USATB(dst.sw[0]);
-        dst.b[1] = USATB(dst.sw[1]);
-        dst.b[2] = USATB(dst.sw[2]);
-        dst.b[3] = USATB(dst.sw[3]);
-        dst.b[4] = USATB(src.sw[0]);
-        dst.b[5] = USATB(src.sw[1]);
-        dst.b[6] = USATB(src.sw[2]);
-        dst.b[7] = USATB(src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
     }
+
+    dst->b[0] = USATB(dst->sw[0]);
+    dst->b[1] = USATB(dst->sw[1]);
+    dst->b[2] = USATB(dst->sw[2]);
+    dst->b[3] = USATB(dst->sw[3]);
+    dst->b[4] = USATB(src.sw[0]);
+    dst->b[5] = USATB(src.sw[1]);
+    dst->b[6] = USATB(src.sw[2]);
+    dst->b[7] = USATB(src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPACKUSWB_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        dst.b[0] = USATB(dst.sw[0]);
-        dst.b[1] = USATB(dst.sw[1]);
-        dst.b[2] = USATB(dst.sw[2]);
-        dst.b[3] = USATB(dst.sw[3]);
-        dst.b[4] = USATB(src.sw[0]);
-        dst.b[5] = USATB(src.sw[1]);
-        dst.b[6] = USATB(src.sw[2]);
-        dst.b[7] = USATB(src.sw[3]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
-        cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
-        cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
-        cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
-        cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
-        cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
-        cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
-        cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
     }
+
+    dst->b[0] = USATB(dst->sw[0]);
+    dst->b[1] = USATB(dst->sw[1]);
+    dst->b[2] = USATB(dst->sw[2]);
+    dst->b[3] = USATB(dst->sw[3]);
+    dst->b[4] = USATB(src.sw[0]);
+    dst->b[5] = USATB(src.sw[1]);
+    dst->b[6] = USATB(src.sw[2]);
+    dst->b[7] = USATB(src.sw[3]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPACKSSDW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst, dst2;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst2 = *dst;
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sl[0]);
-        dst.sw[1] = SSATW(dst.sl[1]);
-        dst.sw[2] = SSATW(src.sl[0]);
-        dst.sw[3] = SSATW(src.sl[1]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
     }
+
+    dst->sw[0] = SSATW(dst2.sl[0]);
+    dst->sw[1] = SSATW(dst2.sl[1]);
+    dst->sw[2] = SSATW(src.sl[0]);
+    dst->sw[3] = SSATW(src.sl[1]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPACKSSDW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG src;
+    MMX_REG *dst, dst2;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst2 = *dst;
+
     MMX_GETSRC();
 
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-
-        dst.sw[0] = SSATW(dst.sl[0]);
-        dst.sw[1] = SSATW(dst.sl[1]);
-        dst.sw[2] = SSATW(src.sl[0]);
-        dst.sw[3] = SSATW(src.sl[1]);
-
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        dst = cpu_state.MM[cpu_reg];
-
-        cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
-        cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
-        cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
-        cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
     }
+
+    dst->sw[0] = SSATW(dst2.sl[0]);
+    dst->sw[1] = SSATW(dst2.sl[1]);
+    dst->sw[2] = SSATW(src.sl[0]);
+    dst->sw[3] = SSATW(src.sl[1]);
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h
index a3ede0021..e0c9f89a5 100644
--- a/src/cpu/x86_ops_mmx_shift.h
+++ b/src/cpu/x86_ops_mmx_shift.h
@@ -1,13 +1,13 @@
-#define MMX_GETSHIFT()                             \
-    if (cpu_mod == 3) {                            \
-        shift = cpu_state.MM[cpu_rm].b[0];         \
-        CLOCK_CYCLES(1);                           \
-    } else {                                       \
-        SEG_CHECK_READ(cpu_state.ea_seg);          \
-        shift = readmemb(easeg, cpu_state.eaaddr); \
-        if (cpu_state.abrt)                        \
-            return 0;                              \
-        CLOCK_CYCLES(2);                           \
+#define MMX_GETSHIFT()                                                                                                \
+    if (cpu_mod == 3) {                                                                                               \
+        shift = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction).b[0] : cpu_state.MM[cpu_rm].b[0]; \
+        CLOCK_CYCLES(1);                                                                                              \
+    } else {                                                                                                          \
+        SEG_CHECK_READ(cpu_state.ea_seg);                                                                             \
+        shift = readmemb(easeg, cpu_state.eaaddr);                                                                    \
+        if (cpu_state.abrt)                                                                                           \
+            return 0;                                                                                                 \
+        CLOCK_CYCLES(2);                                                                                              \
     }
 
 static int
@@ -16,80 +16,44 @@ opPSxxW_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
-    MMX_REG dst;
+    MMX_REG *dst;
 
     cpu_state.pc += 2;
     MMX_ENTER();
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
     }
 
     switch (op) {
         case 0x10: /*PSRLW*/
-            if (fpu_softfloat) {
-                if (shift > 15)
-                    dst.q = 0;
-                else {
-                    dst.w[0] >>= shift;
-                    dst.w[1] >>= shift;
-                    dst.w[2] >>= shift;
-                    dst.w[3] >>= shift;
-                }
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 15)
-                    cpu_state.MM[reg].q = 0;
-                else {
-                    cpu_state.MM[reg].w[0] >>= shift;
-                    cpu_state.MM[reg].w[1] >>= shift;
-                    cpu_state.MM[reg].w[2] >>= shift;
-                    cpu_state.MM[reg].w[3] >>= shift;
-                }
+            if (shift > 15)
+                dst->q = 0;
+            else {
+                dst->w[0] >>= shift;
+                dst->w[1] >>= shift;
+                dst->w[2] >>= shift;
+                dst->w[3] >>= shift;
             }
             break;
         case 0x20: /*PSRAW*/
-            if (fpu_softfloat) {
-                if (shift > 15)
-                    shift = 15;
-                dst.sw[0] >>= shift;
-                dst.sw[1] >>= shift;
-                dst.sw[2] >>= shift;
-                dst.sw[3] >>= shift;
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 15)
-                    shift = 15;
-                cpu_state.MM[reg].sw[0] >>= shift;
-                cpu_state.MM[reg].sw[1] >>= shift;
-                cpu_state.MM[reg].sw[2] >>= shift;
-                cpu_state.MM[reg].sw[3] >>= shift;
-            }
+            if (shift > 15)
+                shift = 15;
+            dst->sw[0] >>= shift;
+            dst->sw[1] >>= shift;
+            dst->sw[2] >>= shift;
+            dst->sw[3] >>= shift;
             break;
         case 0x30: /*PSLLW*/
-            if (fpu_softfloat) {
-                if (shift > 15)
-                    dst.q = 0;
-                else {
-                    dst.w[0] <<= shift;
-                    dst.w[1] <<= shift;
-                    dst.w[2] <<= shift;
-                    dst.w[3] <<= shift;
-                }
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 15)
-                    cpu_state.MM[reg].q = 0;
-                else {
-                    cpu_state.MM[reg].w[0] <<= shift;
-                    cpu_state.MM[reg].w[1] <<= shift;
-                    cpu_state.MM[reg].w[2] <<= shift;
-                    cpu_state.MM[reg].w[3] <<= shift;
-                }
+            if (shift > 15)
+                dst->q = 0;
+            else {
+                dst->w[0] <<= shift;
+                dst->w[1] <<= shift;
+                dst->w[2] <<= shift;
+                dst->w[3] <<= shift;
             }
             break;
         default:
@@ -98,6 +62,9 @@ opPSxxW_imm(uint32_t fetchdat)
             return 0;
     }
 
+    if (fpu_softfloat)
+        fpu_state.st_space[reg].exp = 0xffff;
+
     CLOCK_CYCLES(1);
     return 0;
 }
@@ -105,239 +72,199 @@ opPSxxW_imm(uint32_t fetchdat)
 static int
 opPSLLW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    MMX_GETSHIFT();
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.w[0] <<= shift;
-            dst.w[1] <<= shift;
-            dst.w[2] <<= shift;
-            dst.w[3] <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].w[0] <<= shift;
-            cpu_state.MM[cpu_reg].w[1] <<= shift;
-            cpu_state.MM[cpu_reg].w[2] <<= shift;
-            cpu_state.MM[cpu_reg].w[3] <<= shift;
-        }
     }
+
+    if (shift > 15)
+        dst->q = 0;
+    else {
+        dst->w[0] <<= shift;
+        dst->w[1] <<= shift;
+        dst->w[2] <<= shift;
+        dst->w[3] <<= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSLLW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    MMX_GETSHIFT();
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.w[0] <<= shift;
-            dst.w[1] <<= shift;
-            dst.w[2] <<= shift;
-            dst.w[3] <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].w[0] <<= shift;
-            cpu_state.MM[cpu_reg].w[1] <<= shift;
-            cpu_state.MM[cpu_reg].w[2] <<= shift;
-            cpu_state.MM[cpu_reg].w[3] <<= shift;
-        }
     }
+
+    if (shift > 15)
+        dst->q = 0;
+    else {
+        dst->w[0] <<= shift;
+        dst->w[1] <<= shift;
+        dst->w[2] <<= shift;
+        dst->w[3] <<= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSRLW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.w[0] >>= shift;
-            dst.w[1] >>= shift;
-            dst.w[2] >>= shift;
-            dst.w[3] >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].w[0] >>= shift;
-            cpu_state.MM[cpu_reg].w[1] >>= shift;
-            cpu_state.MM[cpu_reg].w[2] >>= shift;
-            cpu_state.MM[cpu_reg].w[3] >>= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 15)
+        dst->q = 0;
+    else {
+        dst->w[0] >>= shift;
+        dst->w[1] >>= shift;
+        dst->w[2] >>= shift;
+        dst->w[3] >>= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSRLW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.w[0] >>= shift;
-            dst.w[1] >>= shift;
-            dst.w[2] >>= shift;
-            dst.w[3] >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].w[0] >>= shift;
-            cpu_state.MM[cpu_reg].w[1] >>= shift;
-            cpu_state.MM[cpu_reg].w[2] >>= shift;
-            cpu_state.MM[cpu_reg].w[3] >>= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 15)
+        dst->q = 0;
+    else {
+        dst->w[0] >>= shift;
+        dst->w[1] >>= shift;
+        dst->w[2] >>= shift;
+        dst->w[3] >>= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSRAW_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            src.q = 15;
-        }
-        shift = src.b[0];
-        dst.sw[0] >>= shift;
-        dst.sw[1] >>= shift;
-        dst.sw[2] >>= shift;
-        dst.sw[3] >>= shift;
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            shift = 15;
-
-        cpu_state.MM[cpu_reg].sw[0] >>= shift;
-        cpu_state.MM[cpu_reg].sw[1] >>= shift;
-        cpu_state.MM[cpu_reg].sw[2] >>= shift;
-        cpu_state.MM[cpu_reg].sw[3] >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 15)
+        shift = 15;
+
+    dst->sw[0] >>= shift;
+    dst->sw[1] >>= shift;
+    dst->sw[2] >>= shift;
+    dst->sw[3] >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSRAW_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 15) {
-            src.q = 15;
-        }
-        shift = src.b[0];
-        dst.sw[0] >>= shift;
-        dst.sw[1] >>= shift;
-        dst.sw[2] >>= shift;
-        dst.sw[3] >>= shift;
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 15)
-            shift = 15;
-
-        cpu_state.MM[cpu_reg].sw[0] >>= shift;
-        cpu_state.MM[cpu_reg].sw[1] >>= shift;
-        cpu_state.MM[cpu_reg].sw[2] >>= shift;
-        cpu_state.MM[cpu_reg].sw[3] >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 15)
+        shift = 15;
+
+    dst->sw[0] >>= shift;
+    dst->sw[1] >>= shift;
+    dst->sw[2] >>= shift;
+    dst->sw[3] >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
@@ -347,68 +274,39 @@ opPSxxD_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
-    MMX_REG dst;
+    MMX_REG *dst;
 
     cpu_state.pc += 2;
     MMX_ENTER();
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
     }
 
     switch (op) {
         case 0x10: /*PSRLD*/
-            if (fpu_softfloat) {
-                if (shift > 31)
-                    dst.q = 0;
-                else {
-                    dst.l[0] >>= shift;
-                    dst.l[1] >>= shift;
-                }
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 31)
-                    cpu_state.MM[reg].q = 0;
-                else {
-                    cpu_state.MM[reg].l[0] >>= shift;
-                    cpu_state.MM[reg].l[1] >>= shift;
-                }
+            if (shift > 31)
+                dst->q = 0;
+            else {
+                dst->l[0] >>= shift;
+                dst->l[1] >>= shift;
             }
             break;
         case 0x20: /*PSRAD*/
-            if (fpu_softfloat) {
-                if (shift > 31)
-                    shift = 31;
-                dst.sl[0] >>= shift;
-                dst.sl[1] >>= shift;
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 31)
-                    shift = 31;
-                cpu_state.MM[reg].sl[0] >>= shift;
-                cpu_state.MM[reg].sl[1] >>= shift;
-            }
+            if (shift > 31)
+                shift = 31;
+            dst->sl[0] >>= shift;
+            dst->sl[1] >>= shift;
             break;
         case 0x30: /*PSLLD*/
-            if (fpu_softfloat) {
-                if (shift > 31)
-                    dst.q = 0;
-                else {
-                    dst.l[0] <<= shift;
-                    dst.l[1] <<= shift;
-                }
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 31)
-                    cpu_state.MM[reg].q = 0;
-                else {
-                    cpu_state.MM[reg].l[0] <<= shift;
-                    cpu_state.MM[reg].l[1] <<= shift;
-                }
+            if (shift > 31)
+                dst->q = 0;
+            else {
+                dst->l[0] <<= shift;
+                dst->l[1] <<= shift;
             }
             break;
         default:
@@ -417,6 +315,9 @@ opPSxxD_imm(uint32_t fetchdat)
             return 0;
     }
 
+    if (fpu_softfloat)
+        fpu_state.st_space[reg].exp = 0xffff;
+
     CLOCK_CYCLES(1);
     return 0;
 }
@@ -424,215 +325,187 @@ opPSxxD_imm(uint32_t fetchdat)
 static int
 opPSLLD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.l[0] <<= shift;
-            dst.l[1] <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].l[0] <<= shift;
-            cpu_state.MM[cpu_reg].l[1] <<= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        dst->q = 0;
+    else {
+        dst->l[0] <<= shift;
+        dst->l[1] <<= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSLLD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.l[0] <<= shift;
-            dst.l[1] <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].l[0] <<= shift;
-            cpu_state.MM[cpu_reg].l[1] <<= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        dst->q = 0;
+    else {
+        dst->l[0] <<= shift;
+        dst->l[1] <<= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSRLD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.l[0] >>= shift;
-            dst.l[1] >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].l[0] >>= shift;
-            cpu_state.MM[cpu_reg].l[1] >>= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        dst->q = 0;
+    else {
+        dst->l[0] >>= shift;
+        dst->l[1] >>= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSRLD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.l[0] >>= shift;
-            dst.l[1] >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            cpu_state.MM[cpu_reg].q = 0;
-        else {
-            cpu_state.MM[cpu_reg].l[0] >>= shift;
-            cpu_state.MM[cpu_reg].l[1] >>= shift;
-        }
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        dst->q = 0;
+    else {
+        dst->l[0] >>= shift;
+        dst->l[1] >>= shift;
+    }
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSRAD_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            src.q = 31;
-        }
-        shift = src.b[0];
-        dst.sl[0] >>= shift;
-        dst.sl[1] >>= shift;
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            shift = 31;
-
-        cpu_state.MM[cpu_reg].sl[0] >>= shift;
-        cpu_state.MM[cpu_reg].sl[1] >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        shift = 31;
+
+    dst->sl[0] >>= shift;
+    dst->sl[1] >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSRAD_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 31) {
-            src.q = 31;
-        }
-        shift = src.b[0];
-        dst.sl[0] >>= shift;
-        dst.sl[1] >>= shift;
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 31)
-            shift = 31;
-
-        cpu_state.MM[cpu_reg].sl[0] >>= shift;
-        cpu_state.MM[cpu_reg].sl[1] >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 31)
+        shift = 31;
+
+    dst->sl[0] >>= shift;
+    dst->sl[1] >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
@@ -642,59 +515,37 @@ opPSxxQ_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
-    MMX_REG dst;
+    MMX_REG *dst;
 
     cpu_state.pc += 2;
+
     MMX_ENTER();
+
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
+
     if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
     }
 
     switch (op) {
         case 0x10: /*PSRLW*/
-            if (fpu_softfloat) {
-                if (shift > 63)
-                    dst.q = 0;
-                else
-                    dst.q >>= shift;
-
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 63)
-                    cpu_state.MM[reg].q = 0;
-                else
-                    cpu_state.MM[reg].q >>= shift;
-            }
+            if (shift > 63)
+                dst->q = 0;
+            else
+                dst->q >>= shift;
             break;
         case 0x20: /*PSRAW*/
             if (shift > 63)
                 shift = 63;
 
-            if (fpu_softfloat) {
-                dst.sq >>= shift;
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else
-                cpu_state.MM[reg].sq >>= shift;
+            dst->sq >>= shift;
             break;
         case 0x30: /*PSLLW*/
-            if (fpu_softfloat) {
-                if (shift > 63)
-                    dst.q = 0;
-                else
-                    dst.q <<= shift;
-
-                fpu_state.st_space[reg].fraction = dst.q;
-                fpu_state.st_space[reg].exp = 0xffff;
-            } else {
-                if (shift > 63)
-                    cpu_state.MM[reg].q = 0;
-                else
-                    cpu_state.MM[reg].q <<= shift;
-            }
+            if (shift > 63)
+                dst->q = 0;
+            else
+                dst->q <<= shift;
             break;
         default:
             cpu_state.pc = cpu_state.oldpc;
@@ -702,6 +553,9 @@ opPSxxQ_imm(uint32_t fetchdat)
             return 0;
     }
 
+    if (fpu_softfloat)
+        fpu_state.st_space[reg].exp = 0xffff;
+
     CLOCK_CYCLES(1);
     return 0;
 }
@@ -709,133 +563,117 @@ opPSxxQ_imm(uint32_t fetchdat)
 static int
 opPSLLQ_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 63) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.q <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 63)
-            cpu_state.MM[cpu_reg].q = 0;
-        else
-            cpu_state.MM[cpu_reg].q <<= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 63)
+        dst->q = 0;
+    else
+        dst->q <<= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSLLQ_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 63) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.q <<= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 63)
-            cpu_state.MM[cpu_reg].q = 0;
-        else
-            cpu_state.MM[cpu_reg].q <<= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 63)
+        dst->q = 0;
+    else
+        dst->q <<= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 
 static int
 opPSRLQ_a16(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 63) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.q >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 63)
-            cpu_state.MM[cpu_reg].q = 0;
-        else
-            cpu_state.MM[cpu_reg].q >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 63)
+        dst->q = 0;
+    else
+        dst->q >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }
 static int
 opPSRLQ_a32(uint32_t fetchdat)
 {
-    MMX_REG src, dst;
+    MMX_REG *dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
-    if (fpu_softfloat) {
-        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
-        MMX_GETSRC();
 
+    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+
+    if (fpu_softfloat) {
         fpu_state.tag = 0;
         fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        if (src.q > 63) {
-            dst.q = 0;
-        } else {
-            shift = src.b[0];
-            dst.q >>= shift;
-        }
-        fpu_state.st_space[cpu_reg].fraction = dst.q;
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
-    } else {
-        MMX_GETSHIFT();
-
-        if (shift > 63)
-            cpu_state.MM[cpu_reg].q = 0;
-        else
-            cpu_state.MM[cpu_reg].q >>= shift;
     }
+
+    MMX_GETSHIFT();
+
+    if (shift > 63)
+        dst->q = 0;
+    else
+        dst->q >>= shift;
+
+    if (fpu_softfloat)
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+
     return 0;
 }

From 8b4a2a6ecc590958b0134a0a13fe775e9bbaf3c4 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:01:11 +0200
Subject: [PATCH 04/15] Part 2.

---
 src/cpu/x86_ops_mmx.h       |  12 +-
 src/cpu/x86_ops_mmx_arith.h | 319 +++++++++---------------------------
 src/cpu/x86_ops_mmx_cmp.h   | 120 +++-----------
 src/cpu/x86_ops_mmx_logic.h |  80 ++-------
 src/cpu/x86_ops_mmx_mov.h   | 146 +++--------------
 src/cpu/x86_ops_mmx_pack.h  | 196 +++++-----------------
 src/cpu/x86_ops_mmx_shift.h | 210 ++++++------------------
 src/cpu/x87.h               |  20 ++-
 8 files changed, 246 insertions(+), 857 deletions(-)

diff --git a/src/cpu/x86_ops_mmx.h b/src/cpu/x86_ops_mmx.h
index 9942f653f..77df5d990 100644
--- a/src/cpu/x86_ops_mmx.h
+++ b/src/cpu/x86_ops_mmx.h
@@ -3,12 +3,16 @@
 #define USATB(val) (((val) < 0) ? 0 : (((val) > 255) ? 255 : (val)))
 #define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val)))
 
+#define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r])
+#define MMX_GETREG(r) fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[r].fraction) : cpu_state.MM[r]
+
+#define MMX_SETEXP()   \
+    if (fpu_softfloat) \
+        fpu_state.st_space[cpu_reg].exp = 0xffff
+
 #define MMX_GETSRC()                               \
     if (cpu_mod == 3) {                            \
-        if (fpu_softfloat) \
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; \
-        else \
-            src = cpu_state.MM[cpu_rm];                \
+        src = MMX_GETREG(cpu_rm);                  \
         CLOCK_CYCLES(1);                           \
     } else {                                       \
         SEG_CHECK_READ(cpu_state.ea_seg);          \
diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h
index 3ebe960f9..66ff79cd2 100644
--- a/src/cpu/x86_ops_mmx_arith.h
+++ b/src/cpu/x86_ops_mmx_arith.h
@@ -7,7 +7,7 @@ opPADDB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -20,8 +20,7 @@ opPADDB_a16(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -34,7 +33,7 @@ opPADDB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -47,8 +46,7 @@ opPADDB_a32(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -62,7 +60,7 @@ opPADDW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -71,8 +69,7 @@ opPADDW_a16(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -85,7 +82,7 @@ opPADDW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -94,8 +91,8 @@ opPADDW_a32(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
+
     return 0;
 }
 
@@ -108,15 +105,14 @@ opPADDD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -129,15 +125,14 @@ opPADDD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -151,15 +146,10 @@ opPADDSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
@@ -169,8 +159,7 @@ opPADDSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -183,15 +172,10 @@ opPADDSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
@@ -201,8 +185,7 @@ opPADDSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -216,15 +199,10 @@ opPADDUSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] + src.b[0]);
     dst->b[1] = USATB(dst->b[1] + src.b[1]);
     dst->b[2] = USATB(dst->b[2] + src.b[2]);
@@ -234,8 +212,7 @@ opPADDUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -248,15 +225,10 @@ opPADDUSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] + src.b[0]);
     dst->b[1] = USATB(dst->b[1] + src.b[1]);
     dst->b[2] = USATB(dst->b[2] + src.b[2]);
@@ -266,8 +238,7 @@ opPADDUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -281,22 +252,16 @@ opPADDSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -309,22 +274,16 @@ opPADDSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -338,22 +297,16 @@ opPADDUSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] + src.w[0]);
     dst->w[1] = USATW(dst->w[1] + src.w[1]);
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -366,22 +319,16 @@ opPADDUSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] + src.w[0]);
     dst->w[1] = USATW(dst->w[1] + src.w[1]);
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -395,15 +342,10 @@ opPMADDWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
         dst->l[0] = 0x80000000;
     else
@@ -414,8 +356,7 @@ opPMADDWD_a16(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -428,15 +369,10 @@ opPMADDWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
         dst->l[0] = 0x80000000;
     else
@@ -447,8 +383,7 @@ opPMADDWD_a32(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -462,15 +397,10 @@ opPMULLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -485,8 +415,7 @@ opPMULLW_a16(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -499,15 +428,10 @@ opPMULLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -522,8 +446,7 @@ opPMULLW_a32(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -537,15 +460,10 @@ opPMULHW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -560,8 +478,7 @@ opPMULHW_a16(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -574,15 +491,10 @@ opPMULHW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -597,8 +509,7 @@ opPMULHW_a32(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -612,15 +523,10 @@ opPSUBB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] -= src.b[0];
     dst->b[1] -= src.b[1];
     dst->b[2] -= src.b[2];
@@ -630,8 +536,7 @@ opPSUBB_a16(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -644,15 +549,10 @@ opPSUBB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] -= src.b[0];
     dst->b[1] -= src.b[1];
     dst->b[2] -= src.b[2];
@@ -662,8 +562,7 @@ opPSUBB_a32(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -677,22 +576,16 @@ opPSUBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] -= src.w[0];
     dst->w[1] -= src.w[1];
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -705,22 +598,16 @@ opPSUBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] -= src.w[0];
     dst->w[1] -= src.w[1];
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -734,20 +621,14 @@ opPSUBD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -760,20 +641,14 @@ opPSUBD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -787,15 +662,10 @@ opPSUBSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
@@ -805,8 +675,7 @@ opPSUBSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -819,15 +688,10 @@ opPSUBSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
@@ -837,8 +701,7 @@ opPSUBSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -852,15 +715,10 @@ opPSUBUSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] - src.b[0]);
     dst->b[1] = USATB(dst->b[1] - src.b[1]);
     dst->b[2] = USATB(dst->b[2] - src.b[2]);
@@ -870,8 +728,7 @@ opPSUBUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -884,15 +741,10 @@ opPSUBUSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] - src.b[0]);
     dst->b[1] = USATB(dst->b[1] - src.b[1]);
     dst->b[2] = USATB(dst->b[2] - src.b[2]);
@@ -902,8 +754,7 @@ opPSUBUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -917,22 +768,16 @@ opPSUBSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -945,22 +790,16 @@ opPSUBSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -974,22 +813,16 @@ opPSUBUSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] - src.w[0]);
     dst->w[1] = USATW(dst->w[1] - src.w[1]);
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -1002,22 +835,16 @@ opPSUBUSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] - src.w[0]);
     dst->w[1] = USATW(dst->w[1] - src.w[1]);
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h
index 4f64119a3..d98e56511 100644
--- a/src/cpu/x86_ops_mmx_cmp.h
+++ b/src/cpu/x86_ops_mmx_cmp.h
@@ -7,15 +7,10 @@ opPCMPEQB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
     dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
     dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
@@ -25,8 +20,7 @@ opPCMPEQB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -39,15 +33,10 @@ opPCMPEQB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
     dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
     dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
@@ -57,8 +46,7 @@ opPCMPEQB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -72,15 +60,10 @@ opPCMPGTB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
     dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
     dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
@@ -90,8 +73,7 @@ opPCMPGTB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -104,15 +86,10 @@ opPCMPGTB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
     dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
     dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
@@ -122,8 +99,7 @@ opPCMPGTB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -137,22 +113,16 @@ opPCMPEQW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
     dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -165,22 +135,16 @@ opPCMPEQW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
     dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -194,22 +158,16 @@ opPCMPGTW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
     dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -222,22 +180,16 @@ opPCMPGTW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
     dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -251,20 +203,14 @@ opPCMPEQD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -277,20 +223,14 @@ opPCMPEQD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -304,20 +244,14 @@ opPCMPGTD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -330,20 +264,14 @@ opPCMPGTD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h
index 67622a3df..d0079347a 100644
--- a/src/cpu/x86_ops_mmx_logic.h
+++ b/src/cpu/x86_ops_mmx_logic.h
@@ -7,19 +7,13 @@ opPAND_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q &= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -32,19 +26,13 @@ opPAND_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q &= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -58,19 +46,13 @@ opPANDN_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q = ~dst->q & src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -83,19 +65,13 @@ opPANDN_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q = ~dst->q & src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -109,19 +85,13 @@ opPOR_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q |= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -134,19 +104,13 @@ opPOR_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q |= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -160,19 +124,13 @@ opPXOR_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q ^= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -185,19 +143,13 @@ opPXOR_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q ^= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h
index c631c6444..d65c82693 100644
--- a/src/cpu/x86_ops_mmx_mov.h
+++ b/src/cpu/x86_ops_mmx_mov.h
@@ -7,14 +7,9 @@ opMOVD_l_mm_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = cpu_state.regs[cpu_rm].l;
         op->l[1] = 0;
         CLOCK_CYCLES(1);
@@ -24,18 +19,12 @@ opMOVD_l_mm_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = dst;
         op->l[1] = 0;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -48,14 +37,9 @@ opMOVD_l_mm_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = cpu_state.regs[cpu_rm].l;
         op->l[1] = 0;
         CLOCK_CYCLES(1);
@@ -65,18 +49,12 @@ opMOVD_l_mm_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = dst;
         op->l[1] = 0;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -89,14 +67,9 @@ opMOVD_mm_l_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -106,11 +79,6 @@ opMOVD_mm_l_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -124,14 +92,9 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -141,11 +104,6 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -166,14 +124,9 @@ opMOVD_mm_l_a16_cx(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -183,11 +136,6 @@ opMOVD_mm_l_a16_cx(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -205,14 +153,9 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -222,11 +165,6 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -244,15 +182,10 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = src.q;
         CLOCK_CYCLES(1);
     } else {
@@ -261,17 +194,11 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = dst;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -285,15 +212,10 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = src.q;
         CLOCK_CYCLES(1);
     } else {
@@ -302,17 +224,11 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = dst;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -327,20 +243,14 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+    src = MMX_GETREG(cpu_reg);
+    dst = MMX_GETREGP(cpu_rm);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        if (fpu_softfloat)
-            fpu_state.st_space[cpu_rm].exp = 0xffff;
+        MMX_SETEXP();
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
@@ -348,11 +258,6 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -368,20 +273,14 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+    src = MMX_GETREG(cpu_reg);
+    dst = MMX_GETREGP(cpu_rm);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        if (fpu_softfloat)
-            fpu_state.st_space[cpu_rm].exp = 0xffff;
+        MMX_SETEXP();
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
@@ -389,11 +288,6 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h
index a768a0183..a76ad1d0a 100644
--- a/src/cpu/x86_ops_mmx_pack.h
+++ b/src/cpu/x86_ops_mmx_pack.h
@@ -8,14 +8,10 @@ opPUNPCKLDQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = src.l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -23,17 +19,12 @@ opPUNPCKLDQ_a16(uint32_t fetchdat)
         usrc = readmeml(easeg, cpu_state.eaaddr);
         if (cpu_state.abrt)
             return 0;
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = usrc;
 
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -47,14 +38,10 @@ opPUNPCKLDQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = src.l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -62,17 +49,12 @@ opPUNPCKLDQ_a32(uint32_t fetchdat)
         usrc = readmeml(easeg, cpu_state.eaaddr);
         if (cpu_state.abrt)
             return 0;
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = usrc;
 
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -86,20 +68,14 @@ opPUNPCKHDQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -112,20 +88,14 @@ opPUNPCKHDQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -139,15 +109,10 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[7] = src.b[3];
     dst->b[6] = dst->b[3];
     dst->b[5] = src.b[2];
@@ -157,8 +122,7 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -171,15 +135,10 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[7] = src.b[3];
     dst->b[6] = dst->b[3];
     dst->b[5] = src.b[2];
@@ -189,8 +148,7 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -204,15 +162,10 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = dst->b[4];
     dst->b[1] = src.b[4];
     dst->b[2] = dst->b[5];
@@ -222,8 +175,7 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -236,15 +188,10 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = dst->b[4];
     dst->b[1] = src.b[4];
     dst->b[2] = dst->b[5];
@@ -254,8 +201,7 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -269,22 +215,16 @@ opPUNPCKLWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[3] = src.w[1];
     dst->w[2] = dst->w[1];
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -297,22 +237,16 @@ opPUNPCKLWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[3] = src.w[1];
     dst->w[2] = dst->w[1];
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -326,22 +260,16 @@ opPUNPCKHWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = dst->w[2];
     dst->w[1] = src.w[2];
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -354,22 +282,16 @@ opPUNPCKHWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = dst->w[2];
     dst->w[1] = src.w[2];
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -383,15 +305,10 @@ opPACKSSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sw[0]);
     dst->sb[1] = SSATB(dst->sw[1]);
     dst->sb[2] = SSATB(dst->sw[2]);
@@ -401,8 +318,7 @@ opPACKSSWB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -415,15 +331,10 @@ opPACKSSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sw[0]);
     dst->sb[1] = SSATB(dst->sw[1]);
     dst->sb[2] = SSATB(dst->sw[2]);
@@ -433,8 +344,7 @@ opPACKSSWB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -448,15 +358,10 @@ opPACKUSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->sw[0]);
     dst->b[1] = USATB(dst->sw[1]);
     dst->b[2] = USATB(dst->sw[2]);
@@ -466,8 +371,7 @@ opPACKUSWB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -480,15 +384,10 @@ opPACKUSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->sw[0]);
     dst->b[1] = USATB(dst->sw[1]);
     dst->b[2] = USATB(dst->sw[2]);
@@ -498,8 +397,7 @@ opPACKUSWB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -508,28 +406,23 @@ static int
 opPACKSSDW_a16(uint32_t fetchdat)
 {
     MMX_REG src;
-    MMX_REG *dst, dst2;
+    MMX_REG *dst;
+    MMX_REG dst2;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
     dst2 = *dst;
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst2.sl[0]);
     dst->sw[1] = SSATW(dst2.sl[1]);
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -537,28 +430,23 @@ static int
 opPACKSSDW_a32(uint32_t fetchdat)
 {
     MMX_REG src;
-    MMX_REG *dst, dst2;
+    MMX_REG *dst;
+    MMX_REG dst2;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
     dst2 = *dst;
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst2.sl[0]);
     dst->sw[1] = SSATW(dst2.sl[1]);
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h
index e0c9f89a5..912919064 100644
--- a/src/cpu/x86_ops_mmx_shift.h
+++ b/src/cpu/x86_ops_mmx_shift.h
@@ -1,13 +1,13 @@
-#define MMX_GETSHIFT()                                                                                                \
-    if (cpu_mod == 3) {                                                                                               \
-        shift = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction).b[0] : cpu_state.MM[cpu_rm].b[0]; \
-        CLOCK_CYCLES(1);                                                                                              \
-    } else {                                                                                                          \
-        SEG_CHECK_READ(cpu_state.ea_seg);                                                                             \
-        shift = readmemb(easeg, cpu_state.eaaddr);                                                                    \
-        if (cpu_state.abrt)                                                                                           \
-            return 0;                                                                                                 \
-        CLOCK_CYCLES(2);                                                                                              \
+#define MMX_GETSHIFT()                             \
+    if (cpu_mod == 3) {                            \
+        shift = (MMX_GETREG(cpu_rm)).b[0];         \
+        CLOCK_CYCLES(1);                           \
+    } else {                                       \
+        SEG_CHECK_READ(cpu_state.ea_seg);          \
+        shift = readmemb(easeg, cpu_state.eaaddr); \
+        if (cpu_state.abrt)                        \
+            return 0;                              \
+        CLOCK_CYCLES(2);                           \
     }
 
 static int
@@ -20,12 +20,7 @@ opPSxxW_imm(uint32_t fetchdat)
 
     cpu_state.pc += 2;
     MMX_ENTER();
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLW*/
@@ -62,8 +57,7 @@ opPSxxW_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -79,15 +73,10 @@ opPSLLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (shift > 15)
         dst->q = 0;
     else {
@@ -97,8 +86,7 @@ opPSLLW_a16(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -112,15 +100,10 @@ opPSLLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (shift > 15)
         dst->q = 0;
     else {
@@ -130,8 +113,7 @@ opPSLLW_a32(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -146,12 +128,7 @@ opPSRLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -164,8 +141,7 @@ opPSRLW_a16(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -179,12 +155,7 @@ opPSRLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -197,8 +168,7 @@ opPSRLW_a32(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -213,12 +183,7 @@ opPSRAW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -230,8 +195,7 @@ opPSRAW_a16(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -245,12 +209,7 @@ opPSRAW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -262,8 +221,7 @@ opPSRAW_a32(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -279,12 +237,7 @@ opPSxxD_imm(uint32_t fetchdat)
     cpu_state.pc += 2;
     MMX_ENTER();
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLD*/
@@ -315,8 +268,7 @@ opPSxxD_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -332,12 +284,7 @@ opPSLLD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -348,8 +295,7 @@ opPSLLD_a16(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -363,12 +309,7 @@ opPSLLD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -379,8 +320,7 @@ opPSLLD_a32(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -395,12 +335,7 @@ opPSRLD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -411,8 +346,7 @@ opPSRLD_a16(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -426,12 +360,7 @@ opPSRLD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -442,8 +371,7 @@ opPSRLD_a32(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -458,12 +386,7 @@ opPSRAD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -473,8 +396,7 @@ opPSRAD_a16(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -488,12 +410,7 @@ opPSRAD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -503,8 +420,7 @@ opPSRAD_a32(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -521,12 +437,7 @@ opPSxxQ_imm(uint32_t fetchdat)
 
     MMX_ENTER();
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLW*/
@@ -553,8 +464,7 @@ opPSxxQ_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -570,12 +480,7 @@ opPSLLQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -584,8 +489,7 @@ opPSLLQ_a16(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -599,12 +503,7 @@ opPSLLQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -613,8 +512,7 @@ opPSLLQ_a32(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -629,12 +527,7 @@ opPSRLQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -643,8 +536,7 @@ opPSRLQ_a16(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -658,12 +550,7 @@ opPSRLQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -672,8 +559,7 @@ opPSRLQ_a32(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x87.h b/src/cpu/x87.h
index 8fab28ce8..66d51dbd9 100644
--- a/src/cpu/x87.h
+++ b/src/cpu/x87.h
@@ -10,9 +10,14 @@ static __inline void
 x87_set_mmx(void)
 {
     uint64_t *p;
-    cpu_state.TOP   = 0;
-    p               = (uint64_t *) cpu_state.tag;
-    *p              = 0x0101010101010101ull;
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    } else {
+        cpu_state.TOP   = 0;
+        p               = (uint64_t *) cpu_state.tag;
+        *p              = 0x0101010101010101ull;
+    }
     cpu_state.ismmx = 1;
 }
 
@@ -20,8 +25,13 @@ static __inline void
 x87_emms(void)
 {
     uint64_t *p;
-    p               = (uint64_t *) cpu_state.tag;
-    *p              = 0;
+    if (fpu_softfloat) {
+        fpu_state.tag = 0xffff;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    } else {
+        p               = (uint64_t *) cpu_state.tag;
+        *p              = 0;
+    }
     cpu_state.ismmx = 0;
 }
 

From dd38a5a15f886abac8670ff0552a7ae5537b31a4 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:22:04 +0200
Subject: [PATCH 05/15] Part 3.

---
 src/cpu/x86_ops_3dnow.h | 216 +++++++++++++++++++++++++++-------------
 1 file changed, 145 insertions(+), 71 deletions(-)

diff --git a/src/cpu/x86_ops_3dnow.h b/src/cpu/x86_ops_3dnow.h
index eb7a35ace..3b647b69c 100644
--- a/src/cpu/x86_ops_3dnow.h
+++ b/src/cpu/x86_ops_3dnow.h
@@ -36,17 +36,20 @@ static int
 opPAVGUSB(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] + src.b[0] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] + src.b[1] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] + src.b[2] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] + src.b[3] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] + src.b[4] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] + src.b[5] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] + src.b[6] + 1) >> 1;
-    cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] + src.b[7] + 1) >> 1;
+    dst->b[0] = (dst->b[0] + src.b[0] + 1) >> 1;
+    dst->b[1] = (dst->b[1] + src.b[1] + 1) >> 1;
+    dst->b[2] = (dst->b[2] + src.b[2] + 1) >> 1;
+    dst->b[3] = (dst->b[3] + src.b[3] + 1) >> 1;
+    dst->b[4] = (dst->b[4] + src.b[4] + 1) >> 1;
+    dst->b[5] = (dst->b[5] + src.b[5] + 1) >> 1;
+    dst->b[6] = (dst->b[6] + src.b[6] + 1) >> 1;
+    dst->b[7] = (dst->b[7] + src.b[7] + 1) >> 1;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -54,11 +57,14 @@ static int
 opPF2ID(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].sl[0] = (int32_t) src.f[0];
-    cpu_state.MM[cpu_reg].sl[1] = (int32_t) src.f[1];
+    dst->sl[0] = (int32_t) src.f[0];
+    dst->sl[1] = (int32_t) src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -66,11 +72,14 @@ static int
 opPF2IW(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].sw[0] = (int32_t) src.f[0];
-    cpu_state.MM[cpu_reg].sw[1] = (int32_t) src.f[1];
+    dst->sw[0] = (int32_t) src.f[0];
+    dst->sw[1] = (int32_t) src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -78,13 +87,16 @@ static int
 opPFACC(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
     float   tempf;
 
     MMX_GETSRC();
 
-    tempf                      = cpu_state.MM[cpu_reg].f[0] + cpu_state.MM[cpu_reg].f[1];
-    cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1];
-    cpu_state.MM[cpu_reg].f[0] = tempf;
+    tempf     = dst->f[0] + dst->f[1];
+    dst->f[1] = src.f[0] + src.f[1];
+    dst->f[0] = tempf;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -92,13 +104,16 @@ static int
 opPFNACC(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
     float   tempf;
 
     MMX_GETSRC();
 
-    tempf                      = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1];
-    cpu_state.MM[cpu_reg].f[1] = src.f[0] - src.f[1];
-    cpu_state.MM[cpu_reg].f[0] = tempf;
+    tempf     = dst->f[0] - dst->f[1];
+    dst->f[1] = src.f[0] - src.f[1];
+    dst->f[0] = tempf;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -106,13 +121,16 @@ static int
 opPFPNACC(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
     float   tempf;
 
     MMX_GETSRC();
 
-    tempf                      = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1];
-    cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1];
-    cpu_state.MM[cpu_reg].f[0] = tempf;
+    tempf     = dst->f[0] - dst->f[1];
+    dst->f[1] = src.f[0] + src.f[1];
+    dst->f[0] = tempf;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -120,15 +138,18 @@ static int
 opPSWAPD(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
     float   tempf, tempf2;
 
     MMX_GETSRC();
 
     /* We have to do this in case source and destination overlap. */
-    tempf                      = src.f[0];
-    tempf2                     = src.f[1];
-    cpu_state.MM[cpu_reg].f[1] = tempf;
-    cpu_state.MM[cpu_reg].f[0] = tempf2;
+    tempf     = src.f[0];
+    tempf2    = src.f[1];
+    dst->f[1] = tempf;
+    dst->f[0] = tempf2;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -136,11 +157,14 @@ static int
 opPFADD(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] += src.f[0];
-    cpu_state.MM[cpu_reg].f[1] += src.f[1];
+    dst->f[0] += src.f[0];
+    dst->f[1] += src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -148,11 +172,14 @@ static int
 opPFCMPEQ(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] == src.f[0]) ? 0xffffffff : 0;
-    cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] == src.f[1]) ? 0xffffffff : 0;
+    dst->l[0] = (dst->f[0] == src.f[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->f[1] == src.f[1]) ? 0xffffffff : 0;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -160,11 +187,14 @@ static int
 opPFCMPGE(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] >= src.f[0]) ? 0xffffffff : 0;
-    cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] >= src.f[1]) ? 0xffffffff : 0;
+    dst->l[0] = (dst->f[0] >= src.f[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->f[1] >= src.f[1]) ? 0xffffffff : 0;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -172,11 +202,14 @@ static int
 opPFCMPGT(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] > src.f[0]) ? 0xffffffff : 0;
-    cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] > src.f[1]) ? 0xffffffff : 0;
+    dst->l[0] = (dst->f[0] > src.f[0]) ? 0xffffffff : 0;
+    dst->l[1] = (dst->f[1] > src.f[1]) ? 0xffffffff : 0;
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -184,13 +217,16 @@ static int
 opPFMAX(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (src.f[0] > cpu_state.MM[cpu_reg].f[0])
-        cpu_state.MM[cpu_reg].f[0] = src.f[0];
-    if (src.f[1] > cpu_state.MM[cpu_reg].f[1])
-        cpu_state.MM[cpu_reg].f[1] = src.f[1];
+    if (src.f[0] > dst->f[0])
+        dst->f[0] = src.f[0];
+    if (src.f[1] > dst->f[1])
+        dst->f[1] = src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -198,13 +234,16 @@ static int
 opPFMIN(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (src.f[0] < cpu_state.MM[cpu_reg].f[0])
-        cpu_state.MM[cpu_reg].f[0] = src.f[0];
-    if (src.f[1] < cpu_state.MM[cpu_reg].f[1])
-        cpu_state.MM[cpu_reg].f[1] = src.f[1];
+    if (src.f[0] < dst->f[0])
+        dst->f[0] = src.f[0];
+    if (src.f[1] < dst->f[1])
+        dst->f[1] = src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -212,24 +251,29 @@ static int
 opPFMUL(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] *= src.f[0];
-    cpu_state.MM[cpu_reg].f[1] *= src.f[1];
+    dst->f[0] *= src.f[0];
+    dst->f[1] *= src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
 static int
 opPFRCP(uint32_t fetchdat)
 {
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
+
     union {
         uint32_t i;
         float    f;
     } src;
 
     if (cpu_mod == 3) {
-        src.f = cpu_state.MM[cpu_rm].f[0];
+        src.f = (MMX_GETREG(cpu_rm)).f[0];
         CLOCK_CYCLES(1);
     } else {
         SEG_CHECK_READ(cpu_state.ea_seg);
@@ -239,8 +283,10 @@ opPFRCP(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    cpu_state.MM[cpu_reg].f[0] = 1.0 / src.f;
-    cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0];
+    dst->f[0] = 1.0 / src.f;
+    dst->f[1] = dst->f[0];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -249,11 +295,14 @@ static int
 opPFRCPIT1(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] = src.f[0];
-    cpu_state.MM[cpu_reg].f[1] = src.f[1];
+    dst->f[0] = src.f[0];
+    dst->f[1] = src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -261,24 +310,29 @@ static int
 opPFRCPIT2(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] = src.f[0];
-    cpu_state.MM[cpu_reg].f[1] = src.f[1];
+    dst->f[0] = src.f[0];
+    dst->f[1] = src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
 static int
 opPFRSQRT(uint32_t fetchdat)
 {
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
+
     union {
         uint32_t i;
         float    f;
     } src;
 
     if (cpu_mod == 3) {
-        src.f = cpu_state.MM[cpu_rm].f[0];
+        src.f = (MMX_GETREG(cpu_rm)).f[0];
         CLOCK_CYCLES(1);
     } else {
         SEG_CHECK_READ(cpu_state.ea_seg);
@@ -288,8 +342,10 @@ opPFRSQRT(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    cpu_state.MM[cpu_reg].f[0] = 1.0 / sqrt(src.f);
-    cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0];
+    dst->f[0] = 1.0 / sqrt(src.f);
+    dst->f[1] = dst->f[0];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -308,11 +364,14 @@ static int
 opPFSUB(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] -= src.f[0];
-    cpu_state.MM[cpu_reg].f[1] -= src.f[1];
+    dst->f[0] -= src.f[0];
+    dst->f[1] -= src.f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -320,11 +379,14 @@ static int
 opPFSUBR(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] = src.f[0] - cpu_state.MM[cpu_reg].f[0];
-    cpu_state.MM[cpu_reg].f[1] = src.f[1] - cpu_state.MM[cpu_reg].f[1];
+    dst->f[0] = src.f[0] - dst->f[0];
+    dst->f[1] = src.f[1] - dst->f[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -332,11 +394,14 @@ static int
 opPI2FD(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] = (float) src.sl[0];
-    cpu_state.MM[cpu_reg].f[1] = (float) src.sl[1];
+    dst->f[0] = (float) src.sl[0];
+    dst->f[1] = (float) src.sl[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
@@ -344,37 +409,46 @@ static int
 opPI2FW(uint32_t fetchdat)
 {
     MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    cpu_state.MM[cpu_reg].f[0] = (float) src.sw[0];
-    cpu_state.MM[cpu_reg].f[1] = (float) src.sw[1];
+    dst->f[0] = (float) src.sw[0];
+    dst->f[1] = (float) src.sw[1];
+
+    MMX_SETEXP();
 
     return 0;
 }
 static int
 opPMULHRW(uint32_t fetchdat)
 {
+    MMX_REG src;
+    MMX_REG *dst = MMX_GETREGP(cpu_reg);
+
     if (cpu_mod == 3) {
-        cpu_state.MM[cpu_reg].w[0] = (((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[1] = (((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[2] = (((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[3] = (((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) + 0x8000) >> 16;
+        src = MMX_GETREG(cpu_rm);
+
+        dst->w[0] = (((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
+        dst->w[1] = (((int32_t) dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
+        dst->w[2] = (((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
+        dst->w[3] = (((int32_t) dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
         CLOCK_CYCLES(1);
     } else {
-        MMX_REG src;
-
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
         src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
         if (cpu_state.abrt)
             return 0;
-        cpu_state.MM[cpu_reg].w[0] = ((int32_t) (cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[1] = ((int32_t) (cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[2] = ((int32_t) (cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
-        cpu_state.MM[cpu_reg].w[3] = ((int32_t) (cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
+        dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
+        dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
+        dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
+        dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
         CLOCK_CYCLES(2);
     }
+
+    MMX_SETEXP();
+
     return 0;
 }
 

From e47e1b62c8cda39d35481ecd196fc5b241ffdfb8 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:28:37 +0200
Subject: [PATCH 06/15] Part 4.

---
 src/cpu/x86_ops_3dnow.h     | 46 ++++++++++++-------------
 src/cpu/x86_ops_mmx.h       |  4 +--
 src/cpu/x86_ops_mmx_arith.h | 68 ++++++++++++++++++-------------------
 src/cpu/x86_ops_mmx_cmp.h   | 24 ++++++-------
 src/cpu/x86_ops_mmx_logic.h | 16 ++++-----
 src/cpu/x86_ops_mmx_mov.h   | 12 +++----
 src/cpu/x86_ops_mmx_pack.h  | 36 ++++++++++----------
 src/cpu/x86_ops_mmx_shift.h | 38 ++++++++++-----------
 8 files changed, 122 insertions(+), 122 deletions(-)

diff --git a/src/cpu/x86_ops_3dnow.h b/src/cpu/x86_ops_3dnow.h
index 3b647b69c..ff657d708 100644
--- a/src/cpu/x86_ops_3dnow.h
+++ b/src/cpu/x86_ops_3dnow.h
@@ -49,7 +49,7 @@ opPAVGUSB(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] + src.b[6] + 1) >> 1;
     dst->b[7] = (dst->b[7] + src.b[7] + 1) >> 1;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -64,7 +64,7 @@ opPF2ID(uint32_t fetchdat)
     dst->sl[0] = (int32_t) src.f[0];
     dst->sl[1] = (int32_t) src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -79,7 +79,7 @@ opPF2IW(uint32_t fetchdat)
     dst->sw[0] = (int32_t) src.f[0];
     dst->sw[1] = (int32_t) src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -96,7 +96,7 @@ opPFACC(uint32_t fetchdat)
     dst->f[1] = src.f[0] + src.f[1];
     dst->f[0] = tempf;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -113,7 +113,7 @@ opPFNACC(uint32_t fetchdat)
     dst->f[1] = src.f[0] - src.f[1];
     dst->f[0] = tempf;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -130,7 +130,7 @@ opPFPNACC(uint32_t fetchdat)
     dst->f[1] = src.f[0] + src.f[1];
     dst->f[0] = tempf;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -149,7 +149,7 @@ opPSWAPD(uint32_t fetchdat)
     dst->f[1] = tempf;
     dst->f[0] = tempf2;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -164,7 +164,7 @@ opPFADD(uint32_t fetchdat)
     dst->f[0] += src.f[0];
     dst->f[1] += src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -179,7 +179,7 @@ opPFCMPEQ(uint32_t fetchdat)
     dst->l[0] = (dst->f[0] == src.f[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->f[1] == src.f[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -194,7 +194,7 @@ opPFCMPGE(uint32_t fetchdat)
     dst->l[0] = (dst->f[0] >= src.f[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->f[1] >= src.f[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -209,7 +209,7 @@ opPFCMPGT(uint32_t fetchdat)
     dst->l[0] = (dst->f[0] > src.f[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->f[1] > src.f[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -226,7 +226,7 @@ opPFMAX(uint32_t fetchdat)
     if (src.f[1] > dst->f[1])
         dst->f[1] = src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -243,7 +243,7 @@ opPFMIN(uint32_t fetchdat)
     if (src.f[1] < dst->f[1])
         dst->f[1] = src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -258,7 +258,7 @@ opPFMUL(uint32_t fetchdat)
     dst->f[0] *= src.f[0];
     dst->f[1] *= src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -286,7 +286,7 @@ opPFRCP(uint32_t fetchdat)
     dst->f[0] = 1.0 / src.f;
     dst->f[1] = dst->f[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -302,7 +302,7 @@ opPFRCPIT1(uint32_t fetchdat)
     dst->f[0] = src.f[0];
     dst->f[1] = src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -317,7 +317,7 @@ opPFRCPIT2(uint32_t fetchdat)
     dst->f[0] = src.f[0];
     dst->f[1] = src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -345,7 +345,7 @@ opPFRSQRT(uint32_t fetchdat)
     dst->f[0] = 1.0 / sqrt(src.f);
     dst->f[1] = dst->f[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -371,7 +371,7 @@ opPFSUB(uint32_t fetchdat)
     dst->f[0] -= src.f[0];
     dst->f[1] -= src.f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -386,7 +386,7 @@ opPFSUBR(uint32_t fetchdat)
     dst->f[0] = src.f[0] - dst->f[0];
     dst->f[1] = src.f[1] - dst->f[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -401,7 +401,7 @@ opPI2FD(uint32_t fetchdat)
     dst->f[0] = (float) src.sl[0];
     dst->f[1] = (float) src.sl[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -416,7 +416,7 @@ opPI2FW(uint32_t fetchdat)
     dst->f[0] = (float) src.sw[0];
     dst->f[1] = (float) src.sw[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -447,7 +447,7 @@ opPMULHRW(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx.h b/src/cpu/x86_ops_mmx.h
index 77df5d990..9706b206c 100644
--- a/src/cpu/x86_ops_mmx.h
+++ b/src/cpu/x86_ops_mmx.h
@@ -6,9 +6,9 @@
 #define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r])
 #define MMX_GETREG(r) fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[r].fraction) : cpu_state.MM[r]
 
-#define MMX_SETEXP()   \
+#define MMX_SETEXP(r)  \
     if (fpu_softfloat) \
-        fpu_state.st_space[cpu_reg].exp = 0xffff
+        fpu_state.st_space[r].exp = 0xffff
 
 #define MMX_GETSRC()                               \
     if (cpu_mod == 3) {                            \
diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h
index 66ff79cd2..642e99c8a 100644
--- a/src/cpu/x86_ops_mmx_arith.h
+++ b/src/cpu/x86_ops_mmx_arith.h
@@ -20,7 +20,7 @@ opPADDB_a16(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -46,7 +46,7 @@ opPADDB_a32(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -69,7 +69,7 @@ opPADDW_a16(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -91,7 +91,7 @@ opPADDW_a32(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -112,7 +112,7 @@ opPADDD_a16(uint32_t fetchdat)
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -132,7 +132,7 @@ opPADDD_a32(uint32_t fetchdat)
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -159,7 +159,7 @@ opPADDSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -185,7 +185,7 @@ opPADDSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -212,7 +212,7 @@ opPADDUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -238,7 +238,7 @@ opPADDUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -261,7 +261,7 @@ opPADDSW_a16(uint32_t fetchdat)
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -283,7 +283,7 @@ opPADDSW_a32(uint32_t fetchdat)
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -306,7 +306,7 @@ opPADDUSW_a16(uint32_t fetchdat)
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -328,7 +328,7 @@ opPADDUSW_a32(uint32_t fetchdat)
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -356,7 +356,7 @@ opPMADDWD_a16(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -383,7 +383,7 @@ opPMADDWD_a32(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -415,7 +415,7 @@ opPMULLW_a16(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -446,7 +446,7 @@ opPMULLW_a32(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -478,7 +478,7 @@ opPMULHW_a16(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -509,7 +509,7 @@ opPMULHW_a32(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -536,7 +536,7 @@ opPSUBB_a16(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -562,7 +562,7 @@ opPSUBB_a32(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -585,7 +585,7 @@ opPSUBW_a16(uint32_t fetchdat)
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -607,7 +607,7 @@ opPSUBW_a32(uint32_t fetchdat)
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -628,7 +628,7 @@ opPSUBD_a16(uint32_t fetchdat)
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -648,7 +648,7 @@ opPSUBD_a32(uint32_t fetchdat)
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -675,7 +675,7 @@ opPSUBSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -701,7 +701,7 @@ opPSUBSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -728,7 +728,7 @@ opPSUBUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -754,7 +754,7 @@ opPSUBUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -777,7 +777,7 @@ opPSUBSW_a16(uint32_t fetchdat)
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -799,7 +799,7 @@ opPSUBSW_a32(uint32_t fetchdat)
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -822,7 +822,7 @@ opPSUBUSW_a16(uint32_t fetchdat)
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -844,7 +844,7 @@ opPSUBUSW_a32(uint32_t fetchdat)
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h
index d98e56511..b3081b8e8 100644
--- a/src/cpu/x86_ops_mmx_cmp.h
+++ b/src/cpu/x86_ops_mmx_cmp.h
@@ -20,7 +20,7 @@ opPCMPEQB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -46,7 +46,7 @@ opPCMPEQB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -73,7 +73,7 @@ opPCMPGTB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -99,7 +99,7 @@ opPCMPGTB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -122,7 +122,7 @@ opPCMPEQW_a16(uint32_t fetchdat)
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -144,7 +144,7 @@ opPCMPEQW_a32(uint32_t fetchdat)
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -167,7 +167,7 @@ opPCMPGTW_a16(uint32_t fetchdat)
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -189,7 +189,7 @@ opPCMPGTW_a32(uint32_t fetchdat)
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -210,7 +210,7 @@ opPCMPEQD_a16(uint32_t fetchdat)
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -230,7 +230,7 @@ opPCMPEQD_a32(uint32_t fetchdat)
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -251,7 +251,7 @@ opPCMPGTD_a16(uint32_t fetchdat)
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -271,7 +271,7 @@ opPCMPGTD_a32(uint32_t fetchdat)
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h
index d0079347a..26d7c1693 100644
--- a/src/cpu/x86_ops_mmx_logic.h
+++ b/src/cpu/x86_ops_mmx_logic.h
@@ -13,7 +13,7 @@ opPAND_a16(uint32_t fetchdat)
 
     dst->q &= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -32,7 +32,7 @@ opPAND_a32(uint32_t fetchdat)
 
     dst->q &= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -52,7 +52,7 @@ opPANDN_a16(uint32_t fetchdat)
 
     dst->q = ~dst->q & src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -71,7 +71,7 @@ opPANDN_a32(uint32_t fetchdat)
 
     dst->q = ~dst->q & src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -91,7 +91,7 @@ opPOR_a16(uint32_t fetchdat)
 
     dst->q |= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -110,7 +110,7 @@ opPOR_a32(uint32_t fetchdat)
 
     dst->q |= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -130,7 +130,7 @@ opPXOR_a16(uint32_t fetchdat)
 
     dst->q ^= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -149,7 +149,7 @@ opPXOR_a32(uint32_t fetchdat)
 
     dst->q ^= src.q;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h
index d65c82693..65bbb0c01 100644
--- a/src/cpu/x86_ops_mmx_mov.h
+++ b/src/cpu/x86_ops_mmx_mov.h
@@ -24,7 +24,7 @@ opMOVD_l_mm_a16(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -54,7 +54,7 @@ opMOVD_l_mm_a32(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -198,7 +198,7 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -228,7 +228,7 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -250,7 +250,7 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        MMX_SETEXP();
+        MMX_SETEXP(cpu_rm);
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
@@ -280,7 +280,7 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        MMX_SETEXP();
+        MMX_SETEXP(cpu_rm);
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h
index a76ad1d0a..90590638b 100644
--- a/src/cpu/x86_ops_mmx_pack.h
+++ b/src/cpu/x86_ops_mmx_pack.h
@@ -24,7 +24,7 @@ opPUNPCKLDQ_a16(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -54,7 +54,7 @@ opPUNPCKLDQ_a32(uint32_t fetchdat)
         CLOCK_CYCLES(2);
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -75,7 +75,7 @@ opPUNPCKHDQ_a16(uint32_t fetchdat)
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -95,7 +95,7 @@ opPUNPCKHDQ_a32(uint32_t fetchdat)
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -122,7 +122,7 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -148,7 +148,7 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -175,7 +175,7 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -201,7 +201,7 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -224,7 +224,7 @@ opPUNPCKLWD_a16(uint32_t fetchdat)
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -246,7 +246,7 @@ opPUNPCKLWD_a32(uint32_t fetchdat)
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -269,7 +269,7 @@ opPUNPCKHWD_a16(uint32_t fetchdat)
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -291,7 +291,7 @@ opPUNPCKHWD_a32(uint32_t fetchdat)
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -318,7 +318,7 @@ opPACKSSWB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -344,7 +344,7 @@ opPACKSSWB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -371,7 +371,7 @@ opPACKUSWB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -397,7 +397,7 @@ opPACKUSWB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -422,7 +422,7 @@ opPACKSSDW_a16(uint32_t fetchdat)
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -446,7 +446,7 @@ opPACKSSDW_a32(uint32_t fetchdat)
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h
index 912919064..c0c80e87e 100644
--- a/src/cpu/x86_ops_mmx_shift.h
+++ b/src/cpu/x86_ops_mmx_shift.h
@@ -57,7 +57,7 @@ opPSxxW_imm(uint32_t fetchdat)
             return 0;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(reg);
 
     CLOCK_CYCLES(1);
     return 0;
@@ -86,7 +86,7 @@ opPSLLW_a16(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -113,7 +113,7 @@ opPSLLW_a32(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -141,7 +141,7 @@ opPSRLW_a16(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -168,7 +168,7 @@ opPSRLW_a32(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -195,7 +195,7 @@ opPSRAW_a16(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -221,7 +221,7 @@ opPSRAW_a32(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -268,7 +268,7 @@ opPSxxD_imm(uint32_t fetchdat)
             return 0;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(reg);
 
     CLOCK_CYCLES(1);
     return 0;
@@ -295,7 +295,7 @@ opPSLLD_a16(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -320,7 +320,7 @@ opPSLLD_a32(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -346,7 +346,7 @@ opPSRLD_a16(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -371,7 +371,7 @@ opPSRLD_a32(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -396,7 +396,7 @@ opPSRAD_a16(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -420,7 +420,7 @@ opPSRAD_a32(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -464,7 +464,7 @@ opPSxxQ_imm(uint32_t fetchdat)
             return 0;
     }
 
-    MMX_SETEXP();
+    MMX_SETEXP(reg);
 
     CLOCK_CYCLES(1);
     return 0;
@@ -489,7 +489,7 @@ opPSLLQ_a16(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -512,7 +512,7 @@ opPSLLQ_a32(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -536,7 +536,7 @@ opPSRLQ_a16(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }
@@ -559,7 +559,7 @@ opPSRLQ_a32(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    MMX_SETEXP();
+    MMX_SETEXP(cpu_reg);
 
     return 0;
 }

From 1d59351c03a1f0d8cc3f53f5c771232bf406db65 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:43:54 +0200
Subject: [PATCH 07/15] Some MMX optimizations.

---
 src/cpu/CMakeLists.txt | 2 +-
 src/cpu/cpu.c          | 1 +
 src/cpu/cpu.h          | 5 +++++
 src/cpu/x86_ops_mmx.h  | 7 +++----
 src/win/Makefile.mingw | 2 +-
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/cpu/CMakeLists.txt b/src/cpu/CMakeLists.txt
index d1011504e..e4d8e71b2 100644
--- a/src/cpu/CMakeLists.txt
+++ b/src/cpu/CMakeLists.txt
@@ -14,7 +14,7 @@
 #
 
 add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c
-    386_dynarec.c x86seg.c x87.c x87_timings.c 8080.c)
+    386_dynarec.c x86_ops_mmx.c x86seg.c x87.c x87_timings.c 8080.c)
 
 if(AMD_K5)
     target_compile_definitions(cpu PRIVATE USE_AMD_K5)
diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c
index 257d23845..d633b9bb2 100644
--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -1646,6 +1646,7 @@ cpu_set(void)
         cpu_exec = exec386;
     else
         cpu_exec = execx86;
+    mmx_init();
     gdbstub_cpu_init();
 }
 
diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h
index 692600005..3d6d0622a 100644
--- a/src/cpu/cpu.h
+++ b/src/cpu/cpu.h
@@ -850,4 +850,9 @@ extern void cpu_fast_off_reset(void);
 extern void smi_raise(void);
 extern void nmi_raise(void);
 
+extern MMX_REG *MMP[8];
+extern uint16_t *MMEP[8];
+
+extern void mmx_init(void);
+
 #endif /*EMU_CPU_H*/
diff --git a/src/cpu/x86_ops_mmx.h b/src/cpu/x86_ops_mmx.h
index 9706b206c..47751d059 100644
--- a/src/cpu/x86_ops_mmx.h
+++ b/src/cpu/x86_ops_mmx.h
@@ -3,12 +3,11 @@
 #define USATB(val) (((val) < 0) ? 0 : (((val) > 255) ? 255 : (val)))
 #define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val)))
 
-#define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r])
-#define MMX_GETREG(r) fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[r].fraction) : cpu_state.MM[r]
+#define MMX_GETREGP(r) MMP[r]
+#define MMX_GETREG(r) *(MMP[r])
 
 #define MMX_SETEXP(r)  \
-    if (fpu_softfloat) \
-        fpu_state.st_space[r].exp = 0xffff
+    *(MMEP[r]) = 0xffff
 
 #define MMX_GETSRC()                               \
     if (cpu_mod == 3) {                            \
diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw
index c5f6c61ce..55306e8d8 100644
--- a/src/win/Makefile.mingw
+++ b/src/win/Makefile.mingw
@@ -553,7 +553,7 @@ CPUOBJ := $(DYNARECOBJ) \
           $(CGTOBJ) \
           cpu.o cpu_table.o fpu.o x86.o \
           8080.o 808x.o 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o \
-          x86seg.o x87.o x87_timings.o \
+          x86_ops_mmx.o x86seg.o x87.o x87_timings.o \
 	  f2xm1.o fpatan.o fprem.o fsincos.o fyl2x.o softfloat_poly.o softfloat.o softfloat16.o \
 	  softfloat-muladd.o softfloat-round-pack.o softfloat-specialize.o softfloatx80.o
 

From 3555dacec391baa636cef1c9e91172da9d555b8c Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:45:14 +0200
Subject: [PATCH 08/15] Disable MMX and 3DNow! recompilation when SoftFloat is
 in use.

---
 src/codegen/codegen_ops.c     | 48 +++++++++++++++++++++++++++++++++++
 src/codegen/codegen_ops.h     |  1 +
 src/codegen/codegen_x86-64.c  |  2 +-
 src/codegen/codegen_x86.c     |  2 +-
 src/codegen_new/codegen.c     |  6 ++---
 src/codegen_new/codegen_ops.c | 48 +++++++++++++++++++++++++++++++++++
 src/codegen_new/codegen_ops.h |  1 +
 7 files changed, 103 insertions(+), 5 deletions(-)

diff --git a/src/codegen/codegen_ops.c b/src/codegen/codegen_ops.c
index 46a49f118..894ebb100 100644
--- a/src/codegen/codegen_ops.c
+++ b/src/codegen/codegen_ops.c
@@ -128,6 +128,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
     // clang-format on
 };
 
+RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
+    // clang-format off
+        /*16-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_w,        ropJNO_w,       ropJB_w,        ropJNB_w,       ropJE_w,        ropJNE_w,       ropJBE_w,       ropJNBE_w,      ropJS_w,        ropJNS_w,       ropJP_w,        ropJNP_w,       ropJL_w,        ropJNL_w,       ropJLE_w,       ropJNLE_w,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_16,  ropPOP_FS_16,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropPUSH_GS_16,  ropPOP_GS_16,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS,         NULL,           ropLFS,         ropLGS,         ropMOVZX_w_b,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_w_b,   NULL,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+        /*32-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_l,        ropJNO_l,       ropJB_l,        ropJNB_l,       ropJE_l,        ropJNE_l,       ropJBE_l,       ropJNBE_l,      ropJS_l,        ropJNS_l,       ropJP_l,        ropJNP_l,       ropJL_l,        ropJNL_l,       ropJLE_l,       ropJNLE_l,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_32,  ropPOP_FS_32,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropPUSH_GS_32,  ropPOP_GS_32,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS,         NULL,           ropLFS,         ropLGS,         ropMOVZX_l_b,   ropMOVZX_l_w,   NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_l_b,   ropMOVSX_l_w,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+    // clang-format on
+};
+
 RecompOpFn recomp_opcodes_d8[512] = {
     // clang-format off
         /*16-bit data*/
diff --git a/src/codegen/codegen_ops.h b/src/codegen/codegen_ops.h
index f92ba4f6d..5c19fb666 100644
--- a/src/codegen/codegen_ops.h
+++ b/src/codegen/codegen_ops.h
@@ -7,6 +7,7 @@ typedef uint32_t (*RecompOpFn)(uint8_t opcode, uint32_t fetchdat, uint32_t op_32
 
 extern RecompOpFn recomp_opcodes[512];
 extern RecompOpFn recomp_opcodes_0f[512];
+extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
 extern RecompOpFn recomp_opcodes_d8[512];
 extern RecompOpFn recomp_opcodes_d9[512];
 extern RecompOpFn recomp_opcodes_da[512];
diff --git a/src/codegen/codegen_x86-64.c b/src/codegen/codegen_x86-64.c
index c02e8a7c2..3934b4ac5 100644
--- a/src/codegen/codegen_x86-64.c
+++ b/src/codegen/codegen_x86-64.c
@@ -845,7 +845,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
         switch (opcode) {
             case 0x0f:
                 op_table        = x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
diff --git a/src/codegen/codegen_x86.c b/src/codegen/codegen_x86.c
index c4b32c8a2..712fbe087 100644
--- a/src/codegen/codegen_x86.c
+++ b/src/codegen/codegen_x86.c
@@ -1884,7 +1884,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
         switch (opcode) {
             case 0x0f:
                 op_table        = x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
diff --git a/src/codegen_new/codegen.c b/src/codegen_new/codegen.c
index d49fcecbf..b0250fb7d 100644
--- a/src/codegen_new/codegen.c
+++ b/src/codegen_new/codegen.c
@@ -399,7 +399,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
                 last_prefix = 0x0f;
 #endif
                 op_table        = x86_dynarec_opcodes_0f;
-                recomp_op_table = recomp_opcodes_0f;
+                recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
                 over            = 1;
                 break;
 
@@ -634,11 +634,11 @@ generate_call:
         }
 
         opcode_3dnow = fastreadb(cs + opcode_pc);
-        if (recomp_opcodes_3DNOW[opcode_3dnow]) {
+        if (!fpu_softfloat && recomp_opcodes_3DNOW[opcode_3dnow]) {
             next_pc = opcode_pc + 1;
 
             op_table           = (OpFn *) x86_dynarec_opcodes_3DNOW;
-            recomp_op_table    = recomp_opcodes_3DNOW;
+            recomp_op_table    = fpu_softfloat ? NULL : recomp_opcodes_3DNOW;
             opcode             = opcode_3dnow;
             recomp_opcode_mask = 0xff;
             opcode_mask        = 0xff;
diff --git a/src/codegen_new/codegen_ops.c b/src/codegen_new/codegen_ops.c
index 698a7899b..ae93aa80f 100644
--- a/src/codegen_new/codegen_ops.c
+++ b/src/codegen_new/codegen_ops.c
@@ -144,6 +144,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
     // clang-format on
 };
 
+RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
+    // clang-format off
+        /*16-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_16,       ropJNO_16,      ropJB_16,       ropJNB_16,      ropJE_16,       ropJNE_16,      ropJBE_16,      ropJNBE_16,     ropJS_16,       ropJNS_16,      ropJP_16,       ropJNP_16,      ropJL_16,       ropJNL_16,      ropJLE_16,      ropJNLE_16,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_16,  ropPOP_FS_16,   NULL,           NULL,           ropSHLD_16_imm, NULL,           NULL,           NULL,           ropPUSH_GS_16,  ropPOP_GS_16,   NULL,           NULL,           ropSHRD_16_imm, NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS_16,      NULL,           ropLFS_16,      ropLGS_16,      ropMOVZX_16_8,  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_16_8,  NULL,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+        /*32-bit data*/
+/*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
+/*00*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*10*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*20*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*30*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*40*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*50*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*60*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*70*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+
+/*80*/  ropJO_32,       ropJNO_32,      ropJB_32,       ropJNB_32,      ropJE_32,       ropJNE_32,      ropJBE_32,      ropJNBE_32,     ropJS_32,       ropJNS_32,      ropJP_32,       ropJNP_32,      ropJL_32,       ropJNL_32,      ropJLE_32,      ropJNLE_32,
+/*90*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*a0*/  ropPUSH_FS_32,  ropPOP_FS_32,   NULL,           NULL,           ropSHLD_32_imm, NULL,           NULL,           NULL,           ropPUSH_GS_32,  ropPOP_GS_32,   NULL,           NULL,           ropSHRD_32_imm, NULL,           NULL,           NULL,
+/*b0*/  NULL,           NULL,           ropLSS_32,      NULL,           ropLFS_32,      ropLGS_32,      ropMOVZX_32_8,  ropMOVZX_32_16, NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           ropMOVSX_32_8,  ropMOVSX_32_16,
+
+/*c0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*d0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*e0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+/*f0*/  NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,           NULL,
+    // clang-format on
+};
+
 RecompOpFn recomp_opcodes_3DNOW[256] = {
 // clang-format off
 #if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64
diff --git a/src/codegen_new/codegen_ops.h b/src/codegen_new/codegen_ops.h
index 9cef07e15..352d95f13 100644
--- a/src/codegen_new/codegen_ops.h
+++ b/src/codegen_new/codegen_ops.h
@@ -9,6 +9,7 @@ typedef uint32_t (*RecompOpFn)(codeblock_t *block, struct ir_data_t *ir, uint8_t
 
 extern RecompOpFn recomp_opcodes[512];
 extern RecompOpFn recomp_opcodes_0f[512];
+extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
 extern RecompOpFn recomp_opcodes_3DNOW[256];
 extern RecompOpFn recomp_opcodes_d8[512];
 extern RecompOpFn recomp_opcodes_d9[512];

From 38fb084124c874babd7207c1fa85f16fe67f1b7c Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:46:54 +0200
Subject: [PATCH 09/15] Fixed a bug in the Mach8/32 code.

---
 src/video/vid_ati_mach8.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c
index c8996e0eb..035f1cef0 100644
--- a/src/video/vid_ati_mach8.c
+++ b/src/video/vid_ati_mach8.c
@@ -1864,9 +1864,9 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
                 if (mach->accel.dest_y_end >= 0x600)
                     mach->accel.dy_end |= ~0x5ff;
 
-                if (mach->accel.dy_end > mach->accel.dy_end) {
+                if (mach->accel.dy_end > mach->accel.dy_start) {
                     mach->accel.stepy = 1;
-                } else if (mach->accel.dy_end < mach->accel.dy_end) {
+                } else if (mach->accel.dy_end < mach->accel.dy_start) {
                     mach->accel.stepy = -1;
                 } else {
                     mach->accel.stepy = 0;

From 4de80ab93e8d4a2cb1ca0e0406d2fd65bf06b108 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:47:31 +0200
Subject: [PATCH 10/15] Fixed some indentation mess in the Mach64 code.

---
 src/video/vid_ati_mach64.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c
index fee3e94f8..8c32929ce 100644
--- a/src/video/vid_ati_mach64.c
+++ b/src/video/vid_ati_mach64.c
@@ -1857,11 +1857,10 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
                         if (!cmp_clr)
                             MIX
 
-                            if (!(mach64->dst_cntl & DST_Y_MAJOR)) {
-                                if (!x)
-                                    dest_dat &= ~1;
-                            }
-                        else {
+                        if (!(mach64->dst_cntl & DST_Y_MAJOR)) {
+                            if (!x)
+                                dest_dat &= ~1;
+                        } else {
                             if (x == (mach64->accel.x_count - 1))
                                 dest_dat &= ~1;
                         }

From 2b5d1e19c15523b3bca58ae57be3ea6e508077d6 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:48:04 +0200
Subject: [PATCH 11/15] And some unused variables in the Mach32 PCI code.

---
 src/video/vid_ati_mach8.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c
index 035f1cef0..52846c21a 100644
--- a/src/video/vid_ati_mach8.c
+++ b/src/video/vid_ati_mach8.c
@@ -5178,7 +5178,6 @@ static uint8_t
 mach32_pci_read(int func, int addr, void *p)
 {
     mach_t *mach = (mach_t *) p;
-    svga_t   *svga   = &mach->svga;
     uint8_t   ret    = 0x00;
 
     switch (addr) {
@@ -5252,7 +5251,6 @@ static void
 mach32_pci_write(int func, int addr, uint8_t val, void *p)
 {
     mach_t *mach = (mach_t *) p;
-    svga_t   *svga   = &mach->svga;
 
     switch (addr) {
         case PCI_REG_COMMAND:

From 1d62a8dc9a3f3188b63cbe3ffdd697edef5d608f Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:49:05 +0200
Subject: [PATCH 12/15] And another warning in the Mach8/32 code.

---
 src/video/vid_ati_mach8.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c
index 52846c21a..9b96dbd97 100644
--- a/src/video/vid_ati_mach8.c
+++ b/src/video/vid_ati_mach8.c
@@ -373,12 +373,12 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
     svga_t *svga = &mach->svga;
     int compare_mode;
     int poly_src = 0;
-	uint16_t rd_mask = dev->accel.rd_mask;
-	uint16_t wrt_mask = dev->accel.wrt_mask;
-	uint16_t dest_cmp_clr = dev->accel.color_cmp;
+    unt16_t rd_mask = dev->accel.rd_mask;
+    uint16_t wrt_mask = dev->accel.wrt_mask;
+    uint16_t dest_cmp_clr = dev->accel.color_cmp;
     int frgd_sel, bkgd_sel, mono_src;
     int compare = 0;
-    uint16_t src_dat = 0, dest_dat;
+    uint16_t src_dat = 0, dest_dat = 0;
     uint16_t old_dest_dat;
     uint16_t *vram_w = (uint16_t *) svga->vram;
     uint16_t mix = 0;

From 7e9045e6b156b641f7d6f7aaaef7aa7332ea194e Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:50:00 +0200
Subject: [PATCH 13/15] And a warning in the XGA code.

---
 src/video/vid_xga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c
index 7933e74a8..e4f91bb00 100644
--- a/src/video/vid_xga.c
+++ b/src/video/vid_xga.c
@@ -2822,7 +2822,7 @@ xga_pos_in(uint16_t addr, void *priv)
 {
     svga_t *svga = (svga_t *) priv;
     xga_t   *xga  = &svga->xga;
-    uint8_t ret;
+    uint8_t ret = 0xff;
 
     if (xga_has_vga) {
         switch (addr) {

From e7d150b2c6a0537342828dd3bca778f4a3a027da Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:50:49 +0200
Subject: [PATCH 14/15] And a newly-introduced compile-breaking bug in the
 Mach8/32 code.

---
 src/video/vid_ati_mach8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c
index 9b96dbd97..9c0cbb616 100644
--- a/src/video/vid_ati_mach8.c
+++ b/src/video/vid_ati_mach8.c
@@ -373,7 +373,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
     svga_t *svga = &mach->svga;
     int compare_mode;
     int poly_src = 0;
-    unt16_t rd_mask = dev->accel.rd_mask;
+    uint16_t rd_mask = dev->accel.rd_mask;
     uint16_t wrt_mask = dev->accel.wrt_mask;
     uint16_t dest_cmp_clr = dev->accel.color_cmp;
     int frgd_sel, bkgd_sel, mono_src;

From 4cde2f2f10038643a1ba737df4cf09a604a9a56e Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 16 Jul 2023 03:52:02 +0200
Subject: [PATCH 15/15] And a warning in the AT Compaq's video poll function.

---
 src/machine/m_at_compaq.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/machine/m_at_compaq.c b/src/machine/m_at_compaq.c
index 0b96495be..3676a9d92 100644
--- a/src/machine/m_at_compaq.c
+++ b/src/machine/m_at_compaq.c
@@ -262,7 +262,6 @@ compaq_plasma_poll(void *p)
     uint8_t  sc;
     uint16_t ma  = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff;
     uint16_t ca  = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff;
-    uint16_t dat;
     uint16_t addr;
     int      drawcursor;
     int      x, c;