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Merge branch 'master' into HDD_Model_Batch

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This commit is contained in:
MaxwellS04
2024-12-31 05:34:52 +07:00
parent 36016b6be0 3bb62f59b8
commit 0dc3665480
53 changed files with 1564 additions and 619 deletions
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8
src/cpu/808x.c
View File

@@ -240,13 +240,13 @@ cpu_io(int bits, int out, uint16_t port)
int old_cycles = cycles;
if (out) {
wait(4, 1);
wait(is_mazovia ? 5 : 4, 1);
if (bits == 16) {
if (is8086 && !(port & 1)) {
old_cycles = cycles;
outw(port, AX);
} else {
wait(4, 1);
wait(is_mazovia ? 5 : 4, 1);
old_cycles = cycles;
outb(port++, AL);
outb(port, AH);
@@ -256,13 +256,13 @@ cpu_io(int bits, int out, uint16_t port)
outb(port, AL);
}
} else {
wait(4, 1);
wait(is_mazovia ? 5 : 4, 1);
if (bits == 16) {
if (is8086 && !(port & 1)) {
old_cycles = cycles;
AX = inw(port);
} else {
wait(4, 1);
wait(is_mazovia ? 5 : 4, 1);
old_cycles = cycles;
AL = inb(port++);
AH = inb(port);

26
src/cpu/cpu.c
View File

@@ -76,6 +76,7 @@ enum {
CPUID_MCA = (1 << 14), /* Machine Check Architecture */
CPUID_CMOV = (1 << 15), /* Conditional move instructions */
CPUID_PAT = (1 << 16), /* Page Attribute Table */
CPUID_PSE36 = (1 << 17), /* 36-bit Page Size Extension */
CPUID_MMX = (1 << 23), /* MMX technology */
CPUID_FXSR = (1 << 24) /* FXSAVE and FXRSTOR instructions */
};
@@ -202,6 +203,7 @@ int cpu_override_interpreter;
int CPUID;
int is186;
int is_mazovia;
int is_nec;
int is286;
int is386;
@@ -516,6 +518,7 @@ cpu_set(void)
CPUID = cpu_s->cpuid_model;
is8086 = (cpu_s->cpu_type > CPU_8088) && (cpu_s->cpu_type != CPU_V20) && (cpu_s->cpu_type != CPU_188);
is_mazovia = (cpu_s->cpu_type == CPU_8086_MAZOVIA);
is_nec = (cpu_s->cpu_type == CPU_V20) || (cpu_s->cpu_type == CPU_V30);
is186 = (cpu_s->cpu_type == CPU_186) || (cpu_s->cpu_type == CPU_188) || (cpu_s->cpu_type == CPU_V20) || (cpu_s->cpu_type == CPU_V30);
is286 = (cpu_s->cpu_type >= CPU_286);
@@ -766,6 +769,7 @@ cpu_set(void)
switch (cpu_s->cpu_type) {
case CPU_8088:
case CPU_8086:
case CPU_8086_MAZOVIA:
break;
case CPU_V20:
@@ -1743,8 +1747,10 @@ cpu_set(void)
if (cpu_s->cpu_type >= CPU_PENTIUM2)
cpu_features |= CPU_FEATURE_MMX;
cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PAE | CR4_PCE | CR4_PGE;
if (cpu_s->cpu_type == CPU_PENTIUM2D)
if (cpu_s->cpu_type == CPU_PENTIUM2D) {
cpu_CR4_mask |= CR4_OSFXSR;
cpu_features |= CPU_FEATURE_PSE36;
}
#ifdef USE_DYNAREC
codegen_timing_set(&codegen_timing_p6);
@@ -2429,6 +2435,11 @@ cpu_CPUID(void)
EAX = CPUID;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_DE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX;
/*
Return anything non-zero in bits 32-63 of the BIOS signature MSR
to indicate there has been an update.
*/
msr.bbl_cr_dx[3] = 0xffffffff00000000ULL;
} else
EAX = EBX = ECX = EDX = 0;
break;
@@ -2467,6 +2478,11 @@ cpu_CPUID(void)
EAX = CPUID;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_CMOV;
/*
Return anything non-zero in bits 32-63 of the BIOS signature MSR
to indicate there has been an update.
*/
msr.bbl_cr_dx[3] = 0xffffffff00000000ULL;
} else if (EAX == 2) {
EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
Instruction TLB: 4 MB pages, fully associative, 2 entries
@@ -2489,7 +2505,12 @@ cpu_CPUID(void)
} else if (EAX == 1) {
EAX = CPUID;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_FXSR | CPUID_CMOV;
EDX = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_FXSR | CPUID_CMOV | CPUID_PSE36;
/*
Return anything non-zero in bits 32-63 of the BIOS signature MSR
to indicate there has been an update.
*/
msr.bbl_cr_dx[3] = 0xffffffff00000000ULL;
} else if (EAX == 2) {
EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
Instruction TLB: 4 MB pages, fully associative, 2 entries
@@ -3247,6 +3268,7 @@ pentium_invalid_rdmsr:
case 0x88 ... 0x8b:
EAX = msr.bbl_cr_dx[ECX - 0x88] & 0xffffffff;
EDX = msr.bbl_cr_dx[ECX - 0x88] >> 32;
// EDX |= 0xffffffff;
break;
/* Unknown */
case 0xae:

48
src/cpu/cpu.h
View File

@@ -35,6 +35,7 @@ enum {
enum {
CPU_8088 = 1, /* 808x class CPUs */
CPU_8086,
CPU_8086_MAZOVIA,
CPU_V20, /* NEC 808x class CPUs */
CPU_V30,
CPU_188, /* 18x class CPUs */
@@ -87,28 +88,29 @@ enum {
CPU_PKG_8088 = (1 << 0),
CPU_PKG_8088_EUROPC = (1 << 1),
CPU_PKG_8086 = (1 << 2),
CPU_PKG_188 = (1 << 3),
CPU_PKG_186 = (1 << 4),
CPU_PKG_286 = (1 << 5),
CPU_PKG_386SX = (1 << 6),
CPU_PKG_386DX = (1 << 7),
CPU_PKG_386DX_DESKPRO386 = (1 << 8),
CPU_PKG_M6117 = (1 << 9),
CPU_PKG_386SLC_IBM = (1 << 10),
CPU_PKG_486SLC = (1 << 11),
CPU_PKG_486SLC_IBM = (1 << 12),
CPU_PKG_486BL = (1 << 13),
CPU_PKG_486DLC = (1 << 14),
CPU_PKG_SOCKET1 = (1 << 15),
CPU_PKG_SOCKET3 = (1 << 16),
CPU_PKG_SOCKET3_PC330 = (1 << 17),
CPU_PKG_STPC = (1 << 18),
CPU_PKG_SOCKET4 = (1 << 19),
CPU_PKG_SOCKET5_7 = (1 << 20),
CPU_PKG_SOCKET8 = (1 << 21),
CPU_PKG_SLOT1 = (1 << 22),
CPU_PKG_SLOT2 = (1 << 23),
CPU_PKG_SOCKET370 = (1 << 24)
CPU_PKG_8086_MAZOVIA = (1 << 3),
CPU_PKG_188 = (1 << 4),
CPU_PKG_186 = (1 << 5),
CPU_PKG_286 = (1 << 6),
CPU_PKG_386SX = (1 << 7),
CPU_PKG_386DX = (1 << 8),
CPU_PKG_386DX_DESKPRO386 = (1 << 9),
CPU_PKG_M6117 = (1 << 10),
CPU_PKG_386SLC_IBM = (1 << 11),
CPU_PKG_486SLC = (1 << 12),
CPU_PKG_486SLC_IBM = (1 << 13),
CPU_PKG_486BL = (1 << 14),
CPU_PKG_486DLC = (1 << 15),
CPU_PKG_SOCKET1 = (1 << 16),
CPU_PKG_SOCKET3 = (1 << 17),
CPU_PKG_SOCKET3_PC330 = (1 << 18),
CPU_PKG_STPC = (1 << 19),
CPU_PKG_SOCKET4 = (1 << 20),
CPU_PKG_SOCKET5_7 = (1 << 21),
CPU_PKG_SOCKET8 = (1 << 22),
CPU_PKG_SLOT1 = (1 << 23),
CPU_PKG_SLOT2 = (1 << 24),
CPU_PKG_SOCKET370 = (1 << 25)
};
#define CPU_SUPPORTS_DYNAREC 1
@@ -518,6 +520,7 @@ extern int is_p6;
extern int is_cxsmm;
extern int hascache;
extern int isibm486;
extern int is_mazovia;
extern int is_nec;
extern int is_rapidcad;
extern int hasfpu;
@@ -530,6 +533,7 @@ extern int hasfpu;
#define CPU_FEATURE_3DNOW (1 << 6)
#define CPU_FEATURE_SYSCALL (1 << 7)
#define CPU_FEATURE_3DNOWE (1 << 8)
#define CPU_FEATURE_PSE36 (1 << 9)
extern uint32_t cpu_features;

26
src/cpu/cpu_table.c
View File

@@ -373,6 +373,32 @@ const cpu_family_t cpu_families[] = {
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_8086_MAZOVIA,
.manufacturer = "Kyiv Research Institute of Microdevices",
.name = "K1810VM86",
.internal_name = "8086_mazovia",
.cpus = (const CPU[]) {
{
.name = "4.77",
.cpu_type = CPU_8086_MAZOVIA,
.fpus = fpus_8088,
.rspeed = 4772728,
.multi = 1,
.voltage = 5000,
.edx_reset = 0,
.cpuid_model = 0,
.cyrix_id = 0,
.cpu_flags = CPU_ALTERNATE_XTAL,
.mem_read_cycles = 0,
.mem_write_cycles = 0,
.cache_read_cycles = 0,
.cache_write_cycles = 0,
.atclk_div = 1
},
{ .name = "", 0 }
}
},
{
.package = CPU_PKG_188,
.manufacturer = "Intel",

75
src/disk/hdc_esdi_at.c
View File

@@ -552,6 +552,29 @@ esdi_read(uint16_t port, void *priv)
return temp;
}
/**
* Copy a string into a buffer, padding with spaces, and placing characters as
* if they were packed into 16-bit values, stored little-endian.
*
* @param str Destination buffer
* @param src Source string
* @param len Length of destination buffer to fill in. Strings shorter than
* this length will be padded with spaces.
*/
static void
esdi_padstr(char *str, const char *src, const int len)
{
int v;
for (int i = 0; i < len; i++) {
if (*src != '\0')
v = *src++;
else
v = ' ';
str[i ^ 1] = v;
}
}
static void
esdi_callback(void *priv)
{
@@ -811,28 +834,36 @@ format_error:
irq_raise(esdi);
} else {
memset(esdi->buffer, 0x00, 512);
esdi->buffer[0] = 0x44; /* general configuration */
esdi->buffer[1] = drive->real_tracks; /* number of non-removable cylinders */
esdi->buffer[2] = 0; /* number of removable cylinders */
esdi->buffer[3] = drive->real_hpc; /* number of heads */
esdi->buffer[4] = 600; /* number of unformatted bytes/sector */
esdi->buffer[5] = esdi->buffer[4] * drive->real_spt; /* number of unformatted bytes/track */
esdi->buffer[6] = drive->real_spt; /* number of sectors */
esdi->buffer[7] = 0; /*minimum bytes in inter-sector gap*/
esdi->buffer[8] = 0; /* minimum bytes in postamble */
esdi->buffer[9] = 0; /* number of words of vendor status */
/* controller info */
esdi->buffer[20] = 2; /* controller type */
esdi->buffer[21] = 1; /* sector buffer size, in sectors */
esdi->buffer[22] = 0; /* ecc bytes appended */
esdi->buffer[27] = 'W' | ('D' << 8);
esdi->buffer[28] = '1' | ('0' << 8);
esdi->buffer[29] = '0' | ('7' << 8);
esdi->buffer[30] = 'V' | ('-' << 8);
esdi->buffer[31] = 'S' | ('E' << 8);
esdi->buffer[32] = '1';
esdi->buffer[47] = 0; /* sectors per interrupt */
esdi->buffer[48] = 0; /* can use double word read/write? */
esdi->buffer[0] = 0x3244; /*
Soft sectored (0x0004),
Fixed drive (0x0040),
Transfer rate > 5 Mbps but <= 10 Mbps (0x0200),
Data strobe offset option (0x1000),
Track offset option (0x2000).
*/
if (drive->real_spt >= 26)
esdi->buffer[0] |= 0x0008; /* Not MFM encoded. */
esdi->buffer[1] = drive->real_tracks; /* Fixed cylinders - the BIOS lists 2 less. */
esdi->buffer[2] = 0; /* Removable cylinders. */
esdi->buffer[3] = drive->real_hpc; /* Heads. */
esdi->buffer[5] = 600; /* Unformatted bytes per sector. */
esdi->buffer[4] = esdi->buffer[5] * drive->real_spt; /* Unformatted bytes per track. */
esdi->buffer[6] = drive->real_spt; /* Sectors per track - the BIOS lists 1 less. */
esdi->buffer[7] = 3088; /* Bytes in inter-sector gap. */
esdi->buffer[8] = 11; /* Byce in sync fileds. */
esdi->buffer[9] = 0xf; /* Number of vendor unique words. */
/* Serial Number */
esdi_padstr((char *) (esdi->buffer + 10), "00000000000000000000", 20);
/* Controller information. */
esdi->buffer[20] = 3; /* Buffer type. */
esdi->buffer[21] = 64; /* Buffer size in 512-byte increments. */
esdi->buffer[22] = 4; /* Bytes of ECC. */
/* Firmware */
esdi_padstr((char *) (esdi->buffer + 23), "REV. A5", 8);
/* Model */
esdi_padstr((char *) (esdi->buffer + 27), "WD1007V", 40);
esdi->buffer[47] = 1; /* Sectors per interrupt. */
esdi->buffer[48] = 0; /* Can use DWord read/write? */
esdi->pos = 0;
esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
irq_raise(esdi);

20
src/floppy/fdd_img.c
View File

@@ -1075,9 +1075,14 @@ jump_if_fdf:
dev->sectors = 19;
dev->tracks = 80;
} else if (size <= 1638400) { /*HD 1024 sector*/
#ifdef SYNTH_FORMAT
dev->sectors = 10;
dev->tracks = 80;
dev->sector_size = 3;
#else
/* Prefer 20 512-byte sectors per track, used by the OpenStep 4.0 Pre-Release 1 boot disk. */
dev->sectors = 20;
#endif
dev->tracks = 80;
} else if (size <= 1720320) { /*DMF (Windows 95) */
dev->sectors = 21;
dev->tracks = 80;
@@ -1088,9 +1093,14 @@ jump_if_fdf:
dev->sectors = 21;
dev->tracks = 82;
} else if (size <= 1802240) { /*HD 1024 sector*/
dev->sectors = 22;
dev->tracks = 80;
#ifdef SYNTH_FORMAT
dev->sectors = 11;
dev->sector_size = 3;
#else
/* Prefer 22 512-byte sectors per track. */
dev->sectors = 22;
#endif
dev->tracks = 80;
} else if (size == 1884160) { /*XDF (OS/2 Warp)*/
dev->sectors = 23;
dev->tracks = 80;
@@ -1110,12 +1120,12 @@ jump_if_fdf:
dev->sectors = 42;
dev->tracks = 80;
#if 0
} else if (size <= 3440640) { /*HD 1024 sector*/
} else if (size <= 3440640) { /*ED 1024 sector*/
dev->sectors = 21;
dev->tracks = 80;
dev->sector_size = 3;
#endif
} else if (size <= 3604480) { /*HD 1024 sector*/
} else if (size <= 3604480) { /*ED 1024 sector*/
dev->sectors = 22;
dev->tracks = 80;
dev->sector_size = 3;

1
src/include/86box/machine.h
View File

@@ -939,6 +939,7 @@ extern int machine_xt_iskra3104_init(const machine_t *);
extern int machine_xt_pravetz16_imko4_init(const machine_t *);
extern int machine_xt_pravetz16s_cpu12p_init(const machine_t *);
extern int machine_xt_micoms_xl7turbo_init(const machine_t *);
extern int machine_xt_maz1016_init(const machine_t *);
/* m_xt_compaq.c */
extern int machine_xt_compaq_deskpro_init(const machine_t *);

75
src/include/86box/snd_opl.h
View File

@@ -18,13 +18,35 @@
#define SOUND_OPL_H
enum fm_type {
FM_YM3812 = 0, /* OPL2 */
FM_YMF262 = 1, /* OPL3 */
FM_YMF289B = 2, /* OPL3-L */
FM_YMF278B = 3, /* OPL 4 */
FM_ESFM = 4, /* ESFM */
FM_OPL2BOARD = 5, /* OPL2BOARD (External Device)*/
FM_MAX = 6
FM_YM2149 = 0, /* SSG */
FM_YM3526 = 1, /* OPL */
FM_Y8950 = 2, /* MSX-Audio (OPL with ADPCM) */
FM_YM3812 = 3, /* OPL2 */
FM_YMF262 = 4, /* OPL3 */
FM_YMF289B = 5, /* OPL3-L */
FM_YMF278B = 6, /* OPL4 */
FM_YM2413 = 7, /* OPLL */
FM_YM2423 = 8, /* OPLL-X */
FM_YMF281 = 9, /* OPLLP */
FM_DS1001 = 10, /* Konami VRC7 MMC */
FM_YM2151 = 11, /* OPM */
FM_YM2203 = 12, /* OPN */
FM_YM2608 = 13, /* OPNA */
FM_YMF288 = 14, /* OPN3L */
FM_YM2610 = 15, /* OPNB */
FM_YM2610B = 16, /* OPNB2 */
FM_YM2612 = 17, /* OPN2 */
FM_YM3438 = 18, /* OPN2C */
FM_YMF276 = 19, /* OPN2L */
FM_YM2164 = 20, /* OPP */
FM_YM3806 = 21, /* OPQ */
#if 0
FM_YMF271 = 22, /* OPX */
#endif
FM_YM2414 = 23, /* OPZ */
FM_ESFM = 24, /* ESFM */
FM_OPL2BOARD = 25, /* OPL2Board (External Device) */
FM_MAX = 26
};
enum fm_driver {
@@ -48,18 +70,55 @@ extern uint8_t fm_driver_get(int chip_id, fm_drv_t *drv);
extern const fm_drv_t nuked_opl_drv;
extern const fm_drv_t ymfm_drv;
extern const fm_drv_t esfmu_opl_drv;
extern const fm_drv_t ymfm_opl2board_drv;
extern const fm_drv_t ymfm_opl2board_drv;
#ifdef EMU_DEVICE_H
extern const device_t ym3812_nuked_device;
extern const device_t ymf262_nuked_device;
extern const device_t ym2149_ymfm_device;
/* OPL Series */
extern const device_t ym3526_ymfm_device;
extern const device_t y8950_ymfm_device;
extern const device_t ym3812_ymfm_device;
extern const device_t ymf262_ymfm_device;
extern const device_t ymf289b_ymfm_device;
extern const device_t ymf278b_ymfm_device;
extern const device_t ym2413_ymfm_device;
extern const device_t ym2423_ymfm_device;
extern const device_t ymf281_ymfm_device;
extern const device_t ds1001_ymfm_device;
/* OPM Series */
extern const device_t ym2151_ymfm_device;
/* OPN Series */
extern const device_t ym2203_ymfm_device;
extern const device_t ym2608_ymfm_device;
extern const device_t ymf288_ymfm_device;
extern const device_t ym2610_ymfm_device;
extern const device_t ym2610b_ymfm_device;
extern const device_t ym2612_ymfm_device;
extern const device_t ym3438_ymfm_device;
extern const device_t ymf276_ymfm_device;
/* OPP Series */
extern const device_t ym2164_ymfm_device;
/* OPQ Series */
extern const device_t ym3806_ymfm_device;
/* OPX Series */
#if 0
extern const device_t ymf271_ymfm_device;
#endif
/* OPZ Series */
extern const device_t ym2414_ymfm_device;
extern const device_t esfm_esfmu_device;
#ifdef USE_LIBSERIALPORT
extern const device_t ym_opl2board_device;
#endif

30
src/machine/m_xt.c
View File

@@ -19,6 +19,7 @@
#include <86box/machine.h>
#include <86box/chipset.h>
#include <86box/port_6x.h>
#include <86box/video.h>
extern const device_t vendex_xt_rtc_onboard_device;
@@ -330,6 +331,35 @@ machine_xt_iskra3104_init(const machine_t *model)
return ret;
}
int
machine_xt_maz1016_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/maz1016/e1.bin",
"roms/machines/maz1016/e4.bin",
0x000fc000, 49152, 0);
if (ret) {
bios_load_aux_interleaved("roms/machines/maz1016/e2.bin",
"roms/machines/maz1016/e5.bin",
0x000f8000, 16384, 0);
bios_load_aux_interleaved("roms/machines/maz1016/e3.bin",
"roms/machines/maz1016/e6b.bin",
0x000f4000, 16384, 0);
}
if (bios_only || !ret)
return ret;
loadfont("roms/machines/maz1016/crt-8.bin", 0);
machine_xt_clone_init(model, 0);
return ret;
}
int
machine_xt_pravetz16_imko4_init(const machine_t *model)
{

39
src/machine/machine_table.c
View File

@@ -2283,6 +2283,45 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Mazovia 1016",
.internal_name = "maz1016",
.type = MACHINE_TYPE_8086,
.chipset = MACHINE_CHIPSET_DISCRETE,
.init = machine_xt_maz1016_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_8086_MAZOVIA,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PC,
.flags = MACHINE_FLAGS_NONE,
.ram = {
.min = 256,
.max = 640,
.step = 384
},
.nvrmask = 0,
.kbc_device = &keyboard_xtclone_device,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[8086] Olivetti M21/24/24SP",
.internal_name = "m24",

12
src/mem/mem.c
View File

@@ -336,7 +336,10 @@ mmutranslatereal_normal(uint32_t addr, int rw)
mmu_perm = temp & 4;
rammap(addr2) |= (rw ? 0x60 : 0x20);
return (temp & ~0x3fffff) + (addr & 0x3fffff);
uint64_t page = temp & ~0x3fffff;
if (cpu_features & CPU_FEATURE_PSE36)
page |= (uint64_t) (temp & 0x1e000) << 19;
return page + (addr & 0x3fffff);
}
temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
@@ -491,7 +494,10 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return (temp & ~0x3fffff) + (addr & 0x3fffff);
uint64_t page = temp & ~0x3fffff;
if (cpu_features & CPU_FEATURE_PSE36)
page |= (uint64_t) (temp & 0x1e000) << 19;
return page + (addr & 0x3fffff);
}
temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
@@ -2351,7 +2357,7 @@ mem_mapping_recalc(uint64_t base, uint64_t size)
/* In range? */
if (map->enable && (uint64_t) map->base < ((uint64_t) base + (uint64_t) size) &&
((uint64_t) map->base + (uint64_t) map->size) > (uint64_t) base) {
uint64_t i_a = (~map->base_ignore) + 0x00000001ULL;
uint64_t i_a = ((~map->base_ignore) & 0xffffffffULL) + 0x00000001ULL;
uint64_t i_s = 0x00000000ULL;
uint64_t i_e = map->base_ignore;
uint64_t i_c = 0x00000000ULL;

80
src/qt/languages/pt-BR.po
View File

@@ -1240,7 +1240,7 @@ msgid "Tablet tool"
msgstr "Ferramenta para tablet"
msgid "Qt (OpenGL &ES)"
msgstr "Qt (OpenGL e ES)"
msgstr "Qt (OpenGL &ES)"
msgid "About Qt"
msgstr "Sobre o Qt"
@@ -1303,7 +1303,7 @@ msgid "Error linking shader program in file \"%1\""
msgstr "Erro ao vincular o programa de shader no arquivo \"%1\""
msgid "OpenGL 3.0 renderer options"
msgstr "Opções de renderização OpenGL 3.0"
msgstr "Opções do renderizador OpenGL 3.0"
msgid "Render behavior"
msgstr "Comportamento de renderização"
@@ -1321,7 +1321,7 @@ msgid "&lt;html&gt;&lt;head/&gt;&lt;body&gt;&lt;p&gt;Render each frame immediate
msgstr "&lt;html&gt;&lt;head/&gt;&lt;body&gt;&lt;p&gt;Renderize cada quadro imediatamente, em sincronia com a tela emulada.&lt;/p&gt;&lt;p&gt;&lt;span style=&quot; font-style:italic;&quot;&gt;Essa é a opção recomendada se os shaders em uso não utilizarem o frametime para efeitos animados.&lt;/span&gt;&lt;/p&gt;&lt;/body&gt;&lt;/html&gt;"
msgid "Synchronize with video"
msgstr "Sincronizar com vídeo"
msgstr "Sincronizar com o vídeo"
msgid "Shaders"
msgstr "Shaders"
@@ -1411,7 +1411,7 @@ msgid "Adapter"
msgstr "Adaptador"
msgid "VDE Socket"
msgstr "Socket VDE"
msgstr "Soquete VDE"
msgid "86Box Unit Tester"
msgstr "Testador de unidade 86Box"
@@ -1474,7 +1474,7 @@ msgid "Roland CM-32LN Emulation"
msgstr "Emulação do Roland CM-32LN"
msgid "OPL4-ML Daughterboard"
msgstr "Placa-mãe OPL4-ML"
msgstr "Placa Filha OPL4-ML"
msgid "System MIDI"
msgstr "Sistema MIDI"
@@ -1558,16 +1558,16 @@ msgid "Chorus Voices"
msgstr "Vozes do coro"
msgid "Chorus Level"
msgstr "Nível de coro"
msgstr "Nível do coro"
msgid "Chorus Speed"
msgstr "Velocidade do chorus"
msgstr "Velocidade do coro"
msgid "Chorus Depth"
msgstr "Profundidade do chorus"
msgstr "Profundidade do coro"
msgid "Chorus Waveform"
msgstr "Forma de onda do chorus"
msgstr "Forma de onda do coro"
msgid "Reverb"
msgstr "Reverberação"
@@ -1588,7 +1588,7 @@ msgid "Interpolation Method"
msgstr "Método de interpolação"
msgid "Reverb Output Gain"
msgstr "Ganho da saída do reverb"
msgstr "Ganho da saída da reverberação"
msgid "Reversed stereo"
msgstr "Estéreo invertido"
@@ -1624,7 +1624,7 @@ msgid "MAC Address"
msgstr "Endereço MAC"
msgid "MAC Address OUI"
msgstr "Endereço MAC OUI"
msgstr "OUI do Endereço MAC"
msgid "Enable BIOS"
msgstr "Habilitar BIOS"
@@ -1663,7 +1663,7 @@ msgid "MPU-401 Address"
msgstr "Endereço da MPU-401"
msgid "MPU-401 IRQ"
msgstr "MPU-401 IRQ"
msgstr "IRQ MPU-401"
msgid "Receive MIDI input"
msgstr "Receber entrada MIDI"
@@ -1699,7 +1699,7 @@ msgid "Receive MIDI input (MPU-401)"
msgstr "Receber entrada MIDI (MPU-401)"
msgid "SB low DMA"
msgstr "SB low DMA"
msgstr "DMA baixo SB"
msgid "6CH variant (6-channel)"
msgstr "Variante 6CH (6 canais)"
@@ -1714,7 +1714,7 @@ msgid "High DMA"
msgstr "DMA alto"
msgid "Control PC speaker"
msgstr "Controle do alto-falante do PC"
msgstr "Controlar alto-falante do PC"
msgid "Memory size"
msgstr "Tamanho da memória"
@@ -1729,7 +1729,7 @@ msgid "Codec"
msgstr "Codec"
msgid "GUS type"
msgstr "Tipo GUS"
msgstr "Tipo de GUS"
msgid "Enable 0x04 \"Exit 86Box\" command"
msgstr "Ativar o comando 0x04 \"Sair do 86Box\""
@@ -1738,10 +1738,10 @@ msgid "Display type"
msgstr "Tipo de tela"
msgid "Composite type"
msgstr "Tipo composto"
msgstr "Tipo de composto"
msgid "RGB type"
msgstr "Tipo RGB"
msgstr "Tipo de RGB"
msgid "Line doubling type"
msgstr "Tipo de duplicação de linha"
@@ -1756,7 +1756,7 @@ msgid "Character set"
msgstr "Conjunto de caracteres"
msgid "XGA type"
msgstr "Tipo XGA"
msgstr "Tipo de XGA"
msgid "Instance"
msgstr "Instância"
@@ -1774,13 +1774,13 @@ msgid "Bilinear filtering"
msgstr "Filtragem bilinear"
msgid "Dithering"
msgstr "Dithering"
msgstr "Pontilhamento"
msgid "Enable NMI for CGA emulation"
msgstr "Ativar NMI para emulação CGA"
msgid "Voodoo type"
msgstr "Tipo vodu"
msgstr "Tipo de Voodoo"
msgid "Framebuffer memory size"
msgstr "Tamanho da memória do framebuffer"
@@ -1789,13 +1789,13 @@ msgid "Texture memory size"
msgstr "Tamanho da memória da textura"
msgid "Dither subtraction"
msgstr "Subtração de dither"
msgstr "Subtração de pontilhado"
msgid "Screen Filter"
msgstr "Filtro de tela"
msgid "Render threads"
msgstr "Renderizar threads"
msgstr "Threads de renderização"
msgid "SLI"
msgstr "SLI"
@@ -1942,7 +1942,7 @@ msgid "New"
msgstr "Novo"
msgid "Color (generic)"
msgstr "Cor (genérico)"
msgstr "Colorido (genérico)"
msgid "Green Monochrome"
msgstr "Monocromático verde"
@@ -1954,10 +1954,10 @@ msgid "Gray Monochrome"
msgstr "Monocromático cinza"
msgid "Color (no brown)"
msgstr "Cor (sem marrom)"
msgstr "Colorido (sem marrom)"
msgid "Color (IBM 5153)"
msgstr "Cor (IBM 5153)"
msgstr "Colorido (IBM 5153)"
msgid "Simple doubling"
msgstr "Duplicação simples"
@@ -1984,13 +1984,13 @@ msgid "Color 40x25 (5153/CGA)"
msgstr "Colorido 40x25 (5153/CGA)"
msgid "Color 80x25 (5153/CGA)"
msgstr "Cor 80x25 (5153/CGA)"
msgstr "Colorido 80x25 (5153/CGA)"
msgid "Enhanced Color - Normal Mode (5154/ECD)"
msgstr "Cor aprimorada - Modo normal (5154/ECD)"
msgstr "Colorido aprimorado - Modo normal (5154/ECD)"
msgid "Enhanced Color - Enhanced Mode (5154/ECD)"
msgstr "Cor aprimorada - Modo aprimorado (5154/ECD)"
msgstr "Colorido aprimorado - Modo aprimorado (5154/ECD)"
msgid "Green"
msgstr "Verde"
@@ -2002,10 +2002,10 @@ msgid "Gray"
msgstr "Cinza"
msgid "Color"
msgstr "Cor"
msgstr "Colorido"
msgid "U.S. English"
msgstr "Inglês dos EUA"
msgstr "Inglês Americano"
msgid "Scandinavian"
msgstr "Escandinavo"
@@ -2020,10 +2020,10 @@ msgid "Mono Non-Interlaced"
msgstr "Monocromático não entrelaçado"
msgid "Color Interlaced"
msgstr "Cor entrelaçado"
msgstr "Colorido entrelaçado"
msgid "Color Non-Interlaced"
msgstr "Cor não entrelaçado"
msgstr "Colorido não entrelaçado"
msgid "3Dfx Voodoo Graphics"
msgstr "Gráficos 3Dfx Voodoo"
@@ -2053,7 +2053,7 @@ msgid "High-Speed"
msgstr "Alta velocidade"
msgid "Stereo LPT DAC"
msgstr "DAC estéreo LPT"
msgstr "DAC LPT estéreo"
msgid "Generic Text Printer"
msgstr "Impressora de texto genérica"
@@ -2065,7 +2065,7 @@ msgid "Generic PostScript Printer"
msgstr "Impressora PostScript genérica"
msgid "Generic PCL5e Printer"
msgstr "Impressora genérica PCL5e"
msgstr "Impressora PCL5e genérica"
msgid "Parallel Line Internet Protocol"
msgstr "Protocolo de Internet de linha paralela"
@@ -2120,3 +2120,15 @@ msgstr "Clone IBM 8514/A (ISA)"
msgid "Vendor"
msgstr "Fabricante"
msgid "30 Hz (JMP2 = 1)"
msgstr "30 Hz (JMP2 = 1)"
msgid "60 Hz (JMP2 = 2)"
msgstr "60 Hz (JMP2 = 2)"
msgid "Generic PC/XT Memory Expansion"
msgstr "Expansão de memória genérica PC/XT"
msgid "Generic PC/AT Memory Expansion"
msgstr "Expansão de memória genérica PC/AT"

4
src/qt/qt_main.cpp
View File

@@ -149,7 +149,7 @@ main_thread_fn()
if (dopause)
ack_pause();
std::this_thread::sleep_for(std::chrono::milliseconds(1));
plat_delay_ms(1);
}
}
@@ -157,7 +157,7 @@ main_thread_fn()
for (uint8_t i = 1; i < GFXCARD_MAX; i ++) {
if (gfxcard[i]) {
ui_deinit_monitor(i);
std::this_thread::sleep_for(std::chrono::milliseconds(500));
plat_delay_ms(500);
}
}
QTimer::singleShot(0, QApplication::instance(), []() { QApplication::processEvents(); QApplication::instance()->quit(); });

12
src/qt/qt_ui.cpp
View File

@@ -56,10 +56,22 @@ extern "C" {
#include <86box/network.h>
#include <86box/machine_status.h>
#ifdef Q_OS_WINDOWS
# include <86box/win.h>
#endif
void
plat_delay_ms(uint32_t count)
{
#ifdef Q_OS_WINDOWS
// On Win32 the accuracy of Sleep() depends on the timer resolution, which can be set by calling timeBeginPeriod
// https://learn.microsoft.com/en-us/windows/win32/api/timeapi/nf-timeapi-timebeginperiod
timeBeginPeriod(1);
Sleep(count);
timeEndPeriod(1);
#else
QThread::msleep(count);
#endif
}
wchar_t *

2
src/sound/midi_fluidsynth.c
View File

@@ -491,7 +491,7 @@ const device_t fluidsynth_device = {
.init = fluidsynth_init,
.close = fluidsynth_close,
.reset = NULL,
{ .available = fluidsynth_available },
.available = fluidsynth_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = fluidsynth_config

8
src/sound/midi_mt32.c
View File

@@ -427,7 +427,7 @@ const device_t mt32_old_device = {
.init = mt32_old_init,
.close = mt32_close,
.reset = NULL,
{ .available = mt32_old_available },
.available = mt32_old_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mt32_config
@@ -441,7 +441,7 @@ const device_t mt32_new_device = {
.init = mt32_new_init,
.close = mt32_close,
.reset = NULL,
{ .available = mt32_new_available },
.available = mt32_new_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mt32_config
@@ -455,7 +455,7 @@ const device_t cm32l_device = {
.init = cm32l_init,
.close = mt32_close,
.reset = NULL,
{ .available = cm32l_available },
.available = cm32l_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mt32_config
@@ -469,7 +469,7 @@ const device_t cm32ln_device = {
.init = cm32ln_init,
.close = mt32_close,
.reset = NULL,
{ .available = cm32ln_available },
.available = cm32ln_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mt32_config

2
src/sound/midi_opl4.c
View File

@@ -724,7 +724,7 @@ const device_t opl4_midi_device = {
.init = opl4_init,
.close = opl4_close,
.reset = NULL,
{ .available = opl4_midi_available },
.available = opl4_midi_available,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

4
src/sound/midi_rtmidi.cpp
View File

@@ -285,7 +285,7 @@ const device_t rtmidi_output_device = {
.init = rtmidi_output_init,
.close = rtmidi_output_close,
.reset = NULL,
{ .available = rtmidi_out_get_num_devs },
.available = rtmidi_out_get_num_devs,
.speed_changed = NULL,
.force_redraw = NULL,
.config = system_midi_config
@@ -299,7 +299,7 @@ const device_t rtmidi_input_device = {
.init = rtmidi_input_init,
.close = rtmidi_input_close,
.reset = NULL,
{ .available = rtmidi_in_get_num_devs },
.available = rtmidi_in_get_num_devs,
.speed_changed = NULL,
.force_redraw = NULL,
.config = midi_input_config

120
src/sound/snd_ac97_codec.c
View File

@@ -43,73 +43,73 @@ static const struct {
} ac97_codecs[] = {
// clang-format off
{
.device = &ad1881_device,
.min_rate = 7000,
.max_rate = 48000,
.misc_flags = AC97_MASTER_6B | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = (1 << AC97_3D_SHIFT), /* datasheet contradicts itself on AC97_HPOUT */
.extid_flags = AC97_VRA,
.pcsr_mask = 0xbf,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x74, 0x0000, 0xff07}, {0, 0x76, 0x0404, 0xdde5}, {0, 0x78, 48000, 0x0000}, {0, 0x7a, 48000, 0x0000}, {0}}
.device = &ad1881_device,
.min_rate = 7000,
.max_rate = 48000,
.misc_flags = AC97_MASTER_6B | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = (1 << AC97_3D_SHIFT), /* datasheet contradicts itself on AC97_HPOUT */
.extid_flags = AC97_VRA,
.pcsr_mask = 0xbf,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x74, 0x0000, 0xff07}, {0, 0x76, 0x0404, 0xdde5}, {0, 0x78, 48000, 0x0000}, {0, 0x7a, 48000, 0x0000}, {0}}
},
{
.device = &ak4540_device,
.misc_flags = AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.pcsr_mask = 0x1f
.device = &ak4540_device,
.misc_flags = AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.pcsr_mask = 0x1f
},
{
.device = &alc100_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = (22 << AC97_3D_SHIFT),
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xbf
.device = &alc100_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = (22 << AC97_3D_SHIFT),
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xbf
},
{
.device = &cs4297_device,
.misc_flags = AC97_MASTER_6B | AC97_AUXOUT | AC97_AUXOUT_6B | AC97_MONOOUT | AC97_MONOOUT_6B | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_HPOUT | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = 0,
.pcsr_mask = 0x7f,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x5a, 0x0301, 0x0000}, {0}}
.device = &cs4297_device,
.misc_flags = AC97_MASTER_6B | AC97_AUXOUT | AC97_AUXOUT_6B | AC97_MONOOUT | AC97_MONOOUT_6B | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_HPOUT | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = 0,
.pcsr_mask = 0x7f,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x5a, 0x0301, 0x0000}, {0}}
},
{
.device = &cs4297a_device,
.misc_flags = AC97_MASTER_6B | AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_HPOUT | AC97_DAC_20B | AC97_ADC_18B | (6 << AC97_3D_SHIFT),
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xff,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x5e, 0x0000, 0x01b0}, {0, 0x60, 0x0023, 0x0001}, {0, 0x68, 0x0000, 0xdfff}, {0}}
.device = &cs4297a_device,
.misc_flags = AC97_MASTER_6B | AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_HPOUT | AC97_DAC_20B | AC97_ADC_18B | (6 << AC97_3D_SHIFT),
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xff,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x5e, 0x0000, 0x01b0}, {0, 0x60, 0x0023, 0x0001}, {0, 0x68, 0x0000, 0xdfff}, {0}}
},
{
.device = &stac9708_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = (26 << AC97_3D_SHIFT) | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = AC97_SDAC,
.pcsr_mask = 0xff,
.eascr_mask = 0x02,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x6c, 0x0000, 0x0003}, {0, 0x74, 0x0000, 0x0003}, {0}}
.device = &stac9708_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = (26 << AC97_3D_SHIFT) | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = AC97_SDAC,
.pcsr_mask = 0xff,
.eascr_mask = 0x02,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x6c, 0x0000, 0x0003}, {0, 0x74, 0x0000, 0x0003}, {0}}
},
{
.device = &stac9721_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = (26 << AC97_3D_SHIFT) | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xff,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x6c, 0x0000, 0x0000}, {0, 0x6e, 0x0000, 0x0003}, {0, 0x70, 0x0000, 0xffff}, {0, 0x72, 0x0000, 0x0006}, {0, 0x74, 0x0000, 0x0003}, {0, 0x76, 0x0000, 0xffff}, {0, 0x78, 0x0000, 0x3802}, {0}}
.device = &stac9721_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = (26 << AC97_3D_SHIFT) | AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = AC97_AMAP,
.pcsr_mask = 0xff,
.vendor_regs = (const ac97_vendor_reg_t[]) {{0, 0x6c, 0x0000, 0x0000}, {0, 0x6e, 0x0000, 0x0003}, {0, 0x70, 0x0000, 0xffff}, {0, 0x72, 0x0000, 0x0006}, {0, 0x74, 0x0000, 0x0003}, {0, 0x76, 0x0000, 0xffff}, {0, 0x78, 0x0000, 0x3802}, {0}}
},
{
.device = &tr28023_device,
.misc_flags = AC97_MASTER_6B | AC97_MONOOUT | AC97_MONOOUT_6B | AC97_PCBEEP | AC97_PHONE | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = 0,
.extid_flags = 0,
.pcsr_mask = 0x3f
.device = &tr28023_device,
.misc_flags = AC97_MASTER_6B | AC97_MONOOUT | AC97_MONOOUT_6B | AC97_PCBEEP | AC97_PHONE | AC97_POP | AC97_MS | AC97_LPBK,
.reset_flags = 0,
.extid_flags = 0,
.pcsr_mask = 0x3f
},
{
.device = &wm9701a_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = 0,
.pcsr_mask = 0x3f
.device = &wm9701a_device,
.misc_flags = AC97_AUXOUT | AC97_MONOOUT | AC97_PCBEEP | AC97_PHONE | AC97_VIDEO | AC97_AUXIN | AC97_MS | AC97_LPBK,
.reset_flags = AC97_DAC_18B | AC97_ADC_18B,
.extid_flags = 0,
.pcsr_mask = 0x3f
}
// clang-format on
};
@@ -661,7 +661,7 @@ const device_t ad1881_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -675,7 +675,7 @@ const device_t ak4540_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -689,7 +689,7 @@ const device_t alc100_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -703,7 +703,7 @@ const device_t cs4297_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -717,7 +717,7 @@ const device_t cs4297a_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -731,7 +731,7 @@ const device_t stac9708_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -745,7 +745,7 @@ const device_t stac9721_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -759,7 +759,7 @@ const device_t tr28023_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -773,7 +773,7 @@ const device_t wm9701a_device = {
.init = ac97_codec_init,
.close = ac97_codec_close,
.reset = ac97_codec_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/sound/snd_ac97_via.c
View File

@@ -839,7 +839,7 @@ const device_t ac97_via_device = {
.init = ac97_via_init,
.close = ac97_via_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = ac97_via_speed_changed,
.force_redraw = NULL,
.config = NULL

4
src/sound/snd_adlib.c
View File

@@ -151,7 +151,7 @@ const device_t adlib_device = {
.init = adlib_init,
.close = adlib_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -165,7 +165,7 @@ const device_t adlib_mca_device = {
.init = adlib_mca_init,
.close = adlib_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/sound/snd_adlibgold.c
View File

@@ -1273,7 +1273,7 @@ const device_t adgold_device = {
.init = adgold_init,
.close = adgold_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = adgold_config

12
src/sound/snd_audiopci.c
View File

@@ -2405,7 +2405,7 @@ const device_t es1371_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = es1371_config
@@ -2419,7 +2419,7 @@ const device_t es1371_onboard_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = es1371_onboard_config
@@ -2433,7 +2433,7 @@ const device_t es1373_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = es1373_config
@@ -2447,7 +2447,7 @@ const device_t es1373_onboard_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = es1371_onboard_config
@@ -2461,7 +2461,7 @@ const device_t ct5880_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = ct5880_config
@@ -2475,7 +2475,7 @@ const device_t ct5880_onboard_device = {
.init = es1371_init,
.close = es1371_close,
.reset = es1371_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = es1371_speed_changed,
.force_redraw = NULL,
.config = es1371_onboard_config

4
src/sound/snd_azt2316a.c
View File

@@ -1588,7 +1588,7 @@ const device_t azt2316a_device = {
.init = azt_init,
.close = azt_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = azt_speed_changed,
.force_redraw = NULL,
.config = azt2316a_config
@@ -1602,7 +1602,7 @@ const device_t azt1605_device = {
.init = azt_init,
.close = azt_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = azt_speed_changed,
.force_redraw = NULL,
.config = azt1605_config

10
src/sound/snd_cmi8x38.c
View File

@@ -1547,7 +1547,7 @@ const device_t cmi8338_device = {
.init = cmi8x38_init,
.close = cmi8x38_close,
.reset = cmi8x38_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = cmi8x38_speed_changed,
.force_redraw = NULL,
.config = cmi8x38_config
@@ -1561,7 +1561,7 @@ const device_t cmi8338_onboard_device = {
.init = cmi8x38_init,
.close = cmi8x38_close,
.reset = cmi8x38_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = cmi8x38_speed_changed,
.force_redraw = NULL,
.config = cmi8x38_config
@@ -1575,7 +1575,7 @@ const device_t cmi8738_device = {
.init = cmi8x38_init,
.close = cmi8x38_close,
.reset = cmi8x38_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = cmi8x38_speed_changed,
.force_redraw = NULL,
.config = cmi8738_config
@@ -1589,7 +1589,7 @@ const device_t cmi8738_onboard_device = {
.init = cmi8x38_init,
.close = cmi8x38_close,
.reset = cmi8x38_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = cmi8x38_speed_changed,
.force_redraw = NULL,
.config = cmi8x38_config
@@ -1603,7 +1603,7 @@ const device_t cmi8738_6ch_onboard_device = {
.init = cmi8x38_init,
.close = cmi8x38_close,
.reset = cmi8x38_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = cmi8x38_speed_changed,
.force_redraw = NULL,
.config = cmi8x38_config

2
src/sound/snd_cms.c
View File

@@ -249,7 +249,7 @@ const device_t cms_device = {
.init = cms_init,
.close = cms_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = cms_config

10
src/sound/snd_cs423x.c
View File

@@ -869,7 +869,7 @@ const device_t cs4235_device = {
.init = cs423x_init,
.close = cs423x_close,
.reset = cs423x_reset,
{ .available = cs423x_available },
.available = cs423x_available,
.speed_changed = cs423x_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -883,7 +883,7 @@ const device_t cs4235_onboard_device = {
.init = cs423x_init,
.close = cs423x_close,
.reset = cs423x_reset,
{ .available = cs423x_available },
.available = cs423x_available,
.speed_changed = cs423x_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -897,7 +897,7 @@ const device_t cs4236b_device = {
.init = cs423x_init,
.close = cs423x_close,
.reset = cs423x_reset,
{ .available = cs423x_available },
.available = cs423x_available,
.speed_changed = cs423x_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -911,7 +911,7 @@ const device_t cs4237b_device = {
.init = cs423x_init,
.close = cs423x_close,
.reset = cs423x_reset,
{ .available = cs423x_available },
.available = cs423x_available,
.speed_changed = cs423x_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -925,7 +925,7 @@ const device_t cs4238b_device = {
.init = cs423x_init,
.close = cs423x_close,
.reset = cs423x_reset,
{ .available = cs423x_available },
.available = cs423x_available,
.speed_changed = cs423x_speed_changed,
.force_redraw = NULL,
.config = NULL

18
src/sound/snd_gus.c
View File

@@ -1525,15 +1525,15 @@ static const device_config_t gus_config[] = {
};
const device_t gus_device = {
.name = "Gravis UltraSound",
.name = "Gravis UltraSound",
.internal_name = "gus",
.flags = DEVICE_ISA | DEVICE_AT,
.local = 0,
.init = gus_init,
.close = gus_close,
.reset = gus_reset,
{ .available = NULL },
.flags = DEVICE_ISA | DEVICE_AT,
.local = 0,
.init = gus_init,
.close = gus_close,
.reset = gus_reset,
.available = NULL,
.speed_changed = gus_speed_changed,
.force_redraw = NULL,
.config = gus_config
.force_redraw = NULL,
.config = gus_config
};

4
src/sound/snd_mpu401.c
View File

@@ -1965,7 +1965,7 @@ const device_t mpu401_device = {
.init = mpu401_standalone_init,
.close = mpu401_standalone_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mpu401_standalone_config
@@ -1979,7 +1979,7 @@ const device_t mpu401_mca_device = {
.init = mpu401_standalone_init,
.close = mpu401_standalone_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = mpu401_standalone_mca_config

124
src/sound/snd_opl.c
View File

@@ -39,7 +39,22 @@ uint8_t
fm_driver_get(int chip_id, fm_drv_t *drv)
{
switch (chip_id) {
case FM_YM3812:
case FM_YM2149: /* SSG */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2149_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM3526: /* OPL */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym3526_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_Y8950: /* MSX-Audio (OPL with ADPCM) */
*drv = ymfm_drv;
drv->priv = device_add_inst(&y8950_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM3812: /* OPL2 */
if (fm_driver == FM_DRV_NUKED) {
*drv = nuked_opl_drv;
drv->priv = device_add_inst(&ym3812_nuked_device, fm_dev_inst[fm_driver][chip_id]++);
@@ -49,7 +64,7 @@ fm_driver_get(int chip_id, fm_drv_t *drv)
}
break;
case FM_YMF262:
case FM_YMF262: /* OPL3 */
if (fm_driver == FM_DRV_NUKED) {
*drv = nuked_opl_drv;
drv->priv = device_add_inst(&ymf262_nuked_device, fm_dev_inst[fm_driver][chip_id]++);
@@ -58,27 +73,116 @@ fm_driver_get(int chip_id, fm_drv_t *drv)
drv->priv = device_add_inst(&ymf262_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
}
break;
#ifdef USE_LIBSERIALPORT
case FM_OPL2BOARD:
*drv = ymfm_opl2board_drv;
drv->priv = device_add_inst(&ym_opl2board_device, fm_dev_inst[fm_driver][chip_id]++);
break;
#endif
case FM_YMF289B:
case FM_YMF289B: /* OPL3-L */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf289b_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YMF278B:
case FM_YMF278B: /* OPL4 */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf278b_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2413: /* OPLL */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2413_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2423: /* OPLL-X */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2423_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YMF281: /* OPLLP */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf281_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_DS1001: /* Konami VRC7 MMC */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ds1001_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2151: /* OPM */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2151_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2203: /* OPN */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2203_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2608: /* OPNA */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2608_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YMF288: /* OPN3L */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf288_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2610: /* OPNB */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2610_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2610B: /* OPNB2 */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2610b_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2612: /* OPN2 */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2612_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM3438: /* OPN2C */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym3438_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YMF276: /* OPN2L */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf276_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM2164: /* OPP */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2164_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_YM3806: /* OPQ */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym3806_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
#if 0
case FM_YMF271: /* OPX */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ymf271_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
#endif
case FM_YM2414: /* OPZ */
*drv = ymfm_drv;
drv->priv = device_add_inst(&ym2414_ymfm_device, fm_dev_inst[fm_driver][chip_id]++);
break;
case FM_ESFM:
*drv = esfmu_opl_drv;
drv->priv = device_add_inst(&esfm_esfmu_device, fm_dev_inst[fm_driver][chip_id]++);
break;
#ifdef USE_LIBSERIALPORT
case FM_OPL2BOARD:
*drv = ymfm_opl2board_drv;
drv->priv = device_add_inst(&ym_opl2board_device, fm_dev_inst[fm_driver][chip_id]++);
break;
#endif
default:
return 0;
}

18
src/sound/snd_opl2board.c
View File

@@ -167,14 +167,14 @@ opl2board_device_close(void *priv)
static const device_config_t opl2board_config[] = {
{
.name = "host_serial_path",
.description = "Host Serial Device",
.type = CONFIG_SERPORT,
.default_string = "",
.file_filter = NULL,
.spinner = {},
.selection = {}
{
.name = "host_serial_path",
.description = "Host Serial Device",
.type = CONFIG_SERPORT,
.default_string = "",
.file_filter = NULL,
.spinner = {},
.selection = {}
},
{ .name = "", .description = "", .type = CONFIG_END }
};
@@ -187,7 +187,7 @@ const device_t opl2board_device = {
.init = opl2board_device_init,
.close = opl2board_device_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = opl2board_config

18
src/sound/snd_opl_esfm.c
View File

@@ -242,6 +242,7 @@ esfm_drv_read(uint16_t port, void *priv)
if (dev->status & STAT_TMR_OVER)
ret |= STAT_TMR_ANY;
break;
case 0x0001:
ret = ESFM_read_port(&dev->opl, port & 3);
switch (dev->opl.addr_latch & 0x5ff) {
@@ -256,6 +257,7 @@ esfm_drv_read(uint16_t port, void *priv)
break;
}
break;
case 0x0002:
case 0x0003:
ret = 0xff;
@@ -338,18 +340,18 @@ const device_t esfm_esfmu_device = {
.init = esfm_drv_init,
.close = esfm_drv_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const fm_drv_t esfmu_opl_drv = {
&esfm_drv_read,
&esfm_drv_write,
&esfm_drv_update,
&esfm_drv_reset_buffer,
&esfm_drv_set_do_cycles,
NULL,
NULL,
.read = &esfm_drv_read,
.write = &esfm_drv_write,
.update = &esfm_drv_update,
.reset_buffer = &esfm_drv_reset_buffer,
.set_do_cycles = &esfm_drv_set_do_cycles,
.priv = NULL,
.generate = NULL,
};

25
src/sound/snd_opl_nuked.c
View File

@@ -68,9 +68,6 @@
#define RSM_FRAC 10
// #define OPL_FREQ FREQ_48000
#define OPL_FREQ FREQ_49716
// Channel types
enum {
ch_2op = 0,
@@ -1276,7 +1273,7 @@ OPL3_Reset(opl3_chip *chip, uint32_t samplerate)
}
chip->noise = 1;
chip->rateratio = (samplerate << RSM_FRAC) / 49716;
chip->rateratio = (samplerate << RSM_FRAC) / FREQ_49716;
chip->tremoloshift = 4;
chip->vibshift = 1;
@@ -1538,7 +1535,7 @@ nuked_drv_init(const device_t *info)
dev->status = 0x06;
/* Initialize the NukedOPL object. */
OPL3_Reset(&dev->opl, OPL_FREQ);
OPL3_Reset(&dev->opl, FREQ_49716);
timer_add(&dev->timers[0], nuked_timer_1, dev, 0);
timer_add(&dev->timers[1], nuked_timer_2, dev, 0);
@@ -1659,7 +1656,7 @@ const device_t ym3812_nuked_device = {
.init = nuked_drv_init,
.close = nuked_drv_close,
.reset = NULL,
{ .available = NULL },
.available = NULL ,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1673,18 +1670,18 @@ const device_t ymf262_nuked_device = {
.init = nuked_drv_init,
.close = nuked_drv_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const fm_drv_t nuked_opl_drv = {
&nuked_drv_read,
&nuked_drv_write,
&nuked_drv_update,
&nuked_drv_reset_buffer,
&nuked_drv_set_do_cycles,
NULL,
NULL,
.read = &nuked_drv_read,
.write = &nuked_drv_write,
.update = &nuked_drv_update,
.reset_buffer = &nuked_drv_reset_buffer,
.set_do_cycles = &nuked_drv_set_do_cycles,
.priv = NULL,
.generate = NULL,
};

83
src/sound/snd_opl_opl2board.cpp
View File

@@ -23,7 +23,6 @@
#include "ymfm/ymfm_opl.h"
#include <libserialport.h>
extern "C" {
#define HAVE_STDARG_H
#include <86box/86box.h>
@@ -38,7 +37,6 @@ extern "C" {
#include <86box/ini.h>
#include <86box/device.h>
// Disable c99-designator to avoid the warnings in *_ymfm_device
#ifdef __clang__
# if __has_warning("-Wc99-designator")
@@ -46,21 +44,16 @@ extern "C" {
# pragma clang diagnostic ignored "-Wc99-designator"
# endif
#endif
}
#define RSM_FRAC 10
#define OPL_FREQ FREQ_48000
enum {
FLAG_CYCLES = (1 << 0)
};
uint8_t lastval = 0x00;
class OPLBOARDChipBase {
public:
OPLBOARDChipBase(UNUSED(uint32_t clock), fm_type type, uint32_t samplerate)
@@ -90,7 +83,6 @@ public:
virtual uint8_t read(uint16_t addr) = 0;
virtual void set_clock(uint32_t clock) = 0;
protected:
int32_t m_buffer[MUSICBUFLEN * 2];
int m_buf_pos;
@@ -244,7 +236,6 @@ public:
virtual void write(uint16_t addr, uint8_t data) override
{
m_chip.write(addr, data);
}
@@ -315,31 +306,27 @@ extern "C" {
#include <86box/config.h>
#include <86box/ini.h>
#ifdef ENABLE_OPL_LOG
int ymfm_do_log = ENABLE_OPL_LOG;
#ifdef ENABLE_OPL_LOG
int oplboard_do_log = ENABLE_OPL_LOG;
static void
ymfm_log(const char *fmt, ...)
oplboard_log(const char *fmt, ...)
{
va_list ap;
if (ymfm_do_log) {
if (oplboard_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define ymfm_log(fmt, ...)
# define oplboard_log(fmt, ...)
#endif
struct sp_port *port;
void opl2board_init() {
device_add(&opl2board_device);
const char* port_name = device_get_config_string("host_serial_path");
device_context_restore();
@@ -348,13 +335,13 @@ void opl2board_init() {
result = sp_get_port_by_name(port_name, &port);
if (result != SP_OK) {
ymfm_log("Error: Cannot find port %s\n", port_name);
oplboard_log("Error: Cannot find port %s\n", port_name);
return;
}
result = sp_open(port, SP_MODE_READ_WRITE);
if (result != SP_OK) {
ymfm_log ("Error: Cannot open port %s\n", port_name);
oplboard_log ("Error: Cannot open port %s\n", port_name);
return;
}
@@ -364,33 +351,29 @@ void opl2board_init() {
sp_set_parity(port, SP_PARITY_NONE);
sp_set_stopbits(port, 1);
sp_set_flowcontrol(port, SP_FLOWCONTROL_NONE);
ymfm_log("OPL2Board Serial port %s initialized at 115200 baud.\n", port_name);
oplboard_log("OPL2Board Serial port %s initialized at 115200 baud.\n", port_name);
}
void opl2board_write(uint8_t data) {
if (port == NULL) {
ymfm_log(stderr, "Error: OPL2Board Port not initialized.\n");
oplboard_log(stderr, "Error: OPL2Board Port not initialized.\n");
return;
}
enum sp_return result = sp_blocking_write(port, &data, sizeof(data), 1000);
if (result < 0) {
ymfm_log(stderr, "Error: Failed to write to OPL2Board port.\n");
oplboard_log(stderr, "Error: Failed to write to OPL2Board port.\n");
} else {
ymfm_log("OPL2Board: data sent: %02X\n", data);
oplboard_log("OPL2Board: data sent: %02X\n", data);
}
}
void opl2board_reset() {
// Reset all voices to 0
ymfm_log("Performing OPL2Board reset\n");
oplboard_log("Performing OPL2Board reset\n");
for (uint8_t i = 0x00; i < 0xFF; i++) {
if (i >= 0x40 && i <= 0x55) {
opl2board_write(i);
@@ -408,11 +391,10 @@ void opl2board_close() {
sp_close(port);
sp_free_port(port);
port = NULL;
ymfm_log("OPL2Board port closed.\n");
oplboard_log("OPL2Board port closed.\n");
}
}
static void *
ymfm_opl2board_drv_init(const device_t *info)
{
@@ -433,6 +415,7 @@ static void
ymfm_opl2board_drv_close(void *priv)
{
OPLBOARDChipBase *drv = (OPLBOARDChipBase *) priv;
opl2board_close();
if (drv != NULL)
delete drv;
@@ -453,29 +436,27 @@ ymfm_opl2board_drv_read(uint16_t port, void *priv)
uint8_t ret = drv->read(port);
drv->update();
ymfm_log("YMFM read port %04x, status = %02x\n", port, ret);
oplboard_log("OPLBoard read port %04x, status = %02x\n", port, ret);
return ret;
}
static void
ymfm_opl2board_drv_write(uint16_t port, uint8_t val, void *priv)
{
OPLBOARDChipBase *drv = (OPLBOARDChipBase *) priv;
ymfm_log("YMFM write port %04x value = %02x\n", port, val);
oplboard_log("OPLBoard write port %04x value = %02x\n", port, val);
if ((port == 0x380) || (port == 0x381))
port |= 4;
// Allow initialization of adlib
if ((val == 0x04 || val == 0x02) || (lastval == 0x04 || lastval == 0x02)) {
// Allow initialization of adlib
if ((val == 0x04 || val == 0x02) || (lastval == 0x04 || lastval == 0x02))
drv->write(port, val);
}
lastval = val;
opl2board_write(val);
drv->update();
}
static int32_t *
ymfm_opl2board_drv_update(void *priv)
{
@@ -500,22 +481,19 @@ static void
ymfm_opl2board_drv_set_do_cycles(void *priv, int8_t do_cycles)
{
OPLBOARDChipBase *drv = (OPLBOARDChipBase *) priv;
drv->set_do_cycles(do_cycles);
}
static void
ymfm_opl2board_drv_generate(void *priv, int32_t *data, uint32_t num_samples)
{
{
OPLBOARDChipBase *drv = (OPLBOARDChipBase *) priv;
// drv->generate_resampled(data, num_samples);
drv->generate(data, num_samples);
}
const device_t ym_opl2board_device = {
.name = "YMOPL2Board (External Device)",
.internal_name = "ym_opl2board_device",
@@ -524,21 +502,20 @@ const device_t ym_opl2board_device = {
.init = ymfm_opl2board_drv_init,
.close = ymfm_opl2board_drv_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const fm_drv_t ymfm_opl2board_drv {
&ymfm_opl2board_drv_read,
&ymfm_opl2board_drv_write,
&ymfm_opl2board_drv_update,
&ymfm_opl2board_drv_reset_buffer,
&ymfm_opl2board_drv_set_do_cycles,
NULL,
ymfm_opl2board_drv_generate
.read = &ymfm_opl2board_drv_read,
.write = &ymfm_opl2board_drv_write,
.update = &ymfm_opl2board_drv_update,
.reset_buffer = &ymfm_opl2board_drv_reset_buffer,
.set_do_cycles = &ymfm_opl2board_drv_set_do_cycles,
.priv = NULL,
.generate = ymfm_opl2board_drv_generate
};
#ifdef __clang__

422
src/sound/snd_opl_ymfm.cpp
View File

@@ -18,7 +18,16 @@
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include "ymfm/ymfm_ssg.h"
#include "ymfm/ymfm_misc.h"
#include "ymfm/ymfm_opl.h"
#include "ymfm/ymfm_opm.h"
#include "ymfm/ymfm_opn.h"
#include "ymfm/ymfm_opq.h"
#if 0
#include "ymfm/ymfm_opx.h"
#endif
#include "ymfm/ymfm_opz.h"
extern "C" {
#define HAVE_STDARG_H
@@ -38,13 +47,10 @@ extern "C" {
# pragma clang diagnostic ignored "-Wc99-designator"
# endif
#endif
}
#define RSM_FRAC 10
#define OPL_FREQ FREQ_48000
enum {
FLAG_CYCLES = (1 << 0)
};
@@ -322,24 +328,126 @@ ymfm_drv_init(const device_t *info)
YMFMChipBase *fm;
switch (info->local) {
case FM_YM2149: /* OPL */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2149>(14318181, FM_YM2149, FREQ_49716);
break;
case FM_YM3526: /* OPL */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym3526>(14318181, FM_YM3526, FREQ_49716);
break;
case FM_Y8950: /* MSX-Audio (OPL with ADPCM) */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::y8950>(14318181, FM_Y8950, FREQ_49716);
break;
default:
case FM_YM3812:
case FM_YM3812: /* OPL2 */
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym3812>(3579545, FM_YM3812, FREQ_49716);
break;
case FM_YMF262:
case FM_YMF262: /* OPL3 */
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf262>(14318181, FM_YMF262, FREQ_49716);
break;
case FM_YMF289B:
case FM_YMF289B: /* OPL3-L */
/* According to the datasheet, we should be using 33868800, but YMFM appears
to cheat and does it using the same values as the YMF262. */
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf289b>(14318181, FM_YMF289B, FREQ_49716);
break;
case FM_YMF278B:
case FM_YMF278B: /* OPL4 */
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf278b>(33868800, FM_YMF278B, FREQ_44100);
break;
case FM_YM2413: /* OPLL */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2413>(14318181, FM_YM2413, FREQ_49716);
break;
case FM_YM2423: /* OPLL-X */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2423>(14318181, FM_YM2423, FREQ_49716);
break;
case FM_YMF281: /* OPLLP */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf281>(14318181, FM_YMF281, FREQ_49716);
break;
case FM_DS1001: /* Konami VRC7 MMC */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ds1001>(14318181, FM_DS1001, FREQ_49716);
break;
case FM_YM2151: /* OPM */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2151>(14318181, FM_YM2151, FREQ_49716);
break;
case FM_YM2203: /* OPN */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2203>(14318181, FM_YM2203, FREQ_49716);
break;
case FM_YM2608: /* OPNA */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2608>(14318181, FM_YM2608, FREQ_49716);
break;
case FM_YMF288: /* OPN3L */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf288>(14318181, FM_YMF288, FREQ_49716);
break;
case FM_YM2610: /* OPNB */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2610>(14318181, FM_YM2610, FREQ_49716);
break;
case FM_YM2610B: /* OPNB2 */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2610b>(14318181, FM_YM2610B, FREQ_49716);
break;
case FM_YM2612: /* OPN2 */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2612>(14318181, FM_YM2612, FREQ_49716);
break;
case FM_YM3438: /* OPN2C */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym3438>(14318181, FM_YM3438, FREQ_49716);
break;
case FM_YMF276: /* OPN2L */
// TODO: Check function call, rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf276>(14318181, FM_YMF276, FREQ_49716);
break;
case FM_YM2164: /* OPP */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2164>(14318181, FM_YM2164, FREQ_49716);
break;
case FM_YM3806: /* OPQ */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym3806>(14318181, FM_YM3806, FREQ_49716);
break;
#if 0
case FM_YMF271: /* OPX */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ymf271>(14318181, FM_YMF271, FREQ_49716);
break;
#endif
case FM_YM2414: /* OPZ */
// TODO: Check rates and frequency
fm = (YMFMChipBase *) new YMFMChip<ymfm::ym2414>(14318181, FM_YM2414, FREQ_49716);
break;
}
fm->set_do_cycles(1);
@@ -379,6 +487,7 @@ static void
ymfm_drv_write(uint16_t port, uint8_t val, void *priv)
{
YMFMChipBase *drv = (YMFMChipBase *) priv;
ymfm_log("YMFM write port %04x value = %02x\n", port, val);
if ((port == 0x380) || (port == 0x381))
port |= 4;
@@ -406,6 +515,7 @@ static void
ymfm_drv_set_do_cycles(void *priv, int8_t do_cycles)
{
YMFMChipBase *drv = (YMFMChipBase *) priv;
drv->set_do_cycles(do_cycles);
}
@@ -413,10 +523,53 @@ static void
ymfm_drv_generate(void *priv, int32_t *data, uint32_t num_samples)
{
YMFMChipBase *drv = (YMFMChipBase *) priv;
// drv->generate_resampled(data, num_samples);
drv->generate(data, num_samples);
}
const device_t ym2149_ymfm_device = {
.name = "Yamaha 2149 SSG (YMFM)",
.internal_name = "ym2149_ymfm",
.flags = 0,
.local = FM_YM2149,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym3526_ymfm_device = {
.name = "Yamaha YM3526 OPL (YMFM)",
.internal_name = "ym3526_ymfm",
.flags = 0,
.local = FM_YM3526,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t y8950_ymfm_device = {
.name = "Yamaha Y8950 (YMFM)",
.internal_name = "y8950_ymfm",
.flags = 0,
.local = FM_Y8950,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym3812_ymfm_device = {
.name = "Yamaha YM3812 OPL2 (YMFM)",
.internal_name = "ym3812_ymfm",
@@ -473,14 +626,255 @@ const device_t ymf278b_ymfm_device = {
.config = NULL
};
const device_t ym2413_ymfm_device = {
.name = "Yamaha YM2413 OPLL (YMFM)",
.internal_name = "ym2413_ymfm",
.flags = 0,
.local = FM_YM2413,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2423_ymfm_device = {
.name = "Yamaha YM2423 OPLL-X (YMFM)",
.internal_name = "ym2423_ymfm",
.flags = 0,
.local = FM_YM2423,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ymf281_ymfm_device = {
.name = "Yamaha YMF281 OPLLP (YMFM)",
.internal_name = "ymf281_ymfm",
.flags = 0,
.local = FM_YMF281,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ds1001_ymfm_device = {
.name = "Konami VRC7 MMC (YMFM)",
.internal_name = "ds1001_ymfm",
.flags = 0,
.local = FM_DS1001,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2151_ymfm_device = {
.name = "Yamaha YM2151 OPM (YMFM)",
.internal_name = "ym2151_ymfm",
.flags = 0,
.local = FM_YM2151,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2203_ymfm_device = {
.name = "Yamaha YM2203 OPN (YMFM)",
.internal_name = "ym2203_ymfm",
.flags = 0,
.local = FM_YM2203,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2608_ymfm_device = {
.name = "Yamaha YM2608 OPNA (YMFM)",
.internal_name = "ym2608_ymfm",
.flags = 0,
.local = FM_YM2608,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ymf288_ymfm_device = {
.name = "Yamaha YMF288 OPN3L (YMFM)",
.internal_name = "ymf288_ymfm",
.flags = 0,
.local = FM_YMF288,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2610_ymfm_device = {
.name = "Yamaha YM2610 OPNB (YMFM)",
.internal_name = "ym2610_ymfm",
.flags = 0,
.local = FM_YM2610,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2610b_ymfm_device = {
.name = "Yamaha YM2610b OPNB2 (YMFM)",
.internal_name = "ym2610b_ymfm",
.flags = 0,
.local = FM_YM2610B,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2612_ymfm_device = {
.name = "Yamaha YM2612 OPN2 (YMFM)",
.internal_name = "ym2612_ymfm",
.flags = 0,
.local = FM_YM2612,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym3438_ymfm_device = {
.name = "Yamaha YM3438 OPN2C (YMFM)",
.internal_name = "ym3438_ymfm",
.flags = 0,
.local = FM_YM3438,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ymf276_ymfm_device = {
.name = "Yamaha YMF276 OPN2L (YMFM)",
.internal_name = "ymf276_ymfm",
.flags = 0,
.local = FM_YMF276,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym2164_ymfm_device = {
.name = "Yamaha YM2164 OPP (YMFM)",
.internal_name = "ym2164_ymfm",
.flags = 0,
.local = FM_YM2164,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ym3806_ymfm_device = {
.name = "Yamaha YM3806 OPQ (YMFM)",
.internal_name = "ym3806_ymfm",
.flags = 0,
.local = FM_YM3806,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
#if 0
const device_t ymf271_ymfm_device = {
.name = "Yamaha YMF271 OPX (YMFM)",
.internal_name = "ym271_ymfm",
.flags = 0,
.local = FM_YMF271,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
#endif
const device_t ym2414_ymfm_device = {
.name = "Yamaha YM2414 OPZ (YMFM)",
.internal_name = "ym2414_ymfm",
.flags = 0,
.local = FM_YM2414,
.init = ymfm_drv_init,
.close = ymfm_drv_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const fm_drv_t ymfm_drv {
&ymfm_drv_read,
&ymfm_drv_write,
&ymfm_drv_update,
&ymfm_drv_reset_buffer,
&ymfm_drv_set_do_cycles,
NULL,
ymfm_drv_generate,
.read = &ymfm_drv_read,
.write = &ymfm_drv_write,
.update = &ymfm_drv_update,
.reset_buffer = &ymfm_drv_reset_buffer,
.set_do_cycles = &ymfm_drv_set_do_cycles,
.priv = NULL,
.generate = ymfm_drv_generate,
};
#ifdef __clang__

4
src/sound/snd_optimc.c
View File

@@ -482,7 +482,7 @@ const device_t acermagic_s20_device = {
.init = optimc_init,
.close = optimc_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = optimc_speed_changed,
.force_redraw = NULL,
.config = optimc_config
@@ -496,7 +496,7 @@ const device_t mirosound_pcm10_device = {
.init = optimc_init,
.close = optimc_close,
.reset = NULL,
{ .available = mirosound_pcm10_available },
.available = mirosound_pcm10_available,
.speed_changed = optimc_speed_changed,
.force_redraw = NULL,
.config = optimc_config

6
src/sound/snd_pas16.c
View File

@@ -2428,7 +2428,7 @@ const device_t pasplus_device = {
.init = pas16_init,
.close = pas16_close,
.reset = pas16_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = pas16_speed_changed,
.force_redraw = NULL,
.config = pas16_config
@@ -2442,7 +2442,7 @@ const device_t pas16_device = {
.init = pas16_init,
.close = pas16_close,
.reset = pas16_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = pas16_speed_changed,
.force_redraw = NULL,
.config = pas16_config
@@ -2456,7 +2456,7 @@ const device_t pas16d_device = {
.init = pas16_init,
.close = pas16_close,
.reset = pas16_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = pas16_speed_changed,
.force_redraw = NULL,
.config = pas16_config

2
src/sound/snd_ps1.c
View File

@@ -203,7 +203,7 @@ const device_t ps1snd_device = {
.init = ps1snd_init,
.close = ps1snd_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

6
src/sound/snd_pssj.c
View File

@@ -295,7 +295,7 @@ const device_t pssj_device = {
.init = pssj_init,
.close = pssj_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -309,7 +309,7 @@ const device_t pssj_1e0_device = {
.init = pssj_1e0_init,
.close = pssj_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -323,7 +323,7 @@ const device_t pssj_isa_device = {
.init = pssj_isa_init,
.close = pssj_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = pssj_isa_config

71
src/sound/snd_sb.c
View File

@@ -1177,12 +1177,11 @@ sb_ct1745_mixer_read(uint16_t addr, void *priv)
const sb_ct1745_mixer_t *mixer = &sb->mixer_sb16;
uint8_t ret = 0xff;
if (!(addr & 1))
ret = mixer->index;
sb_log("sb_ct1745: received register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
if ((mixer->index >= 0x30) && (mixer->index <= 0x47))
if (!(addr & 1))
ret = 0xff /*mixer->index*/;
else if ((mixer->index >= 0x30) && (mixer->index <= 0x47))
ret = mixer->regs[mixer->index];
else {
switch (mixer->index) {
@@ -5525,7 +5524,7 @@ const device_t sb_1_device = {
.init = sb_1_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_config
@@ -5539,7 +5538,7 @@ const device_t sb_15_device = {
.init = sb_15_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb15_config
@@ -5553,7 +5552,7 @@ const device_t sb_mcv_device = {
.init = sb_mcv_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_mcv_config
@@ -5567,7 +5566,7 @@ const device_t sb_2_device = {
.init = sb_2_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb2_config
@@ -5581,7 +5580,7 @@ const device_t sb_pro_v1_device = {
.init = sb_pro_v1_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_pro_config
@@ -5595,7 +5594,7 @@ const device_t sb_pro_v2_device = {
.init = sb_pro_v2_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_pro_config
@@ -5609,7 +5608,7 @@ const device_t sb_pro_mcv_device = {
.init = sb_pro_mcv_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_pro_mcv_config
@@ -5623,7 +5622,7 @@ const device_t sb_pro_compat_device = {
.init = sb_pro_compat_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -5637,7 +5636,7 @@ const device_t sb_16_device = {
.init = sb_16_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_config
@@ -5651,7 +5650,7 @@ const device_t sb_vibra16s_onboard_device = {
.init = sb_16_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_config
@@ -5665,7 +5664,7 @@ const device_t sb_vibra16s_device = {
.init = sb_16_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_config
@@ -5679,7 +5678,7 @@ const device_t sb_vibra16xv_device = {
.init = sb_vibra16_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = sb_vibra16xv_available },
.available = sb_vibra16xv_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_pnp_config
@@ -5693,7 +5692,7 @@ const device_t sb_vibra16c_onboard_device = {
.init = sb_vibra16_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = sb_vibra16c_available },
.available = sb_vibra16c_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_pnp_config
@@ -5707,7 +5706,7 @@ const device_t sb_vibra16c_device = {
.init = sb_vibra16_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = sb_vibra16c_available },
.available = sb_vibra16c_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_pnp_config
@@ -5721,7 +5720,7 @@ const device_t sb_16_reply_mca_device = {
.init = sb_16_reply_mca_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_pnp_config
@@ -5735,7 +5734,7 @@ const device_t sb_16_pnp_device = {
.init = sb_16_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = sb_16_pnp_available },
.available = sb_16_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_16_pnp_config
@@ -5749,7 +5748,7 @@ const device_t sb_16_compat_device = {
.init = sb_16_compat_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -5763,7 +5762,7 @@ const device_t sb_16_compat_nompu_device = {
.init = sb_16_compat_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -5777,7 +5776,7 @@ const device_t sb_32_pnp_device = {
.init = sb_awe32_pnp_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_32_pnp_available },
.available = sb_32_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_32_pnp_config
@@ -5791,7 +5790,7 @@ const device_t sb_awe32_device = {
.init = sb_awe32_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_awe32_available },
.available = sb_awe32_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_awe32_config
@@ -5805,7 +5804,7 @@ const device_t sb_awe32_pnp_device = {
.init = sb_awe32_pnp_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_awe32_pnp_available },
.available = sb_awe32_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_awe32_pnp_config
@@ -5819,7 +5818,7 @@ const device_t sb_awe64_value_device = {
.init = sb_awe32_pnp_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_awe64_value_available },
.available = sb_awe64_value_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_awe64_value_config
@@ -5833,7 +5832,7 @@ const device_t sb_awe64_device = {
.init = sb_awe32_pnp_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_awe64_available },
.available = sb_awe64_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_awe64_config
@@ -5847,7 +5846,7 @@ const device_t sb_awe64_gold_device = {
.init = sb_awe32_pnp_init,
.close = sb_awe32_close,
.reset = NULL,
{ .available = sb_awe64_gold_available },
.available = sb_awe64_gold_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = sb_awe64_gold_config
@@ -5861,7 +5860,7 @@ const device_t ess_688_device = {
.init = ess_x688_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_688_config
@@ -5875,7 +5874,7 @@ const device_t ess_ess0100_pnp_device = {
.init = ess_x688_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = ess_688_pnp_available },
.available = ess_688_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_688_pnp_config
@@ -5889,7 +5888,7 @@ const device_t ess_1688_device = {
.init = ess_x688_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_1688_config
@@ -5903,7 +5902,7 @@ const device_t ess_ess0102_pnp_device = {
.init = ess_x688_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = ess_1688_pnp_available },
.available = ess_1688_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_1688_pnp_config
@@ -5917,7 +5916,7 @@ const device_t ess_ess0968_pnp_device = {
.init = ess_x688_pnp_init,
.close = sb_close,
.reset = NULL,
{ .available = ess_1688_968_pnp_available },
.available = ess_1688_968_pnp_available,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_1688_pnp_config
@@ -5931,7 +5930,7 @@ const device_t ess_soundpiper_16_mca_device = {
.init = ess_x688_mca_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_688_pnp_config
@@ -5945,7 +5944,7 @@ const device_t ess_soundpiper_32_mca_device = {
.init = ess_x688_mca_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_1688_pnp_config
@@ -5959,7 +5958,7 @@ const device_t ess_chipchat_16_mca_device = {
.init = ess_x688_mca_init,
.close = sb_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = sb_speed_changed,
.force_redraw = NULL,
.config = ess_1688_pnp_config

8
src/sound/snd_sb_dsp.c
View File

@@ -1938,6 +1938,14 @@ sb_read(uint16_t a, void *priv)
} else
ret = 0xff;
break;
case 0x7:
case 0xB:
/*
These two ports are tested for random noise by OS/2 Warp 4.0, so
return 0xff to get through said test.
*/
ret = 0xff;
break;
case 0xA: /* Read data */
if (dsp->mpu && dsp->uart_midi)
ret = MPU401_ReadData(dsp->mpu);

6
src/sound/snd_sn76489.c
View File

@@ -318,7 +318,7 @@ const device_t sn76489_device = {
.init = sn76489_device_init,
.close = sn76489_device_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -332,7 +332,7 @@ const device_t ncr8496_device = {
.init = ncr8496_device_init,
.close = sn76489_device_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -346,7 +346,7 @@ const device_t tndy_device = {
.init = tndy_device_init,
.close = sn76489_device_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = tndy_config

4
src/sound/snd_ssi2001.c
View File

@@ -186,7 +186,7 @@ const device_t ssi2001_device = {
.init = ssi2001_init,
.close = ssi2001_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ssi2001_config
@@ -200,7 +200,7 @@ const device_t entertainer_device = {
.init = entertainer_init,
.close = entertainer_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = entertainer_config

4
src/sound/snd_wss.c
View File

@@ -293,7 +293,7 @@ const device_t wss_device = {
.init = wss_init,
.close = wss_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = wss_speed_changed,
.force_redraw = NULL,
.config = wss_config
@@ -307,7 +307,7 @@ const device_t ncr_business_audio_device = {
.init = ncr_audio_init,
.close = wss_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = wss_speed_changed,
.force_redraw = NULL,
.config = NULL

12
src/sound/ymfm/CMakeLists.txt
View File

@@ -9,4 +9,14 @@
# CMake build script.
#
add_library(ymfm STATIC ymfm_misc.cpp ymfm_opl.cpp ymfm_opm.cpp ymfm_opn.cpp ymfm_opq.cpp ymfm_opz.cpp ymfm_pcm.cpp ymfm_adpcm.cpp)
add_library(ymfm STATIC
ymfm_adpcm.cpp
ymfm_misc.cpp
ymfm_opl.cpp
ymfm_opm.cpp
ymfm_opn.cpp
ymfm_opq.cpp
ymfm_opz.cpp
ymfm_pcm.cpp
ymfm_ssg.cpp
)

2
src/sound/ymfm/ymfm_opn.h
View File

@@ -793,7 +793,7 @@ public:
ymf276(ymfm_interface &intf) : ym2612(intf) { }
// generate one sample of sound
void generate(output_data *output, uint32_t numsamples);
void generate(output_data *output, uint32_t numsamples = 1);
};
}

12
src/sound/ymfm/ymfm_opx.h
View File

@@ -105,7 +105,7 @@ public:
static constexpr uint8_t STATUS_IRQ = 0;
// constructor
opz_registers();
opx_registers();
// reset to initial state
void reset();
@@ -244,17 +244,17 @@ protected:
// IMPLEMENTATION CLASSES
//*********************************************************
// ======================> ym2414
// ======================> ymf271
class ym2414
class ymf271
{
public:
using fm_engine = fm_engine_base<opz_registers>;
using fm_engine = fm_engine_base<opx_registers>;
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
using output_data = fm_engine::output_data;
// constructor
ym2414(ymfm_interface &intf);
ymf271(ymfm_interface &intf);
// reset
void reset();
@@ -287,4 +287,4 @@ protected:
}
#endif // YMFM_OPZ_H
#endif // YMFM_OPX_H

2
src/video/vid_8514a.c
View File

@@ -285,7 +285,7 @@ ibm8514_accel_out_pixtrans(svga_t *svga, UNUSED(uint16_t port), uint32_t val, in
if ((cmd >= 2) && (dev->accel.cmd & 0x1000))
val = (val >> 8) | (val << 8);
}
if ((cmd <= 2) || (cmd == 4)) {
if ((cmd <= 2) || (cmd == 4) || ((cmd == 6))) {
if ((dev->accel.cmd & 0x08) && (cmd >= 2))
monoxfer = val;
else {

401
src/video/vid_cl54xx.c
View File

@@ -249,6 +249,7 @@ typedef struct gd54xx_t {
uint8_t status;
uint8_t extensions;
uint8_t crtcreg_mask;
uint8_t aperture_mask;
uint8_t fc; /* Feature Connector */
@@ -271,9 +272,15 @@ typedef struct gd54xx_t {
void *ddc;
} gd54xx_t;
static video_timings_t timing_gd54xx_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 8, .read_w = 8, .read_l = 12 };
static video_timings_t timing_gd54xx_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 8, .read_b = 10, .read_w = 10, .read_l = 20 };
static video_timings_t timing_gd54xx_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 8, .read_b = 10, .read_w = 10, .read_l = 20 };
static video_timings_t timing_gd54xx_isa = { .type = VIDEO_ISA,
.write_b = 3, .write_w = 3, .write_l = 6,
.read_b = 8, .read_w = 8, .read_l = 12 };
static video_timings_t timing_gd54xx_vlb = { .type = VIDEO_BUS,
.write_b = 4, .write_w = 4, .write_l = 8,
.read_b = 10, .read_w = 10, .read_l = 20 };
static video_timings_t timing_gd54xx_pci = { .type = VIDEO_PCI, .write_b = 4,
.write_w = 4, .write_l = 8, .read_b = 10,
.read_w = 10, .read_l = 20 };
static void
gd543x_mmio_write(uint32_t addr, uint8_t val, void *priv);
@@ -512,7 +519,8 @@ gd54xx_interrupt_enabled(gd54xx_t *gd54xx)
static int
gd54xx_vga_vsync_enabled(gd54xx_t *gd54xx)
{
if (!(gd54xx->svga.crtc[0x11] & 0x20) && (gd54xx->svga.crtc[0x11] & 0x10) && gd54xx_interrupt_enabled(gd54xx))
if (!(gd54xx->svga.crtc[0x11] & 0x20) && (gd54xx->svga.crtc[0x11] & 0x10) &&
gd54xx_interrupt_enabled(gd54xx))
return 1;
return 0;
}
@@ -573,7 +581,8 @@ gd54xx_overlay_draw(svga_t *svga, int displine)
OVERLAY_SAMPLE();
for (int x = 0; (x < gd54xx->overlay.region2size) && ((x + gd54xx->overlay.region1size) < svga->hdisp); x++) {
for (int x = 0; (x < gd54xx->overlay.region2size) &&
((x + gd54xx->overlay.region1size) < svga->hdisp); x++) {
if (gd54xx->overlay.occlusion) {
occl = 1;
ckval = gd54xx->overlay.ck;
@@ -615,8 +624,10 @@ gd54xx_update_overlay(gd54xx_t *gd54xx)
int bpp = svga->bpp;
svga->overlay.cur_ysize = gd54xx->overlay.wve - gd54xx->overlay.wvs + 1;
gd54xx->overlay.region1size = 32 * gd54xx->overlay.r1sz / bpp + (gd54xx->overlay.r1adjust * 8 / bpp);
gd54xx->overlay.region2size = 32 * gd54xx->overlay.r2sz / bpp + (gd54xx->overlay.r2adjust * 8 / bpp);
gd54xx->overlay.region1size = 32 * gd54xx->overlay.r1sz / bpp +
(gd54xx->overlay.r1adjust * 8 / bpp);
gd54xx->overlay.region2size = 32 * gd54xx->overlay.r2sz / bpp +
(gd54xx->overlay.r2adjust * 8 / bpp);
gd54xx->overlay.occlusion = (svga->crtc[0x3e] & 0x80) != 0 && svga->bpp <= 16;
@@ -624,7 +635,8 @@ gd54xx_update_overlay(gd54xx_t *gd54xx)
if (gd54xx->overlay.colorkeymode == 0)
gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare;
else if (gd54xx->overlay.colorkeymode == 1)
gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare | (gd54xx->overlay.colorkeycomparemask << 8);
gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare |
(gd54xx->overlay.colorkeycomparemask << 8);
else
gd54xx->overlay.occlusion = 0;
}
@@ -633,7 +645,8 @@ gd54xx_update_overlay(gd54xx_t *gd54xx)
static int
gd54xx_has_transp(svga_t *svga, int mask)
{
if (((svga->crtc[0x27] == CIRRUS_ID_CLGD5446) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)) && !mask)
if (((svga->crtc[0x27] == CIRRUS_ID_CLGD5446) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)) &&
!mask)
return 1; /* 5446 and 5480 have mask but not transparency. */
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5426) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5428))
return 1; /* 5426 and 5428 have both. */
@@ -699,12 +712,17 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) {
for (uint8_t c = 0; c < 16; c++) {
if (svga->attrregs[0x10] & 0x80)
svga->egapal[c] = (svga->attrregs[c] & 0xf) | ((svga->attrregs[0x14] & 0xf) << 4);
svga->egapal[c] = (svga->attrregs[c] & 0xf) |
((svga->attrregs[0x14] & 0xf) << 4);
else
svga->egapal[c] = (svga->attrregs[c] & 0x3f) | ((svga->attrregs[0x14] & 0xc) << 4);
svga->egapal[c] = (svga->attrregs[c] & 0x3f) |
((svga->attrregs[0x14] & 0xc) << 4);
}
}
/* Recalculate timings on change of attribute register 0x11 (overscan border color) too. */
/*
Recalculate timings on change of attribute register
0x11 (overscan border color) too.
*/
if (svga->attraddr == 0x10) {
if (o != val)
svga_recalctimings(svga);
@@ -794,20 +812,28 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga_recalctimings(svga);
svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW;
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) ? 64 : 32;
svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize =
((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) &&
(val & CIRRUS_CURSOR_LARGE)) ? 64 : 32;
else
svga->hwcursor.cur_xsize = 32;
if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422))
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3c) * 256));
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) &&
(svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE))
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) +
((svga->seqregs[0x13] & 0x3c) * 256));
else
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3f) * 256));
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) +
((svga->seqregs[0x13] & 0x3f) * 256));
break;
case 0x13:
if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422))
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3c) * 256));
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) &&
(svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE))
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) +
((val & 0x3c) * 256));
else
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3f) * 256));
svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) +
((val & 0x3f) * 256));
break;
case 0x07:
svga->packed_chain4 = svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA;
@@ -869,7 +895,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
gd54xx->extpal[index].r = svga->dac_r;
gd54xx->extpal[index].g = svga->dac_g;
gd54xx->extpal[index].b = val;
gd54xx->extpallook[index] = makecol32(video_6to8[gd54xx->extpal[index].r & 0x3f], video_6to8[gd54xx->extpal[index].g & 0x3f], video_6to8[gd54xx->extpal[index].b & 0x3f]);
gd54xx->extpallook[index] = makecol32(video_6to8[gd54xx->extpal[index].r & 0x3f],
video_6to8[gd54xx->extpal[index].g & 0x3f],
video_6to8[gd54xx->extpal[index].b & 0x3f]);
if (svga->ext_overscan && (index == 2)) {
o32 = svga->overscan_color;
svga->overscan_color = gd54xx->extpallook[2];
@@ -880,7 +908,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga->vgapal[index].r = svga->dac_r;
svga->vgapal[index].g = svga->dac_g;
svga->vgapal[index].b = val;
svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]);
svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f],
video_6to8[svga->vgapal[index].g & 0x3f],
video_6to8[svga->vgapal[index].b & 0x3f]);
}
svga->dac_addr = (svga->dac_addr + 1) & 255;
svga->dac_pos = 0;
@@ -895,7 +925,8 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga->gdcaddr = val /* & 0x3f*/;
return;
case 0x3cf:
if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)))
if (((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)) &&
(svga->gdcaddr > 0x1f))
return;
o = svga->gdcreg[svga->gdcaddr];
@@ -941,7 +972,8 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
gd54xx_set_svga_fast(gd54xx);
if (((svga->gdcaddr == 5) && ((val ^ o) & 0x70)) || ((svga->gdcaddr == 6) && ((val ^ o) & 1)))
if (((svga->gdcaddr == 5) && ((val ^ o) & 0x70)) ||
((svga->gdcaddr == 6) && ((val ^ o) & 1)))
svga_recalctimings(svga);
} else {
switch (svga->gdcaddr) {
@@ -1102,7 +1134,10 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga->crtcreg = val & gd54xx->crtcreg_mask;
return;
case 0x3d5:
if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && !gd54xx->unlocked)
if (!gd54xx->unlocked &&
((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) ||
(svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) ||
(svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)))
return;
if ((svga->crtcreg == 0x25) || (svga->crtcreg == 0x27))
return;
@@ -1217,7 +1252,8 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) {
svga->fullchange = 3;
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) +
((svga->crtc[8] & 0x60) >> 5);
} else {
svga->fullchange = changeframecount;
svga_recalctimings(svga);
@@ -1283,7 +1319,8 @@ gd54xx_in(uint16_t addr, void *priv)
ret |= 0x80;
}
break;
case 0x0a: /*Scratch Pad 1 (Memory size for 5402/542x)*/
case 0x0a:
/* Scratch Pad 1 (Memory size for 5402/542x) */
ret = svga->seqregs[0x0a] & ~0x1a;
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5402) {
ret |= 0x01; /*512K of memory*/
@@ -1310,17 +1347,21 @@ gd54xx_in(uint16_t addr, void *priv)
case 0x0e:
ret = gd54xx->vclk_n[svga->seqaddr - 0x0b];
break;
case 0x0f: /*DRAM control*/
case 0x0f: /* DRAM control */
ret = svga->seqregs[0x0f] & ~0x98;
switch (gd54xx->vram_size >> 10) {
case 512:
ret |= 0x08; /*16-bit DRAM data bus width*/
ret |= 0x08; /* 16-bit DRAM data bus width */
break;
case 1024:
ret |= 0x10; /*32-bit DRAM data bus width for 1M of memory*/
ret |= 0x10; /* 32-bit DRAM data bus width for 1M of memory */
break;
case 2048:
ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18; /*32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width for 2M of memory*/
/*
32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width
for 2M of memory
*/
ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18;
break;
case 4096:
ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/
@@ -1352,7 +1393,8 @@ gd54xx_in(uint16_t addr, void *priv)
case 0x17:
ret = svga->seqregs[0x17] & ~(7 << 3);
if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) {
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) ||
(svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
if (gd54xx->vlb)
ret |= (CL_GD5428_SYSTEM_BUS_VESA << 3);
else if (gd54xx->mca)
@@ -1453,7 +1495,9 @@ gd54xx_in(uint16_t addr, void *priv)
if (svga->gdcaddr >= 0x10) {
if ((svga->gdcaddr > 8) && !gd54xx->unlocked)
ret = 0xff;
else if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)))
else if (((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) ||
(svga->crtc[0x27] == CIRRUS_ID_CLGD5424)) &&
(svga->gdcaddr > 0x1f))
ret = 0xff;
else
switch (svga->gdcaddr) {
@@ -1583,7 +1627,10 @@ gd54xx_in(uint16_t addr, void *priv)
break;
case 0x3d5:
ret = svga->crtc[svga->crtcreg];
if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && !gd54xx->unlocked)
if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) ||
(svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) ||
(svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) &&
!gd54xx->unlocked)
ret = 0xff;
else
switch (svga->crtcreg) {
@@ -1601,7 +1648,8 @@ gd54xx_in(uint16_t addr, void *priv)
ret = svga->crtc[0x27]; /*GD542x/GD543x*/
break;
case 0x28: /*Class ID*/
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5440))
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) ||
(svga->crtc[0x27] == CIRRUS_ID_CLGD5440))
ret = 0xff; /*Standard CL-GD5430/40*/
break;
@@ -1630,13 +1678,15 @@ gd54xx_recalc_banking(gd54xx_t *gd54xx)
else
svga->extra_banks[1] = svga->extra_banks[0] + 0x8000;
} else {
if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424))
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424) &&
(svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K))
svga->extra_banks[0] = svga->gdcreg[0x09] << 14;
else
svga->extra_banks[0] = svga->gdcreg[0x09] << 12;
if (svga->gdcreg[0x0b] & CIRRUS_BANKING_DUAL) {
if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424))
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424) &&
(svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K))
svga->extra_banks[1] = svga->gdcreg[0x0a] << 14;
else
svga->extra_banks[1] = svga->gdcreg[0x0a] << 12;
@@ -1652,6 +1702,8 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
uint32_t base;
uint32_t size;
gd54xx->aperture_mask = 0x00;
if (gd54xx->pci && (!(gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))) {
mem_mapping_disable(&svga->mapping);
mem_mapping_disable(&gd54xx->linear_mapping);
@@ -1661,7 +1713,8 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
gd54xx->mmio_vram_overlap = 0;
if (!gd54xx_is_5422(svga) || !(svga->seqregs[0x07] & 0xf0) || !(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
if (!gd54xx_is_5422(svga) || !(svga->seqregs[0x07] & 0xf0) ||
!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
mem_mapping_disable(&gd54xx->linear_mapping);
mem_mapping_disable(&gd54xx->aperture2_mapping);
switch (svga->gdcreg[6] & 0x0c) {
@@ -1687,7 +1740,8 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
break;
}
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) {
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) && (svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
if (gd54xx->mmio_vram_overlap) {
mem_mapping_disable(&svga->mapping);
mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x08000);
@@ -1723,19 +1777,28 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
size = 4 * 1024 * 1024;
}
if (size >= (16 * 1024 * 1024))
gd54xx->aperture_mask = 0x03;
mem_mapping_disable(&svga->mapping);
mem_mapping_set_addr(&gd54xx->linear_mapping, base, size);
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) {
if (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)
mem_mapping_disable(&gd54xx->mmio_mapping); /* MMIO is handled in the linear read/write functions */
/* MMIO is handled in the linear read/write functions */
mem_mapping_disable(&gd54xx->mmio_mapping);
else
mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100);
} else
mem_mapping_disable(&gd54xx->mmio_mapping);
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_APERTURE2) && ((gd54xx->blt.mode & (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC)) == (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC))) {
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) &&
(gd54xx->blt.status & CIRRUS_BLT_APERTURE2) &&
((gd54xx->blt.mode & (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC)) ==
(CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC))) {
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)
mem_mapping_set_addr(&gd54xx->aperture2_mapping, gd54xx->lfb_base + 16777216, 16777216);
mem_mapping_set_addr(&gd54xx->aperture2_mapping,
gd54xx->lfb_base + 16777216, 16777216);
else
mem_mapping_set_addr(&gd54xx->aperture2_mapping, 0xbc000, 0x04000);
} else
@@ -1754,10 +1817,14 @@ gd54xx_recalctimings(svga_t *svga)
svga->hblankstart = svga->crtc[2];
if (svga->crtc[0x1b] & ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5424) ? 0xa0 : 0x20)) {
/* Special blanking mode: the blank start and end become components of the window generator,
and the actual blanking comes from the display enable signal. */
/* This means blanking during overscan, we already calculate it that way, so just use the
same calculation and force otvercan to 0. */
/*
Special blanking mode: the blank start and end become components
of the window generator, and the actual blanking comes from the
display enable signal.
This means blanking during overscan, we already calculate it that
way, so just use the same calculation and force otvercan to 0.
*/
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | ((svga->crtc[5] & 0x80) ? 0x20 : 0x00) |
(((svga->crtc[0x1a] >> 4) & 3) << 6);
@@ -1895,7 +1962,8 @@ gd54xx_recalctimings(svga_t *svga)
break;
case CIRRUS_SR7_BPP_16:
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) ||
(svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
svga->bpp = 16;
if (linedbl)
svga->render = svga_render_16bpp_lowres;
@@ -1947,7 +2015,8 @@ gd54xx_recalctimings(svga_t *svga)
clocksel = (svga->miscout >> 2) & 3;
if (!gd54xx->vclk_n[clocksel] || !gd54xx->vclk_d[clocksel])
svga->clock = (cpuclock * (float) (1ULL << 32)) / ((svga->miscout & 0xc) ? 28322000.0 : 25175000.0);
svga->clock = (cpuclock * (float) (1ULL << 32)) /
((svga->miscout & 0xc) ? 28322000.0 : 25175000.0);
else {
int n = gd54xx->vclk_n[clocksel] & 0x7f;
int d = (gd54xx->vclk_d[clocksel] & 0x3e) >> 1;
@@ -2112,10 +2181,10 @@ gd54xx_rop(gd54xx_t *gd54xx, uint8_t *res, uint8_t *dst, const uint8_t *src)
}
static uint8_t
gd54xx_get_aperture(uint32_t addr)
gd54xx_get_aperture(gd54xx_t *gd54xx, uint32_t addr)
{
uint32_t ap = addr >> 22;
return (uint8_t) (ap & 0x03);
return (uint8_t) (ap & gd54xx->aperture_mask);
}
static uint32_t
@@ -2191,7 +2260,8 @@ gd54xx_write(uint32_t addr, uint8_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_mem_sys_src_write(gd54xx, val, 0);
return;
}
@@ -2209,7 +2279,8 @@ gd54xx_writew(uint32_t addr, uint16_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_write(addr, val, gd54xx);
gd54xx_write(addr + 1, val >> 8, gd54xx);
return;
@@ -2235,7 +2306,8 @@ gd54xx_writel(uint32_t addr, uint32_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_write(addr, val, gd54xx);
gd54xx_write(addr + 1, val >> 8, gd54xx);
gd54xx_write(addr + 2, val >> 16, gd54xx);
@@ -2297,8 +2369,10 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
for (i = 0; i < 8; i++) {
j = (0x80 >> i);
if (svga->seqregs[2] & j) {
svga->vram[addr + (i << 1)] = (val & j) ? svga->gdcreg[1] : svga->gdcreg[0];
svga->vram[addr + (i << 1) + 1] = (val & j) ? svga->gdcreg[0x11] : svga->gdcreg[0x10];
svga->vram[addr + (i << 1)] = (val & j) ?
svga->gdcreg[1] : svga->gdcreg[0];
svga->vram[addr + (i << 1) + 1] = (val & j) ?
svga->gdcreg[0x11] : svga->gdcreg[0x10];
}
}
} else {
@@ -2343,19 +2417,24 @@ gd54xx_readb_linear(uint32_t addr, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
addr &= 0x003fffff; /* 4 MB mask */
if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA))
return svga_read_linear(addr, svga);
if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR))
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR))
return gd543x_mmio_read(addr & 0x000000ff, gd54xx);
}
/* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
/*
Do mem sys dest reads here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
return gd54xx_mem_sys_dest_read(gd54xx, ap);
switch (ap) {
@@ -2384,7 +2463,7 @@ gd54xx_readw_linear(uint32_t addr, void *priv)
svga_t *svga = &gd54xx->svga;
uint32_t old_addr = addr;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
uint16_t temp;
addr &= 0x003fffff; /* 4 MB mask */
@@ -2399,8 +2478,12 @@ gd54xx_readw_linear(uint32_t addr, void *priv)
}
}
/* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
/*
Do mem sys dest reads here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
temp = gd54xx_readb_linear(old_addr, priv);
temp |= gd54xx_readb_linear(old_addr + 1, priv) << 8;
return temp;
@@ -2434,7 +2517,7 @@ gd54xx_readl_linear(uint32_t addr, void *priv)
svga_t *svga = &gd54xx->svga;
uint32_t old_addr = addr;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
uint32_t temp;
addr &= 0x003fffff; /* 4 MB mask */
@@ -2449,8 +2532,12 @@ gd54xx_readl_linear(uint32_t addr, void *priv)
}
}
/* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
/*
Do mem sys dest reads here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
temp = gd54xx_readb_linear(old_addr, priv);
temp |= gd54xx_readb_linear(old_addr + 1, priv) << 8;
temp |= gd54xx_readb_linear(old_addr + 2, priv) << 16;
@@ -2491,7 +2578,7 @@ static uint8_t
gd5436_aperture2_readb(UNUSED(uint32_t addr), void *priv)
{
gd54xx_t *gd54xx = (gd54xx_t *) priv;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
@@ -2538,7 +2625,7 @@ static void
gd5436_aperture2_writeb(UNUSED(uint32_t addr), uint8_t val, void *priv)
{
gd54xx_t *gd54xx = (gd54xx_t *) priv;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
@@ -2577,7 +2664,7 @@ gd54xx_writeb_linear(uint32_t addr, uint8_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
svga_write_linear(addr, val, svga);
@@ -2587,14 +2674,19 @@ gd54xx_writeb_linear(uint32_t addr, uint8_t val, void *priv)
addr &= 0x003fffff; /* 4 MB mask */
if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
gd543x_mmio_write(addr & 0x000000ff, val, gd54xx);
return;
}
}
/* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
/*
Do mem sys src writes here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_mem_sys_src_write(gd54xx, val, ap);
return;
}
@@ -2624,7 +2716,7 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
uint32_t old_addr = addr;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
svga_writew_linear(addr, val, svga);
@@ -2634,14 +2726,19 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *priv)
addr &= 0x003fffff; /* 4 MB mask */
if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
gd543x_mmio_writew(addr & 0x000000ff, val, gd54xx);
return;
}
}
/* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
/*
Do mem sys src writes here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_writeb_linear(old_addr, val, gd54xx);
gd54xx_writeb_linear(old_addr + 1, val >> 8, gd54xx);
return;
@@ -2691,7 +2788,7 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
uint32_t old_addr = addr;
uint8_t ap = gd54xx_get_aperture(addr);
uint8_t ap = gd54xx_get_aperture(gd54xx, addr);
if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
svga_writel_linear(addr, val, svga);
@@ -2701,14 +2798,19 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
addr &= 0x003fffff; /* 4 MB mask */
if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) &&
(svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) {
gd543x_mmio_writel(addr & 0x000000ff, val, gd54xx);
return;
}
}
/* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
/*
Do mem sys src writes here if the blitter is neither paused,
nor is there a second aperture.
*/
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_writeb_linear(old_addr, val, gd54xx);
gd54xx_writeb_linear(old_addr + 1, val >> 8, gd54xx);
gd54xx_writeb_linear(old_addr + 2, val >> 16, gd54xx);
@@ -2770,7 +2872,8 @@ gd54xx_read(uint32_t addr, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
return gd54xx_mem_sys_dest_read(gd54xx, 0);
(void) xga_read_test(addr, svga);
@@ -2787,7 +2890,8 @@ gd54xx_readw(uint32_t addr, void *priv)
svga_t *svga = &gd54xx->svga;
uint16_t ret;
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
ret = gd54xx_read(addr, priv);
ret |= gd54xx_read(addr + 1, priv) << 8;
return ret;
@@ -2808,7 +2912,8 @@ gd54xx_readl(uint32_t addr, void *priv)
svga_t *svga = &gd54xx->svga;
uint32_t ret;
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
ret = gd54xx_read(addr, priv);
ret |= gd54xx_read(addr + 1, priv) << 8;
ret |= gd54xx_read(addr + 2, priv) << 16;
@@ -2934,7 +3039,9 @@ gd543x_mmio_write(uint32_t addr, uint8_t val, void *priv)
else
gd54xx->blt.dst_addr &= 0x1fffff;
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_AUTOSTART) && !(gd54xx->blt.status & CIRRUS_BLT_BUSY)) {
if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) &&
(gd54xx->blt.status & CIRRUS_BLT_AUTOSTART) &&
!(gd54xx->blt.status & CIRRUS_BLT_BUSY)) {
gd54xx->blt.status |= CIRRUS_BLT_BUSY;
gd54xx_start_blit(0, 0xffffffff, gd54xx, svga);
}
@@ -3010,7 +3117,8 @@ gd543x_mmio_writeb(uint32_t addr, uint8_t val, void *priv)
gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga;
if (!gd543x_do_mmio(svga, addr) && !gd54xx->blt.ms_is_dest && gd54xx->countminusone && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (!gd543x_do_mmio(svga, addr) && !gd54xx->blt.ms_is_dest && gd54xx->countminusone &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd54xx_mem_sys_src_write(gd54xx, val, 0);
return;
}
@@ -3028,7 +3136,8 @@ gd543x_mmio_writew(uint32_t addr, uint16_t val, void *priv)
gd543x_mmio_write(addr, val & 0xff, gd54xx);
gd543x_mmio_write(addr + 1, val >> 8, gd54xx);
} else if (gd54xx->mmio_vram_overlap) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd543x_mmio_write(addr, val & 0xff, gd54xx);
gd543x_mmio_write(addr + 1, val >> 8, gd54xx);
} else {
@@ -3050,7 +3159,8 @@ gd543x_mmio_writel(uint32_t addr, uint32_t val, void *priv)
gd543x_mmio_write(addr + 2, val >> 16, gd54xx);
gd543x_mmio_write(addr + 3, val >> 24, gd54xx);
} else if (gd54xx->mmio_vram_overlap) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
gd543x_mmio_write(addr, val & 0xff, gd54xx);
gd543x_mmio_write(addr + 1, val >> 8, gd54xx);
gd543x_mmio_write(addr + 2, val >> 16, gd54xx);
@@ -3199,9 +3309,9 @@ gd543x_mmio_read(uint32_t addr, void *priv)
}
} else if (gd54xx->mmio_vram_overlap)
ret = gd54xx_read(addr, gd54xx);
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
ret = gd54xx_mem_sys_dest_read(gd54xx, 0);
}
return ret;
}
@@ -3217,7 +3327,8 @@ gd543x_mmio_readw(uint32_t addr, void *priv)
ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr + 1, gd54xx) << 8);
else if (gd54xx->mmio_vram_overlap)
ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr + 1, gd54xx) << 8);
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
ret = gd543x_mmio_read(addr, priv);
ret |= gd543x_mmio_read(addr + 1, priv) << 8;
return ret;
@@ -3234,10 +3345,14 @@ gd543x_mmio_readl(uint32_t addr, void *priv)
uint32_t ret = 0xffffffff;
if (gd543x_do_mmio(svga, addr))
ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr + 1, gd54xx) << 8) | (gd543x_mmio_read(addr + 2, gd54xx) << 16) | (gd543x_mmio_read(addr + 3, gd54xx) << 24);
ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr + 1, gd54xx) << 8) |
(gd543x_mmio_read(addr + 2, gd54xx) << 16) |
(gd543x_mmio_read(addr + 3, gd54xx) << 24);
else if (gd54xx->mmio_vram_overlap)
ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr + 1, gd54xx) << 8) | (gd54xx_read(addr + 2, gd54xx) << 16) | (gd54xx_read(addr + 3, gd54xx) << 24);
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr + 1, gd54xx) << 8) |
(gd54xx_read(addr + 2, gd54xx) << 16) | (gd54xx_read(addr + 3, gd54xx) << 24);
else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
ret = gd543x_mmio_read(addr, priv);
ret |= gd543x_mmio_read(addr + 1, priv) << 8;
ret |= gd543x_mmio_read(addr + 2, priv) << 16;
@@ -3379,20 +3494,25 @@ gd54xx_blit(gd54xx_t *gd54xx, uint8_t mask, uint8_t *dst, uint8_t target, int sk
int is_transp;
int is_bgonly;
/* skip indicates whether or not it is a pixel to be skipped (used for left skip);
/*
skip indicates whether or not it is a pixel to be skipped (used for left skip);
mask indicates transparency or not (only when transparent comparison is enabled):
color expand: direct pattern bit; 1 = write, 0 = do not write
(the other way around in inverse mode);
normal 8-bpp or 16-bpp: does not match transparent color = write,
matches transparent color = do not write */
color expand: direct pattern bit; 1 = write, 0 = do not write
(the other way around in inverse mode);
normal 8-bpp or 16-bpp: does not match transparent color = write,
matches transparent color = do not write
*/
/* Make sure to always ignore transparency and skip in case of mem sys dest. */
is_transp = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : (gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP);
is_bgonly = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_BACKGROUNDONLY);
is_transp = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ?
0 : (gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP);
is_bgonly = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ?
0 : (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_BACKGROUNDONLY);
skip = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : skip;
if (is_transp) {
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV))
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) &&
(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV))
mask = !mask;
/* If mask is 1 and it is not a pixel to be skipped, write it. */
@@ -3531,9 +3651,9 @@ gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count)
gd54xx->countminusone = 1;
gd54xx->blt.sys_src32 = 0x00000000;
gd54xx->blt.sys_cnt = 0;
return;
} else if (gd54xx->countminusone) {
if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) || (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) {
if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) ||
(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) {
if (!gd54xx->blt.xx_count && !gd54xx->blt.x_count)
byte_pos = (((gd54xx->blt.mask >> 5) & 3) << 3);
else
@@ -3541,6 +3661,9 @@ gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count)
mask_shift = 31 - byte_pos;
if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND))
cpu_dat >>= byte_pos;
else if (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)
cpu_dat = ((cpu_dat & 0xff000000) >> 24) | ((cpu_dat & 0x00ff0000) >> 8) |
((cpu_dat & 0x0000ff00) << 8) | ((cpu_dat & 0x000000ff) << 24);
} else
mask_shift = 7;
@@ -3557,7 +3680,8 @@ gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count)
target = *dst;
gd54xx_rop(gd54xx, &target, &target, &exp);
if ((gd54xx->blt.pixel_width == 3) && (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND))
gd54xx_blit(gd54xx, bitmask, dst, target, ((gd54xx->blt.x_count + gd54xx->blt.xx_count) < gd54xx->blt.pattern_x));
gd54xx_blit(gd54xx, bitmask, dst, target,
((gd54xx->blt.x_count + gd54xx->blt.xx_count) < gd54xx->blt.pattern_x));
else
gd54xx_blit(gd54xx, bitmask, dst, target, (gd54xx->blt.x_count < gd54xx->blt.pattern_x));
@@ -3585,13 +3709,14 @@ gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count)
if (!gd54xx->blt.x_count) {
gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1);
if (gd54xx->blt.y_count)
gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr + (gd54xx->blt.dst_pitch * gd54xx->blt.y_count * gd54xx->blt.dir);
else {
gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr +
(gd54xx->blt.dst_pitch * gd54xx->blt.y_count *
gd54xx->blt.dir);
else
/* If we're here, the blit is over, reset. */
gd54xx_reset_blit(gd54xx);
}
/* Stop blitting and request new data if end of line reached. */
return;
break;
}
}
}
@@ -3642,12 +3767,15 @@ gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
mask = !mask;
/* This handles 8bpp and 16bpp non-color-expanding transparent comparisons. */
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && ((gd54xx->blt.mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) <= CIRRUS_BLTMODE_PIXELWIDTH16) && (src != ((gd54xx->blt.trans_mask >> (shift << 3)) & 0xff)))
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) &&
!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) &&
((gd54xx->blt.mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) <= CIRRUS_BLTMODE_PIXELWIDTH16) &&
(src != ((gd54xx->blt.trans_mask >> (shift << 3)) & 0xff)))
mask = 0;
if (((gd54xx->blt.width - width) >= gd54xx->blt.pattern_x) && !((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !mask)) {
if (((gd54xx->blt.width - width) >= gd54xx->blt.pattern_x) &&
!((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !mask))
svga->vram[dst_addr & gd54xx->vram_mask] = dst;
}
dst_addr += gd54xx->blt.dir;
gd54xx->blt.x_count++;
@@ -3661,14 +3789,16 @@ gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
width--;
if (width == 0xffff) {
width = gd54xx->blt.width;
dst_addr = gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr_backup + (gd54xx->blt.dst_pitch * gd54xx->blt.dir);
dst_addr = gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr_backup +
(gd54xx->blt.dst_pitch * gd54xx->blt.dir);
gd54xx->blt.y_count = (gd54xx->blt.y_count + gd54xx->blt.dir) & 7;
if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) {
if (gd54xx->blt.x_count != 0)
src_addr++;
} else
src_addr = gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr_backup + (gd54xx->blt.src_pitch * gd54xx->blt.dir);
src_addr = gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr_backup +
(gd54xx->blt.src_pitch * gd54xx->blt.dir);
dst_addr &= gd54xx->vram_mask;
gd54xx->blt.dst_addr_backup &= gd54xx->vram_mask;
@@ -3679,8 +3809,7 @@ gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
gd54xx->blt.height_internal--;
if (gd54xx->blt.height_internal == 0xffff) {
gd54xx_reset_blit(gd54xx);
return;
break;
}
}
}
@@ -3714,7 +3843,8 @@ gd54xx_mem_sys_dest(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
gd54xx->blt.msd_buf_pos = 0;
while (gd54xx->blt.msd_buf_pos < 32) {
gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos & 0x1f] = svga->vram[gd54xx->blt.src_addr_backup & gd54xx->vram_mask];
gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos & 0x1f] = svga->vram[gd54xx->blt.src_addr_backup &
gd54xx->vram_mask];
gd54xx->blt.src_addr_backup += gd54xx->blt.dir;
gd54xx->blt.msd_buf_pos++;
@@ -3724,17 +3854,21 @@ gd54xx_mem_sys_dest(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1);
if (gd54xx->blt.y_count)
gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr + (gd54xx->blt.src_pitch * gd54xx->blt.y_count * gd54xx->blt.dir);
gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr +
(gd54xx->blt.src_pitch * gd54xx->blt.y_count * gd54xx->blt.dir);
else
gd54xx->countminusone = 2; /* Signal end of blit. */
/* End of line reached, stop and notify regardless of how much we already transferred. */
goto request_more_data;
break;
}
}
/* End of while. */
request_more_data:
/* If the byte count we have blitted are not divisible by 4, round them up. */
/*
End of while.
If the byte count we have blitted are not divisible by 4,
round them up.
*/
if (gd54xx->blt.msd_buf_pos & 3)
gd54xx->blt.msd_buf_cnt = (gd54xx->blt.msd_buf_pos & ~3) + 4;
else
@@ -3747,7 +3881,9 @@ request_more_data:
static void
gd54xx_start_blit(uint32_t cpu_dat, uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
{
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_BACKWARDS) && !(gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY | CIRRUS_BLTMODE_COLOREXPAND)) && !(gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP))
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_BACKWARDS) &&
!(gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY | CIRRUS_BLTMODE_COLOREXPAND)) &&
!(gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP))
gd54xx->blt.dir = -1;
else
gd54xx->blt.dir = 1;
@@ -3758,7 +3894,8 @@ gd54xx_start_blit(uint32_t cpu_dat, uint32_t count, gd54xx_t *gd54xx, svga_t *sv
if (gd54xx->blt.pixel_width == 3)
gd54xx->blt.pattern_x = gd54xx->blt.mask & 0x1f; /* (Mask & 0x1f) bytes. */
else
gd54xx->blt.pattern_x = (gd54xx->blt.mask & 0x07) * gd54xx->blt.pixel_width; /* (Mask & 0x07) pixels. */
/* (Mask & 0x07) pixels. */
gd54xx->blt.pattern_x = (gd54xx->blt.mask & 0x07) * gd54xx->blt.pixel_width;
} else
gd54xx->blt.pattern_x = 0; /* No skip in normal blit mode. */
@@ -3798,7 +3935,8 @@ cl_pci_read(UNUSED(int func), int addr, void *priv)
break;
case PCI_REG_COMMAND:
ret = gd54xx->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/
/* Respond to IO and memory accesses */
ret = gd54xx->pci_regs[PCI_REG_COMMAND];
break;
case 0x07:
@@ -3912,8 +4050,10 @@ cl_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
break;
case 0x13:
/* 5480, like 5446 rev. B, has a 32 MB aperture, with the second set used for
BitBLT transfers. */
/*
5480, like 5446 rev. B, has a 32 MB aperture, with the second set used for
BitBLT transfers.
*/
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)
val &= 0xfe;
gd54xx->lfb_base = val << 24;
@@ -3931,7 +4071,8 @@ cl_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
val &= 0xf0;
gd54xx->vgablt_base |= (val << byte);
mem_mapping_disable(&gd54xx->vgablt_mapping);
if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000))
if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) &&
(gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000))
mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000);
break;
@@ -4260,7 +4401,8 @@ gd54xx_init(const device_t *info)
svga->decode_mask = gd54xx->vram_mask;
if (gd54xx->bit32) {
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel);
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl,
gd54xx_write, gd54xx_writew, gd54xx_writel);
mem_mapping_add(&gd54xx->mmio_mapping, 0, 0,
gd543x_mmio_read, gd543x_mmio_readw, gd543x_mmio_readl,
gd543x_mmio_writeb, gd543x_mmio_writew, gd543x_mmio_writel,
@@ -4278,7 +4420,8 @@ gd54xx_init(const device_t *info)
gd5480_vgablt_write, gd5480_vgablt_writew, gd5480_vgablt_writel,
NULL, MEM_MAPPING_EXTERNAL, gd54xx);
} else {
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, NULL, gd54xx_write, gd54xx_writew, NULL);
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, NULL,
gd54xx_write, gd54xx_writew, NULL);
mem_mapping_add(&gd54xx->mmio_mapping, 0, 0,
gd543x_mmio_read, gd543x_mmio_readw, NULL,
gd543x_mmio_writeb, gd543x_mmio_writew, NULL,
@@ -4306,7 +4449,7 @@ gd54xx_init(const device_t *info)
mem_mapping_disable(&gd54xx->bios_rom.mapping);
}
if ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) || (!gd54xx->pci && !gd54xx->vlb))
if ((id <= CIRRUS_ID_CLGD5429) || (!gd54xx->pci && !gd54xx->vlb))
mem_mapping_set_base_ignore(&gd54xx->linear_mapping, 0xff000000);
mem_mapping_set_p(&svga->mapping, gd54xx);

203
src/video/vid_s3.c
View File

@@ -1461,17 +1461,24 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
break;
case 0xe548:
case 0xe6e8:
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16);
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16);
else
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val;
} else
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val;
break;
case 0xe549:
case 0xe6e9:
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24);
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24);
else
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8);
} else
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8);
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
break;
@@ -1495,6 +1502,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24);
else
s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8);
s3->accel.multifunc[0xe] ^= 0x10;
}
break;
@@ -1516,17 +1524,24 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
break;
case 0xed48:
case 0xeee8:
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16);
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16);
else
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val;
} else
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val;
break;
case 0xed49:
case 0xeee9:
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24);
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24);
else
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8);
} else
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8);
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
break;
@@ -1550,6 +1565,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24);
else
s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8);
s3->accel.multifunc[0xe] ^= 0x10;
}
break;
@@ -2759,18 +2775,18 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
svga_recalctimings(svga);
} else if (svga->seqaddr == 9) {
svga->seqregs[svga->seqaddr] = val & 0x80;
svga->seqregs[9] = val & 0x80;
s3_io_set(s3);
return;
} else if (svga->seqaddr == 0xa) {
svga->seqregs[svga->seqaddr] = val & 0x80;
svga->seqregs[0xa] = val & 0x80;
return;
} else if (s3->chip >= S3_VISION964) {
if (svga->seqaddr == 0x08) {
svga->seqregs[svga->seqaddr] = val & 0x0f;
if (svga->seqaddr == 8) {
svga->seqregs[8] = val & 0x0f;
return;
} else if ((svga->seqaddr == 0x0d) && (svga->seqregs[0x08] == 0x06)) {
svga->seqregs[svga->seqaddr] = val;
} else if ((svga->seqaddr == 0xd) && (svga->seqregs[8] == 0x06)) {
svga->seqregs[0xd] = val;
svga->dpms = ((s3->chip >= S3_VISION964) && (svga->seqregs[0x0d] & 0x50)) || (svga->crtc[0x56] & ((s3->chip >= S3_TRIO32) ? 0x06 : 0x20));
svga_recalctimings(svga);
return;
@@ -3162,7 +3178,7 @@ s3_in(uint16_t addr, void *priv)
case 0x51:
return (svga->crtc[0x51] & 0xf0) | ((s3->bank >> 2) & 0xc) | ((s3->ma_ext >> 2) & 3);
case 0x5c: /* General Output Port Register */
temp = svga->crtc[svga->crtcreg] & 0xa0;
temp = svga->crtc[0x5c] & 0xa0;
if (((svga->miscout >> 2) & 3) == 3)
temp |= svga->crtc[0x42] & 0x0f;
else
@@ -3183,20 +3199,19 @@ s3_in(uint16_t addr, void *priv)
case 0x6b:
s3_log("[%04X:%08X]: Read CRTC6b=%02x.\n", CS, cpu_state.pc, svga->crtc[0x6b]);
if (s3->chip != S3_TRIO64V2) {
if (svga->crtc[0x53] & 0x08) {
if (svga->crtc[0x53] & 0x08)
return (s3->chip == S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe);
} else {
else
return svga->crtc[0x59];
}
} else
return svga->crtc[0x6b];
break;
case 0x6c:
s3_log("[%04X:%08X]: Read CRTC6c=%02x.\n", CS, cpu_state.pc, svga->crtc[0x6c]);
if (s3->chip != S3_TRIO64V2) {
if (svga->crtc[0x53] & 0x08) {
if (svga->crtc[0x53] & 0x08)
return 0x00;
} else
else
return (svga->crtc[0x5a] & 0x80);
} else
return svga->crtc[0x6c];
@@ -4305,6 +4320,7 @@ s3_recalctimings(svga_t *svga)
svga->vram_display_mask = s3->vram_mask;
} else {
svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask;
s3_log("CRTC31 bit 0=%x, CRTC32 bit 6=%02x.\n", (svga->crtc[0x31] & 0x01), svga->crtc[0x32] & 0x40);
if (!(svga->crtc[0x31] & 0x01)) { /*Bank Enable bit*/
svga->write_bank = 0;
svga->read_bank = 0;
@@ -4312,7 +4328,7 @@ s3_recalctimings(svga_t *svga)
}
}
if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || (s3->chip == S3_VISION864))
if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || (s3->chip == S3_VISION864) || (s3->chip == S3_VISION868) || (s3->chip == S3_VISION968))
svga->hoverride = 1;
else
svga->hoverride = 0;
@@ -4625,6 +4641,7 @@ s3_updatemapping(s3_t *s3)
}
/* Memory mapped I/O. */
s3_log("CRTC53=%02x, SEQREG9=%02x.\n", svga->crtc[0x53] & 0x18, svga->seqregs[9] & 0x80);
if ((svga->crtc[0x53] & 0x10) || (s3->accel.advfunc_cntl & 0x20)) {
mem_mapping_disable(&svga->mapping);
if (s3->chip >= S3_TRIO64V) {
@@ -4644,8 +4661,7 @@ s3_updatemapping(s3_t *s3)
mem_mapping_set_addr(&s3->new_mmio_mapping, s3->linear_base + 0x1000000, 0x20000);
else
mem_mapping_disable(&s3->new_mmio_mapping);
}
else
} else
mem_mapping_disable(&s3->new_mmio_mapping);
}
}
@@ -5501,21 +5517,27 @@ s3_accel_in(uint16_t port, void *priv)
case 0xd2e8:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
return s3->accel.ropmix & 0xff;
case 0xd149:
case 0xd2e9:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
return s3->accel.ropmix >> 8;
case 0xe548:
case 0xe6e8:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color >> 16;
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color >> 16;
else
temp2 = s3->accel.pat_bg_color & 0xff;
} else
temp2 = s3->accel.pat_bg_color & 0xff;
return temp2;
@@ -5524,37 +5546,53 @@ s3_accel_in(uint16_t port, void *priv)
case 0xe6e9:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color >> 24;
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color >> 24;
else
temp2 = s3->accel.pat_bg_color >> 8;
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
} else
temp2 = s3->accel.pat_bg_color >> 8;
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
return temp2;
case 0xe54a:
case 0xe6ea:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color & 0xff;
else
temp2 = s3->accel.pat_bg_color >> 16;
if (s3->accel.multifunc[0xe] & 0x200)
temp2 = s3->accel.pat_bg_color >> 16;
else if (s3->bpp == 3) {
if (s3->accel.multifunc[0xe] & 0x10)
temp2 = s3->accel.pat_bg_color & 0xff;
else
temp2 = s3->accel.pat_bg_color >> 16;
}
return temp2;
case 0xe54b:
case 0xe6eb:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_bg_color >> 8;
else
temp2 = s3->accel.pat_bg_color >> 24;
if (!(s3->accel.multifunc[0xe] & 0x200))
if (s3->accel.multifunc[0xe] & 0x200)
temp2 = s3->accel.pat_bg_color >> 24;
else if (s3->bpp == 3) {
if (s3->accel.multifunc[0xe] & 0x10)
temp2 = s3->accel.pat_bg_color >> 8;
else
temp2 = s3->accel.pat_bg_color >> 24;
s3->accel.multifunc[0xe] ^= 0x10;
}
return temp2;
case 0xe948:
@@ -5585,9 +5623,13 @@ s3_accel_in(uint16_t port, void *priv)
case 0xeee8:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color >> 16;
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color >> 16;
else
temp2 = s3->accel.pat_fg_color & 0xff;
} else
temp2 = s3->accel.pat_fg_color & 0xff;
return temp2;
@@ -5596,37 +5638,53 @@ s3_accel_in(uint16_t port, void *priv)
case 0xeee9:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color >> 24;
else
if (s3->bpp == 3) {
if ((s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color >> 24;
else
temp2 = s3->accel.pat_fg_color >> 8;
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
} else
temp2 = s3->accel.pat_fg_color >> 8;
if (!(s3->accel.multifunc[0xe] & 0x200))
s3->accel.multifunc[0xe] ^= 0x10;
return temp2;
case 0xed4a:
case 0xeeea:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color & 0xff;
else
temp2 = s3->accel.pat_fg_color >> 16;
if (s3->accel.multifunc[0xe] & 0x200)
temp2 = s3->accel.pat_fg_color >> 16;
else if (s3->bpp == 3) {
if (s3->accel.multifunc[0xe] & 0x10)
temp2 = s3->accel.pat_fg_color & 0xff;
else
temp2 = s3->accel.pat_fg_color >> 16;
}
return temp2;
case 0xed4b:
case 0xeeeb:
if (s3_enable_fifo(s3))
s3_wait_fifo_idle(s3);
if ((s3->bpp == 3) && (s3->accel.multifunc[0xe] & 0x10) && !(s3->accel.multifunc[0xe] & 0x200))
temp2 = s3->accel.pat_fg_color >> 8;
else
temp2 = s3->accel.pat_fg_color >> 24;
if (!(s3->accel.multifunc[0xe] & 0x200))
if (s3->accel.multifunc[0xe] & 0x200)
temp2 = s3->accel.pat_fg_color >> 24;
else if (s3->bpp == 3) {
if (s3->accel.multifunc[0xe] & 0x10)
temp2 = s3->accel.pat_fg_color >> 8;
else
temp2 = s3->accel.pat_fg_color >> 24;
s3->accel.multifunc[0xe] ^= 0x10;
}
return temp2;
case 0xe148:
@@ -7916,8 +7974,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
/*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled.
When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on
the NOP command)*/
if (s3->accel.cmd == 0x41b3 || (cmd == 6))
s3_log("CMD=%d, full=%04x, s3bpp=%x, multifuncE=%03x, sourcedisplay=%x, mmio=%02x, srcbase=%08x, dstbase=%08x, cpu=%04x, mix=%04x, count=%d, rd_mask=%04x, wrt_mask=%04x, width=%d, s=%d,%d, c=%d,%d, d=%d,%d, 16bitcolor=%x, frgdcolor=%04x, bkgdcolor=%04x, frgdsel=%d, bkgdsel=%d, frgdmix=%02x, svgabpp=%d.\n", cmd, s3->accel.cmd, s3->bpp, s3->accel.multifunc[0x0e], vram_mask, svga->crtc[0x53] & 0x18, srcbase, dstbase, cpu_dat & 0xffff, mix_dat & 0xffff, count, rd_mask, wrt_mask, s3->width, s3->accel.sx, s3->accel.sy, s3->accel.cx, s3->accel.cy, s3->accel.dx, s3->accel.dy, s3->color_16bit, frgd_color, bkgd_color, frgd_mix, bkgd_mix, s3->accel.frgd_mix & 0x0f, svga->bpp);
s3_log("CMD=%d, full=%04x, s3bpp=%x, multifuncE=%03x, sourcedisplay=%x, mmio=%02x, srcbase=%08x, dstbase=%08x, cpu=%04x, mix=%04x, count=%d, rd_mask=%04x, wrt_mask=%04x, width=%d, s=%d,%d, c=%d,%d, d=%d,%d, 16bitcolor=%x, frgdcolor=%04x, bkgdcolor=%04x, frgdsel=%d, bkgdsel=%d, frgdmix=%02x, svgabpp=%d.\n", cmd, s3->accel.cmd, s3->bpp, s3->accel.multifunc[0x0e], vram_mask, svga->crtc[0x53] & 0x18, srcbase, dstbase, cpu_dat & 0xffff, mix_dat & 0xffff, count, rd_mask, wrt_mask, s3->width, s3->accel.sx, s3->accel.sy, s3->accel.cx, s3->accel.cy, s3->accel.dx, s3->accel.dy, s3->color_16bit, frgd_color, bkgd_color, frgd_mix, bkgd_mix, s3->accel.frgd_mix & 0x0f, svga->bpp);
switch (cmd) {
case 0: /*NOP (Short Stroke Vectors)*/
@@ -8337,7 +8394,13 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
if (update) {
READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, dest_dat);
MIX
if (s3_cpu_dest(s3)) {
if (vram_mask) {
MIX
}
} else {
MIX
}
if (s3->accel.cmd & 0x10) {
if (s3->accel.cmd == 0x41b3)
@@ -8665,7 +8728,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
}
break;
case 7: /*Pattern fill - BitBlt but with source limited to 8x8*/
case 7: /*Pattern fill - BitBlt but with source limited to 8x8*/
if (!cpu_input) /*!cpu_input is trigger to start operation*/
{
s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff;
@@ -8687,12 +8750,11 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width);
}
if ((s3->accel.cmd & 0x100) && !cpu_input) {
if ((s3->accel.cmd & 0x100) && !cpu_input)
return; /*Wait for data from CPU*/
}
while (count-- && s3->accel.sy >= 0) {
if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && (s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b) {
while (count-- && (s3->accel.sy >= 0)) {
if ((s3->accel.dx >= clip_l) && (s3->accel.dx <= clip_r) && (s3->accel.dy >= clip_t) && (s3->accel.dy <= clip_b)) {
if (vram_mask) {
READ(s3->accel.src + s3->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
@@ -8700,10 +8762,10 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
}
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = s3->accel.bkgd_color;
src_dat = bkgd_color;
break;
case 1:
src_dat = s3->accel.frgd_color;
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
@@ -8778,15 +8840,14 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi
s3->accel.dy--;
}
s3->accel.dy &= 0xfff;
s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width);
s3->accel.dest = dstbase + s3->accel.dy * s3->width;
s3->accel.sy--;
if (cpu_input) {
if (cpu_input)
return;
}
if (s3->accel.sy < 0) {
s3->accel.destx_distp = s3->accel.dx;
s3->accel.desty_axstp = s3->accel.dy;
@@ -10224,6 +10285,8 @@ s3_init(const device_t *info)
s3->i2c = i2c_gpio_init("ddc_s3");
s3->ddc = ddc_init(i2c_gpio_get_bus(s3->i2c));
s3->accel.multifunc[0xd] = 0xd000;
s3->accel.multifunc[0xe] = 0xe000;
s3->wake_fifo_thread = thread_create_event();
s3->fifo_not_full_event = thread_create_event();

42
src/video/vid_s3_virge.c
View File

@@ -463,7 +463,8 @@ enum {
#define SERIAL_PORT_SDR (1 << 3)
static void
s3_virge_update_irqs(virge_t *virge) {
s3_virge_update_irqs(virge_t *virge)
{
if ((virge->svga.crtc[0x32] & 0x10) && (virge->subsys_stat & virge->subsys_cntl & INT_MASK))
pci_set_irq(virge->pci_slot, PCI_INTA, &virge->irq_state);
else
@@ -653,8 +654,8 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv)
svga->bpp = (virge->chip == S3_VIRGEVX) ? 24 : 32;
break;
default:
svga->bpp = 8;
break;
svga->bpp = 8;
break;
}
break;
@@ -795,6 +796,8 @@ s3_virge_in(uint16_t addr, void *priv) {
static void
s3_virge_recalctimings(svga_t *svga)
{
int n, r, m;
double freq;
virge_t *virge = (virge_t *) svga->priv;
svga->hdisp = svga->hdisp_old;
@@ -829,18 +832,17 @@ s3_virge_recalctimings(svga_t *svga)
svga->interlace = svga->crtc[0x42] & 0x20;
if (((svga->miscout >> 2) & 3) == 3) {
int n = svga->seqregs[0x12] & 0x1f;
int r = (svga->seqregs[0x12] >> 5);
if ((virge->chip == S3_VIRGEVX) || (virge->chip == S3_VIRGEDX))
r &= 7;
else if (virge->chip >= S3_VIRGEGX2)
r &= 10;
n = svga->seqregs[0x12] & 0x1f;
if (virge->chip >= S3_VIRGEGX2) {
r = (svga->seqregs[0x12] >> 6) & 0x03;
r |= ((svga->seqregs[0x29] & 0x01) << 2);
} else if ((virge->chip == S3_VIRGEVX) || (virge->chip == S3_VIRGEDX))
r = (svga->seqregs[0x12] >> 5) & 0x07;
else
r &= 3;
r = (svga->seqregs[0x12] >> 5) & 0x03;
int m = svga->seqregs[0x13] & 0x7f;
double freq = (((double) m + 2) / (((double) n + 2) * (double) (1 << r))) * 14318184.0;
m = svga->seqregs[0x13] & 0x7f;
freq = (((double) m + 2) / (((double) n + 2) * (double) (1 << r))) * 14318184.0;
svga->clock = (cpuclock * (float) (1ULL << 32)) / freq;
}
@@ -1789,9 +1791,9 @@ fifo_thread(void *param)
virge_time += end_time - start_time;
}
virge->virge_busy = 0;
virge->subsys_stat |= INT_FIFO_EMP | INT_3DF_EMP;
virge->subsys_stat |= (INT_FIFO_EMP | INT_3DF_EMP);
if (virge->cmd_dma)
virge->subsys_stat |= INT_HOST_DONE | INT_CMD_DONE;
virge->subsys_stat |= (INT_HOST_DONE | INT_CMD_DONE);
s3_virge_update_irqs(virge);
}
@@ -1884,7 +1886,8 @@ s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *priv)
}
static void
s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) {
s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv)
{
virge_t *virge = (virge_t *) priv;
svga_t *svga = &virge->svga;
@@ -2209,7 +2212,8 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) {
} while (0)
static void
s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) {
s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat)
{
uint8_t *vram = virge->svga.vram;
uint32_t mono_pattern[64];
int count_mask;
@@ -3656,7 +3660,9 @@ queue_triangle(virge_t *virge)
thread_set_event(virge->wake_render_thread); /*Wake up render thread if moving from idle*/
}
static void s3_virge_hwcursor_draw(svga_t *svga, int displine) {
static void
s3_virge_hwcursor_draw(svga_t *svga, int displine)
{
virge_t *virge = (virge_t *) svga->priv;
int x;
uint16_t dat[2] = { 0, 0 };